A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "ARM: dts: msm: Add interconnect l3 epss devices for Lahaina"

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qctecmdr 2019-12-10 15:14:59 -08:00 • committed by Gerrit - the friendly Code Review server
commit 171bedcc40
1 changed files with 19 additions and 0 deletions
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19
qcom/lahaina.dtsi
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@ -6,6 +6,7 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,videocc-lahaina.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interconnect/qcom,epss-l3.h>
#include <dt-bindings/interconnect/qcom,lahaina.h>
#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@ -959,6 +960,24 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
epss_l3_shared: l3_shared@18590000 {
reg = <0x18590000 0x1000>;
compatible = "qcom,lahaina-epss-l3-shared";
#interconnect-cells = <1>;
clock-names = "xo", "alternate";
clocks = <&clock_rpmh RPMH_CXO_CLK>,
<&clock_gcc GCC_GPLL0>;
};
epss_l3_cpu: l3_cpu@18590000 {
reg = <0x18590000 0x4000>;
compatible = "qcom,lahaina-epss-l3-cpu";
#interconnect-cells = <1>;
clock-names = "xo", "alternate";
clocks = <&clock_rpmh RPMH_CXO_CLK>,
<&clock_gcc GCC_GPLL0>;
};
pil_scm_pas {
compatible = "qcom,pil-tz-scm-pas";
interconnects = <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;