From 1720e2bbf9ee94af88ff113d71612ef89852628f Mon Sep 17 00:00:00 2001 From: Divyanshu-Modi Date: Fri, 12 Aug 2022 15:35:28 +0530 Subject: [PATCH] arm64: dts: vendor: qcom: Update cpu cooling device node Commit e186eb0c0caf9ec883afd6c426a216e7aeaf9f90 seperated the qcom,cpus node into qcom,cluster0/1. Update accordingly to enable cpu voltage cooling device. Change-Id: I92fc40e4904cb7c1d31557a2ae6a79aed5451eec --- arch/arm64/boot/dts/vendor/qcom/lahaina-thermal.dtsi | 3 ++- arch/arm64/boot/dts/vendor/qcom/shima-thermal.dtsi | 3 ++- arch/arm64/boot/dts/vendor/qcom/yupik-thermal.dtsi | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/vendor/qcom/lahaina-thermal.dtsi b/arch/arm64/boot/dts/vendor/qcom/lahaina-thermal.dtsi index 4fadb7a87f45..462676e4dc5c 100644 --- a/arch/arm64/boot/dts/vendor/qcom/lahaina-thermal.dtsi +++ b/arch/arm64/boot/dts/vendor/qcom/lahaina-thermal.dtsi @@ -172,7 +172,8 @@ qcom,cpu-voltage-cdev { compatible = "qcom,cc-cooling-devices"; apc1_cluster: qcom,apc1-cluster { - qcom,cpus = <&CPU4 &CPU7>; + qcom,cluster0 = <&CPU4>; + qcom,cluster1 = <&CPU7>; #cooling-cells = <2>; }; }; diff --git a/arch/arm64/boot/dts/vendor/qcom/shima-thermal.dtsi b/arch/arm64/boot/dts/vendor/qcom/shima-thermal.dtsi index a5b819e44a9c..f38d08066ab8 100644 --- a/arch/arm64/boot/dts/vendor/qcom/shima-thermal.dtsi +++ b/arch/arm64/boot/dts/vendor/qcom/shima-thermal.dtsi @@ -200,7 +200,8 @@ qcom,cpu-voltage-cdev { compatible = "qcom,cc-cooling-devices"; apc1_cluster: qcom,apc1-cluster { - qcom,cpus = <&CPU4 &CPU7>; + qcom,cluster0 = <&CPU4>; + qcom,cluster1 = <&CPU7>; #cooling-cells = <2>; }; }; diff --git a/arch/arm64/boot/dts/vendor/qcom/yupik-thermal.dtsi b/arch/arm64/boot/dts/vendor/qcom/yupik-thermal.dtsi index a9d549cfe7b1..49cb50a0a3dd 100644 --- a/arch/arm64/boot/dts/vendor/qcom/yupik-thermal.dtsi +++ b/arch/arm64/boot/dts/vendor/qcom/yupik-thermal.dtsi @@ -232,7 +232,8 @@ qcom,cpu-voltage-cdev { compatible = "qcom,cc-cooling-devices"; apc1_cluster: qcom,apc1-cluster { - qcom,cpus = <&CPU4 &CPU7>; + qcom,cluster0 = <&CPU4>; + qcom,cluster1 = <&CPU7>; #cooling-cells = <2>; }; };