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STi DT updates for v3.19, round 1.
Highlights: ----------- - Add SDHCI support for STiH41x B2020 boards - Add reset controllers to STiH407 SoC - Add MiPHY & SATA support to STiH416 - Add Thermal supportto STiH416 - Add Clock support to STiH407 SoC This tag also includes STiH407 bindings definitions for reset controller. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUU24fAAoJEMo4jShGhw+J8AMP/ii1CVgJZkaimGllZlO6kOwj tB6tZ3n8EGoC7P4UismVzmKqqGCkLGChzlUzvJMqSjE8kmmtwYPODxUy6nRZ5Gii S9PGAmJ8vRqEyG/8y83Y1OGnV7WBzVQfHnwFr0JvrFvCYyiHnpbUlxIKkA85F+JG Hnd+HKqOymhwY8eSN8nH/slrFkCYAEaGLoVV7tZWtr0p6gQYA7rP7XkFOXs1Ln5G iA8wtTDaPIyRH7X5/WeESjhkBMP8YcmslLUtaagIrORcQWC+TYNSFwWkciyFothd sz0szIO0/j9uLgxdKLnHxAU8mwx1in0ZNDaC+WlKtSE7V39C2PhaSmJ9sL+0Dxu3 2HSoUPBgEJ0Zu5U7xSNgYQZrfANGx059B00J2OqDJfLshyDmpJrbJZtsQTW6Qz6N c8fGebGTXHHkLvjRHfh6LXRN30CpJc6m+mmwybhROnYyXdv7htv2q2V340GoG2mI 6l5JY46g91KrSjEf91//qXLBvesoRVAPS9g2wKBjiePIl1nzdjZOfZ0vpw+vn1PV t9DUk1S2OuzeMdqSIt6XsjJQQcTL8npx2V+88ibo5BkAlOdLcCSOUuTzAHEBZtwB GJVTXog3TX3SoDmCc/guUAN7gzto3LBAz9GwcIuC28tkF0UufUX3v6wU+yz1+l00 vLV6A2aJwUAZ3rRbQI2b =YmAW -----END PGP SIGNATURE----- Merge tag 'sti-dt-for-v3.19-1' of git://git.stlinux.com/devel/kernel/linux-sti into next/dt Merge "STi DT updates for v3.19, round 1" from Maxime Coquelin: Highlights: ----------- - Add SDHCI support for STiH41x B2020 boards - Add reset controllers to STiH407 SoC - Add MiPHY & SATA support to STiH416 - Add Thermal supportto STiH416 - Add Clock support to STiH407 SoC This tag also includes STiH407 bindings definitions for reset controller. * tag 'sti-dt-for-v3.19-1' of git://git.stlinux.com/devel/kernel/linux-sti: ARM: STi: DT: STiH407: Fix: clk-tmds-hdmi clock is missing ARM: STi: DT: STiH407: Add all defines for STiH407 DT clocks ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9 ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3 ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0 ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0 ARM: DT: STi: STiH416: Add DT node for ST's SATA device ARM: DT: STi: STiH416: Add DT node for MiPHY365x ARM: STi: DT: STiH416: Supply Thermal Controller Device Tree nodes ARM: STi: DT: Enable second sdhci controller for stih416 b2020 boards. ARM: STi: DT: Enable mmc0 for both stih415 and stih416 SoCs ARM: STi: DT: Add sdhci controller for stih415 ARM: STi: DT: Add sdhci pin configuration for stih415 ARM: STi: DT: Add sdhci controller for stih416 ARM: STi: DT: Add sdhci pins for stih416 ARM: sti: Add STiH407 reset controller support. ARM: sti: Add STiH407 Kconfig entry to select STIH407_RESET ARM: STi: DT: STiH41x: Convert all uppercase non-defines to lowercase reset: stih407: Add reset controllers DT bindings Signed-off-by: Olof Johansson <[email protected]>
This commit is contained in:
Olof Johansson
commit
1749e1fc9e
14 changed files with 1024 additions and 362 deletions
86
include/dt-bindings/clock/stih407-clks.h
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86
include/dt-bindings/clock/stih407-clks.h
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/*
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* This header provides constants clk index STMicroelectronics
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* STiH407 SoC.
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*/
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#ifndef _DT_BINDINGS_CLK_STIH407
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#define _DT_BINDINGS_CLK_STIH407
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/* CLOCKGEN C0 */
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#define CLK_ICN_GPU 0
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#define CLK_FDMA 1
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#define CLK_NAND 2
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#define CLK_HVA 3
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#define CLK_PROC_STFE 4
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#define CLK_PROC_TP 5
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#define CLK_RX_ICN_DMU 6
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#define CLK_RX_ICN_DISP_0 6
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#define CLK_RX_ICN_DISP_1 6
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#define CLK_RX_ICN_HVA 7
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#define CLK_RX_ICN_TS 7
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#define CLK_ICN_CPU 8
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#define CLK_TX_ICN_DMU 9
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#define CLK_TX_ICN_HVA 9
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#define CLK_TX_ICN_TS 9
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#define CLK_ICN_COMPO 9
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#define CLK_MMC_0 10
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#define CLK_MMC_1 11
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#define CLK_JPEGDEC 12
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#define CLK_ICN_REG 13
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#define CLK_TRACE_A9 13
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#define CLK_PTI_STM 13
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#define CLK_EXT2F_A9 13
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#define CLK_IC_BDISP_0 14
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#define CLK_IC_BDISP_1 15
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#define CLK_PP_DMU 16
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#define CLK_VID_DMU 17
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#define CLK_DSS_LPC 18
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#define CLK_ST231_AUD_0 19
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#define CLK_ST231_GP_0 19
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#define CLK_ST231_GP_1 20
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#define CLK_ST231_DMU 21
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#define CLK_ICN_LMI 22
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#define CLK_TX_ICN_DISP_0 23
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#define CLK_TX_ICN_DISP_1 23
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#define CLK_ICN_SBC 24
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#define CLK_STFE_FRC2 25
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#define CLK_ETH_PHY 26
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#define CLK_ETH_REF_PHYCLK 27
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#define CLK_FLASH_PROMIP 28
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#define CLK_MAIN_DISP 29
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#define CLK_AUX_DISP 30
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#define CLK_COMPO_DVP 31
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/* CLOCKGEN D0 */
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#define CLK_PCM_0 0
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#define CLK_PCM_1 1
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#define CLK_PCM_2 2
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#define CLK_SPDIFF 3
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/* CLOCKGEN D2 */
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#define CLK_PIX_MAIN_DISP 0
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#define CLK_PIX_PIP 1
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#define CLK_PIX_GDP1 2
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#define CLK_PIX_GDP2 3
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#define CLK_PIX_GDP3 4
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#define CLK_PIX_GDP4 5
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#define CLK_PIX_AUX_DISP 6
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#define CLK_DENC 7
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#define CLK_PIX_HDDAC 8
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#define CLK_HDDAC 9
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#define CLK_SDDAC 10
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#define CLK_PIX_DVO 11
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#define CLK_DVO 12
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#define CLK_PIX_HDMI 13
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#define CLK_TMDS_HDMI 14
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#define CLK_REF_HDMIPHY 15
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/* CLOCKGEN D3 */
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#define CLK_STFE_FRC1 0
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#define CLK_TSOUT_0 1
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#define CLK_TSOUT_1 2
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#define CLK_MCHI 3
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#define CLK_VSENS_COMPO 4
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#define CLK_FRC1_REMOTE 5
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#define CLK_LPC_0 6
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#define CLK_LPC_1 7
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#endif
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61
include/dt-bindings/reset-controller/stih407-resets.h
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61
include/dt-bindings/reset-controller/stih407-resets.h
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/*
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* This header provides constants for the reset controller
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* based peripheral powerdown requests on the STMicroelectronics
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* STiH407 SoC.
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*/
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#ifndef _DT_BINDINGS_RESET_CONTROLLER_STIH407
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#define _DT_BINDINGS_RESET_CONTROLLER_STIH407
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/* Powerdown requests control 0 */
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#define STIH407_EMISS_POWERDOWN 0
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#define STIH407_NAND_POWERDOWN 1
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/* Synp GMAC PowerDown */
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#define STIH407_ETH1_POWERDOWN 2
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/* Powerdown requests control 1 */
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#define STIH407_USB3_POWERDOWN 3
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#define STIH407_USB2_PORT1_POWERDOWN 4
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#define STIH407_USB2_PORT0_POWERDOWN 5
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#define STIH407_PCIE1_POWERDOWN 6
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#define STIH407_PCIE0_POWERDOWN 7
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#define STIH407_SATA1_POWERDOWN 8
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#define STIH407_SATA0_POWERDOWN 9
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/* Reset defines */
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#define STIH407_ETH1_SOFTRESET 0
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#define STIH407_MMC1_SOFTRESET 1
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#define STIH407_PICOPHY_SOFTRESET 2
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#define STIH407_IRB_SOFTRESET 3
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#define STIH407_PCIE0_SOFTRESET 4
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#define STIH407_PCIE1_SOFTRESET 5
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#define STIH407_SATA0_SOFTRESET 6
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#define STIH407_SATA1_SOFTRESET 7
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#define STIH407_MIPHY0_SOFTRESET 8
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#define STIH407_MIPHY1_SOFTRESET 9
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#define STIH407_MIPHY2_SOFTRESET 10
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#define STIH407_SATA0_PWR_SOFTRESET 11
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#define STIH407_SATA1_PWR_SOFTRESET 12
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#define STIH407_DELTA_SOFTRESET 13
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#define STIH407_BLITTER_SOFTRESET 14
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#define STIH407_HDTVOUT_SOFTRESET 15
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#define STIH407_HDQVDP_SOFTRESET 16
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#define STIH407_VDP_AUX_SOFTRESET 17
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#define STIH407_COMPO_SOFTRESET 18
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#define STIH407_HDMI_TX_PHY_SOFTRESET 19
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#define STIH407_JPEG_DEC_SOFTRESET 20
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#define STIH407_VP8_DEC_SOFTRESET 21
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#define STIH407_GPU_SOFTRESET 22
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#define STIH407_HVA_SOFTRESET 23
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#define STIH407_ERAM_HVA_SOFTRESET 24
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#define STIH407_LPM_SOFTRESET 25
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#define STIH407_KEYSCAN_SOFTRESET 26
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#define STIH407_USB2_PORT0_SOFTRESET 27
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#define STIH407_USB2_PORT1_SOFTRESET 28
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/* Picophy reset defines */
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#define STIH407_PICOPHY0_RESET 0
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#define STIH407_PICOPHY1_RESET 1
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#define STIH407_PICOPHY2_RESET 2
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#endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH407 */
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