Merge "dt-bindings: interconnect: update OSM L3 bindings"

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qctecmdr 2020-12-18 03:37:14 -08:00 • committed by Gerrit - the friendly Code Review server
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Qualcomm Technologies, Inc. EPSS L3 interconnect driver binding
Qualcomm Technologies, Inc. OSM L3 interconnect driver binding
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The EPSS L3 Interconnect provider supports the scaling of L3 cache
The OSM L3 Interconnect provider supports the scaling of L3 cache
performance states of the CPU subsystem.
Required properties :
- compatible : shall contain only one of the following:
"qcom,sdm845-osm-l3",
"qcom,sm8150-osm-l3";
"qcom,sm6150-osm-l3";
"qcom,scshrike-osm-l3";
- reg : Address and length of the register set for the device
- clock-names: should contain "xo", "alternate"
- clocks: list of phandle and clock specifier pairs corresponding to