mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-24 21:54:34 -04:00
MMC core:
- Add new API to set VCCQ voltage - mmc_regulator_set_vqmmc() - Add new ioctl to allow userspace to send multi commands - Wait for card busy signalling before starting SDIO requests - Remove MMC_CLKGATE - Enable tuning for DDR50 mode - Some code clean-up/improvements to mmc pwrseq - Use highest priority for eMMC restart handler - Add DT bindings for eMMC hardware reset support - Extend the mmc_send_tuning() API - Improve ios show for debugfs - A couple of code optimizations MMC host: - Some generic OF improvements - Various code clean-ups - sirf: Add support for DDR50 - sunxi: Add support for card busy detection - mediatek: Use MMC_CAP_RUNTIME_RESUME - mediatek: Add support for eMMC HW-reset - mediatek: Add support for HS400 - dw_mmc: Convert to use the new mmc_regulator_set_vqmmc() API - dw_mmc: Add external DMA interface support - dw_mmc: Some various improvements - dw_mmc-rockchip: MMC tuning with the clock phase framework - sdhci: Properly clear IRQs during resume - sdhci: Enable tuning for DDR50 mode - sdhci-of-esdhc: Use IRQ mode for card detection - sdhci-of-esdhc: Support both BE and LE host controller - sdhci-pci: Build o2micro support in the same module - sdhci-pci: Support for new Intel host controllers - sdhci-acpi: Support for new Intel host controllers -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWNyuHAAoJEP4mhCVzWIwpHHUP/38kYyuhHNWEagna2taCnb5r tacx0IEfjvEmkzFNX4qLyBlu8lvDMJPx/GYx1RxE10/ZEsdllBpgtuS2+4SLHdlR naUwPsjjMigf4FavsnMxYe9yqsHsDkzFgJ2zsrRm/5h+0G4Uj3X+ejgGPjAFu3KK 6Ldha83dagR065MT8AIQRkVfjwME2mQC4RbWxmIpEQrzS2mJi3QZ0UikVWs6TWuE +1pxCobspYXK4Q9UC455JvrMJtOjDi1JNBmVyTA2fS+SBeQ1ZqbnNSbK1VAXI43b TKgUN/wp2SGqNCL+dhsebTOdEwKUgxcRRCReZRR0DBvTDvETmXRZ6ji6XUtaSAHL TY4hbNL9bWJN0JoidgdUKcQ5GjZcvDQk3eY6L0FP/C/plDEBIel7Ndf8pQco9NBQ l1CXuhjNZvkmHf9w44FgdeEGM5l/hn8J725mrVU+XNrMKv1RuNQZ56h2i33ktk6c b3+uGLMAqat59yecyaFqZibI+9WQ0pS+zz0IgQxyWxU5i86z3hrk4fbxHpmFZuEz 7awBMjiXldrbUY0fvWK6KlnTz+kqHHKxD5o9Pr9xBo6H28AwL4zGFwcU8dDpaOSk o13lLvWcZYsSMuUwO+y5jQdGejTkD2ZeJY8LqAY+SB124qAngRXLwdyBp5uqnzLS mBJh2R2ztcin5TzaJN3c =gn/m -----END PGP SIGNATURE----- Merge tag 'mmc-v4.4' of git://git.linaro.org/people/ulf.hansson/mmc Pull MMC updates from Ulf Hansson: "MMC core: - Add new API to set VCCQ voltage - mmc_regulator_set_vqmmc() - Add new ioctl to allow userspace to send multi commands - Wait for card busy signalling before starting SDIO requests - Remove MMC_CLKGATE - Enable tuning for DDR50 mode - Some code clean-up/improvements to mmc pwrseq - Use highest priority for eMMC restart handler - Add DT bindings for eMMC hardware reset support - Extend the mmc_send_tuning() API - Improve ios show for debugfs - A couple of code optimizations MMC host: - Some generic OF improvements - Various code clean-ups - sirf: Add support for DDR50 - sunxi: Add support for card busy detection - mediatek: Use MMC_CAP_RUNTIME_RESUME - mediatek: Add support for eMMC HW-reset - mediatek: Add support for HS400 - dw_mmc: Convert to use the new mmc_regulator_set_vqmmc() API - dw_mmc: Add external DMA interface support - dw_mmc: Some various improvements - dw_mmc-rockchip: MMC tuning with the clock phase framework - sdhci: Properly clear IRQs during resume - sdhci: Enable tuning for DDR50 mode - sdhci-of-esdhc: Use IRQ mode for card detection - sdhci-of-esdhc: Support both BE and LE host controller - sdhci-pci: Build o2micro support in the same module - sdhci-pci: Support for new Intel host controllers - sdhci-acpi: Support for new Intel host controllers" * tag 'mmc-v4.4' of git://git.linaro.org/people/ulf.hansson/mmc: (73 commits) mmc: dw_mmc: fix the wrong setting for UHS-DDR50 mode mmc: dw_mmc: fix the CardThreshold boundary at CardThrCtl register mmc: dw_mmc: NULL dereference in error message mmc: pwrseq: Use highest priority for eMMC restart handler mmc: mediatek: add HS400 support mmc: mmc: extend the mmc_send_tuning() mmc: mediatek: add implement of ops->hw_reset() mmc: mediatek: fix got GPD checksum error interrupt when data transfer mmc: mediatek: change the argument "ddr" to "timing" mmc: mediatek: make cmd_ints_mask to const mmc: dt-bindings: update Mediatek MMC bindings mmc: core: Add DT bindings for eMMC hardware reset support mmc: omap_hsmmc: Enable omap_hsmmc for Keystone 2 mmc: sdhci-acpi: Add more ACPI HIDs for Intel controllers mmc: sdhci-pci: Add more PCI IDs for Intel controllers arm: lpc18xx_defconfig: remove CONFIG_MMC_DW_IDMAC arm: hisi_defconfig: remove CONFIG_MMC_DW_IDMAC arm: exynos_defconfig: remove CONFIG_MMC_DW_IDMAC arc: axs10x_defconfig: remove CONFIG_MMC_DW_IDMAC mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMAC ...
This commit is contained in:
Linus Torvalds
commit
17a1359034
67 changed files with 1703 additions and 910 deletions
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@ -269,7 +269,6 @@ struct mmc_card {
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/* for byte mode */
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#define MMC_QUIRK_NONSTD_SDIO (1<<2) /* non-standard SDIO card attached */
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/* (missing CIA registers) */
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#define MMC_QUIRK_BROKEN_CLK_GATING (1<<3) /* clock gating the sdio bus will make card fail */
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#define MMC_QUIRK_NONSTD_FUNC_IF (1<<4) /* SDIO card has nonstd function interfaces */
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#define MMC_QUIRK_DISABLE_CD (1<<5) /* disconnect CD/DAT[3] resistor */
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#define MMC_QUIRK_INAND_CMD38 (1<<6) /* iNAND devices have broken CMD38 */
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@ -152,10 +152,8 @@ extern int mmc_app_cmd(struct mmc_host *, struct mmc_card *);
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extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *,
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struct mmc_command *, int);
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extern void mmc_start_bkops(struct mmc_card *card, bool from_exception);
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extern int __mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int, bool,
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bool, bool);
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extern int mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int);
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extern int mmc_send_tuning(struct mmc_host *host);
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extern int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
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extern int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd);
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#define MMC_ERASE_ARG 0x00000000
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@ -16,6 +16,7 @@
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#include <linux/scatterlist.h>
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#include <linux/mmc/core.h>
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#include <linux/dmaengine.h>
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#define MAX_MCI_SLOTS 2
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@ -40,6 +41,17 @@ enum {
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struct mmc_data;
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enum {
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TRANS_MODE_PIO = 0,
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TRANS_MODE_IDMAC,
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TRANS_MODE_EDMAC
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};
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struct dw_mci_dma_slave {
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struct dma_chan *ch;
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enum dma_transfer_direction direction;
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};
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/**
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* struct dw_mci - MMC controller state shared between all slots
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* @lock: Spinlock protecting the queue and associated data.
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@ -154,7 +166,14 @@ struct dw_mci {
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dma_addr_t sg_dma;
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void *sg_cpu;
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const struct dw_mci_dma_ops *dma_ops;
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/* For idmac */
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unsigned int ring_size;
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/* For edmac */
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struct dw_mci_dma_slave *dms;
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/* Registers's physical base address */
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void *phy_regs;
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u32 cmd_status;
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u32 data_status;
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u32 stop_cmdr;
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@ -208,8 +227,8 @@ struct dw_mci {
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struct dw_mci_dma_ops {
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/* DMA Ops */
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int (*init)(struct dw_mci *host);
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void (*start)(struct dw_mci *host, unsigned int sg_len);
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void (*complete)(struct dw_mci *host);
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int (*start)(struct dw_mci *host, unsigned int sg_len);
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void (*complete)(void *host);
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void (*stop)(struct dw_mci *host);
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void (*cleanup)(struct dw_mci *host);
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void (*exit)(struct dw_mci *host);
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@ -292,18 +292,6 @@ struct mmc_host {
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mmc_pm_flag_t pm_caps; /* supported pm features */
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#ifdef CONFIG_MMC_CLKGATE
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int clk_requests; /* internal reference counter */
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unsigned int clk_delay; /* number of MCI clk hold cycles */
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bool clk_gated; /* clock gated */
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struct delayed_work clk_gate_work; /* delayed clock gate */
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unsigned int clk_old; /* old clock value cache */
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spinlock_t clk_lock; /* lock for clk fields */
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struct mutex clk_gate_mutex; /* mutex for clock gating */
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struct device_attribute clkgate_delay_attr;
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unsigned long clkgate_delay;
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#endif
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/* host specific block data */
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unsigned int max_seg_size; /* see blk_queue_max_segment_size */
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unsigned short max_segs; /* see blk_queue_max_segments */
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@ -423,6 +411,7 @@ int mmc_regulator_get_ocrmask(struct regulator *supply);
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int mmc_regulator_set_ocr(struct mmc_host *mmc,
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struct regulator *supply,
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unsigned short vdd_bit);
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int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
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#else
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static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
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{
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@ -435,6 +424,12 @@ static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
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{
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return 0;
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}
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static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
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struct mmc_ios *ios)
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{
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return -EINVAL;
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}
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#endif
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int mmc_regulator_get_supply(struct mmc_host *mmc);
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@ -479,26 +474,6 @@ static inline int mmc_host_packed_wr(struct mmc_host *host)
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return host->caps2 & MMC_CAP2_PACKED_WR;
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}
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#ifdef CONFIG_MMC_CLKGATE
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void mmc_host_clk_hold(struct mmc_host *host);
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void mmc_host_clk_release(struct mmc_host *host);
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unsigned int mmc_host_clk_rate(struct mmc_host *host);
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#else
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static inline void mmc_host_clk_hold(struct mmc_host *host)
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{
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}
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static inline void mmc_host_clk_release(struct mmc_host *host)
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{
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}
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static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
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{
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return host->ios.clock;
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}
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#endif
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static inline int mmc_card_hs(struct mmc_card *card)
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{
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return card->host->ios.timing == MMC_TIMING_SD_HS ||
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