Merge master.kernel.org:/home/rmk/linux-2.6-serial

This commit is contained in:
Linus Torvalds 2006-02-08 15:21:22 -08:00
commit 17be03f0a1
49 changed files with 108 additions and 113 deletions

View file

@ -362,7 +362,7 @@ static struct uart_ops serial21285_ops = {
static struct uart_port serial21285_port = {
.mapbase = 0x42000160,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = NO_IRQ,
.fifosize = 16,
.ops = &serial21285_ops,

View file

@ -2229,6 +2229,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
* and restore the IER
*/
wait_for_xmitr(up, BOTH_EMPTY);
up->ier |= UART_IER_THRI;
serial_out(up, UART_IER, ier | UART_IER_THRI);
}

View file

@ -56,7 +56,6 @@ static struct plat_serial8250_port au1x00_data[] = {
#elif defined(CONFIG_SOC_AU1550)
PORT(UART0_ADDR, AU1550_UART0_INT),
PORT(UART1_ADDR, AU1550_UART1_INT),
PORT(UART2_ADDR, AU1550_UART2_INT),
PORT(UART3_ADDR, AU1550_UART3_INT),
#elif defined(CONFIG_SOC_AU1200)
PORT(UART0_ADDR, AU1200_UART0_INT),

View file

@ -1882,6 +1882,10 @@ static struct pci_device_id serial_pci_tbl[] = {
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4, 0, 0,
pbn_b0_4_1843200 },
{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
PCI_VENDOR_ID_AFAVLAB,
PCI_SUBDEVICE_ID_AFAVLAB_P061, 0, 0,
pbn_b0_4_1152000 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232, 0, 0,

View file

@ -561,7 +561,7 @@ static struct uart_amba_port amba_ports[UART_NR] = {
.port = {
.membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE),
.mapbase = INTEGRATOR_UART0_BASE,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UARTINT0,
.uartclk = 14745600,
.fifosize = 16,
@ -576,7 +576,7 @@ static struct uart_amba_port amba_ports[UART_NR] = {
.port = {
.membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE),
.mapbase = INTEGRATOR_UART1_BASE,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UARTINT1,
.uartclk = 14745600,
.fifosize = 16,

View file

@ -892,7 +892,7 @@ serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res
int ret = 0;
switch (up->port.iotype) {
case SERIAL_IO_MEM:
case UPIO_MEM:
if (up->port.mapbase) {
*res = request_mem_region(up->port.mapbase, size, "serial");
if (!*res)
@ -900,8 +900,8 @@ serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res
}
break;
case SERIAL_IO_HUB6:
case SERIAL_IO_PORT:
case UPIO_HUB6:
case UPIO_PORT:
*res = request_region(up->port.iobase, size, "serial");
if (!*res)
ret = -EBUSY;
@ -919,7 +919,7 @@ static void serial8250_release_port(struct uart_port *port)
size <<= up->port.regshift;
switch (up->port.iotype) {
case SERIAL_IO_MEM:
case UPIO_MEM:
if (up->port.mapbase) {
/*
* Unmap the area.
@ -935,8 +935,8 @@ static void serial8250_release_port(struct uart_port *port)
}
break;
case SERIAL_IO_HUB6:
case SERIAL_IO_PORT:
case UPIO_HUB6:
case UPIO_PORT:
start = up->port.iobase;
if (size)

View file

@ -252,12 +252,9 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs)
/* If we have not enough room in tty flip buffer, then we try
* later, which will be the next rx-interrupt or a timeout
*/
if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) {
tty->flip.work.func((void *)tty);
if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) {
printk(KERN_WARNING "TTY_DONT_FLIP set\n");
return;
}
if(tty_buffer_request_room(tty, i) < i) {
printk(KERN_WARNING "No room in flip buffer\n");
return;
}
/* get pointer */
@ -276,9 +273,7 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs)
continue;
error_return:
*tty->flip.char_buf_ptr++ = ch;
*tty->flip.flag_buf_ptr++ = flg;
tty->flip.count++;
tty_insert_flip_char(tty, ch, flg);
} /* End while (i--) */
@ -908,7 +903,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SMC1_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.flags = FLAG_SMC,
@ -922,7 +917,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SMC2_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.flags = FLAG_SMC,
@ -939,7 +934,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC1_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,
@ -953,7 +948,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC2_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,
@ -967,7 +962,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC3_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,
@ -981,7 +976,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC4_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,

View file

@ -262,6 +262,7 @@ static inline void dz_receive_chars(struct dz_port *dport)
}
tty_insert_flip_char(tty, ch, flag);
ignore_char:
;
} while (status & DZ_DVAL);
if (tty)
@ -650,7 +651,7 @@ static void __init dz_init_ports(void)
for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
spin_lock_init(&dport->port.lock);
dport->port.membase = (char *) base;
dport->port.iotype = SERIAL_IO_PORT;
dport->port.iotype = UPIO_PORT;
dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
dport->port.line = i;
dport->port.fifosize = 1;

View file

@ -668,7 +668,7 @@ static struct imx_port imx_ports[] = {
.rtsirq = UART1_MINT_RTS,
.port = {
.type = PORT_IMX,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.membase = (void *)IMX_UART1_BASE,
.mapbase = IMX_UART1_BASE, /* FIXME */
.irq = UART1_MINT_RX,
@ -684,7 +684,7 @@ static struct imx_port imx_ports[] = {
.rtsirq = UART2_MINT_RTS,
.port = {
.type = PORT_IMX,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.membase = (void *)IMX_UART2_BASE,
.mapbase = IMX_UART2_BASE, /* FIXME */
.irq = UART2_MINT_RX,

View file

@ -215,7 +215,7 @@ static void __load_zsregs(struct zilog_channel *channel, unsigned char *regs)
/* Lower and upper byte of baud rate generator divisor. */
write_zsreg(channel, R12, regs[R12]);
write_zsreg(channel, R13, regs[R13]);
/* Now rewrite R14, with BRENAB (if set). */
write_zsreg(channel, R14, regs[R14]);
@ -571,7 +571,7 @@ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl)
else
clear_bits |= DTR;
/* NOTE: Not subject to 'transmitter active' rule. */
/* NOTE: Not subject to 'transmitter active' rule. */
up->curregs[R5] |= set_bits;
up->curregs[R5] &= ~clear_bits;
write_zsreg(channel, R5, up->curregs[R5]);
@ -654,7 +654,7 @@ static void ip22zilog_enable_ms(struct uart_port *port)
if (new_reg != up->curregs[R15]) {
up->curregs[R15] = new_reg;
/* NOTE: Not subject to 'transmitter active' rule. */
/* NOTE: Not subject to 'transmitter active' rule. */
write_zsreg(channel, R15, up->curregs[R15]);
}
}
@ -680,7 +680,7 @@ static void ip22zilog_break_ctl(struct uart_port *port, int break_state)
if (new_reg != up->curregs[R5]) {
up->curregs[R5] = new_reg;
/* NOTE: Not subject to 'transmitter active' rule. */
/* NOTE: Not subject to 'transmitter active' rule. */
write_zsreg(channel, R5, up->curregs[R5]);
}

View file

@ -80,7 +80,7 @@
#include <asm/serial.h>
/* Standard COM flags */
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
/*
* SERIAL_PORT_DFNS tells us about built-in ports that have no

View file

@ -462,7 +462,7 @@ static int __init mux_probe(struct parisc_device *dev)
port->mapbase = dev->hpa.start + MUX_OFFSET +
(i * MUX_LINE_OFFSET);
port->membase = ioremap(port->mapbase, MUX_LINE_OFFSET);
port->iotype = SERIAL_IO_MEM;
port->iotype = UPIO_MEM;
port->type = PORT_MUX;
port->irq = NO_IRQ;
port->uartclk = 0;

View file

@ -1492,7 +1492,7 @@ no_dma:
/*
* Init remaining bits of "port" structure
*/
uap->port.iotype = SERIAL_IO_MEM;
uap->port.iotype = UPIO_MEM;
uap->port.irq = np->intrs[0].line;
uap->port.uartclk = ZS_CLOCK;
uap->port.fifosize = 1;

View file

@ -628,7 +628,7 @@ static void __init sa1100_init_ports(void)
sa1100_ports[i].port.ops = &sa1100_pops;
sa1100_ports[i].port.fifosize = 8;
sa1100_ports[i].port.line = i;
sa1100_ports[i].port.iotype = SERIAL_IO_MEM;
sa1100_ports[i].port.iotype = UPIO_MEM;
init_timer(&sa1100_ports[i].timer);
sa1100_ports[i].timer.function = sa1100_timeout;
sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];

View file

@ -501,7 +501,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.port = {
.membase = (void*) io_p2v (UART1_PHYS),
.mapbase = UART1_PHYS,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UART1INTR,
.uartclk = 14745600/2,
.fifosize = 16,
@ -514,7 +514,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.port = {
.membase = (void*) io_p2v (UART2_PHYS),
.mapbase = UART2_PHYS,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UART2INTR,
.uartclk = 14745600/2,
.fifosize = 16,
@ -527,7 +527,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.port = {
.membase = (void*) io_p2v (UART3_PHYS),
.mapbase = UART3_PHYS,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UART3INTR,
.uartclk = 14745600/2,
.fifosize = 16,

View file

@ -1468,10 +1468,10 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xff923000,
.mapbase = 0xff923000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 61,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
@ -1482,10 +1482,10 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xff924000,
.mapbase = 0xff924000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 62,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
@ -1496,10 +1496,10 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xff925000,
.mapbase = 0xff925000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 63,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
.type = PORT_SCIF,
@ -1511,10 +1511,10 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xffe00000,
.mapbase = 0xffe00000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
@ -1525,10 +1525,10 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xffe10000,
.mapbase = 0xffe10000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 79,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,

View file

@ -1036,7 +1036,7 @@ static void __init sab_attach_callback(struct linux_ebus_device *edev, void *arg
up->port.irq = edev->irqs[0];
up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
up->port.mapbase = (unsigned long)up->regs;
up->port.iotype = SERIAL_IO_MEM;
up->port.iotype = UPIO_MEM;
writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc);

View file

@ -109,11 +109,11 @@ static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
offset <<= up->port.regshift;
switch (up->port.iotype) {
case SERIAL_IO_HUB6:
case UPIO_HUB6:
outb(up->port.hub6 - 1 + offset, up->port.iobase);
return inb(up->port.iobase + 1);
case SERIAL_IO_MEM:
case UPIO_MEM:
return readb(up->port.membase + offset);
default:
@ -139,12 +139,12 @@ serial_out(struct uart_sunsu_port *up, int offset, int value)
offset <<= up->port.regshift;
switch (up->port.iotype) {
case SERIAL_IO_HUB6:
case UPIO_HUB6:
outb(up->port.hub6 - 1 + offset, up->port.iobase);
outb(value, up->port.iobase + 1);
break;
case SERIAL_IO_MEM:
case UPIO_MEM:
writeb(value, up->port.membase + offset);
break;
@ -1052,7 +1052,7 @@ static void sunsu_autoconfig(struct uart_sunsu_port *up)
return;
up->type_probed = PORT_UNKNOWN;
up->port.iotype = SERIAL_IO_MEM;
up->port.iotype = UPIO_MEM;
/*
* First we look for Ebus-bases su's

View file

@ -1487,7 +1487,7 @@ static void __init sunzilog_prepare(void)
up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB;
/* Channel A */
up[(chip * 2) + 0].port.iotype = SERIAL_IO_MEM;
up[(chip * 2) + 0].port.iotype = UPIO_MEM;
up[(chip * 2) + 0].port.irq = zilog_irq;
up[(chip * 2) + 0].port.uartclk = ZS_CLOCK;
up[(chip * 2) + 0].port.fifosize = 1;
@ -1498,7 +1498,7 @@ static void __init sunzilog_prepare(void)
up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A;
/* Channel B */
up[(chip * 2) + 1].port.iotype = SERIAL_IO_MEM;
up[(chip * 2) + 1].port.iotype = UPIO_MEM;
up[(chip * 2) + 1].port.irq = zilog_irq;
up[(chip * 2) + 1].port.uartclk = ZS_CLOCK;
up[(chip * 2) + 1].port.fifosize = 1;

View file

@ -496,7 +496,7 @@ static int __init v850e_uart_init (void)
port->ops = &v850e_uart_ops;
port->line = chan;
port->iotype = SERIAL_IO_MEM;
port->iotype = UPIO_MEM;
port->flags = UPF_BOOT_AUTOCONF;
/* We actually use multiple IRQs, but the serial