From 18f7fea4d03784ccde7cf3a46904cd760799e764 Mon Sep 17 00:00:00 2001 From: Ashok Vuyyuru Date: Wed, 25 Jan 2023 20:32:07 +0530 Subject: [PATCH] msm: ipa3: Changes to fix memory leak issue During adding/deleting header rule found invalid entry not freeing the header proc memory allocation due to that IPA context bank page table was full, later it was failed to map pages. To avoid this issue adding change to free the memory in failed scenarios. Change-Id: I8e5fd68d35579b4638e91590f5df876aa9d256a6 Signed-off-by: Ashok Vuyyuru --- drivers/platform/msm/ipa/ipa_v3/ipa_hdr.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_hdr.c b/drivers/platform/msm/ipa/ipa_v3/ipa_hdr.c index b90ce38b505c..a3f090def566 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_hdr.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_hdr.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "ipa_i.h" @@ -94,8 +95,10 @@ static int ipa3_hdr_proc_ctx_to_hw_format(struct ipa_mem_buffer *mem, if (unlikely(!entry->hdr || !entry->hdr->offset_entry || !entry->offset_entry || entry->hdr->hdr_len == 0 || - entry->hdr->hdr_len > ipa_hdr_bin_sz[IPA_HDR_BIN_MAX - 1])) + entry->hdr->hdr_len > ipa_hdr_bin_sz[IPA_HDR_BIN_MAX - 1])) { + IPAERR_RL("Found invalid hdr entry\n"); return -EINVAL; + } ret = ipahal_cp_proc_ctx_to_hw_buff(entry->type, mem->base, entry->offset_entry->offset, @@ -128,6 +131,7 @@ static int ipa3_generate_hdr_proc_ctx_hw_tbl(u64 hdr_sys_addr, { u64 hdr_base_addr; gfp_t flag = GFP_KERNEL; + int ret; mem->size = (ipa3_ctx->hdr_proc_ctx_tbl.end) ? : 4; @@ -156,7 +160,12 @@ alloc: memset(aligned_mem->base, 0, aligned_mem->size); hdr_base_addr = (ipa3_ctx->hdr_tbl_lcl) ? IPA_MEM_PART(apps_hdr_ofst) : hdr_sys_addr; - return ipa3_hdr_proc_ctx_to_hw_format(aligned_mem, hdr_base_addr); + ret = ipa3_hdr_proc_ctx_to_hw_format(aligned_mem, hdr_base_addr); + if (ret) { + dma_free_coherent(ipa3_ctx->pdev, mem->size, mem->base, mem->phys_base); + return ret; + } + return ret; } /**