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ASoC: cs35l41: Regmap Updates

Browse source 
Corrected or removed various register defaults
and added GPIO status as volatile.

Change-Id: I9e0eabed1864a56f4a3645a569f6914200ef0761
Signed-off-by: David Rhodes <david.rhodes@cirrus.com>
Signed-off-by: Ravi Vembu <raviv@motorola.com>
Mot-CRs-Fixed: (CR)
Reviewed-on: https://gerrit.mot.com/1202251
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Submit-Approved: Jira Key
This commit is contained in:
David Rhodes 2018-05-30 12:40:34 -05:00 • committed by Ravikumar Vembu
commit 191c7d0a88
2 changed files with 6 additions and 9 deletions
Download patch file Download diff file Expand all files Collapse all files

13
sound/soc/codecs/cs35l41-tables.c
View file

@ -17,9 +17,7 @@
const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG] = {
{CS35L41_TEST_KEY_CTL, 0x00000000},
{CS35L41_USER_KEY_CTL, 0x00000000},
{CS35L41_OTP_MEM0, 0x00000000},
{CS35L41_OTP_MEM31, 0x00000000},
{CS35L41_OTP_CTRL0, 0x00006419},
{CS35L41_OTP_CTRL0, 0x00006418},
{CS35L41_OTP_CTRL1, 0x00000000},
{CS35L41_OTP_CTRL3, 0x00000000},
{CS35L41_OTP_CTRL4, 0x00000000},
@ -28,8 +26,7 @@ const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG] = {
{CS35L41_OTP_CTRL7, 0x00000000},
{CS35L41_OTP_CTRL8, 0x00000000},
{CS35L41_PWR_CTRL1, 0x00000000},
{CS35L41_PWR_CTRL2, 0x00003321},
{CS35L41_PWR_CTRL3, 0x01000011},
{CS35L41_PWR_CTRL3, 0x01000010},
{CS35L41_CTRL_OVRRIDE, 0x00000002},
{CS35L41_AMP_OUT_MUTE, 0x00000000},
{CS35L41_PROTECT_REL_ERR_IGN, 0x00000000},
@ -39,7 +36,7 @@ const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG] = {
{CS35L41_DSP_CLK_CTRL, 0x00000003},
{CS35L41_GLOBAL_CLK_CTRL, 0x00000003},
{CS35L41_DATA_FS_SEL, 0x00000000},
{CS35L41_MDSYNC_EN, 0x00000000},
{CS35L41_MDSYNC_EN, 0x00000200},
{CS35L41_MDSYNC_TX_ID, 0x00000000},
{CS35L41_MDSYNC_PWR_CTRL, 0x00000002},
{CS35L41_MDSYNC_DATA_TX, 0x00000000},
@ -65,7 +62,7 @@ const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG] = {
{CS35L41_DTEMP_EN, 0x00000000},
{CS35L41_VPVBST_FS_SEL, 0x00000001},
{CS35L41_SP_ENABLES, 0x00000000},
{CS35L41_SP_RATE_CTRL, 0x01000028},
{CS35L41_SP_RATE_CTRL, 0x00000028},
{CS35L41_SP_FORMAT, 0x18180200},
{CS35L41_SP_HIZ_CTRL, 0x00000002},
{CS35L41_SP_FRAME_TX_SLOT, 0x03020100},
@ -100,7 +97,6 @@ const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG] = {
{CS35L41_NG_CFG, 0x00000033},
{CS35L41_AMP_GAIN_CTRL, 0x00000273},
{CS35L41_DAC_MSM_CFG, 0x00580000},
{CS35L41_GPIO_STATUS1, 0x00000000},
{CS35L41_GPIO1_CTRL1, 0xE1000001},
{CS35L41_GPIO2_CTRL1, 0xE1000001},
{CS35L41_MIXER_NGATE_CFG, 0x00000000},
@ -657,6 +653,7 @@ bool cs35l41_volatile_reg(struct device *dev, unsigned int reg)
case CS35L41_IRQ2_POL3:
case CS35L41_IRQ2_POL4:
case CS35L41_IRQ2_DB3:
case CS35L41_GPIO_STATUS1:
case CS35L41_DSP1_XMEM_PACK_0 ... CS35L41_DSP1_XMEM_PACK_3068:
case CS35L41_DSP1_XMEM_UNPACK32_0 ... CS35L41_DSP1_XMEM_UNPACK32_2046:
case CS35L41_DSP1_XMEM_UNPACK24_0 ... CS35L41_DSP1_XMEM_UNPACK24_4093:

2
sound/soc/codecs/cs35l41.h
View file

@ -533,7 +533,7 @@
#define CS35L41_OTP_TRIM_35 0x0000400C
#define CS35L41_OTP_TRIM_36 0x00002030
#define CS35L41_MAX_CACHE_REG 0x0000006F
#define CS35L41_MAX_CACHE_REG 0x0000006B
#define CS35L41_OTP_SIZE_WORDS 32
#define CS35L41_NUM_OTP_ELEM 100
#define CS35L41_NUM_OTP_MAPS 4