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ARM: dts: imx27-phytec-phycore-som: Fix active level for FEC reset

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FEC reset GPIO is active low. Fix this typo.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This commit is contained in:
Alexander Shiyan 2014-04-26 08:52:07 +04:00 • committed by Shawn Guo
commit 198e31d08b
1 changed files with 1 additions and 1 deletions
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arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
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@ -182,7 +182,7 @@
&fec {
phy-mode = "mii";
phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
phy-supply = <&reg_3v3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;