diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 1beb2f3e51f6..d02ce95edb17 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1640,14 +1640,16 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx, reg |= FIELD_PREP(SCTLR_SHCFG, SCTLR_SHCFG_NSH); } - if (attributes && test_bit(DOMAIN_ATTR_CB_STALL_DISABLE, attributes)) { - reg &= ~SCTLR_CFCFG; - reg |= SCTLR_HUPCF; - } - - if (attributes && test_bit(DOMAIN_ATTR_NO_CFRE, attributes)) + if (attributes && test_bit(DOMAIN_ATTR_FAULT_MODEL_NO_CFRE, attributes)) reg &= ~SCTLR_CFRE; + if (attributes && test_bit(DOMAIN_ATTR_FAULT_MODEL_NO_STALL, + attributes)) + reg &= ~SCTLR_CFCFG; + + if (attributes && test_bit(DOMAIN_ATTR_FAULT_MODEL_HUPCF, attributes)) + reg |= SCTLR_HUPCF; + if (!attributes || (!test_bit(DOMAIN_ATTR_S1_BYPASS, attributes) && !test_bit(DOMAIN_ATTR_EARLY_MAP, attributes)) || !stage1) reg |= SCTLR_M; @@ -2744,16 +2746,20 @@ static int arm_smmu_setup_default_domain(struct device *dev, if (of_property_match_string(np, "qcom,iommu-faults", "stall-disable") >= 0) __arm_smmu_domain_set_attr(domain, - DOMAIN_ATTR_CB_STALL_DISABLE, &attr); + DOMAIN_ATTR_FAULT_MODEL_NO_STALL, &attr); + + if (of_property_match_string(np, "qcom,iommu-faults", "no-CFRE") >= 0) + __arm_smmu_domain_set_attr( + domain, DOMAIN_ATTR_FAULT_MODEL_NO_CFRE, &attr); + + if (of_property_match_string(np, "qcom,iommu-faults", "HUPCF") >= 0) + __arm_smmu_domain_set_attr( + domain, DOMAIN_ATTR_FAULT_MODEL_HUPCF, &attr); if (of_property_match_string(np, "qcom,iommu-faults", "non-fatal") >= 0) __arm_smmu_domain_set_attr(domain, DOMAIN_ATTR_NON_FATAL_FAULTS, &attr); - if (of_property_match_string(np, "qcom,iommu-faults", "no-CFRE") >= 0) - __arm_smmu_domain_set_attr( - domain, DOMAIN_ATTR_NO_CFRE, &attr); - /* Default value: disabled */ ret = of_property_read_u32(np, "qcom,iommu-vmid", &val); if (!ret) { @@ -3617,14 +3623,10 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, smmu_domain->attributes); ret = 0; break; - case DOMAIN_ATTR_CB_STALL_DISABLE: - *((int *)data) = test_bit(DOMAIN_ATTR_CB_STALL_DISABLE, - smmu_domain->attributes); - ret = 0; - break; - case DOMAIN_ATTR_NO_CFRE: - *((int *)data) = test_bit(DOMAIN_ATTR_NO_CFRE, - smmu_domain->attributes); + case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE: + case DOMAIN_ATTR_FAULT_MODEL_NO_STALL: + case DOMAIN_ATTR_FAULT_MODEL_HUPCF: + *((int *)data) = test_bit(attr, smmu_domain->attributes); ret = 0; break; case DOMAIN_ATTR_SPLIT_TABLES: @@ -3838,8 +3840,9 @@ static int __arm_smmu_domain_set_attr2(struct iommu_domain *domain, } break; } - case DOMAIN_ATTR_CB_STALL_DISABLE: - case DOMAIN_ATTR_NO_CFRE: + case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE: + case DOMAIN_ATTR_FAULT_MODEL_NO_STALL: + case DOMAIN_ATTR_FAULT_MODEL_HUPCF: if (*((int *)data)) set_bit(attr, smmu_domain->attributes); ret = 0; diff --git a/drivers/iommu/iommu-debug.c b/drivers/iommu/iommu-debug.c index 1e107323f9d6..dd1932f530d5 100644 --- a/drivers/iommu/iommu-debug.c +++ b/drivers/iommu/iommu-debug.c @@ -82,10 +82,14 @@ static const char *iommu_debug_attr_to_string(enum iommu_attr attr) return "DOMAIN_ATTR_FAST"; case DOMAIN_ATTR_EARLY_MAP: return "DOMAIN_ATTR_EARLY_MAP"; - case DOMAIN_ATTR_CB_STALL_DISABLE: - return "DOMAIN_ATTR_CB_STALL_DISABLE"; case DOMAIN_ATTR_SPLIT_TABLES: return "DOMAIN_ATTR_SPLIT_TABLES"; + case DOMAIN_ATTR_FAULT_MODEL_NO_CFRE: + return "DOMAIN_ATTR_FAULT_MODEL_NO_CFRE"; + case DOMAIN_ATTR_FAULT_MODEL_NO_STALL: + return "DOMAIN_ATTR_FAULT_MODEL_NO_STALL"; + case DOMAIN_ATTR_FAULT_MODEL_HUPCF: + return "DOMAIN_ATTR_FAULT_MODEL_HUPCF"; default: return "Unknown attr!"; } diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 868a8f398971..adbf54c068f2 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -186,11 +186,12 @@ enum iommu_attr { #define DOMAIN_ATTR_PAGE_TABLE_IS_COHERENT (EXTENDED_ATTR_BASE + 14) #define DOMAIN_ATTR_PAGE_TABLE_FORCE_COHERENT (EXTENDED_ATTR_BASE + 15) #define DOMAIN_ATTR_PAGE_TABLE_FORCE_NON_COHERENT (EXTENDED_ATTR_BASE + 16) -#define DOMAIN_ATTR_CB_STALL_DISABLE (EXTENDED_ATTR_BASE + 17) -#define DOMAIN_ATTR_USE_LLC_NWA (EXTENDED_ATTR_BASE + 18) -#define DOMAIN_ATTR_NO_CFRE (EXTENDED_ATTR_BASE + 19) -#define DOMAIN_ATTR_SPLIT_TABLES (EXTENDED_ATTR_BASE + 20) -#define DOMAIN_ATTR_EXTENDED_MAX (EXTENDED_ATTR_BASE + 21) +#define DOMAIN_ATTR_USE_LLC_NWA (EXTENDED_ATTR_BASE + 17) +#define DOMAIN_ATTR_SPLIT_TABLES (EXTENDED_ATTR_BASE + 18) +#define DOMAIN_ATTR_FAULT_MODEL_NO_CFRE (EXTENDED_ATTR_BASE + 19) +#define DOMAIN_ATTR_FAULT_MODEL_NO_STALL (EXTENDED_ATTR_BASE + 20) +#define DOMAIN_ATTR_FAULT_MODEL_HUPCF (EXTENDED_ATTR_BASE + 21) +#define DOMAIN_ATTR_EXTENDED_MAX (EXTENDED_ATTR_BASE + 22) /* These are the possible reserved region types */ enum iommu_resv_type {