mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-14 08:36:12 -04:00
dts/panel: rhodep: modify tianma nt37701 v2 panel od code
modify tianma nt37701 v2 panel od code for rhodep Change-Id: I95b9e353d127dfd2b44ddf5c10104baf3035c5d4 Signed-off-by: houdz1 <houdz1@lenovo.com> Reviewed-on: https://gerrit.mot.com/2174161 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Guobin Zhang <zhanggb@motorola.com> Submit-Approved: Jira Key
This commit is contained in:
parent
4f8e563c8e
commit
19f8f49e6c
1 changed files with 26 additions and 36 deletions
|
|
@ -123,7 +123,6 @@ qcom,mdss-dsi-display-timings {
|
|||
15 01 00 00 14 00 02 2F 08 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
|
||||
// FFD2.0 RGB OFS CTRL
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 00 00 00 00 00 06 E1 00 03 03 03 00
|
||||
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 14 E3 C0 6B 03 A8 33 33 32 02 10 00 40 00 00 04 00 04 00 00 B8
|
||||
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
|
@ -195,7 +194,6 @@ qcom,mdss-dsi-display-timings {
|
|||
15 01 00 00 00 00 02 2F 08 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
|
||||
// FFD2.0 RGB OFS CTRL
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 00 00 00 00 00 06 E1 00 03 03 03 00
|
||||
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 14 E3 C0 6B 03 A8 33 33 32 02 10 00 40 00 00 04 00 04 00 00 B8
|
||||
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
|
@ -215,8 +213,8 @@ qcom,mdss-dsi-display-timings {
|
|||
39 00 00 00 00 00 1C CE 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
||||
05 01 00 00 78 00 01 11
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
15 00 00 00 00 00 02 E1 A1
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 01 00 00 00 00 02 E1 A1
|
||||
05 01 00 00 00 00 01 29]; /* display on */
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 00 00 01 28 /* display_off */
|
||||
|
|
@ -260,7 +258,6 @@ qcom,mdss-dsi-display-timings {
|
|||
15 01 00 00 10 00 02 2F 03 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
|
||||
// FFD2.0 RGB OFS CTRL
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 00 00 00 00 00 06 E1 00 03 03 03 00
|
||||
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 14 E3 C0 6B 03 A8 33 33 32 02 10 00 40 00 00 04 00 04 00 00 B8
|
||||
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
|
@ -332,7 +329,6 @@ qcom,mdss-dsi-display-timings {
|
|||
15 01 00 00 00 00 02 2F 03 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
|
||||
// FFD2.0 RGB OFS CTRL
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 00 00 00 00 00 06 E1 00 03 03 03 00
|
||||
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 14 E3 C0 6B 03 A8 33 33 32 02 10 00 40 00 00 04 00 04 00 00 B8
|
||||
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
|
@ -352,8 +348,8 @@ qcom,mdss-dsi-display-timings {
|
|||
39 01 00 00 00 00 1C CE 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
||||
05 01 00 00 78 00 01 11
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
15 00 00 00 00 00 02 E1 A1
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 01 00 00 00 00 02 E1 A1
|
||||
05 01 00 00 00 00 01 29]; /* display on */
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 00 00 01 28 /* display_off */
|
||||
|
|
@ -396,7 +392,6 @@ qcom,mdss-dsi-display-timings {
|
|||
qcom,mdss-dsi-timing-switch-command = [
|
||||
15 01 00 00 0b 00 02 2F 07 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 00 00 00 00 00 06 E1 00 03 03 03 00
|
||||
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 14 E3 C0 6B 03 A8 33 33 32 02 10 00 40 00 00 04 00 04 00 00 B8
|
||||
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
|
@ -467,7 +462,6 @@ qcom,mdss-dsi-display-timings {
|
|||
|
||||
15 01 00 00 00 00 02 2F 07 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 00 00 00 00 00 06 E1 00 03 03 03 00
|
||||
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 14 E3 C0 6B 03 A8 33 33 32 02 10 00 40 00 00 04 00 04 00 00 B8
|
||||
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
|
@ -487,8 +481,8 @@ qcom,mdss-dsi-display-timings {
|
|||
39 00 00 00 00 00 1C CE 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
||||
05 01 00 00 78 00 01 11
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
15 00 00 00 00 00 02 E1 A1
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 01 00 00 00 00 02 E1 A1
|
||||
05 01 00 00 00 00 01 29]; /* display on */
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 00 00 01 28 /* display_off */
|
||||
|
|
@ -532,7 +526,6 @@ qcom,mdss-dsi-display-timings {
|
|||
15 01 00 00 08 00 02 2F 02 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
|
||||
// FFD2.0 RGB OFS CTRL
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 00 00 00 00 00 06 E1 00 03 03 03 00
|
||||
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 14 E3 C0 6B 03 A8 33 33 32 02 10 00 40 00 00 04 00 04 00 00 B8
|
||||
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
|
@ -540,15 +533,15 @@ qcom,mdss-dsi-display-timings {
|
|||
39 00 00 00 00 00 13 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 13 E7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
//FFD SPR Pixel Type Setting
|
||||
15 00 00 00 06 00 02 6F 04
|
||||
15 00 00 00 06 00 02 C1 00
|
||||
15 00 00 00 00 00 02 6F 04
|
||||
15 00 00 00 00 00 02 C1 00
|
||||
//FFD RAM Setting, RAMOFF_IDLE_DMR
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 00
|
||||
39 00 00 00 00 00 04 C0 0E B3 20
|
||||
//ODS part
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
15 00 00 00 06 00 02 6F 03
|
||||
15 00 00 00 06 00 02 C1 03
|
||||
15 00 00 00 00 00 02 6F 03
|
||||
15 00 00 00 00 00 02 C1 03
|
||||
39 01 00 00 00 00 1C CE 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
|
|
@ -604,7 +597,6 @@ qcom,mdss-dsi-display-timings {
|
|||
15 01 00 00 00 00 02 2F 02 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
|
||||
// FFD2.0 RGB OFS CTRL
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 00 00 00 00 00 06 E1 00 03 03 03 00
|
||||
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 14 E3 C0 6B 03 A8 33 33 32 02 10 00 40 00 00 04 00 04 00 00 B8
|
||||
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
|
@ -612,20 +604,20 @@ qcom,mdss-dsi-display-timings {
|
|||
39 00 00 00 00 00 13 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 13 E7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
//FFD SPR Pixel Type Setting
|
||||
15 00 00 00 06 00 02 6F 04
|
||||
15 00 00 00 06 00 02 C1 00
|
||||
15 00 00 00 00 00 02 6F 04
|
||||
15 00 00 00 00 00 02 C1 00
|
||||
//FFD RAM Setting, RAMOFF_IDLE_DMR
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 00
|
||||
39 00 00 00 00 00 04 C0 0E B3 20
|
||||
//ODS part
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
15 00 00 00 06 00 02 6F 03
|
||||
15 00 00 00 06 00 02 C1 03
|
||||
15 00 00 00 00 00 02 6F 03
|
||||
15 00 00 00 00 00 02 C1 03
|
||||
39 01 00 00 00 00 1C CE 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
||||
05 01 00 00 78 00 01 11
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
15 00 00 00 00 00 02 E1 A1
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 01 00 00 00 00 02 E1 A1
|
||||
05 01 00 00 00 00 01 29]; /* display on */
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 00 00 01 28 /* display_off */
|
||||
|
|
@ -669,7 +661,6 @@ qcom,mdss-dsi-display-timings {
|
|||
15 01 00 00 06 00 02 2F 04 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
|
||||
// FFD2.0 RGB OFS CTRL
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 00 00 00 00 00 06 E1 00 03 03 03 00
|
||||
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 14 E3 86 86 06 F8 54 34 33 12 01 11 51 00 00 03 00 04 40 00 BC
|
||||
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 00 00 00 00 00 00 05 00 00 00 00 00
|
||||
|
|
@ -677,15 +668,15 @@ qcom,mdss-dsi-display-timings {
|
|||
39 00 00 00 00 00 13 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 13 E7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
//FFD SPR Pixel Type Setting
|
||||
15 00 00 00 06 00 02 6F 04
|
||||
15 00 00 00 06 00 02 C1 00
|
||||
15 00 00 00 00 00 02 6F 04
|
||||
15 00 00 00 00 00 02 C1 00
|
||||
//FFD RAM Setting, RAMOFF_IDLE_DMR
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 00
|
||||
39 00 00 00 00 00 04 C0 0E B3 20
|
||||
//ODS part
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
15 00 00 00 06 00 02 6F 03
|
||||
15 00 00 00 06 00 02 C1 03
|
||||
15 00 00 00 00 00 02 6F 03
|
||||
15 00 00 00 00 00 02 C1 03
|
||||
39 01 00 00 00 00 1C CE 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00];
|
||||
|
||||
qcom,mdss-dsi-on-command = [
|
||||
|
|
@ -741,7 +732,6 @@ qcom,mdss-dsi-display-timings {
|
|||
15 01 00 00 00 00 02 2F 04 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
|
||||
// FFD2.0 RGB OFS CTRL
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 00 00 00 00 00 06 E1 00 03 03 03 00
|
||||
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 14 E3 86 86 06 F8 54 34 33 12 01 11 51 00 00 03 00 04 40 00 BC
|
||||
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 00 00 00 00 00 00 05 00 00 00 00 00
|
||||
|
|
@ -749,20 +739,20 @@ qcom,mdss-dsi-display-timings {
|
|||
39 00 00 00 00 00 13 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
39 00 00 00 00 00 13 E7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
//FFD SPR Pixel Type Setting
|
||||
15 00 00 00 06 00 02 6F 04
|
||||
15 00 00 00 06 00 02 C1 00
|
||||
15 00 00 00 00 00 02 6F 04
|
||||
15 00 00 00 00 00 02 C1 00
|
||||
//FFD RAM Setting, RAMOFF_IDLE_DMR
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 00
|
||||
39 00 00 00 00 00 04 C0 0E B3 20
|
||||
//ODS part
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
15 00 00 00 06 00 02 6F 03
|
||||
15 00 00 00 06 00 02 C1 03
|
||||
15 00 00 00 00 00 02 6F 03
|
||||
15 00 00 00 00 00 02 C1 03
|
||||
39 01 00 00 00 00 1C CE 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
||||
05 01 00 00 78 00 01 11
|
||||
39 00 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
15 00 00 00 00 00 02 E1 A1
|
||||
39 01 00 00 00 00 06 F0 55 AA 52 08 08
|
||||
39 01 00 00 00 00 02 E1 A1
|
||||
05 01 00 00 00 00 01 29]; // display on
|
||||
qcom,mdss-dsi-off-command = [
|
||||
05 01 00 00 00 00 01 28 // display_off
|
||||
|
|
|
|||
Loading…
Reference in a new issue