mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 10:41:38 -04:00
arm-soc: mvebu platform changes
This series contains changes for the Marvell EBU platforms (mvebu,
orion, kirkwood, dove) that were not part of the first set of pull
requests because of dependencies on the MMC tree, and being submitted
a little late.
Notable changes are:
* More devices get moved out of board files into device tree
descriptions. The remaining devices listed in there have patches
that will get sent for 3.10, after which we can remove a lot of the
board files entirely. We are doing the pinctrl and mmc drivers here,
ethernet and PCI still remain.
* SMP support for mvebu is improved with support for the
local interrupt controller.
* The Guruplug board file gets replaced with a DT description.
Unfortunately, the dependency on the MMC tree turned out to be a much
larger problem than expected, when the MMC maintainer rebased the patches
in his tree that all of the patches in this branch are based on, which
caused merge conflicts between the new and old versions of those patches.
To work around the merge conflicts, this branch rebases all patches
on top of the respective MMC patches that did get merged into 3.9.
The patches are all identical to the versions that were part of
linux-next, but have a new commit date.
Merge conflicts:
* in board-nsa310.c, the gpio.h inclusion was removed prematurely and
put back as a bug fix earlier. With this series it is really not needed
any more.
* The patch to add rtc support was already applied by Andrew Morton,
and conflicts with a second copy that was in this series, which adds
a lot of other devices to arch/arm/boot/dts/armada-370-xp.dtsi.
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Merge tag 'late-mvebu-rebased' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC mvebu platform changes from Olof Johansson:
"This series contains changes for the Marvell EBU platforms (mvebu,
orion, kirkwood, dove) that were not part of the first set of pull
requests because of dependencies on the MMC tree, and being submitted
a little late.
Notable changes are:
- More devices get moved out of board files into device tree
descriptions. The remaining devices listed in there have patches
that will get sent for 3.10, after which we can remove a lot of the
board files entirely. We are doing the pinctrl and mmc drivers
here, ethernet and PCI still remain.
- SMP support for mvebu is improved with support for the local
interrupt controller.
- The Guruplug board file gets replaced with a DT description.
Unfortunately, the dependency on the MMC tree turned out to be a much
larger problem than expected, when the MMC maintainer rebased the
patches in his tree that all of the patches in this branch are based
on, which caused merge conflicts between the new and old versions of
those patches.
To work around the merge conflicts, this branch rebases all patches on
top of the respective MMC patches that did get merged into 3.9. The
patches are all identical to the versions that were part of
linux-next, but have a new commit date."
* tag 'late-mvebu-rebased' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (90 commits)
arm: mvebu: enable the SD card slot on Armada 370 Reference Design board
ARM: kirkwood: topkick: init mvsdio via DT
ARM: kirkwood: nsa310: convert to pinctrl
ARM: Kirkwood: topkick: Enable i2c bus.
ARM: kirkwood: topkick: convert to pinctrl
ARM: dove: convert serial DT nodes to clocks property
arm: mvebu: Add SPI flash on Armada 370 DB board
arm: mvebu: Add SPI flash on Armada XP-DB board
arm: mvebu: Add SPI flash on Armada XP-GP board
arm: mvebu: Add support for SPI controller in Armada 370/XP
clocksource: update and move armada-370-xp-timer documentation to timer directory
arm: mvebu: update DT to support local timers
ARM: Dove: convert usb host controller to DT
arm: mvebu: Enable USB controllers on Armada 370/XP boards
arm: mvebu: Add support for USB host controllers in Armada 370/XP
arm: mvebu: add button for OpenBlocks AX3-4
ARM: Kirkwood: Convert NS2 to gpio-poweroff.
ARM: Kirkwood: Convert NSA310 I2C to device tree
ARM: Kirkwood: Convert NSA310 to use gpio-poweroff driver
ARM: Kirkwood: Convert NSA310 to DT based regulators.
...
This commit is contained in:
Linus Torvalds
commit
1a32c58bb9
44 changed files with 1314 additions and 371 deletions
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@ -27,8 +27,10 @@
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#include <linux/of_address.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <asm/sched_clock.h>
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#include <asm/sched_clock.h>
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#include <asm/localtimer.h>
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#include <linux/percpu.h>
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/*
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* Timer block registers.
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*/
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@ -49,6 +51,7 @@
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#define TIMER1_RELOAD_OFF 0x0018
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#define TIMER1_VAL_OFF 0x001c
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#define LCL_TIMER_EVENTS_STATUS 0x0028
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/* Global timers are connected to the coherency fabric clock, and the
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below divider reduces their incrementing frequency. */
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#define TIMER_DIVIDER_SHIFT 5
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@ -57,14 +60,17 @@
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/*
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* SoC-specific data.
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*/
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static void __iomem *timer_base;
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static int timer_irq;
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static void __iomem *timer_base, *local_base;
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static unsigned int timer_clk;
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static bool timer25Mhz = true;
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/*
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* Number of timer ticks per jiffy.
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*/
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static u32 ticks_per_jiffy;
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static struct clock_event_device __percpu **percpu_armada_370_xp_evt;
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static u32 notrace armada_370_xp_read_sched_clock(void)
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{
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return ~readl(timer_base + TIMER0_VAL_OFF);
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@ -78,24 +84,23 @@ armada_370_xp_clkevt_next_event(unsigned long delta,
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struct clock_event_device *dev)
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{
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u32 u;
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/*
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* Clear clockevent timer interrupt.
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*/
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writel(TIMER1_CLR_MASK, timer_base + TIMER_EVENTS_STATUS);
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writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
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/*
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* Setup new clockevent timer value.
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*/
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writel(delta, timer_base + TIMER1_VAL_OFF);
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writel(delta, local_base + TIMER0_VAL_OFF);
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/*
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* Enable the timer.
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*/
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u = readl(timer_base + TIMER_CTRL_OFF);
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u = ((u & ~TIMER1_RELOAD_EN) | TIMER1_EN |
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TIMER1_DIV(TIMER_DIVIDER_SHIFT));
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writel(u, timer_base + TIMER_CTRL_OFF);
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u = readl(local_base + TIMER_CTRL_OFF);
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u = ((u & ~TIMER0_RELOAD_EN) | TIMER0_EN |
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TIMER0_DIV(TIMER_DIVIDER_SHIFT));
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writel(u, local_base + TIMER_CTRL_OFF);
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return 0;
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}
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@ -107,37 +112,38 @@ armada_370_xp_clkevt_mode(enum clock_event_mode mode,
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u32 u;
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if (mode == CLOCK_EVT_MODE_PERIODIC) {
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/*
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* Setup timer to fire at 1/HZ intervals.
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*/
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writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
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writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
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writel(ticks_per_jiffy - 1, local_base + TIMER0_RELOAD_OFF);
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writel(ticks_per_jiffy - 1, local_base + TIMER0_VAL_OFF);
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/*
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* Enable timer.
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*/
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u = readl(timer_base + TIMER_CTRL_OFF);
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writel((u | TIMER1_EN | TIMER1_RELOAD_EN |
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TIMER1_DIV(TIMER_DIVIDER_SHIFT)),
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timer_base + TIMER_CTRL_OFF);
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u = readl(local_base + TIMER_CTRL_OFF);
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writel((u | TIMER0_EN | TIMER0_RELOAD_EN |
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TIMER0_DIV(TIMER_DIVIDER_SHIFT)),
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local_base + TIMER_CTRL_OFF);
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} else {
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/*
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* Disable timer.
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*/
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u = readl(timer_base + TIMER_CTRL_OFF);
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writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF);
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u = readl(local_base + TIMER_CTRL_OFF);
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writel(u & ~TIMER0_EN, local_base + TIMER_CTRL_OFF);
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/*
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* ACK pending timer interrupt.
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*/
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writel(TIMER1_CLR_MASK, timer_base + TIMER_EVENTS_STATUS);
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writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
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}
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}
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static struct clock_event_device armada_370_xp_clkevt = {
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.name = "armada_370_xp_tick",
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.name = "armada_370_xp_per_cpu_tick",
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.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
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.shift = 32,
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.rating = 300,
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@ -150,32 +156,78 @@ static irqreturn_t armada_370_xp_timer_interrupt(int irq, void *dev_id)
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/*
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* ACK timer interrupt and call event handler.
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*/
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struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
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writel(TIMER1_CLR_MASK, timer_base + TIMER_EVENTS_STATUS);
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armada_370_xp_clkevt.event_handler(&armada_370_xp_clkevt);
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writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static struct irqaction armada_370_xp_timer_irq = {
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.name = "armada_370_xp_tick",
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.flags = IRQF_DISABLED | IRQF_TIMER,
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.handler = armada_370_xp_timer_interrupt
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/*
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* Setup the local clock events for a CPU.
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*/
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static int __cpuinit armada_370_xp_timer_setup(struct clock_event_device *evt)
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{
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u32 u;
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int cpu = smp_processor_id();
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/* Use existing clock_event for cpu 0 */
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if (!smp_processor_id())
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return 0;
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u = readl(local_base + TIMER_CTRL_OFF);
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if (timer25Mhz)
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writel(u | TIMER0_25MHZ, local_base + TIMER_CTRL_OFF);
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else
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writel(u & ~TIMER0_25MHZ, local_base + TIMER_CTRL_OFF);
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evt->name = armada_370_xp_clkevt.name;
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evt->irq = armada_370_xp_clkevt.irq;
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evt->features = armada_370_xp_clkevt.features;
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evt->shift = armada_370_xp_clkevt.shift;
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evt->rating = armada_370_xp_clkevt.rating,
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evt->set_next_event = armada_370_xp_clkevt_next_event,
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evt->set_mode = armada_370_xp_clkevt_mode,
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evt->cpumask = cpumask_of(cpu);
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*__this_cpu_ptr(percpu_armada_370_xp_evt) = evt;
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clockevents_config_and_register(evt, timer_clk, 1, 0xfffffffe);
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enable_percpu_irq(evt->irq, 0);
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return 0;
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}
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static void armada_370_xp_timer_stop(struct clock_event_device *evt)
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{
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evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
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disable_percpu_irq(evt->irq);
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}
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static struct local_timer_ops armada_370_xp_local_timer_ops __cpuinitdata = {
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.setup = armada_370_xp_timer_setup,
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.stop = armada_370_xp_timer_stop,
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};
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void __init armada_370_xp_timer_init(void)
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{
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u32 u;
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struct device_node *np;
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unsigned int timer_clk;
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int res;
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np = of_find_compatible_node(NULL, NULL, "marvell,armada-370-xp-timer");
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timer_base = of_iomap(np, 0);
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WARN_ON(!timer_base);
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local_base = of_iomap(np, 1);
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if (of_find_property(np, "marvell,timer-25Mhz", NULL)) {
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/* The fixed 25MHz timer is available so let's use it */
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u = readl(local_base + TIMER_CTRL_OFF);
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writel(u | TIMER0_25MHZ,
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local_base + TIMER_CTRL_OFF);
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u = readl(timer_base + TIMER_CTRL_OFF);
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writel(u | TIMER0_25MHZ | TIMER1_25MHZ,
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writel(u | TIMER0_25MHZ,
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timer_base + TIMER_CTRL_OFF);
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timer_clk = 25000000;
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} else {
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@ -183,15 +235,23 @@ void __init armada_370_xp_timer_init(void)
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struct clk *clk = of_clk_get(np, 0);
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WARN_ON(IS_ERR(clk));
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rate = clk_get_rate(clk);
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u = readl(local_base + TIMER_CTRL_OFF);
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writel(u & ~(TIMER0_25MHZ),
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local_base + TIMER_CTRL_OFF);
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u = readl(timer_base + TIMER_CTRL_OFF);
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writel(u & ~(TIMER0_25MHZ | TIMER1_25MHZ),
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writel(u & ~(TIMER0_25MHZ),
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timer_base + TIMER_CTRL_OFF);
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timer_clk = rate / TIMER_DIVIDER;
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timer25Mhz = false;
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}
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/* We use timer 0 as clocksource, and timer 1 for
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clockevents */
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timer_irq = irq_of_parse_and_map(np, 1);
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/*
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* We use timer 0 as clocksource, and private(local) timer 0
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* for clockevents
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*/
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armada_370_xp_clkevt.irq = irq_of_parse_and_map(np, 4);
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ticks_per_jiffy = (timer_clk + HZ / 2) / HZ;
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@ -216,12 +276,26 @@ void __init armada_370_xp_timer_init(void)
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"armada_370_xp_clocksource",
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timer_clk, 300, 32, clocksource_mmio_readl_down);
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/*
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* Setup clockevent timer (interrupt-driven).
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*/
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setup_irq(timer_irq, &armada_370_xp_timer_irq);
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/* Register the clockevent on the private timer of CPU 0 */
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armada_370_xp_clkevt.cpumask = cpumask_of(0);
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clockevents_config_and_register(&armada_370_xp_clkevt,
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timer_clk, 1, 0xfffffffe);
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}
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percpu_armada_370_xp_evt = alloc_percpu(struct clock_event_device *);
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/*
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* Setup clockevent timer (interrupt-driven).
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*/
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*__this_cpu_ptr(percpu_armada_370_xp_evt) = &armada_370_xp_clkevt;
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res = request_percpu_irq(armada_370_xp_clkevt.irq,
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armada_370_xp_timer_interrupt,
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armada_370_xp_clkevt.name,
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percpu_armada_370_xp_evt);
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if (!res) {
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enable_percpu_irq(armada_370_xp_clkevt.irq, 0);
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#ifdef CONFIG_LOCAL_TIMERS
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local_timer_register(&armada_370_xp_local_timer_ops);
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#endif
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}
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}
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