From 1a54dadbe1b6a57b2be2fda2935f6f3056e6dcd7 Mon Sep 17 00:00:00 2001 From: Jigar Agrawal Date: Mon, 14 Sep 2020 18:13:00 -0700 Subject: [PATCH] dt-bindings: camera: Update dt-bindings for Waipio Update the binding for IFE, CSID, CDM, TPG, CSIPHY, ICP, CCI for Waipio. Also, add bindings for SFE for waipio. CRs-fixed: 2784041 Change-Id: Ia20dd4c458385edb446ba12b160b9577faa1c619 --- bindings/msm-cam-cci.txt | 19 ++- bindings/msm-cam-cdm.txt | 38 ++++-- bindings/msm-cam-csiphy.txt | 137 ++++++++++++------- bindings/msm-cam-icp.txt | 241 +++++++++++++++++++++------------- bindings/msm-cam-ife-csid.txt | 94 +++++++------ bindings/msm-cam-sfe.txt | 132 +++++++++++++++++++ bindings/msm-cam-tpg.txt | 87 ++++++------ bindings/msm-cam-vfe.txt | 102 +++++++------- 8 files changed, 571 insertions(+), 279 deletions(-) create mode 100644 bindings/msm-cam-sfe.txt diff --git a/bindings/msm-cam-cci.txt b/bindings/msm-cam-cci.txt index d353e8b0bfd2..a0686cf6aa9d 100644 --- a/bindings/msm-cam-cci.txt +++ b/bindings/msm-cam-cci.txt @@ -15,6 +15,11 @@ i2c communication. First Level Node - CCI device ====================================== +- cell-index: cci hardware core index + Usage: required + Value type: + Definition: Should specify the Hardware index id. + - compatible Usage: required Value type: @@ -22,11 +27,6 @@ First Level Node - CCI device In case of cci version 1.2, use "qcom,cci-v1.2". -- cell-index: cci hardware core index - Usage: required - Value type: - Definition: Should specify the Hardware index id. - - reg Usage: required Value type: @@ -40,16 +40,21 @@ First Level Node - CCI device Definition: Should specify relevant names to each reg property defined. -- interrupts +- reg-cam-base Usage: required Value type: - Definition: Interrupt associated with CCI HW. + Definition: List of bases. - interrupt-names Usage: required Value type: Definition: Name of the interrupt. +- interrupts + Usage: required + Value type: + Definition: Interrupt associated with CCI HW. + - gpios Usage: required Value type: diff --git a/bindings/msm-cam-cdm.txt b/bindings/msm-cam-cdm.txt index 783bc20bab53..9861be2f6c5b 100644 --- a/bindings/msm-cam-cdm.txt +++ b/bindings/msm-cam-cdm.txt @@ -57,13 +57,13 @@ to CDM interface node. Definition: Should be "qcom,cam170-cpas-cdm0", "qcom,cam480-cpas-cdm0", "qcom,cam480-cpas-cdm1", "qcom,cam480-cpas-cdm2", "qcom,cam-cpas-cdm1_0", "qcom,cam-cpas-cdm1_1", "qcom,cam-cpas-cdm1_2", "qcom,cam-ife-cdm1_2", - "qcom,cam-cpas-cdm2_0" or "qcom,cam-ope-cdm2_0", - "qcom,cam-cpas-cdm2_1" or "qcom,cam-ope-cdm2_1" + "qcom,cam-cpas-cdm2_0", "qcom,cam-ope-cdm2_0", "qcom,cam-cpas-cdm2_1", + "qcom,cam-rt-cdm2_1" or "qcom,cam-ope-cdm2_1" - label Usage: required Value type: - Definition: Should be "cpas-cdm". + Definition: Should be "cpas-cdm", "ife-cdm", or "rt-cdm". - reg-names Usage: required @@ -117,17 +117,34 @@ to CDM interface node. Value type: Definition: List of clocks rates. -- cdm-client-names - Usage: required - Value type: - Definition: List of Clients supported by CDM HW node. - - clock-cntl-level Usage: required Value type: Definition: List of strings corresponds clock-rates levels. Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo. +- cdm-client-names + Usage: required + Value type: + Definition: List of Clients supported by CDM HW node. + +- config-fifo + Usage: required + Value type: + Definition: Flag to let driver know whether to load fifo depths + from property fifo-depths or not. + +- fifo-depths + Usage: required + Value type: + Definition: List of fifo depths supported by device. + +- single-context-cdm + Usage: required + Value type: + Definition: Flag to indicate that the CDM is being used in single + context mode. + Example: qcom,cpas-cdm0@ac48000 { cell-index = <0>; @@ -152,7 +169,10 @@ Example: <&clock_camcc CAM_CC_CPAS_AHB_CLK>, <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>; qcom,clock-rates = <0 80000000 80000000 80000000 80000000 80000000>; - cdm-client-names = "ife"; clock-cntl-level = "turbo"; + cdm-client-names = "ife0"; + config-fifo; + fifo-depths = <64 0 0 0>; + single-context-cdm; status = "ok"; }; diff --git a/bindings/msm-cam-csiphy.txt b/bindings/msm-cam-csiphy.txt index 14b5052e075f..2ddc5e6a0b86 100644 --- a/bindings/msm-cam-csiphy.txt +++ b/bindings/msm-cam-csiphy.txt @@ -9,6 +9,10 @@ first level describe the overall CSIPHY node structure. ====================================== First Level Node - CSIPHY device ====================================== +- cell-index: csiphy hardware core index + Usage: required + Value type: + Definition: Should specify the Hardware index id. - compatible Usage: required @@ -19,11 +23,6 @@ First Level Node - CSIPHY device "qcom,csiphy-v1.2.3", "qcom,csiphy-v2.0.1", "qcom,csiphy-v2.1.0", "qcom,csiphy-v1.2.4", "qcom,csiphy-v1.2.5", "qcom,csiphy". -- cell-index: csiphy hardware core index - Usage: required - Value type: - Definition: Should specify the Hardware index id. - - reg Usage: required Value type: @@ -52,26 +51,6 @@ First Level Node - CSIPHY device Value type: Definition: Name of the interrupt. -- clock-names - Usage: required - Value type: - Definition: List of clock names required for CSIPHY HW. - -- clock-rates - Usage: required - Value type: - Definition: List of clock rates in Hz for CSIPHY HW. - -- clock-cntl-level - Usage: required - Value type: - Definition: All different clock level node can support. - -- clocks - Usage: required - Value type: - Definition: all clock phandle and source clocks. - - regulator-names Usage: required Value type: @@ -88,32 +67,96 @@ First Level Node - CSIPHY device Definition: should contain phandle for mipi-csi-vdd regulator used for CSIPHY device. +- csi-vdd-xxx-supply + Usage: required + Value type: + Definition: should contain phandles for csi-vdd-1p2 and csi-vdd-0p9 + regulators used for CSIPHY. + - csi-vdd-voltage Usage: required Value type: - Definition: should contain required voltage for csi-vdd supply for CSIPHY. + Definition: should contain required voltage for csi-vdd supply + for CSIPHY. + +- rgltr-cntrl-support + Usage: required + Value type: + Definition: Flag to indicate whether regulator control support is + enabled or not. + +- rgltr-min-voltage + Usage: required + Value type: + Definition: should contain required min voltage for gdsr, csi-vdd-1p2 + and csi-vdd-0p9 supply for CSIPHY. + +- rgltr-max-voltage + Usage: required + Value type: + Definition: should contain required max voltage for gdsr, csi-vdd-1p2 + and csi-vdd-0p9 supply for CSIPHY. + +- rgltr-load-current + Usage: required + Value type: + Definition: should contain peak current for gdsr, csi-vdd-1p2 + and csi-vdd-0p9 supply for CSIPHY. + +- clocks + Usage: required + Value type: + Definition: all clock phandle and source clocks. + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for CSIPHY HW. + +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- clock-rates + Usage: required + Value type: + Definition: List of clock rates in Hz for CSIPHY HW. Example: -qcom,csiphy@ac65000 { - cell-index = <0>; - compatible = "qcom,csiphy-v1.0", "qcom,csiphy"; - reg = <0xac65000 0x200>; - reg-cam-base = <0x65000>; - reg-names = "csiphy"; - interrupts = <0 477 0>; - interrupt-names = "csiphy"; - regulator-names = "gdscr", "refgen"; - mipi-csi-vdd-supply = <&pm8998_l1>; - csi-vdd-voltage = <1200000>; - gdscr-supply = <&titan_top_gdsc>; - clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, - <&clock_camcc CAM_CC_CSIPHY0_CLK>, - <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, - <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; - clock-names = "cphy_rx_clk_src", "csiphy0_clk", - "csi0phytimer_clk_src", "csi0phytimer_clk"; - clock-rates = <400000000 0 300000000 0>; - clock-cntl-level = "turbo"; - status = "ok"; +cam_csiphy0: qcom,csiphy0@ace4000 { + cell-index = <0>; + compatible = "qcom,csiphy-v2.1.0", "qcom,csiphy"; + reg = < 0x0ace4000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe4000>; + interrupts = ; + interrupt-names = "csiphy0"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&pm8350_l6>; + csi-vdd-0p9-supply = <&pm8350_l5>; + rgltr-cntrl-support; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 54700 102000>; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "nominal"; + clock-rates = + <480000000 0 400000000 0>; + status = "ok"; }; diff --git a/bindings/msm-cam-icp.txt b/bindings/msm-cam-icp.txt index e22e1f99f670..5848dd56dca3 100644 --- a/bindings/msm-cam-icp.txt +++ b/bindings/msm-cam-icp.txt @@ -2,7 +2,7 @@ The MSM camera ICP devices are implemented multiple device nodes. The root icp device node has properties defined to hint the driver -about the number of A5,IPE and BPS nodes available during the +about the number of A5, LX7, IPE and BPS nodes available during the probe sequence. Each node has multiple properties defined for interrupts, clocks and regulators. @@ -10,7 +10,7 @@ for interrupts, clocks and regulators. Required Node Structure ======================= ICP root interface node takes care of the handling account for number -of A5, IPE and BPS devices present on the hardware. +of A5, LX7, IPE and BPS devices present on the hardware. - compatible Usage: required @@ -20,12 +20,13 @@ of A5, IPE and BPS devices present on the hardware. - compat-hw-name Usage: required Value type: - Definition: Should be "qcom,a5" or "qcom,ipe0" or "qcom,ipe1" or "qcom,bps". + Definition: Should be "qcom,a5", "qcom,lx7", "qcom,ipe0", + "qcom,ipe1" or "qcom,bps". -- num-a5 +- num-a5 or num-lx7 Usage: required Value type: - Definition: Number of supported A5 processors. + Definition: Number of supported A5 or LX7 processors. - num-ipe Usage: required @@ -38,20 +39,21 @@ of A5, IPE and BPS devices present on the hardware. Definition: Number of supported BPS HW blocks. Example: - qcom,cam-icp { - compatible = "qcom,cam-icp"; - compat-hw-name = "qcom,a5", "qcom,ipe0", "qcom,ipe1", "qcom,bps"; - num-a5 = <1>; - num-ipe = <2>; - num-bps = <1>; - status = "ok"; - }; +qcom,cam-icp { + compatible = "qcom,cam-icp"; + compat-hw-name = "qcom,a5", "qcom,lx7", "qcom,ipe0", + "qcom,ipe0", "qcom,bps"; + num-a5 = <1>; or num-lx7 = <1>; + num-ipe = <2>; + num-bps = <1>; + status = "ok"; +}; ======================= Required Node Structure ======================= -A5/IPE/BPS Node's provides interface for Image Control Processor driver -about the A5 register map, interrupt map, clocks, regulators +A5/LX7/IPE/BPS Node's provides interface for Image Control Processor driver +about the A5/LX7 register map, interrupt map, clocks, regulators and name of firmware image. - cell-index @@ -62,7 +64,8 @@ and name of firmware image. - compatible Usage: required Value type: - Definition: Should be "qcom,cam-a5" or "qcom,cam-ipe" or "qcom,cam-bps". + Definition: Should be "qcom,cam-a5", "qcom,cam-lx7", + "qcom,cam-ipe" or "qcom,cam-bps". - reg-names Usage: optional @@ -87,23 +90,23 @@ and name of firmware image. - interrupts Usage: optional Value type: - Definition: Interrupt associated with CDM HW. + Definition: Interrupt associated with ICP HW. - regulator-names Usage: required Value type: - Definition: Name of the regulator resources for CDM HW. + Definition: Name of the regulator resources for ICP HW. - camss-supply Usage: required Value type: Definition: Regulator reference corresponding to the names listed - in "regulator-names". + in "regulator-names". - clock-names Usage: required Value type: - Definition: List of clock names required for CDM HW. + Definition: List of clock names required for ICP HW. - src-clock-name Usage: required @@ -118,7 +121,7 @@ and name of firmware image. - clocks Usage: required Value type: - Definition: List of clocks used for CDM HW. + Definition: List of clocks used for ICP HW. - clock-cntl-level Usage: required @@ -163,75 +166,123 @@ and name of firmware image. ipe/bps ubwc properties are not used. Examples: -a5: qcom,a5@ac00000 { +cam_a5: qcom,a5 { cell-index = <0>; compatible = "qcom,cam-a5"; reg = <0xac00000 0x6000>, <0xac10000 0x8000>, <0xac18000 0x3000>; reg-names = "a5_qgic", "a5_sierra", "a5_csr"; - interrupts = <0 463 0>; + reg-cam-base = <0x00000 0x10000 0x18000>; + interrupts = ; interrupt-names = "a5"; regulator-names = "camss-vdd"; - camss-vdd-supply = <&titan_top_gdsc>; - clock-names = "gcc_cam_ahb_clk", - "gcc_cam_axi_clk", - "soc_ahb_clk", - "cpas_ahb_clk", - "camnoc_axi_clk", - "icp_apb_clk", - "icp_atb_clk", - "icp_clk", + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "soc_fast_ahb", + "icp_ahb_clk", "icp_clk_src", - "icp_cti_clk", - "icp_ts_clk"; - clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>, - <&clock_gcc GCC_CAMERA_AXI_CLK>, - <&clock_camcc CAM_CC_SOC_AHB_CLK>, - <&clock_camcc CAM_CC_CPAS_AHB_CLK>, - <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, - <&clock_camcc CAM_CC_ICP_APB_CLK>, - <&clock_camcc CAM_CC_ICP_ATB_CLK>, - <&clock_camcc CAM_CC_ICP_CLK>, - <&clock_camcc CAM_CC_ICP_CLK_SRC>, - <&clock_camcc CAM_CC_ICP_CTI_CLK>, - <&clock_camcc CAM_CC_ICP_TS_CLK>; + "icp_clk"; + src-clock-name = "icp_clk_src"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_AHB_CLK>, + <&clock_camcc CAM_CC_ICP_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_CLK>; - clock-rates = <0 0 0 80000000 0 0 0 0 600000000 0 0>; - clock-cntl-level = "turbo"; + clock-rates = + <0 0 400000000 0>, + <0 0 480000000 0>, + <0 0 600000000 0>, + <0 0 600000000 0>, + <0 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; fw_name = "CAMERA_ICP.elf"; - /* "ubwc-cfg" is not used, even if defined the new property - tags will be priortized. If the new properties are not used - please specify "ubwc-cfg" in that case */ ubwc-ipe-fetch-cfg = <0x707b 0x7083>; ubwc-ipe-write-cfg = <0x161ef 0x1620f>; - ubwc-bps-fetch-cfg = <0x707b 0x7083> + ubwc-bps-fetch-cfg = <0x707b 0x7083>; ubwc-bps-write-cfg = <0x161ef 0x1620f>; + status = "ok"; +}; -qcom,ipe0 { +cam_lx7: qcom,lx7 { + cell-index = <0>; + compatible = "qcom,cam-lx7"; + reg = <0xac01000 0x400>, + <0xac01800 0x400>; + reg-names = "lx7_csr", "lx7_cirq"; + reg-cam-base = <0x1000 0x1800>; + interrupts = ; + interrupt-names = "lx7"; + regulator-names = "camss-vdd"; + camss-vdd-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "soc_slow_ahb", + "icp_ahb_clk", + "icp_clk_src", + "icp_clk"; + src-clock-name = "icp_clk_src"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_AHB_CLK>, + <&clock_camcc CAM_CC_ICP_CLK_SRC>, + <&clock_camcc CAM_CC_ICP_CLK>; + + clock-rates = + <80000000 0 400000000 0>, + <80000000 0 480000000 0>, + <80000000 0 600000000 0>, + <80000000 0 600000000 0>, + <80000000 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + fw_name = "CAMERA_ICP.elf"; + ubwc-ipe-fetch-cfg = <0x707b 0x7083>; + ubwc-ipe-write-cfg = <0x161ef 0x1620f>; + ubwc-bps-fetch-cfg = <0x707b 0x7083>; + ubwc-bps-write-cfg = <0x161ef 0x1620f>; + status = "ok"; +}; + +cam_ipe0: qcom,ipe0@ac42000 { cell-index = <0>; compatible = "qcom,cam-ipe"; + reg = <0xac42000 0x18000>; + reg-names = "ipe0_top"; + reg-cam-base = <0x42000>; regulator-names = "ipe0-vdd"; - ipe0-vdd-supply = <&ipe_0_gdsc>; - clock-names = "ipe_0_ahb_clk", - "ipe_0_areg_clk", - "ipe_0_axi_clk", - "ipe_0_clk", - "ipe_0_clk_src"; - src-clock-name = "ipe_0_clk_src"; - clocks = <&clock_camcc CAM_CC_IPE_0_AHB_CLK>, - <&clock_camcc CAM_CC_IPE_0_AREG_CLK>, - <&clock_camcc CAM_CC_IPE_0_AXI_CLK>, - <&clock_camcc CAM_CC_IPE_0_CLK>, - <&clock_camcc CAM_CC_IPE_0_CLK_SRC>; + ipe0-vdd-supply = <&cam_cc_ipe_0_gdsc>; + clock-names = + "ipe_nps_ahb_clk_src", + "ipe_nps_ahb_clk", + "ipe_fast_ahb_clk_src", + "ipe_nps_fast_ahb_clk", + "ipe_pps_fast_ahb_clk", + "ipe_nps_clk_src", + "ipe_nps_clk"; + "ipe_pps_clk"; + src-clock-name = "ipe_nps_clk_src"; + clock-control-debugfs = "true"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_NPS_AHB_CLK>, + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_NPS_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IPE_PPS_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IPE_NPS_CLK_SRC>, + <&clock_camcc CAM_CC_IPE_NPS_CLK>, + <&clock_camcc CAM_CC_IPE_PPS_CLK>; - clock-rates = <0 0 0 0 240000000>, - <0 0 0 0 404000000>, - <0 0 0 0 480000000>, - <0 0 0 0 538000000>, - <0 0 0 0 600000000>; - clock-cntl-level = "lowsvs", "svs", - "svs_l1", "nominal", "turbo"; + clock-rates = + <80000000 0 100000000 0 0 364000000 0 0>, + <80000000 0 200000000 0 0 500000000 0 0>, + <80000000 0 300000000 0 0 600000000 0 0>, + <80000000 0 400000000 0 0 700000000 0 0>, + <80000000 0 400000000 0 0 700000000 0 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + status = "ok"; }; qcom,ipe1 { @@ -260,28 +311,38 @@ qcom,ipe1 { "svs_l1", "nominal", "turbo"; }; -bps: qcom,bps { +cam_bps: qcom,bps@ac2c000 { cell-index = <0>; compatible = "qcom,cam-bps"; + reg = <0xac2c000 0xB000>; + reg-names = "bps_top"; + reg-cam-base = <0x2c000>; regulator-names = "bps-vdd"; - bps-vdd-supply = <&bps_gdsc>; - clock-names = "bps_ahb_clk", - "bps_areg_clk", - "bps_axi_clk", - "bps_clk", - "bps_clk_src"; + bps-vdd-supply = <&cam_cc_bps_gdsc>; + clock-names = + "bps_ahb_clk_src", + "bps_ahb_clk", + "bps_fast_ahb_clk_src", + "bps_fast_ahb_clk", + "bps_clk_src", + "bps_clk"; src-clock-name = "bps_clk_src"; - clocks = <&clock_camcc CAM_CC_BPS_AHB_CLK>, - <&clock_camcc CAM_CC_BPS_AREG_CLK>, - <&clock_camcc CAM_CC_BPS_AXI_CLK>, - <&clock_camcc CAM_CC_BPS_CLK>, - <&clock_camcc CAM_CC_BPS_CLK_SRC>; + clock-control-debugfs = "true"; + clocks = + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_AHB_CLK>, + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_BPS_CLK_SRC>, + <&clock_camcc CAM_CC_BPS_CLK>; - clock-rates = <0 0 0 0 200000000>, - <0 0 0 0 404000000>, - <0 0 0 0 480000000>, - <0 0 0 0 600000000>, - <0 0 0 0 600000000>; - clock-cntl-level = "lowsvs", "svs", - "svs_l1", "nominal", "turbo"; + clock-rates = + <80000000 0 100000000 0 200000000 0>, + <80000000 0 200000000 0 400000000 0>, + <80000000 0 300000000 0 480000000 0>, + <80000000 0 400000000 0 600000000 0>, + <80000000 0 400000000 0 600000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + status = "ok"; }; diff --git a/bindings/msm-cam-ife-csid.txt b/bindings/msm-cam-ife-csid.txt index 5da5a5ad57d0..3230682d84b9 100644 --- a/bindings/msm-cam-ife-csid.txt +++ b/bindings/msm-cam-ife-csid.txt @@ -12,21 +12,20 @@ The IFE CSID device is described in one level of the device node. ====================================== First Level Node - CAM IFE CSID device ====================================== -- compatible - Usage: required - Value type: - - Definition: Should be "qcom,csid170", "qcom,csid170_200", "qcom,csid175", "qcom,csid175_200", - "qcom,csid480", "qcom,csid580", "qcom,csid680", "qcom,csid-lite170", - "qcom,csid-lite175", "qcom,csid-lite480" or "qcom,csid-custom480", - "qcom,csid-lite580" or "qcom,csid-custom580", - "qcom,csid-lite680". - - cell-index Usage: required Value type: Definition: Should specify the hardware index id. +- compatible + Usage: required + Value type: + Definition: Should be "qcom,csid170", "qcom,csid170_200", "qcom,csid175", + "qcom,csid175_200", "qcom,csid480", "qcom,csid580", "qcom,csid680", + "qcom,csid-lite170", "qcom,csid-lite175", "qcom,csid-lite480", + "qcom,csid-custom480", "qcom,csid-lite580", "qcom,csid-custom580", + "qcom,csid-lite680" or "qcom,csid-custom680". + - reg-names Usage: required Value type: @@ -37,6 +36,11 @@ First Level Node - CAM IFE CSID device Value type: Definition: Register values. +- reg-cam-base + Usage: required + Value type: + Definition: List of bases. + - interrupt-names Usage: Required Value type: @@ -90,35 +94,41 @@ First Level Node - CAM IFE CSID device Example: - qcom,csid0@acb3000 { - cell-index = <0>; - compatible = "qcom,csid580"; - reg = <0xacb3000 0x1000>; - reg-names = "csid"; - interrupts = <0 464 0>; - interrupt-names = "csid"; - vdd-names = "camss", "ife0"; - camss-supply = <&titan_top_gdsc>; - ife0-supply = <&ife_0_gdsc>; - clock-names = "soc_ahb_clk", - "cpas_ahb_clk", - "slow_ahb_clk_src", - "ife_clk", - "ife_clk_src", - "ife_csid_clk", - "ife_csid_clk_src", - "ife_cphy_rx_clk", - "cphy_rx_clk_src"; - clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>, - <&clock_camcc CAM_CC_CPAS_AHB_CLK>, - <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CLK>, - <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, - <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>, - <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>; - clock-rates = <0 0 80000000 0 320000000 0 384000000 0 384000000>; - src-clock-name = "ife_csid_clk_src"; - status = "ok"; - }; +cam_csid0: qcom,csid0@acb7000 { + cell-index = <0>; + compatible = "qcom,csid680"; + reg-names = "csid", "csid_top", "rt_wrapper"; + reg = <0xacb7000 0xd00>, + <0xacb6000 0x1000>, + <0xac62000 0x64000>; + reg-cam-base = <0xb7000 0xb6000 0x62000>; + interrupt-names = "csid"; + interrupts = ; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + clock-names = + "csid_clk_src", + "csid_clk", + "cphy_rx_clk_src", + "csiphy_rx_clk", + "cpas_fast_ahb_src", + "cpas_fast_ahb"; + clocks = + <&clock_camcc CAM_CC_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>, + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_CPAS_FAST_AHB_CLK>; + clock-rates = + <400000000 0 400000000 0 100000000 0>, + <480000000 0 480000000 0 200000000 0>, + <480000000 0 480000000 0 300000000 0>, + <480000000 0 480000000 0 400000000 0>, + <480000000 0 480000000 0 400000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; +}; diff --git a/bindings/msm-cam-sfe.txt b/bindings/msm-cam-sfe.txt new file mode 100644 index 000000000000..5942a5eb8518 --- /dev/null +++ b/bindings/msm-cam-sfe.txt @@ -0,0 +1,132 @@ +* Qualcomm Technologies, Inc. MSM Camera SFE + +Camera SFE device provides the definitions for enabling +the SFE hardware. It also provides the functions for the client +to control the SFE hardware. + +======================= +Required Node Structure +======================= +The SFE device is described in one level of the device node. + +====================================== +First Level Node - CAM SFE device +====================================== +Required properties: +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + +- compatible + Usage: required + Value type: + Definition: Should specify the compatibility string for matching the + + driver. e.g. "qcom,sfe680". + +- reg-names + Usage: required + Value type: + Definition: Should specify the name of the register block. + +- reg + Usage: required + Value type: + Definition: Register values. + +- reg-cam-base + Usage: required + Value type: + Definition: List of bases. + +- interrupt-names + Usage: Required + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: Required + Value type: + Definition: Interrupt associated with SFE HW. + +- regulator-names + Usage: required + Value type: + Definition: Name of the regulator resources for SFE HW. + +- xxxx-supply + Usage: required + Value type: + Definition: Regulator reference corresponding to the names listed in + "regulator-names". + +- clock-names + Usage: required + Value type: + Definition: List of clock names required for SFE HW. + +- clocks + Usage: required + Value type: + Definition: List of clocks used for SFE HW. + +- clock-rates + Usage: required + Value type: + Definition: List of clocks rates. + +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + +- src-clock-name + Usage: required + Value type: + Definition: Source clock name. + +- scl-clk-names + Usage: required + Value type: + Definition: Source clock name for register write. + +- clock-control-debugfs + Usage: optional + Value type: + Definition: Enable/Disable clk rate control. + +Example: +cam_sfe0: qcom,sfe0@ac9e000 { + cell-index = <0>; + compatible = "qcom,sfe680"; + reg-names = "sfe0", "rt_wrapper"; + reg = <0xac9e000 0x8000>, + <0xac62000 0x64000>; + reg-cam-base = <0x9e000 0x62000>; + interrupt-names = "sfe"; + interrupts = ; + regulator-names = "camss", "sfe0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + sfe0-supply = <&cam_cc_sfe_0_gdsc>; + clock-names = + "sfe_0_ahb", + "sfe_clk_src", + "sfe_clk"; + clocks = + <&clock_camcc CAM_CC_SFE_0_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_SFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_SFE_0_CLK>; + clock-rates = + <100000000 432000000 0>, + <200000000 594000000 0>, + <300000000 675000000 0>, + <400000000 785000000 0>, + <400000000 785000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "sfe_clk_src"; + scl-clk-names = "sfe_0_ahb"; + clock-control-debugfs = "true"; + status = "ok"; +}; diff --git a/bindings/msm-cam-tpg.txt b/bindings/msm-cam-tpg.txt index f25fa9ae98be..6880125061b4 100644 --- a/bindings/msm-cam-tpg.txt +++ b/bindings/msm-cam-tpg.txt @@ -13,17 +13,17 @@ The TPG device is described in one level of the device node. First Level Node - CAM TPG device ====================================== Required properties: +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + - compatible Usage: required Value type: Definition: Should specify the compatibility string for matching the driver. e.g. "qcom,tpg101", "qcom,tpg102", "qcom,tpgv1", "qcom,tpg103" -- cell-index - Usage: required - Value type: - Definition: Should specify the hardware index id. - - reg-names Usage: required Value type: @@ -34,15 +34,10 @@ Required properties: Value type: Definition: Register values. -- interrupt-names - Usage: Required - Value type: - Definition: Name of the interrupt. - -- interrupts - Usage: Required +- reg-cam-base + Usage: required Value type: - Definition: Interrupt associated with TFE HW. + Definition: List of bases. - regulator-names Usage: required @@ -55,6 +50,16 @@ Required properties: Definition: Regulator reference corresponding to the names listed in "regulator-names". +- interrupt-names + Usage: Required + Value type: + Definition: Name of the interrupt. + +- interrupts + Usage: Required + Value type: + Definition: Interrupt associated with TFE HW. + - clock-names Usage: required Value type: @@ -70,6 +75,11 @@ Required properties: Value type: Definition: List of clocks rates. +- clock-cntl-level + Usage: required + Value type: + Definition: All different clock level node can support. + - src-clock-name Usage: required Value type: @@ -87,27 +97,30 @@ Required properties: along with source clock. Example: - cam_tfe_tpg0: qcom,tpg0@5c66000 { - cell-index = <0>; - compatible = "qcom,tpg101"; - reg-names = "tpg0", "top"; - reg = <0x5c66000 0x400>, - <0x5c11000 0x1000>; - reg-cam-base = <0x66000 0x11000>; - regulator-names = "camss"; - camss-supply = <&gcc_camss_top_gdsc>; - clock-names = - "cphy_rx_clk_src", - "tfe_0_cphy_rx_clk"; - clocks = - <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>, - <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>; - clock-rates = - <240000000 240000000>, - <341333333 341333333>, - <384000000 384000000>; - clock-cntl-level = "svs", "svs_l1", "turbo"; - src-clock-name = "cphy_rx_clk_src"; - clock-control-debugfs = "false"; - status = "ok"; - }; +cam_csiphy_tpg0: qcom,tpg0@acf6000 { + cell-index = <0>; + compatible = "qcom,tpg103"; + reg-names = "tpg0", "cam_cpas_top"; + reg = <0xacf6000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf6000 0x13000>; + regulator-names = "camss"; + camss-supply = <&cam_cc_titan_top_gdsc>; + interrupt-names = "tpg0"; + interrupts = ; + clock-names = + "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + clocks = + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + clock-rates = + <480000000 0 400000000 0>; + clock-cntl-level = "nominal"; + src-clock-name = "csi0phytimer_clk_src"; + status = "ok"; +}; diff --git a/bindings/msm-cam-vfe.txt b/bindings/msm-cam-vfe.txt index 85dc19873b16..3689327e26fb 100644 --- a/bindings/msm-cam-vfe.txt +++ b/bindings/msm-cam-vfe.txt @@ -13,19 +13,20 @@ The VFE device is described in one level of the device node. First Level Node - CAM VFE device ====================================== Required properties: +- cell-index + Usage: required + Value type: + Definition: Should specify the hardware index id. + - compatible Usage: required Value type: Definition: Should specify the compatibility string for matching the - driver. e.g. "qcom,vfe580", "qcom,vfe480", "qcom,vfe175", "qcom,vfe170", - "qcom,vfe175_130", "qcom,vfe170_150", "qcom,vfe-lite580", "qcom,vfe-lite480", - "qcom,vfe-lite175", "qcom,vfe-lite175_130", "qcom,vfe-lite170". - -- cell-index - Usage: required - Value type: - Definition: Should specify the hardware index id. + driver. e.g. "qcom,vfe680", "qcom,vfe580", "qcom,vfe480", "qcom,vfe175", + "qcom,vfe170", "qcom,vfe175_130", "qcom,vfe170_150", "qcom,vfe-lite680", + "qcom,vfe-lite580", "qcom,vfe-lite480", "qcom,vfe-lite175", + "qcom,vfe-lite175_130" or "qcom,vfe-lite170". - reg-names Usage: required @@ -37,6 +38,11 @@ Required properties: Value type: Definition: Register values. + - reg-cam-base + Usage: required + Value type: + Definition: List of bases. + - interrupt-names Usage: Required Value type: @@ -121,42 +127,44 @@ Optional properties: Definition: HW unique Pid values Example: - qcom,vfe0@acaf000 { - cell-index = <0>; - compatible = "qcom,vfe580"; - reg-names = "ife"; - reg = <0xacaf000 0x4000>; - interrupts = <0 465 0>; - interrupt-names = "ife"; - vdd-names = "camss-vdd", "ife0-vdd"; - camss-vdd-supply = <&titan_top_gdsc>; - ife0-vdd-supply = <&ife_0_gdsc>; - clock-names = "soc_ahb_clk", - "cpas_ahb_clk", - "slow_ahb_clk_src", - "ife_clk", - "ife_clk_src", - "ife_csid_clk", - "ife_csid_clk_src", - "camnoc_axi_clk", - "ife_axi_clk", - clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>, - <&clock_camcc CAM_CC_CPAS_AHB_CLK>, - <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CLK>, - <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, - <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, - <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, - <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, - <&clock_camcc CAM_CC_IFE_0_AXI_CLK>, - clock-rates = <0 0 80000000 0 320000000 0 384000000 0 0 0>; - src-clock-name = "ife_clk_src"; - clock-names-option = "ife_dsp_clk"; - clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; - clock-rates-option = <600000000>; - scl-clk-en; - scl-clk-names = "ife_axi_clk"; - qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>; - cam_hw_pid = < 28 4 16 8 >; - status = "ok"; - }; +cam_vfe0: qcom,ife0@ac62000 { + cell-index = <0>; + compatible = "qcom,vfe680"; + reg-names = "ife", "cam_camnoc", "rt_wrapper"; + reg = <0xac62000 0xF000>, + <0xac19000 0x9000>, + <0xac62000 0x64000>; + reg-cam-base = <0x62000 0x19000 0x62000>; + interrupt-names = "ife"; + interrupts = ; + regulator-names = "camss", "ife0"; + camss-supply = <&cam_cc_titan_top_gdsc>; + ife0-supply = <&cam_cc_ife_0_gdsc>; + clock-names = + "ife_0_ahb_src", + "ife_0_ahb", + "ife_clk_src", + "ife_clk"; + clocks = + <&clock_camcc CAM_CC_FAST_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_FAST_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CLK>; + clock-rates = + <100000000 0 432000000 0>, + <200000000 0 594000000 0>, + <300000000 0 675000000 0>, + <400000000 0 785000000 0>, + <400000000 0 785000000 0>; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_clk_src"; + scl-clk-names = "ife_0_ahb"; + clock-control-debugfs = "true"; + clock-names-option = "ife_dsp_clk"; + clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>; + clock-rates-option = <594000000>; + ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = <16 28 20 8>; + status = "ok"; +};