From f15160e4f3c88fe54d1fcfa5d4072862b6d296ad Mon Sep 17 00:00:00 2001
From: Raviteja <travitej@qti.qualcomm.com>
Date: Wed, 16 Sep 2020 02:40:39 +0530
Subject: [PATCH] ARM: dts: msm: update display ramdump node in Lahaina

Since the address & size cells for display ramdump's
parent node(soc) is one, address & size should be defined
in the 32-bit format instead of 64-bit. This change
modifies them accordingly.

Change-Id: Ib96fa68c494be73fd45049de530aeecd982fb8ef
---
 display/lahaina-sde.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/display/lahaina-sde.dtsi b/display/lahaina-sde.dtsi
index 870528fae30e..41286ac19ff8 100644
--- a/display/lahaina-sde.dtsi
+++ b/display/lahaina-sde.dtsi
@@ -3,7 +3,7 @@
 
 &soc {
 	disp_rdump_memory: disp_rdump_region@e1000000 {
-		reg = <0x0 0xe1000000 0x0 0x00800000>;
+		reg = <0xe1000000 0x00800000>;
 		label = "disp_rdump_region";
 	};