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phy: ufs: Add UFS PHY support for Holi

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This change adds ufs phy support for Holi.

Change-Id: I0d859b0371ca9402e7040ffc0a647657cf67e1e0
Signed-off-by: Nitin Rawat <[email protected]>
This commit is contained in:
Nitin Rawat 2020-07-23 03:58:09 +05:30
commit 1b05249e48
2 changed files with 13 additions and 4 deletions
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6
drivers/phy/qualcomm/Kconfig
View file

@ -89,6 +89,12 @@ config PHY_QCOM_UFS_QRBTC_SDM845
No low power mode support is present.
Doesn't restrict number of lanes.
config PHY_QCOM_UFS_V3
tristate
default PHY_QCOM_UFS
help
Support for 8nm UFS QMP phy present on QCOM chipsets.
endif
config PHY_QCOM_USB_HS

11
drivers/phy/qualcomm/phy-qcom-ufs-qmp-v3.c
View file

@ -50,17 +50,20 @@ static int ufs_qcom_phy_qmp_v3_phy_calibrate(struct phy *generic_phy)
phy_cal_table_2nd_lane,
ARRAY_SIZE(phy_cal_table_2nd_lane));
} else {
ufs_qcom_phy_write_tbl(ufs_qcom_phy, phy_cal_table_rate_A_no_g4,
ARRAY_SIZE(phy_cal_table_rate_A_no_g4));
ufs_qcom_phy_write_tbl(ufs_qcom_phy, phy_cal_table_rate_A,
ARRAY_SIZE(phy_cal_table_rate_A));
if (ufs_qcom_phy->lanes_per_direction == 2)
ufs_qcom_phy_write_tbl(ufs_qcom_phy,
phy_cal_table_2nd_lane_no_g4,
ARRAY_SIZE(phy_cal_table_2nd_lane_no_g4));
phy_cal_table_2nd_lane,
ARRAY_SIZE(phy_cal_table_2nd_lane));
}
if (is_rate_B)
ufs_qcom_phy_write_tbl(ufs_qcom_phy, phy_cal_table_rate_B,
ARRAY_SIZE(phy_cal_table_rate_B));
/* flush buffered writes */
mb();
err = reset_control_deassert(ufs_qcom_phy->ufs_reset);
if (err) {
dev_err(dev, "Failed to deassert UFS PHY reset %d\n", err);