mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 03:27:44 -04:00
Merge branch 'cpufreq/arm/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm
Pull ARM cpufreq driver changes for 5.4 from Viresh Kumar: "This contains: - Minor fixes for mediatek driver (Andrew-sh.Cheng and Fabien Parent). - Minor updates for imx driver (Anson Huang). - Minor fix for ti-cpufreq driver (Gustavo A. R. Silva). - Minor fix for ap806 driver (Hariprasad Kelam). - Significant updates to qcom cpufreq drivers, mostly to support CPR stuff (Jorge Ramirez-Ortiz, Niklas Cassel, Sibi Sankar, Douglas RAILLARD and Sricharan R). - New sun50i cpufreq driver (Yangtao Li). It also contains a few OPP changes which were required because of dependencies for the qcom cpufreq changes." * 'cpufreq/arm/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: (22 commits) cpufreq: Add qcs404 to cpufreq-dt-platdev blacklist cpufreq: qcom: Add support for qcs404 on nvmem driver cpufreq: qcom: Refactor the driver to make it easier to extend cpufreq: qcom: Re-organise kryo cpufreq to use it for other nvmem based qcom socs dt-bindings: opp: Add qcom-opp bindings with properties needed for CPR dt-bindings: opp: qcom-nvmem: Support pstates provided by a power domain cpufreq: mediatek: Add support for mt8183 cpufreq: mediatek: change to regulator_get_optional cpufreq: imx-cpufreq-dt: Add i.MX8MN support cpufreq: Use imx-cpufreq-dt for i.MX8MN's speed grading cpufreq: qcom-hw: invoke frequency-invariance setter function cpufreq: qcom-hw: Update logic to detect turbo frequency cpufreq: mediatek-cpufreq: Add compatible for MT8516 cpufreq: ti-cpufreq: Mark expected switch fall-through dt-bindings: opp: qcom-nvmem: Make speedbin related properties optional dt-bindings: opp: Re-organise kryo cpufreq to use it for other nvmem based qcom socs opp: Add dev_pm_opp_find_level_exact() opp: Return genpd virtual devices from dev_pm_opp_attach_genpd() opp: Not all power-domains are scalable cpufreq: ap806: Add NULL check after kcalloc ...
This commit is contained in:
Rafael J. Wysocki
commit
1c5c1b5d8e
17 changed files with 1011 additions and 282 deletions
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@ -19,6 +19,18 @@ config ACPI_CPPC_CPUFREQ
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If in doubt, say N.
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config ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM
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tristate "Allwinner nvmem based SUN50I CPUFreq driver"
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depends on ARCH_SUNXI
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depends on NVMEM_SUNXI_SID
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select PM_OPP
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help
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This adds the nvmem based CPUFreq driver for Allwinner
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h6 SoC.
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To compile this driver as a module, choose M here: the
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module will be called sun50i-cpufreq-nvmem.
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config ARM_ARMADA_37XX_CPUFREQ
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tristate "Armada 37xx CPUFreq support"
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depends on ARCH_MVEBU && CPUFREQ_DT
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@ -120,8 +132,8 @@ config ARM_OMAP2PLUS_CPUFREQ
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depends on ARCH_OMAP2PLUS
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default ARCH_OMAP2PLUS
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config ARM_QCOM_CPUFREQ_KRYO
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tristate "Qualcomm Kryo based CPUFreq"
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config ARM_QCOM_CPUFREQ_NVMEM
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tristate "Qualcomm nvmem based CPUFreq"
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depends on ARM64
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depends on QCOM_QFPROM
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depends on QCOM_SMEM
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@ -64,7 +64,7 @@ obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
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obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o
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obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o
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obj-$(CONFIG_ARM_QCOM_CPUFREQ_HW) += qcom-cpufreq-hw.o
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obj-$(CONFIG_ARM_QCOM_CPUFREQ_KRYO) += qcom-cpufreq-kryo.o
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obj-$(CONFIG_ARM_QCOM_CPUFREQ_NVMEM) += qcom-cpufreq-nvmem.o
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obj-$(CONFIG_ARM_RASPBERRYPI_CPUFREQ) += raspberrypi-cpufreq.o
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obj-$(CONFIG_ARM_S3C2410_CPUFREQ) += s3c2410-cpufreq.o
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obj-$(CONFIG_ARM_S3C2412_CPUFREQ) += s3c2412-cpufreq.o
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@ -80,6 +80,7 @@ obj-$(CONFIG_ARM_SCMI_CPUFREQ) += scmi-cpufreq.o
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obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o
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obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o
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obj-$(CONFIG_ARM_STI_CPUFREQ) += sti-cpufreq.o
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obj-$(CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM) += sun50i-cpufreq-nvmem.o
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obj-$(CONFIG_ARM_TANGO_CPUFREQ) += tango-cpufreq.o
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obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) += tegra20-cpufreq.o
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obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o
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@ -136,6 +136,8 @@ static int __init armada_8k_cpufreq_init(void)
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nb_cpus = num_possible_cpus();
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freq_tables = kcalloc(nb_cpus, sizeof(*freq_tables), GFP_KERNEL);
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if (!freq_tables)
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return -ENOMEM;
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cpumask_copy(&cpus, cpu_possible_mask);
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/*
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@ -101,12 +101,15 @@ static const struct of_device_id whitelist[] __initconst = {
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* platforms using "operating-points-v2" property.
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*/
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static const struct of_device_id blacklist[] __initconst = {
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{ .compatible = "allwinner,sun50i-h6", },
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{ .compatible = "calxeda,highbank", },
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{ .compatible = "calxeda,ecx-2000", },
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{ .compatible = "fsl,imx7d", },
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{ .compatible = "fsl,imx8mq", },
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{ .compatible = "fsl,imx8mm", },
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{ .compatible = "fsl,imx8mn", },
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{ .compatible = "marvell,armadaxp", },
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@ -117,12 +120,14 @@ static const struct of_device_id blacklist[] __initconst = {
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{ .compatible = "mediatek,mt817x", },
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{ .compatible = "mediatek,mt8173", },
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{ .compatible = "mediatek,mt8176", },
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{ .compatible = "mediatek,mt8183", },
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{ .compatible = "nvidia,tegra124", },
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{ .compatible = "nvidia,tegra210", },
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{ .compatible = "qcom,apq8096", },
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{ .compatible = "qcom,msm8996", },
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{ .compatible = "qcom,qcs404", },
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{ .compatible = "st,stih407", },
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{ .compatible = "st,stih410", },
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@ -16,6 +16,7 @@
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#define OCOTP_CFG3_SPEED_GRADE_SHIFT 8
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#define OCOTP_CFG3_SPEED_GRADE_MASK (0x3 << 8)
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#define IMX8MN_OCOTP_CFG3_SPEED_GRADE_MASK (0xf << 8)
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#define OCOTP_CFG3_MKT_SEGMENT_SHIFT 6
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#define OCOTP_CFG3_MKT_SEGMENT_MASK (0x3 << 6)
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@ -34,7 +35,12 @@ static int imx_cpufreq_dt_probe(struct platform_device *pdev)
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if (ret)
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return ret;
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speed_grade = (cell_value & OCOTP_CFG3_SPEED_GRADE_MASK) >> OCOTP_CFG3_SPEED_GRADE_SHIFT;
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if (of_machine_is_compatible("fsl,imx8mn"))
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speed_grade = (cell_value & IMX8MN_OCOTP_CFG3_SPEED_GRADE_MASK)
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>> OCOTP_CFG3_SPEED_GRADE_SHIFT;
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else
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speed_grade = (cell_value & OCOTP_CFG3_SPEED_GRADE_MASK)
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>> OCOTP_CFG3_SPEED_GRADE_SHIFT;
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mkt_segment = (cell_value & OCOTP_CFG3_MKT_SEGMENT_MASK) >> OCOTP_CFG3_MKT_SEGMENT_SHIFT;
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/*
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@ -338,7 +338,7 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
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goto out_free_resources;
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}
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proc_reg = regulator_get_exclusive(cpu_dev, "proc");
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proc_reg = regulator_get_optional(cpu_dev, "proc");
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if (IS_ERR(proc_reg)) {
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if (PTR_ERR(proc_reg) == -EPROBE_DEFER)
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pr_warn("proc regulator for cpu%d not ready, retry.\n",
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@ -535,6 +535,8 @@ static const struct of_device_id mtk_cpufreq_machines[] __initconst = {
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{ .compatible = "mediatek,mt817x", },
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{ .compatible = "mediatek,mt8173", },
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{ .compatible = "mediatek,mt8176", },
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{ .compatible = "mediatek,mt8183", },
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{ .compatible = "mediatek,mt8516", },
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{ }
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};
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@ -20,6 +20,7 @@
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#define LUT_VOLT GENMASK(11, 0)
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#define LUT_ROW_SIZE 32
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#define CLK_HW_DIV 2
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#define LUT_TURBO_IND 1
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/* Register offsets */
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#define REG_ENABLE 0x0
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@ -34,9 +35,12 @@ static int qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy,
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unsigned int index)
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{
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void __iomem *perf_state_reg = policy->driver_data;
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unsigned long freq = policy->freq_table[index].frequency;
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writel_relaxed(index, perf_state_reg);
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arch_set_freq_scale(policy->related_cpus, freq,
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policy->cpuinfo.max_freq);
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return 0;
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}
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@ -63,6 +67,7 @@ static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy,
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{
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void __iomem *perf_state_reg = policy->driver_data;
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int index;
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unsigned long freq;
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index = policy->cached_resolved_idx;
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if (index < 0)
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@ -70,16 +75,19 @@ static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy,
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writel_relaxed(index, perf_state_reg);
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return policy->freq_table[index].frequency;
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freq = policy->freq_table[index].frequency;
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arch_set_freq_scale(policy->related_cpus, freq,
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policy->cpuinfo.max_freq);
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return freq;
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}
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static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev,
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struct cpufreq_policy *policy,
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void __iomem *base)
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{
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u32 data, src, lval, i, core_count, prev_cc = 0, prev_freq = 0, freq;
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u32 data, src, lval, i, core_count, prev_freq = 0, freq;
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u32 volt;
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unsigned int max_cores = cpumask_weight(policy->cpus);
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struct cpufreq_frequency_table *table;
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table = kcalloc(LUT_MAX_ENTRIES + 1, sizeof(*table), GFP_KERNEL);
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@ -102,12 +110,12 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev,
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else
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freq = cpu_hw_rate / 1000;
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if (freq != prev_freq && core_count == max_cores) {
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if (freq != prev_freq && core_count != LUT_TURBO_IND) {
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table[i].frequency = freq;
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dev_pm_opp_add(cpu_dev, freq * 1000, volt);
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dev_dbg(cpu_dev, "index=%d freq=%d, core_count %d\n", i,
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freq, core_count);
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} else {
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} else if (core_count == LUT_TURBO_IND) {
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table[i].frequency = CPUFREQ_ENTRY_INVALID;
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}
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@ -115,14 +123,14 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev,
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* Two of the same frequencies with the same core counts means
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* end of table
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*/
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if (i > 0 && prev_freq == freq && prev_cc == core_count) {
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if (i > 0 && prev_freq == freq) {
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struct cpufreq_frequency_table *prev = &table[i - 1];
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/*
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* Only treat the last frequency that might be a boost
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* as the boost frequency
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*/
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if (prev_cc != max_cores) {
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if (prev->frequency == CPUFREQ_ENTRY_INVALID) {
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prev->frequency = prev_freq;
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prev->flags = CPUFREQ_BOOST_FREQ;
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dev_pm_opp_add(cpu_dev, prev_freq * 1000, volt);
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@ -131,7 +139,6 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev,
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break;
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}
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prev_cc = core_count;
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prev_freq = freq;
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}
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|
|
|
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@ -1,249 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*/
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/*
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* In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
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* the CPU frequency subset and voltage value of each OPP varies
|
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* based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
|
||||
* defines the voltage and frequency value based on the msm-id in SMEM
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* and speedbin blown in the efuse combination.
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||||
* The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
|
||||
* to provide the OPP framework with required information.
|
||||
* This is used to determine the voltage and frequency value for each OPP of
|
||||
* operating-points-v2 table when it is parsed by the OPP framework.
|
||||
*/
|
||||
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/nvmem-consumer.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_opp.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/soc/qcom/smem.h>
|
||||
|
||||
#define MSM_ID_SMEM 137
|
||||
|
||||
enum _msm_id {
|
||||
MSM8996V3 = 0xF6ul,
|
||||
APQ8096V3 = 0x123ul,
|
||||
MSM8996SG = 0x131ul,
|
||||
APQ8096SG = 0x138ul,
|
||||
};
|
||||
|
||||
enum _msm8996_version {
|
||||
MSM8996_V3,
|
||||
MSM8996_SG,
|
||||
NUM_OF_MSM8996_VERSIONS,
|
||||
};
|
||||
|
||||
static struct platform_device *cpufreq_dt_pdev, *kryo_cpufreq_pdev;
|
||||
|
||||
static enum _msm8996_version qcom_cpufreq_kryo_get_msm_id(void)
|
||||
{
|
||||
size_t len;
|
||||
u32 *msm_id;
|
||||
enum _msm8996_version version;
|
||||
|
||||
msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
|
||||
if (IS_ERR(msm_id))
|
||||
return NUM_OF_MSM8996_VERSIONS;
|
||||
|
||||
/* The first 4 bytes are format, next to them is the actual msm-id */
|
||||
msm_id++;
|
||||
|
||||
switch ((enum _msm_id)*msm_id) {
|
||||
case MSM8996V3:
|
||||
case APQ8096V3:
|
||||
version = MSM8996_V3;
|
||||
break;
|
||||
case MSM8996SG:
|
||||
case APQ8096SG:
|
||||
version = MSM8996_SG;
|
||||
break;
|
||||
default:
|
||||
version = NUM_OF_MSM8996_VERSIONS;
|
||||
}
|
||||
|
||||
return version;
|
||||
}
|
||||
|
||||
static int qcom_cpufreq_kryo_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct opp_table **opp_tables;
|
||||
enum _msm8996_version msm8996_version;
|
||||
struct nvmem_cell *speedbin_nvmem;
|
||||
struct device_node *np;
|
||||
struct device *cpu_dev;
|
||||
unsigned cpu;
|
||||
u8 *speedbin;
|
||||
u32 versions;
|
||||
size_t len;
|
||||
int ret;
|
||||
|
||||
cpu_dev = get_cpu_device(0);
|
||||
if (!cpu_dev)
|
||||
return -ENODEV;
|
||||
|
||||
msm8996_version = qcom_cpufreq_kryo_get_msm_id();
|
||||
if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
|
||||
dev_err(cpu_dev, "Not Snapdragon 820/821!");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
|
||||
if (!np)
|
||||
return -ENOENT;
|
||||
|
||||
ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
|
||||
if (!ret) {
|
||||
of_node_put(np);
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
speedbin_nvmem = of_nvmem_cell_get(np, NULL);
|
||||
of_node_put(np);
|
||||
if (IS_ERR(speedbin_nvmem)) {
|
||||
if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
|
||||
dev_err(cpu_dev, "Could not get nvmem cell: %ld\n",
|
||||
PTR_ERR(speedbin_nvmem));
|
||||
return PTR_ERR(speedbin_nvmem);
|
||||
}
|
||||
|
||||
speedbin = nvmem_cell_read(speedbin_nvmem, &len);
|
||||
nvmem_cell_put(speedbin_nvmem);
|
||||
if (IS_ERR(speedbin))
|
||||
return PTR_ERR(speedbin);
|
||||
|
||||
switch (msm8996_version) {
|
||||
case MSM8996_V3:
|
||||
versions = 1 << (unsigned int)(*speedbin);
|
||||
break;
|
||||
case MSM8996_SG:
|
||||
versions = 1 << ((unsigned int)(*speedbin) + 4);
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
break;
|
||||
}
|
||||
kfree(speedbin);
|
||||
|
||||
opp_tables = kcalloc(num_possible_cpus(), sizeof(*opp_tables), GFP_KERNEL);
|
||||
if (!opp_tables)
|
||||
return -ENOMEM;
|
||||
|
||||
for_each_possible_cpu(cpu) {
|
||||
cpu_dev = get_cpu_device(cpu);
|
||||
if (NULL == cpu_dev) {
|
||||
ret = -ENODEV;
|
||||
goto free_opp;
|
||||
}
|
||||
|
||||
opp_tables[cpu] = dev_pm_opp_set_supported_hw(cpu_dev,
|
||||
&versions, 1);
|
||||
if (IS_ERR(opp_tables[cpu])) {
|
||||
ret = PTR_ERR(opp_tables[cpu]);
|
||||
dev_err(cpu_dev, "Failed to set supported hardware\n");
|
||||
goto free_opp;
|
||||
}
|
||||
}
|
||||
|
||||
cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
|
||||
NULL, 0);
|
||||
if (!IS_ERR(cpufreq_dt_pdev)) {
|
||||
platform_set_drvdata(pdev, opp_tables);
|
||||
return 0;
|
||||
}
|
||||
|
||||
ret = PTR_ERR(cpufreq_dt_pdev);
|
||||
dev_err(cpu_dev, "Failed to register platform device\n");
|
||||
|
||||
free_opp:
|
||||
for_each_possible_cpu(cpu) {
|
||||
if (IS_ERR_OR_NULL(opp_tables[cpu]))
|
||||
break;
|
||||
dev_pm_opp_put_supported_hw(opp_tables[cpu]);
|
||||
}
|
||||
kfree(opp_tables);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int qcom_cpufreq_kryo_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct opp_table **opp_tables = platform_get_drvdata(pdev);
|
||||
unsigned int cpu;
|
||||
|
||||
platform_device_unregister(cpufreq_dt_pdev);
|
||||
|
||||
for_each_possible_cpu(cpu)
|
||||
dev_pm_opp_put_supported_hw(opp_tables[cpu]);
|
||||
|
||||
kfree(opp_tables);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver qcom_cpufreq_kryo_driver = {
|
||||
.probe = qcom_cpufreq_kryo_probe,
|
||||
.remove = qcom_cpufreq_kryo_remove,
|
||||
.driver = {
|
||||
.name = "qcom-cpufreq-kryo",
|
||||
},
|
||||
};
|
||||
|
||||
static const struct of_device_id qcom_cpufreq_kryo_match_list[] __initconst = {
|
||||
{ .compatible = "qcom,apq8096", },
|
||||
{ .compatible = "qcom,msm8996", },
|
||||
{}
|
||||
};
|
||||
|
||||
/*
|
||||
* Since the driver depends on smem and nvmem drivers, which may
|
||||
* return EPROBE_DEFER, all the real activity is done in the probe,
|
||||
* which may be defered as well. The init here is only registering
|
||||
* the driver and the platform device.
|
||||
*/
|
||||
static int __init qcom_cpufreq_kryo_init(void)
|
||||
{
|
||||
struct device_node *np = of_find_node_by_path("/");
|
||||
const struct of_device_id *match;
|
||||
int ret;
|
||||
|
||||
if (!np)
|
||||
return -ENODEV;
|
||||
|
||||
match = of_match_node(qcom_cpufreq_kryo_match_list, np);
|
||||
of_node_put(np);
|
||||
if (!match)
|
||||
return -ENODEV;
|
||||
|
||||
ret = platform_driver_register(&qcom_cpufreq_kryo_driver);
|
||||
if (unlikely(ret < 0))
|
||||
return ret;
|
||||
|
||||
kryo_cpufreq_pdev = platform_device_register_simple(
|
||||
"qcom-cpufreq-kryo", -1, NULL, 0);
|
||||
ret = PTR_ERR_OR_ZERO(kryo_cpufreq_pdev);
|
||||
if (0 == ret)
|
||||
return 0;
|
||||
|
||||
platform_driver_unregister(&qcom_cpufreq_kryo_driver);
|
||||
return ret;
|
||||
}
|
||||
module_init(qcom_cpufreq_kryo_init);
|
||||
|
||||
static void __exit qcom_cpufreq_kryo_exit(void)
|
||||
{
|
||||
platform_device_unregister(kryo_cpufreq_pdev);
|
||||
platform_driver_unregister(&qcom_cpufreq_kryo_driver);
|
||||
}
|
||||
module_exit(qcom_cpufreq_kryo_exit);
|
||||
|
||||
MODULE_DESCRIPTION("Qualcomm Technologies, Inc. Kryo CPUfreq driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
352
drivers/cpufreq/qcom-cpufreq-nvmem.c
Normal file
352
drivers/cpufreq/qcom-cpufreq-nvmem.c
Normal file
|
|
@ -0,0 +1,352 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
/*
|
||||
* In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
|
||||
* the CPU frequency subset and voltage value of each OPP varies
|
||||
* based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
|
||||
* defines the voltage and frequency value based on the msm-id in SMEM
|
||||
* and speedbin blown in the efuse combination.
|
||||
* The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
|
||||
* to provide the OPP framework with required information.
|
||||
* This is used to determine the voltage and frequency value for each OPP of
|
||||
* operating-points-v2 table when it is parsed by the OPP framework.
|
||||
*/
|
||||
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/nvmem-consumer.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_domain.h>
|
||||
#include <linux/pm_opp.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/soc/qcom/smem.h>
|
||||
|
||||
#define MSM_ID_SMEM 137
|
||||
|
||||
enum _msm_id {
|
||||
MSM8996V3 = 0xF6ul,
|
||||
APQ8096V3 = 0x123ul,
|
||||
MSM8996SG = 0x131ul,
|
||||
APQ8096SG = 0x138ul,
|
||||
};
|
||||
|
||||
enum _msm8996_version {
|
||||
MSM8996_V3,
|
||||
MSM8996_SG,
|
||||
NUM_OF_MSM8996_VERSIONS,
|
||||
};
|
||||
|
||||
struct qcom_cpufreq_drv;
|
||||
|
||||
struct qcom_cpufreq_match_data {
|
||||
int (*get_version)(struct device *cpu_dev,
|
||||
struct nvmem_cell *speedbin_nvmem,
|
||||
struct qcom_cpufreq_drv *drv);
|
||||
const char **genpd_names;
|
||||
};
|
||||
|
||||
struct qcom_cpufreq_drv {
|
||||
struct opp_table **opp_tables;
|
||||
struct opp_table **genpd_opp_tables;
|
||||
u32 versions;
|
||||
const struct qcom_cpufreq_match_data *data;
|
||||
};
|
||||
|
||||
static struct platform_device *cpufreq_dt_pdev, *cpufreq_pdev;
|
||||
|
||||
static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
|
||||
{
|
||||
size_t len;
|
||||
u32 *msm_id;
|
||||
enum _msm8996_version version;
|
||||
|
||||
msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
|
||||
if (IS_ERR(msm_id))
|
||||
return NUM_OF_MSM8996_VERSIONS;
|
||||
|
||||
/* The first 4 bytes are format, next to them is the actual msm-id */
|
||||
msm_id++;
|
||||
|
||||
switch ((enum _msm_id)*msm_id) {
|
||||
case MSM8996V3:
|
||||
case APQ8096V3:
|
||||
version = MSM8996_V3;
|
||||
break;
|
||||
case MSM8996SG:
|
||||
case APQ8096SG:
|
||||
version = MSM8996_SG;
|
||||
break;
|
||||
default:
|
||||
version = NUM_OF_MSM8996_VERSIONS;
|
||||
}
|
||||
|
||||
return version;
|
||||
}
|
||||
|
||||
static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
|
||||
struct nvmem_cell *speedbin_nvmem,
|
||||
struct qcom_cpufreq_drv *drv)
|
||||
{
|
||||
size_t len;
|
||||
u8 *speedbin;
|
||||
enum _msm8996_version msm8996_version;
|
||||
|
||||
msm8996_version = qcom_cpufreq_get_msm_id();
|
||||
if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
|
||||
dev_err(cpu_dev, "Not Snapdragon 820/821!");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
speedbin = nvmem_cell_read(speedbin_nvmem, &len);
|
||||
if (IS_ERR(speedbin))
|
||||
return PTR_ERR(speedbin);
|
||||
|
||||
switch (msm8996_version) {
|
||||
case MSM8996_V3:
|
||||
drv->versions = 1 << (unsigned int)(*speedbin);
|
||||
break;
|
||||
case MSM8996_SG:
|
||||
drv->versions = 1 << ((unsigned int)(*speedbin) + 4);
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
break;
|
||||
}
|
||||
|
||||
kfree(speedbin);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct qcom_cpufreq_match_data match_data_kryo = {
|
||||
.get_version = qcom_cpufreq_kryo_name_version,
|
||||
};
|
||||
|
||||
static const char *qcs404_genpd_names[] = { "cpr", NULL };
|
||||
|
||||
static const struct qcom_cpufreq_match_data match_data_qcs404 = {
|
||||
.genpd_names = qcs404_genpd_names,
|
||||
};
|
||||
|
||||
static int qcom_cpufreq_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct qcom_cpufreq_drv *drv;
|
||||
struct nvmem_cell *speedbin_nvmem;
|
||||
struct device_node *np;
|
||||
struct device *cpu_dev;
|
||||
unsigned cpu;
|
||||
const struct of_device_id *match;
|
||||
int ret;
|
||||
|
||||
cpu_dev = get_cpu_device(0);
|
||||
if (!cpu_dev)
|
||||
return -ENODEV;
|
||||
|
||||
np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
|
||||
if (!np)
|
||||
return -ENOENT;
|
||||
|
||||
ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
|
||||
if (!ret) {
|
||||
of_node_put(np);
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
drv = kzalloc(sizeof(*drv), GFP_KERNEL);
|
||||
if (!drv)
|
||||
return -ENOMEM;
|
||||
|
||||
match = pdev->dev.platform_data;
|
||||
drv->data = match->data;
|
||||
if (!drv->data) {
|
||||
ret = -ENODEV;
|
||||
goto free_drv;
|
||||
}
|
||||
|
||||
if (drv->data->get_version) {
|
||||
speedbin_nvmem = of_nvmem_cell_get(np, NULL);
|
||||
if (IS_ERR(speedbin_nvmem)) {
|
||||
if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
|
||||
dev_err(cpu_dev,
|
||||
"Could not get nvmem cell: %ld\n",
|
||||
PTR_ERR(speedbin_nvmem));
|
||||
ret = PTR_ERR(speedbin_nvmem);
|
||||
goto free_drv;
|
||||
}
|
||||
|
||||
ret = drv->data->get_version(cpu_dev, speedbin_nvmem, drv);
|
||||
if (ret) {
|
||||
nvmem_cell_put(speedbin_nvmem);
|
||||
goto free_drv;
|
||||
}
|
||||
nvmem_cell_put(speedbin_nvmem);
|
||||
}
|
||||
of_node_put(np);
|
||||
|
||||
drv->opp_tables = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables),
|
||||
GFP_KERNEL);
|
||||
if (!drv->opp_tables) {
|
||||
ret = -ENOMEM;
|
||||
goto free_drv;
|
||||
}
|
||||
|
||||
drv->genpd_opp_tables = kcalloc(num_possible_cpus(),
|
||||
sizeof(*drv->genpd_opp_tables),
|
||||
GFP_KERNEL);
|
||||
if (!drv->genpd_opp_tables) {
|
||||
ret = -ENOMEM;
|
||||
goto free_opp;
|
||||
}
|
||||
|
||||
for_each_possible_cpu(cpu) {
|
||||
cpu_dev = get_cpu_device(cpu);
|
||||
if (NULL == cpu_dev) {
|
||||
ret = -ENODEV;
|
||||
goto free_genpd_opp;
|
||||
}
|
||||
|
||||
if (drv->data->get_version) {
|
||||
drv->opp_tables[cpu] =
|
||||
dev_pm_opp_set_supported_hw(cpu_dev,
|
||||
&drv->versions, 1);
|
||||
if (IS_ERR(drv->opp_tables[cpu])) {
|
||||
ret = PTR_ERR(drv->opp_tables[cpu]);
|
||||
dev_err(cpu_dev,
|
||||
"Failed to set supported hardware\n");
|
||||
goto free_genpd_opp;
|
||||
}
|
||||
}
|
||||
|
||||
if (drv->data->genpd_names) {
|
||||
drv->genpd_opp_tables[cpu] =
|
||||
dev_pm_opp_attach_genpd(cpu_dev,
|
||||
drv->data->genpd_names,
|
||||
NULL);
|
||||
if (IS_ERR(drv->genpd_opp_tables[cpu])) {
|
||||
ret = PTR_ERR(drv->genpd_opp_tables[cpu]);
|
||||
if (ret != -EPROBE_DEFER)
|
||||
dev_err(cpu_dev,
|
||||
"Could not attach to pm_domain: %d\n",
|
||||
ret);
|
||||
goto free_genpd_opp;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
|
||||
NULL, 0);
|
||||
if (!IS_ERR(cpufreq_dt_pdev)) {
|
||||
platform_set_drvdata(pdev, drv);
|
||||
return 0;
|
||||
}
|
||||
|
||||
ret = PTR_ERR(cpufreq_dt_pdev);
|
||||
dev_err(cpu_dev, "Failed to register platform device\n");
|
||||
|
||||
free_genpd_opp:
|
||||
for_each_possible_cpu(cpu) {
|
||||
if (IS_ERR_OR_NULL(drv->genpd_opp_tables[cpu]))
|
||||
break;
|
||||
dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]);
|
||||
}
|
||||
kfree(drv->genpd_opp_tables);
|
||||
free_opp:
|
||||
for_each_possible_cpu(cpu) {
|
||||
if (IS_ERR_OR_NULL(drv->opp_tables[cpu]))
|
||||
break;
|
||||
dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]);
|
||||
}
|
||||
kfree(drv->opp_tables);
|
||||
free_drv:
|
||||
kfree(drv);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int qcom_cpufreq_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct qcom_cpufreq_drv *drv = platform_get_drvdata(pdev);
|
||||
unsigned int cpu;
|
||||
|
||||
platform_device_unregister(cpufreq_dt_pdev);
|
||||
|
||||
for_each_possible_cpu(cpu) {
|
||||
if (drv->opp_tables[cpu])
|
||||
dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]);
|
||||
if (drv->genpd_opp_tables[cpu])
|
||||
dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]);
|
||||
}
|
||||
|
||||
kfree(drv->opp_tables);
|
||||
kfree(drv->genpd_opp_tables);
|
||||
kfree(drv);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver qcom_cpufreq_driver = {
|
||||
.probe = qcom_cpufreq_probe,
|
||||
.remove = qcom_cpufreq_remove,
|
||||
.driver = {
|
||||
.name = "qcom-cpufreq-nvmem",
|
||||
},
|
||||
};
|
||||
|
||||
static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
|
||||
{ .compatible = "qcom,apq8096", .data = &match_data_kryo },
|
||||
{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
|
||||
{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
|
||||
{},
|
||||
};
|
||||
|
||||
/*
|
||||
* Since the driver depends on smem and nvmem drivers, which may
|
||||
* return EPROBE_DEFER, all the real activity is done in the probe,
|
||||
* which may be defered as well. The init here is only registering
|
||||
* the driver and the platform device.
|
||||
*/
|
||||
static int __init qcom_cpufreq_init(void)
|
||||
{
|
||||
struct device_node *np = of_find_node_by_path("/");
|
||||
const struct of_device_id *match;
|
||||
int ret;
|
||||
|
||||
if (!np)
|
||||
return -ENODEV;
|
||||
|
||||
match = of_match_node(qcom_cpufreq_match_list, np);
|
||||
of_node_put(np);
|
||||
if (!match)
|
||||
return -ENODEV;
|
||||
|
||||
ret = platform_driver_register(&qcom_cpufreq_driver);
|
||||
if (unlikely(ret < 0))
|
||||
return ret;
|
||||
|
||||
cpufreq_pdev = platform_device_register_data(NULL, "qcom-cpufreq-nvmem",
|
||||
-1, match, sizeof(*match));
|
||||
ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
|
||||
if (0 == ret)
|
||||
return 0;
|
||||
|
||||
platform_driver_unregister(&qcom_cpufreq_driver);
|
||||
return ret;
|
||||
}
|
||||
module_init(qcom_cpufreq_init);
|
||||
|
||||
static void __exit qcom_cpufreq_exit(void)
|
||||
{
|
||||
platform_device_unregister(cpufreq_pdev);
|
||||
platform_driver_unregister(&qcom_cpufreq_driver);
|
||||
}
|
||||
module_exit(qcom_cpufreq_exit);
|
||||
|
||||
MODULE_DESCRIPTION("Qualcomm Technologies, Inc. CPUfreq driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
226
drivers/cpufreq/sun50i-cpufreq-nvmem.c
Normal file
226
drivers/cpufreq/sun50i-cpufreq-nvmem.c
Normal file
|
|
@ -0,0 +1,226 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Allwinner CPUFreq nvmem based driver
|
||||
*
|
||||
* The sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
|
||||
* provide the OPP framework with required information.
|
||||
*
|
||||
* Copyright (C) 2019 Yangtao Li <tiny.windzz@gmail.com>
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/nvmem-consumer.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_opp.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#define MAX_NAME_LEN 7
|
||||
|
||||
#define NVMEM_MASK 0x7
|
||||
#define NVMEM_SHIFT 5
|
||||
|
||||
static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;
|
||||
|
||||
/**
|
||||
* sun50i_cpufreq_get_efuse() - Parse and return efuse value present on SoC
|
||||
* @versions: Set to the value parsed from efuse
|
||||
*
|
||||
* Returns 0 if success.
|
||||
*/
|
||||
static int sun50i_cpufreq_get_efuse(u32 *versions)
|
||||
{
|
||||
struct nvmem_cell *speedbin_nvmem;
|
||||
struct device_node *np;
|
||||
struct device *cpu_dev;
|
||||
u32 *speedbin, efuse_value;
|
||||
size_t len;
|
||||
int ret;
|
||||
|
||||
cpu_dev = get_cpu_device(0);
|
||||
if (!cpu_dev)
|
||||
return -ENODEV;
|
||||
|
||||
np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
|
||||
if (!np)
|
||||
return -ENOENT;
|
||||
|
||||
ret = of_device_is_compatible(np,
|
||||
"allwinner,sun50i-h6-operating-points");
|
||||
if (!ret) {
|
||||
of_node_put(np);
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
speedbin_nvmem = of_nvmem_cell_get(np, NULL);
|
||||
of_node_put(np);
|
||||
if (IS_ERR(speedbin_nvmem)) {
|
||||
if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
|
||||
pr_err("Could not get nvmem cell: %ld\n",
|
||||
PTR_ERR(speedbin_nvmem));
|
||||
return PTR_ERR(speedbin_nvmem);
|
||||
}
|
||||
|
||||
speedbin = nvmem_cell_read(speedbin_nvmem, &len);
|
||||
nvmem_cell_put(speedbin_nvmem);
|
||||
if (IS_ERR(speedbin))
|
||||
return PTR_ERR(speedbin);
|
||||
|
||||
efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
|
||||
switch (efuse_value) {
|
||||
case 0b0001:
|
||||
*versions = 1;
|
||||
break;
|
||||
case 0b0011:
|
||||
*versions = 2;
|
||||
break;
|
||||
default:
|
||||
/*
|
||||
* For other situations, we treat it as bin0.
|
||||
* This vf table can be run for any good cpu.
|
||||
*/
|
||||
*versions = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
kfree(speedbin);
|
||||
return 0;
|
||||
};
|
||||
|
||||
static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct opp_table **opp_tables;
|
||||
char name[MAX_NAME_LEN];
|
||||
unsigned int cpu;
|
||||
u32 speed = 0;
|
||||
int ret;
|
||||
|
||||
opp_tables = kcalloc(num_possible_cpus(), sizeof(*opp_tables),
|
||||
GFP_KERNEL);
|
||||
if (!opp_tables)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = sun50i_cpufreq_get_efuse(&speed);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
snprintf(name, MAX_NAME_LEN, "speed%d", speed);
|
||||
|
||||
for_each_possible_cpu(cpu) {
|
||||
struct device *cpu_dev = get_cpu_device(cpu);
|
||||
|
||||
if (!cpu_dev) {
|
||||
ret = -ENODEV;
|
||||
goto free_opp;
|
||||
}
|
||||
|
||||
opp_tables[cpu] = dev_pm_opp_set_prop_name(cpu_dev, name);
|
||||
if (IS_ERR(opp_tables[cpu])) {
|
||||
ret = PTR_ERR(opp_tables[cpu]);
|
||||
pr_err("Failed to set prop name\n");
|
||||
goto free_opp;
|
||||
}
|
||||
}
|
||||
|
||||
cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
|
||||
NULL, 0);
|
||||
if (!IS_ERR(cpufreq_dt_pdev)) {
|
||||
platform_set_drvdata(pdev, opp_tables);
|
||||
return 0;
|
||||
}
|
||||
|
||||
ret = PTR_ERR(cpufreq_dt_pdev);
|
||||
pr_err("Failed to register platform device\n");
|
||||
|
||||
free_opp:
|
||||
for_each_possible_cpu(cpu) {
|
||||
if (IS_ERR_OR_NULL(opp_tables[cpu]))
|
||||
break;
|
||||
dev_pm_opp_put_prop_name(opp_tables[cpu]);
|
||||
}
|
||||
kfree(opp_tables);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sun50i_cpufreq_nvmem_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct opp_table **opp_tables = platform_get_drvdata(pdev);
|
||||
unsigned int cpu;
|
||||
|
||||
platform_device_unregister(cpufreq_dt_pdev);
|
||||
|
||||
for_each_possible_cpu(cpu)
|
||||
dev_pm_opp_put_prop_name(opp_tables[cpu]);
|
||||
|
||||
kfree(opp_tables);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver sun50i_cpufreq_driver = {
|
||||
.probe = sun50i_cpufreq_nvmem_probe,
|
||||
.remove = sun50i_cpufreq_nvmem_remove,
|
||||
.driver = {
|
||||
.name = "sun50i-cpufreq-nvmem",
|
||||
},
|
||||
};
|
||||
|
||||
static const struct of_device_id sun50i_cpufreq_match_list[] = {
|
||||
{ .compatible = "allwinner,sun50i-h6" },
|
||||
{}
|
||||
};
|
||||
|
||||
static const struct of_device_id *sun50i_cpufreq_match_node(void)
|
||||
{
|
||||
const struct of_device_id *match;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_path("/");
|
||||
match = of_match_node(sun50i_cpufreq_match_list, np);
|
||||
of_node_put(np);
|
||||
|
||||
return match;
|
||||
}
|
||||
|
||||
/*
|
||||
* Since the driver depends on nvmem drivers, which may return EPROBE_DEFER,
|
||||
* all the real activity is done in the probe, which may be defered as well.
|
||||
* The init here is only registering the driver and the platform device.
|
||||
*/
|
||||
static int __init sun50i_cpufreq_init(void)
|
||||
{
|
||||
const struct of_device_id *match;
|
||||
int ret;
|
||||
|
||||
match = sun50i_cpufreq_match_node();
|
||||
if (!match)
|
||||
return -ENODEV;
|
||||
|
||||
ret = platform_driver_register(&sun50i_cpufreq_driver);
|
||||
if (unlikely(ret < 0))
|
||||
return ret;
|
||||
|
||||
sun50i_cpufreq_pdev =
|
||||
platform_device_register_simple("sun50i-cpufreq-nvmem",
|
||||
-1, NULL, 0);
|
||||
ret = PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev);
|
||||
if (ret == 0)
|
||||
return 0;
|
||||
|
||||
platform_driver_unregister(&sun50i_cpufreq_driver);
|
||||
return ret;
|
||||
}
|
||||
module_init(sun50i_cpufreq_init);
|
||||
|
||||
static void __exit sun50i_cpufreq_exit(void)
|
||||
{
|
||||
platform_device_unregister(sun50i_cpufreq_pdev);
|
||||
platform_driver_unregister(&sun50i_cpufreq_driver);
|
||||
}
|
||||
module_exit(sun50i_cpufreq_exit);
|
||||
|
||||
MODULE_DESCRIPTION("Sun50i-h6 cpufreq driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -77,6 +77,7 @@ static unsigned long dra7_efuse_xlate(struct ti_cpufreq_data *opp_data,
|
|||
case DRA7_EFUSE_HAS_ALL_MPU_OPP:
|
||||
case DRA7_EFUSE_HAS_HIGH_MPU_OPP:
|
||||
calculated_efuse |= DRA7_EFUSE_HIGH_MPU_OPP;
|
||||
/* Fall through */
|
||||
case DRA7_EFUSE_HAS_OD_MPU_OPP:
|
||||
calculated_efuse |= DRA7_EFUSE_OD_MPU_OPP;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue