From 1c6fcc54eca96f2b7c35f6329949c4ae44979427 Mon Sep 17 00:00:00 2001
From: Jordan Crouse <jcrouse@codeaurora.org>
Date: Thu, 27 Feb 2020 10:33:28 -0700
Subject: [PATCH] msm: kgsl: Enable the CX GSDC before accessing IOMMU
 registers

If needed, the IOMMU device can define a CX GDSC to enable before
turning on clocks to directly write IOMMU registers.

Change-Id: Ic0dedbadc8479cc36d5603d6d8a2c93133fda668
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
 drivers/gpu/msm/kgsl_iommu.c | 10 ++++++++++
 drivers/gpu/msm/kgsl_iommu.h |  2 ++
 2 files changed, 12 insertions(+)

diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
index 18da7050d17e..d581b6932924 100644
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -11,6 +11,7 @@
 #include <linux/delay.h>
 #include <linux/qcom_scm.h>
 #include <linux/random.h>
+#include <linux/regulator/consumer.h>
 #include <soc/qcom/secure_buffer.h>
 
 #include "adreno.h"
@@ -762,6 +763,9 @@ static void kgsl_iommu_disable_clk(struct kgsl_mmu *mmu)
 	for (j = (KGSL_IOMMU_MAX_CLKS - 1); j >= 0; j--)
 		if (iommu->clks[j])
 			clk_disable_unprepare(iommu->clks[j]);
+
+	if (!IS_ERR_OR_NULL(iommu->cx_gdsc))
+		regulator_disable(iommu->cx_gdsc);
 }
 
 /*
@@ -789,6 +793,9 @@ static void kgsl_iommu_enable_clk(struct kgsl_mmu *mmu)
 	int j;
 	struct kgsl_iommu *iommu = _IOMMU_PRIV(mmu);
 
+	if (!IS_ERR_OR_NULL(iommu->cx_gdsc))
+		regulator_enable(iommu->cx_gdsc);
+
 	for (j = 0; j < KGSL_IOMMU_MAX_CLKS; j++) {
 		if (iommu->clks[j])
 			kgsl_iommu_clk_prepare_enable(iommu->clks[j]);
@@ -2572,6 +2579,9 @@ static int _kgsl_iommu_probe(struct kgsl_device *device,
 		iommu->clks[index++] = c;
 	}
 
+	/* Get the CX regulator if it is available */
+	iommu->cx_gdsc = devm_regulator_get(&pdev->dev, "vddcx");
+
 	for (i = 0; i < ARRAY_SIZE(kgsl_iommu_features); i++) {
 		if (of_property_read_bool(node, kgsl_iommu_features[i].feature))
 			device->mmu.features |= kgsl_iommu_features[i].bit;
diff --git a/drivers/gpu/msm/kgsl_iommu.h b/drivers/gpu/msm/kgsl_iommu.h
index c20b051f6a84..6de90ba47f95 100644
--- a/drivers/gpu/msm/kgsl_iommu.h
+++ b/drivers/gpu/msm/kgsl_iommu.h
@@ -131,6 +131,8 @@ struct kgsl_iommu {
 	u32 cb0_offset;
 	/** @pagesize: Size of each context bank register space */
 	u32 pagesize;
+	/** @cx_gdsc: CX GDSC handle in case the IOMMU needs it */
+	struct regulator *cx_gdsc;
 };
 
 /*