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[ARM] 4078/1: Fix ARM copypage cache coherency problems
If PG_dcache_dirty is set for a page, we need to flush the source page before performing any copypage operation using a different virtual address. This fixes the copypage implementations for XScale, StrongARM and ARMv6. This patch fixes segmentation faults seen in the dynamic linker under the usage patterns in glibc 2.4/2.5. Signed-off-by: Richard Purdie <[email protected]> Signed-off-by: Russell King <[email protected]>
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@ -355,6 +355,8 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
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*/
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extern void flush_dcache_page(struct page *);
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extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
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#define flush_dcache_mmap_lock(mapping) \
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write_lock_irq(&(mapping)->tree_lock)
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#define flush_dcache_mmap_unlock(mapping) \
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