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powerpc/64: flush_inval_dcache_range() becomes flush_dcache_range()
On most arches having function flush_dcache_range(), including PPC32, this function does a writeback and invalidation of the cache bloc. On PPC64, flush_dcache_range() only does a writeback while flush_inval_dcache_range() does the invalidation in addition. In addition it looks like within arch/powerpc/, there are no PPC64 platforms using flush_dcache_range() This patch drops the existing 64 bits version of flush_dcache_range() and renames flush_inval_dcache_range() into flush_dcache_range(). Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
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6 changed files with 11 additions and 35 deletions
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@ -133,7 +133,7 @@ static void smu_start_cmd(void)
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/* Flush command and data to RAM */
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faddr = (unsigned long)smu->cmd_buf;
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fend = faddr + smu->cmd_buf->length + 2;
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flush_inval_dcache_range(faddr, fend);
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flush_dcache_range(faddr, fend);
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/* We also disable NAP mode for the duration of the command
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@ -195,7 +195,7 @@ static irqreturn_t smu_db_intr(int irq, void *arg)
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* reply length (it's only 2 cache lines anyway)
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*/
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faddr = (unsigned long)smu->cmd_buf;
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flush_inval_dcache_range(faddr, faddr + 256);
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flush_dcache_range(faddr, faddr + 256);
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/* Now check ack */
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ack = (~cmd->cmd) & 0xff;
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