A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-11 07:03:09 -04:00
Code Issues Projects Releases Packages Wiki Activity

Merge "Merge android11-5.4.61+ (0d36496) into msm-5.4"

Browse source
This commit is contained in:
qctecmdr 2020-09-03 10:45:43 -07:00 • committed by Gerrit - the friendly Code Review server
commit 1d86c274d4
155 changed files with 10873 additions and 5615 deletions
Download patch file Download diff file Expand all files Collapse all files

1
Documentation/kbuild/index.rst
View file

@ -19,6 +19,7 @@ Kernel Build System
issues
reproducible-builds
llvm
.. only:: subproject and html

5
Documentation/kbuild/kbuild.rst
View file

@ -262,3 +262,8 @@ KBUILD_BUILD_USER, KBUILD_BUILD_HOST
These two variables allow to override the user@host string displayed during
boot and in /proc/version. The default value is the output of the commands
whoami and host, respectively.
LLVM
----
If this variable is set to 1, Kbuild will use Clang and LLVM utilities instead
of GCC and GNU binutils to build the kernel.

87
Documentation/kbuild/llvm.rst Normal file
View file

@ -0,0 +1,87 @@
==============================
Building Linux with Clang/LLVM
==============================
This document covers how to build the Linux kernel with Clang and LLVM
utilities.
About
-----
The Linux kernel has always traditionally been compiled with GNU toolchains
such as GCC and binutils. Ongoing work has allowed for `Clang
<https://clang.llvm.org/>`_ and `LLVM <https://llvm.org/>`_ utilities to be
used as viable substitutes. Distributions such as `Android
<https://www.android.com/>`_, `ChromeOS
<https://www.chromium.org/chromium-os>`_, and `OpenMandriva
<https://www.openmandriva.org/>`_ use Clang built kernels. `LLVM is a
collection of toolchain components implemented in terms of C++ objects
<https://www.aosabook.org/en/llvm.html>`_. Clang is a front-end to LLVM that
supports C and the GNU C extensions required by the kernel, and is pronounced
"klang," not "see-lang."
Clang
-----
The compiler used can be swapped out via `CC=` command line argument to `make`.
`CC=` should be set when selecting a config and during a build.
make CC=clang defconfig
make CC=clang
Cross Compiling
---------------
A single Clang compiler binary will typically contain all supported backends,
which can help simplify cross compiling.
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make CC=clang
`CROSS_COMPILE` is not used to prefix the Clang compiler binary, instead
`CROSS_COMPILE` is used to set a command line flag: `--target <triple>`. For
example:
clang --target aarch64-linux-gnu foo.c
LLVM Utilities
--------------
LLVM has substitutes for GNU binutils utilities. Kbuild supports `LLVM=1`
to enable them.
make LLVM=1
They can be enabled individually. The full list of the parameters:
make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \\
OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \\
READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \\
HOSTLD=ld.lld
Currently, the integrated assembler is disabled by default. You can pass
`LLVM_IAS=1` to enable it.
Getting Help
------------
- `Website <https://clangbuiltlinux.github.io/>`_
- `Mailing List <https://groups.google.com/forum/#!forum/clang-built-linux>`_: <clang-built-linux@googlegroups.com>
- `Issue Tracker <https://github.com/ClangBuiltLinux/linux/issues>`_
- IRC: #clangbuiltlinux on chat.freenode.net
- `Telegram <https://t.me/ClangBuiltLinux>`_: @ClangBuiltLinux
- `Wiki <https://github.com/ClangBuiltLinux/linux/wiki>`_
- `Beginner Bugs <https://github.com/ClangBuiltLinux/linux/issues?q=is%3Aopen+is%3Aissue+label%3A%22good+first+issue%22>`_
Getting LLVM
-------------
- http://releases.llvm.org/download.html
- https://github.com/llvm/llvm-project
- https://llvm.org/docs/GettingStarted.html
- https://llvm.org/docs/CMake.html
- https://apt.llvm.org/
- https://www.archlinux.org/packages/extra/x86_64/llvm/
- https://github.com/ClangBuiltLinux/tc-build
- https://github.com/ClangBuiltLinux/linux/wiki/Building-Clang-from-source
- https://android.googlesource.com/platform/prebuilts/clang/host/linux-x86/

1
MAINTAINERS
View file

@ -4028,6 +4028,7 @@ B: https://github.com/ClangBuiltLinux/linux/issues
C: irc://chat.freenode.net/clangbuiltlinux
S: Supported
K: \b(?i:clang|llvm)\b
F: Documentation/kbuild/llvm.rst
CLEANCACHE API
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

40
Makefile
View file

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 4
SUBLEVEL = 60
SUBLEVEL = 61
EXTRAVERSION =
NAME = Kleptomaniac Octopus
@ -394,8 +394,13 @@ HOST_LFS_CFLAGS := $(shell getconf LFS_CFLAGS 2>/dev/null)
HOST_LFS_LDFLAGS := $(shell getconf LFS_LDFLAGS 2>/dev/null)
HOST_LFS_LIBS := $(shell getconf LFS_LIBS 2>/dev/null)
HOSTCC = gcc
HOSTCXX = g++
ifneq ($(LLVM),)
HOSTCC = clang
HOSTCXX = clang++
else
HOSTCC = gcc
HOSTCXX = g++
endif
KBUILD_HOSTCFLAGS := -Wall -Wmissing-prototypes -Wstrict-prototypes -O2 \
-fomit-frame-pointer -std=gnu89 $(HOST_LFS_CFLAGS) \
$(HOSTCFLAGS)
@ -404,16 +409,28 @@ KBUILD_HOSTLDFLAGS := $(HOST_LFS_LDFLAGS) $(HOSTLDFLAGS)
KBUILD_HOSTLDLIBS := $(HOST_LFS_LIBS) $(HOSTLDLIBS)
# Make variables (CC, etc...)
AS = $(CROSS_COMPILE)as
LD = $(CROSS_COMPILE)ld
REAL_CC = $(CROSS_COMPILE)gcc
CPP = $(CC) -E
ifneq ($(LLVM),)
REAL_CC = clang
LD = ld.lld
AR = llvm-ar
NM = llvm-nm
OBJCOPY = llvm-objcopy
OBJDUMP = llvm-objdump
READELF = llvm-readelf
OBJSIZE = llvm-size
STRIP = llvm-strip
else
REAL_CC = $(CROSS_COMPILE)gcc
LD = $(CROSS_COMPILE)ld
AR = $(CROSS_COMPILE)ar
NM = $(CROSS_COMPILE)nm
STRIP = $(CROSS_COMPILE)strip
OBJCOPY = $(CROSS_COMPILE)objcopy
OBJDUMP = $(CROSS_COMPILE)objdump
READELF = $(CROSS_COMPILE)readelf
OBJSIZE = $(CROSS_COMPILE)size
STRIP = $(CROSS_COMPILE)strip
endif
PAHOLE = pahole
LEX = flex
YACC = bison
@ -422,7 +439,6 @@ INSTALLKERNEL := installkernel
DEPMOD = /sbin/depmod
PERL = perl
PYTHON = python
PYTHON2 = python2
PYTHON3 = python3
CHECK = sparse
BASH = bash
@ -479,9 +495,9 @@ KBUILD_LDFLAGS :=
GCC_PLUGINS_CFLAGS :=
CLANG_FLAGS :=
export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE AS LD CC
export CPP AR NM STRIP OBJCOPY OBJDUMP OBJSIZE PAHOLE LEX YACC AWK INSTALLKERNEL
export PERL PYTHON PYTHON2 PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX
export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC
export CPP AR NM STRIP OBJCOPY OBJDUMP OBJSIZE READELF PAHOLE LEX YACC AWK INSTALLKERNEL
export PERL PYTHON PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX
export KBUILD_HOSTCXXFLAGS KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS LDFLAGS_MODULE
export KBUILD_CPPFLAGS NOSTDINC_FLAGS LINUXINCLUDE OBJCOPYFLAGS KBUILD_LDFLAGS
@ -548,7 +564,7 @@ endif
ifneq ($(GCC_TOOLCHAIN),)
CLANG_FLAGS += --gcc-toolchain=$(GCC_TOOLCHAIN)
endif
ifeq ($(shell $(AS) --version 2>&1 | head -n 1 | grep clang),)
ifneq ($(LLVM_IAS),1)
CLANG_FLAGS += -no-integrated-as
endif
CLANG_FLAGS += -Werror=unknown-warning-option

7364
android/abi_gki_aarch64.xml
View file

File diff suppressed because it is too large Load diff

3058
android/abi_gki_aarch64_8ae87ad4df.xml → android/abi_gki_aarch64_d6430e6763.xml
View file

File diff suppressed because it is too large Load diff

832
android/abi_gki_aarch64_db845c
View file

@ -419,21 +419,74 @@
__warn_printk
watchdog_init_timeout
# required by regmap-spmi.ko
__devm_regmap_init
__regmap_init
spmi_ext_register_read
spmi_ext_register_readl
spmi_ext_register_write
spmi_ext_register_writel
spmi_register_read
spmi_register_write
spmi_register_zero_write
# required by arm_smmu.ko
alloc_io_pgtable_ops
amba_bustype
bus_set_iommu
device_link_add
device_match_fwnode
devm_free_irq
driver_find_device
free_io_pgtable_ops
generic_device_group
iommu_alloc_resv_region
iommu_device_link
iommu_device_register
iommu_device_sysfs_add
iommu_device_sysfs_remove
iommu_device_unlink
iommu_device_unregister
iommu_dma_get_resv_regions
iommu_fwspec_add_ids
iommu_fwspec_free
iommu_get_dma_cookie
iommu_group_get_for_dev
iommu_group_put
iommu_group_ref_get
iommu_group_remove_device
iommu_put_dma_cookie
of_dma_is_coherent
pci_device_group
__udelay
# required by clk-scmi.ko
clk_hw_set_rate_range
scmi_driver_register
scmi_driver_unregister
# required by asix.ko
eth_mac_addr
eth_platform_get_mac_address
genphy_resume
get_random_bytes
mdiobus_alloc_size
mdiobus_free
__mdiobus_register
mdiobus_unregister
memmove
mii_check_media
mii_link_ok
netdev_err
phy_connect
phy_disconnect
phy_ethtool_get_link_ksettings
phy_ethtool_nway_reset
phy_ethtool_set_link_ksettings
phy_mii_ioctl
phy_print_status
phy_start
phy_stop
skb_copy_expand
usbnet_change_mtu
usbnet_get_drvinfo
usbnet_get_link
usbnet_get_link_ksettings
usbnet_set_link_ksettings
usbnet_unlink_rx_urbs
# required by ax88179_178a.ko
ethtool_op_get_link
mii_ethtool_get_link_ksettings
mii_ethtool_set_link_ksettings
netif_carrier_on
pskb_expand_head
skb_pull
skb_trim
# required by clk-qcom.ko
__clk_determine_rate
@ -454,6 +507,40 @@
# required by clk-rpmh.ko
clk_hw_is_prepared
# required by clk-scmi.ko
clk_hw_set_rate_range
scmi_driver_register
scmi_driver_unregister
# required by dwc3-qcom.ko
devm_extcon_register_notifier
of_clk_get_parent_count
# required by dwc3.ko
dev_fwnode
device_property_read_string
device_property_read_u8_array
devm_usb_get_phy
extcon_find_edev_by_node
extcon_get_extcon_dev
of_usb_get_phy_mode
phy_pm_runtime_get_sync
phy_pm_runtime_put_sync
platform_get_irq_byname_optional
system_freezable_wq
usb_add_gadget_udc
usb_decode_ctrl
usb_del_gadget_udc
usb_ep_set_maxpacket_limit
usb_gadget_giveback_request
usb_gadget_map_request_by_dev
usb_gadget_set_state
usb_gadget_udc_reset
usb_gadget_unmap_request_by_dev
usb_get_maximum_speed
usb_role_switch_register
usb_role_switch_unregister
# required by extcon-usb-gpio.ko
devm_extcon_dev_allocate
devm_extcon_dev_register
@ -463,8 +550,100 @@
gpiod_to_irq
system_power_efficient_wq
# required by qcom-scm-64.ko
__arm_smccc_smc
# required by i2c-qcom-geni.ko
i2c_get_dma_safe_msg_buf
i2c_put_dma_safe_msg_buf
of_machine_is_compatible
# required by i2c-qup.ko
param_ops_uint
__usecs_to_jiffies
# required by incrementalfs.ko
bcmp
bin2hex
__break_lease
clear_inode
__close_fd
crypto_alloc_shash
crypto_destroy_tfm
crypto_shash_digest
d_add
d_drop
deactivate_locked_super
dentry_open
dget_parent
d_instantiate
d_make_root
down_write
dput
fget
flush_dcache_page
flush_delayed_work
free_pages
fs_kobj
fsstack_copy_attr_all
generic_file_llseek
generic_file_mmap
generic_file_read_iter
generic_file_splice_read
generic_read_dir
generic_shutdown_super
__get_free_pages
get_zeroed_page
iget5_locked
ihold
inode_init_once
inode_init_owner
iput
iterate_dir
kernel_read
kernel_write
kern_path
kobject_create_and_add
kobject_put
lockref_get
lock_rename
lookup_one_len
LZ4_decompress_safe
match_int
match_token
noop_llseek
notify_change
pagecache_get_page
path_get
path_put
__put_cred
__put_page
register_filesystem
set_anon_super
sget
simple_getattr
simple_setattr
simple_statfs
strndup_user
strsep
sync_filesystem
sysfs_create_group
sysfs_remove_group
truncate_inode_pages
unlock_new_inode
unlock_page
unlock_rename
unregister_filesystem
up_write
user_path_at_empty
vfs_create
vfs_fallocate
vfs_getattr
vfs_getxattr
vfs_link
vfs_listxattr
vfs_mkdir
vfs_rename
vfs_rmdir
vfs_setxattr
vfs_unlink
# required by lt9611.ko
__devm_regmap_init_i2c
@ -481,6 +660,9 @@
of_find_mipi_dsi_host_by_node
regmap_multi_reg_write
# required by mdt_loader.ko
request_firmware_into_buf
# required by msm.ko
alloc_workqueue
__bitmap_andnot
@ -788,136 +970,33 @@
ww_mutex_lock_interruptible
ww_mutex_unlock
# required by qcom_hwspinlock.ko
devm_regmap_field_alloc
hwspin_lock_register
hwspin_lock_unregister
regmap_field_read
regmap_field_update_bits_base
# required by i2c-qcom-geni.ko
i2c_get_dma_safe_msg_buf
i2c_put_dma_safe_msg_buf
of_machine_is_compatible
# required by i2c-qup.ko
param_ops_uint
__usecs_to_jiffies
# required by pm8941-pwrkey.ko
devm_input_allocate_device
input_event
input_register_device
input_set_capability
# required by qnoc-sdm845.ko
icc_link_create
icc_node_add
icc_node_create
icc_node_del
icc_node_destroy
icc_provider_add
icc_provider_del
of_icc_xlate_onecell
# required by arm_smmu.ko
alloc_io_pgtable_ops
amba_bustype
bus_set_iommu
device_link_add
device_match_fwnode
devm_free_irq
driver_find_device
free_io_pgtable_ops
generic_device_group
iommu_alloc_resv_region
iommu_device_link
iommu_device_register
iommu_device_sysfs_add
iommu_device_sysfs_remove
iommu_device_unlink
iommu_device_unregister
iommu_dma_get_resv_regions
iommu_fwspec_add_ids
iommu_fwspec_free
iommu_get_dma_cookie
iommu_group_get_for_dev
iommu_group_put
iommu_group_ref_get
iommu_group_remove_device
iommu_put_dma_cookie
of_dma_is_coherent
pci_device_group
__udelay
# required by qcom-pdc.ko
irq_chip_get_parent_state
irq_chip_retrigger_hierarchy
irq_chip_set_affinity_parent
irq_chip_set_vcpu_affinity_parent
irq_domain_alloc_irqs_parent
irq_domain_create_hierarchy
irq_domain_set_hwirq_and_chip
irq_domain_update_bus_token
# required by qcom-spmi-pmic.ko
__spmi_driver_register
# required by sdhci-msm.ko
mmc_of_parse
mmc_send_tuning
regulator_is_supported_voltage
sdhci_add_host
sdhci_enable_clk
sdhci_get_property
sdhci_pltfm_free
sdhci_pltfm_init
sdhci_remove_host
sdhci_reset
sdhci_set_bus_width
# required by asix.ko
eth_mac_addr
eth_platform_get_mac_address
genphy_resume
get_random_bytes
mdiobus_alloc_size
mdiobus_free
__mdiobus_register
mdiobus_unregister
memmove
mii_check_media
mii_link_ok
netdev_err
phy_connect
phy_disconnect
phy_ethtool_get_link_ksettings
phy_ethtool_nway_reset
phy_ethtool_set_link_ksettings
phy_mii_ioctl
phy_print_status
phy_start
phy_stop
skb_copy_expand
usbnet_change_mtu
usbnet_get_drvinfo
usbnet_get_link
usbnet_get_link_ksettings
usbnet_set_link_ksettings
usbnet_unlink_rx_urbs
# required by ax88179_178a.ko
ethtool_op_get_link
mii_ethtool_get_link_ksettings
mii_ethtool_set_link_ksettings
netif_carrier_on
pskb_expand_head
skb_pull
skb_trim
# required by msm_serial.ko
iomem_resource
__release_region
__request_region
tty_termios_baud_rate
tty_termios_encode_baud_rate
# required by nvmem_qfprom.ko
devm_nvmem_register
# required by ohci-hcd.ko
flush_work
gen_pool_dma_alloc_align
gen_pool_dma_zalloc_align
gen_pool_free_owner
sb800_prefetch
usb_calc_bus_time
usb_hcds_loaded
# required by ohci-pci.ko
pci_get_slot
pci_match_id
usb_amd_prefetch_quirk
# required by ohci-platform.ko
usb_create_hcd
# required by phy-qcom-qmp.ko
of_clk_get_by_name
of_clk_hw_simple_get
@ -954,101 +1033,35 @@
# required by pinctrl-spmi-mpp.ko
platform_irq_count
# required by reboot-mode.ko
devres_add
devres_alloc_node
devres_free
devres_release
kfree_const
kstrdup_const
# required by pm8941-pwrkey.ko
devm_input_allocate_device
input_event
input_register_device
input_set_capability
# required by qcom-pdc.ko
irq_chip_get_parent_state
irq_chip_retrigger_hierarchy
irq_chip_set_affinity_parent
irq_chip_set_vcpu_affinity_parent
irq_domain_alloc_irqs_parent
irq_domain_create_hierarchy
irq_domain_set_hwirq_and_chip
irq_domain_update_bus_token
# required by qcom-rpmh-regulator.ko
of_get_regulator_init_data
of_node_name_eq
regulator_list_voltage_linear_range
# required by qcom_spmi-regulator.ko
jiffies_to_usecs
regulator_disable_regmap
regulator_enable_regmap
regulator_is_enabled_regmap
smp_call_function_single
# required by qcom-scm-64.ko
__arm_smccc_smc
# required by rtc-pm8xxx.ko
devm_request_any_context_irq
devm_rtc_device_register
rtc_time64_to_tm
rtc_tm_to_time64
rtc_update_irq
rtc_valid_tm
# required by qcom-spmi-pmic.ko
__spmi_driver_register
# required by ufs-qcom.ko
print_hex_dump
ufshcd_dme_get_attr
ufshcd_dme_set_attr
ufshcd_dump_regs
ufshcd_get_local_unipro_ver
ufshcd_get_pwr_dev_param
ufshcd_hold
ufshcd_pltfrm_init
ufshcd_pltfrm_resume
ufshcd_pltfrm_runtime_idle
ufshcd_pltfrm_runtime_resume
ufshcd_pltfrm_runtime_suspend
ufshcd_pltfrm_shutdown
ufshcd_pltfrm_suspend
ufshcd_release
ufshcd_remove
ufshcd_uic_hibern8_enter
ufshcd_uic_hibern8_exit
# required by mdt_loader.ko
request_firmware_into_buf
# required by qcom_rpmh.ko
bitmap_find_next_zero_area_off
__bitmap_set
of_get_property
# required by rmtfs_mem.ko
alloc_chrdev_region
cdev_device_add
cdev_device_del
cdev_init
__class_register
class_unregister
default_llseek
device_initialize
devm_memremap
remap_pfn_range
unregister_chrdev_region
# required by smem.ko
devm_ioremap_wc
hwspin_lock_free
hwspin_lock_request_specific
__hwspin_lock_timeout
__hwspin_unlock
of_hwspin_lock_get_id
# required by smsm.ko
handle_nested_irq
irq_domain_xlate_twocell
qcom_smem_state_register
qcom_smem_state_unregister
# required by spmi-pmic-arb.ko
irq_domain_set_info
spmi_controller_add
spmi_controller_alloc
spmi_controller_remove
# required by msm_serial.ko
iomem_resource
__release_region
__request_region
tty_termios_baud_rate
tty_termios_encode_baud_rate
# required by qcom-wdt.ko
platform_get_irq_optional
# required by qcom_geni_serial.ko
console_stop
@ -1064,196 +1077,34 @@
uart_parse_options
uart_set_options
# required by ulpi.ko
add_uevent_var
bus_register
bus_unregister
device_register
device_unregister
driver_register
of_device_modalias
of_device_request_module
of_device_uevent_modalias
__request_module
# required by qcom_hwspinlock.ko
devm_regmap_field_alloc
hwspin_lock_register
hwspin_lock_unregister
regmap_field_read
regmap_field_update_bits_base
# required by dwc3-qcom.ko
devm_extcon_register_notifier
of_clk_get_parent_count
# required by qcom_rpmh.ko
bitmap_find_next_zero_area_off
__bitmap_set
of_get_property
# required by dwc3.ko
dev_fwnode
device_property_read_string
device_property_read_u8_array
devm_usb_get_phy
extcon_find_edev_by_node
extcon_get_extcon_dev
of_usb_get_phy_mode
phy_pm_runtime_get_sync
phy_pm_runtime_put_sync
platform_get_irq_byname_optional
system_freezable_wq
usb_add_gadget_udc
usb_decode_ctrl
usb_del_gadget_udc
usb_ep_set_maxpacket_limit
usb_gadget_giveback_request
usb_gadget_map_request_by_dev
usb_gadget_set_state
usb_gadget_udc_reset
usb_gadget_unmap_request_by_dev
usb_get_maximum_speed
usb_role_switch_register
usb_role_switch_unregister
# required by qcom_spmi-regulator.ko
jiffies_to_usecs
regulator_disable_regmap
regulator_enable_regmap
regulator_is_enabled_regmap
smp_call_function_single
# required by ohci-hcd.ko
flush_work
gen_pool_dma_alloc_align
gen_pool_dma_zalloc_align
gen_pool_free_owner
sb800_prefetch
usb_calc_bus_time
usb_hcds_loaded
# required by ohci-pci.ko
pci_get_slot
pci_match_id
usb_amd_prefetch_quirk
# required by ohci-platform.ko
usb_create_hcd
# required by xhci-hcd.ko
add_timer
cancel_delayed_work
mod_delayed_work_on
__num_online_cpus
param_ops_ullong
pci_alloc_irq_vectors_affinity
pci_free_irq_vectors
pci_irq_vector
radix_tree_maybe_preload
sg_pcopy_from_buffer
sg_pcopy_to_buffer
trace_print_symbols_seq
usb_amd_pt_check_port
usb_asmedia_modifyflowcontrol
usb_disable_xhci_ports
usb_hcd_end_port_resume
usb_hcd_irq
usb_hcd_map_urb_for_dma
usb_hcd_start_port_resume
usb_hub_clear_tt_buffer
usb_wakeup_notification
wait_for_completion
# required by xhci-pci-renesas.ko
device_release_driver
pci_dev_get
pci_read_config_dword
pci_read_config_word
pci_write_config_byte
pci_write_config_dword
request_firmware_nowait
# required by xhci-pci.ko
pci_d3cold_disable
pci_set_mwi
pci_set_power_state
usb_create_shared_hcd
usb_enable_intel_xhci_ports
# required by xhci-plat-hcd.ko
of_usb_host_tpl_support
__usb_create_hcd
# required by qcom-wdt.ko
platform_get_irq_optional
# required by incrementalfs.ko
bcmp
bin2hex
__break_lease
clear_inode
__close_fd
crypto_alloc_shash
crypto_destroy_tfm
crypto_shash_digest
d_add
d_drop
deactivate_locked_super
dentry_open
dget_parent
d_instantiate
d_make_root
down_write
dput
fget
flush_dcache_page
flush_delayed_work
free_pages
fs_kobj
fsstack_copy_attr_all
generic_file_llseek
generic_file_mmap
generic_file_read_iter
generic_file_splice_read
generic_read_dir
generic_shutdown_super
__get_free_pages
get_zeroed_page
iget5_locked
ihold
inode_init_once
inode_init_owner
iput
iterate_dir
kernel_read
kernel_write
kern_path
kobject_create_and_add
kobject_put
lockref_get
lock_rename
lookup_one_len
LZ4_decompress_safe
match_int
match_token
noop_llseek
notify_change
pagecache_get_page
path_get
path_put
__put_cred
__put_page
register_filesystem
set_anon_super
sget
simple_getattr
simple_setattr
simple_statfs
strndup_user
strsep
sync_filesystem
sysfs_create_group
sysfs_remove_group
truncate_inode_pages
unlock_new_inode
unlock_page
unlock_rename
unregister_filesystem
up_write
user_path_at_empty
vfs_create
vfs_fallocate
vfs_getattr
vfs_getxattr
vfs_link
vfs_listxattr
vfs_mkdir
vfs_rename
vfs_rmdir
vfs_setxattr
vfs_unlink
# required by qnoc-sdm845.ko
icc_link_create
icc_node_add
icc_node_create
icc_node_del
icc_node_destroy
icc_provider_add
icc_provider_del
of_icc_xlate_onecell
# required by qrtr-tun.ko
_copy_to_iter
@ -1305,6 +1156,73 @@
sock_register
sock_unregister
# required by reboot-mode.ko
devres_add
devres_alloc_node
devres_free
devres_release
kfree_const
kstrdup_const
# required by regmap-spmi.ko
__devm_regmap_init
__regmap_init
spmi_ext_register_read
spmi_ext_register_readl
spmi_ext_register_write
spmi_ext_register_writel
spmi_register_read
spmi_register_write
spmi_register_zero_write
# required by rmtfs_mem.ko
alloc_chrdev_region
cdev_device_add
cdev_device_del
cdev_init
__class_register
class_unregister
default_llseek
device_initialize
devm_memremap
remap_pfn_range
unregister_chrdev_region
# required by rtc-pm8xxx.ko
devm_request_any_context_irq
devm_rtc_device_register
rtc_time64_to_tm
rtc_tm_to_time64
rtc_update_irq
rtc_valid_tm
# required by sdhci-msm.ko
mmc_of_parse
mmc_send_tuning
regulator_is_supported_voltage
sdhci_add_host
sdhci_enable_clk
sdhci_get_property
sdhci_pltfm_free
sdhci_pltfm_init
sdhci_remove_host
sdhci_reset
sdhci_set_bus_width
# required by smem.ko
devm_ioremap_wc
hwspin_lock_free
hwspin_lock_request_specific
__hwspin_lock_timeout
__hwspin_unlock
of_hwspin_lock_get_id
# required by smsm.ko
handle_nested_irq
irq_domain_xlate_twocell
qcom_smem_state_register
qcom_smem_state_unregister
# required by snd-soc-hdmi-codec.ko
devm_snd_soc_register_component
snd_ctl_add
@ -1315,3 +1233,85 @@
snd_pcm_hw_constraint_eld
snd_soc_dapm_add_routes
snd_soc_jack_report
# required by spmi-pmic-arb.ko
irq_domain_set_info
spmi_controller_add
spmi_controller_alloc
spmi_controller_remove
# required by ufs-qcom.ko
print_hex_dump
ufshcd_dme_get_attr
ufshcd_dme_set_attr
ufshcd_dump_regs
ufshcd_get_local_unipro_ver
ufshcd_get_pwr_dev_param
ufshcd_hold
ufshcd_pltfrm_init
ufshcd_pltfrm_resume
ufshcd_pltfrm_runtime_idle
ufshcd_pltfrm_runtime_resume
ufshcd_pltfrm_runtime_suspend
ufshcd_pltfrm_shutdown
ufshcd_pltfrm_suspend
ufshcd_release
ufshcd_remove
ufshcd_uic_hibern8_enter
ufshcd_uic_hibern8_exit
# required by ulpi.ko
add_uevent_var
bus_register
bus_unregister
device_register
device_unregister
driver_register
of_device_modalias
of_device_request_module
of_device_uevent_modalias
__request_module
# required by xhci-hcd.ko
add_timer
cancel_delayed_work
mod_delayed_work_on
__num_online_cpus
param_ops_ullong
pci_alloc_irq_vectors_affinity
pci_free_irq_vectors
pci_irq_vector
radix_tree_maybe_preload
sg_pcopy_from_buffer
sg_pcopy_to_buffer
trace_print_symbols_seq
usb_amd_pt_check_port
usb_asmedia_modifyflowcontrol
usb_disable_xhci_ports
usb_hcd_end_port_resume
usb_hcd_irq
usb_hcd_map_urb_for_dma
usb_hcd_start_port_resume
usb_hub_clear_tt_buffer
usb_wakeup_notification
wait_for_completion
# required by xhci-pci-renesas.ko
device_release_driver
pci_dev_get
pci_read_config_dword
pci_read_config_word
pci_write_config_byte
pci_write_config_dword
request_firmware_nowait
# required by xhci-pci.ko
pci_d3cold_disable
pci_set_mwi
pci_set_power_state
usb_create_shared_hcd
usb_enable_intel_xhci_ports
# required by xhci-plat-hcd.ko
of_usb_host_tpl_support
__usb_create_hcd

1170
android/abi_gki_aarch64_hikey960
View file

File diff suppressed because it is too large Load diff

7
android/abi_gki_aarch64_qcom
View file

@ -1129,6 +1129,10 @@
input_unregister_device
input_unregister_handle
input_unregister_handler
interval_tree_insert
interval_tree_iter_first
interval_tree_iter_next
interval_tree_remove
int_to_scsilun
invalidate_mapping_pages
iomem_resource
@ -1212,6 +1216,7 @@
irq_get_irq_data
irq_modify_status
irq_of_parse_and_map
irq_work_queue
irq_set_affinity_hint
irq_set_affinity_notifier
irq_set_chained_handler_and_data
@ -1365,6 +1370,7 @@
__media_device_register
media_device_unregister
media_entity_pads_init
memblock_free
memchr
memcmp
memcpy
@ -2803,6 +2809,7 @@
wiphy_new_nm
wiphy_register
wiphy_unregister
wireless_send_event
woken_wake_function
work_busy
would_dump

112
android/abi_gki_aarch64_sunxi
View file

@ -15,13 +15,16 @@
# required by sunxi_pinctrl.ko
handle_fasteoi_irq
pinctrl_gpio_direction_output
pinctrl_gpio_direction_input
gpiochip_generic_config
# required by sunxi_uart.ko
uart_get_divisor
uart_handle_cts_change
uart_handle_dcd_change
unregister_console
uart_insert_char
uart_insert_char
# required by timer-sunxi.ko
clockevents_config_and_register
@ -88,6 +91,7 @@
snd_soc_register_card
snd_soc_dai_set_clkdiv
snd_soc_dai_set_pll
snd_dmaengine_pcm_open
# required by xr829.ko
bridge_tunnel_header
@ -114,6 +118,7 @@
round_jiffies_relative
sdio_align_size
__sw_hweight16
device_move
# required by arc4.ko
arc4_crypt
@ -158,6 +163,9 @@
vb2_ioctl_streamon
vb2_ops_wait_finish
vb2_ops_wait_prepare
vb2_dma_contig_clear_max_seg_size
vb2_dma_contig_memops
vb2_dma_contig_set_max_seg_size
# required by videobuf2-memops.ko
frame_vector_create
@ -192,3 +200,105 @@
__wait_on_buffer
io_schedule
is_bad_inode
# required by sunxi-keyboard.ko
iio_map_array_register
iio_map_array_unregister
# required by sunxi*.ko
__irq_alloc_domain_generic_chips
clk_unregister_fixed_factor
clk_unregister_fixed_rate
clk_unregister_gate
cpufreq_dbs_governor_exit
cpufreq_dbs_governor_init
cpufreq_dbs_governor_limits
cpufreq_dbs_governor_start
cpufreq_dbs_governor_stop
dbs_update
filp_close
get_cpu_idle_time_us
gov_update_cpu_data
irq_gc_ack_set_bit
irq_gc_mask_clr_bit
irq_gc_mask_set_bit
irq_generic_chip_ops
irq_get_domain_generic_chip
irq_setup_alt_chip
rfkill_set_states
store_sampling_rate
usb_hcds_loaded
# required by smsc95xx.ko
crc16
device_set_wakeup_enable
of_get_mac_address
usbnet_defer_kevent
# required by microchip.ko
__genphy_config_aneg
genphy_suspend
__mdiobus_read
mdiobus_read
__mdiobus_write
mdiobus_write
phy_drivers_register
phy_drivers_unregister
phy_read_mmd
phy_restore_page
phy_save_page
phy_write_mmd
# required by smsc75xx.ko
crc16
device_set_wakeup_enable
of_get_mac_address
usbnet_defer_kevent
# required by rtl8150.ko
ethtool_convert_legacy_u32_to_link_mode
# required by lan78xx.ko
__bitmap_or
device_set_wakeup_enable
fixed_phy_register
fixed_phy_unregister
__genphy_config_aneg
genphy_read_status
irq_domain_add_simple
mdiobus_read
mdiobus_write
of_mdiobus_register
phy_connect_direct
phy_ethtool_get_eee
phy_ethtool_ksettings_get
phy_ethtool_ksettings_set
phy_ethtool_set_eee
phy_ethtool_set_wol
phy_find_first
phy_read_mmd
phy_register_fixup_for_uid
phy_remove_link_mode
phy_unregister_fixup_for_uid
phy_write_mmd
usb_scuttle_anchored_urbs
# required by uas.ko
usb_wait_anchor_empty_timeout
usb_free_streams
usb_alloc_streams
# required by echi-pci.ko
ehci_init_driver
ehci_resume
ehci_setup
ehci_suspend
# required by xradio_btlpm.ko
bt_err
bt_info
# required by sun6i-dma.ko
dma_get_any_slave_channel

3
android/abi_gki_aarch64_unisoc
View file

@ -2484,3 +2484,6 @@
ufshcd_pltfrm_shutdown
ufshcd_pltfrm_suspend
ufshcd_remove
# required by sprd_sip_svc.ko
__arm_smccc_smc

8
arch/alpha/include/asm/io.h
View file

@ -502,10 +502,10 @@ extern inline void writeq(u64 b, volatile void __iomem *addr)
}
#endif
#define ioread16be(p) be16_to_cpu(ioread16(p))
#define ioread32be(p) be32_to_cpu(ioread32(p))
#define iowrite16be(v,p) iowrite16(cpu_to_be16(v), (p))
#define iowrite32be(v,p) iowrite32(cpu_to_be32(v), (p))
#define ioread16be(p) swab16(ioread16(p))
#define ioread32be(p) swab32(ioread32(p))
#define iowrite16be(v,p) iowrite16(swab16(v), (p))
#define iowrite32be(v,p) iowrite32(swab32(v), (p))
#define inb_p inb
#define inw_p inw

2
arch/arm/include/asm/kvm_host.h
View file

@ -266,7 +266,7 @@ int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
#define KVM_ARCH_WANT_MMU_NOTIFIER
int kvm_unmap_hva_range(struct kvm *kvm,
unsigned long start, unsigned long end);
unsigned long start, unsigned long end, unsigned flags);
int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);

1
arch/arm64/Makefile
View file

@ -161,6 +161,7 @@ zinstall install:
PHONY += vdso_install
vdso_install:
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso $@
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@
# We use MRPROPER_FILES and CLEAN_FILES now
archclean:

2
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
View file

@ -597,7 +597,6 @@
function = "csi";
};
/omit-if-no-ref/
csi_mclk_pin: csi-mclk-pin {
pins = "PE1";
function = "csi";
@ -613,7 +612,6 @@
function = "i2c1";
};
/omit-if-no-ref/
lcd_rgb666_pins: lcd-rgb666-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD6", "PD7", "PD8", "PD9",

1
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
View file

@ -281,7 +281,6 @@
bias-pull-up;
};
/omit-if-no-ref/
mmc1_pins: mmc1-pins {
pins = "PG0", "PG1", "PG2", "PG3",
"PG4", "PG5";

2
arch/arm64/configs/db845c_gki.fragment
View file

@ -1,8 +1,6 @@
CONFIG_QRTR=m
CONFIG_QRTR_TUN=m
CONFIG_SCSI_UFS_QCOM=m
CONFIG_USB_NET_AX8817X=m
CONFIG_USB_NET_AX88179_178A=m
CONFIG_INPUT_PM8941_PWRKEY=m
CONFIG_SERIAL_MSM=m
CONFIG_SERIAL_QCOM_GENI=m

15
arch/arm64/configs/gki_defconfig
View file

@ -45,6 +45,7 @@ CONFIG_SLAB_FREELIST_RANDOM=y
CONFIG_SLAB_FREELIST_HARDENED=y
CONFIG_SHUFFLE_PAGE_ALLOCATOR=y
CONFIG_PROFILING=y
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_HISI=y
CONFIG_ARCH_QCOM=y
CONFIG_SCHED_MC=y
@ -233,6 +234,8 @@ CONFIG_FW_LOADER_USER_HELPER=y
CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
# CONFIG_FW_CACHE is not set
# CONFIG_ALLOW_DEV_COREDUMP is not set
# CONFIG_SUN50I_DE2_BUS is not set
# CONFIG_SUNXI_RSB is not set
CONFIG_GNSS=y
CONFIG_ZRAM=y
CONFIG_BLK_DEV_LOOP=y
@ -325,6 +328,14 @@ CONFIG_SPI=y
CONFIG_SPMI=y
# CONFIG_SPMI_MSM_PMIC_ARB is not set
CONFIG_PINCTRL_AMD=y
# CONFIG_PINCTRL_SUN8I_H3_R is not set
# CONFIG_PINCTRL_SUN50I_A64 is not set
# CONFIG_PINCTRL_SUN50I_A64_R is not set
# CONFIG_PINCTRL_SUN50I_A100 is not set
# CONFIG_PINCTRL_SUN50I_A100_R is not set
# CONFIG_PINCTRL_SUN50I_H5 is not set
# CONFIG_PINCTRL_SUN50I_H6 is not set
# CONFIG_PINCTRL_SUN50I_H6_R is not set
CONFIG_POWER_AVS=y
CONFIG_POWER_RESET_HISI=y
# CONFIG_HWMON is not set
@ -423,7 +434,11 @@ CONFIG_ANDROID_VSOC=y
CONFIG_ION=y
CONFIG_ION_SYSTEM_HEAP=y
CONFIG_COMMON_CLK_SCPI=y
# CONFIG_CLK_SUNXI is not set
# CONFIG_SUNXI_CCU is not set
CONFIG_HWSPINLOCK=y
# CONFIG_SUN50I_ERRATUM_UNKNOWN1 is not set
CONFIG_MTK_TIMER=y
CONFIG_MAILBOX=y
CONFIG_IOMMU_LIMIT_IOVA_ALIGNMENT=y
CONFIG_REMOTEPROC=y

1
arch/arm64/configs/hikey960_gki.fragment
View file

@ -10,7 +10,6 @@ CONFIG_WL18XX=m
CONFIG_WLCORE_SDIO=m
CONFIG_INPUT_HISI_POWERKEY=m
CONFIG_SERIO_AMBAKMI=m
CONFIG_SERIAL_8250_DW=m
CONFIG_I2C_DESIGNWARE_PLATFORM=m
CONFIG_SPI_PL022=m
CONFIG_SPI_SPIDEV=m

2
arch/arm64/include/asm/kvm_host.h
View file

@ -427,7 +427,7 @@ int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
#define KVM_ARCH_WANT_MMU_NOTIFIER
int kvm_unmap_hva_range(struct kvm *kvm,
unsigned long start, unsigned long end);
unsigned long start, unsigned long end, unsigned flags);
int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);

3
arch/arm64/kernel/smp.c
View file

@ -55,6 +55,8 @@
#define CREATE_TRACE_POINTS
#include <trace/events/ipi.h>
#undef CREATE_TRACE_POINTS
#include <trace/hooks/debug.h>
DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
EXPORT_PER_CPU_SYMBOL(cpu_number);
@ -931,6 +933,7 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
break;
case IPI_CPU_STOP:
trace_android_vh_ipi_stop(regs);
irq_enter();
local_cpu_stop();
irq_exit();

2
arch/arm64/kernel/vdso32/Makefile
View file

@ -201,7 +201,7 @@ quiet_cmd_vdsosym = VDSOSYM $@
cmd_vdsosym = $(NM) $< | $(gen-vdsosym) | LC_ALL=C sort > $@
# Install commands for the unstripped file
quiet_cmd_vdso_install = INSTALL $@
quiet_cmd_vdso_install = INSTALL32 $@
cmd_vdso_install = cp $(obj)/$@.dbg $(MODLIB)/vdso/vdso32.so
vdso.so: $(obj)/vdso.so.dbg

6
arch/m68k/include/asm/m53xxacr.h
View file

@ -89,9 +89,9 @@
* coherency though in all cases. And for copyback caches we will need
* to push cached data as well.
*/
#define CACHE_INIT CACR_CINVA
#define CACHE_INVALIDATE CACR_CINVA
#define CACHE_INVALIDATED CACR_CINVA
#define CACHE_INIT (CACHE_MODE + CACR_CINVA - CACR_EC)
#define CACHE_INVALIDATE (CACHE_MODE + CACR_CINVA)
#define CACHE_INVALIDATED (CACHE_MODE + CACR_CINVA)
#define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \
(0x000f0000) + \

2
arch/mips/include/asm/kvm_host.h
View file

@ -939,7 +939,7 @@ enum kvm_mips_fault_result kvm_trap_emul_gva_fault(struct kvm_vcpu *vcpu,
#define KVM_ARCH_WANT_MMU_NOTIFIER
int kvm_unmap_hva_range(struct kvm *kvm,
unsigned long start, unsigned long end);
unsigned long start, unsigned long end, unsigned flags);
int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);

2
arch/mips/kernel/setup.c
View file

@ -494,7 +494,7 @@ static void __init mips_parse_crashkernel(void)
if (ret != 0 || crash_size <= 0)
return;
if (!memblock_find_in_range(crash_base, crash_base + crash_size, crash_size, 0)) {
if (!memblock_find_in_range(crash_base, crash_base + crash_size, crash_size, 1)) {
pr_warn("Invalid memory region reserved for crash kernel\n");
return;
}

3
arch/mips/kvm/mmu.c
View file

@ -512,7 +512,8 @@ static int kvm_unmap_hva_handler(struct kvm *kvm, gfn_t gfn, gfn_t gfn_end,
return 1;
}
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end,
unsigned flags)
{
handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);

3
arch/powerpc/include/asm/kvm_host.h
View file

@ -58,7 +58,8 @@
#define KVM_ARCH_WANT_MMU_NOTIFIER
extern int kvm_unmap_hva_range(struct kvm *kvm,
unsigned long start, unsigned long end);
unsigned long start, unsigned long end,
unsigned flags);
extern int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
extern int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
extern int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);

3
arch/powerpc/kvm/book3s.c
View file

@ -867,7 +867,8 @@ void kvmppc_core_commit_memory_region(struct kvm *kvm,
kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change);
}
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end,
unsigned flags)
{
return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
}

3
arch/powerpc/kvm/e500_mmu_host.c
View file

@ -734,7 +734,8 @@ static int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
return 0;
}
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end,
unsigned flags)
{
/* kvm_unmap_hva flushes everything anyways */
kvm_unmap_hva(kvm, start);

1
arch/powerpc/platforms/pseries/ras.c
View file

@ -184,7 +184,6 @@ static void handle_system_shutdown(char event_modifier)
case EPOW_SHUTDOWN_ON_UPS:
pr_emerg("Loss of system power detected. System is running on"
" UPS/battery. Check RTAS error log for details\n");
orderly_poweroff(true);
break;
case EPOW_SHUTDOWN_LOSS_OF_CRITICAL_FUNCTIONS:

7
arch/s390/kernel/ptrace.c
View file

@ -1283,7 +1283,6 @@ static bool is_ri_cb_valid(struct runtime_instr_cb *cb)
cb->pc == 1 &&
cb->qc == 0 &&
cb->reserved2 == 0 &&
cb->key == PAGE_DEFAULT_KEY &&
cb->reserved3 == 0 &&
cb->reserved4 == 0 &&
cb->reserved5 == 0 &&
@ -1347,7 +1346,11 @@ static int s390_runtime_instr_set(struct task_struct *target,
kfree(data);
return -EINVAL;
}
/*
* Override access key in any case, since user space should
* not be able to set it, nor should it care about it.
*/
ri_cb.key = PAGE_DEFAULT_KEY >> 4;
preempt_disable();
if (!target->thread.ri_cb)
target->thread.ri_cb = data;

2
arch/s390/kernel/runtime_instr.c
View file

@ -57,7 +57,7 @@ static void init_runtime_instr_cb(struct runtime_instr_cb *cb)
cb->k = 1;
cb->ps = 1;
cb->pc = 1;
cb->key = PAGE_DEFAULT_KEY;
cb->key = PAGE_DEFAULT_KEY >> 4;
cb->v = 1;
}

2
arch/x86/boot/compressed/Makefile
View file

@ -102,7 +102,7 @@ vmlinux-objs-$(CONFIG_EFI_MIXED) += $(obj)/efi_thunk_$(BITS).o
quiet_cmd_check_data_rel = DATAREL $@
define cmd_check_data_rel
for obj in $(filter %.o,$^); do \
${CROSS_COMPILE}readelf -S $$obj | grep -qF .rel.local && { \
$(READELF) -S $$obj | grep -qF .rel.local && { \
echo "error: $$obj has data relocations!" >&2; \
exit 1; \
} || true; \

3
arch/x86/include/asm/kvm_host.h
View file

@ -1553,7 +1553,8 @@ asmlinkage void kvm_spurious_fault(void);
_ASM_EXTABLE(666b, 667b)
#define KVM_ARCH_WANT_MMU_NOTIFIER
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end,
unsigned flags);
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);

3
arch/x86/kvm/mmu.c
View file

@ -2045,7 +2045,8 @@ static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler);
}
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end,
unsigned flags)
{
return kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp);
}

2
arch/x86/kvm/x86.c
View file

@ -972,7 +972,7 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
{
unsigned long old_cr4 = kvm_read_cr4(vcpu);
unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
X86_CR4_SMEP;
if (kvm_valid_cr4(vcpu, cr4))
return 1;

1
arch/x86/pci/xen.c
View file

@ -26,6 +26,7 @@
#include <asm/xen/pci.h>
#include <asm/xen/cpuid.h>
#include <asm/apic.h>
#include <asm/acpi.h>
#include <asm/i8259.h>
static int xen_pcifront_enable_irq(struct pci_dev *dev)

1
build.config.db845c
View file

@ -12,3 +12,4 @@ arch/arm64/boot/dts/qcom/sdm845-db845c.dtb
vmlinux
System.map
"
KMI_SYMBOL_LIST=android/abi_gki_aarch64_db845c

1
build.config.hikey960
View file

@ -15,3 +15,4 @@ arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dtb
vmlinux
System.map
"
KMI_SYMBOL_LIST=android/abi_gki_aarch64_hikey960

2
drivers/android/vendor_hooks.c
View file

@ -16,6 +16,7 @@
#include <trace/hooks/futex.h>
#include <trace/hooks/fpsimd.h>
#include <trace/hooks/topology.h>
#include <trace/hooks/debug.h>
/*
* Export tracepoints that act as a bare tracehook (ie: have no trace event
@ -53,3 +54,4 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(android_vh_rwsem_write_finished);
EXPORT_TRACEPOINT_SYMBOL_GPL(android_vh_alter_rwsem_list_add);
EXPORT_TRACEPOINT_SYMBOL_GPL(android_vh_alter_futex_plist_add);
EXPORT_TRACEPOINT_SYMBOL_GPL(android_vh_is_fpsimd_save);
EXPORT_TRACEPOINT_SYMBOL_GPL(android_vh_ipi_stop);

2
drivers/base/firmware_loader/firmware.h
View file

@ -139,10 +139,12 @@ int assign_fw(struct firmware *fw, struct device *device,
void fw_free_paged_buf(struct fw_priv *fw_priv);
int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed);
int fw_map_paged_buf(struct fw_priv *fw_priv);
bool fw_is_paged_buf(struct fw_priv *fw_priv);
#else
static inline void fw_free_paged_buf(struct fw_priv *fw_priv) {}
static inline int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed) { return -ENXIO; }
static inline int fw_map_paged_buf(struct fw_priv *fw_priv) { return -ENXIO; }
static inline bool fw_is_paged_buf(struct fw_priv *fw_priv) { return false; }
#endif
#endif /* __FIRMWARE_LOADER_H */

17
drivers/base/firmware_loader/main.c
View file

@ -252,9 +252,11 @@ static void __free_fw_priv(struct kref *ref)
list_del(&fw_priv->list);
spin_unlock(&fwc->lock);
fw_free_paged_buf(fw_priv); /* free leftover pages */
if (!fw_priv->allocated_size)
if (fw_is_paged_buf(fw_priv))
fw_free_paged_buf(fw_priv); /* free leftover pages */
else if (!fw_priv->allocated_size)
vfree(fw_priv->data);
kfree_const(fw_priv->fw_name);
kfree(fw_priv);
}
@ -268,6 +270,11 @@ static void free_fw_priv(struct fw_priv *fw_priv)
}
#ifdef CONFIG_FW_LOADER_PAGED_BUF
bool fw_is_paged_buf(struct fw_priv *fw_priv)
{
return fw_priv->is_paged_buf;
}
void fw_free_paged_buf(struct fw_priv *fw_priv)
{
int i;
@ -275,6 +282,8 @@ void fw_free_paged_buf(struct fw_priv *fw_priv)
if (!fw_priv->pages)
return;
vunmap(fw_priv->data);
for (i = 0; i < fw_priv->nr_pages; i++)
__free_page(fw_priv->pages[i]);
kvfree(fw_priv->pages);
@ -328,10 +337,6 @@ int fw_map_paged_buf(struct fw_priv *fw_priv)
if (!fw_priv->data)
return -ENOMEM;
/* page table is no longer needed after mapping, let's free */
kvfree(fw_priv->pages);
fw_priv->pages = NULL;
return 0;
}
#endif

1
drivers/clk/clk-composite.c
View file

@ -328,6 +328,7 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
return ERR_CAST(hw);
return hw->clk;
}
EXPORT_SYMBOL_GPL(clk_register_composite);
void clk_unregister_composite(struct clk *clk)
{

10
drivers/clk/sunxi-ng/Kconfig
View file

@ -17,6 +17,16 @@ config SUN50I_A64_CCU
default ARM64 && ARCH_SUNXI
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
config SUN50I_A100_CCU
bool "Support for the Allwinner A100 CCU"
default ARM64 && ARCH_SUNXI
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
config SUN50I_A100_R_CCU
bool "Support for the Allwinner A100 PRCM CCU"
default ARM64 && ARCH_SUNXI
depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
config SUN50I_H6_CCU
bool "Support for the Allwinner H6 CCU"
default ARM64 && ARCH_SUNXI

2
drivers/clk/sunxi-ng/Makefile
View file

@ -23,6 +23,8 @@ obj-y += ccu_mp.o
# SoC support
obj-$(CONFIG_SUNIV_F1C100S_CCU) += ccu-suniv-f1c100s.o
obj-$(CONFIG_SUN50I_A64_CCU) += ccu-sun50i-a64.o
obj-$(CONFIG_SUN50I_A100_CCU) += ccu-sun50i-a100.o
obj-$(CONFIG_SUN50I_A100_R_CCU) += ccu-sun50i-a100-r.o
obj-$(CONFIG_SUN50I_H6_CCU) += ccu-sun50i-h6.o
obj-$(CONFIG_SUN50I_H6_R_CCU) += ccu-sun50i-h6-r.o
obj-$(CONFIG_SUN4I_A10_CCU) += ccu-sun4i-a10.o

214
drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c Normal file
View file

@ -0,0 +1,214 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
*/
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include "ccu_common.h"
#include "ccu_reset.h"
#include "ccu_div.h"
#include "ccu_gate.h"
#include "ccu_mp.h"
#include "ccu_nm.h"
#include "ccu-sun50i-a100-r.h"
static const char * const cpus_r_apb2_parents[] = { "dcxo24M", "osc32k",
"iosc", "pll-periph0" };
static const struct ccu_mux_var_prediv cpus_r_apb2_predivs[] = {
{ .index = 3, .shift = 0, .width = 5 },
};
static struct ccu_div r_cpus_clk = {
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.mux = {
.shift = 24,
.width = 2,
.var_predivs = cpus_r_apb2_predivs,
.n_var_predivs = ARRAY_SIZE(cpus_r_apb2_predivs),
},
.common = {
.reg = 0x000,
.features = CCU_FEATURE_VARIABLE_PREDIV,
.hw.init = CLK_HW_INIT_PARENTS("cpus",
cpus_r_apb2_parents,
&ccu_div_ops,
0),
},
};
static CLK_FIXED_FACTOR_HW(r_ahb_clk, "r-ahb", &r_cpus_clk.common.hw, 1, 1, 0);
static struct ccu_div r_apb1_clk = {
.div = _SUNXI_CCU_DIV(0, 2),
.common = {
.reg = 0x00c,
.hw.init = CLK_HW_INIT("r-apb1",
"r-ahb",
&ccu_div_ops,
0),
},
};
static struct ccu_div r_apb2_clk = {
.div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
.mux = {
.shift = 24,
.width = 2,
.var_predivs = cpus_r_apb2_predivs,
.n_var_predivs = ARRAY_SIZE(cpus_r_apb2_predivs),
},
.common = {
.reg = 0x010,
.features = CCU_FEATURE_VARIABLE_PREDIV,
.hw.init = CLK_HW_INIT_PARENTS("r-apb2",
cpus_r_apb2_parents,
&ccu_div_ops,
0),
},
};
static const struct clk_parent_data clk_parent_r_apb1[] = {
{ .hw = &r_apb1_clk.common.hw },
};
static const struct clk_parent_data clk_parent_r_apb2[] = {
{ .hw = &r_apb2_clk.common.hw },
};
static SUNXI_CCU_GATE_DATA(r_apb1_timer_clk, "r-apb1-timer", clk_parent_r_apb1,
0x11c, BIT(0), 0);
static SUNXI_CCU_GATE_DATA(r_apb1_twd_clk, "r-apb1-twd", clk_parent_r_apb1,
0x12c, BIT(0), 0);
static const char * const r_apb1_pwm_clk_parents[] = { "dcxo24M", "osc32k",
"iosc" };
static SUNXI_CCU_MUX(r_apb1_pwm_clk, "r-apb1-pwm", r_apb1_pwm_clk_parents,
0x130, 24, 2, 0);
static SUNXI_CCU_GATE_DATA(r_apb1_bus_pwm_clk, "r-apb1-bus-pwm",
clk_parent_r_apb1, 0x13c, BIT(0), 0);
static SUNXI_CCU_GATE_DATA(r_apb1_ppu_clk, "r-apb1-ppu", clk_parent_r_apb1,
0x17c, BIT(0), 0);
static SUNXI_CCU_GATE_DATA(r_apb2_uart_clk, "r-apb2-uart", clk_parent_r_apb2,
0x18c, BIT(0), 0);
static SUNXI_CCU_GATE_DATA(r_apb2_i2c0_clk, "r-apb2-i2c0", clk_parent_r_apb2,
0x19c, BIT(0), 0);
static SUNXI_CCU_GATE_DATA(r_apb2_i2c1_clk, "r-apb2-i2c1", clk_parent_r_apb2,
0x19c, BIT(1), 0);
static const char * const r_apb1_ir_rx_parents[] = { "osc32k", "dcxo24M" };
static SUNXI_CCU_MP_WITH_MUX_GATE(r_apb1_ir_rx_clk, "r-apb1-ir-rx",
r_apb1_ir_rx_parents, 0x1c0,
0, 5, /* M */
8, 2, /* P */
24, 1, /* mux */
BIT(31), /* gate */
0);
static SUNXI_CCU_GATE_DATA(r_apb1_bus_ir_rx_clk, "r-apb1-bus-ir-rx",
clk_parent_r_apb1, 0x1cc, BIT(0), 0);
static SUNXI_CCU_GATE(r_ahb_bus_rtc_clk, "r-ahb-rtc", "r-ahb",
0x20c, BIT(0), 0);
static struct ccu_common *sun50i_a100_r_ccu_clks[] = {
&r_cpus_clk.common,
&r_apb1_clk.common,
&r_apb2_clk.common,
&r_apb1_timer_clk.common,
&r_apb1_twd_clk.common,
&r_apb1_pwm_clk.common,
&r_apb1_bus_pwm_clk.common,
&r_apb1_ppu_clk.common,
&r_apb2_uart_clk.common,
&r_apb2_i2c0_clk.common,
&r_apb2_i2c1_clk.common,
&r_apb1_ir_rx_clk.common,
&r_apb1_bus_ir_rx_clk.common,
&r_ahb_bus_rtc_clk.common,
};
static struct clk_hw_onecell_data sun50i_a100_r_hw_clks = {
.hws = {
[CLK_R_CPUS] = &r_cpus_clk.common.hw,
[CLK_R_AHB] = &r_ahb_clk.hw,
[CLK_R_APB1] = &r_apb1_clk.common.hw,
[CLK_R_APB2] = &r_apb2_clk.common.hw,
[CLK_R_APB1_TIMER] = &r_apb1_timer_clk.common.hw,
[CLK_R_APB1_TWD] = &r_apb1_twd_clk.common.hw,
[CLK_R_APB1_PWM] = &r_apb1_pwm_clk.common.hw,
[CLK_R_APB1_BUS_PWM] = &r_apb1_bus_pwm_clk.common.hw,
[CLK_R_APB1_PPU] = &r_apb1_ppu_clk.common.hw,
[CLK_R_APB2_UART] = &r_apb2_uart_clk.common.hw,
[CLK_R_APB2_I2C0] = &r_apb2_i2c0_clk.common.hw,
[CLK_R_APB2_I2C1] = &r_apb2_i2c1_clk.common.hw,
[CLK_R_APB1_IR] = &r_apb1_ir_rx_clk.common.hw,
[CLK_R_APB1_BUS_IR] = &r_apb1_bus_ir_rx_clk.common.hw,
[CLK_R_AHB_BUS_RTC] = &r_ahb_bus_rtc_clk.common.hw,
},
.num = CLK_NUMBER,
};
static struct ccu_reset_map sun50i_a100_r_ccu_resets[] = {
[RST_R_APB1_TIMER] = { 0x11c, BIT(16) },
[RST_R_APB1_BUS_PWM] = { 0x13c, BIT(16) },
[RST_R_APB1_PPU] = { 0x17c, BIT(16) },
[RST_R_APB2_UART] = { 0x18c, BIT(16) },
[RST_R_APB2_I2C0] = { 0x19c, BIT(16) },
[RST_R_APB2_I2C1] = { 0x19c, BIT(17) },
[RST_R_APB1_BUS_IR] = { 0x1cc, BIT(16) },
[RST_R_AHB_BUS_RTC] = { 0x20c, BIT(16) },
};
static const struct sunxi_ccu_desc sun50i_a100_r_ccu_desc = {
.ccu_clks = sun50i_a100_r_ccu_clks,
.num_ccu_clks = ARRAY_SIZE(sun50i_a100_r_ccu_clks),
.hw_clks = &sun50i_a100_r_hw_clks,
.resets = sun50i_a100_r_ccu_resets,
.num_resets = ARRAY_SIZE(sun50i_a100_r_ccu_resets),
};
static int sun50i_a100_r_ccu_probe(struct platform_device *pdev)
{
void __iomem *reg;
reg = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(reg))
return PTR_ERR(reg);
return sunxi_ccu_probe(pdev->dev.of_node, reg, &sun50i_a100_r_ccu_desc);
}
static const struct of_device_id sun50i_a100_r_ccu_ids[] = {
{ .compatible = "allwinner,sun50i-a100-r-ccu" },
{ }
};
static struct platform_driver sun50i_a100_r_ccu_driver = {
.probe = sun50i_a100_r_ccu_probe,
.driver = {
.name = "sun50i-a100-r-ccu",
.of_match_table = sun50i_a100_r_ccu_ids,
},
};
module_platform_driver(sun50i_a100_r_ccu_driver);

21
drivers/clk/sunxi-ng/ccu-sun50i-a100-r.h Normal file
View file

@ -0,0 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
*/
#ifndef _CCU_SUN50I_A100_R_H
#define _CCU_SUN50I_A100_R_H
#include <dt-bindings/clock/sun50i-a100-r-ccu.h>
#include <dt-bindings/reset/sun50i-a100-r-ccu.h>
#define CLK_R_CPUS 0
#define CLK_R_AHB 1
/* exported except APB1 for R_PIO */
#define CLK_R_APB2 3
#define CLK_NUMBER (CLK_R_AHB_BUS_RTC + 1)
#endif /* _CCU_SUN50I_A100_R_H */

1276
drivers/clk/sunxi-ng/ccu-sun50i-a100.c Normal file
View file

File diff suppressed because it is too large Load diff

56
drivers/clk/sunxi-ng/ccu-sun50i-a100.h Normal file
View file

@ -0,0 +1,56 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
*/
#ifndef _CCU_SUN50I_A100_H_
#define _CCU_SUN50I_A100_H_
#include <dt-bindings/clock/sun50i-a100-ccu.h>
#include <dt-bindings/reset/sun50i-a100-ccu.h>
#define CLK_OSC12M 0
#define CLK_PLL_CPUX 1
#define CLK_PLL_DDR0 2
/* PLL_PERIPH0 exported for PRCM */
#define CLK_PLL_PERIPH0_2X 4
#define CLK_PLL_PERIPH1 5
#define CLK_PLL_PERIPH1_2X 6
#define CLK_PLL_GPU 7
#define CLK_PLL_VIDEO0 8
#define CLK_PLL_VIDEO0_2X 9
#define CLK_PLL_VIDEO0_4X 10
#define CLK_PLL_VIDEO1 11
#define CLK_PLL_VIDEO1_2X 12
#define CLK_PLL_VIDEO1_4X 13
#define CLK_PLL_VIDEO2 14
#define CLK_PLL_VIDEO2_2X 15
#define CLK_PLL_VIDEO2_4X 16
#define CLK_PLL_VIDEO3 17
#define CLK_PLL_VIDEO3_2X 18
#define CLK_PLL_VIDEO3_4X 19
#define CLK_PLL_VE 20
#define CLK_PLL_COM 21
#define CLK_PLL_COM_AUDIO 22
#define CLK_PLL_AUDIO 23
/* CPUX clock exported for DVFS */
#define CLK_AXI 25
#define CLK_CPUX_APB 26
#define CLK_PSI_AHB1_AHB2 27
#define CLK_AHB3 28
/* APB1 clock exported for PIO */
#define CLK_APB2 30
/* All module clocks and bus gates are exported except DRAM */
#define CLK_BUS_DRAM 58
#define CLK_NUMBER (CLK_CSI_ISP + 1)
#endif /* _CCU_SUN50I_A100_H_ */

2
drivers/clocksource/Kconfig
View file

@ -473,7 +473,7 @@ config SYS_SUPPORTS_SH_CMT
bool
config MTK_TIMER
bool "Mediatek timer driver" if COMPILE_TEST
bool "Mediatek timer driver"
depends on HAS_IOMEM
select TIMER_OF
select CLKSRC_MMIO

1
drivers/cpufreq/intel_pstate.c
View file

@ -1571,6 +1571,7 @@ static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
intel_pstate_get_hwp_max(cpu->cpu, &phy_max, &current_max);
cpu->pstate.turbo_freq = phy_max * cpu->pstate.scaling;
cpu->pstate.turbo_pstate = phy_max;
} else {
cpu->pstate.turbo_freq = cpu->pstate.turbo_pstate * cpu->pstate.scaling;
}

2
drivers/firmware/efi/efi.c
View file

@ -345,6 +345,7 @@ static int __init efisubsys_init(void)
efi_kobj = kobject_create_and_add("efi", firmware_kobj);
if (!efi_kobj) {
pr_err("efi: Firmware registration failed.\n");
destroy_workqueue(efi_rts_wq);
return -ENOMEM;
}
@ -381,6 +382,7 @@ err_unregister:
generic_ops_unregister();
err_put:
kobject_put(efi_kobj);
destroy_workqueue(efi_rts_wq);
return error;
}

1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View file

@ -1434,6 +1434,7 @@ amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector)
drm_connector_update_edid_property(connector,
aconnector->edid);
drm_add_edid_modes(connector, aconnector->edid);
if (aconnector->dc_link->aux_mode)
drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux,

2
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
View file

@ -2845,7 +2845,7 @@ static bool dcn20_validate_bandwidth_internal(struct dc *dc, struct dc_state *co
int vlevel = 0;
int pipe_split_from[MAX_PIPES];
int pipe_cnt = 0;
display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_KERNEL);
display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_ATOMIC);
DC_LOGGER_INIT(dc->ctx->logger);
BW_VAL_TRACE_COUNT();

3
drivers/gpu/drm/amd/display/include/fixed31_32.h
View file

@ -431,6 +431,9 @@ struct fixed31_32 dc_fixpt_log(struct fixed31_32 arg);
*/
static inline struct fixed31_32 dc_fixpt_pow(struct fixed31_32 arg1, struct fixed31_32 arg2)
{
if (arg1.value == 0)
return arg2.value == 0 ? dc_fixpt_one : dc_fixpt_zero;
return dc_fixpt_exp(
dc_fixpt_mul(
dc_fixpt_log(arg1),

4
drivers/gpu/drm/ttm/ttm_bo_vm.c
View file

@ -358,8 +358,10 @@ static int ttm_bo_vm_access_kmap(struct ttm_buffer_object *bo,
static int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,
void *buf, int len, int write)
{
unsigned long offset = (addr) - vma->vm_start;
struct ttm_buffer_object *bo = vma->vm_private_data;
unsigned long offset = (addr) - vma->vm_start +
((vma->vm_pgoff - drm_vma_node_start(&bo->base.vma_node))
<< PAGE_SHIFT);
int ret;
if (len < 1 || (offset + len) >> PAGE_SHIFT > bo->num_pages)

27
drivers/gpu/drm/vgem/vgem_drv.c
View file

@ -229,32 +229,6 @@ static int vgem_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
return 0;
}
static int vgem_gem_dumb_map(struct drm_file *file, struct drm_device *dev,
uint32_t handle, uint64_t *offset)
{
struct drm_gem_object *obj;
int ret;
obj = drm_gem_object_lookup(file, handle);
if (!obj)
return -ENOENT;
if (!obj->filp) {
ret = -EINVAL;
goto unref;
}
ret = drm_gem_create_mmap_offset(obj);
if (ret)
goto unref;
*offset = drm_vma_node_offset_addr(&obj->vma_node);
unref:
drm_gem_object_put_unlocked(obj);
return ret;
}
static struct drm_ioctl_desc vgem_ioctls[] = {
DRM_IOCTL_DEF_DRV(VGEM_FENCE_ATTACH, vgem_fence_attach_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(VGEM_FENCE_SIGNAL, vgem_fence_signal_ioctl, DRM_RENDER_ALLOW),
@ -448,7 +422,6 @@ static struct drm_driver vgem_driver = {
.fops = &vgem_driver_fops,
.dumb_create = vgem_gem_dumb_create,
.dumb_map_offset = vgem_gem_dumb_map,
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,

3
drivers/infiniband/hw/bnxt_re/main.c
View file

@ -789,7 +789,8 @@ static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event,
struct ib_event event;
unsigned int flags;
if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR &&
rdma_is_kernel_res(&qp->ib_qp.res)) {
flags = bnxt_re_lock_cqs(qp);
bnxt_qplib_add_flush_qp(&qp->qplib_qp);
bnxt_re_unlock_cqs(qp, flags);

1
drivers/infiniband/hw/hfi1/tid_rdma.c
View file

@ -3215,6 +3215,7 @@ bool hfi1_tid_rdma_wqe_interlock(struct rvt_qp *qp, struct rvt_swqe *wqe)
case IB_WR_ATOMIC_CMP_AND_SWP:
case IB_WR_ATOMIC_FETCH_AND_ADD:
case IB_WR_RDMA_WRITE:
case IB_WR_RDMA_WRITE_WITH_IMM:
switch (prev->wr.opcode) {
case IB_WR_TID_RDMA_WRITE:
req = wqe_to_tid_req(prev);

2
drivers/input/mouse/psmouse-base.c
View file

@ -2042,7 +2042,7 @@ static int psmouse_get_maxproto(char *buffer, const struct kernel_param *kp)
{
int type = *((unsigned int *)kp->arg);
return sprintf(buffer, "%s", psmouse_protocol_by_type(type)->name);
return sprintf(buffer, "%s\n", psmouse_protocol_by_type(type)->name);
}
static int __init psmouse_init(void)

12
drivers/md/bcache/super.c
View file

@ -816,19 +816,19 @@ static int bcache_device_init(struct bcache_device *d, unsigned int block_size,
struct request_queue *q;
const size_t max_stripes = min_t(size_t, INT_MAX,
SIZE_MAX / sizeof(atomic_t));
size_t n;
uint64_t n;
int idx;
if (!d->stripe_size)
d->stripe_size = 1 << 31;
d->nr_stripes = DIV_ROUND_UP_ULL(sectors, d->stripe_size);
if (!d->nr_stripes || d->nr_stripes > max_stripes) {
pr_err("nr_stripes too large or invalid: %u (start sector beyond end of disk?)",
(unsigned int)d->nr_stripes);
n = DIV_ROUND_UP_ULL(sectors, d->stripe_size);
if (!n || n > max_stripes) {
pr_err("nr_stripes too large or invalid: %llu (start sector beyond end of disk?)\n",
n);
return -ENOMEM;
}
d->nr_stripes = n;
n = d->nr_stripes * sizeof(atomic_t);
d->stripe_sectors_dirty = kvzalloc(n, GFP_KERNEL);

11
drivers/media/pci/ttpci/budget-core.c
View file

@ -369,20 +369,25 @@ static int budget_register(struct budget *budget)
ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &budget->hw_frontend);
if (ret < 0)
return ret;
goto err_release_dmx;
budget->mem_frontend.source = DMX_MEMORY_FE;
ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &budget->mem_frontend);
if (ret < 0)
return ret;
goto err_release_dmx;
ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &budget->hw_frontend);
if (ret < 0)
return ret;
goto err_release_dmx;
dvb_net_init(&budget->dvb_adapter, &budget->dvb_net, &dvbdemux->dmx);
return 0;
err_release_dmx:
dvb_dmxdev_release(&budget->dmxdev);
dvb_dmx_release(&budget->demux);
return ret;
}
static void budget_unregister(struct budget *budget)

20
drivers/media/platform/davinci/vpss.c
View file

@ -505,19 +505,31 @@ static void vpss_exit(void)
static int __init vpss_init(void)
{
int ret;
if (!request_mem_region(VPSS_CLK_CTRL, 4, "vpss_clock_control"))
return -EBUSY;
oper_cfg.vpss_regs_base2 = ioremap(VPSS_CLK_CTRL, 4);
if (unlikely(!oper_cfg.vpss_regs_base2)) {
release_mem_region(VPSS_CLK_CTRL, 4);
return -ENOMEM;
ret = -ENOMEM;
goto err_ioremap;
}
writel(VPSS_CLK_CTRL_VENCCLKEN |
VPSS_CLK_CTRL_DACCLKEN, oper_cfg.vpss_regs_base2);
VPSS_CLK_CTRL_DACCLKEN, oper_cfg.vpss_regs_base2);
return platform_driver_register(&vpss_driver);
ret = platform_driver_register(&vpss_driver);
if (ret)
goto err_pd_register;
return 0;
err_pd_register:
iounmap(oper_cfg.vpss_regs_base2);
err_ioremap:
release_mem_region(VPSS_CLK_CTRL, 4);
return ret;
}
subsys_initcall(vpss_init);
module_exit(vpss_exit);

30
drivers/media/platform/qcom/camss/camss.c
View file

@ -504,7 +504,6 @@ static int camss_of_parse_ports(struct camss *camss)
return num_subdevs;
err_cleanup:
v4l2_async_notifier_cleanup(&camss->notifier);
of_node_put(node);
return ret;
}
@ -835,29 +834,38 @@ static int camss_probe(struct platform_device *pdev)
camss->csid_num = 4;
camss->vfe_num = 2;
} else {
return -EINVAL;
ret = -EINVAL;
goto err_free;
}
camss->csiphy = devm_kcalloc(dev, camss->csiphy_num,
sizeof(*camss->csiphy), GFP_KERNEL);
if (!camss->csiphy)
return -ENOMEM;
if (!camss->csiphy) {
ret = -ENOMEM;
goto err_free;
}
camss->csid = devm_kcalloc(dev, camss->csid_num, sizeof(*camss->csid),
GFP_KERNEL);
if (!camss->csid)
return -ENOMEM;
if (!camss->csid) {
ret = -ENOMEM;
goto err_free;
}
camss->vfe = devm_kcalloc(dev, camss->vfe_num, sizeof(*camss->vfe),
GFP_KERNEL);
if (!camss->vfe)
return -ENOMEM;
if (!camss->vfe) {
ret = -ENOMEM;
goto err_free;
}
v4l2_async_notifier_init(&camss->notifier);
num_subdevs = camss_of_parse_ports(camss);
if (num_subdevs < 0)
return num_subdevs;
if (num_subdevs < 0) {
ret = num_subdevs;
goto err_cleanup;
}
ret = camss_init_subdevices(camss);
if (ret < 0)
@ -936,6 +944,8 @@ err_register_entities:
v4l2_device_unregister(&camss->v4l2_dev);
err_cleanup:
v4l2_async_notifier_cleanup(&camss->notifier);
err_free:
kfree(camss);
return ret;
}

42
drivers/net/bonding/bond_main.c
View file

@ -2037,7 +2037,8 @@ static int bond_release_and_destroy(struct net_device *bond_dev,
int ret;
ret = __bond_release_one(bond_dev, slave_dev, false, true);
if (ret == 0 && !bond_has_slaves(bond)) {
if (ret == 0 && !bond_has_slaves(bond) &&
bond_dev->reg_state != NETREG_UNREGISTERING) {
bond_dev->priv_flags |= IFF_DISABLE_NETPOLL;
netdev_info(bond_dev, "Destroying bond\n");
bond_remove_proc_entry(bond);
@ -2777,6 +2778,9 @@ static int bond_ab_arp_inspect(struct bonding *bond)
if (bond_time_in_interval(bond, last_rx, 1)) {
bond_propose_link_state(slave, BOND_LINK_UP);
commit++;
} else if (slave->link == BOND_LINK_BACK) {
bond_propose_link_state(slave, BOND_LINK_FAIL);
commit++;
}
continue;
}
@ -2885,6 +2889,19 @@ static void bond_ab_arp_commit(struct bonding *bond)
continue;
case BOND_LINK_FAIL:
bond_set_slave_link_state(slave, BOND_LINK_FAIL,
BOND_SLAVE_NOTIFY_NOW);
bond_set_slave_inactive_flags(slave,
BOND_SLAVE_NOTIFY_NOW);
/* A slave has just been enslaved and has become
* the current active slave.
*/
if (rtnl_dereference(bond->curr_active_slave))
RCU_INIT_POINTER(bond->current_arp_slave, NULL);
continue;
default:
slave_err(bond->dev, slave->dev,
"impossible: link_new_state %d on slave\n",
@ -2935,8 +2952,6 @@ static bool bond_ab_arp_probe(struct bonding *bond)
return should_notify_rtnl;
}
bond_set_slave_inactive_flags(curr_arp_slave, BOND_SLAVE_NOTIFY_LATER);
bond_for_each_slave_rcu(bond, slave, iter) {
if (!found && !before && bond_slave_is_up(slave))
before = slave;
@ -4246,13 +4261,23 @@ static netdev_tx_t bond_start_xmit(struct sk_buff *skb, struct net_device *dev)
return ret;
}
static u32 bond_mode_bcast_speed(struct slave *slave, u32 speed)
{
if (speed == 0 || speed == SPEED_UNKNOWN)
speed = slave->speed;
else
speed = min(speed, slave->speed);
return speed;
}
static int bond_ethtool_get_link_ksettings(struct net_device *bond_dev,
struct ethtool_link_ksettings *cmd)
{
struct bonding *bond = netdev_priv(bond_dev);
unsigned long speed = 0;
struct list_head *iter;
struct slave *slave;
u32 speed = 0;
cmd->base.duplex = DUPLEX_UNKNOWN;
cmd->base.port = PORT_OTHER;
@ -4264,8 +4289,13 @@ static int bond_ethtool_get_link_ksettings(struct net_device *bond_dev,
*/
bond_for_each_slave(bond, slave, iter) {
if (bond_slave_can_tx(slave)) {
if (slave->speed != SPEED_UNKNOWN)
speed += slave->speed;
if (slave->speed != SPEED_UNKNOWN) {
if (BOND_MODE(bond) == BOND_MODE_BROADCAST)
speed = bond_mode_bcast_speed(slave,
speed);
else
speed += slave->speed;
}
if (cmd->base.duplex == DUPLEX_UNKNOWN &&
slave->duplex != DUPLEX_UNKNOWN)
cmd->base.duplex = slave->duplex;

2
drivers/net/dsa/b53/b53_common.c
View file

@ -1523,6 +1523,8 @@ static int b53_arl_op(struct b53_device *dev, int op, int port,
return ret;
switch (ret) {
case -ETIMEDOUT:
return ret;
case -ENOSPC:
dev_dbg(dev->dev, "{%pM,%.4d} no space left in ARL\n",
addr, vid);

19
drivers/net/ethernet/amazon/ena/ena_netdev.c
View file

@ -2835,16 +2835,14 @@ static void ena_fw_reset_device(struct work_struct *work)
{
struct ena_adapter *adapter =
container_of(work, struct ena_adapter, reset_task);
struct pci_dev *pdev = adapter->pdev;
if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
dev_err(&pdev->dev,
"device reset schedule while reset bit is off\n");
return;
}
rtnl_lock();
ena_destroy_device(adapter, false);
ena_restore_device(adapter);
if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
ena_destroy_device(adapter, false);
ena_restore_device(adapter);
}
rtnl_unlock();
}
@ -3675,8 +3673,11 @@ static void __ena_shutoff(struct pci_dev *pdev, bool shutdown)
netdev->rx_cpu_rmap = NULL;
}
#endif /* CONFIG_RFS_ACCEL */
del_timer_sync(&adapter->timer_service);
/* Make sure timer and reset routine won't be called after
* freeing device resources.
*/
del_timer_sync(&adapter->timer_service);
cancel_work_sync(&adapter->reset_task);
rtnl_lock(); /* lock released inside the below if-else block */

4
drivers/net/ethernet/cortina/gemini.c
View file

@ -2388,7 +2388,7 @@ static int gemini_ethernet_port_probe(struct platform_device *pdev)
dev_info(dev, "probe %s ID %d\n", dev_name(dev), id);
netdev = alloc_etherdev_mq(sizeof(*port), TX_QUEUE_NUM);
netdev = devm_alloc_etherdev_mqs(dev, sizeof(*port), TX_QUEUE_NUM, TX_QUEUE_NUM);
if (!netdev) {
dev_err(dev, "Can't allocate ethernet device #%d\n", id);
return -ENOMEM;
@ -2520,7 +2520,6 @@ static int gemini_ethernet_port_probe(struct platform_device *pdev)
}
port->netdev = NULL;
free_netdev(netdev);
return ret;
}
@ -2529,7 +2528,6 @@ static int gemini_ethernet_port_remove(struct platform_device *pdev)
struct gemini_ethernet_port *port = platform_get_drvdata(pdev);
gemini_port_remove(port);
free_netdev(port->netdev);
return 0;
}

4
drivers/net/ethernet/freescale/fec_main.c
View file

@ -3707,11 +3707,11 @@ failed_mii_init:
failed_irq:
failed_init:
fec_ptp_stop(pdev);
if (fep->reg_phy)
regulator_disable(fep->reg_phy);
failed_reset:
pm_runtime_put_noidle(&pdev->dev);
pm_runtime_disable(&pdev->dev);
if (fep->reg_phy)
regulator_disable(fep->reg_phy);
failed_regulator:
clk_disable_unprepare(fep->clk_ahb);
failed_clk_ahb:

2
drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
View file

@ -1211,7 +1211,7 @@ struct i40e_aqc_set_vsi_promiscuous_modes {
#define I40E_AQC_SET_VSI_PROMISC_BROADCAST 0x04
#define I40E_AQC_SET_VSI_DEFAULT 0x08
#define I40E_AQC_SET_VSI_PROMISC_VLAN 0x10
#define I40E_AQC_SET_VSI_PROMISC_TX 0x8000
#define I40E_AQC_SET_VSI_PROMISC_RX_ONLY 0x8000
__le16 seid;
#define I40E_AQC_VSI_PROM_CMD_SEID_MASK 0x3FF
__le16 vlan_tag;

35
drivers/net/ethernet/intel/i40e/i40e_common.c
View file

@ -1949,6 +1949,21 @@ i40e_status i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags,
return status;
}
/**
* i40e_is_aq_api_ver_ge
* @aq: pointer to AdminQ info containing HW API version to compare
* @maj: API major value
* @min: API minor value
*
* Assert whether current HW API version is greater/equal than provided.
**/
static bool i40e_is_aq_api_ver_ge(struct i40e_adminq_info *aq, u16 maj,
u16 min)
{
return (aq->api_maj_ver > maj ||
(aq->api_maj_ver == maj && aq->api_min_ver >= min));
}
/**
* i40e_aq_add_vsi
* @hw: pointer to the hw struct
@ -2074,18 +2089,16 @@ i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
if (set) {
flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
if (rx_only_promisc &&
(((hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver >= 5)) ||
(hw->aq.api_maj_ver > 1)))
flags |= I40E_AQC_SET_VSI_PROMISC_TX;
if (rx_only_promisc && i40e_is_aq_api_ver_ge(&hw->aq, 1, 5))
flags |= I40E_AQC_SET_VSI_PROMISC_RX_ONLY;
}
cmd->promiscuous_flags = cpu_to_le16(flags);
cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
if (((hw->aq.api_maj_ver >= 1) && (hw->aq.api_min_ver >= 5)) ||
(hw->aq.api_maj_ver > 1))
cmd->valid_flags |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_TX);
if (i40e_is_aq_api_ver_ge(&hw->aq, 1, 5))
cmd->valid_flags |=
cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_RX_ONLY);
cmd->seid = cpu_to_le16(seid);
status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
@ -2182,11 +2195,17 @@ enum i40e_status_code i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw,
i40e_fill_default_direct_cmd_desc(&desc,
i40e_aqc_opc_set_vsi_promiscuous_modes);
if (enable)
if (enable) {
flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
if (i40e_is_aq_api_ver_ge(&hw->aq, 1, 5))
flags |= I40E_AQC_SET_VSI_PROMISC_RX_ONLY;
}
cmd->promiscuous_flags = cpu_to_le16(flags);
cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
if (i40e_is_aq_api_ver_ge(&hw->aq, 1, 5))
cmd->valid_flags |=
cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_RX_ONLY);
cmd->seid = cpu_to_le16(seid);
cmd->vlan_tag = cpu_to_le16(vid | I40E_AQC_SET_VSI_VLAN_VALID);

3
drivers/net/ethernet/intel/i40e/i40e_main.c
View file

@ -15342,6 +15342,9 @@ static void i40e_remove(struct pci_dev *pdev)
i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
while (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
usleep_range(1000, 2000);
/* no more scheduling of any task */
set_bit(__I40E_SUSPENDED, pf->state);
set_bit(__I40E_DOWN, pf->state);

2
drivers/net/hyperv/netvsc_drv.c
View file

@ -501,7 +501,7 @@ static int netvsc_vf_xmit(struct net_device *net, struct net_device *vf_netdev,
int rc;
skb->dev = vf_netdev;
skb->queue_mapping = qdisc_skb_cb(skb)->slave_dev_queue_mapping;
skb_record_rx_queue(skb, qdisc_skb_cb(skb)->slave_dev_queue_mapping);
rc = dev_queue_xmit(skb);
if (likely(rc == NET_XMIT_SUCCESS || rc == NET_XMIT_CN)) {

2
drivers/net/wan/Kconfig
View file

@ -200,7 +200,7 @@ config WANXL_BUILD_FIRMWARE
depends on WANXL && !PREVENT_FIRMWARE_BUILD
help
Allows you to rebuild firmware run by the QUICC processor.
It requires as68k, ld68k and hexdump programs.
It requires m68k toolchains and hexdump programs.
You should never need this option, say N.

12
drivers/net/wan/Makefile
View file

@ -40,17 +40,17 @@ $(obj)/wanxl.o: $(obj)/wanxlfw.inc
ifeq ($(CONFIG_WANXL_BUILD_FIRMWARE),y)
ifeq ($(ARCH),m68k)
AS68K = $(AS)
LD68K = $(LD)
M68KCC = $(CC)
M68KLD = $(LD)
else
AS68K = as68k
LD68K = ld68k
M68KCC = $(CROSS_COMPILE_M68K)gcc
M68KLD = $(CROSS_COMPILE_M68K)ld
endif
quiet_cmd_build_wanxlfw = BLD FW $@
cmd_build_wanxlfw = \
$(CPP) -D__ASSEMBLY__ -Wp,-MD,$(depfile) -I$(srctree)/include/uapi $< | $(AS68K) -m68360 -o $(obj)/wanxlfw.o; \
$(LD68K) --oformat binary -Ttext 0x1000 $(obj)/wanxlfw.o -o $(obj)/wanxlfw.bin; \
$(M68KCC) -D__ASSEMBLY__ -Wp,-MD,$(depfile) -I$(srctree)/include/uapi -c -o $(obj)/wanxlfw.o $<; \
$(M68KLD) --oformat binary -Ttext 0x1000 $(obj)/wanxlfw.o -o $(obj)/wanxlfw.bin; \
hexdump -ve '"\n" 16/1 "0x%02X,"' $(obj)/wanxlfw.bin | sed 's/0x ,//g;1s/^/static const u8 firmware[]={/;$$s/,$$/\n};\n/' >$(obj)/wanxlfw.inc; \
rm -f $(obj)/wanxlfw.bin $(obj)/wanxlfw.o

10
drivers/opp/core.c
View file

@ -843,10 +843,12 @@ int dev_pm_opp_set_rate(struct device *dev, unsigned long target_freq)
/* Return early if nothing to do */
if (old_freq == freq) {
dev_dbg(dev, "%s: old/new frequencies (%lu Hz) are same, nothing to do\n",
__func__, freq);
ret = 0;
goto put_opp_table;
if (!opp_table->required_opp_tables && !opp_table->regulators) {
dev_dbg(dev, "%s: old/new frequencies (%lu Hz) are same, nothing to do\n",
__func__, freq);
ret = 0;
goto put_opp_table;
}
}
temp_freq = old_freq;

10
drivers/pinctrl/sunxi/Kconfig
View file

@ -94,6 +94,16 @@ config PINCTRL_SUN50I_A64_R
default ARM64 && ARCH_SUNXI
select PINCTRL_SUNXI
config PINCTRL_SUN50I_A100
bool "Support for the Allwinner A100 PIO"
default ARM64 && ARCH_SUNXI
select PINCTRL_SUNXI
config PINCTRL_SUN50I_A100_R
bool "Support for the Allwinner A100 R-PIO"
default ARM64 && ARCH_SUNXI
select PINCTRL_SUNXI
config PINCTRL_SUN50I_H5
bool "Support for the Allwinner H5 PIO"
default ARM64 && ARCH_SUNXI

2
drivers/pinctrl/sunxi/Makefile
View file

@ -13,6 +13,8 @@ obj-$(CONFIG_PINCTRL_SUN8I_A23_R) += pinctrl-sun8i-a23-r.o
obj-$(CONFIG_PINCTRL_SUN8I_A33) += pinctrl-sun8i-a33.o
obj-$(CONFIG_PINCTRL_SUN50I_A64) += pinctrl-sun50i-a64.o
obj-$(CONFIG_PINCTRL_SUN50I_A64_R) += pinctrl-sun50i-a64-r.o
obj-$(CONFIG_PINCTRL_SUN50I_A100) += pinctrl-sun50i-a100.o
obj-$(CONFIG_PINCTRL_SUN50I_A100_R) += pinctrl-sun50i-a100-r.o
obj-$(CONFIG_PINCTRL_SUN8I_A83T) += pinctrl-sun8i-a83t.o
obj-$(CONFIG_PINCTRL_SUN8I_A83T_R) += pinctrl-sun8i-a83t-r.o
obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o

105
drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c Normal file
View file

@ -0,0 +1,105 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
*
* Based on:
* huangshuosheng <huangshuosheng@allwinnertech.com>
*/
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/platform_device.h>
#include "pinctrl-sunxi.h"
static const struct sunxi_desc_pin a100_r_pins[] = {
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_i2c0"), /* SCK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_i2c0"), /* SDA */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_uart0"), /* TX */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_uart0"), /* RX */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_i2c1"), /* SCK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_i2c1"), /* SDA */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "s_pwm"),
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "s_cir"), /* IN */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),
};
static const struct sunxi_pinctrl_desc a100_r_pinctrl_data = {
.pins = a100_r_pins,
.npins = ARRAY_SIZE(a100_r_pins),
.pin_base = PL_BASE,
.irq_banks = 1,
};
static int a100_r_pinctrl_probe(struct platform_device *pdev)
{
return sunxi_pinctrl_init(pdev, &a100_r_pinctrl_data);
}
static const struct of_device_id a100_r_pinctrl_match[] = {
{ .compatible = "allwinner,sun50i-a100-r-pinctrl", },
{}
};
MODULE_DEVICE_TABLE(of, a100_r_pinctrl_match);
static struct platform_driver a100_r_pinctrl_driver = {
.probe = a100_r_pinctrl_probe,
.driver = {
.name = "sun50iw10p1-r-pinctrl",
.of_match_table = a100_r_pinctrl_match,
},
};
module_platform_driver(a100_r_pinctrl_driver);

708
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c Normal file
View file

@ -0,0 +1,708 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
*
* Based on:
* huangshuosheng <huangshuosheng@allwinnertech.com>
*/
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/platform_device.h>
#include "pinctrl-sunxi.h"
static const struct sunxi_desc_pin a100_pins[] = {
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart2"), /* TX */
SUNXI_FUNCTION(0x3, "spi2"), /* CS */
SUNXI_FUNCTION(0x4, "jtag"), /* MS */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart2"), /* RX */
SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
SUNXI_FUNCTION(0x4, "jtag"), /* CK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
SUNXI_FUNCTION(0x4, "jtag"), /* DO */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
SUNXI_FUNCTION(0x3, "spi2"), /* MISO */
SUNXI_FUNCTION(0x4, "jtag"), /* DI */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
SUNXI_FUNCTION(0x3, "i2s0"), /* MCLK */
SUNXI_FUNCTION(0x4, "jtag_gpu"), /* MS_GPU */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
SUNXI_FUNCTION(0x3, "i2s0"), /* BCLK */
SUNXI_FUNCTION(0x4, "jtag_gpu"), /* CK_GPU */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2s0"), /* LRCK */
SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DO_GPU */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "spdif"), /* DIN */
SUNXI_FUNCTION(0x3, "i2s0_dout0"), /* DOUT0 */
SUNXI_FUNCTION(0x4, "i2s0_din1"), /* DIN1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "spdif"), /* DOUT */
SUNXI_FUNCTION(0x3, "i2s0_din0"), /* DIN0 */
SUNXI_FUNCTION(0x4, "i2s0_dout1"), /* DOUT1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart0"), /* TX */
SUNXI_FUNCTION(0x3, "i2c0"), /* SCK */
SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DI_GPU */
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart0"), /* RX */
SUNXI_FUNCTION(0x3, "i2c0"), /* SDA */
SUNXI_FUNCTION(0x4, "pwm1"),
SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
/* HOLE */
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* WE */
SUNXI_FUNCTION(0x3, "mmc2"), /* DS */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
SUNXI_FUNCTION(0x3, "mmc2"), /* RST */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
SUNXI_FUNCTION(0x4, "spi0"), /* MOSI */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */
SUNXI_FUNCTION(0x4, "spi0"), /* CS0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* CE0 */
SUNXI_FUNCTION(0x4, "spi0"), /* MISO */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* RE */
SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
SUNXI_FUNCTION(0x4, "spi0"), /* CS1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
SUNXI_FUNCTION(0x4, "spi0"), /* CLK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 14)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
SUNXI_FUNCTION(0x4, "spi0"), /* WP */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 15)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */
SUNXI_FUNCTION(0x4, "spi0"), /* HOLD */
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 16)),
/* HOLE */
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
SUNXI_FUNCTION(0x3, "lvds0"), /* D0P */
SUNXI_FUNCTION(0x4, "dsi0"), /* DP0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
SUNXI_FUNCTION(0x3, "lvds0"), /* D0N */
SUNXI_FUNCTION(0x4, "dsi0"), /* DM0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
SUNXI_FUNCTION(0x3, "lvds0"), /* D1P */
SUNXI_FUNCTION(0x4, "dsi0"), /* DP1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
SUNXI_FUNCTION(0x3, "lvds0"), /* D1N */
SUNXI_FUNCTION(0x4, "dsi0"), /* DM1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
SUNXI_FUNCTION(0x3, "lvds0"), /* D2P */
SUNXI_FUNCTION(0x4, "dsi0"), /* CKP */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
SUNXI_FUNCTION(0x3, "lvds0"), /* D2N */
SUNXI_FUNCTION(0x4, "dsi0"), /* CKM */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
SUNXI_FUNCTION(0x3, "lvds0"), /* CKP */
SUNXI_FUNCTION(0x4, "dsi0"), /* DP2 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
SUNXI_FUNCTION(0x3, "lvds0"), /* CKN */
SUNXI_FUNCTION(0x4, "dsi0"), /* DM2 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
SUNXI_FUNCTION(0x4, "dsi0"), /* DP3 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
SUNXI_FUNCTION(0x4, "dsi0"), /* DM3 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
SUNXI_FUNCTION(0x4, "spi1"), /* CS */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
SUNXI_FUNCTION(0x4, "spi1"), /* CLK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
SUNXI_FUNCTION(0x4, "spi1"), /* MISO */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
SUNXI_FUNCTION(0x4, "uart3"), /* TX */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
SUNXI_FUNCTION(0x4, "uart3"), /* RX */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
SUNXI_FUNCTION(0x4, "uart4"), /* TX */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
SUNXI_FUNCTION(0x4, "uart4"), /* RX */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
SUNXI_FUNCTION(0x3, "pwm2"),
SUNXI_FUNCTION(0x4, "uart4"), /* RTS */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 20)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
SUNXI_FUNCTION(0x3, "pwm3"),
SUNXI_FUNCTION(0x4, "uart4"), /* CTS */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 21)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "pwm1"),
SUNXI_FUNCTION(0x4, "i2c0"), /* SCK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 22)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "pwm0"),
SUNXI_FUNCTION(0x4, "i2c0"), /* SDA */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 23)),
/* HOLE */
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
SUNXI_FUNCTION(0x3, "pll"), /* LOCK_DBG */
SUNXI_FUNCTION(0x4, "i2s2"), /* MCLK */
SUNXI_FUNCTION(0x5, "ledc"), /* LEDC */
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "bist0"), /* RESULT0 */
SUNXI_FUNCTION(0x4, "i2s2"), /* BCLK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "csi"), /* SM_VS */
SUNXI_FUNCTION(0x3, "bist0"), /* RESULT1 */
SUNXI_FUNCTION(0x4, "i2s2"), /* LRCK */
SUNXI_FUNCTION(0x5, "tcon0"), /* TRIG */
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "bist0"), /* RESULT2 */
SUNXI_FUNCTION(0x4, "i2s2"), /* DOUT0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "bist0"), /* RESULT3 */
SUNXI_FUNCTION(0x4, "i2s2"), /* DIN0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)),
/* HOLE */
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
SUNXI_FUNCTION(0x3, "jtag"), /* MS1 */
SUNXI_FUNCTION(0x4, "jtag_gpu"), /* MS_GPU */
SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 0)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
SUNXI_FUNCTION(0x3, "jtag"), /* DI1 */
SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DI_GPU */
SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 1)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
SUNXI_FUNCTION(0x3, "uart0"), /* TX */
SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 2)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
SUNXI_FUNCTION(0x3, "jtag"), /* DO */
SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DO_GPU */
SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 3)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
SUNXI_FUNCTION(0x3, "uart0"), /* RX */
SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 4)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
SUNXI_FUNCTION(0x3, "jtag"), /* CK */
SUNXI_FUNCTION(0x4, "jtag_gpu"), /* CK_GPU */
SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 5)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 6)),
/* HOLE */
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 0)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 1)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 2)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 3)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 4)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 5)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart1"), /* TX */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 6)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart1"), /* RX */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 7)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 8)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
SUNXI_FUNCTION(0x3, "i2s1"), /* MCLK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 9)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2s1"), /* BCLK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 10)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2s1"), /* LRCK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 11)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2s1_dout0"), /* DOUT0 */
SUNXI_FUNCTION(0x4, "i2s1_din1"), /* DIN1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 12)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2s1_din0"), /* DIN0 */
SUNXI_FUNCTION(0x4, "i2s1_dout1"), /* DOUT1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 13)),
/* HOLE */
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
SUNXI_FUNCTION(0x5, "emac0"), /* RXD1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 0)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
SUNXI_FUNCTION(0x5, "emac0"), /* RXD0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 1)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
SUNXI_FUNCTION(0x5, "emac0"), /* RXCTL */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 2)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
SUNXI_FUNCTION(0x3, "cir0"), /* OUT */
SUNXI_FUNCTION(0x5, "emac0"), /* CLKIN */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 3)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart3"), /* TX */
SUNXI_FUNCTION(0x3, "spi1"), /* CS */
SUNXI_FUNCTION(0x5, "emac0"), /* TXD1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 4)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart3"), /* RX */
SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
SUNXI_FUNCTION(0x4, "ledc"),
SUNXI_FUNCTION(0x5, "emac0"), /* TXD0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 5)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart3"), /* RTS */
SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
SUNXI_FUNCTION(0x5, "emac0"), /* TXCK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 6)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart3"), /* CTS */
SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
SUNXI_FUNCTION(0x4, "spdif"), /* OUT */
SUNXI_FUNCTION(0x5, "emac0"), /* TXCTL */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 7)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "dmic"), /* CLK */
SUNXI_FUNCTION(0x3, "spi2"), /* CS */
SUNXI_FUNCTION(0x4, "i2s2"), /* MCLK */
SUNXI_FUNCTION(0x5, "i2s2_din2"), /* DIN2 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 8)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "dmic"), /* DATA0 */
SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
SUNXI_FUNCTION(0x4, "i2s2"), /* BCLK */
SUNXI_FUNCTION(0x5, "emac0"), /* MDC */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 9)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "dmic"), /* DATA1 */
SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
SUNXI_FUNCTION(0x4, "i2s2"), /* LRCK */
SUNXI_FUNCTION(0x5, "emac0"), /* MDIO */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 10)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "dmic"), /* DATA2 */
SUNXI_FUNCTION(0x3, "spi2"), /* MISO */
SUNXI_FUNCTION(0x4, "i2s2_dout0"), /* DOUT0 */
SUNXI_FUNCTION(0x5, "i2s2_din1"), /* DIN1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 11)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "dmic"), /* DATA3 */
SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */
SUNXI_FUNCTION(0x4, "i2s2_din0"), /* DIN0 */
SUNXI_FUNCTION(0x5, "i2s2_dout1"), /* DOUT1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 12)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */
SUNXI_FUNCTION(0x4, "i2s3"), /* MCLK */
SUNXI_FUNCTION(0x5, "emac0"), /* EPHY */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 13)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x4, "i2s3"), /* BCLK */
SUNXI_FUNCTION(0x5, "emac0"), /* RXD3 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 14)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x4, "i2s3"), /* LRCK */
SUNXI_FUNCTION(0x5, "emac0"), /* RXD2 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 15)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2s3_dout0"), /* DOUT0 */
SUNXI_FUNCTION(0x4, "i2s3_din1"), /* DIN1 */
SUNXI_FUNCTION(0x5, "emac0"), /* RXCK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 16)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2s3_dout1"), /* DOUT1 */
SUNXI_FUNCTION(0x4, "i2s3_din0"), /* DIN0 */
SUNXI_FUNCTION(0x5, "emac0"), /* TXD3 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 17)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "cir0"), /* OUT */
SUNXI_FUNCTION(0x3, "i2s3_dout2"), /* DOUT2 */
SUNXI_FUNCTION(0x4, "i2s3_din2"), /* DIN2 */
SUNXI_FUNCTION(0x5, "emac0"), /* TXD2 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 18)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "cir0"), /* IN */
SUNXI_FUNCTION(0x3, "i2s3_dout3"), /* DOUT3 */
SUNXI_FUNCTION(0x4, "i2s3_din3"), /* DIN3 */
SUNXI_FUNCTION(0x5, "ledc"),
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 19)),
};
static const unsigned int a100_irq_bank_map[] = { 0, 1, 2, 3, 4, 5, 6};
static const struct sunxi_pinctrl_desc a100_pinctrl_data = {
.pins = a100_pins,
.npins = ARRAY_SIZE(a100_pins),
.irq_banks = 7,
.irq_bank_map = a100_irq_bank_map,
.io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL,
};
static int a100_pinctrl_probe(struct platform_device *pdev)
{
return sunxi_pinctrl_init(pdev, &a100_pinctrl_data);
}
static const struct of_device_id a100_pinctrl_match[] = {
{ .compatible = "allwinner,sun50i-a100-pinctrl", },
{}
};
MODULE_DEVICE_TABLE(of, a100_pinctrl_match);
static struct platform_driver a100_pinctrl_driver = {
.probe = a100_pinctrl_probe,
.driver = {
.name = "sun50i-a100-pinctrl",
.of_match_table = a100_pinctrl_match,
},
};
module_platform_driver(a100_pinctrl_driver);

1
drivers/rtc/rtc-goldfish.c
View file

@ -73,6 +73,7 @@ static int goldfish_rtc_set_alarm(struct device *dev,
rtc_alarm64 = rtc_tm_to_time64(&alrm->time) * NSEC_PER_SEC;
writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
writel(rtc_alarm64, base + TIMER_ALARM_LOW);
writel(1, base + TIMER_IRQ_ENABLED);
} else {
/*
* if this function was called with enabled=0

4
drivers/s390/scsi/zfcp_fsf.c
View file

@ -409,7 +409,7 @@ static void zfcp_fsf_req_complete(struct zfcp_fsf_req *req)
return;
}
del_timer(&req->timer);
del_timer_sync(&req->timer);
zfcp_fsf_protstatus_eval(req);
zfcp_fsf_fsfstatus_eval(req);
req->handler(req);
@ -762,7 +762,7 @@ static int zfcp_fsf_req_send(struct zfcp_fsf_req *req)
req->qdio_req.qdio_outb_usage = atomic_read(&qdio->req_q_free);
req->issued = get_tod_clock();
if (zfcp_qdio_send(qdio, &req->qdio_req)) {
del_timer(&req->timer);
del_timer_sync(&req->timer);
/* lookup request again, list might have changed */
zfcp_reqlist_find_rm(adapter->req_list, req_id);
zfcp_erp_adapter_reopen(adapter, 0, "fsrs__1");

12
drivers/scsi/libfc/fc_disc.c
View file

@ -581,8 +581,12 @@ static void fc_disc_gpn_id_resp(struct fc_seq *sp, struct fc_frame *fp,
if (PTR_ERR(fp) == -FC_EX_CLOSED)
goto out;
if (IS_ERR(fp))
goto redisc;
if (IS_ERR(fp)) {
mutex_lock(&disc->disc_mutex);
fc_disc_restart(disc);
mutex_unlock(&disc->disc_mutex);
goto out;
}
cp = fc_frame_payload_get(fp, sizeof(*cp));
if (!cp)
@ -609,7 +613,7 @@ static void fc_disc_gpn_id_resp(struct fc_seq *sp, struct fc_frame *fp,
new_rdata->disc_id = disc->disc_id;
fc_rport_login(new_rdata);
}
goto out;
goto free_fp;
}
rdata->disc_id = disc->disc_id;
mutex_unlock(&rdata->rp_mutex);
@ -626,6 +630,8 @@ redisc:
fc_disc_restart(disc);
mutex_unlock(&disc->disc_mutex);
}
free_fp:
fc_frame_free(fp);
out:
kref_put(&rdata->kref, fc_rport_destroy);
if (!IS_ERR(fp))

4
drivers/scsi/qla2xxx/qla_os.c
View file

@ -2804,10 +2804,6 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
/* This may fail but that's ok */
pci_enable_pcie_error_reporting(pdev);
/* Turn off T10-DIF when FC-NVMe is enabled */
if (ql2xnvmeenable)
ql2xenabledif = 0;
ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
if (!ha) {
ql_log_pci(ql_log_fatal, pdev, 0x0009,

28
drivers/scsi/ufs/ufs-mediatek.c
View file

@ -16,6 +16,7 @@
#include <linux/soc/mediatek/mtk_sip_svc.h>
#include "ufshcd.h"
#include "ufshcd-crypto.h"
#include "ufshcd-pltfrm.h"
#include "ufs_quirks.h"
#include "unipro.h"
@ -25,6 +26,9 @@
arm_smccc_smc(MTK_SIP_UFS_CONTROL, \
cmd, val, 0, 0, 0, 0, 0, &(res))
#define ufs_mtk_crypto_ctrl(res, enable) \
ufs_mtk_smc(UFS_MTK_SIP_CRYPTO_CTRL, enable, res)
#define ufs_mtk_ref_clk_notify(on, res) \
ufs_mtk_smc(UFS_MTK_SIP_REF_CLK_NOTIFICATION, on, res)
@ -32,6 +36,8 @@
ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, high, res)
static struct ufs_dev_fix ufs_mtk_dev_fixups[] = {
UFS_FIX(UFS_VENDOR_MICRON, UFS_ANY_MODEL,
UFS_DEVICE_QUIRK_DELAY_AFTER_LPM),
UFS_FIX(UFS_VENDOR_SKHYNIX, "H9HQ21AFAMZDAR",
UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES),
END_FIX
@ -73,6 +79,18 @@ static void ufs_mtk_cfg_unipro_cg(struct ufs_hba *hba, bool enable)
}
}
static void ufs_mtk_crypto_enable(struct ufs_hba *hba)
{
struct arm_smccc_res res;
ufs_mtk_crypto_ctrl(res, 1);
if (res.a0) {
dev_info(hba->dev, "%s: crypto enable failed, err: %lu\n",
__func__, res.a0);
hba->caps &= ~UFSHCD_CAP_CRYPTO;
}
}
static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
enum ufs_notify_change_status status)
{
@ -83,6 +101,9 @@ static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
hba->vps->hba_enable_delay_us = 0;
else
hba->vps->hba_enable_delay_us = 600;
if (ufshcd_hba_is_crypto_supported(hba))
ufs_mtk_crypto_enable(hba);
}
return 0;
@ -191,7 +212,7 @@ int ufs_mtk_wait_link_state(struct ufs_hba *hba, u32 state,
ktime_t timeout, time_checked;
u32 val;
timeout = ktime_add_us(ktime_get(), ms_to_ktime(max_wait_ms));
timeout = ktime_add_ms(ktime_get(), max_wait_ms);
do {
time_checked = ktime_get();
ufshcd_writel(hba, 0x20, REG_UFS_DEBUG_SEL);
@ -317,6 +338,9 @@ static int ufs_mtk_init(struct ufs_hba *hba)
/* Enable clock-gating */
hba->caps |= UFSHCD_CAP_CLK_GATING;
/* Enable inline encryption */
hba->caps |= UFSHCD_CAP_CRYPTO;
/* Enable WriteBooster */
hba->caps |= UFSHCD_CAP_WB_EN;
hba->vps->wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(80);
@ -552,7 +576,7 @@ static int ufs_mtk_link_set_lpm(struct ufs_hba *hba)
static void ufs_mtk_vreg_set_lpm(struct ufs_hba *hba, bool lpm)
{
if (!hba->vreg_info.vccq2)
if (!hba->vreg_info.vccq2 || !hba->vreg_info.vcc)
return;
if (lpm & !hba->vreg_info.vcc->enabled)

5
drivers/scsi/ufs/ufs-mediatek.h
View file

@ -33,8 +33,8 @@
/*
* Vendor specific pre-defined parameters
*/
#define UFS_MTK_LIMIT_NUM_LANES_RX 1
#define UFS_MTK_LIMIT_NUM_LANES_TX 1
#define UFS_MTK_LIMIT_NUM_LANES_RX 2
#define UFS_MTK_LIMIT_NUM_LANES_TX 2
#define UFS_MTK_LIMIT_HSGEAR_RX UFS_HS_G3
#define UFS_MTK_LIMIT_HSGEAR_TX UFS_HS_G3
#define UFS_MTK_LIMIT_PWMGEAR_RX UFS_PWM_G4
@ -70,6 +70,7 @@ enum {
*/
#define MTK_SIP_UFS_CONTROL MTK_SIP_SMC_CMD(0x276)
#define UFS_MTK_SIP_DEVICE_RESET BIT(1)
#define UFS_MTK_SIP_CRYPTO_CTRL BIT(2)
#define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3)
/*

7
drivers/scsi/ufs/ufs_quirks.h
View file

@ -167,4 +167,11 @@ struct ufs_dev_fix {
#define UFS_DEVICE_QUIRK_PA_HIBER8TIME (1 << 15)
#endif
/*
* Some UFS devices require delay after VCC power rail is turned-off.
* Enable this quirk to introduce 5ms delays after VCC power-off during
* suspend flow.
*/
#define UFS_DEVICE_QUIRK_DELAY_AFTER_LPM (1 << 11)
#endif /* UFS_QUIRKS_H_ */

19
drivers/scsi/ufs/ufshcd.c
View file

@ -1650,6 +1650,7 @@ unblock_reqs:
int ufshcd_hold(struct ufs_hba *hba, bool async)
{
int rc = 0;
bool flush_result;
unsigned long flags;
if (!ufshcd_is_clkgating_allowed(hba))
@ -1676,7 +1677,9 @@ start:
break;
}
spin_unlock_irqrestore(hba->host->host_lock, flags);
flush_work(&hba->clk_gating.ungate_work);
flush_result = flush_work(&hba->clk_gating.ungate_work);
if (hba->clk_gating.is_suspended && !flush_result)
goto out;
spin_lock_irqsave(hba->host->host_lock, flags);
goto start;
}
@ -5548,6 +5551,9 @@ static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
{
if (hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL)
return;
if (enable)
ufshcd_wb_buf_flush_enable(hba);
else
@ -8506,6 +8512,8 @@ out:
static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
{
bool vcc_off = false;
/*
* It seems some UFS devices may keep drawing more than sleep current
* (atleast for 500us) from UFS rails (especially from VCCQ rail).
@ -8534,13 +8542,22 @@ static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
!hba->dev_info.is_lu_power_on_wp) {
ufshcd_setup_vreg(hba, false);
vcc_off = true;
} else if (!ufshcd_is_ufs_dev_active(hba)) {
ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
vcc_off = true;
if (!ufshcd_is_link_active(hba)) {
ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
}
}
/*
* Some UFS devices require delay after VCC power rail is turned-off.
*/
if (vcc_off && hba->vreg_info.vcc &&
hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)
usleep_range(5000, 5100);
}
static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)

5
drivers/scsi/ufs/ufshcd.h
View file

@ -876,6 +876,11 @@ struct ufs_hba {
*/
#define UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR 0x1000
/*
* This quirk needs to disable manual flush for write booster
*/
#define UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL 0x4000
unsigned int quirks; /* Deviations from standard UFSHCI spec. */
/* Device deviations from standard UFS device spec. */

3
drivers/spi/Kconfig
View file

@ -956,4 +956,7 @@ config SPI_SLAVE_SYSTEM_CONTROL
endif # SPI_SLAVE
config SPI_DYNAMIC
def_bool ACPI || OF_DYNAMIC || SPI_SLAVE
endif # SPI

27
drivers/spi/spi-stm32.c
View file

@ -14,6 +14,7 @@
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/pinctrl/consumer.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>
#include <linux/spi/spi.h>
@ -1986,6 +1987,8 @@ static int stm32_spi_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev);
pinctrl_pm_select_sleep_state(&pdev->dev);
return 0;
}
@ -1997,13 +2000,18 @@ static int stm32_spi_runtime_suspend(struct device *dev)
clk_disable_unprepare(spi->clk);
return 0;
return pinctrl_pm_select_sleep_state(dev);
}
static int stm32_spi_runtime_resume(struct device *dev)
{
struct spi_master *master = dev_get_drvdata(dev);
struct stm32_spi *spi = spi_master_get_devdata(master);
int ret;
ret = pinctrl_pm_select_default_state(dev);
if (ret)
return ret;
return clk_prepare_enable(spi->clk);
}
@ -2033,10 +2041,23 @@ static int stm32_spi_resume(struct device *dev)
return ret;
ret = spi_master_resume(master);
if (ret)
if (ret) {
clk_disable_unprepare(spi->clk);
return ret;
}
return ret;
ret = pm_runtime_get_sync(dev);
if (ret) {
dev_err(dev, "Unable to power device:%d\n", ret);
return ret;
}
spi->cfg->config(spi);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return 0;
}
#endif

21
drivers/spi/spi.c
View file

@ -475,6 +475,12 @@ static LIST_HEAD(spi_controller_list);
*/
static DEFINE_MUTEX(board_lock);
/*
* Prevents addition of devices with same chip select and
* addition of devices below an unregistering controller.
*/
static DEFINE_MUTEX(spi_add_lock);
/**
* spi_alloc_device - Allocate a new SPI device
* @ctlr: Controller to which device is connected
@ -553,7 +559,6 @@ static int spi_dev_check(struct device *dev, void *data)
*/
int spi_add_device(struct spi_device *spi)
{
static DEFINE_MUTEX(spi_add_lock);
struct spi_controller *ctlr = spi->controller;
struct device *dev = ctlr->dev.parent;
int status;
@ -581,6 +586,13 @@ int spi_add_device(struct spi_device *spi)
goto done;
}
/* Controller may unregister concurrently */
if (IS_ENABLED(CONFIG_SPI_DYNAMIC) &&
!device_is_registered(&ctlr->dev)) {
status = -ENODEV;
goto done;
}
/* Descriptors take precedence */
if (ctlr->cs_gpiods)
spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select];
@ -2582,6 +2594,10 @@ void spi_unregister_controller(struct spi_controller *ctlr)
struct spi_controller *found;
int id = ctlr->bus_num;
/* Prevent addition of new devices, unregister existing ones */
if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
mutex_lock(&spi_add_lock);
device_for_each_child(&ctlr->dev, NULL, __unregister);
/* First make sure that this controller was ever added */
@ -2602,6 +2618,9 @@ void spi_unregister_controller(struct spi_controller *ctlr)
if (found == ctlr)
idr_remove(&spi_master_idr, id);
mutex_unlock(&board_lock);
if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
mutex_unlock(&spi_add_lock);
}
EXPORT_SYMBOL_GPL(spi_unregister_controller);

6
drivers/staging/android/ion/heaps/ion_page_pool.c
View file

@ -79,6 +79,7 @@ struct page *ion_page_pool_alloc(struct ion_page_pool *pool)
return page;
}
EXPORT_SYMBOL_GPL(ion_page_pool_alloc);
void ion_page_pool_free(struct ion_page_pool *pool, struct page *page)
{
@ -86,6 +87,7 @@ void ion_page_pool_free(struct ion_page_pool *pool, struct page *page)
ion_page_pool_add(pool, page);
}
EXPORT_SYMBOL_GPL(ion_page_pool_free);
static int ion_page_pool_total(struct ion_page_pool *pool, bool high)
{
@ -107,6 +109,7 @@ int ion_page_pool_nr_pages(struct ion_page_pool *pool)
return nr_total_pages;
}
EXPORT_SYMBOL_GPL(ion_page_pool_nr_pages);
int ion_page_pool_shrink(struct ion_page_pool *pool, gfp_t gfp_mask,
int nr_to_scan)
@ -141,6 +144,7 @@ int ion_page_pool_shrink(struct ion_page_pool *pool, gfp_t gfp_mask,
return freed;
}
EXPORT_SYMBOL_GPL(ion_page_pool_shrink);
struct ion_page_pool *ion_page_pool_create(gfp_t gfp_mask, unsigned int order)
{
@ -159,8 +163,10 @@ struct ion_page_pool *ion_page_pool_create(gfp_t gfp_mask, unsigned int order)
return pool;
}
EXPORT_SYMBOL_GPL(ion_page_pool_create);
void ion_page_pool_destroy(struct ion_page_pool *pool)
{
kfree(pool);
}
EXPORT_SYMBOL_GPL(ion_page_pool_destroy);

18
drivers/staging/android/ion/ion_dma_buf.c
View file

@ -163,25 +163,12 @@ static int ion_dma_buf_begin_cpu_access(struct dma_buf *dmabuf,
{
struct ion_buffer *buffer = dmabuf->priv;
struct ion_heap *heap = buffer->heap;
void *vaddr;
struct ion_dma_buf_attachment *a;
int ret;
if (heap->buf_ops.begin_cpu_access)
return heap->buf_ops.begin_cpu_access(dmabuf, direction);
/*
* TODO: Move this elsewhere because we don't always need a vaddr
* FIXME: Why do we need a vaddr here?
*/
ret = 0;
mutex_lock(&buffer->lock);
vaddr = ion_buffer_kmap_get(buffer);
if (IS_ERR(vaddr)) {
ret = PTR_ERR(vaddr);
goto unlock;
}
if (!(buffer->flags & ION_FLAG_CACHED))
goto unlock;
@ -194,7 +181,7 @@ static int ion_dma_buf_begin_cpu_access(struct dma_buf *dmabuf,
unlock:
mutex_unlock(&buffer->lock);
return ret;
return 0;
}
static int
@ -227,9 +214,6 @@ static int ion_dma_buf_end_cpu_access(struct dma_buf *dmabuf,
return heap->buf_ops.end_cpu_access(dmabuf, direction);
mutex_lock(&buffer->lock);
ion_buffer_kmap_put(buffer);
if (!(buffer->flags & ION_FLAG_CACHED))
goto unlock;

2
drivers/target/target_core_user.c
View file

@ -601,7 +601,7 @@ static inline void tcmu_flush_dcache_range(void *vaddr, size_t size)
size = round_up(size+offset, PAGE_SIZE);
while (size) {
flush_dcache_page(virt_to_page(start));
flush_dcache_page(vmalloc_to_page(start));
start += PAGE_SIZE;
size -= PAGE_SIZE;
}

71
drivers/vfio/vfio_iommu_type1.c
View file

@ -1187,13 +1187,16 @@ static int vfio_bus_type(struct device *dev, void *data)
static int vfio_iommu_replay(struct vfio_iommu *iommu,
struct vfio_domain *domain)
{
struct vfio_domain *d;
struct vfio_domain *d = NULL;
struct rb_node *n;
unsigned long limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT;
int ret;
/* Arbitrarily pick the first domain in the list for lookups */
d = list_first_entry(&iommu->domain_list, struct vfio_domain, next);
if (!list_empty(&iommu->domain_list))
d = list_first_entry(&iommu->domain_list,
struct vfio_domain, next);
n = rb_first(&iommu->dma_list);
for (; n; n = rb_next(n)) {
@ -1211,6 +1214,11 @@ static int vfio_iommu_replay(struct vfio_iommu *iommu,
phys_addr_t p;
dma_addr_t i;
if (WARN_ON(!d)) { /* mapped w/o a domain?! */
ret = -EINVAL;
goto unwind;
}
phys = iommu_iova_to_phys(d->domain, iova);
if (WARN_ON(!phys)) {
@ -1240,7 +1248,7 @@ static int vfio_iommu_replay(struct vfio_iommu *iommu,
if (npage <= 0) {
WARN_ON(!npage);
ret = (int)npage;
return ret;
goto unwind;
}
phys = pfn << PAGE_SHIFT;
@ -1249,14 +1257,67 @@ static int vfio_iommu_replay(struct vfio_iommu *iommu,
ret = iommu_map(domain->domain, iova, phys,
size, dma->prot | domain->prot);
if (ret)
return ret;
if (ret) {
if (!dma->iommu_mapped)
vfio_unpin_pages_remote(dma, iova,
phys >> PAGE_SHIFT,
size >> PAGE_SHIFT,
true);
goto unwind;
}
iova += size;
}
}
/* All dmas are now mapped, defer to second tree walk for unwind */
for (n = rb_first(&iommu->dma_list); n; n = rb_next(n)) {
struct vfio_dma *dma = rb_entry(n, struct vfio_dma, node);
dma->iommu_mapped = true;
}
return 0;
unwind:
for (; n; n = rb_prev(n)) {
struct vfio_dma *dma = rb_entry(n, struct vfio_dma, node);
dma_addr_t iova;
if (dma->iommu_mapped) {
iommu_unmap(domain->domain, dma->iova, dma->size);
continue;
}
iova = dma->iova;
while (iova < dma->iova + dma->size) {
phys_addr_t phys, p;
size_t size;
dma_addr_t i;
phys = iommu_iova_to_phys(domain->domain, iova);
if (!phys) {
iova += PAGE_SIZE;
continue;
}
size = PAGE_SIZE;
p = phys + size;
i = iova + size;
while (i < dma->iova + dma->size &&
p == iommu_iova_to_phys(domain->domain, i)) {
size += PAGE_SIZE;
p += PAGE_SIZE;
i += PAGE_SIZE;
}
iommu_unmap(domain->domain, iova, size);
vfio_unpin_pages_remote(dma, iova, phys >> PAGE_SHIFT,
size >> PAGE_SHIFT, true);
}
}
return ret;
}
/*

2
drivers/video/fbdev/efifb.c
View file

@ -453,7 +453,7 @@ static int efifb_probe(struct platform_device *dev)
info->apertures->ranges[0].base = efifb_fix.smem_start;
info->apertures->ranges[0].size = size_remap;
if (efi_enabled(EFI_BOOT) &&
if (efi_enabled(EFI_MEMMAP) &&
!efi_mem_desc_lookup(efifb_fix.smem_start, &md)) {
if ((efifb_fix.smem_start + efifb_fix.smem_len) >
(md.phys_addr + (md.num_pages << EFI_PAGE_SHIFT))) {

3
drivers/virtio/virtio_ring.c
View file

@ -1960,6 +1960,9 @@ bool virtqueue_poll(struct virtqueue *_vq, unsigned last_used_idx)
{
struct vring_virtqueue *vq = to_vvq(_vq);
if (unlikely(vq->broken))
return false;
virtio_mb(vq->weak_barriers);
return vq->packed_ring ? virtqueue_poll_packed(_vq, last_used_idx) :
virtqueue_poll_split(_vq, last_used_idx);

2
drivers/xen/preempt.c
View file

@ -27,7 +27,7 @@ EXPORT_SYMBOL_GPL(xen_in_preemptible_hcall);
asmlinkage __visible void xen_maybe_preempt_hcall(void)
{
if (unlikely(__this_cpu_read(xen_in_preemptible_hcall)
&& need_resched())) {
&& need_resched() && !preempt_count())) {
/*
* Clear flag as we may be rescheduled on a different
* cpu.

Some files were not shown because too many files have changed in this diff Show more