mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-31 04:01:48 -04:00
Merge branch 'acpi-soc'
* acpi-soc: PM / clk: don't leave clocks enabled when driver not bound i2c: dw: Add APM X-Gene ACPI I2C device support ACPI / APD: Add APM X-Gene ACPI I2C device support ACPI / LPSS: change 'does not have' to 'has' in comment Revert "dmaengine: dw: platform: provide platform data for Intel" dmaengine: dw: return immediately from IRQ when DMA isn't in use dmaengine: dw: platform: power on device on shutdown ACPI / LPSS: override power state for LPSS DMA device ACPI / LPSS: power on when probe() and otherwise when remove() ACPI / LPSS: do delay for all LPSS devices when D3->D0 ACPI / LPSS: allow to use specific PM domain during ->probe() Revert "ACPI / LPSS: allow to use specific PM domain during ->probe()" device core: add BUS_NOTIFY_DRIVER_NOT_BOUND notification x86/platform/iosf_mbi: Remove duplicate definitions Conflicts: drivers/i2c/busses/i2c-designware-platdrv.c
This commit is contained in:
Rafael J. Wysocki
commit
1e3f28a552
16 changed files with 333 additions and 167 deletions
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@ -51,7 +51,7 @@ struct apd_private_data {
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const struct apd_device_desc *dev_desc;
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};
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#ifdef CONFIG_X86_AMD_PLATFORM_DEVICE
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#if defined(CONFIG_X86_AMD_PLATFORM_DEVICE) || defined(CONFIG_ARM64)
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#define APD_ADDR(desc) ((unsigned long)&desc)
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static int acpi_apd_setup(struct apd_private_data *pdata)
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@ -71,6 +71,7 @@ static int acpi_apd_setup(struct apd_private_data *pdata)
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return 0;
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}
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#ifdef CONFIG_X86_AMD_PLATFORM_DEVICE
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static struct apd_device_desc cz_i2c_desc = {
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.setup = acpi_apd_setup,
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.fixed_clk_rate = 133000000,
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@ -80,6 +81,14 @@ static struct apd_device_desc cz_uart_desc = {
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.setup = acpi_apd_setup,
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.fixed_clk_rate = 48000000,
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};
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#endif
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#ifdef CONFIG_ARM64
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static struct apd_device_desc xgene_i2c_desc = {
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.setup = acpi_apd_setup,
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.fixed_clk_rate = 100000000,
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};
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#endif
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#else
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@ -132,9 +141,14 @@ static int acpi_apd_create_device(struct acpi_device *adev,
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static const struct acpi_device_id acpi_apd_device_ids[] = {
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/* Generic apd devices */
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#ifdef CONFIG_X86_AMD_PLATFORM_DEVICE
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{ "AMD0010", APD_ADDR(cz_i2c_desc) },
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{ "AMD0020", APD_ADDR(cz_uart_desc) },
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{ "AMD0030", },
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#endif
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#ifdef CONFIG_ARM64
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{ "APMC0D0F", APD_ADDR(xgene_i2c_desc) },
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#endif
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{ }
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};
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@ -15,6 +15,7 @@
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/mutex.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/clk-lpss.h>
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#include <linux/pm_runtime.h>
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@ -26,6 +27,10 @@ ACPI_MODULE_NAME("acpi_lpss");
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#ifdef CONFIG_X86_INTEL_LPSS
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#include <asm/cpu_device_id.h>
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#include <asm/iosf_mbi.h>
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#include <asm/pmc_atom.h>
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#define LPSS_ADDR(desc) ((unsigned long)&desc)
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#define LPSS_CLK_SIZE 0x04
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@ -71,7 +76,7 @@ struct lpss_device_desc {
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void (*setup)(struct lpss_private_data *pdata);
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};
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static struct lpss_device_desc lpss_dma_desc = {
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static const struct lpss_device_desc lpss_dma_desc = {
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.flags = LPSS_CLK,
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};
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@ -84,6 +89,23 @@ struct lpss_private_data {
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u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
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};
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/* LPSS run time quirks */
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static unsigned int lpss_quirks;
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/*
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* LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
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*
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* The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
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* it can be powered off automatically whenever the last LPSS device goes down.
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* In case of no power any access to the DMA controller will hang the system.
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* The behaviour is reproduced on some HP laptops based on Intel BayTrail as
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* well as on ASuS T100TA transformer.
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*
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* This quirk overrides power state of entire LPSS island to keep DMA powered
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* on whenever we have at least one other device in use.
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*/
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#define LPSS_QUIRK_ALWAYS_POWER_ON BIT(0)
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/* UART Component Parameter Register */
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#define LPSS_UART_CPR 0xF4
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#define LPSS_UART_CPR_AFCE BIT(4)
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@ -196,13 +218,21 @@ static const struct lpss_device_desc bsw_i2c_dev_desc = {
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.setup = byt_i2c_setup,
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};
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static struct lpss_device_desc bsw_spi_dev_desc = {
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static const struct lpss_device_desc bsw_spi_dev_desc = {
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.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
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| LPSS_NO_D3_DELAY,
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.prv_offset = 0x400,
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.setup = lpss_deassert_reset,
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};
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#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
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static const struct x86_cpu_id lpss_cpu_ids[] = {
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ICPU(0x37), /* Valleyview, Bay Trail */
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ICPU(0x4c), /* Braswell, Cherry Trail */
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{}
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};
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#else
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#define LPSS_ADDR(desc) (0UL)
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@ -574,6 +604,17 @@ static void acpi_lpss_restore_ctx(struct device *dev,
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{
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unsigned int i;
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for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
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unsigned long offset = i * sizeof(u32);
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__lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
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dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
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pdata->prv_reg_ctx[i], offset);
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}
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}
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static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
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{
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/*
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* The following delay is needed or the subsequent write operations may
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* fail. The LPSS devices are actually PCI devices and the PCI spec
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@ -586,14 +627,34 @@ static void acpi_lpss_restore_ctx(struct device *dev,
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delay = 0;
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msleep(delay);
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}
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for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
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unsigned long offset = i * sizeof(u32);
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static int acpi_lpss_activate(struct device *dev)
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{
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struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
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int ret;
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__lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
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dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
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pdata->prv_reg_ctx[i], offset);
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}
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ret = acpi_dev_runtime_resume(dev);
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if (ret)
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return ret;
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acpi_lpss_d3_to_d0_delay(pdata);
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/*
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* This is called only on ->probe() stage where a device is either in
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* known state defined by BIOS or most likely powered off. Due to this
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* we have to deassert reset line to be sure that ->probe() will
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* recognize the device.
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*/
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if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
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lpss_deassert_reset(pdata);
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return 0;
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}
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static void acpi_lpss_dismiss(struct device *dev)
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{
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acpi_dev_runtime_suspend(dev);
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}
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#ifdef CONFIG_PM_SLEEP
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@ -621,6 +682,8 @@ static int acpi_lpss_resume_early(struct device *dev)
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if (ret)
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return ret;
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acpi_lpss_d3_to_d0_delay(pdata);
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if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
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acpi_lpss_restore_ctx(dev, pdata);
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@ -628,6 +691,89 @@ static int acpi_lpss_resume_early(struct device *dev)
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}
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#endif /* CONFIG_PM_SLEEP */
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/* IOSF SB for LPSS island */
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#define LPSS_IOSF_UNIT_LPIOEP 0xA0
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#define LPSS_IOSF_UNIT_LPIO1 0xAB
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#define LPSS_IOSF_UNIT_LPIO2 0xAC
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#define LPSS_IOSF_PMCSR 0x84
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#define LPSS_PMCSR_D0 0
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#define LPSS_PMCSR_D3hot 3
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#define LPSS_PMCSR_Dx_MASK GENMASK(1, 0)
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#define LPSS_IOSF_GPIODEF0 0x154
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#define LPSS_GPIODEF0_DMA1_D3 BIT(2)
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#define LPSS_GPIODEF0_DMA2_D3 BIT(3)
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#define LPSS_GPIODEF0_DMA_D3_MASK GENMASK(3, 2)
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static DEFINE_MUTEX(lpss_iosf_mutex);
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static void lpss_iosf_enter_d3_state(void)
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{
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u32 value1 = 0;
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u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK;
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u32 value2 = LPSS_PMCSR_D3hot;
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u32 mask2 = LPSS_PMCSR_Dx_MASK;
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/*
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* PMC provides an information about actual status of the LPSS devices.
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* Here we read the values related to LPSS power island, i.e. LPSS
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* devices, excluding both LPSS DMA controllers, along with SCC domain.
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*/
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u32 func_dis, d3_sts_0, pmc_status, pmc_mask = 0xfe000ffe;
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int ret;
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ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
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if (ret)
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return;
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mutex_lock(&lpss_iosf_mutex);
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ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
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if (ret)
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goto exit;
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/*
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* Get the status of entire LPSS power island per device basis.
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* Shutdown both LPSS DMA controllers if and only if all other devices
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* are already in D3hot.
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*/
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pmc_status = (~(d3_sts_0 | func_dis)) & pmc_mask;
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if (pmc_status)
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goto exit;
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iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
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LPSS_IOSF_PMCSR, value2, mask2);
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iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
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LPSS_IOSF_PMCSR, value2, mask2);
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iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
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LPSS_IOSF_GPIODEF0, value1, mask1);
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exit:
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mutex_unlock(&lpss_iosf_mutex);
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}
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static void lpss_iosf_exit_d3_state(void)
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{
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u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3;
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u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK;
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u32 value2 = LPSS_PMCSR_D0;
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u32 mask2 = LPSS_PMCSR_Dx_MASK;
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mutex_lock(&lpss_iosf_mutex);
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iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
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LPSS_IOSF_GPIODEF0, value1, mask1);
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iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
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LPSS_IOSF_PMCSR, value2, mask2);
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iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
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LPSS_IOSF_PMCSR, value2, mask2);
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mutex_unlock(&lpss_iosf_mutex);
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}
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static int acpi_lpss_runtime_suspend(struct device *dev)
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{
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struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
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@ -640,7 +786,17 @@ static int acpi_lpss_runtime_suspend(struct device *dev)
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if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
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acpi_lpss_save_ctx(dev, pdata);
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return acpi_dev_runtime_suspend(dev);
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ret = acpi_dev_runtime_suspend(dev);
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/*
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* This call must be last in the sequence, otherwise PMC will return
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* wrong status for devices being about to be powered off. See
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* lpss_iosf_enter_d3_state() for further information.
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*/
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if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
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lpss_iosf_enter_d3_state();
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return ret;
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}
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static int acpi_lpss_runtime_resume(struct device *dev)
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@ -648,10 +804,19 @@ static int acpi_lpss_runtime_resume(struct device *dev)
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struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
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int ret;
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/*
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* This call is kept first to be in symmetry with
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* acpi_lpss_runtime_suspend() one.
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*/
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if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
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lpss_iosf_exit_d3_state();
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ret = acpi_dev_runtime_resume(dev);
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if (ret)
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return ret;
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acpi_lpss_d3_to_d0_delay(pdata);
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if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
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acpi_lpss_restore_ctx(dev, pdata);
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@ -660,6 +825,10 @@ static int acpi_lpss_runtime_resume(struct device *dev)
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#endif /* CONFIG_PM */
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static struct dev_pm_domain acpi_lpss_pm_domain = {
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#ifdef CONFIG_PM
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.activate = acpi_lpss_activate,
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.dismiss = acpi_lpss_dismiss,
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#endif
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.ops = {
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#ifdef CONFIG_PM
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#ifdef CONFIG_PM_SLEEP
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@ -705,8 +874,14 @@ static int acpi_lpss_platform_notify(struct notifier_block *nb,
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}
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switch (action) {
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case BUS_NOTIFY_ADD_DEVICE:
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case BUS_NOTIFY_BIND_DRIVER:
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pdev->dev.pm_domain = &acpi_lpss_pm_domain;
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break;
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case BUS_NOTIFY_DRIVER_NOT_BOUND:
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case BUS_NOTIFY_UNBOUND_DRIVER:
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pdev->dev.pm_domain = NULL;
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break;
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case BUS_NOTIFY_ADD_DEVICE:
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if (pdata->dev_desc->flags & LPSS_LTR)
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return sysfs_create_group(&pdev->dev.kobj,
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&lpss_attr_group);
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@ -714,7 +889,6 @@ static int acpi_lpss_platform_notify(struct notifier_block *nb,
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case BUS_NOTIFY_DEL_DEVICE:
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if (pdata->dev_desc->flags & LPSS_LTR)
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sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
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pdev->dev.pm_domain = NULL;
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break;
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default:
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break;
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@ -754,10 +928,19 @@ static struct acpi_scan_handler lpss_handler = {
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void __init acpi_lpss_init(void)
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{
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if (!lpt_clk_init()) {
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bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
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acpi_scan_add_handler(&lpss_handler);
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}
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const struct x86_cpu_id *id;
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int ret;
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ret = lpt_clk_init();
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if (ret)
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return;
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id = x86_match_cpu(lpss_cpu_ids);
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if (id)
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lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
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bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
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acpi_scan_add_handler(&lpss_handler);
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}
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#else
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