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asoc: Set clock index correctly in mi2s slave mode

Browse source 
When msm acts as slave mode in mi2s, clock ID for a
clock index is not properly updated for first time.
Fix the sequence issue to update clock ID accordingly
for slave mode.

Change-Id: Ie601547e8a5677ee778ff707f55e2d861a35f459
Signed-off-by: Aditya Bavanari <quic_abavanar@quicinc.com>
This commit is contained in:
Aditya Bavanari 2022-02-25 10:17:53 +05:30
commit 1e417536ee
9 changed files with 45 additions and 36 deletions
Download patch file Download diff file Expand all files Collapse all files

9
asoc/bengal.c
View file

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/clk.h>
@ -3956,6 +3957,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
*/
mutex_lock(&mi2s_intf_conf[index].lock);
if (++mi2s_intf_conf[index].ref_cnt == 1) {
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
ret = msm_mi2s_set_sclk(substream, true);
if (ret < 0) {
dev_err(rtd->card->dev,
@ -3978,11 +3982,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
}
}
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
fmt = SND_SOC_DAIFMT_CBM_CFM;
}
ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
if (ret < 0) {
pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

9
asoc/holi.c
View file

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/clk.h>
@ -4459,6 +4460,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
}
if (++mi2s_intf_conf[index].ref_cnt == 1) {
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
ret = msm_mi2s_set_sclk(substream, true);
if (ret < 0) {
dev_err(rtd->card->dev,
@ -4481,11 +4485,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
}
}
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
fmt = SND_SOC_DAIFMT_CBM_CFM;
}
ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
if (ret < 0) {
pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

9
asoc/kona.c
View file

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/clk.h>
@ -5100,6 +5101,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
}
if (++mi2s_intf_conf[index].ref_cnt == 1) {
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
ret = msm_mi2s_set_sclk(substream, true);
if (ret < 0) {
dev_err(rtd->card->dev,
@ -5122,11 +5126,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
}
}
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
fmt = SND_SOC_DAIFMT_CBM_CFM;
}
ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
if (ret < 0) {
pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

9
asoc/lahaina.c
View file

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/clk.h>
@ -5440,6 +5441,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
mi2s_clk[index].clk_freq_in_hz);
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
ret = msm_mi2s_set_sclk(substream, true);
if (ret < 0) {
dev_err(rtd->card->dev,
@ -5462,11 +5466,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
}
}
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
fmt = SND_SOC_DAIFMT_CBM_CFM;
}
ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
if (ret < 0) {
pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

9
asoc/qcs405.c
View file

@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/clk.h>
#include <linux/delay.h>
@ -7065,6 +7066,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
if (++mi2s_intf_conf[index].ref_cnt == 1) {
if (data_format == AFE_DSD_DATA)
fmt = SND_SOC_DAIFMT_CBM_CFS;
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
ret = msm_mi2s_set_sclk(substream, true);
if (ret < 0) {
dev_err(rtd->card->dev,
@ -7101,11 +7105,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
}
}
}
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
fmt = SND_SOC_DAIFMT_CBM_CFM;
}
ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
if (ret < 0) {
pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

9
asoc/sa6155.c
View file

@ -1,4 +1,5 @@
/* Copyright (c) 2014-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/*
* Copyright 2011, The Android Open Source Project
@ -5037,6 +5038,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
intf_conf = &pdata->mi2s_intf_conf[index];
mutex_lock(&intf_conf->lock);
if (++intf_conf->ref_cnt == 1) {
/* Check if msm needs to provide the clock to the interface */
if (!intf_conf->msm_is_mi2s_master)
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
ret = msm_mi2s_set_sclk(substream, true);
if (ret < 0) {
dev_err(rtd->card->dev,
@ -5054,11 +5058,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
__func__, ret_pinctrl);
}
}
/* Check if msm needs to provide the clock to the interface */
if (!intf_conf->msm_is_mi2s_master) {
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
if (!intf_conf->msm_is_mi2s_master)
fmt = SND_SOC_DAIFMT_CBM_CFM;
}
ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
if (ret < 0) {
pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

9
asoc/sa8155.c
View file

@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2014-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/*
* Copyright 2011, The Android Open Source Project
@ -7427,6 +7428,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
intf_conf = &pdata->mi2s_intf_conf[index];
mutex_lock(&intf_conf->lock);
if (++intf_conf->ref_cnt == 1) {
/* Check if msm needs to provide the clock to the interface */
if (!intf_conf->msm_is_mi2s_master)
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
ret = msm_mi2s_set_sclk(substream, true);
if (ret < 0) {
dev_err(rtd->card->dev,
@ -7444,11 +7448,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
__func__, ret_pinctrl);
}
}
/* Check if msm needs to provide the clock to the interface */
if (!intf_conf->msm_is_mi2s_master) {
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
if (!intf_conf->msm_is_mi2s_master)
fmt = SND_SOC_DAIFMT_CBM_CFM;
}
ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
if (ret < 0) {
pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

9
asoc/sm6150.c
View file

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2018-2019, 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/clk.h>
@ -5908,6 +5909,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
*/
mutex_lock(&mi2s_intf_conf[index].lock);
if (++mi2s_intf_conf[index].ref_cnt == 1) {
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
ret = msm_mi2s_set_sclk(substream, true);
if (ret < 0) {
dev_err(rtd->card->dev,
@ -5932,11 +5936,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
msm_cdc_pinctrl_select_active_state(
pdata->mi2s_gpio_p[index]);
}
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
fmt = SND_SOC_DAIFMT_CBM_CFM;
}
ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
if (ret < 0) {
pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",

9
asoc/sm8150.c
View file

@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2016-2019, 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/clk.h>
@ -4852,6 +4853,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
*/
mutex_lock(&mi2s_intf_conf[index].lock);
if (++mi2s_intf_conf[index].ref_cnt == 1) {
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
ret = msm_mi2s_set_sclk(substream, true);
if (ret < 0) {
dev_err(rtd->card->dev,
@ -4868,11 +4872,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
__func__, ret_pinctrl);
}
}
/* Check if msm needs to provide the clock to the interface */
if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
if (!mi2s_intf_conf[index].msm_is_mi2s_master)
fmt = SND_SOC_DAIFMT_CBM_CFM;
}
ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
if (ret < 0) {
pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",