From 1e7204e942d0e8720abf30bab43e88f3cd6646a3 Mon Sep 17 00:00:00 2001 From: huangys Date: Tue, 14 May 2019 17:06:50 +0800 Subject: [PATCH] audio: remove Cirrus code to vendor/cirrus/audio/dlkm Cirrus has their own code release branch. and these branches are not compatible each other. audio team can't branch off motorola kernel modules Note: cs4012 and msm-cirrus-playback had not beeen moved away. Change-Id: Ib14bf3c5a5cfaa9c363a59c4ba0f871e11e9c92a Signed-off-by: huangys Reviewed-on: https://gerrit.mot.com/1350673 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Guobin Zhang Submit-Approved: Jira Key --- .../bindings/extcon/extcon-madera.txt | 140 - .../devicetree/bindings/gpio/gpio-madera.txt | 19 - .../interrupt-controller/cirrus,madera.txt | 38 - Documentation/devicetree/bindings/madera.txt | 49 - .../devicetree/bindings/mfd/madera.txt | 91 - .../bindings/regulator/madera-ldo1.txt | 25 - .../bindings/regulator/madera-micsupp.txt | 24 - .../devicetree/bindings/sound/cs35l36.txt | 110 - .../devicetree/bindings/sound/cs35l41.txt | 198 - drivers/extcon/Android.mk | 8 - drivers/extcon/Kbuild | 6 - drivers/extcon/Makefile | 10 - drivers/extcon/extcon-madera.c | 3346 ------- drivers/gpio/Android.mk | 8 - drivers/gpio/Kbuild | 5 - drivers/gpio/Makefile | 10 - drivers/gpio/gpio-madera.c | 186 - drivers/irqchip/Android.mk | 9 - drivers/irqchip/Kbuild | 13 - drivers/irqchip/Makefile | 10 - drivers/irqchip/irq-madera-cs47l35.c | 115 - drivers/irqchip/irq-madera-cs47l85.c | 124 - drivers/irqchip/irq-madera-cs47l90.c | 125 - drivers/irqchip/irq-madera.c | 441 - drivers/irqchip/irq-madera.h | 20 - drivers/mfd/Android.mk | 9 - drivers/mfd/Kbuild | 12 - drivers/mfd/Makefile | 10 - drivers/mfd/cs47l35-tables.c | 1698 ---- drivers/mfd/cs47l90-tables.c | 2843 ------ drivers/mfd/madera-core.c | 953 -- drivers/mfd/madera-spi.c | 132 - drivers/mfd/madera.h | 54 - drivers/regulator/Android.mk | 14 - drivers/regulator/Kbuild | 5 - drivers/regulator/Makefile | 10 - drivers/regulator/madera-ldo1.c | 208 - drivers/regulator/madera-micsupp.c | 322 - include/dt-bindings/extcon/extcon-madera.h | 68 - include/dt-bindings/mfd/madera.h | 123 - include/dt-bindings/sound/madera.h | 18 - include/linux/extcon/extcon-madera-pdata.h | 156 - include/linux/extcon/extcon-madera.h | 163 - include/linux/irqchip/irq-madera-pdata.h | 25 - include/linux/irqchip/irq-madera.h | 98 - include/linux/mfd/madera/core.h | 103 - include/linux/mfd/madera/pdata.h | 94 - include/linux/mfd/madera/registers.h | 8865 ----------------- include/linux/regulator/madera-ldo1.h | 24 - include/linux/regulator/madera-micsupp.h | 21 - include/sound/cs35l35.h | 102 - include/sound/cs35l36.h | 51 - include/sound/cs35l41.h | 82 - include/sound/madera-pdata.h | 74 - sound/soc/codecs/Android.mk | 53 - sound/soc/codecs/Kbuild | 29 - sound/soc/codecs/aov_trigger.c | 313 - sound/soc/codecs/aov_trigger.h | 20 - sound/soc/codecs/cs35l35.c | 1656 --- sound/soc/codecs/cs35l35.h | 291 - sound/soc/codecs/cs35l36-tables.c | 367 - sound/soc/codecs/cs35l36.c | 1787 ---- sound/soc/codecs/cs35l36.h | 448 - sound/soc/codecs/cs35l41-i2c.c | 153 - sound/soc/codecs/cs35l41-spi.c | 116 - sound/soc/codecs/cs35l41-tables.c | 953 -- sound/soc/codecs/cs35l41.c | 2072 ---- sound/soc/codecs/cs35l41.h | 766 -- sound/soc/codecs/cs47l35.c | 2104 ---- sound/soc/codecs/cs47l90.c | 3054 ------ sound/soc/codecs/madera-slimbus.c | 534 - sound/soc/codecs/madera-slimbus.h | 57 - sound/soc/codecs/madera.c | 4847 --------- sound/soc/codecs/madera.h | 544 - sound/soc/codecs/wm_adsp.c | 5198 ---------- sound/soc/codecs/wm_adsp.h | 240 - sound/soc/codecs/wmfw.h | 202 - 77 files changed, 47271 deletions(-) delete mode 100644 Documentation/devicetree/bindings/extcon/extcon-madera.txt delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-madera.txt delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/cirrus,madera.txt delete mode 100644 Documentation/devicetree/bindings/madera.txt delete mode 100644 Documentation/devicetree/bindings/mfd/madera.txt delete mode 100644 Documentation/devicetree/bindings/regulator/madera-ldo1.txt delete mode 100644 Documentation/devicetree/bindings/regulator/madera-micsupp.txt delete mode 100644 Documentation/devicetree/bindings/sound/cs35l36.txt delete mode 100644 Documentation/devicetree/bindings/sound/cs35l41.txt delete mode 100644 drivers/extcon/Android.mk delete mode 100644 drivers/extcon/Kbuild delete mode 100644 drivers/extcon/Makefile delete mode 100644 drivers/extcon/extcon-madera.c delete mode 100644 drivers/gpio/Android.mk delete mode 100644 drivers/gpio/Kbuild delete mode 100644 drivers/gpio/Makefile delete mode 100644 drivers/gpio/gpio-madera.c delete mode 100644 drivers/irqchip/Android.mk delete mode 100644 drivers/irqchip/Kbuild delete mode 100644 drivers/irqchip/Makefile delete mode 100644 drivers/irqchip/irq-madera-cs47l35.c delete mode 100644 drivers/irqchip/irq-madera-cs47l85.c delete mode 100644 drivers/irqchip/irq-madera-cs47l90.c delete mode 100644 drivers/irqchip/irq-madera.c delete mode 100644 drivers/irqchip/irq-madera.h delete mode 100644 drivers/mfd/Android.mk delete mode 100644 drivers/mfd/Kbuild delete mode 100644 drivers/mfd/Makefile delete mode 100644 drivers/mfd/cs47l35-tables.c delete mode 100644 drivers/mfd/cs47l90-tables.c delete mode 100644 drivers/mfd/madera-core.c delete mode 100644 drivers/mfd/madera-spi.c delete mode 100644 drivers/mfd/madera.h delete mode 100644 drivers/regulator/Android.mk delete mode 100644 drivers/regulator/Kbuild delete mode 100644 drivers/regulator/Makefile delete mode 100644 drivers/regulator/madera-ldo1.c delete mode 100644 drivers/regulator/madera-micsupp.c delete mode 100644 include/dt-bindings/extcon/extcon-madera.h delete mode 100644 include/dt-bindings/mfd/madera.h delete mode 100644 include/dt-bindings/sound/madera.h delete mode 100644 include/linux/extcon/extcon-madera-pdata.h delete mode 100644 include/linux/extcon/extcon-madera.h delete mode 100644 include/linux/irqchip/irq-madera-pdata.h delete mode 100644 include/linux/irqchip/irq-madera.h delete mode 100644 include/linux/mfd/madera/core.h delete mode 100644 include/linux/mfd/madera/pdata.h delete mode 100644 include/linux/mfd/madera/registers.h delete mode 100644 include/linux/regulator/madera-ldo1.h delete mode 100644 include/linux/regulator/madera-micsupp.h delete mode 100644 include/sound/cs35l35.h delete mode 100644 include/sound/cs35l36.h delete mode 100644 include/sound/cs35l41.h delete mode 100644 include/sound/madera-pdata.h delete mode 100644 sound/soc/codecs/aov_trigger.c delete mode 100644 sound/soc/codecs/aov_trigger.h delete mode 100644 sound/soc/codecs/cs35l35.c delete mode 100644 sound/soc/codecs/cs35l35.h delete mode 100644 sound/soc/codecs/cs35l36-tables.c delete mode 100644 sound/soc/codecs/cs35l36.c delete mode 100644 sound/soc/codecs/cs35l36.h delete mode 100644 sound/soc/codecs/cs35l41-i2c.c delete mode 100644 sound/soc/codecs/cs35l41-spi.c delete mode 100644 sound/soc/codecs/cs35l41-tables.c delete mode 100644 sound/soc/codecs/cs35l41.c delete mode 100644 sound/soc/codecs/cs35l41.h delete mode 100644 sound/soc/codecs/cs47l35.c delete mode 100644 sound/soc/codecs/cs47l90.c delete mode 100644 sound/soc/codecs/madera-slimbus.c delete mode 100644 sound/soc/codecs/madera-slimbus.h delete mode 100644 sound/soc/codecs/madera.c delete mode 100644 sound/soc/codecs/madera.h delete mode 100644 sound/soc/codecs/wm_adsp.c delete mode 100644 sound/soc/codecs/wm_adsp.h delete mode 100644 sound/soc/codecs/wmfw.h diff --git a/Documentation/devicetree/bindings/extcon/extcon-madera.txt b/Documentation/devicetree/bindings/extcon/extcon-madera.txt deleted file mode 100644 index 7201c1c37634..000000000000 --- a/Documentation/devicetree/bindings/extcon/extcon-madera.txt +++ /dev/null @@ -1,140 +0,0 @@ -Cirrus Logic Madera class audio codecs extcon driver - -The extcon configuration settings are a child node of the parent MFD driver -binding. -See Documentation/devicetree/bindings/mfd/madera.txt - -This node contains one or more child nodes to describe the configuration for -each accessory detect. - -Mandatory properties: - - compatible : must be "cirrus,madera-extcon" - - #address-cells : must be 1 - - #size-cells : must be 0 - -Optional properties: - - cirrus,gpsw : Settings for the general purpose switches, set as per the - SWn_MODE bits in the GP Switch 1 register. If given must be 2 cells. - First cell is the value for the SW1_MODE - Second cell is the value for the SW2_MODE (cs47l90, cs47l91) - - - cirrus,micd-pol-gpio : GPIO specifier for the GPIO controlling the headset - polarity if one exists. One cell for each child node. - - - cirrus,micd-pol-alt-gpio : GPIO specifier for second GPIO controlling the headset - polarity if one exist. If 2 alt gpio is configured, its value will be set opposite - to the first GPIO. - -Child node mandatory properties: - - reg : output number this configuration applies to, must be 1 - -Child node optional properties: - - cirrus,init-mic-delay-ms : Additional delay to wait headset plug in totally - delay specified in milliseconds - - - cirrus,micd-detect-debounce-ms : Additional software microphone detection - debounce specified in milliseconds - - - cirrus,micd-manual-debounce : Additional software button detection - debounce specified as a number - - - cirrus,micd-bias-start-time : Time allowed for MICBIAS to startup prior to - performing microphone detection, specified as per the MICD_BIAS_STARTTIME - bits in the register MIC_DETECT_1 - - - cirrus,micd-rate : Delay between successive microphone detection - measurements, specified as per the MICD_RATE bits in the register - MIC_DETECT_1 - - - cirrus,micd-dbtime : Microphone detection hardware debounce level, specified - as per the MICD_DBTIME bits in the register MIC_DETECT_1 - - - cirrus,micd-timeout-ms : Timeout for microphone detection, specified in - milliseconds - - - cirrus,micd-force-micbias : Force MICBIAS continuously on during microphone - detection and button detection - - - cirrus,micd-software-compare : Use a software comparison to determine mic - presence - - - cirrus,jd-invert : Invert the polarity of the jack detection switch - - - cirrus,jd-use-jd2 : Use JD2 input with JD1 for dual jack detection. - - - cirrus,fixed-hpdet-imp : Do not perform any headphone detection, just use - the fixed value specified here as the headphone impedance. Value is in - hundredths-of-an-ohm (ohms * 100) - - - cirrus,hpdet-ext-res : Impedance of external series resistor on hpdet. - Value is in hundredths-of-an-ohm (ohms * 100) - - - cirrus,hpdet-short-circuit-imp : Specifies the maximum impedance in ohms - that will be considered as a short circuit - - - cirrus,hpdet-channel : Set which channel is used for headphone impedance - measurement. 0 = left, 1 = right - - - cirrus,micd-clamp-mode : Specifies the logic of the micdetect clamp block - - - cirrus,hpd-pins : 4 cells specifying the clamp and sense pins to use. - - where clamp_x is the clamp pin for channel x and sense_x is the impedance - sense pin for channel x, as per the HPD_OUT_SEL field of HEADPHONE_DETECT_0 - register. A value >0xFFFF means use the default. - (cs47l90, cs47l91) - - - cirrus,micd-configs : Headset polarity configurations, variable length but - must be a multiple of 5 cells, each 5-cell group represents one - polarity configuration - first cell is the value of - ACCDET_SRC register field (CS47L35, CS47L85, WM1840), - MICD_SENSE_SEL register field (all other codecs) - second cell is the accessory detection ground as per the MICD_GND_SEL - register field - the third cell is the MICBIAS to be used as per the MICD_BIAS_SRC register - field - fourth cell is the value of the micd-pol-gpio pin, a non-zero value - indicates this should be on - fifth cell is - set to zero (cs47l35, cs47l85, wm1840) - value of HPn_GND_SEL register field (all other codecs) - -Example: - -codec: cs47l85@0 { - compatible = "cirrus,cs47l85"; - - accdet { - compatible = "cirrus,madera-extcon"; - #address-cells = <1>; - #size-cells = <0>; - - cirrus,gpsw = <3 0>; - - cirrus,micd-pol-gpios = <&gpio 0> - - acc@1 { - reg = <1>; - - cirrus,micd-detect-debounce-ms = <10>; - cirrus,micd-bias-start-time = <0x1>; - cirrus,micd-rate = <0x1>; - cirrus,micd-dbtime = <0x1>; - cirrus,micd-timeout-ms = <10>; - cirrus,micd-force-micbias; - cirrus,micd-ranges = < - 11 0x100 - 28 0x101 - 54 0x102 - 100 0x103 - 186 0x104 - 430 0x105 - >; - cirrus,micd-configs = < - 0x1 0 1 0 2 - 0x0 0 2 1 2 - >; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/gpio/gpio-madera.txt b/Documentation/devicetree/bindings/gpio/gpio-madera.txt deleted file mode 100644 index e6feb856da99..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-madera.txt +++ /dev/null @@ -1,19 +0,0 @@ -Cirrus Logic Madera class audio codecs gpio driver - -See also the core bindings for the parent MFD driver: -See Documentation/devicetree/bindinge/mfd/madera.txt - -Required properties: - - - gpio-controller : Indicates this device is a GPIO controller. - - #gpio-cells : Must be 2. The first cell is the pin number. The second cell - is reserved for future use and must be zero - -Example: - -codec: cs47l85@0 { - compatible = "cirrus,cs47l85"; - - gpio-controller; - #gpio-cells = <2>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/cirrus,madera.txt b/Documentation/devicetree/bindings/interrupt-controller/cirrus,madera.txt deleted file mode 100644 index b6cd0c0ec0aa..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/cirrus,madera.txt +++ /dev/null @@ -1,38 +0,0 @@ -Cirrus Logic Madera class audio codec IRQ driver - -See also the core bindings for the parent MFD driver: -See Documentation/devicetree/bindinge/mfd/madera.txt - -Required properties: - - - interrupts : The interrupt line the /IRQ signal for the device is - connected to. - - - interrupt-controller : Madera class devices contain interrupt controllers - and may provide interrupt services to other devices. - - - interrupt-parent : The parent interrupt controller. - - - #interrupt-cells: the number of cells to describe an IRQ, this should be 2. - The first cell is the IRQ number. - The second cell is the flags, encoded as the trigger masks from - bindings/interrupt-controller/interrupts.txt - -Optional properties: - - cirrus,irq-gpios : The GPIO the host IRQ is connected to. Used when the - host IRQ is edge-triggered to emulate a level-triggered IRQ. If specified - must be exactly one GPIO entry - - - cirrus,irq_flags : host controller flags as defined in - bindings/interrupt-controller/interrupts.txt - -Example: - -codec: cs47l85@0 { - compatible = "cirrus,cs47l85"; - - interrupts = <&host_irq1>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&gic>; -}; diff --git a/Documentation/devicetree/bindings/madera.txt b/Documentation/devicetree/bindings/madera.txt deleted file mode 100644 index 89f96102cb1d..000000000000 --- a/Documentation/devicetree/bindings/madera.txt +++ /dev/null @@ -1,49 +0,0 @@ -Cirrus Logic Madera class audio codecs - -See also the core bindings for the parent MFD driver: -See Documentation/devicetree/bindinge/mfd/madera.txt - -Optional properties: - - cirrus,dmic-ref : DMIC reference for each input, one cell per input - - A value of 0 indicates MICVDD and is the default, other - values depend on the codec - see the datasheet for the INn_DMIC_SUP field - - - cirrus,dmic-clksrc : DMIC clock source for each input (CS47L90, CS47L91). - One cell per input. A value of 0 will source DMIC from the internally - generated clock within the ADC subsystem and a value of 1 will source DMIC - and External digital speakers with same clock - - - cirrus,inmode : A list of input mode settings for each input. A maximum - of 16 cells, with four cells per input in the order INnAL, INnAR INnBL INnBR. - For non-muxed inputs the first two cells for that input set the mode for - the left and right channel and the second two cells must be 0. - For muxed inputs (cs47l35 IN1, cs47l85 IN1 and IN2) the first two cells for - that input set the mode of the left and right A inputs and the second two - cells set the mode of the left and right B inputs. - Valid mode values are one of the MADERA_INMODE_xxx (see - include/dt-bindings/sound/madera.h). If the array is shorter than the number - of inputs the unspecified inputs default to MADERA_INMODE_DIFF. - - - cirrus,out-mono : Mono bit for each output, must contain six cells if - specified. A non-zero value indicates the corresponding output is mono. - - - cirrus,max-channels-clocked : The maximum number of channels to be clocked - on each AIF, useful for I2S systems with multiple data lines being mastered. - One cell for each AIF, use a value of zero for AIFs that should be handled - normally. - -Example: - -codec: cs47l35@0 { - compatible = "cirrus,cs47l35"; - - cirrus,dmic-ref = <0 0 1 0>; - cirrus,dmic-clksrc = <0 0 0 0>; - cirrus,inmode = < - 2 2 1 1 /* IN1A digital, IN1B single-ended */ - 0 0 0 0 /* IN2 differential */ - >; - cirrus,out-mono = <0 0 0 0 0 0>; - cirrus,max-channels-clocked = <2 0 0>; -}; diff --git a/Documentation/devicetree/bindings/mfd/madera.txt b/Documentation/devicetree/bindings/mfd/madera.txt deleted file mode 100644 index 5866c9a492fc..000000000000 --- a/Documentation/devicetree/bindings/mfd/madera.txt +++ /dev/null @@ -1,91 +0,0 @@ -Cirrus Logic Madera class audio codecs multi-function device - -These devices are audio SoCs with extensive digital capabilities and a range -of analogue I/O. - -See also the child driver bindings in: -bindings/extcon/extcon-madera.txt -bindings/gpio/gpio-madera.txt -bindings/interrupt-controller/cirrus,madera.txt -bindings/regulator/madera-ldo1.txt -bindings/regulator/madera-micsupp.txt -bindings/sound/madera.txt -bindings/switch/madera.txt - -Required properties: - - - compatible : One of the following chip-specific strings: - "cirrus,cs47l35" - "cirrus,cs47l85" - "cirrus,cs47l90" - "cirrus,cs47l91" - "cirrus,wm1840" - - - reg : I2C slave address when connected using I2C, chip select number when - using SPI. - - - DCVDD-supply : Power supply for the device as defined in - bindings/regulator/regulator.txt - Mandatory on CS47L35, CS47L90, CS47L91 - Optional on CS47L85, WM1840 - - - AVDD-supply, DBVDD1-supply, DBVDD2-supply, CPVDD1-supply, CPVDD2-supply : - Power supplies for the device - - - DBVDD3-supply, DBVDD4-supply : Power supplies for the device - (CS47L85, CS47L90, CS47L91, WM1840) - - - SPKVDDL-supply, SPKVDDR-supply : Power supplies for the device - (CS47L85, WM1840) - - - SPKVDD-supply : Power supplies for the device - (CS47L35) - -Optional properties: - - , MICVDD-supply : Power supply, only need to be specified if - powered externally - - - reset-gpios : One entry specifying the GPIO controlling /RESET. - As defined in bindings/gpio.txt. - - - cirrus,clk32k-src : set input source for codec 32kHz clock. - 0 = default, 1 = MCLK1, 2 = MCLK2, 3 = None - - - cirrus,gpio-defaults : A list of values for the GPn_CONFIGx registers. - There are two entries for each GPIO, corresponding to the GPn_CONFIG1 and - GPn_CONFIG2 registers for that GPIO. Defines for the appropriate values can - be found in . If absent, no configuration of these - registers is performed. If any entry has a value >0xFFFF the chip default - will be used. - - - cirrus,micbias1 : Configuration for the micbias regulator, there are 8 cells - - where - vout is the output voltage in millivolts - cap is non-zero value if an external capacitor is fitted - disA,B,C,D non-zero if that output should be actively discharged - soft non-zero to enable soft-start - bypass non-zero to enable bypass - - cirrus,micbias2 : See cirrus,micbias1 - - cirrus,micbias3 : See cirrus,micbias1 - - cirrus,micbias4 : See cirrus,micbias1 - -Example: - -codec: cs47l85@0 { - compatible = "cirrus,cs47l85"; - reg = <0>; - - reset-gpios = <&gpio 0>; - - cirrus,gpio-defaults = < - Madera_GP_FN_TXLRCLK - Madera_GP_DEFAULT - Madera_GP_DEFAULT - Madera_GP_DEFAULT - Madera_GP_DEFAULT - >; - - cirrus,micbias2 = <2600 0 1 0 0 0 1 0>; -}; diff --git a/Documentation/devicetree/bindings/regulator/madera-ldo1.txt b/Documentation/devicetree/bindings/regulator/madera-ldo1.txt deleted file mode 100644 index 8eaaf801d304..000000000000 --- a/Documentation/devicetree/bindings/regulator/madera-ldo1.txt +++ /dev/null @@ -1,25 +0,0 @@ -Cirrus Logic Madera class audio codecs LDO1 regulator driver - -Only required if you are using the codec internal LDO1 regulator. - -See also the core bindings for the parent MFD driver: -See Documentation/devicetree/bindinge/mfd/madera.txt - -Required properties: - - LDOVDD-supply : Power supply for the LDO1 regulator. - - - cirrus,ldoena-gpios : One entry specifying the GPIO controlling LDOENA. - As defined in bindings/gpio.txt. - -Optional subnodes: - - ldo1 : Initial data for the LDO1 regulator, as described in - bindings/regulator/regulator.txt - -Example: - -codec: cs47l85@0 { - compatible = "cirrus,cs47l85"; - - LDOVDD-supply = <&pmic_vdd1>; - cirrus,ldoena-gpios = <&gpio 0>; -}; diff --git a/Documentation/devicetree/bindings/regulator/madera-micsupp.txt b/Documentation/devicetree/bindings/regulator/madera-micsupp.txt deleted file mode 100644 index 011e6ce30996..000000000000 --- a/Documentation/devicetree/bindings/regulator/madera-micsupp.txt +++ /dev/null @@ -1,24 +0,0 @@ -Cirrus Logic Madera class audio codecs mic supply regulator driver - -Only required if the codec has an internal mic supply regulator. - -See also the core bindings for the parent MFD driver: -See Documentation/devicetree/bindinge/mfd/madera.txt - -Optional subnodes: - - - micvdd : Initial data for the MICVDD regulator, as covered in - Documentation/devicetree/bindings/regulator/regulator.txt - -Example: - -codec: cs47l85@0 { - compatible = "cirrus,cs47l85"; - - micvdd { - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <3300000>; - regulator-allow-bypass = <1>; - }; -}; - diff --git a/Documentation/devicetree/bindings/sound/cs35l36.txt b/Documentation/devicetree/bindings/sound/cs35l36.txt deleted file mode 100644 index 7ec08c8aa524..000000000000 --- a/Documentation/devicetree/bindings/sound/cs35l36.txt +++ /dev/null @@ -1,110 +0,0 @@ -CS35L36 Speaker Amplifier - -Required properties: - - - compatible : "cirrus,cs35l36" - - - reg : the I2C address of the device for I2C - - - VA-supply, VP-supply : power supplies for the device, - as covered in - Documentation/devicetree/bindings/regulator/regulator.txt. - -Optional properties: - - cirrus,sclk-force-output : Audio serial port SCLK force - output control. Forces the SCLK to continue to drive even - if no ASP_TXn channels are enabled. - - - cirrus,lrclk-force-output : Audio serial port LRCLK force - output control. Forces the LRCLK to continue to drive even - if no ASP_TXn channels are enabled. - - - cirrus,right-channel-amp : Boolean to determine which channel - the amplifier is to receive the audio data on. If present the - amplifier receives data on the right channel of I2S data. - If not present the amplifier receives data on the left - channel of I2S data - - - cirrus,boost-ctl-millivolt : Boost Voltage Value. Configures the boost - converter's output voltage in mV. The range is from 2550mV to 10000mV with - increments of 50mV. - (Default) VP - - - cirrus,boost-peak-milliamp : Boost-converter peak current limit in mA. - Configures the peak current by monitoring the current through the boost FET. - Range starts at 1600mA and goes to a maximum of 4500mA with increments of - 50mA. - (Default) 4.50 Amps - - - cirrus,amp-gain-zc : Boolean to determine if to use Amplifier gain-change - zero-cross - - - cirrus,ldm-mode-select : Amplifier level-dependent muting enable mode selection. - Configures whether the amplifier level-dependent muting is enabled for the various - blocks when the selected audio source has been below the AMP_LDM_THLD for a period - of time configured by AMP_LDM_DELAY. Any and all bits can be set. - - 00000 - All level-dependent muting functionality disabled (Default) - xxxx1 - Amplifier level-dependent muting detection enabled (OUT+/-; switching) - xxx1x - Boost converter DCM detection enabled - xx1xx - VMON low power mode detection enabled - x1xxx - IMON low power mode detection enabled - 1xxxx - VP brownout prevention detection enabled - - - cirrus,pdm-ldm-exit : Boolean : Amplifier PDM mode digital volume ramp enable. - When AMP_PDM_MODE = 1 controls whether the digital volume soft ramp is enabled - or disabled when exiting a level-dependent muted condition. The AMP_RAMP_PDM_DN - control is used to control desired ramp rate. - - - cirrus,pdm-ldm-enter : Boolean: Amplifier PDM mode digital volume ramp enable. - When AMP_PDM_MODE = 1 controls whether the digital volume soft ramp is enabled - or disabled when entering a level-dependent muted condition. The AMP_RAMP_PDM_UP - control is used to control desired ramp rate. - - - cirrus,pdm-channel-select : PDM Channel select. - 0x00 (Default) : Selects Channel A data when the PDM audio input is selected. - 0x01 : Selects Channel B data when the PDM audio input is selected - - - cirrus,weak-fet-disable : Boolean : The strength of the output drivers is - reduced when operating in a Weak-FET Drive Mode and must not be used to drive - a large load. - - - cirrus,classh-wk-fet-delay : Weak-FET entry delay. Controls the delay - (in ms) before the Class H algorithm switches to the weak-FET voltage - (after the audio falls and remains below the value specified in WKFET_AMP_THLD). - - 0 = 0ms - 1 = 5ms - 2 = 10ms - 3 = 50ms - 4 = 100ms (Default) - 5 = 200ms - 6 = 500ms - 7 = 1000ms - - - cirrus,classh-weak-fet-thld-millivolt : Weak-FET amplifier drive threshold. - Configures the signal threshold at which the PWM output stage enters - weak-FET operation. The range is 50mV to 700mV in 50mV increments. - - - cirrus,temp-warn-threshold : Amplifier overtemperature warning threshold. - Configures the threshold at which the overtemperature warning condition occurs. - When the threshold is met, the overtemperature warning attenuation is applied - and the TEMP_WARN_EINT interrupt status bit is set. - If TEMP_WARN_MASK = 0, INTb is asserted. - - 0 = 105C - 1 = 115C - 2 = 125C (Default) - 3 = 135C - -Example: - -cs35l36: cs35l36@58 { - compatible = "cirrus,cs35l36"; - reg = <0x58>; - VA-supply = <&dummy_vreg>; - VP-supply = <&dummy_vreg>; - reset-gpios = <&axi_gpio 54 0>; - - cirrus,boost-ctl-millivolt = <10000>; -}; diff --git a/Documentation/devicetree/bindings/sound/cs35l41.txt b/Documentation/devicetree/bindings/sound/cs35l41.txt deleted file mode 100644 index 479d916d4068..000000000000 --- a/Documentation/devicetree/bindings/sound/cs35l41.txt +++ /dev/null @@ -1,198 +0,0 @@ -CS35L41 Speaker Amplifier - -Required properties: - - - compatible : "cirrus,cs35l41" - "cirrus,cs35l40" - - - reg : the SPI chip select line for the device - - - VA-supply, VP-supply : power supplies for the device, - as covered in - Documentation/devicetree/bindings/regulator/regulator.txt. - - - Boost hardware configuration: - - These three properties should be used together to specify the external - component configuration of the part. See section 4.3.6 of the datasheet - for details regarding how these values are used to configure the - digital boost converter's control loop. - - - cirrus,boost-peak-milliamp : Boost-converter peak current limit in mA. - Configures the peak current by monitoring the current through the boost FET. - Range starts at 1600 mA and goes to a maximum of 4500 mA with increments - of 50 mA. - (Default) 4.50 Amps - - - cirrus,boost-ind-nanohenry : Boost inductor value, expressed in nH. Valid - values include 1000, 1200, 1500 and 2200. - - - cirrus,boost-cap-microfarad : Total equivalent boost capacitance on the VBST - and VAMP pins, derated at 11 volts DC. The value must be rounded to the - nearest integer and expressed in uF. - - -Optional properties: - - cirrus,sclk-force-output : Audio serial port SCLK force - output control. Forces the SCLK to continue to drive even - if no ASP_TXn channels are enabled. - - - cirrus,lrclk-force-output : Audio serial port LRCLK force - output control. Forces the LRCLK to continue to drive even - if no ASP_TXn channels are enabled. - - - cirrus,right-channel-amp : Boolean to determine which channel - the amplifier is to receive the audio data on. If present the - amplifier receives data on the right channel of I2S data. - If not present the amplifier receives data on the left - channel of I2S data - - - cirrus,boost-ctl-millivolt : Boost Voltage Value. Configures the - boost converter's output voltage in mV. The range is from 2550 mV to - 11000 mV with increments of 50 mV. - (Default) VP - - - cirrus,amp-gain-zc : Boolean to determine whether to use the amplifier - gain-change zero-crossing feature. If the feature is enabled, any - user-controlled amplifier gain change will occur on a zero-crossing point. - (Default) Disabled - - - cirrus,asp-sdout-hiz : Audio serial port SDOUT Hi-Z control. Sets the Hi-Z - configuration for SDOUT pin of amplifier. - - 0 = Logic 0 during unused slots, and while all transmit channels disabled - 1 = Hi-Z during unused slots but logic 0 while all transmit channels disabled - 2 = (Default) Logic 0 during unused slots, but Hi-Z while all transmit channels disabled - 3 = Hi-Z during unused slots and while all transmit channels disabled - - - cirrus,temp-warn-threshold : Amplifier overtemperature warning threshold. - Configures the threshold at which the overtemperature warning condition occurs. - When the threshold is met, the ovetemperature warning attenuation is applied - and the TEMP_WARN_EINT interrupt status bit is set. - If TEMP_WARN_MASK = 0, INTb is asserted. - - 0 = 105C - 1 = 115C - 2 = 125C (Default) - 3 = 135C - - - cirrus,noise-gate-enable : DSP Noise Gate feature. If present, noise - gate feature will be enabled. - - - cirrus,noise-gate-threshold : Threshold of audio signal input which the - noise gate considers the input audio to be at a low enough level to be - valid to enter a noise gating state of operation. - - 0 = -66 dBFS - 1 = -72 dBFS - 2 = -78 dBFS - 3 = -84 dBFS (default) - 4 = -90 dBFS - 5 = -96 dBFS - 6 = -102 dBFS - 7 = -108 dBFS - - - cirrus,noise-gate-delay : Time that the incoming audio signal must be - below the noise gate threshold prior to entering a noise gated state - - 0 = 5 ms - 1 = 10 ms - 2 = 25 ms - 3 = 50 ms (default) - 4 = 100 ms - 5 = 250 ms - 6 = 500 ms - 7 = 1 s - 8 = 5 s - 9 = 10 s - 10 = 20 s - 11 = 30 s - 12 = 40 s - 13 = 50 s - 14 = 60 s - 15 = 120 s - -Optional H/G Algorithm sub-node: - - The cs35l41 node can have a single "cirrus,classh-internal-algo" sub-node - that will disable automatic control of the internal H/G Algorithm. - - It is strongly recommended that the Datasheet be referenced when adjusting - or using these Class H Algorithm controls over the internal Algorithm. - Serious damage can occur to the Device and surrounding components. - - - cirrus,classh-internal-algo : Sub-node for the Internal Class H Algorithm - See Section 4.4 Internal Class H Algorithm in the Datasheet. - If not used, the device manages the ClassH Algorithm internally. - -Optional properties for the "cirrus,classh-internal-algo" Sub-node - - Section 7.9 Boost Control - - cirrus,classh-bst-overide : Boolean - - cirrus,classh-bst-max-limit - - Section 7.17 Class H, Weak-FET Control - - cirrus,classh-headroom - - cirrus,classh-release-rate - - cirrus,classh-mem-depth - - cirrus,classh-wk-fet-delay - - cirrus,classh-wk-fet-thld - - -Optional GPIO1 sub-node: - -The cs35l41 node can have an single "cirrus,gpio-config1" sub-node for -configuring the GPIO1 pin. - -- cirrus,gpio-polarity-invert : Boolean which specifies whether the GPIO1 -level is inverted. If this property is not present the level is not inverted. - -- cirrus,gpio-output-enable : Boolean which specifies whether the GPIO1 pin -is configured as an output. If this property is not present the -pin will be configured as an input. - -- cirrus,gpio-src-select : Configures the function of the GPIO1 pin. -Note that the options are different from the GPIO2 pin. - -0 = High Impedance (Default) -1 = GPIO -2 = Sync -3 = MCLK input - - -Optional GPIO2 sub-node: - -The cs35l41 node can have an single "cirrus,gpio-config2" sub-node for -configuring the GPIO1 pin. - -- cirrus,gpio-polarity-invert : Boolean which specifies whether the GPIO2 -level is inverted. If this property is not present the level is not inverted. - -- cirrus,gpio-output-enable : Boolean which specifies whether the GPIO2 pin -is configured as an output. If this property is not present the -pin will be configured as an input. - -- cirrus,gpio-src-select : Configures the function of the GPIO2 pin. -Note that the options are different from the GPIO1 pin. - -0 = High Impedance (Default) -1 = GPIO -2 = Open Drain INTB -3 = MCLK input -4 = Push-pull INTB (active low) -5 = Push-pull INT (active high) - - -Example: - -cs35l41: cs35l41@2 { - compatible = "cirrus,cs35l41"; - reg = <2>; - VA-supply = <&dummy_vreg>; - VP-supply = <&dummy_vreg>; - - cirrus,boost-peak-milliamp = <4500>; - cirrus,boost-ind-nanohenry = <1000>; - cirrus,boost-cap-microfarad = <15>; -}; diff --git a/drivers/extcon/Android.mk b/drivers/extcon/Android.mk deleted file mode 100644 index c3fd2a404244..000000000000 --- a/drivers/extcon/Android.mk +++ /dev/null @@ -1,8 +0,0 @@ -DLKM_DIR := motorola/kernel/modules -LOCAL_PATH := $(call my-dir) - -include $(CLEAR_VARS) -LOCAL_MODULE := extcon-madera.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk diff --git a/drivers/extcon/Kbuild b/drivers/extcon/Kbuild deleted file mode 100644 index 16022c5fb0a8..000000000000 --- a/drivers/extcon/Kbuild +++ /dev/null @@ -1,6 +0,0 @@ -# add -Wall to try to catch everything we can. -EXTRA_CFLAGS += -Wall -EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include -EXTRA_CFLAGS += -DCONFIG_EXTCON_MADERA_INPUT_EVENT - -obj-m += extcon-madera.o diff --git a/drivers/extcon/Makefile b/drivers/extcon/Makefile deleted file mode 100644 index 34b09dd815a7..000000000000 --- a/drivers/extcon/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build - -all: - $(MAKE) -C $(KERNEL_SRC) M=$(shell pwd) modules $(KBUILD_OPTIONS) - -modules_install: - $(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(shell pwd) modules_install - -clean: - $(MAKE) -C $(KERNEL_SRC) M=$(PWD) clean \ No newline at end of file diff --git a/drivers/extcon/extcon-madera.c b/drivers/extcon/extcon-madera.c deleted file mode 100644 index 3fbd14e36e43..000000000000 --- a/drivers/extcon/extcon-madera.c +++ /dev/null @@ -1,3346 +0,0 @@ -/* - * extcon-madera.c - Extcon driver for Cirrus Logic Madera codecs - * - * Copyright 2015-2017 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include -#include - -#define MADERA_MAX_MICD_RANGE 8 - -#define MADERA_MICD_CLAMP_MODE_JD1L 0x4 -#define MADERA_MICD_CLAMP_MODE_JD1H 0x5 -#define MADERA_MICD_CLAMP_MODE_JD1L_JD2L 0x8 -#define MADERA_MICD_CLAMP_MODE_JD1L_JD2H 0x9 -#define MADERA_MICD_CLAMP_MODE_JD1H_JD2H 0xb - -#define MADERA_MICD_WRONG_POLARITY 30 - -#define MADERA_HPDET_LINEOUT 500000 /* 5,000 ohms */ -#define MADERA_HPDET_MAX_OHM 10000 -#define MADERA_HPDET_MAX_HOHM (MADERA_HPDET_MAX_OHM * 100) -#define MADERA_HP_SHORT_IMPEDANCE_MIN 4 - -#define MADERA_HPDET_DEBOUNCE_MS 500 -#define MADERA_DEFAULT_MICD_TIMEOUT_MS 2000 - -#define MADERA_HPDONE_PROBE_INTERVAL_MS 20 -#define MADERA_HPDONE_PROBE_COUNT 15 - -#define MADERA_MICROPHONE_MIN_OHM 1258 -#define MADERA_MICROPHONE_MAX_OHM 30000 - -#define MADERA_HP_TUNING_INVALID -1 - -static const unsigned int madera_cable[] = { - EXTCON_MECHANICAL, - EXTCON_JACK_HEADPHONE, - EXTCON_JACK_LINE_OUT, - EXTCON_JACK_MICROPHONE, - EXTCON_NONE, -}; - -static const struct madera_micd_config cs47l85_micd_default_modes[] = { - { MADERA_ACCD_SENSE_MICDET2, 0, MADERA_ACCD_BIAS_SRC_MICBIAS1, 0, 0 }, - { MADERA_ACCD_SENSE_MICDET1, 0, MADERA_ACCD_BIAS_SRC_MICBIAS2, 1, 0 }, -}; - -static const struct madera_micd_config madera_micd_default_modes[] = { - { MADERA_MICD1_SENSE_MICDET1, MADERA_MICD1_GND_MICDET2, - MADERA_MICD_BIAS_SRC_MICBIAS1A, 0, MADERA_HPD_GND_HPOUTFB2 }, - { MADERA_MICD1_SENSE_MICDET2, MADERA_MICD1_GND_MICDET1, - MADERA_MICD_BIAS_SRC_MICBIAS1B, 1, MADERA_HPD_GND_HPOUTFB1 }, -}; - -static const unsigned int madera_default_hpd_pins[4] = { - [0] = MADERA_HPD_OUT_OUT1L, - [1] = MADERA_HPD_SENSE_HPDET1, - [2] = MADERA_HPD_OUT_OUT1R, - [3] = MADERA_HPD_SENSE_HPDET1, -}; - -static struct madera_micd_range madera_micd_default_ranges[] = { - { .max = 70, .key = KEY_MEDIA }, - { .max = 186, .key = KEY_VOICECOMMAND }, - { .max = 295, .key = KEY_VOLUMEUP }, - { .max = 681, .key = KEY_VOLUMEDOWN }, -}; - -/* The number of levels in madera_micd_levels valid for button thresholds */ -#define MADERA_NUM_MICD_BUTTON_LEVELS 64 - -/* ohms for each micd level */ -static const int madera_micd_levels[] = { - 3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 34, 36, 39, 41, 44, 46, - 49, 52, 54, 57, 60, 62, 65, 67, 70, 73, 75, 78, 81, 83, 89, 94, 100, - 105, 111, 116, 122, 127, 139, 150, 161, 173, 186, 196, 209, 220, 245, - 270, 295, 321, 348, 375, 402, 430, 489, 550, 614, 681, 752, 903, 1071, - 1257, 30000, -}; - -/* - * HP calibration data - * See the datasheet for the meanings of the constants and their values - */ -struct madera_hpdet_calibration_data { - int min; /* ohms */ - int max; /* ohms */ - s64 C0; /* value * 1000000 */ - s64 C1; /* value * 10000 */ - s64 C2; /* not multiplied */ - s64 C3; /* value * 1000000 */ - s64 C4_x_C3; /* value * 1000000 */ - s64 C5; /* value * 1000000 */ - s64 dacval_adjust; -}; - -static const struct madera_hpdet_calibration_data cs47l85_hpdet_ranges[] = { - { 4, 30, 1007000, -7200, 4003, 69300000, 381150, 250000, 500000}, - { 8, 100, 1007000, -7200, 7975, 69600000, 382800, 250000, 500000}, - { 100, 1000, 9696000, -79500, 7300, 62900000, 345950, 250000, 500000}, - { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 250000, 500000}, -}; - -static const struct madera_hpdet_calibration_data madera_hpdet_ranges[] = { - { 4, 30, 1014000, -4300, 3950, 69300000, 381150, 700000, 500000}, - { 8, 100, 1014000, -8600, 7975, 69600000, 382800, 700000, 500000}, - { 100, 1000, 9744000, -79500, 7300, 62900000, 345950, 700000, 500000}, - { 1000, 10000, 101158000, -949400, 7300, 63200000, 347600, 700000, 500000}, -}; - -static const struct madera_hpdet_calibration_data cs47l92_hpdet_ranges[] = { - { 4, 30, 1007000, -7200, 4005, 69300000, 381150, 600000, 500000}, - { 8, 100, 1007000, -7200, 7975, 69600000, 382800, 600000, 500000}, - { 100, 1000, 9744000, -79500, 7300, 62900000, 345950, 600000, 500000}, - { 1000, 10000, 100684000, -949400, 7300, 63200000, 347600, 600000, 500000}, -}; - -struct madera_hp_tuning { - int max_hohm; - const struct reg_sequence *patch; - int patch_len; -}; - -static const struct reg_sequence cs47l35_low_impedance_patch[] = { - { 0x460, 0x0C40 }, - { 0x461, 0xCD1A }, - { 0x462, 0x0C40 }, - { 0x463, 0xB53B }, - { 0x464, 0x0C41 }, - { 0x465, 0x4826 }, - { 0x466, 0x0C41 }, - { 0x467, 0x2EDA }, - { 0x468, 0x0C41 }, - { 0x469, 0x203A }, - { 0x46A, 0x0841 }, - { 0x46B, 0x121F }, - { 0x46C, 0x0446 }, - { 0x46D, 0x0B6F }, - { 0x46E, 0x0446 }, - { 0x46F, 0x0818 }, - { 0x470, 0x04C6 }, - { 0x471, 0x05BB }, - { 0x472, 0x04C6 }, - { 0x473, 0x040F }, - { 0x474, 0x04CE }, - { 0x475, 0x0339 }, - { 0x476, 0x05DF }, - { 0x477, 0x028F }, - { 0x478, 0x05DF }, - { 0x479, 0x0209 }, - { 0x47A, 0x05DF }, - { 0x47B, 0x00CF }, - { 0x47C, 0x05DF }, - { 0x47D, 0x0001 }, - { 0x47E, 0x07FF }, -}; - -static const struct reg_sequence cs47l35_normal_impedance_patch[] = { - { 0x460, 0x0C40 }, - { 0x461, 0xCD1A }, - { 0x462, 0x0C40 }, - { 0x463, 0xB53B }, - { 0x464, 0x0C40 }, - { 0x465, 0x7503 }, - { 0x466, 0x0C40 }, - { 0x467, 0x4A41 }, - { 0x468, 0x0041 }, - { 0x469, 0x3491 }, - { 0x46A, 0x0841 }, - { 0x46B, 0x1F50 }, - { 0x46C, 0x0446 }, - { 0x46D, 0x14ED }, - { 0x46E, 0x0446 }, - { 0x46F, 0x1455 }, - { 0x470, 0x04C6 }, - { 0x471, 0x1220 }, - { 0x472, 0x04C6 }, - { 0x473, 0x040F }, - { 0x474, 0x04CE }, - { 0x475, 0x0339 }, - { 0x476, 0x05DF }, - { 0x477, 0x028F }, - { 0x478, 0x05DF }, - { 0x479, 0x0209 }, - { 0x47A, 0x05DF }, - { 0x47B, 0x00CF }, - { 0x47C, 0x05DF }, - { 0x47D, 0x0001 }, - { 0x47E, 0x07FF }, -}; - -static const struct madera_hp_tuning cs47l35_hp_tuning[] = { - { - 1300, - cs47l35_low_impedance_patch, - ARRAY_SIZE(cs47l35_low_impedance_patch), - }, - { - MADERA_HPDET_MAX_HOHM, - cs47l35_normal_impedance_patch, - ARRAY_SIZE(cs47l35_normal_impedance_patch), - }, -}; - -static const struct reg_sequence cs47l85_low_impedance_patch[] = { - { 0x465, 0x4C6D }, - { 0x467, 0x3950 }, - { 0x469, 0x2D86 }, - { 0x46B, 0x1E6D }, - { 0x46D, 0x199A }, - { 0x46F, 0x1456 }, - { 0x483, 0x0826 }, -}; - -static const struct reg_sequence cs47l85_normal_impedance_patch[] = { - { 0x465, 0x8A43 }, - { 0x467, 0x7259 }, - { 0x469, 0x65EA }, - { 0x46B, 0x50F4 }, - { 0x46D, 0x41CD }, - { 0x46F, 0x199A }, - { 0x483, 0x0023 }, -}; - -static const struct madera_hp_tuning cs47l85_hp_tuning[] = { - { - 1300, - cs47l85_low_impedance_patch, - ARRAY_SIZE(cs47l85_low_impedance_patch), - }, - { - MADERA_HPDET_MAX_HOHM, - cs47l85_normal_impedance_patch, - ARRAY_SIZE(cs47l85_normal_impedance_patch), - }, -}; - -static const struct reg_sequence cs47l90_low_impedance_patch[] = { - { 0x460, 0x0C21 }, - { 0x461, 0xB53C }, - { 0x462, 0x0C21 }, - { 0x463, 0xA186 }, - { 0x464, 0x0C21 }, - { 0x465, 0x8FF6 }, - { 0x466, 0x0C24 }, - { 0x467, 0x804E }, - { 0x468, 0x0C24 }, - { 0x469, 0x725A }, - { 0x46A, 0x0C24 }, - { 0x46B, 0x5AD5 }, - { 0x46C, 0x0C28 }, - { 0x46D, 0x50F4 }, - { 0x46E, 0x0C2C }, - { 0x46F, 0x4827 }, - { 0x470, 0x0C31 }, - { 0x471, 0x404E }, - { 0x472, 0x0020 }, - { 0x473, 0x3950 }, - { 0x474, 0x0028 }, - { 0x475, 0x3314 }, - { 0x476, 0x0030 }, - { 0x477, 0x2893 }, - { 0x478, 0x003F }, - { 0x479, 0x2429 }, - { 0x47A, 0x0830 }, - { 0x47B, 0x203A }, - { 0x47C, 0x0420 }, - { 0x47D, 0x1027 }, - { 0x47E, 0x0430 }, -}; - -static const struct reg_sequence cs47l90_normal_impedance_patch[] = { - { 0x460, 0x0C21 }, - { 0x461, 0xB53C }, - { 0x462, 0x0C25 }, - { 0x463, 0xA186 }, - { 0x464, 0x0C26 }, - { 0x465, 0x8FF6 }, - { 0x466, 0x0C28 }, - { 0x467, 0x804E }, - { 0x468, 0x0C30 }, - { 0x469, 0x725A }, - { 0x46A, 0x0C30 }, - { 0x46B, 0x65EA }, - { 0x46C, 0x0028 }, - { 0x46D, 0x5AD5 }, - { 0x46E, 0x0028 }, - { 0x46F, 0x50F4 }, - { 0x470, 0x0030 }, - { 0x471, 0x4827 }, - { 0x472, 0x0030 }, - { 0x473, 0x404E }, - { 0x474, 0x003F }, - { 0x475, 0x3950 }, - { 0x476, 0x0830 }, - { 0x477, 0x3314 }, - { 0x478, 0x0420 }, - { 0x479, 0x2D86 }, - { 0x47A, 0x0428 }, - { 0x47B, 0x2893 }, - { 0x47C, 0x0428 }, - { 0x47D, 0x203A }, - { 0x47E, 0x0428 }, -}; - -static const struct reg_sequence cs47l90_high_impedance_patch[] = { - { 0x460, 0x0C21 }, - { 0x461, 0xB53C }, - { 0x462, 0x0C26 }, - { 0x463, 0xA186 }, - { 0x464, 0x0C28 }, - { 0x465, 0x8FF6 }, - { 0x466, 0x0C2A }, - { 0x467, 0x804E }, - { 0x468, 0x0025 }, - { 0x469, 0x725A }, - { 0x46A, 0x0030 }, - { 0x46B, 0x65EA }, - { 0x46C, 0x0030 }, - { 0x46D, 0x5AD5 }, - { 0x46E, 0x003F }, - { 0x46F, 0x50F4 }, - { 0x470, 0x003F }, - { 0x471, 0x4827 }, - { 0x472, 0x0830 }, - { 0x473, 0x404E }, - { 0x474, 0x083F }, - { 0x475, 0x3950 }, - { 0x476, 0x0420 }, - { 0x477, 0x3314 }, - { 0x478, 0x0430 }, - { 0x479, 0x2D86 }, - { 0x47A, 0x0430 }, - { 0x47B, 0x2893 }, - { 0x47C, 0x0430 }, - { 0x47D, 0x203A }, - { 0x47E, 0x0430 }, -}; - -static const struct madera_hp_tuning cs47l90_hp_tuning[] = { - { - 1400, - cs47l90_low_impedance_patch, - ARRAY_SIZE(cs47l90_low_impedance_patch), - }, - { 2400, - cs47l90_normal_impedance_patch, - ARRAY_SIZE(cs47l90_normal_impedance_patch), - }, - { MADERA_HPDET_MAX_HOHM, - cs47l90_high_impedance_patch, - ARRAY_SIZE(cs47l90_high_impedance_patch), - }, -}; - -static const struct reg_sequence cs47l92_low_impedance_patch[] = { - { 0x460, 0x0C21 }, - { 0x461, 0xB53C }, - { 0x462, 0x0C21 }, - { 0x463, 0xA186 }, - { 0x464, 0x0C21 }, - { 0x465, 0x8FF6 }, - { 0x466, 0x0C21 }, - { 0x467, 0x804E }, - { 0x468, 0x0C21 }, - { 0x469, 0x725A }, - { 0x46A, 0x0C21 }, - { 0x46B, 0x5AD5 }, - { 0x46C, 0x0C21 }, - { 0x46D, 0x50F4 }, - { 0x46E, 0x0C21 }, - { 0x46F, 0x4827 }, - { 0x470, 0x0C21 }, - { 0x471, 0x404E }, - { 0x472, 0x0020 }, - { 0x473, 0x3950 }, - { 0x474, 0x0021 }, - { 0x475, 0x3314 }, - { 0x476, 0x0021 }, - { 0x477, 0x2893 }, - { 0x478, 0x0021 }, - { 0x479, 0x2429 }, - { 0x47A, 0x0821 }, - { 0x47B, 0x203A }, - { 0x47C, 0x0420 }, - { 0x47D, 0x1027 }, - { 0x47E, 0x0421 }, -}; - -static const struct reg_sequence cs47l92_normal_impedance_patch[] = { - { 0x460, 0x0C21 }, - { 0x461, 0xB53C }, - { 0x462, 0x0C21 }, - { 0x463, 0xA186 }, - { 0x464, 0x0C21 }, - { 0x465, 0x8FF6 }, - { 0x466, 0x0C21 }, - { 0x467, 0x804E }, - { 0x468, 0x0C21 }, - { 0x469, 0x725A }, - { 0x46A, 0x0C21 }, - { 0x46B, 0x65EA }, - { 0x46C, 0x0021 }, - { 0x46D, 0x5AD5 }, - { 0x46E, 0x0021 }, - { 0x46F, 0x50F4 }, - { 0x470, 0x0021 }, - { 0x471, 0x4827 }, - { 0x472, 0x0021 }, - { 0x473, 0x404E }, - { 0x474, 0x0021 }, - { 0x475, 0x3950 }, - { 0x476, 0x0821 }, - { 0x477, 0x3314 }, - { 0x478, 0x0420 }, - { 0x479, 0x2D86 }, - { 0x47A, 0x0421 }, - { 0x47B, 0x2893 }, - { 0x47C, 0x0421 }, - { 0x47D, 0x203A }, - { 0x47E, 0x0421 }, -}; - -static const struct reg_sequence cs47l92_high_impedance_patch[] = { - { 0x460, 0x0C21 }, - { 0x461, 0xB53C }, - { 0x462, 0x0C21 }, - { 0x463, 0xA186 }, - { 0x464, 0x0C21 }, - { 0x465, 0x8FF6 }, - { 0x466, 0x0021 }, - { 0x467, 0x804E }, - { 0x468, 0x0021 }, - { 0x469, 0x725A }, - { 0x46A, 0x0021 }, - { 0x46B, 0x65EA }, - { 0x46C, 0x0021 }, - { 0x46D, 0x5AD5 }, - { 0x46E, 0x0021 }, - { 0x46F, 0x50F4 }, - { 0x470, 0x0021 }, - { 0x471, 0x4827 }, - { 0x472, 0x0821 }, - { 0x473, 0x404E }, - { 0x474, 0x0821 }, - { 0x475, 0x3950 }, - { 0x476, 0x0420 }, - { 0x477, 0x3314 }, - { 0x478, 0x0421 }, - { 0x479, 0x2D86 }, - { 0x47A, 0x0421 }, - { 0x47B, 0x2893 }, - { 0x47C, 0x0421 }, - { 0x47D, 0x203A }, - { 0x47E, 0x0421 }, -}; - -static const struct madera_hp_tuning cs47l92_hp_tuning[] = { - { - 1400, - cs47l92_low_impedance_patch, - ARRAY_SIZE(cs47l92_low_impedance_patch), - }, - { 2400, - cs47l92_normal_impedance_patch, - ARRAY_SIZE(cs47l92_normal_impedance_patch), - }, - { MADERA_HPDET_MAX_HOHM, - cs47l92_high_impedance_patch, - ARRAY_SIZE(cs47l92_high_impedance_patch), - }, -}; - -static ssize_t madera_extcon_show(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct platform_device *pdev = to_platform_device(dev); - struct madera_extcon *info = platform_get_drvdata(pdev); - - return scnprintf(buf, PAGE_SIZE, "%d\n", - info->madera->hp_impedance_x100[0]); -} - -static DEVICE_ATTR(hp1_impedance, 0444, madera_extcon_show, NULL); - -inline void madera_extcon_report(struct madera_extcon *info, - int which, bool attached) -{ - int ret; - - dev_info(info->dev, "Extcon report: %d is %s\n", - which, attached ? "attached" : "removed"); - - ret = extcon_set_state_sync(info->edev, which, attached); - if (ret != 0) - dev_warn(info->dev, "Failed to report cable state: %d\n", ret); - - if (IS_ENABLED(CONFIG_EXTCON_MADERA_INPUT_EVENT)) { - switch (which) { - case EXTCON_MECHANICAL: - input_report_switch(info->input, - SW_JACK_PHYSICAL_INSERT, - attached); - break; - case EXTCON_JACK_HEADPHONE: - input_report_switch(info->input, - SW_HEADPHONE_INSERT, - attached); - break; - case EXTCON_JACK_LINE_OUT: - input_report_switch(info->input, - SW_LINEOUT_INSERT, - attached); - break; - case EXTCON_JACK_MICROPHONE: - input_report_switch(info->input, - SW_MICROPHONE_INSERT, - attached); - break; - } - - input_sync(info->input); - } -} -EXPORT_SYMBOL_GPL(madera_extcon_report); - -static -enum madera_accdet_mode madera_jds_get_mode(struct madera_extcon *info) -{ - if (info->state) - return info->state->mode; - else - return MADERA_ACCDET_MODE_INVALID; -} - -int madera_jds_set_state(struct madera_extcon *info, - const struct madera_jd_state *new_state) -{ - int ret = 0; - - if (new_state != info->state) { - if (info->state) - info->state->stop(info); - - info->state = new_state; - - if (info->state) { - ret = info->state->start(info); - if (ret < 0) - info->state = NULL; - } - } - - return ret; -} -EXPORT_SYMBOL_GPL(madera_jds_set_state); - -static void madera_jds_reading(struct madera_extcon *info, int val) -{ - int ret; - - ret = info->state->reading(info, val); - - if (ret == -EAGAIN && info->state->restart) - info->state->restart(info); -} - -static inline bool madera_jds_cancel_timeout(struct madera_extcon *info) -{ - return cancel_delayed_work_sync(&info->state_timeout_work); -} - -static void madera_jds_start_timeout(struct madera_extcon *info) -{ - const struct madera_jd_state *state = info->state; - - if (!state) - return; - - if (state->timeout_ms && state->timeout) { - int ms = state->timeout_ms(info); - - schedule_delayed_work(&info->state_timeout_work, - msecs_to_jiffies(ms)); - } -} - -static void madera_jds_timeout_work(struct work_struct *work) -{ - struct madera_extcon *info = - container_of(work, struct madera_extcon, - state_timeout_work.work); - - mutex_lock(&info->lock); - - if (!info->state) { - dev_warn(info->dev, "Spurious timeout in idle state\n"); - } else if (!info->state->timeout) { - dev_warn(info->dev, "Spurious timeout state.mode=%d\n", - info->state->mode); - } else { - info->state->timeout(info); - madera_jds_start_timeout(info); - } - - mutex_unlock(&info->lock); -} - -static void madera_extcon_hp_clamp(struct madera_extcon *info, bool clamp) -{ - struct madera *madera = info->madera; - unsigned int mask, val = 0; - unsigned int edre_reg = 0, edre_val = 0; - unsigned int ep_sel = 0; - int ret; - - snd_soc_dapm_mutex_lock(madera->dapm); - - switch (madera->type) { - case CS47L35: - /* - * check whether audio is routed to EPOUT, do not disable OUT1 - * in that case - */ - regmap_read(madera->regmap, MADERA_OUTPUT_ENABLES_1, &ep_sel); - ep_sel &= MADERA_EP_SEL_MASK; - break; - default: - break; - }; - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - edre_reg = MADERA_EDRE_MANUAL; - mask = MADERA_HP1L_SHRTO | MADERA_HP1L_FLWR | MADERA_HP1L_SHRTI; - if (clamp) { - val = MADERA_HP1L_SHRTO; - edre_val = MADERA_EDRE_OUT1L_MANUAL | - MADERA_EDRE_OUT1R_MANUAL; - } else { - val = MADERA_HP1L_FLWR | MADERA_HP1L_SHRTI; - edre_val = 0; - } - break; - default: - mask = MADERA_HPD_OVD_ENA_SEL_MASK; - if (clamp) - val = MADERA_HPD_OVD_ENA_SEL_MASK; - else - val = 0; - break; - } - - madera->out_clamp[0] = clamp; - - /* Keep the HP output stages disabled while doing the clamp */ - if (clamp && !ep_sel) { - ret = regmap_update_bits(madera->regmap, - MADERA_OUTPUT_ENABLES_1, - (MADERA_OUT1L_ENA | - MADERA_OUT1R_ENA) << - (2 * (info->pdata->output - 1)), - 0); - if (ret) - dev_warn(info->dev, - "Failed to disable headphone outputs: %d\n", - ret); - } - - if (edre_reg && !ep_sel) { - ret = regmap_update_bits(madera->regmap, edre_reg, - MADERA_EDRE_OUT1L_MANUAL_MASK | - MADERA_EDRE_OUT1R_MANUAL_MASK, - edre_val); - if (ret) - dev_warn(info->dev, - "Failed to set EDRE Manual: %d\n", ret); - } - - dev_dbg(info->dev, "%s clamp mask=0x%x val=0x%x\n", - clamp ? "Setting" : "Clearing", mask, val); - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - ret = regmap_update_bits(madera->regmap, - MADERA_HP_CTRL_1L, mask, val); - if (ret) - dev_warn(info->dev, "Failed to do clamp: %d\n", ret); - - ret = regmap_update_bits(madera->regmap, - MADERA_HP_CTRL_1R, mask, val); - if (ret) - dev_warn(info->dev, "Failed to do clamp: %d\n", ret); - break; - default: - ret = regmap_update_bits(madera->regmap, - MADERA_HEADPHONE_DETECT_0, - MADERA_HPD_OVD_ENA_SEL_MASK, - val); - if (ret) - dev_warn(info->dev, "Failed to do clamp: %d\n", ret); - break; - } - - /* Restore the desired state while not doing the clamp */ - if (!clamp && (madera_hohm_to_ohm(madera->hp_impedance_x100[0]) > - info->pdata->hpdet_short_circuit_imp) && !ep_sel) { - ret = regmap_update_bits(madera->regmap, - MADERA_OUTPUT_ENABLES_1, - (MADERA_OUT1L_ENA | - MADERA_OUT1R_ENA) << - (2 * (info->pdata->output - 1)), - madera->hp_ena); - if (ret) - dev_warn(info->dev, - "Failed to restore headphone outputs: %d\n", - ret); - } - - snd_soc_dapm_mutex_unlock(madera->dapm); -} - -static const char *madera_extcon_get_micbias_src(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - unsigned int bias = info->micd_modes[info->micd_mode].bias; - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - return NULL; - case CS47L90: - case CS47L91: - switch (bias) { - case 0: - case 1: - case 2: - case 3: - return "MICBIAS1"; - case 4: - case 5: - case 6: - case 7: - return "MICBIAS2"; - default: - return "MICVDD"; - } - break; - default: - return NULL; - } -} - -static const char *madera_extcon_get_micbias(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - unsigned int bias = info->micd_modes[info->micd_mode].bias; - - switch (madera->type) { - case CS47L35: - switch (bias) { - case 1: - return "MICBIAS1A"; - case 2: - return "MICBIAS1B"; - case 3: - return "MICBIAS2A"; - default: - return "MICVDD"; - } - case CS47L85: - case WM1840: - switch (bias) { - case 1: - return "MICBIAS1"; - case 2: - return "MICBIAS2"; - case 3: - return "MICBIAS3"; - case 4: - return "MICBIAS4"; - default: - return "MICVDD"; - } - case CS47L90: - case CS47L91: - switch (bias) { - case 0: - return "MICBIAS1A"; - case 1: - return "MICBIAS1B"; - case 2: - return "MICBIAS1C"; - case 3: - return "MICBIAS1D"; - case 4: - return "MICBIAS2A"; - case 5: - return "MICBIAS2B"; - case 6: - return "MICBIAS2C"; - case 7: - return "MICBIAS2D"; - default: - return "MICVDD"; - } - default: - return NULL; - } -} - -static void madera_extcon_enable_micbias_pin(struct madera_extcon *info, - const char *widget) -{ - struct madera *madera = info->madera; - struct snd_soc_dapm_context *dapm = madera->dapm; - int ret; - - ret = snd_soc_dapm_force_enable_pin(dapm, widget); - if (ret) - dev_warn(info->dev, "Failed to enable %s: %d\n", widget, ret); - - snd_soc_dapm_sync(dapm); - - dev_dbg(info->dev, "Enabled %s\n", widget); -} - -static void madera_extcon_disable_micbias_pin(struct madera_extcon *info, - const char *widget) -{ - struct madera *madera = info->madera; - struct snd_soc_dapm_context *dapm = madera->dapm; - int ret; - - ret = snd_soc_dapm_disable_pin(dapm, widget); - if (ret) - dev_warn(info->dev, "Failed to enable %s: %d\n", widget, ret); - - snd_soc_dapm_sync(dapm); - - dev_dbg(info->dev, "Disabled %s\n", widget); -} - -static void madera_extcon_set_micd_bias(struct madera_extcon *info, bool enable) -{ - int old_bias = info->micd_bias.bias; - int new_bias = info->micd_modes[info->micd_mode].bias; - const char *widget; - - info->micd_bias.bias = new_bias; - - if ((new_bias == old_bias) && (info->micd_bias.enabled == enable)) - return; - - widget = madera_extcon_get_micbias_src(info); - WARN_ON(!widget); - - if (info->micd_bias.enabled) - madera_extcon_disable_micbias_pin(info, widget); - - if (enable) - madera_extcon_enable_micbias_pin(info, widget); - - info->micd_bias.enabled = enable; -} - -static void madera_extcon_enable_micbias(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - const char *widget = madera_extcon_get_micbias(info); - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - break; - default: - madera_extcon_set_micd_bias(info, true); - break; - } - - /* - * If forced we must manually control the pin state, otherwise - * the codec will manage this automatically - */ - if (info->pdata->micd_force_micbias) - madera_extcon_enable_micbias_pin(info, widget); -} - -static void madera_extcon_disable_micbias(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - const char *widget = madera_extcon_get_micbias(info); - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - break; - default: - madera_extcon_set_micd_bias(info, false); - break; - } - - /* - * If forced we must manually control the pin state, otherwise - * the codec will manage this automatically - */ - if (info->pdata->micd_force_micbias) - madera_extcon_disable_micbias_pin(info, widget); -} - -static void madera_extcon_set_mode(struct madera_extcon *info, int mode) -{ - struct madera *madera = info->madera; - - dev_dbg(info->dev, - "set mic_mode[%d] src=0x%x gnd=0x%x bias=0x%x gpio=%d hp_gnd=%d\n", - mode, info->micd_modes[mode].src, info->micd_modes[mode].gnd, - info->micd_modes[mode].bias, info->micd_modes[mode].gpio, - info->micd_modes[mode].hp_gnd); - - if (info->micd_pol_gpio[0] > 0) - gpiod_set_value_cansleep(info->micd_pol_gpio[0], - info->micd_modes[mode].gpio); - if (info->micd_pol_gpio[1] > 0) - gpiod_set_value_cansleep(info->micd_pol_gpio[1], - !info->micd_modes[mode].gpio); - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_BIAS_SRC_MASK, - info->micd_modes[mode].bias << - MADERA_MICD_BIAS_SRC_SHIFT); - regmap_update_bits(madera->regmap, - MADERA_ACCESSORY_DETECT_MODE_1, - MADERA_ACCDET_SRC, - info->micd_modes[mode].src << - MADERA_ACCDET_SRC_SHIFT); - break; - default: - regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_BIAS_SRC_MASK, - info->micd_modes[mode].bias << - MADERA_MICD_BIAS_SRC_SHIFT); - regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_0, - MADERA_MICD1_SENSE_MASK, - info->micd_modes[mode].src << - MADERA_MICD1_SENSE_SHIFT); - regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_0, - MADERA_MICD1_GND_MASK, - info->micd_modes[mode].gnd << - MADERA_MICD1_GND_SHIFT); - regmap_update_bits(madera->regmap, - MADERA_HEADPHONE_DETECT_0, - MADERA_HPD_GND_SEL_MASK, - info->micd_modes[mode].gnd << - MADERA_HPD_GND_SEL_SHIFT); - regmap_update_bits(madera->regmap, - MADERA_OUTPUT_PATH_CONFIG_1 + - (8 * (info->pdata->output - 1)), - MADERA_HP1_GND_SEL_MASK, - info->micd_modes[mode].hp_gnd << - MADERA_HP1_GND_SEL_SHIFT); - break; - } - - info->micd_mode = mode; -} - -static void madera_extcon_next_mode(struct madera_extcon *info) -{ - int old_mode = info->micd_mode; - int new_mode; - bool change_bias = false; - - new_mode = (old_mode + 1) % info->num_micd_modes; - - dev_dbg(info->dev, "change micd mode %d->%d (bias %d->%d)\n", - old_mode, new_mode, - info->micd_modes[old_mode].bias, - info->micd_modes[new_mode].bias); - - if (info->micd_modes[old_mode].bias != - info->micd_modes[new_mode].bias) { - change_bias = true; - - madera_extcon_disable_micbias(info); - } - - madera_extcon_set_mode(info, new_mode); - - if (change_bias) - madera_extcon_enable_micbias(info); -} - -static int madera_micd_adc_read(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - unsigned int val = 0; - int ret; - - /* Must disable MICD before we read the ADCVAL */ - ret = regmap_update_bits(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_ENA, 0); - if (ret) { - dev_err(info->dev, "Failed to disable MICD: %d\n", ret); - return ret; - } - - ret = regmap_read(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_4, &val); - if (ret) { - dev_err(info->dev, "Failed to read MICDET_ADCVAL: %d\n", ret); - return ret; - } - - dev_dbg(info->dev, "MICDET_ADCVAL: 0x%x\n", val); - - val &= MADERA_MICDET_ADCVAL_MASK; - if (val < ARRAY_SIZE(madera_micd_levels)) - val = madera_micd_levels[val]; - else - val = INT_MAX; - - return val; -} - -static int madera_micd_read(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - unsigned int val = 0; - int ret, i; - - for (i = 0; i < 10 && !(val & MADERA_MICD_LVL_0_TO_8); i++) { - ret = regmap_read(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_3, &val); - if (ret) { - dev_err(info->dev, - "Failed to read MICDET: %d\n", ret); - return ret; - } - - dev_info(info->dev, "MICDET: 0x%x\n", val); - - if (!(val & MADERA_MICD_VALID)) { - dev_warn(info->dev, - "Microphone detection state invalid\n"); - return -EINVAL; - } - } - - if (i == 10 && !(val & MADERA_MICD_LVL_0_TO_8)) { - dev_warn(info->dev, "Failed to get valid MICDET value\n"); - return -EINVAL; - } - - if (!(val & MADERA_MICD_STS)) { - val = INT_MAX; - } else if (!(val & MADERA_MICD_LVL_0_TO_7)) { - val = madera_micd_levels[ARRAY_SIZE(madera_micd_levels) - 1]; - } else { - int lvl; - - lvl = (val & MADERA_MICD_LVL_MASK) >> MADERA_MICD_LVL_SHIFT; - lvl = ffs(lvl) - 1; - - if (lvl < info->num_micd_ranges) { - val = info->micd_ranges[lvl].max; - } else { - i = ARRAY_SIZE(madera_micd_levels) - 2; - val = madera_micd_levels[i]; - } - } - - return val; -} - -static void madera_extcon_notify_micd(const struct madera_extcon *info, - bool present, - unsigned int impedance) -{ - struct madera_micdet_notify_data data; - - data.present = present; - data.impedance_x100 = madera_ohm_to_hohm(impedance); - data.out_num = info->pdata->output; - - madera_call_notifiers(info->madera, MADERA_NOTIFY_MICDET, &data); -} - -static int madera_hpdet_calc_calibration(const struct madera_extcon *info, - int dacval, - const struct madera_hpdet_trims *trims, - const struct madera_hpdet_calibration_data *calib) -{ - int grad_x4 = trims->grad_x4; - int off_x4 = trims->off_x4; - s64 val = dacval; - s64 n; - - val = (val * 1000000) + calib->dacval_adjust; - val = div64_s64(val, calib->C2); - - n = div_s64(1000000000000LL, calib->C3 + - ((calib->C4_x_C3 * grad_x4) / 4)); - n = val - n; - if (n <= 0) - return MADERA_HPDET_MAX_HOHM; - - val = calib->C0 + ((calib->C1 * off_x4) / 4); - val *= 1000000; - - val = div_s64(val, n); - val -= calib->C5; - - /* Round up and divide to get hundredths of an ohm */ - val += 500000; - val = div_s64(val, 10000); - - if (val < 0) - return 0; - else if (val > MADERA_HPDET_MAX_HOHM) - return MADERA_HPDET_MAX_HOHM; - - return (int)val; -} - -static int madera_hpdet_calibrate(struct madera_extcon *info, - unsigned int range, unsigned int *ohms_x100) -{ - struct madera *madera = info->madera; - unsigned int dacval, dacval_down; - int ret; - - ret = regmap_read(madera->regmap, MADERA_HEADPHONE_DETECT_3, &dacval); - if (ret) { - dev_err(info->dev, "Failed to read HP DACVAL: %d\n", ret); - return -EAGAIN; - } - - dacval = (dacval >> MADERA_HP_DACVAL_SHIFT) & MADERA_HP_DACVAL_MASK; - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - ret = regmap_read(madera->regmap, MADERA_HEADPHONE_DETECT_5, - &dacval_down); - if (ret) { - dev_err(info->dev, - "Failed to read HP DACVAL_down: %d\n", ret); - return -EAGAIN; - } - - dacval_down = (dacval_down >> MADERA_HP_DACVAL_DOWN_SHIFT) & - MADERA_HP_DACVAL_DOWN_MASK; - - dacval = (dacval + dacval_down) / 2; - break; - default: - break; - } - - dev_dbg(info->dev, - "hpdet_d calib range %d dac %d\n", range, dacval); - - *ohms_x100 = madera_hpdet_calc_calibration(info, dacval, - &info->hpdet_trims[range], - &info->hpdet_ranges[range]); - return 0; -} - -static int madera_hpdet_read(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - unsigned int val, range, sense_pin, ohms_x100; - int ret; - bool is_jdx_micdetx_pin = false; - int hpdet_ext_res_x100; - - dev_dbg(info->dev, "HPDET read\n"); - - ret = regmap_read(madera->regmap, MADERA_HEADPHONE_DETECT_2, &val); - if (ret) { - dev_err(info->dev, "Failed to read HPDET status: %d\n", ret); - return ret; - } - - if (!(val & MADERA_HP_DONE_MASK)) { - dev_warn(info->dev, "HPDET did not complete: %x\n", val); - return -EAGAIN; - } - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - break; - default: - regmap_read(madera->regmap, MADERA_HEADPHONE_DETECT_0, - &sense_pin); - sense_pin = (sense_pin & MADERA_HPD_SENSE_SEL_MASK) >> - MADERA_HPD_SENSE_SEL_SHIFT; - - switch (sense_pin) { - case MADERA_HPD_SENSE_HPDET1: - case MADERA_HPD_SENSE_HPDET2: - is_jdx_micdetx_pin = false; - break; - default: - dev_dbg(info->dev, "is_jdx_micdetx_pin\n"); - is_jdx_micdetx_pin = true; - } - break; - } - - val &= MADERA_HP_LVL_MASK; - /* The value is in 0.5 ohm increments, get it in hundredths */ - ohms_x100 = val * 50; - - if (is_jdx_micdetx_pin) - goto done; - - regmap_read(madera->regmap, MADERA_HEADPHONE_DETECT_1, &range); - range = (range & MADERA_HP_IMPEDANCE_RANGE_MASK) >> - MADERA_HP_IMPEDANCE_RANGE_SHIFT; - - /* Skip up a range, or report? */ - if (range < info->num_hpdet_ranges - 1 && - ((val / 2) >= info->hpdet_ranges[range].max)) { - range++; - dev_dbg(info->dev, "Moving to HPDET range %d-%d\n", - info->hpdet_ranges[range].min, - info->hpdet_ranges[range].max); - - regmap_update_bits(madera->regmap, - MADERA_HEADPHONE_DETECT_1, - MADERA_HP_IMPEDANCE_RANGE_MASK, - range << - MADERA_HP_IMPEDANCE_RANGE_SHIFT); - return -EAGAIN; - } - - if (info->hpdet_trims) { - /* Perform calibration */ - ret = madera_hpdet_calibrate(info, range, &ohms_x100); - if (ret) - return ret; - } else { - /* Use uncalibrated reading */ - if (range && ((val / 2) < info->hpdet_ranges[range].min)) { - dev_dbg(info->dev, - "Reporting range boundary %d\n", - info->hpdet_ranges[range].min); - ohms_x100 = - madera_ohm_to_hohm(info->hpdet_ranges[range].min); - } - } - - hpdet_ext_res_x100 = info->pdata->hpdet_ext_res_x100; - if (hpdet_ext_res_x100) { - if (hpdet_ext_res_x100 >= ohms_x100) { - dev_dbg(info->dev, - "External resistor (%d.%02d) >= measurement (%d.00)\n", - hpdet_ext_res_x100 / 100, - hpdet_ext_res_x100 % 100, - val); - val = 0; /* treat as a short */ - } else { - dev_dbg(info->dev, - "Compensating for external %d.%02d ohm resistor\n", - hpdet_ext_res_x100 / 100, - hpdet_ext_res_x100 % 100); - - ohms_x100 -= hpdet_ext_res_x100; - } - } - -done: - dev_info(info->dev, "HP impedance %d.%02d ohms\n", - ohms_x100 / 100, ohms_x100 % 100); - - return (int)ohms_x100; -} - -static int madera_tune_headphone(struct madera_extcon *info, int reading) -{ - struct madera *madera = info->madera; - const struct madera_hp_tuning *tuning; - unsigned int short_imp = info->pdata->hpdet_short_circuit_imp; - int n_tunings; - int i, ret; - - switch (madera->type) { - case CS47L35: - tuning = cs47l35_hp_tuning; - n_tunings = ARRAY_SIZE(cs47l35_hp_tuning); - break; - case CS47L85: - case WM1840: - tuning = cs47l85_hp_tuning; - n_tunings = ARRAY_SIZE(cs47l85_hp_tuning); - break; - case CS47L90: - case CS47L91: - tuning = cs47l90_hp_tuning; - n_tunings = ARRAY_SIZE(cs47l90_hp_tuning); - break; - default: - return 0; - } - - if (reading <= madera_ohm_to_hohm(short_imp)) { - /* Headphones are always off here so just mark them */ - dev_warn(info->dev, "Possible HP short, disabling\n"); - return 0; - } - - if (reading == MADERA_HP_Z_OPEN) { - if (info->hp_tuning_level == 1) - return 0; - - dev_dbg(info->dev, "No jack: Setting tuning level 1\n"); - - info->hp_tuning_level = 1; - - ret = regmap_multi_reg_write(madera->regmap, - tuning[1].patch, - tuning[1].patch_len); - return ret; - } - - /* - * Check for tuning, we don't need to compare against the last - * tuning entry because we always select that if reading is not - * in range of the lower tunings - */ - for (i = 0; i < n_tunings - 1; ++i) { - if (reading <= tuning[i].max_hohm) - break; - } - - if (info->hp_tuning_level != i) { - dev_dbg(info->dev, "New tuning level %d\n", i); - - info->hp_tuning_level = i; - - ret = regmap_multi_reg_write(madera->regmap, - tuning[i].patch, - tuning[i].patch_len); - if (ret) { - dev_err(info->dev, - "Failed to apply HP tuning %d\n", ret); - return ret; - } - } - - return 0; -} - -void madera_set_headphone_imp(struct madera_extcon *info, int ohms_x100) -{ - struct madera *madera = info->madera; - struct madera_hpdet_notify_data data; - - madera->hp_impedance_x100[0] = ohms_x100; - - data.impedance_x100 = ohms_x100; - madera_call_notifiers(madera, MADERA_NOTIFY_HPDET, &data); - - madera_tune_headphone(info, ohms_x100); -} -EXPORT_SYMBOL_GPL(madera_set_headphone_imp); - -static void madera_hpdet_start_micd(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - - regmap_update_bits(madera->regmap, MADERA_IRQ1_MASK_6, - MADERA_IM_MICDET1_EINT1_MASK, - MADERA_IM_MICDET1_EINT1); - regmap_update_bits(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_0, - MADERA_MICD1_ADC_MODE_MASK, - MADERA_MICD1_ADC_MODE_MASK); - regmap_update_bits(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_BIAS_STARTTIME_MASK | - MADERA_MICD_RATE_MASK | - MADERA_MICD_DBTIME_MASK | - MADERA_MICD_ENA, MADERA_MICD_ENA); -} - -static void madera_hpdet_stop_micd(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - unsigned int start_time = 1, dbtime = 1, rate = 1; - - if (info->pdata->micd_bias_start_time) - start_time = info->pdata->micd_bias_start_time; - - if (info->pdata->micd_rate) - rate = info->pdata->micd_rate; - - if (info->pdata->micd_dbtime) - dbtime = info->pdata->micd_dbtime; - - regmap_update_bits(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_BIAS_STARTTIME_MASK | - MADERA_MICD_RATE_MASK | - MADERA_MICD_DBTIME_MASK | - MADERA_MICD_ENA, - start_time << MADERA_MICD_BIAS_STARTTIME_SHIFT | - rate << MADERA_MICD_RATE_SHIFT | - dbtime << MADERA_MICD_DBTIME_SHIFT); - - usleep_range(100, 400); - - /* Clear any spurious IRQs that have happened */ - regmap_write(madera->regmap, MADERA_IRQ1_STATUS_6, - MADERA_MICDET1_EINT1); - regmap_update_bits(madera->regmap, MADERA_IRQ1_MASK_6, - MADERA_IM_MICDET1_EINT1_MASK, 0); -} - -int madera_hpdet_start(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - int ret; - unsigned int hpd_sense, hpd_clamp, val, hpd_gnd; - - dev_dbg(info->dev, "Starting HPDET\n"); - - /* If we specified to assume a fixed impedance skip HPDET */ - if (info->pdata->fixed_hpdet_imp_x100) { - madera_set_headphone_imp(info, - info->pdata->fixed_hpdet_imp_x100); - ret = -EEXIST; - goto skip; - } - - /* Make sure we keep the device enabled during the measurement */ - pm_runtime_get_sync(info->dev); - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - madera_extcon_hp_clamp(info, true); - ret = regmap_update_bits(madera->regmap, - MADERA_ACCESSORY_DETECT_MODE_1, - MADERA_ACCDET_MODE_MASK, - info->state->mode); - if (ret) { - dev_err(info->dev, - "Failed to set HPDET mode (%d): %d\n", - info->state->mode, - ret); - goto err; - } - break; - default: - if (info->state->mode == MADERA_ACCDET_MODE_HPL) { - hpd_clamp = info->pdata->hpd_pins[0]; - hpd_sense = info->pdata->hpd_pins[1]; - } else { - hpd_clamp = info->pdata->hpd_pins[2]; - hpd_sense = info->pdata->hpd_pins[3]; - } - - hpd_gnd = info->micd_modes[info->micd_mode].gnd; - - val = (hpd_sense << MADERA_HPD_SENSE_SEL_SHIFT) | - (hpd_clamp << MADERA_HPD_OUT_SEL_SHIFT) | - (hpd_sense << MADERA_HPD_FRC_SEL_SHIFT) | - (hpd_gnd << MADERA_HPD_GND_SEL_SHIFT); - - ret = regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_0, - MADERA_MICD1_GND_MASK, - hpd_gnd << MADERA_MICD1_GND_SHIFT); - if (ret) { - dev_err(madera->dev, "Failed to set MICD_GND: %d\n", - ret); - goto err; - } - - ret = regmap_update_bits(madera->regmap, - MADERA_HEADPHONE_DETECT_0, - MADERA_HPD_GND_SEL_MASK | - MADERA_HPD_SENSE_SEL_MASK | - MADERA_HPD_FRC_SEL_MASK | - MADERA_HPD_OUT_SEL_MASK, - val); - if (ret) { - dev_err(info->dev, - "Failed to set HPDET sense: %d\n", ret); - goto err; - } - madera_extcon_hp_clamp(info, true); - madera_hpdet_start_micd(info); - break; - } - - ret = regmap_update_bits(madera->regmap, MADERA_HEADPHONE_DETECT_1, - MADERA_HP_POLL, MADERA_HP_POLL); - if (ret) { - dev_err(info->dev, "Can't start HPDET measurement: %d\n", ret); - goto err; - } - - return 0; - -err: - madera_extcon_hp_clamp(info, false); - - pm_runtime_put_autosuspend(info->dev); - -skip: - return ret; -} -EXPORT_SYMBOL_GPL(madera_hpdet_start); - -void madera_hpdet_restart(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - - /* Reset back to starting range */ - regmap_update_bits(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_ENA_MASK, 0); - - regmap_update_bits(madera->regmap, MADERA_HEADPHONE_DETECT_1, - MADERA_HP_IMPEDANCE_RANGE_MASK | MADERA_HP_POLL, - info->hpdet_init_range << - MADERA_HP_IMPEDANCE_RANGE_SHIFT); - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - break; - default: - regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_ENA_MASK, MADERA_MICD_ENA); - break; - } - - regmap_update_bits(madera->regmap, MADERA_HEADPHONE_DETECT_1, - MADERA_HP_POLL, MADERA_HP_POLL); -} -EXPORT_SYMBOL_GPL(madera_hpdet_restart); - -static int madera_hpdet_wait(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - unsigned int val; - int i, ret; - - for (i = 0; i < MADERA_HPDONE_PROBE_COUNT; i++) { - ret = regmap_read(madera->regmap, MADERA_HEADPHONE_DETECT_2, - &val); - if (ret) { - dev_err(madera->dev, "Failed to read HPDET state: %d\n", - ret); - return ret; - } - - if (val & MADERA_HP_DONE_MASK) - return 0; - - msleep(MADERA_HPDONE_PROBE_INTERVAL_MS); - } - - dev_err(madera->dev, "HPDET did not appear to complete\n"); - - return -ETIMEDOUT; -} - -void madera_hpdet_stop(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - - dev_dbg(info->dev, "Stopping HPDET\n"); - - /* - * If the jack was removed we abort this state. - * Ensure that the detect hardware has returned to idle - */ - madera_hpdet_wait(info); - - /* Reset back to starting range */ - madera_hpdet_stop_micd(info); - - regmap_update_bits(madera->regmap, MADERA_HEADPHONE_DETECT_1, - MADERA_HP_IMPEDANCE_RANGE_MASK | MADERA_HP_POLL, - info->hpdet_init_range << - MADERA_HP_IMPEDANCE_RANGE_SHIFT); - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - /* Reset to default mode */ - regmap_update_bits(madera->regmap, - MADERA_ACCESSORY_DETECT_MODE_1, - MADERA_ACCDET_MODE_MASK, 0); - break; - default: - break; - } - - madera_extcon_hp_clamp(info, false); - - pm_runtime_mark_last_busy(info->dev); - pm_runtime_put_autosuspend(info->dev); -} -EXPORT_SYMBOL_GPL(madera_hpdet_stop); - -int madera_hpdet_reading(struct madera_extcon *info, int val) -{ - dev_dbg(info->dev, "Reading HPDET %d\n", val); - - if (val < 0) - return val; - - madera_set_headphone_imp(info, val); - - if (!info->have_mic && val > MADERA_HPDET_LINEOUT) - madera_extcon_report(info, EXTCON_JACK_LINE_OUT, true); - else - madera_extcon_report(info, EXTCON_JACK_HEADPHONE, true); - - if (info->have_mic) - madera_jds_set_state(info, &madera_micd_button); - else - madera_jds_set_state(info, NULL); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_hpdet_reading); - -int madera_micd_start(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - int ret; - unsigned int micd_mode; - - /* Microphone detection can't use idle mode */ - pm_runtime_get_sync(info->dev); - - dev_dbg(info->dev, "Disabling MICD_OVD\n"); - regmap_update_bits(madera->regmap, - MADERA_MICD_CLAMP_CONTROL, - MADERA_MICD_CLAMP_OVD_MASK, 0); - - ret = regulator_enable(info->micvdd); - if (ret) - dev_err(info->dev, "Failed to enable MICVDD: %d\n", ret); - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - regmap_update_bits(madera->regmap, - MADERA_ACCESSORY_DETECT_MODE_1, - MADERA_ACCDET_MODE_MASK, info->state->mode); - break; - default: - if (info->state->mode == MADERA_ACCDET_MODE_ADC) - micd_mode = MADERA_MICD1_ADC_MODE_MASK; - else - micd_mode = 0; - - regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_0, - MADERA_MICD1_ADC_MODE_MASK, micd_mode); - break; - } - - madera_extcon_enable_micbias(info); - - regmap_update_bits(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_ENA, MADERA_MICD_ENA); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_micd_start); - -void madera_micd_stop(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - - regmap_update_bits(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_ENA, 0); - - madera_extcon_disable_micbias(info); - - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - /* Reset to default mode */ - regmap_update_bits(madera->regmap, - MADERA_ACCESSORY_DETECT_MODE_1, - MADERA_ACCDET_MODE_MASK, 0); - break; - default: - break; - } - - regulator_disable(info->micvdd); - - dev_dbg(info->dev, "Enabling MICD_OVD\n"); - regmap_update_bits(madera->regmap, MADERA_MICD_CLAMP_CONTROL, - MADERA_MICD_CLAMP_OVD_MASK, MADERA_MICD_CLAMP_OVD); - - pm_runtime_mark_last_busy(info->dev); - pm_runtime_put_autosuspend(info->dev); -} -EXPORT_SYMBOL_GPL(madera_micd_stop); - -static void madera_micd_restart(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - - regmap_update_bits(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_ENA, 0); - regmap_update_bits(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_ENA, MADERA_MICD_ENA); -} - -static int madera_micd_button_debounce(struct madera_extcon *info, int val) -{ - int debounce_lim = info->pdata->micd_manual_debounce; - - if (debounce_lim) { - if (info->micd_debounce != val) - info->micd_count = 0; - - info->micd_debounce = val; - info->micd_count++; - - if (info->micd_count == debounce_lim) { - info->micd_count = 0; - if (val == info->micd_res_old) - return 0; - - info->micd_res_old = val; - } else { - dev_dbg(info->dev, "Software debounce: %d,%x\n", - info->micd_count, val); - madera_micd_restart(info); - return -EAGAIN; - } - } - - return 0; -} - -static int madera_micd_button_process(struct madera_extcon *info, int val) -{ - int i, key; - - if (val < MADERA_MICROPHONE_MIN_OHM) { - dev_info(info->dev, "Mic button detected\n"); - - for (i = 0; i < info->num_micd_ranges; i++) - input_report_key(info->input, - info->micd_ranges[i].key, 0); - - for (i = 0; i < info->num_micd_ranges; i++) { - if (val <= info->micd_ranges[i].max) { - key = info->micd_ranges[i].key; - dev_info(info->dev, "Key %d down\n", key); - input_report_key(info->input, key, 1); - input_sync(info->input); - break; - } - } - - if (i == info->num_micd_ranges) - dev_warn(info->dev, - "Button level %u out of range\n", val); - } else { - dev_info(info->dev, "Mic button released\n"); - - for (i = 0; i < info->num_micd_ranges; i++) - input_report_key(info->input, - info->micd_ranges[i].key, 0); - input_sync(info->input); - } - - return 0; -} - -int madera_micd_button_reading(struct madera_extcon *info, int val) -{ - int ret; - unsigned int ohms; - - if (val < 0) - return val; - - ohms = madera_hohm_to_ohm((unsigned int)val); - - ret = madera_micd_button_debounce(info, ohms); - if (ret < 0) - return ret; - - return madera_micd_button_process(info, ohms); -} -EXPORT_SYMBOL_GPL(madera_micd_button_reading); - -int madera_micd_mic_start(struct madera_extcon *info) -{ - int ret; - - info->detecting = true; - - ret = regulator_allow_bypass(info->micvdd, false); - if (ret) - dev_err(info->dev, "Failed to regulate MICVDD: %d\n", ret); - - return madera_micd_start(info); -} -EXPORT_SYMBOL_GPL(madera_micd_mic_start); - -void madera_micd_mic_stop(struct madera_extcon *info) -{ - int ret; - - madera_micd_stop(info); - - ret = regulator_allow_bypass(info->micvdd, true); - if (ret) - dev_err(info->dev, "Failed to bypass MICVDD: %d\n", ret); - - info->detecting = false; -} -EXPORT_SYMBOL_GPL(madera_micd_mic_stop); - -int madera_micd_mic_reading(struct madera_extcon *info, int val) -{ - unsigned int ohms; - - if (val < 0) - return val; - - ohms = madera_hohm_to_ohm((unsigned int)val); - - /* Due to jack detect this should never happen */ - if (ohms > MADERA_MICROPHONE_MAX_OHM) { - dev_warn(info->dev, "Detected open circuit\n"); - info->have_mic = info->pdata->micd_open_circuit_declare; - goto done; - } - - /* If we got a high impedence we should have a headset, report it. */ - if (ohms >= MADERA_MICROPHONE_MIN_OHM) { - dev_dbg(info->dev, "Detected headset\n"); - info->have_mic = true; - goto done; - } - - /* - * If we detected a lower impedence during initial startup - * then we probably have the wrong polarity, flip it. Don't - * do this for the lowest impedences to speed up detection of - * plain headphones. If both polarities report a low - * impedence then give up and report headphones. - */ - if (((info->micd_ranges[0].max > MADERA_MICD_WRONG_POLARITY) || - (ohms > info->micd_ranges[0].max)) && - info->num_micd_modes > 1) { - if (info->jack_flips >= info->num_micd_modes * 10) { - dev_dbg(info->dev, "Detected HP/line\n"); - goto done; - } else { - madera_extcon_next_mode(info); - - info->jack_flips++; - - return -EAGAIN; - } - } - - /* - * If we're still detecting and we detect a short then we've - * got a headphone. - */ - dev_dbg(info->dev, "Headphone detected\n"); - -done: - pm_runtime_mark_last_busy(info->dev); - - if (info->pdata->hpdet_channel) - madera_jds_set_state(info, &madera_hpdet_right); - else - madera_jds_set_state(info, &madera_hpdet_left); - - madera_extcon_report(info, EXTCON_JACK_MICROPHONE, info->have_mic); - - madera_extcon_notify_micd(info, info->have_mic, ohms); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_micd_mic_reading); - -int madera_micd_mic_timeout_ms(struct madera_extcon *info) -{ - if (info->pdata->micd_timeout_ms) - return info->pdata->micd_timeout_ms; - else - return MADERA_DEFAULT_MICD_TIMEOUT_MS; -} -EXPORT_SYMBOL_GPL(madera_micd_mic_timeout_ms); - -void madera_micd_mic_timeout(struct madera_extcon *info) -{ - int ret; - - dev_dbg(info->dev, "MICD timed out, reporting HP\n"); - - if (info->pdata->hpdet_channel) - ret = madera_jds_set_state(info, &madera_hpdet_right); - else - ret = madera_jds_set_state(info, &madera_hpdet_left); - - if (ret < 0) - madera_extcon_report(info, EXTCON_JACK_MICROPHONE, false); -} -EXPORT_SYMBOL_GPL(madera_micd_mic_timeout); - -static int madera_jack_present(struct madera_extcon *info, - unsigned int *jack_val) -{ - struct madera *madera = info->madera; - unsigned int present, val; - int ret; - - ret = regmap_read(madera->regmap, MADERA_IRQ1_RAW_STATUS_7, &val); - if (ret) { - dev_err(info->dev, "Failed to read jackdet status: %d\n", ret); - return ret; - } - - dev_info(info->dev, "IRQ1_RAW_STATUS_7=0x%x\n", val); - - if (info->pdata->jd_use_jd2) { - val &= MADERA_MICD_CLAMP_RISE_STS1; - present = 0; - } else if (info->pdata->jd_invert) { - val &= MADERA_JD1_FALL_STS1_MASK; - present = MADERA_JD1_FALL_STS1; - } else { - val &= MADERA_JD1_RISE_STS1_MASK; - present = MADERA_JD1_RISE_STS1; - } - - dev_dbg(info->dev, "jackdet val=0x%x present=0x%x\n", val, present); - - if (jack_val) - *jack_val = val; - - if (val == present) - return 1; - else - return 0; -} - -static irqreturn_t madera_hpdet_handler(int irq, void *data) -{ - struct madera_extcon *info = data; - int ret; - - dev_dbg(info->dev, "HPDET handler\n"); - - madera_jds_cancel_timeout(info); - - mutex_lock(&info->lock); - - switch (madera_jds_get_mode(info)) { - case MADERA_ACCDET_MODE_HPL: - case MADERA_ACCDET_MODE_HPR: - case MADERA_ACCDET_MODE_HPM: - /* Fall through to spurious if no jack present */ - if (madera_jack_present(info, NULL) > 0) - break; - default: - dev_warn(info->dev, "Spurious HPDET IRQ\n"); - madera_jds_start_timeout(info); - mutex_unlock(&info->lock); - return IRQ_NONE; - } - - ret = madera_hpdet_read(info); - if (ret == -EAGAIN) - goto out; - - madera_jds_reading(info, ret); - -out: - madera_jds_start_timeout(info); - - pm_runtime_mark_last_busy(info->dev); - - mutex_unlock(&info->lock); - - return IRQ_HANDLED; -} - -static void madera_micd_handler(struct work_struct *work) -{ - struct madera_extcon *info = container_of(work, - struct madera_extcon, - micd_detect_work.work); - enum madera_accdet_mode mode; - int ret; - - madera_jds_cancel_timeout(info); - - mutex_lock(&info->lock); - - /* - * Must check that we are in a micd state before accessing - * any codec registers - */ - mode = madera_jds_get_mode(info); - switch (mode) { - case MADERA_ACCDET_MODE_MIC: - case MADERA_ACCDET_MODE_ADC: - break; - default: - goto spurious; - } - - if (madera_jack_present(info, NULL) <= 0) - goto spurious; - - switch (mode) { - case MADERA_ACCDET_MODE_MIC: - ret = madera_micd_read(info); - break; - case MADERA_ACCDET_MODE_ADC: - ret = madera_micd_adc_read(info); - break; - default: /* we can't get here but compiler still warns */ - ret = 0; - break; - } - - if (ret == -EAGAIN) - goto out; - - dev_info(info->dev, "Mic impedance %d ohms\n", ret); - - madera_jds_reading(info, madera_ohm_to_hohm((unsigned int)ret)); - -out: - madera_jds_start_timeout(info); - - pm_runtime_mark_last_busy(info->dev); - - mutex_unlock(&info->lock); - - return; - -spurious: - dev_warn(info->dev, "Spurious MICDET IRQ\n"); - madera_jds_start_timeout(info); - mutex_unlock(&info->lock); -} - -static irqreturn_t madera_micdet(int irq, void *data) -{ - struct madera_extcon *info = data; - int debounce = info->pdata->micd_detect_debounce_ms; - - dev_dbg(info->dev, "micdet IRQ"); - - cancel_delayed_work_sync(&info->micd_detect_work); - - mutex_lock(&info->lock); - - if (!info->detecting) - debounce = 0; - - mutex_unlock(&info->lock); - - /* - * Defer to the workqueue to ensure serialization - * and prevent race conditions if an IRQ occurs while - * running the delayed work - */ - schedule_delayed_work(&info->micd_detect_work, - msecs_to_jiffies(debounce)); - - return IRQ_HANDLED; -} - -const struct madera_jd_state madera_hpdet_left = { - .mode = MADERA_ACCDET_MODE_HPL, - .start = madera_hpdet_start, - .reading = madera_hpdet_reading, - .stop = madera_hpdet_stop, -}; -EXPORT_SYMBOL_GPL(madera_hpdet_left); - -const struct madera_jd_state madera_hpdet_right = { - .mode = MADERA_ACCDET_MODE_HPR, - .start = madera_hpdet_start, - .reading = madera_hpdet_reading, - .stop = madera_hpdet_stop, -}; -EXPORT_SYMBOL_GPL(madera_hpdet_right); - -const struct madera_jd_state madera_micd_button = { - .mode = MADERA_ACCDET_MODE_MIC, - .start = madera_micd_start, - .reading = madera_micd_button_reading, - .stop = madera_micd_stop, -}; -EXPORT_SYMBOL_GPL(madera_micd_button); - -const struct madera_jd_state madera_micd_adc_mic = { - .mode = MADERA_ACCDET_MODE_ADC, - .start = madera_micd_mic_start, - .restart = madera_micd_restart, - .reading = madera_micd_mic_reading, - .stop = madera_micd_mic_stop, - - .timeout_ms = madera_micd_mic_timeout_ms, - .timeout = madera_micd_mic_timeout, -}; -EXPORT_SYMBOL_GPL(madera_micd_adc_mic); - -const struct madera_jd_state madera_micd_microphone = { - .mode = MADERA_ACCDET_MODE_MIC, - .start = madera_micd_mic_start, - .reading = madera_micd_mic_reading, - .stop = madera_micd_mic_stop, - - .timeout_ms = madera_micd_mic_timeout_ms, - .timeout = madera_micd_mic_timeout, -}; -EXPORT_SYMBOL_GPL(madera_micd_microphone); - -static irqreturn_t madera_jackdet(int irq, void *data) -{ - struct madera_extcon *info = data; - struct madera *madera = info->madera; - unsigned int val, mask; - bool cancelled_state; - int i, present; - - dev_info(info->dev, "jackdet IRQ"); - - cancelled_state = madera_jds_cancel_timeout(info); - - pm_runtime_get_sync(info->dev); - - mutex_lock(&info->lock); - - val = 0; - present = madera_jack_present(info, &val); - if (present < 0) { - mutex_unlock(&info->lock); - pm_runtime_put_autosuspend(info->dev); - return IRQ_NONE; - } - - if (val == info->last_jackdet) { - dev_dbg(info->dev, "Suppressing duplicate JACKDET\n"); - if (cancelled_state) - madera_jds_start_timeout(info); - - goto out; - } - info->last_jackdet = val; - - mask = MADERA_MICD_CLAMP_DB | MADERA_JD1_DB; - - if (info->pdata->jd_use_jd2) - mask |= MADERA_JD2_DB; - - if (present) { - dev_dbg(info->dev, "Detected jack\n"); - - madera_extcon_report(info, EXTCON_MECHANICAL, true); - - info->have_mic = false; - info->jack_flips = 0; - - if (info->pdata->init_mic_delay_ms) - msleep(info->pdata->init_mic_delay_ms); - - if (info->pdata->custom_jd) - madera_jds_set_state(info, info->pdata->custom_jd); - else if (info->pdata->micd_software_compare) - madera_jds_set_state(info, &madera_micd_adc_mic); - else - madera_jds_set_state(info, &madera_micd_microphone); - - madera_jds_start_timeout(info); - - regmap_update_bits(madera->regmap, MADERA_INTERRUPT_DEBOUNCE_7, - mask, 0); - } else { - dev_dbg(info->dev, "Detected jack removal\n"); - - info->have_mic = false; - info->micd_res_old = 0; - info->micd_debounce = 0; - info->micd_count = 0; - madera_jds_set_state(info, NULL); - - for (i = 0; i < info->num_micd_ranges; i++) - input_report_key(info->input, - info->micd_ranges[i].key, 0); - input_sync(info->input); - - for (i = 0; i < ARRAY_SIZE(madera_cable) - 1; i++) - madera_extcon_report(info, madera_cable[i], false); - - regmap_update_bits(madera->regmap, MADERA_INTERRUPT_DEBOUNCE_7, - mask, mask); - - madera_set_headphone_imp(info, MADERA_HP_Z_OPEN); - - madera_extcon_notify_micd(info, false, 0); - } - -out: - mutex_unlock(&info->lock); - - pm_runtime_mark_last_busy(info->dev); - pm_runtime_put_autosuspend(info->dev); - - return IRQ_HANDLED; -} - -/* Map a level onto a slot in the register bank */ -static void madera_micd_set_level(struct madera *madera, int index, - unsigned int level) -{ - int reg; - unsigned int mask; - - reg = MADERA_MIC_DETECT_1_LEVEL_4 - (index / 2); - - if (!(index % 2)) { - mask = 0x3f00; - level <<= 8; - } else { - mask = 0x3f; - } - - /* Program the level itself */ - regmap_update_bits(madera->regmap, reg, mask, level); -} - -static void madera_extcon_get_micd_configs(struct madera_extcon *info, - struct fwnode_handle *node, - struct madera_accdet_pdata *pdata) -{ - struct madera_micd_config *micd_configs; - u32 *values; - int nvalues, nconfigs, i, j; - int ret; - - nvalues = fwnode_property_read_u32_array(node, - "cirrus,micd-configs", - NULL, 0); - if (nvalues == -EINVAL) { - return; /* not found */ - } else if ((nvalues < 0) || (nvalues % 5)) { - dev_warn(info->dev, "cirrus,micd-configs is malformed\n"); - return; - } - - values = kmalloc_array(nvalues, sizeof(u32), GFP_KERNEL); - if (!values) - return; - - ret = fwnode_property_read_u32_array(node, - "cirrus,micd-configs", - values, nvalues); - if (ret < 0) - goto err; - - nconfigs = nvalues / 5; - micd_configs = devm_kcalloc(info->dev, - nconfigs, - sizeof(struct madera_micd_config), - GFP_KERNEL); - if (!micd_configs) - goto err; - - for (i = 0, j = 0; i < nconfigs; ++i) { - micd_configs[i].src = values[j++]; - micd_configs[i].gnd = values[j++]; - micd_configs[i].bias = values[j++]; - micd_configs[i].gpio = values[j++]; - micd_configs[i].hp_gnd = values[j++]; - } - - info->micd_modes = micd_configs; - info->num_micd_modes = nconfigs; - -err: - kfree(values); -} - -static void madera_extcon_get_hpd_pins(struct madera_extcon *info, - struct fwnode_handle *node, - struct madera_accdet_pdata *pdata) -{ - int i, ret; - - BUILD_BUG_ON(ARRAY_SIZE(pdata->hpd_pins) != - ARRAY_SIZE(madera_default_hpd_pins)); - - memcpy(pdata->hpd_pins, madera_default_hpd_pins, - sizeof(pdata->hpd_pins)); - - ret = fwnode_property_read_u32_array(node, - "cirrus,hpd-pins", - pdata->hpd_pins, - ARRAY_SIZE(pdata->hpd_pins)); - if (ret) { - if (ret != -EINVAL) - dev_warn(info->dev, - "Malformed cirrus,hpd-pins: %d\n", ret); - return; - } - - /* supply defaults where requested */ - for (i = 0; i < ARRAY_SIZE(pdata->hpd_pins); ++i) - if (pdata->hpd_pins[i] > 0xFFFF) - pdata->hpd_pins[i] = madera_default_hpd_pins[i]; -} - -static bool madera_extcon_usbc_audio_connected(struct madera_extcon *info) -{ - union power_supply_propval prop = {0,}; - int ret; - - if (!info->usb_psy) - return false; - - ret = power_supply_get_property(info->usb_psy, - POWER_SUPPLY_PROP_TYPEC_MODE, &prop); - if (ret < 0) - dev_err(info->dev, "Unable to get USB Type\n"); - return (prop.intval == POWER_SUPPLY_TYPEC_SINK_AUDIO_ADAPTER); -} - -static void madera_handle_usbc_audio(struct madera_extcon *info, bool connected) -{ - dev_err(info->dev, "Type-C Audio Adapter %sconnected\n", - connected ? "" : "dis"); - if (info->usbc_det_gpio[0] > 0 && info->usbc_det_gpio[1] > 0) { - gpiod_set_value(info->usbc_det_gpio[0], connected); - gpiod_set_value(info->usbc_det_gpio[1], connected); - } - - info->usbc_connected = connected; -} - -static int madera_psy_notifier(struct notifier_block *nb, unsigned long evt, void *ptr) -{ - struct madera_extcon *info = container_of(nb, struct madera_extcon, psy_nb); - struct power_supply *psy = ptr; - bool usbc_audio_connected = false; - - if (evt != PSY_EVENT_PROP_CHANGED || strcmp(psy->desc->name, "usb") || - (psy->desc->type != POWER_SUPPLY_TYPE_USB && - psy->desc->type != POWER_SUPPLY_TYPE_USB_PD)) - return 0; - - usbc_audio_connected = madera_extcon_usbc_audio_connected(info); - if (info->usbc_connected == usbc_audio_connected) - return NOTIFY_OK; - madera_handle_usbc_audio(info, usbc_audio_connected); - return NOTIFY_OK; -} - -static void madera_extcon_process_accdet_node(struct madera_extcon *info, - struct fwnode_handle *node) -{ - struct madera *madera = info->madera; - struct madera_accdet_pdata *pdata; - u32 out_num; - int i, ret; - - ret = fwnode_property_read_u32(node, "reg", &out_num); - if (ret < 0) { - dev_warn(info->dev, - "failed to read reg property (%d)\n", - ret); - return; - } - - if (out_num == 0) { - dev_warn(info->dev, "accdet node illegal reg %u\n", out_num); - return; - } - - dev_dbg(info->dev, "processing accdet reg=%u\n", out_num); - - for (i = 0; i < ARRAY_SIZE(madera->pdata.accdet); i++) - if (!madera->pdata.accdet[i].enabled) - break; - - if (i == ARRAY_SIZE(madera->pdata.accdet)) { - dev_warn(madera->dev, "Too many accdet nodes: %d\n", i + 1); - return; - } - - pdata = &madera->pdata.accdet[i]; - pdata->enabled = true; /* implied by presence of properties node */ - pdata->output = out_num; - - fwnode_property_read_u32(node, "cirrus,init-mic-delay-ms", - &pdata->init_mic_delay_ms); - - fwnode_property_read_u32(node, "cirrus,micd-detect-debounce-ms", - &pdata->micd_detect_debounce_ms); - - fwnode_property_read_u32(node, "cirrus,micd-manual-debounce", - &pdata->micd_manual_debounce); - - fwnode_property_read_u32(node, "cirrus,micd-bias-start-time", - &pdata->micd_bias_start_time); - - fwnode_property_read_u32(node, "cirrus,micd-rate", - &pdata->micd_rate); - - fwnode_property_read_u32(node, "cirrus,micd-dbtime", - &pdata->micd_dbtime); - - fwnode_property_read_u32(node, "cirrus,micd-timeout-ms", - &pdata->micd_timeout_ms); - - /* don't override any preset force_micbias enable */ - if (fwnode_property_present(node, "cirrus,micd-force-micbias")) - pdata->micd_force_micbias = true; - - pdata->micd_software_compare = - fwnode_property_present(node, - "cirrus,micd-software-compare"); - - pdata->micd_open_circuit_declare = - fwnode_property_present(node, - "cirrus,micd-open-circuit-declare"); - - pdata->jd_use_jd2 = fwnode_property_present(node, - "cirrus,jd-use-jd2"); - - pdata->jd_invert = fwnode_property_present(node, - "cirrus,jd-invert"); - - fwnode_property_read_u32(node, "cirrus,fixed-hpdet-imp", - &pdata->fixed_hpdet_imp_x100); - - fwnode_property_read_u32(node, "cirrus,hpdet-short-circuit-imp", - &pdata->hpdet_short_circuit_imp); - - fwnode_property_read_u32(node, "cirrus,hpdet-channel", - &pdata->hpdet_channel); - - fwnode_property_read_u32(node, "cirrus,jd-wake-time", - &pdata->jd_wake_time); - - fwnode_property_read_u32(node, "cirrus,micd-clamp-mode", - &pdata->micd_clamp_mode); - - fwnode_property_read_u32(node, "cirrus,hpdet-ext-res", - &pdata->hpdet_ext_res_x100); - - madera_extcon_get_hpd_pins(info, node, pdata); - madera_extcon_get_micd_configs(info, node, pdata); - - info->micd_pol_gpio[0] = devm_get_gpiod_from_child(madera->dev, - "cirrus,micd-pol", - node); - if (IS_ERR(info->micd_pol_gpio[0])) { - dev_warn(info->dev, - "Malformed cirrus,micd-pol-gpios ignored: %ld\n", - PTR_ERR(info->micd_pol_gpio[0])); - info->micd_pol_gpio[0] = 0; - } - info->micd_pol_gpio[1] = devm_get_gpiod_from_child(madera->dev, - "cirrus,micd-pol-alt", - node); - if (IS_ERR(info->micd_pol_gpio[1])) - info->micd_pol_gpio[1] = 0; - - info->usbc_headset_support = fwnode_property_present(node, - "cirrus,usbc-headset"); - if (info->usbc_headset_support) { - info->usbc_connected = false; - info->usbc_det_gpio[0] = devm_get_gpiod_from_child(madera->dev, - "cirrus,usbsel", - node); - if (IS_ERR(info->usbc_det_gpio[0])) - info->usbc_det_gpio[0] = 0; - else { - ret = gpio_export(desc_to_gpio(info->usbc_det_gpio[0]), - true); - if (ret < 0) { - dev_err(info->dev, - "Failed to export usbsel gpio\n"); - } else { - ret = gpio_export_link(info->dev, - "usbsel", - desc_to_gpio(info->usbc_det_gpio[0])); - if (ret < 0) - dev_err(info->dev, - "Failed to create usbsel symlink\n"); - } - } - - info->usbc_det_gpio[1] = devm_get_gpiod_from_child(madera->dev, - "cirrus,hsdet", - node); - if (IS_ERR(info->usbc_det_gpio[1])) - info->usbc_det_gpio[1] = 0; - else { - ret = gpio_export(desc_to_gpio(info->usbc_det_gpio[1]), - true); - if (ret < 0) { - dev_err(info->dev, - "Failed to export hsdet gpio\n"); - } else { - ret = gpio_export_link(info->dev, - "hsdet", - desc_to_gpio(info->usbc_det_gpio[1])); - if (ret < 0) - dev_err(info->dev, - "Failed to create hsdet symlink\n"); - } - } - - } -} - -static int madera_extcon_get_device_pdata(struct madera_extcon *info) -{ - struct device_node *parent, *child; - struct madera *madera = info->madera; - - /* - * a GPSW is not necessarily exclusive to a single accessory detect - * channel so is not in the subnodes - */ - device_property_read_u32_array(info->madera->dev, "cirrus,gpsw", - info->madera->pdata.gpsw, - ARRAY_SIZE(info->madera->pdata.gpsw)); - - parent = of_get_child_by_name(madera->dev->of_node, "cirrus,accdet"); - if (!parent) { - dev_dbg(madera->dev, "No DT nodes\n"); - return 0; - } - - for_each_child_of_node(parent, child) - madera_extcon_process_accdet_node(info, &child->fwnode); - - of_node_put(parent); - - return 0; -} - -#ifdef DEBUG -#define MADERA_EXTCON_PDATA_DUMP(x, f) \ - dev_dbg(info->dev, "\t" #x ": " f "\n", pdata->x) - -static void madera_extcon_dump_config(struct madera_extcon *info) -{ - const struct madera_accdet_pdata *pdata; - int i, j; - - dev_dbg(info->dev, "extcon pdata gpsw=[0x%x 0x%x]\n", - info->madera->pdata.gpsw[0], info->madera->pdata.gpsw[1]); - - for (i = 0; i < ARRAY_SIZE(info->madera->pdata.accdet); ++i) { - pdata = &info->madera->pdata.accdet[i]; - - dev_dbg(info->dev, "extcon pdata OUT%u\n", pdata->output); - MADERA_EXTCON_PDATA_DUMP(enabled, "%u"); - MADERA_EXTCON_PDATA_DUMP(jd_wake_time, "%d"); - MADERA_EXTCON_PDATA_DUMP(jd_use_jd2, "%u"); - MADERA_EXTCON_PDATA_DUMP(jd_invert, "%u"); - MADERA_EXTCON_PDATA_DUMP(fixed_hpdet_imp_x100, "%d"); - MADERA_EXTCON_PDATA_DUMP(hpdet_ext_res_x100, "%d"); - MADERA_EXTCON_PDATA_DUMP(hpdet_short_circuit_imp, "%d"); - MADERA_EXTCON_PDATA_DUMP(hpdet_channel, "%d"); - MADERA_EXTCON_PDATA_DUMP(micd_detect_debounce_ms, "%d"); - MADERA_EXTCON_PDATA_DUMP(hpdet_short_circuit_imp, "%d"); - MADERA_EXTCON_PDATA_DUMP(hpdet_channel, "%d"); - MADERA_EXTCON_PDATA_DUMP(micd_detect_debounce_ms, "%d"); - MADERA_EXTCON_PDATA_DUMP(micd_manual_debounce, "%d"); - MADERA_EXTCON_PDATA_DUMP(micd_bias_start_time, "%d"); - MADERA_EXTCON_PDATA_DUMP(micd_rate, "%d"); - MADERA_EXTCON_PDATA_DUMP(micd_dbtime, "%d"); - MADERA_EXTCON_PDATA_DUMP(micd_timeout_ms, "%d"); - MADERA_EXTCON_PDATA_DUMP(micd_clamp_mode, "%u"); - MADERA_EXTCON_PDATA_DUMP(micd_force_micbias, "%u"); - MADERA_EXTCON_PDATA_DUMP(micd_open_circuit_declare, "%u"); - MADERA_EXTCON_PDATA_DUMP(micd_software_compare, "%u"); - - if (info->micd_pol_gpio[0] > 0) - dev_dbg(info->dev, "micd_pol_gpio: %d\n", - desc_to_gpio(info->micd_pol_gpio[0])); - else - dev_dbg(info->dev, "micd_pol_gpio: 0\n"); - - if (info->micd_pol_gpio[1] > 0) - dev_dbg(info->dev, "micd_pol_gpio-alt: %d\n", - desc_to_gpio(info->micd_pol_gpio[1])); - - dev_dbg(info->dev, "\tmicd_ranges {\n"); - for (j = 0; j < info->num_micd_ranges; ++j) - dev_dbg(info->dev, "\t\tmax: %d key: %d\n", - info->micd_ranges[j].max, - info->micd_ranges[j].key); - dev_dbg(info->dev, "\t}\n"); - - dev_dbg(info->dev, "\tmicd_configs {\n"); - for (j = 0; j < info->num_micd_modes; ++j) - dev_dbg(info->dev, - "\t\tsrc: 0x%x gnd: 0x%x bias: %u gpio: %u hp_gnd: %d\n", - info->micd_modes[j].src, - info->micd_modes[j].gnd, - info->micd_modes[j].bias, - info->micd_modes[j].gpio, - info->micd_modes[j].hp_gnd); - dev_dbg(info->dev, "\t}\n"); - - dev_dbg(info->dev, "\thpd_pins: %u %u %u %u\n", - pdata->hpd_pins[0], pdata->hpd_pins[1], - pdata->hpd_pins[2], pdata->hpd_pins[3]); - } -} -#else -static inline void madera_extcon_dump_config(struct madera_extcon *info) -{ -} -#endif - -/* See datasheet for a description of this calibration data */ -static int madera_extcon_read_calibration(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - struct madera_hpdet_trims *trims; - int ret = -EIO; - unsigned int offset, gradient, interim_val; - unsigned int otp_hpdet_calib_1, otp_hpdet_calib_2; - - switch (madera->type) { - case CS47L35: - otp_hpdet_calib_1 = CS47L35_OTP_HPDET_CAL_1; - otp_hpdet_calib_2 = CS47L35_OTP_HPDET_CAL_2; - break; - case CS47L85: - case WM1840: - otp_hpdet_calib_1 = CS47L85_OTP_HPDET_CAL_1; - otp_hpdet_calib_2 = CS47L85_OTP_HPDET_CAL_2; - break; - default: - otp_hpdet_calib_1 = MADERA_OTP_HPDET_CAL_1; - otp_hpdet_calib_2 = MADERA_OTP_HPDET_CAL_2; - break; - } - - ret = regmap_read(madera->regmap_32bit, otp_hpdet_calib_1, &offset); - if (ret) { - dev_err(info->dev, - "Failed to read HP CALIB OFFSET value: %d\n", ret); - return ret; - } - - ret = regmap_read(madera->regmap_32bit, otp_hpdet_calib_2, &gradient); - if (ret) { - dev_err(info->dev, - "Failed to read HP CALIB OFFSET value: %d\n", ret); - return ret; - } - - if (((offset == 0) && (gradient == 0)) || - ((offset == 0xFFFFFFFF) && (gradient == 0xFFFFFFFF))) { - dev_warn(info->dev, "No HP trims\n"); - return 0; - } - - trims = devm_kcalloc(info->dev, 4, - sizeof(struct madera_hpdet_trims), - GFP_KERNEL); - if (!trims) { - dev_err(info->dev, "Failed to alloc hpdet trims\n"); - return -ENOMEM; - } - - interim_val = (offset & MADERA_OTP_HPDET_CALIB_OFFSET_00_MASK) >> - MADERA_OTP_HPDET_CALIB_OFFSET_00_SHIFT; - trims[0].off_x4 = 128 - interim_val; - - interim_val = (gradient & MADERA_OTP_HPDET_GRADIENT_0X_MASK) >> - MADERA_OTP_HPDET_GRADIENT_0X_SHIFT; - trims[0].grad_x4 = 128 - interim_val; - - interim_val = (offset & MADERA_OTP_HPDET_CALIB_OFFSET_01_MASK) >> - MADERA_OTP_HPDET_CALIB_OFFSET_01_SHIFT; - trims[1].off_x4 = 128 - interim_val; - - trims[1].grad_x4 = trims[0].grad_x4; - - interim_val = (offset & MADERA_OTP_HPDET_CALIB_OFFSET_10_MASK) >> - MADERA_OTP_HPDET_CALIB_OFFSET_10_SHIFT; - trims[2].off_x4 = 128 - interim_val; - - interim_val = (gradient & MADERA_OTP_HPDET_GRADIENT_1X_MASK) >> - MADERA_OTP_HPDET_GRADIENT_1X_SHIFT; - trims[2].grad_x4 = 128 - interim_val; - - interim_val = (offset & MADERA_OTP_HPDET_CALIB_OFFSET_11_MASK) >> - MADERA_OTP_HPDET_CALIB_OFFSET_11_SHIFT; - trims[3].off_x4 = 128 - interim_val; - - trims[3].grad_x4 = trims[2].grad_x4; - - info->hpdet_trims = trims; - - dev_dbg(info->dev, - "trims_x_4: %u,%u %u,%u %u,%u %u,%u\n", - trims[0].off_x4, trims[0].grad_x4, - trims[1].off_x4, trims[1].grad_x4, - trims[2].off_x4, trims[2].grad_x4, - trims[3].off_x4, trims[3].grad_x4); - - return 0; -} - -static void madera_extcon_set_micd_clamp_mode(struct madera_extcon *info) -{ - unsigned int clamp_ctrl_val; - - /* - * If the user has supplied a micd_clamp_mode, assume they know - * what they are doing and just write it out - */ - if (info->pdata->micd_clamp_mode) { - clamp_ctrl_val = info->pdata->micd_clamp_mode; - } else if (info->pdata->jd_use_jd2) { - if (info->pdata->jd_invert) - clamp_ctrl_val = MADERA_MICD_CLAMP_MODE_JD1H_JD2H; - else - clamp_ctrl_val = MADERA_MICD_CLAMP_MODE_JD1L_JD2L; - } else { - if (info->pdata->jd_invert) - clamp_ctrl_val = MADERA_MICD_CLAMP_MODE_JD1H; - else - clamp_ctrl_val = MADERA_MICD_CLAMP_MODE_JD1L; - } - - regmap_update_bits(info->madera->regmap, - MADERA_MICD_CLAMP_CONTROL, - MADERA_MICD_CLAMP_MODE_MASK, - clamp_ctrl_val); - - regmap_update_bits(info->madera->regmap, - MADERA_INTERRUPT_DEBOUNCE_7, - MADERA_MICD_CLAMP_DB, - MADERA_MICD_CLAMP_DB); -} - -static int madera_extcon_add_micd_levels(struct madera_extcon *info) -{ - struct madera *madera = info->madera; - int i, j; - int ret = 0; - - BUILD_BUG_ON(ARRAY_SIZE(madera_micd_levels) < - MADERA_NUM_MICD_BUTTON_LEVELS); - - /* Disable all buttons by default */ - regmap_update_bits(madera->regmap, MADERA_MIC_DETECT_1_CONTROL_2, - MADERA_MICD_LVL_SEL_MASK, 0x81); - - /* Set up all the buttons the user specified */ - for (i = 0; i < info->num_micd_ranges; i++) { - for (j = 0; j < MADERA_NUM_MICD_BUTTON_LEVELS; j++) - if (madera_micd_levels[j] >= info->micd_ranges[i].max) - break; - - if (j == MADERA_NUM_MICD_BUTTON_LEVELS) { - dev_err(info->dev, "Unsupported MICD level %d\n", - info->micd_ranges[i].max); - ret = -EINVAL; - goto err_input; - } - - dev_dbg(info->dev, "%d ohms for MICD threshold %d\n", - madera_micd_levels[j], i); - - madera_micd_set_level(madera, i, j); - if (info->micd_ranges[i].key > 0) - input_set_capability(info->input, EV_KEY, - info->micd_ranges[i].key); - - /* Enable reporting of that range */ - regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_2, - 1 << i, 1 << i); - } - - /* Set all the remaining keys to a maximum */ - for (; i < MADERA_MAX_MICD_RANGE; i++) - madera_micd_set_level(madera, i, 0x3f); - -err_input: - return ret; -} - -static int madera_extcon_init_micd_ranges(struct madera_extcon *info) -{ - const struct madera_accdet_pdata *pdata = info->pdata; - struct madera_micd_range *ranges; - int i; - - if (pdata->num_micd_ranges == 0) { - info->micd_ranges = madera_micd_default_ranges; - info->num_micd_ranges = - ARRAY_SIZE(madera_micd_default_ranges); - return 0; - } - - if (pdata->num_micd_ranges > MADERA_MAX_MICD_RANGE) { - dev_err(info->dev, "Too many MICD ranges: %d\n", - pdata->num_micd_ranges); - return -EINVAL; - } - - ranges = devm_kmalloc_array(info->dev, - pdata->num_micd_ranges, - sizeof(struct madera_micd_range), - GFP_KERNEL); - if (!ranges) { - dev_err(info->dev, "Failed to kalloc micd ranges\n"); - return -ENOMEM; - } - - memcpy(ranges, pdata->micd_ranges, - sizeof(struct madera_micd_range) * pdata->num_micd_ranges); - info->micd_ranges = ranges; - info->num_micd_ranges = pdata->num_micd_ranges; - - for (i = 0; i < info->num_micd_ranges - 1; i++) { - if (info->micd_ranges[i].max > info->micd_ranges[i + 1].max) { - dev_err(info->dev, "MICD ranges must be sorted\n"); - goto err_free; - } - } - - return 0; - -err_free: - devm_kfree(info->dev, ranges); - - return -EINVAL; -} - -static void madera_extcon_xlate_pdata(struct madera_accdet_pdata *pdata) -{ - int i; - - BUILD_BUG_ON(ARRAY_SIZE(pdata->hpd_pins) != - ARRAY_SIZE(madera_default_hpd_pins)); - - /* translate from pdata format where 0=default and >0xFFFF means 0 */ - for (i = 0; i < ARRAY_SIZE(pdata->hpd_pins); ++i) { - if (pdata->hpd_pins[i] == 0) - pdata->hpd_pins[i] = madera_default_hpd_pins[i]; - else if (pdata->hpd_pins[i] > 0xFFFF) - pdata->hpd_pins[i] = 0; - } -} - -static int madera_extcon_probe(struct platform_device *pdev) -{ - struct madera *madera = dev_get_drvdata(pdev->dev.parent); - struct madera_accdet_pdata *pdata = &madera->pdata.accdet[0]; - struct madera_extcon *info; - unsigned int debounce_val, analog_val; - int jack_irq_fall, jack_irq_rise; - int ret, mode, i, hpdet_short; - - /* quick exit if Madera irqchip driver hasn't completed probe */ - if (!madera->irq_dev) { - dev_dbg(&pdev->dev, "irqchip driver not ready\n"); - return -EPROBE_DEFER; - } - - if (!madera->dapm || !madera->dapm->card) - return -EPROBE_DEFER; - - info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); - if (!info) - return -ENOMEM; - - info->pdata = pdata; - info->madera = madera; - info->dev = &pdev->dev; - mutex_init(&info->lock); - init_completion(&info->manual_mic_completion); - INIT_DELAYED_WORK(&info->micd_detect_work, madera_micd_handler); - INIT_DELAYED_WORK(&info->state_timeout_work, madera_jds_timeout_work); - platform_set_drvdata(pdev, info); - - switch (madera->type) { - case CS47L35: - pdata->micd_force_micbias = true; - info->hpdet_ranges = cs47l85_hpdet_ranges; - info->num_hpdet_ranges = ARRAY_SIZE(cs47l85_hpdet_ranges); - info->micd_modes = cs47l85_micd_default_modes; - info->num_micd_modes = ARRAY_SIZE(cs47l85_micd_default_modes); - break; - case CS47L85: - case WM1840: - info->hpdet_ranges = cs47l85_hpdet_ranges; - info->num_hpdet_ranges = ARRAY_SIZE(cs47l85_hpdet_ranges); - info->micd_modes = cs47l85_micd_default_modes; - info->num_micd_modes = ARRAY_SIZE(cs47l85_micd_default_modes); - break; - default: - info->hpdet_ranges = madera_hpdet_ranges; - info->num_hpdet_ranges = ARRAY_SIZE(madera_hpdet_ranges); - info->micd_modes = madera_micd_default_modes; - info->num_micd_modes = ARRAY_SIZE(madera_micd_default_modes); - break; - } - - if (dev_get_platdata(madera->dev)) { - madera_extcon_xlate_pdata(pdata); - - if (pdata->num_micd_configs) { - info->micd_modes = pdata->micd_configs; - info->num_micd_modes = pdata->num_micd_configs; - } - - if (info->micd_modes[0].gpio) - mode = GPIOF_OUT_INIT_HIGH; - else - mode = GPIOF_OUT_INIT_LOW; - - ret = devm_gpio_request_one(&pdev->dev, - pdata->micd_pol_gpio, - mode, - "MICD polarity"); - if (ret) { - dev_err(info->dev, "Failed to request GPIO%d: %d\n", - pdata->micd_pol_gpio, ret); - return ret; - } - - info->micd_pol_gpio[0] = gpio_to_desc(pdata->micd_pol_gpio); - info->micd_pol_gpio[1] = 0; - } else { - ret = madera_extcon_get_device_pdata(info); - if (ret < 0) - return ret; - } - - if (!pdata->enabled || pdata->output == 0) - return -ENODEV; /* no accdet output configured */ - - hpdet_short = pdata->hpdet_short_circuit_imp + - madera_hohm_to_ohm(pdata->hpdet_ext_res_x100); - - if (hpdet_short < MADERA_HP_SHORT_IMPEDANCE_MIN) { - dev_warn(info->dev, - "Increasing HP short circuit impedance from %d to %d\n", - pdata->hpdet_short_circuit_imp, - MADERA_HP_SHORT_IMPEDANCE_MIN); - pdata->hpdet_short_circuit_imp = MADERA_HP_SHORT_IMPEDANCE_MIN; - } - - info->micvdd = devm_regulator_get(&pdev->dev, "MICVDD"); - if (IS_ERR(info->micvdd)) { - ret = PTR_ERR(info->micvdd); - dev_err(info->dev, "Failed to get MICVDD: %d\n", ret); - return ret; - } - - if (pdata->jd_invert) - info->last_jackdet = - ~(MADERA_MICD_CLAMP_RISE_STS1 | MADERA_JD1_FALL_STS1); - else - info->last_jackdet = - ~(MADERA_MICD_CLAMP_RISE_STS1 | MADERA_JD1_RISE_STS1); - - info->edev = devm_extcon_dev_allocate(&pdev->dev, madera_cable); - if (IS_ERR(info->edev)) { - dev_err(&pdev->dev, "failed to allocate extcon device\n"); - return -ENOMEM; - } - - ret = devm_extcon_dev_register(&pdev->dev, info->edev); - if (ret < 0) { - dev_err(info->dev, "extcon_dev_register() failed: %d\n", ret); - return ret; - } - - info->input = devm_input_allocate_device(&pdev->dev); - if (!info->input) { - dev_err(info->dev, "Can't allocate input dev\n"); - ret = -ENOMEM; - goto err_register; - } - - info->input->name = "Headset"; - info->input->phys = "madera/extcon"; - info->input->dev.parent = &pdev->dev; - - if (madera->pdata.gpsw[0] > 0) - regmap_update_bits(madera->regmap, - MADERA_GP_SWITCH_1, - MADERA_SW1_MODE_MASK, - madera->pdata.gpsw[0] << - MADERA_SW1_MODE_SHIFT); - switch (madera->type) { - case CS47L90: - case CS47L91: - if (madera->pdata.gpsw[1] > 0) - regmap_update_bits(madera->regmap, - MADERA_GP_SWITCH_1, - MADERA_SW2_MODE_MASK, - madera->pdata.gpsw[1] << - MADERA_SW2_MODE_SHIFT); - break; - default: - break; - } - - if (info->pdata->micd_bias_start_time) - regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_BIAS_STARTTIME_MASK, - info->pdata->micd_bias_start_time - << MADERA_MICD_BIAS_STARTTIME_SHIFT); - - if (info->pdata->micd_rate) - regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_RATE_MASK, - info->pdata->micd_rate - << MADERA_MICD_RATE_SHIFT); - - if (info->pdata->micd_dbtime) - regmap_update_bits(madera->regmap, - MADERA_MIC_DETECT_1_CONTROL_1, - MADERA_MICD_DBTIME_MASK, - info->pdata->micd_dbtime - << MADERA_MICD_DBTIME_SHIFT); - - ret = madera_extcon_init_micd_ranges(info); - if (ret) - goto err_input; - - ret = madera_extcon_add_micd_levels(info); - if (ret) - goto err_input; - - madera_extcon_set_micd_clamp_mode(info); - - if ((info->num_micd_modes > 2) && !info->micd_pol_gpio) - dev_warn(info->dev, "Have >1 mic_configs but no pol_gpio\n"); - - madera_extcon_set_mode(info, 0); - - /* - * Invalidate the tuning level so that the first detection - * will always apply a tuning - */ - info->hp_tuning_level = MADERA_HP_TUNING_INVALID; - - pm_runtime_enable(&pdev->dev); - pm_runtime_idle(&pdev->dev); - - pm_runtime_get_sync(&pdev->dev); - - madera_extcon_read_calibration(info); - if (info->hpdet_trims) { - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - /* set for accurate HP impedance detection */ - regmap_update_bits(madera->regmap, - MADERA_ACCESSORY_DETECT_MODE_1, - MADERA_ACCDET_POLARITY_INV_ENA_MASK, - 1 << MADERA_ACCDET_POLARITY_INV_ENA_SHIFT); - break; - default: - break; - } - } - - /* Skip any HPDET ranges less than the external resistance */ - for (i = 0; i < info->num_hpdet_ranges; ++i) { - if (madera_ohm_to_hohm(info->hpdet_ranges[i].max) >= - pdata->hpdet_ext_res_x100) { - info->hpdet_init_range = i; - break; - } - } - if (i == info->num_hpdet_ranges) { - dev_err(&pdev->dev, - "No possible range for external resistance %u.%02u\n", - pdata->hpdet_ext_res_x100 / 100, - pdata->hpdet_ext_res_x100 % 100); - goto err_input; - } - - ret = madera_request_irq(madera, MADERA_IRQ_MICDET1, - "MICDET", madera_micdet, info); - if (ret) { - dev_err(&pdev->dev, "Failed to get MICDET IRQ: %d\n", ret); - goto err_input; - } - - ret = madera_request_irq(madera, MADERA_IRQ_HPDET, - "HPDET", madera_hpdet_handler, info); - if (ret) { - dev_err(&pdev->dev, "Failed to get HPDET IRQ: %d\n", ret); - goto err_micdet; - } - - if (info->pdata->jd_use_jd2) { - debounce_val = MADERA_JD1_DB | MADERA_JD2_DB; - analog_val = MADERA_JD1_ENA | MADERA_JD2_ENA; - jack_irq_rise = MADERA_IRQ_MICD_CLAMP_RISE; - jack_irq_fall = MADERA_IRQ_MICD_CLAMP_FALL; - } else { - debounce_val = MADERA_JD1_DB; - analog_val = MADERA_JD1_ENA; - jack_irq_rise = MADERA_IRQ_JD1_RISE; - jack_irq_fall = MADERA_IRQ_JD1_FALL; - } - - regmap_update_bits(madera->regmap, MADERA_INTERRUPT_DEBOUNCE_7, - debounce_val, debounce_val); - regmap_update_bits(madera->regmap, MADERA_JACK_DETECT_ANALOGUE, - analog_val, analog_val); - - ret = madera_request_irq(madera, jack_irq_rise, - "JACKDET rise", madera_jackdet, info); - if (ret) { - dev_err(&pdev->dev, - "Failed to get JACKDET rise IRQ: %d\n", ret); - goto err_hpdet; - } - - ret = madera_set_irq_wake(madera, jack_irq_rise, 1); - if (ret) { - dev_err(&pdev->dev, - "Failed to set JD rise IRQ wake: %d\n", ret); - goto err_rise; - } - - ret = madera_request_irq(madera, jack_irq_fall, - "JACKDET fall", madera_jackdet, info); - if (ret) { - dev_err(&pdev->dev, "Failed to get JD fall IRQ: %d\n", ret); - goto err_rise_wake; - } - - ret = madera_set_irq_wake(madera, jack_irq_fall, 1); - if (ret) { - dev_err(&pdev->dev, - "Failed to set JD fall IRQ wake: %d\n", ret); - goto err_fall; - } - - ret = regulator_allow_bypass(info->micvdd, true); - if (ret) - dev_warn(info->dev, - "Failed to set MICVDD to bypass: %d\n", ret); - - pm_runtime_put(&pdev->dev); - - if (IS_ENABLED(CONFIG_EXTCON_MADERA_INPUT_EVENT)) { - input_set_capability(info->input, - EV_SW, - SW_MICROPHONE_INSERT); - input_set_capability(info->input, - EV_SW, - SW_HEADPHONE_INSERT); - input_set_capability(info->input, - EV_SW, - SW_LINEOUT_INSERT); - input_set_capability(info->input, - EV_SW, - SW_JACK_PHYSICAL_INSERT); - } - - ret = input_register_device(info->input); - if (ret) { - dev_err(&pdev->dev, "Can't register input device: %d\n", ret); - goto err_fall_wake; - } - - ret = device_create_file(&pdev->dev, &dev_attr_hp1_impedance); - if (ret) - dev_warn(&pdev->dev, - "Failed to create sysfs node for hp_impedance %d\n", - ret); - - madera_extcon_dump_config(info); - - if (info->usbc_headset_support) { - info->psy_nb.notifier_call = madera_psy_notifier; - power_supply_reg_notifier(&info->psy_nb); - info->usb_psy = power_supply_get_by_name("usb"); - madera_handle_usbc_audio(info, madera_extcon_usbc_audio_connected(info)); - } - - return 0; - -err_fall_wake: - madera_set_irq_wake(madera, jack_irq_fall, 0); -err_fall: - madera_free_irq(madera, jack_irq_fall, info); -err_rise_wake: - madera_set_irq_wake(madera, jack_irq_rise, 0); -err_rise: - madera_free_irq(madera, jack_irq_rise, info); -err_hpdet: - madera_free_irq(madera, MADERA_IRQ_HPDET, info); -err_micdet: - madera_free_irq(madera, MADERA_IRQ_MICDET1, info); -err_input: -err_register: - pm_runtime_disable(&pdev->dev); - - return ret; -} - -static int madera_extcon_remove(struct platform_device *pdev) -{ - struct madera_extcon *info = platform_get_drvdata(pdev); - struct madera *madera = info->madera; - int jack_irq_rise, jack_irq_fall; - - pm_runtime_disable(&pdev->dev); - - regmap_update_bits(madera->regmap, MADERA_MICD_CLAMP_CONTROL, - MADERA_MICD_CLAMP_MODE_MASK, 0); - - if (info->usbc_headset_support) { - power_supply_unreg_notifier(&info->psy_nb); - if (info->usb_psy) - power_supply_put(info->usb_psy); - } - - if (info->pdata->jd_use_jd2) { - jack_irq_rise = MADERA_IRQ_MICD_CLAMP_RISE; - jack_irq_fall = MADERA_IRQ_MICD_CLAMP_FALL; - } else { - jack_irq_rise = MADERA_IRQ_JD1_RISE; - jack_irq_fall = MADERA_IRQ_JD1_FALL; - } - - madera_set_irq_wake(madera, jack_irq_rise, 0); - madera_set_irq_wake(madera, jack_irq_fall, 0); - madera_free_irq(madera, MADERA_IRQ_HPDET, info); - madera_free_irq(madera, MADERA_IRQ_MICDET1, info); - madera_free_irq(madera, jack_irq_rise, info); - madera_free_irq(madera, jack_irq_fall, info); - regmap_update_bits(madera->regmap, MADERA_JACK_DETECT_ANALOGUE, - MADERA_JD1_ENA | MADERA_JD2_ENA, 0); - - device_remove_file(&pdev->dev, &dev_attr_hp1_impedance); - kfree(info->hpdet_trims); - - return 0; -} - -static struct platform_driver madera_extcon_driver = { - .driver = { - .name = "madera-extcon", - }, - .probe = madera_extcon_probe, - .remove = madera_extcon_remove, -}; - -module_platform_driver(madera_extcon_driver); - -MODULE_DESCRIPTION("Madera extcon driver"); -MODULE_AUTHOR("Charles Keepax "); -MODULE_AUTHOR("Richard Fitzgerald "); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:extcon-madera"); diff --git a/drivers/gpio/Android.mk b/drivers/gpio/Android.mk deleted file mode 100644 index 6085820375f8..000000000000 --- a/drivers/gpio/Android.mk +++ /dev/null @@ -1,8 +0,0 @@ -DLKM_DIR := motorola/kernel/modules -LOCAL_PATH := $(call my-dir) - -include $(CLEAR_VARS) -LOCAL_MODULE := gpio-madera.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk diff --git a/drivers/gpio/Kbuild b/drivers/gpio/Kbuild deleted file mode 100644 index 004af589f5b8..000000000000 --- a/drivers/gpio/Kbuild +++ /dev/null @@ -1,5 +0,0 @@ -# add -Wall to try to catch everything we can. -EXTRA_CFLAGS += -Wall -EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include - -obj-m += gpio-madera.o diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile deleted file mode 100644 index 34b09dd815a7..000000000000 --- a/drivers/gpio/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build - -all: - $(MAKE) -C $(KERNEL_SRC) M=$(shell pwd) modules $(KBUILD_OPTIONS) - -modules_install: - $(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(shell pwd) modules_install - -clean: - $(MAKE) -C $(KERNEL_SRC) M=$(PWD) clean \ No newline at end of file diff --git a/drivers/gpio/gpio-madera.c b/drivers/gpio/gpio-madera.c deleted file mode 100644 index d700e939b967..000000000000 --- a/drivers/gpio/gpio-madera.c +++ /dev/null @@ -1,186 +0,0 @@ -/* - * GPIO support for Cirrus Logic Madera codecs - * - * Copyright 2015-2017 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -struct madera_gpio { - struct madera *madera; - struct gpio_chip gpio_chip; -}; - -static int madera_gpio_get_direction(struct gpio_chip *chip, - unsigned int offset) -{ - struct madera_gpio *madera_gpio = gpiochip_get_data(chip); - struct madera *madera = madera_gpio->madera; - unsigned int val; - int ret; - - ret = regmap_read(madera->regmap, - MADERA_GPIO1_CTRL_2 + (2 * offset), &val); - if (ret < 0) - return ret; - - return (val & MADERA_GP1_DIR_MASK) >> MADERA_GP1_DIR_SHIFT; -} - -static int madera_gpio_direction_in(struct gpio_chip *chip, unsigned int offset) -{ - struct madera_gpio *madera_gpio = gpiochip_get_data(chip); - struct madera *madera = madera_gpio->madera; - - return regmap_update_bits(madera->regmap, - MADERA_GPIO1_CTRL_2 + (2 * offset), - MADERA_GP1_DIR_MASK, MADERA_GP1_DIR); -} - -static int madera_gpio_get(struct gpio_chip *chip, unsigned int offset) -{ - struct madera_gpio *madera_gpio = gpiochip_get_data(chip); - struct madera *madera = madera_gpio->madera; - unsigned int val; - int ret; - - ret = regmap_read(madera->regmap, - MADERA_GPIO1_CTRL_1 + (2 * offset), &val); - if (ret < 0) - return ret; - - return !!(val & MADERA_GP1_LVL_MASK); -} - -static int madera_gpio_direction_out(struct gpio_chip *chip, - unsigned int offset, int value) -{ - struct madera_gpio *madera_gpio = gpiochip_get_data(chip); - struct madera *madera = madera_gpio->madera; - unsigned int regval; - int ret; - - if (value) - regval = MADERA_GP1_LVL; - else - regval = 0; - - ret = regmap_update_bits(madera->regmap, - MADERA_GPIO1_CTRL_2 + (2 * offset), - MADERA_GP1_DIR_MASK, 0); - if (ret < 0) - return ret; - - return regmap_update_bits(madera->regmap, - MADERA_GPIO1_CTRL_1 + (2 * offset), - MADERA_GP1_LVL_MASK, regval); -} - -static void madera_gpio_set(struct gpio_chip *chip, unsigned int offset, - int value) -{ - struct madera_gpio *madera_gpio = gpiochip_get_data(chip); - struct madera *madera = madera_gpio->madera; - unsigned int regval; - int ret; - - if (value) - regval = MADERA_GP1_LVL; - else - regval = 0; - - ret = regmap_update_bits(madera->regmap, - MADERA_GPIO1_CTRL_1 + (2 * offset), - MADERA_GP1_LVL_MASK, regval); - if (ret) - dev_warn(madera->dev, "Failed to write to 0x%x (%d)\n", - MADERA_GPIO1_CTRL_1 + (2 * offset), ret); -} - -static struct gpio_chip template_chip = { - .label = "madera", - .owner = THIS_MODULE, - .get_direction = madera_gpio_get_direction, - .direction_input = madera_gpio_direction_in, - .get = madera_gpio_get, - .direction_output = madera_gpio_direction_out, - .set = madera_gpio_set, - .can_sleep = true, -}; - -static int madera_gpio_probe(struct platform_device *pdev) -{ - struct madera *madera = dev_get_drvdata(pdev->dev.parent); - struct madera_pdata *pdata = dev_get_platdata(madera->dev); - struct madera_gpio *madera_gpio; - int ret; - - madera_gpio = devm_kzalloc(&pdev->dev, sizeof(*madera_gpio), - GFP_KERNEL); - if (!madera_gpio) - return -ENOMEM; - - madera_gpio->madera = madera; - madera_gpio->gpio_chip = template_chip; - madera_gpio->gpio_chip.parent = &pdev->dev; - - if (IS_ENABLED(CONFIG_OF_GPIO)) - madera_gpio->gpio_chip.of_node = madera->dev->of_node; - - switch (madera->type) { - case CS47L35: - madera_gpio->gpio_chip.ngpio = CS47L35_NUM_GPIOS; - break; - case CS47L85: - case WM1840: - madera_gpio->gpio_chip.ngpio = CS47L85_NUM_GPIOS; - break; - case CS47L90: - case CS47L91: - madera_gpio->gpio_chip.ngpio = CS47L90_NUM_GPIOS; - break; - default: - dev_err(&pdev->dev, "Unknown chip variant %d\n", madera->type); - return -EINVAL; - } - - if (pdata && pdata->gpio_base) - madera_gpio->gpio_chip.base = pdata->gpio_base; - else - madera_gpio->gpio_chip.base = -1; - - ret = devm_gpiochip_add_data(&pdev->dev, &madera_gpio->gpio_chip, - madera_gpio); - if (ret < 0) { - dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); - return ret; - } - - return 0; -} - -static struct platform_driver madera_gpio_driver = { - .driver.name = "madera-gpio", - .driver.owner = THIS_MODULE, - .probe = madera_gpio_probe, -}; - -module_platform_driver(madera_gpio_driver); - -MODULE_DESCRIPTION("GPIO interface for Madera codecs"); -MODULE_AUTHOR("Nariman Poushin "); -MODULE_AUTHOR("Richard Fitzgerald "); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:madera-gpio"); diff --git a/drivers/irqchip/Android.mk b/drivers/irqchip/Android.mk deleted file mode 100644 index 1dd8283cbdab..000000000000 --- a/drivers/irqchip/Android.mk +++ /dev/null @@ -1,9 +0,0 @@ -DLKM_DIR := motorola/kernel/modules -LOCAL_PATH := $(call my-dir) - -include $(CLEAR_VARS) -LOCAL_MODULE := cirrus_irq-madera.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - diff --git a/drivers/irqchip/Kbuild b/drivers/irqchip/Kbuild deleted file mode 100644 index 05d3c74b7166..000000000000 --- a/drivers/irqchip/Kbuild +++ /dev/null @@ -1,13 +0,0 @@ -# add -Wall to try to catch everything we can. -EXTRA_CFLAGS += -Wall -EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include - -ifeq ($(CONFIG_ARCH_SDM450), y) -EXTRA_CFLAGS += -DCONFIG_MADERA_IRQ_CS47L35 -cirrus_irq-madera-objs = irq-madera.o irq-madera-cs47l35.o -else -EXTRA_CFLAGS += -DCONFIG_MADERA_IRQ_CS47L90 -cirrus_irq-madera-objs = irq-madera.o irq-madera-cs47l90.o -endif - -obj-m += cirrus_irq-madera.o diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile deleted file mode 100644 index 34b09dd815a7..000000000000 --- a/drivers/irqchip/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build - -all: - $(MAKE) -C $(KERNEL_SRC) M=$(shell pwd) modules $(KBUILD_OPTIONS) - -modules_install: - $(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(shell pwd) modules_install - -clean: - $(MAKE) -C $(KERNEL_SRC) M=$(PWD) clean \ No newline at end of file diff --git a/drivers/irqchip/irq-madera-cs47l35.c b/drivers/irqchip/irq-madera-cs47l35.c deleted file mode 100644 index d65125dcc9ab..000000000000 --- a/drivers/irqchip/irq-madera-cs47l35.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Interrupt support for Cirrus Logic CS47L35 - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include "irq-madera.h" - -static const struct regmap_irq cs47l35_irqs[MADERA_NUM_IRQ] = { - [MADERA_IRQ_BOOT_DONE] = { .reg_offset = 0, - .mask = MADERA_BOOT_DONE_EINT1 }, - [MADERA_IRQ_CTRLIF_ERR] = { .reg_offset = 0, - .mask = MADERA_CTRLIF_ERR_EINT1 }, - - [MADERA_IRQ_FLL1_LOCK] = { .reg_offset = 1, - .mask = MADERA_FLL1_LOCK_EINT1 }, - [MADERA_IRQ_FLL2_LOCK] = { .reg_offset = 1, - .mask = MADERA_FLL2_LOCK_EINT1}, - [MADERA_IRQ_FLL3_LOCK] = { .reg_offset = 1, - .mask = MADERA_FLL3_LOCK_EINT1}, - - [MADERA_IRQ_MICDET1] = { .reg_offset = 5, - .mask = MADERA_MICDET1_EINT1 }, - [MADERA_IRQ_HPDET] = { .reg_offset = 5, - .mask = MADERA_HPDET_EINT1}, - - [MADERA_IRQ_MICD_CLAMP_RISE] = { .reg_offset = 6, - .mask = MADERA_MICD_CLAMP_RISE_EINT1 }, - [MADERA_IRQ_MICD_CLAMP_FALL] = { .reg_offset = 6, - .mask = MADERA_MICD_CLAMP_FALL_EINT1 }, - [MADERA_IRQ_JD1_FALL] = { .reg_offset = 6, - .mask = MADERA_JD1_FALL_EINT1 }, - [MADERA_IRQ_JD1_RISE] = { .reg_offset = 6, - .mask = MADERA_JD1_RISE_EINT1 }, - [MADERA_IRQ_JD2_FALL] = { .reg_offset = 6, - .mask = MADERA_JD2_FALL_EINT1 }, - [MADERA_IRQ_JD2_RISE] = { .reg_offset = 6, - .mask = MADERA_JD2_RISE_EINT1 }, - - [MADERA_IRQ_DRC2_SIG_DET] = { .reg_offset = 8, - .mask = MADERA_DRC2_SIG_DET_EINT1 }, - [MADERA_IRQ_DRC1_SIG_DET] = { .reg_offset = 8, - .mask = MADERA_DRC1_SIG_DET_EINT1 }, - - [MADERA_IRQ_DSP_IRQ1] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ1_EINT1}, - [MADERA_IRQ_DSP_IRQ2] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ2_EINT1}, - [MADERA_IRQ_DSP_IRQ3] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ3_EINT1}, - [MADERA_IRQ_DSP_IRQ4] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ4_EINT1}, - [MADERA_IRQ_DSP_IRQ5] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ5_EINT1}, - [MADERA_IRQ_DSP_IRQ6] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ6_EINT1}, - [MADERA_IRQ_DSP_IRQ7] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ7_EINT1}, - [MADERA_IRQ_DSP_IRQ8] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ8_EINT1}, - [MADERA_IRQ_DSP_IRQ9] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ9_EINT1}, - [MADERA_IRQ_DSP_IRQ10] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ10_EINT1}, - [MADERA_IRQ_DSP_IRQ11] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ11_EINT1}, - [MADERA_IRQ_DSP_IRQ12] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ12_EINT1}, - [MADERA_IRQ_DSP_IRQ13] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ13_EINT1}, - [MADERA_IRQ_DSP_IRQ14] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ14_EINT1}, - [MADERA_IRQ_DSP_IRQ15] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ15_EINT1}, - [MADERA_IRQ_DSP_IRQ16] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ16_EINT1}, - - [MADERA_IRQ_HP2R_SC] = { .reg_offset = 11, - .mask = MADERA_HP2R_SC_EINT1}, - [MADERA_IRQ_HP2L_SC] = { .reg_offset = 11, - .mask = MADERA_HP2L_SC_EINT1}, - [MADERA_IRQ_HP1R_SC] = { .reg_offset = 11, - .mask = MADERA_HP1R_SC_EINT1}, - [MADERA_IRQ_HP1L_SC] = { .reg_offset = 11, - .mask = MADERA_HP1L_SC_EINT1}, - - [MADERA_IRQ_SPK_OVERHEAT_WARN] = { .reg_offset = 14, - .mask = MADERA_SPK_OVERHEAT_WARN_EINT1}, - [MADERA_IRQ_SPK_OVERHEAT] = { .reg_offset = 14, - .mask = MADERA_SPK_SHUTDOWN_EINT1}, -}; - -const struct regmap_irq_chip cs47l35_irq = { - .name = "cs47l35 IRQ", - .status_base = MADERA_IRQ1_STATUS_1, - .mask_base = MADERA_IRQ1_MASK_1, - .ack_base = MADERA_IRQ1_STATUS_1, - .num_regs = 15, - .irqs = cs47l35_irqs, - .num_irqs = ARRAY_SIZE(cs47l35_irqs), -}; -EXPORT_SYMBOL_GPL(cs47l35_irq); diff --git a/drivers/irqchip/irq-madera-cs47l85.c b/drivers/irqchip/irq-madera-cs47l85.c deleted file mode 100644 index 27bc83a540d9..000000000000 --- a/drivers/irqchip/irq-madera-cs47l85.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Interrupt support for Cirrus Logic CS47L85 - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include "irq-madera.h" - -static const struct regmap_irq cs47l85_irqs[MADERA_NUM_IRQ] = { - [MADERA_IRQ_BOOT_DONE] = { .reg_offset = 0, - .mask = MADERA_BOOT_DONE_EINT1 }, - [MADERA_IRQ_CTRLIF_ERR] = { .reg_offset = 0, - .mask = MADERA_CTRLIF_ERR_EINT1 }, - - [MADERA_IRQ_FLL1_LOCK] = { .reg_offset = 1, - .mask = MADERA_FLL1_LOCK_EINT1 }, - [MADERA_IRQ_FLL2_LOCK] = { .reg_offset = 1, - .mask = MADERA_FLL2_LOCK_EINT1}, - [MADERA_IRQ_FLL3_LOCK] = { .reg_offset = 1, - .mask = MADERA_FLL3_LOCK_EINT1}, - - [MADERA_IRQ_MICDET1] = { .reg_offset = 5, - .mask = MADERA_MICDET1_EINT1 }, - [MADERA_IRQ_HPDET] = { .reg_offset = 5, - .mask = MADERA_HPDET_EINT1}, - - [MADERA_IRQ_MICD_CLAMP_RISE] = { .reg_offset = 6, - .mask = MADERA_MICD_CLAMP_RISE_EINT1 }, - [MADERA_IRQ_MICD_CLAMP_FALL] = { .reg_offset = 6, - .mask = MADERA_MICD_CLAMP_FALL_EINT1 }, - [MADERA_IRQ_JD1_FALL] = { .reg_offset = 6, - .mask = MADERA_JD1_FALL_EINT1 }, - [MADERA_IRQ_JD1_RISE] = { .reg_offset = 6, - .mask = MADERA_JD1_RISE_EINT1 }, - - [MADERA_IRQ_ASRC2_IN1_LOCK] = { .reg_offset = 8, - .mask = MADERA_ASRC2_IN1_LOCK_EINT1 }, - [MADERA_IRQ_ASRC2_IN2_LOCK] = { .reg_offset = 8, - .mask = MADERA_ASRC2_IN2_LOCK_EINT1 }, - [MADERA_IRQ_ASRC1_IN1_LOCK] = { .reg_offset = 8, - .mask = MADERA_ASRC1_IN1_LOCK_EINT1 }, - [MADERA_IRQ_ASRC1_IN2_LOCK] = { .reg_offset = 8, - .mask = MADERA_ASRC1_IN2_LOCK_EINT1 }, - - [MADERA_IRQ_DRC2_SIG_DET] = { .reg_offset = 8, - .mask = MADERA_DRC2_SIG_DET_EINT1 }, - [MADERA_IRQ_DRC1_SIG_DET] = { .reg_offset = 8, - .mask = MADERA_DRC1_SIG_DET_EINT1 }, - - [MADERA_IRQ_DSP_IRQ1] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ1_EINT1}, - [MADERA_IRQ_DSP_IRQ2] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ2_EINT1}, - [MADERA_IRQ_DSP_IRQ3] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ3_EINT1}, - [MADERA_IRQ_DSP_IRQ4] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ4_EINT1}, - [MADERA_IRQ_DSP_IRQ5] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ5_EINT1}, - [MADERA_IRQ_DSP_IRQ6] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ6_EINT1}, - [MADERA_IRQ_DSP_IRQ7] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ7_EINT1}, - [MADERA_IRQ_DSP_IRQ8] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ8_EINT1}, - [MADERA_IRQ_DSP_IRQ9] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ9_EINT1}, - [MADERA_IRQ_DSP_IRQ10] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ10_EINT1}, - [MADERA_IRQ_DSP_IRQ11] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ11_EINT1}, - [MADERA_IRQ_DSP_IRQ12] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ12_EINT1}, - [MADERA_IRQ_DSP_IRQ13] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ13_EINT1}, - [MADERA_IRQ_DSP_IRQ14] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ14_EINT1}, - [MADERA_IRQ_DSP_IRQ15] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ15_EINT1}, - [MADERA_IRQ_DSP_IRQ16] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ16_EINT1}, - - [MADERA_IRQ_HP3R_SC] = { .reg_offset = 11, - .mask = MADERA_HP3R_SC_EINT1}, - [MADERA_IRQ_HP3L_SC] = { .reg_offset = 11, - .mask = MADERA_HP3L_SC_EINT1}, - [MADERA_IRQ_HP2R_SC] = { .reg_offset = 11, - .mask = MADERA_HP2R_SC_EINT1}, - [MADERA_IRQ_HP2L_SC] = { .reg_offset = 11, - .mask = MADERA_HP2L_SC_EINT1}, - [MADERA_IRQ_HP1R_SC] = { .reg_offset = 11, - .mask = MADERA_HP1R_SC_EINT1}, - [MADERA_IRQ_HP1L_SC] = { .reg_offset = 11, - .mask = MADERA_HP1L_SC_EINT1}, - - [MADERA_IRQ_SPK_OVERHEAT_WARN] = { .reg_offset = 14, - .mask = MADERA_SPK_OVERHEAT_WARN_EINT1}, - [MADERA_IRQ_SPK_OVERHEAT] = { .reg_offset = 14, - .mask = MADERA_SPK_SHUTDOWN_EINT1}, -}; - -const struct regmap_irq_chip cs47l85_irq = { - .name = "cs47l85 IRQ", - .status_base = MADERA_IRQ1_STATUS_1, - .mask_base = MADERA_IRQ1_MASK_1, - .ack_base = MADERA_IRQ1_STATUS_1, - .num_regs = 15, - .irqs = cs47l85_irqs, - .num_irqs = ARRAY_SIZE(cs47l85_irqs), -}; -EXPORT_SYMBOL_GPL(cs47l85_irq); diff --git a/drivers/irqchip/irq-madera-cs47l90.c b/drivers/irqchip/irq-madera-cs47l90.c deleted file mode 100644 index 70e9ccc06313..000000000000 --- a/drivers/irqchip/irq-madera-cs47l90.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Interrupt support for Cirrus Logic CS47L90 - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include "irq-madera.h" - -static const struct regmap_irq cs47l90_irqs[MADERA_NUM_IRQ] = { - [MADERA_IRQ_BOOT_DONE] = { .reg_offset = 0, - .mask = MADERA_BOOT_DONE_EINT1 }, - [MADERA_IRQ_CTRLIF_ERR] = { .reg_offset = 0, - .mask = MADERA_CTRLIF_ERR_EINT1 }, - - [MADERA_IRQ_FLL1_LOCK] = { .reg_offset = 1, - .mask = MADERA_FLL1_LOCK_EINT1 }, - [MADERA_IRQ_FLL2_LOCK] = { .reg_offset = 1, - .mask = MADERA_FLL2_LOCK_EINT1}, - [MADERA_IRQ_FLLAO_LOCK] = { .reg_offset = 1, - .mask = MADERA_FLLAO_LOCK_EINT1}, - - [MADERA_IRQ_MICDET1] = { .reg_offset = 5, - .mask = MADERA_MICDET1_EINT1 }, - [MADERA_IRQ_MICDET2] = { .reg_offset = 5, - .mask = MADERA_MICDET2_EINT1 }, - [MADERA_IRQ_HPDET] = { .reg_offset = 5, - .mask = MADERA_HPDET_EINT1}, - - [MADERA_IRQ_MICD_CLAMP_RISE] = { .reg_offset = 6, - .mask = MADERA_MICD_CLAMP_RISE_EINT1 }, - [MADERA_IRQ_MICD_CLAMP_FALL] = { .reg_offset = 6, - .mask = MADERA_MICD_CLAMP_FALL_EINT1 }, - [MADERA_IRQ_JD1_FALL] = { .reg_offset = 6, - .mask = MADERA_JD1_FALL_EINT1 }, - [MADERA_IRQ_JD1_RISE] = { .reg_offset = 6, - .mask = MADERA_JD1_RISE_EINT1 }, - - [MADERA_IRQ_ASRC2_IN1_LOCK] = { .reg_offset = 8, - .mask = MADERA_ASRC2_IN1_LOCK_EINT1 }, - [MADERA_IRQ_ASRC2_IN2_LOCK] = { .reg_offset = 8, - .mask = MADERA_ASRC2_IN2_LOCK_EINT1 }, - [MADERA_IRQ_ASRC1_IN1_LOCK] = { .reg_offset = 8, - .mask = MADERA_ASRC1_IN1_LOCK_EINT1 }, - [MADERA_IRQ_ASRC1_IN2_LOCK] = { .reg_offset = 8, - .mask = MADERA_ASRC1_IN2_LOCK_EINT1 }, - - [MADERA_IRQ_DRC2_SIG_DET] = { .reg_offset = 8, - .mask = MADERA_DRC2_SIG_DET_EINT1 }, - [MADERA_IRQ_DRC1_SIG_DET] = { .reg_offset = 8, - .mask = MADERA_DRC1_SIG_DET_EINT1 }, - - [MADERA_IRQ_DSP_IRQ1] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ1_EINT1}, - [MADERA_IRQ_DSP_IRQ2] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ2_EINT1}, - [MADERA_IRQ_DSP_IRQ3] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ3_EINT1}, - [MADERA_IRQ_DSP_IRQ4] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ4_EINT1}, - [MADERA_IRQ_DSP_IRQ5] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ5_EINT1}, - [MADERA_IRQ_DSP_IRQ6] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ6_EINT1}, - [MADERA_IRQ_DSP_IRQ7] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ7_EINT1}, - [MADERA_IRQ_DSP_IRQ8] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ8_EINT1}, - [MADERA_IRQ_DSP_IRQ8] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ8_EINT1}, - [MADERA_IRQ_DSP_IRQ9] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ9_EINT1}, - [MADERA_IRQ_DSP_IRQ10] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ10_EINT1}, - [MADERA_IRQ_DSP_IRQ11] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ11_EINT1}, - [MADERA_IRQ_DSP_IRQ12] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ12_EINT1}, - [MADERA_IRQ_DSP_IRQ13] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ13_EINT1}, - [MADERA_IRQ_DSP_IRQ14] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ14_EINT1}, - [MADERA_IRQ_DSP_IRQ15] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ15_EINT1}, - [MADERA_IRQ_DSP_IRQ16] = { .reg_offset = 10, - .mask = MADERA_DSP_IRQ16_EINT1}, - - [MADERA_IRQ_DSP1_BUS_ERROR] = { .reg_offset = 32, - .mask = MADERA_ADSP_ERROR_STATUS_DSP1}, - [MADERA_IRQ_DSP2_BUS_ERROR] = { .reg_offset = 32, - .mask = MADERA_ADSP_ERROR_STATUS_DSP2}, - [MADERA_IRQ_DSP3_BUS_ERROR] = { .reg_offset = 32, - .mask = MADERA_ADSP_ERROR_STATUS_DSP3}, - [MADERA_IRQ_DSP4_BUS_ERROR] = { .reg_offset = 32, - .mask = MADERA_ADSP_ERROR_STATUS_DSP4}, - [MADERA_IRQ_DSP5_BUS_ERROR] = { .reg_offset = 32, - .mask = MADERA_ADSP_ERROR_STATUS_DSP5}, - [MADERA_IRQ_DSP6_BUS_ERROR] = { .reg_offset = 32, - .mask = MADERA_ADSP_ERROR_STATUS_DSP6}, - [MADERA_IRQ_DSP7_BUS_ERROR] = { .reg_offset = 32, - .mask = MADERA_ADSP_ERROR_STATUS_DSP7}, -}; - -const struct regmap_irq_chip cs47l90_irq = { - .name = "cs47l90 IRQ", - .status_base = MADERA_IRQ1_STATUS_1, - .mask_base = MADERA_IRQ1_MASK_1, - .ack_base = MADERA_IRQ1_STATUS_1, - .num_regs = 33, - .irqs = cs47l90_irqs, - .num_irqs = ARRAY_SIZE(cs47l90_irqs), -}; -EXPORT_SYMBOL_GPL(cs47l90_irq); diff --git a/drivers/irqchip/irq-madera.c b/drivers/irqchip/irq-madera.c deleted file mode 100644 index b88570fb5df8..000000000000 --- a/drivers/irqchip/irq-madera.c +++ /dev/null @@ -1,441 +0,0 @@ -/* - * Interrupt support for Cirrus Logic Madera codecs - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "irq-madera.h" - -struct madera_irq_priv { - struct device *dev; - unsigned int irq_sem; - int irq; - unsigned int irq_flags; - int irq_gpio; - struct regmap_irq_chip_data *irq_data; - struct irq_domain *domain; - struct madera *madera; -}; - -int madera_request_irq(struct madera *madera, int irq, const char *name, - irq_handler_t handler, void *data) -{ - struct madera_irq_priv *priv; - - if (irq < 0) - return irq; - - if (!madera->irq_dev) - return -EINVAL; - - priv = dev_get_drvdata(madera->irq_dev); - - return request_threaded_irq(regmap_irq_get_virq(priv->irq_data, irq), - NULL, handler, IRQF_ONESHOT, name, data); - -} -EXPORT_SYMBOL_GPL(madera_request_irq); - -void madera_free_irq(struct madera *madera, int irq, void *data) -{ - struct madera_irq_priv *priv; - - if (irq < 0) - return; - - if (!madera->irq_dev) - return; - - priv = dev_get_drvdata(madera->irq_dev); - - free_irq(regmap_irq_get_virq(priv->irq_data, irq), data); -} -EXPORT_SYMBOL_GPL(madera_free_irq); - -int madera_set_irq_wake(struct madera *madera, int irq, int on) -{ - struct madera_irq_priv *priv; - - if (irq < 0) - return irq; - - if (!madera->irq_dev) - return -EINVAL; - - priv = dev_get_drvdata(madera->irq_dev); - - return irq_set_irq_wake(regmap_irq_get_virq(priv->irq_data, irq), on); -} -EXPORT_SYMBOL_GPL(madera_set_irq_wake); - -static irqreturn_t madera_irq_thread(int irq, void *data) -{ - struct madera_irq_priv *priv = data; - bool poll; - int ret; - - dev_dbg(priv->dev, "irq_thread handler\n"); - - /* The codec can generate IRQs while it is in low-power mode so - * we must do a runtime get before dispatching the IRQ - */ - ret = pm_runtime_get_sync(priv->madera->dev); - if (ret < 0) { - dev_err(priv->dev, "Failed to resume device: %d\n", ret); - return IRQ_NONE; - } - - do { - poll = false; - - handle_nested_irq(irq_find_mapping(priv->domain, 0)); - - /* - * Poll the IRQ pin status to see if we're really done - * if the interrupt controller can't do it for us. - */ - if (!gpio_is_valid(priv->irq_gpio)) { - break; - } else if (priv->irq_flags & IRQF_TRIGGER_RISING && - gpio_get_value_cansleep(priv->irq_gpio)) { - poll = true; - } else if (priv->irq_flags & IRQF_TRIGGER_FALLING && - !gpio_get_value_cansleep(priv->irq_gpio)) { - poll = true; - } - } while (poll); - - pm_runtime_mark_last_busy(priv->madera->dev); - pm_runtime_put_autosuspend(priv->madera->dev); - - return IRQ_HANDLED; -} - -static void madera_irq_dummy(struct irq_data *data) -{ -} - -static int madera_irq_set_wake(struct irq_data *data, unsigned int on) -{ - struct madera_irq_priv *priv = irq_data_get_irq_chip_data(data); - - return irq_set_irq_wake(priv->irq, on); -} - -static struct irq_chip madera_irq_chip = { - .name = "madera", - .irq_disable = madera_irq_dummy, - .irq_enable = madera_irq_dummy, - .irq_ack = madera_irq_dummy, - .irq_mask = madera_irq_dummy, - .irq_unmask = madera_irq_dummy, - .irq_set_wake = madera_irq_set_wake, -}; - -static struct lock_class_key madera_irq_lock_class; - -static int madera_irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) -{ - struct madera_irq_priv *priv = h->host_data; - - irq_set_chip_data(virq, priv); - irq_set_lockdep_class(virq, &madera_irq_lock_class); - irq_set_chip_and_handler(virq, &madera_irq_chip, handle_simple_irq); - irq_set_nested_thread(virq, true); - - irq_set_noprobe(virq); - - return 0; -} - -static const struct irq_domain_ops madera_domain_ops = { - .map = madera_irq_map, - .xlate = irq_domain_xlate_twocell, -}; - -#ifdef CONFIG_PM_SLEEP -static int madera_suspend_noirq(struct device *dev) -{ - struct madera_irq_priv *priv = dev_get_drvdata(dev); - - dev_dbg(priv->dev, "Late suspend, reenabling IRQ\n"); - - if (priv->irq_sem) { - enable_irq(priv->irq); - priv->irq_sem = 0; - } - - return 0; -} - -static int madera_suspend(struct device *dev) -{ - struct madera_irq_priv *priv = dev_get_drvdata(dev); - - dev_dbg(priv->dev, "Early suspend, disabling IRQ\n"); - - disable_irq(priv->irq); - priv->irq_sem = 1; - - return 0; -} - -static int madera_resume_noirq(struct device *dev) -{ - struct madera_irq_priv *priv = dev_get_drvdata(dev); - - dev_dbg(priv->dev, "Early resume, disabling IRQ\n"); - disable_irq(priv->irq); - - priv->irq_sem = 1; - - return 0; -} - -static int madera_resume(struct device *dev) -{ - struct madera_irq_priv *priv = dev_get_drvdata(dev); - - dev_dbg(priv->dev, "Late resume, reenabling IRQ\n"); - if (priv->irq_sem) { - enable_irq(priv->irq); - priv->irq_sem = 0; - } - - return 0; -} -#endif - -static const struct dev_pm_ops madera_irq_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(madera_suspend, madera_resume) -#ifdef CONFIG_PM_SLEEP - .suspend_noirq = madera_suspend_noirq, - .resume_noirq = madera_resume_noirq, -#endif -}; - -static int madera_irq_of_get(struct madera_irq_priv *priv) -{ - /* all our settings are under the parent DT node */ - struct device_node *np = priv->madera->dev->of_node; - u32 value; - int ret; - - priv->irq = irq_of_parse_and_map(np, 0); - if (priv->irq < 0) - return priv->irq; - - ret = of_property_read_u32(np, "cirrus,irq_flags", &value); - if (ret == 0) - priv->irq_flags = value; - - priv->irq_gpio = of_get_named_gpio(np, "cirrus,irq-gpios", 0); - - return 0; -} - -int madera_irq_probe(struct platform_device *pdev) -{ - struct madera *madera = dev_get_drvdata(pdev->dev.parent); - struct madera_irq_priv *priv; - const struct regmap_irq_chip *irq = NULL; - struct irq_data *irq_data; - int flags = IRQF_ONESHOT; - int ret; - - dev_info(&pdev->dev, "probe\n"); - - priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - priv->dev = &pdev->dev; - priv->madera = madera; - - switch (madera->type) { - case CS47L35: - if (IS_ENABLED(CONFIG_MADERA_IRQ_CS47L35)) - irq = &cs47l35_irq; - break; - case CS47L85: - case WM1840: - if (IS_ENABLED(CONFIG_MADERA_IRQ_CS47L85)) - irq = &cs47l85_irq; - break; - case CS47L90: - case CS47L91: - if (IS_ENABLED(CONFIG_MADERA_IRQ_CS47L90)) - irq = &cs47l90_irq; - break; - default: - dev_err(madera->dev, "Unsupported Madera device type %d\n", - madera->type); - return -EINVAL; - } - - if (!irq) { - dev_err(madera->dev, "No support for %s\n", - madera_name_from_type(madera->type)); - return -EINVAL; - } - - if (IS_ENABLED(CONFIG_OF)) { - if (!dev_get_platdata(priv->dev)) { - ret = madera_irq_of_get(priv); - if (ret < 0) - return ret; - } else { - priv->irq = madera->irq; - priv->irq_flags = madera->pdata.irqchip.irq_flags; - priv->irq_gpio = madera->pdata.irqchip.irq_gpio; - - /* pdata uses 0 to mean undefined, convert to an - * invalid GPIO number - */ - if (priv->irq_gpio == 0) - priv->irq_gpio = -1; - } - } - - - /* Read the flags from the interrupt controller if not specified */ - if (!priv->irq_flags) { - irq_data = irq_get_irq_data(priv->irq); - if (!irq_data) { - dev_err(priv->dev, "Invalid IRQ: %d\n", priv->irq); - return -EINVAL; - } - - priv->irq_flags = irqd_get_trigger_type(irq_data); - switch (priv->irq_flags) { - case IRQF_TRIGGER_LOW: - case IRQF_TRIGGER_HIGH: - case IRQF_TRIGGER_RISING: - case IRQF_TRIGGER_FALLING: - break; - - case IRQ_TYPE_NONE: - default: - /* Device default */ - priv->irq_flags = IRQF_TRIGGER_LOW; - break; - } - } - - flags |= priv->irq_flags; - - if (flags & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_RISING)) { - ret = regmap_update_bits(madera->regmap, MADERA_IRQ1_CTRL, - MADERA_IRQ_POL_MASK, 0); - if (ret) { - dev_err(priv->dev, - "Couldn't set IRQ polarity: %d\n", ret); - return ret; - } - } - - - if (flags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { - /* A GPIO is recommended to emulate edge trigger */ - if (gpio_is_valid(priv->irq_gpio)) { - if (gpio_to_irq(priv->irq_gpio) != priv->irq) { - dev_warn(priv->dev, - "IRQ %d is not GPIO %d (%d)\n", - priv->irq, priv->irq_gpio, - gpio_to_irq(priv->irq_gpio)); - - priv->irq = gpio_to_irq(priv->irq_gpio); - } - - ret = devm_gpio_request_one(priv->dev, priv->irq_gpio, - GPIOF_IN, "madera IRQ"); - if (ret) { - dev_err(priv->dev, - "Failed to request IRQ GPIO %d: %d\n", - priv->irq_gpio, ret); - return ret; - } - } - - dev_dbg(priv->dev, "edge-trigger mode irq_gpio=%d\n", - priv->irq_gpio); - } else { - dev_dbg(priv->dev, "level-trigger mode\n"); - } - - priv->domain = irq_domain_add_linear(NULL, 1, &madera_domain_ops, priv); - - ret = regmap_add_irq_chip(madera->regmap, - irq_create_mapping(priv->domain, 0), - IRQF_ONESHOT, 0, irq, - &priv->irq_data); - if (ret) { - dev_err(priv->dev, "add_irq_chip failed: %d\n", ret); - return ret; - } - - ret = request_threaded_irq(priv->irq, NULL, madera_irq_thread, - flags, "madera", priv); - if (ret) { - dev_err(priv->dev, - "Failed to request threaded irq %d: %d\n", - priv->irq, ret); - regmap_del_irq_chip(priv->irq, priv->irq_data); - return ret; - } - - platform_set_drvdata(pdev, priv); - madera->irq_dev = priv->dev; - - return 0; -} - -int madera_irq_remove(struct platform_device *pdev) -{ - struct madera_irq_priv *priv = platform_get_drvdata(pdev); - - priv->madera->irq_dev = NULL; - - regmap_del_irq_chip(priv->irq, priv->irq_data); - free_irq(priv->irq, priv); - - return 0; -} - -static struct platform_driver madera_irq_driver = { - .probe = madera_irq_probe, - .remove = madera_irq_remove, - .driver = { - .name = "madera-irq", - .pm = &madera_irq_pm_ops, - } -}; - -module_platform_driver(madera_irq_driver); - -MODULE_DESCRIPTION("Madera IRQ driver"); -MODULE_AUTHOR("Richard Fitzgerald "); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/irqchip/irq-madera.h b/drivers/irqchip/irq-madera.h deleted file mode 100644 index e7b345499c84..000000000000 --- a/drivers/irqchip/irq-madera.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Interrupt support for Cirrus Logic Madera codecs - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _IRQ_MADERA -#define _IRQ_MADERA - -struct regmap_irq_chip; - -extern const struct regmap_irq_chip cs47l35_irq; -extern const struct regmap_irq_chip cs47l85_irq; -extern const struct regmap_irq_chip cs47l90_irq; - -#endif diff --git a/drivers/mfd/Android.mk b/drivers/mfd/Android.mk deleted file mode 100644 index a9865e4a80ac..000000000000 --- a/drivers/mfd/Android.mk +++ /dev/null @@ -1,9 +0,0 @@ -DLKM_DIR := motorola/kernel/modules -LOCAL_PATH := $(call my-dir) - -include $(CLEAR_VARS) -LOCAL_MODULE := cirrus_madera-core.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - diff --git a/drivers/mfd/Kbuild b/drivers/mfd/Kbuild deleted file mode 100644 index 67ff2cd39094..000000000000 --- a/drivers/mfd/Kbuild +++ /dev/null @@ -1,12 +0,0 @@ -# add -Wall to try to catch everything we can. -EXTRA_CFLAGS += -Wall -EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include -ifeq ($(CONFIG_ARCH_SDM450), y) -EXTRA_CFLAGS += -DCONFIG_MFD_CS47L35 -cirrus_madera-core-objs = madera-core.o madera-spi.o madera-core.o madera-spi.o cs47l35-tables.o -else -EXTRA_CFLAGS += -DCONFIG_MFD_CS47L90 -cirrus_madera-core-objs = madera-core.o madera-spi.o madera-core.o madera-spi.o cs47l90-tables.o -endif - -obj-m += cirrus_madera-core.o diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile deleted file mode 100644 index 34b09dd815a7..000000000000 --- a/drivers/mfd/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build - -all: - $(MAKE) -C $(KERNEL_SRC) M=$(shell pwd) modules $(KBUILD_OPTIONS) - -modules_install: - $(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(shell pwd) modules_install - -clean: - $(MAKE) -C $(KERNEL_SRC) M=$(PWD) clean \ No newline at end of file diff --git a/drivers/mfd/cs47l35-tables.c b/drivers/mfd/cs47l35-tables.c deleted file mode 100644 index 3d84a679fb05..000000000000 --- a/drivers/mfd/cs47l35-tables.c +++ /dev/null @@ -1,1698 +0,0 @@ -/* - * Data tables for CS47L35 codec - * - * Copyright 2015-2016 Cirrus Logic - * - * Author: Piotr Stankiewicz - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include - -#include -#include -#include - -#include "madera.h" - -static const struct reg_sequence cs47l35_reva_16_patch[] = { - { 0x460, 0x0c40 }, - { 0x461, 0xcd1a }, - { 0x462, 0x0c40 }, - { 0x463, 0xb53b }, - { 0x464, 0x0c40 }, - { 0x465, 0x7503 }, - { 0x466, 0x0c40 }, - { 0x467, 0x4a41 }, - { 0x468, 0x0041 }, - { 0x469, 0x3491 }, - { 0x46a, 0x0841 }, - { 0x46b, 0x1f50 }, - { 0x46c, 0x0446 }, - { 0x46d, 0x14ed }, - { 0x46e, 0x0446 }, - { 0x46f, 0x1455 }, - { 0x470, 0x04c6 }, - { 0x471, 0x1220 }, - { 0x472, 0x04c6 }, - { 0x473, 0x040f }, - { 0x474, 0x04ce }, - { 0x475, 0x0339 }, - { 0x476, 0x05df }, - { 0x477, 0x028f }, - { 0x478, 0x05df }, - { 0x479, 0x0209 }, - { 0x47a, 0x05df }, - { 0x47b, 0x00cf }, - { 0x47c, 0x05df }, - { 0x47d, 0x0001 }, - { 0x47e, 0x07ff }, -}; - -int cs47l35_patch(struct madera *madera) -{ - int ret; - - ret = regmap_register_patch(madera->regmap, cs47l35_reva_16_patch, - ARRAY_SIZE(cs47l35_reva_16_patch)); - if (ret < 0) - dev_err(madera->dev, "Error applying patch: %d\n", ret); - - return ret; -} -EXPORT_SYMBOL_GPL(cs47l35_patch); - -static const struct reg_default cs47l35_reg_default[] = { - { 0x00000008, 0x0308 }, /* R8 (0x8) - Ctrl IF CFG 1 */ - { 0x00000009, 0x0200 }, /* R9 (0x9) - Ctrl IF CFG 2 */ - { 0x00000016, 0x0000 }, /* R22 (0x16) - Write Sequencer Ctrl 0 */ - { 0x00000017, 0x0000 }, /* R23 (0x17) - Write Sequencer Ctrl 1 */ - { 0x00000018, 0x0000 }, /* R24 (0x18) - Write Sequencer Ctrl 2 */ - { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ - { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ - { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ - { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */ - { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */ - { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */ - { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */ - { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */ - { 0x00000041, 0x0000 }, /* R65 (0x41) - Sequence control */ - { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */ - { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ - { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ - { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4*/ - { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Seq Sel 1*/ - { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Seq Sel 2*/ - { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ - { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ - { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */ - { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */ - { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */ - { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */ - { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */ - { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */ - { 0x000000A0, 0x0000 }, /* R160 (0xA0) - Comfort Noise Generator */ - { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */ - { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ - { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */ - { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */ - { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */ - { 0x00000120, 0x0305 }, /* R288 (0x120) - DSP Clock 1 */ - { 0x00000122, 0x0000 }, /* R290 (0x122) - DSP Clock 2 */ - { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */ - { 0x0000014a, 0x0000 }, /* R330 (0x14A) - Output async clock */ - { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */ - { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */ - { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */ - { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */ - { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */ - { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */ - { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */ - { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */ - { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ - { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ - { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ - { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ - { 0x00000178, 0x0000 }, /* R376 (0x178) - FLL1 NCO Test 0 */ - { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ - { 0x0000017f, 0x0000 }, /* R383 (0x17f) - FLL1 Synchroniser 1 */ - { 0x00000180, 0x0000 }, /* R384 (0x180) - FLL1 Synchroniser 2 */ - { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 3 */ - { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 4 */ - { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 5 */ - { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 6 */ - { 0x00000185, 0x0001 }, /* R389 (0x185) - FLL1 Synchroniser 7 */ - { 0x00000187, 0x0000 }, /* R391 (0x187) - FLL1 Spread Spectrum */ - { 0x00000188, 0x000c }, /* R392 (0x188) - FLL1 GPIO Clock */ - { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ - { 0x0000020B, 0x0400 }, /* R523 (0x20B) - HP Charge Pump 8 */ - { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ - { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ - { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ - { 0x0000021c, 0x0022 }, /* R540 (0x21c) - Mic Bias Ctrl 5 */ - { 0x0000021e, 0x0022 }, /* R542 (0x21e) - Mic Bias Ctrl 6 */ - { 0x0000027e, 0x0000 }, /* R638 (0x27E) - EDRE HP stereo control */ - { 0x00000293, 0x0080 }, /* R659 (0x293) - Accessory Detect Mode 1 */ - { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ - { 0x000002a3, 0x1102 }, /* R675 (0x2A3) - Mic Detect Control 1 */ - { 0x000002a4, 0x009f }, /* R676 (0x2A4) - Mic Detect Control 2 */ - { 0x000002a6, 0x3d3d }, /* R678 (0x2A6) - Mic Detect Level 1 */ - { 0x000002a7, 0x3d3d }, /* R679 (0x2A7) - Mic Detect Level 2 */ - { 0x000002a8, 0x333d }, /* R680 (0x2A8) - Mic Detect Level 3 */ - { 0x000002a9, 0x202d }, /* R681 (0x2A9) - Mic Detect Level 4 */ - { 0x000002c6, 0x0010 }, /* R710 (0x2c5) - Mic Clamp control */ - { 0x000002c8, 0x0000 }, /* R712 (0x2C8) - GP switch 1 */ - { 0x000002d3, 0x0000 }, /* R723 (0x2D3) - Jack detect analogue */ - { 0x00000300, 0x0000 }, /* R768 (0x300) - Input Enables */ - { 0x00000308, 0x0000 }, /* R776 (0x308) - Input Rate */ - { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ - { 0x0000030c, 0x0002 }, /* R780 (0x30C) - HPF Control */ - { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */ - { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */ - { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */ - { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */ - { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */ - { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */ - { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */ - { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */ - { 0x0000031a, 0x0500 }, /* R794 (0x31A) - DMIC2L Control */ - { 0x0000031c, 0x0080 }, /* R796 (0x31C) - IN2R Control */ - { 0x0000031d, 0x0180 }, /* R797 (0x31D) - ADC Digital Volume 2R */ - { 0x0000031e, 0x0000 }, /* R798 (0x31E) - DMIC2R Control */ - { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */ - { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */ - { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */ - { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */ - { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */ - { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */ - { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */ - { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */ - { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */ - { 0x00000428, 0x0000 }, /* R1064 (0x428) - Output Path Config 4L */ - { 0x00000429, 0x0180 }, /* R1065 (0x429) - DAC Digital Volume 4L */ - { 0x0000042b, 0x0040 }, /* R1067 (0x42B) - Noise Gate Select 4L */ - { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */ - { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */ - { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */ - { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ - { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ - { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ - { 0x00000440, 0x0003 }, /* R1088 (0x440) - DRE Enable */ - { 0x00000448, 0x0a83 }, /* R1096 (0x448) - eDRE Enable */ - { 0x0000044A, 0x0000 }, /* R1098 (0x44A) - eDRE Manual */ - { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ - { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ - { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */ - { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ - { 0x000004a0, 0x3080 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */ - { 0x000004a8, 0x7120 }, /* R1192 (0x4a8) - HP Test Ctrl 5 */ - { 0x000004a9, 0x7120 }, /* R1193 (0x4a9) - HP Test Ctrl 6 */ - { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ - { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ - { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ - { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */ - { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */ - { 0x00000505, 0x0040 }, /* R1285 (0x505) - AIF1 Tx BCLK Rate */ - { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */ - { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */ - { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */ - { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */ - { 0x0000050a, 0x0001 }, /* R1290 (0x50A) - AIF1 Frame Ctrl 4 */ - { 0x0000050b, 0x0002 }, /* R1291 (0x50B) - AIF1 Frame Ctrl 5 */ - { 0x0000050c, 0x0003 }, /* R1292 (0x50C) - AIF1 Frame Ctrl 6 */ - { 0x0000050d, 0x0004 }, /* R1293 (0x50D) - AIF1 Frame Ctrl 7 */ - { 0x0000050e, 0x0005 }, /* R1294 (0x50E) - AIF1 Frame Ctrl 8 */ - { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */ - { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */ - { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */ - { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */ - { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */ - { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ - { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ - { 0x0000051a, 0x0000 }, /* R1306 (0x51A) - AIF1 Rx Enables */ - { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ - { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ - { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ - { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */ - { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */ - { 0x00000545, 0x0040 }, /* R1349 (0x545) - AIF2 Tx BCLK Rate */ - { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */ - { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */ - { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */ - { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */ - { 0x0000054a, 0x0001 }, /* R1354 (0x54A) - AIF2 Frame Ctrl 4 */ - { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */ - { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ - { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ - { 0x0000055a, 0x0000 }, /* R1370 (0x55A) - AIF2 Rx Enables */ - { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ - { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ - { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ - { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */ - { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */ - { 0x00000585, 0x0040 }, /* R1413 (0x585) - AIF3 Tx BCLK Rate */ - { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */ - { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */ - { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */ - { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */ - { 0x0000058a, 0x0001 }, /* R1418 (0x58A) - AIF3 Frame Ctrl 4 */ - { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */ - { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ - { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ - { 0x0000059a, 0x0000 }, /* R1434 (0x59A) - AIF3 Rx Enables */ - { 0x000005c2, 0x0000 }, /* R1474 (0x5c2) - SPD1 TX Control */ - { 0x000005e3, 0x0000 }, /* R1507 (0x5E3) - SLIMbus Framer Ref Gear */ - { 0x000005e5, 0x0000 }, /* R1509 (0x5E5) - SLIMbus Rates 1 */ - { 0x000005e6, 0x0000 }, /* R1510 (0x5E6) - SLIMbus Rates 2 */ - { 0x000005e7, 0x0000 }, /* R1511 (0x5E7) - SLIMbus Rates 3 */ - { 0x000005e9, 0x0000 }, /* R1513 (0x5E9) - SLIMbus Rates 5 */ - { 0x000005ea, 0x0000 }, /* R1514 (0x5EA) - SLIMbus Rates 6 */ - { 0x000005eb, 0x0000 }, /* R1515 (0x5EB) - SLIMbus Rates 7 */ - { 0x000005f5, 0x0000 }, /* R1525 (0x5F5) - SLIMbus RX Channel Enable */ - { 0x000005f6, 0x0000 }, /* R1526 (0x5F6) - SLIMbus TX Channel Enable */ - { 0x00000640, 0x0000 }, /* R1600 (0x640) - PWM1MIX Input 1 Source */ - { 0x00000641, 0x0080 }, /* R1601 (0x641) - PWM1MIX Input 1 Volume */ - { 0x00000642, 0x0000 }, /* R1602 (0x642) - PWM1MIX Input 2 Source */ - { 0x00000643, 0x0080 }, /* R1603 (0x643) - PWM1MIX Input 2 Volume */ - { 0x00000644, 0x0000 }, /* R1604 (0x644) - PWM1MIX Input 3 Source */ - { 0x00000645, 0x0080 }, /* R1605 (0x645) - PWM1MIX Input 3 Volume */ - { 0x00000646, 0x0000 }, /* R1606 (0x646) - PWM1MIX Input 4 Source */ - { 0x00000647, 0x0080 }, /* R1607 (0x647) - PWM1MIX Input 4 Volume */ - { 0x00000648, 0x0000 }, /* R1608 (0x648) - PWM2MIX Input 1 Source */ - { 0x00000649, 0x0080 }, /* R1609 (0x649) - PWM2MIX Input 1 Volume */ - { 0x0000064a, 0x0000 }, /* R1610 (0x64a) - PWM2MIX Input 2 Source */ - { 0x0000064b, 0x0080 }, /* R1611 (0x64b) - PWM2MIX Input 2 Volume */ - { 0x0000064c, 0x0000 }, /* R1612 (0x64c) - PWM2MIX Input 3 Source */ - { 0x0000064d, 0x0080 }, /* R1613 (0x64d) - PWM2MIX Input 3 Volume */ - { 0x0000064e, 0x0000 }, /* R1614 (0x64e) - PWM2MIX Input 4 Source */ - { 0x0000064f, 0x0080 }, /* R1615 (0x64f) - PWM2MIX Input 4 Volume */ - { 0x00000680, 0x0000 }, /* R1664 (0x680) - OUT1LMIX Input 1 Source */ - { 0x00000681, 0x0080 }, /* R1665 (0x681) - OUT1LMIX Input 1 Volume */ - { 0x00000682, 0x0000 }, /* R1666 (0x682) - OUT1LMIX Input 2 Source */ - { 0x00000683, 0x0080 }, /* R1667 (0x683) - OUT1LMIX Input 2 Volume */ - { 0x00000684, 0x0000 }, /* R1668 (0x684) - OUT1LMIX Input 3 Source */ - { 0x00000685, 0x0080 }, /* R1669 (0x685) - OUT1LMIX Input 3 Volume */ - { 0x00000686, 0x0000 }, /* R1670 (0x686) - OUT1LMIX Input 4 Source */ - { 0x00000687, 0x0080 }, /* R1671 (0x687) - OUT1LMIX Input 4 Volume */ - { 0x00000688, 0x0000 }, /* R1672 (0x688) - OUT1RMIX Input 1 Source */ - { 0x00000689, 0x0080 }, /* R1673 (0x689) - OUT1RMIX Input 1 Volume */ - { 0x0000068a, 0x0000 }, /* R1674 (0x68a) - OUT1RMIX Input 2 Source */ - { 0x0000068b, 0x0080 }, /* R1675 (0x68b) - OUT1RMIX Input 2 Volume */ - { 0x0000068c, 0x0000 }, /* R1672 (0x68c) - OUT1RMIX Input 3 Source */ - { 0x0000068d, 0x0080 }, /* R1673 (0x68d) - OUT1RMIX Input 3 Volume */ - { 0x0000068e, 0x0000 }, /* R1674 (0x68e) - OUT1RMIX Input 4 Source */ - { 0x0000068f, 0x0080 }, /* R1675 (0x68f) - OUT1RMIX Input 4 Volume */ - { 0x000006b0, 0x0000 }, /* R1712 (0x6b0) - OUT4LMIX Input 1 Source */ - { 0x000006b1, 0x0080 }, /* R1713 (0x6b1) - OUT4LMIX Input 1 Volume */ - { 0x000006b2, 0x0000 }, /* R1714 (0x6b2) - OUT4LMIX Input 2 Source */ - { 0x000006b3, 0x0080 }, /* R1715 (0x6b3) - OUT4LMIX Input 2 Volume */ - { 0x000006b4, 0x0000 }, /* R1716 (0x6b4) - OUT4LMIX Input 3 Source */ - { 0x000006b5, 0x0080 }, /* R1717 (0x6b5) - OUT4LMIX Input 3 Volume */ - { 0x000006b6, 0x0000 }, /* R1718 (0x6b6) - OUT4LMIX Input 4 Source */ - { 0x000006b7, 0x0080 }, /* R1719 (0x6b7) - OUT4LMIX Input 4 Volume */ - { 0x000006c0, 0x0000 }, /* R1728 (0x6c0) - OUT5LMIX Input 1 Source */ - { 0x000006c1, 0x0080 }, /* R1729 (0x6c1) - OUT5LMIX Input 1 Volume */ - { 0x000006c2, 0x0000 }, /* R1730 (0x6c2) - OUT5LMIX Input 2 Source */ - { 0x000006c3, 0x0080 }, /* R1731 (0x6c3) - OUT5LMIX Input 2 Volume */ - { 0x000006c4, 0x0000 }, /* R1732 (0x6c4) - OUT5LMIX Input 3 Source */ - { 0x000006c5, 0x0080 }, /* R1733 (0x6c5) - OUT5LMIX Input 3 Volume */ - { 0x000006c6, 0x0000 }, /* R1734 (0x6c6) - OUT5LMIX Input 4 Source */ - { 0x000006c7, 0x0080 }, /* R1735 (0x6c7) - OUT5LMIX Input 4 Volume */ - { 0x000006c8, 0x0000 }, /* R1736 (0x6c8) - OUT5RMIX Input 1 Source */ - { 0x000006c9, 0x0080 }, /* R1737 (0x6c9) - OUT5RMIX Input 1 Volume */ - { 0x000006ca, 0x0000 }, /* R1738 (0x6ca) - OUT5RMIX Input 2 Source */ - { 0x000006cb, 0x0080 }, /* R1739 (0x6cb) - OUT5RMIX Input 2 Volume */ - { 0x000006cc, 0x0000 }, /* R1740 (0x6cc) - OUT5RMIX Input 3 Source */ - { 0x000006cd, 0x0080 }, /* R1741 (0x6cd) - OUT5RMIX Input 3 Volume */ - { 0x000006ce, 0x0000 }, /* R1742 (0x6ce) - OUT5RMIX Input 4 Source */ - { 0x000006cf, 0x0080 }, /* R1743 (0x6cf) - OUT5RMIX Input 4 Volume */ - { 0x00000700, 0x0000 }, /* R1792 (0x700) - AIF1TX1MIX Input 1 Source */ - { 0x00000701, 0x0080 }, /* R1793 (0x701) - AIF1TX1MIX Input 1 Volume */ - { 0x00000702, 0x0000 }, /* R1794 (0x702) - AIF1TX1MIX Input 2 Source */ - { 0x00000703, 0x0080 }, /* R1795 (0x703) - AIF1TX1MIX Input 2 Volume */ - { 0x00000704, 0x0000 }, /* R1796 (0x704) - AIF1TX1MIX Input 3 Source */ - { 0x00000705, 0x0080 }, /* R1797 (0x705) - AIF1TX1MIX Input 3 Volume */ - { 0x00000706, 0x0000 }, /* R1798 (0x706) - AIF1TX1MIX Input 4 Source */ - { 0x00000707, 0x0080 }, /* R1799 (0x707) - AIF1TX1MIX Input 4 Volume */ - { 0x00000708, 0x0000 }, /* R1800 (0x708) - AIF1TX2MIX Input 1 Source */ - { 0x00000709, 0x0080 }, /* R1801 (0x709) - AIF1TX2MIX Input 1 Volume */ - { 0x0000070a, 0x0000 }, /* R1802 (0x70a) - AIF1TX2MIX Input 2 Source */ - { 0x0000070b, 0x0080 }, /* R1803 (0x70b) - AIF1TX2MIX Input 2 Volume */ - { 0x0000070c, 0x0000 }, /* R1804 (0x70c) - AIF1TX2MIX Input 3 Source */ - { 0x0000070d, 0x0080 }, /* R1805 (0x70d) - AIF1TX2MIX Input 3 Volume */ - { 0x0000070e, 0x0000 }, /* R1806 (0x70e) - AIF1TX2MIX Input 4 Source */ - { 0x0000070f, 0x0080 }, /* R1807 (0x70f) - AIF1TX2MIX Input 4 Volume */ - { 0x00000710, 0x0000 }, /* R1808 (0x710) - AIF1TX3MIX Input 1 Source */ - { 0x00000711, 0x0080 }, /* R1809 (0x711) - AIF1TX3MIX Input 1 Volume */ - { 0x00000712, 0x0000 }, /* R1810 (0x712) - AIF1TX3MIX Input 2 Source */ - { 0x00000713, 0x0080 }, /* R1811 (0x713) - AIF1TX3MIX Input 2 Volume */ - { 0x00000714, 0x0000 }, /* R1812 (0x714) - AIF1TX3MIX Input 3 Source */ - { 0x00000715, 0x0080 }, /* R1813 (0x715) - AIF1TX3MIX Input 3 Volume */ - { 0x00000716, 0x0000 }, /* R1814 (0x716) - AIF1TX3MIX Input 4 Source */ - { 0x00000717, 0x0080 }, /* R1815 (0x717) - AIF1TX3MIX Input 4 Volume */ - { 0x00000718, 0x0000 }, /* R1816 (0x718) - AIF1TX4MIX Input 1 Source */ - { 0x00000719, 0x0080 }, /* R1817 (0x719) - AIF1TX4MIX Input 1 Volume */ - { 0x0000071a, 0x0000 }, /* R1818 (0x71a) - AIF1TX4MIX Input 2 Source */ - { 0x0000071b, 0x0080 }, /* R1819 (0x71b) - AIF1TX4MIX Input 2 Volume */ - { 0x0000071c, 0x0000 }, /* R1820 (0x71c) - AIF1TX4MIX Input 3 Source */ - { 0x0000071d, 0x0080 }, /* R1821 (0x71d) - AIF1TX4MIX Input 3 Volume */ - { 0x0000071e, 0x0000 }, /* R1822 (0x71e) - AIF1TX4MIX Input 4 Source */ - { 0x0000071f, 0x0080 }, /* R1823 (0x71f) - AIF1TX4MIX Input 4 Volume */ - { 0x00000720, 0x0000 }, /* R1824 (0x720) - AIF1TX5MIX Input 1 Source */ - { 0x00000721, 0x0080 }, /* R1825 (0x721) - AIF1TX5MIX Input 1 Volume */ - { 0x00000722, 0x0000 }, /* R1826 (0x722) - AIF1TX5MIX Input 2 Source */ - { 0x00000723, 0x0080 }, /* R1827 (0x723) - AIF1TX5MIX Input 2 Volume */ - { 0x00000724, 0x0000 }, /* R1828 (0x724) - AIF1TX5MIX Input 3 Source */ - { 0x00000725, 0x0080 }, /* R1829 (0x725) - AIF1TX5MIX Input 3 Volume */ - { 0x00000726, 0x0000 }, /* R1830 (0x726) - AIF1TX5MIX Input 4 Source */ - { 0x00000727, 0x0080 }, /* R1831 (0x727) - AIF1TX5MIX Input 4 Volume */ - { 0x00000728, 0x0000 }, /* R1832 (0x728) - AIF1TX6MIX Input 1 Source */ - { 0x00000729, 0x0080 }, /* R1833 (0x729) - AIF1TX6MIX Input 1 Volume */ - { 0x0000072a, 0x0000 }, /* R1834 (0x72a) - AIF1TX6MIX Input 2 Source */ - { 0x0000072b, 0x0080 }, /* R1835 (0x72b) - AIF1TX6MIX Input 2 Volume */ - { 0x0000072c, 0x0000 }, /* R1836 (0x72c) - AIF1TX6MIX Input 3 Source */ - { 0x0000072d, 0x0080 }, /* R1837 (0x72d) - AIF1TX6MIX Input 3 Volume */ - { 0x0000072e, 0x0000 }, /* R1838 (0x72e) - AIF1TX6MIX Input 4 Source */ - { 0x0000072f, 0x0080 }, /* R1839 (0x72f) - AIF1TX6MIX Input 4 Volume */ - { 0x00000740, 0x0000 }, /* R1856 (0x740) - AIF2TX1MIX Input 1 Source */ - { 0x00000741, 0x0080 }, /* R1857 (0x741) - AIF2TX1MIX Input 1 Volume */ - { 0x00000742, 0x0000 }, /* R1858 (0x742) - AIF2TX1MIX Input 2 Source */ - { 0x00000743, 0x0080 }, /* R1859 (0x743) - AIF2TX1MIX Input 2 Volume */ - { 0x00000744, 0x0000 }, /* R1860 (0x744) - AIF2TX1MIX Input 3 Source */ - { 0x00000745, 0x0080 }, /* R1861 (0x745) - AIF2TX1MIX Input 3 Volume */ - { 0x00000746, 0x0000 }, /* R1862 (0x746) - AIF2TX1MIX Input 4 Source */ - { 0x00000747, 0x0080 }, /* R1863 (0x747) - AIF2TX1MIX Input 4 Volume */ - { 0x00000748, 0x0000 }, /* R1864 (0x748) - AIF2TX2MIX Input 1 Source */ - { 0x00000749, 0x0080 }, /* R1865 (0x749) - AIF2TX2MIX Input 1 Volume */ - { 0x0000074a, 0x0000 }, /* R1866 (0x74a) - AIF2TX2MIX Input 2 Source */ - { 0x0000074b, 0x0080 }, /* R1867 (0x74b) - AIF2TX2MIX Input 2 Volume */ - { 0x0000074c, 0x0000 }, /* R1868 (0x74c) - AIF2TX2MIX Input 3 Source */ - { 0x0000074d, 0x0080 }, /* R1869 (0x74d) - AIF2TX2MIX Input 3 Volume */ - { 0x0000074e, 0x0000 }, /* R1870 (0x74e) - AIF2TX2MIX Input 4 Source */ - { 0x0000074f, 0x0080 }, /* R1871 (0x74f) - AIF2TX2MIX Input 4 Volume */ - { 0x00000780, 0x0000 }, /* R1920 (0x780) - AIF3TX1MIX Input 1 Source */ - { 0x00000781, 0x0080 }, /* R1921 (0x781) - AIF3TX1MIX Input 1 Volume */ - { 0x00000782, 0x0000 }, /* R1922 (0x782) - AIF3TX1MIX Input 2 Source */ - { 0x00000783, 0x0080 }, /* R1923 (0x783) - AIF3TX1MIX Input 2 Volume */ - { 0x00000784, 0x0000 }, /* R1924 (0x784) - AIF3TX1MIX Input 3 Source */ - { 0x00000785, 0x0080 }, /* R1925 (0x785) - AIF3TX1MIX Input 3 Volume */ - { 0x00000786, 0x0000 }, /* R1926 (0x786) - AIF3TX1MIX Input 4 Source */ - { 0x00000787, 0x0080 }, /* R1927 (0x787) - AIF3TX1MIX Input 4 Volume */ - { 0x00000788, 0x0000 }, /* R1928 (0x788) - AIF3TX2MIX Input 1 Source */ - { 0x00000789, 0x0080 }, /* R1929 (0x789) - AIF3TX2MIX Input 1 Volume */ - { 0x0000078a, 0x0000 }, /* R1930 (0x78a) - AIF3TX2MIX Input 2 Source */ - { 0x0000078b, 0x0080 }, /* R1931 (0x78b) - AIF3TX2MIX Input 2 Volume */ - { 0x0000078c, 0x0000 }, /* R1932 (0x78c) - AIF3TX2MIX Input 3 Source */ - { 0x0000078d, 0x0080 }, /* R1933 (0x78d) - AIF3TX2MIX Input 3 Volume */ - { 0x0000078e, 0x0000 }, /* R1934 (0x78e) - AIF3TX2MIX Input 4 Source */ - { 0x0000078f, 0x0080 }, /* R1935 (0x78f) - AIF3TX2MIX Input 4 Volume */ - { 0x000007c0, 0x0000 }, /* R1984 (0x7c0) - SLIMTX1MIX Input 1 Source */ - { 0x000007c1, 0x0080 }, /* R1985 (0x7c1) - SLIMTX1MIX Input 1 Volume */ - { 0x000007c2, 0x0000 }, /* R1986 (0x7c2) - SLIMTX1MIX Input 2 Source */ - { 0x000007c3, 0x0080 }, /* R1987 (0x7c3) - SLIMTX1MIX Input 2 Volume */ - { 0x000007c4, 0x0000 }, /* R1988 (0x7c4) - SLIMTX1MIX Input 3 Source */ - { 0x000007c5, 0x0080 }, /* R1989 (0x7c5) - SLIMTX1MIX Input 3 Volume */ - { 0x000007c6, 0x0000 }, /* R1990 (0x7c6) - SLIMTX1MIX Input 4 Source */ - { 0x000007c7, 0x0080 }, /* R1991 (0x7c7) - SLIMTX1MIX Input 4 Volume */ - { 0x000007c8, 0x0000 }, /* R1992 (0x7c8) - SLIMTX2MIX Input 1 Source */ - { 0x000007c9, 0x0080 }, /* R1993 (0x7c9) - SLIMTX2MIX Input 1 Volume */ - { 0x000007ca, 0x0000 }, /* R1994 (0x7ca) - SLIMTX2MIX Input 2 Source */ - { 0x000007cb, 0x0080 }, /* R1995 (0x7cb) - SLIMTX2MIX Input 2 Volume */ - { 0x000007cc, 0x0000 }, /* R1996 (0x7cc) - SLIMTX2MIX Input 3 Source */ - { 0x000007cd, 0x0080 }, /* R1997 (0x7cd) - SLIMTX2MIX Input 3 Volume */ - { 0x000007ce, 0x0000 }, /* R1998 (0x7ce) - SLIMTX2MIX Input 4 Source */ - { 0x000007cf, 0x0080 }, /* R1999 (0x7cf) - SLIMTX2MIX Input 4 Volume */ - { 0x000007d0, 0x0000 }, /* R2000 (0x7d0) - SLIMTX3MIX Input 1 Source */ - { 0x000007d1, 0x0080 }, /* R2001 (0x7d1) - SLIMTX3MIX Input 1 Volume */ - { 0x000007d2, 0x0000 }, /* R2002 (0x7d2) - SLIMTX3MIX Input 2 Source */ - { 0x000007d3, 0x0080 }, /* R2003 (0x7d3) - SLIMTX3MIX Input 2 Volume */ - { 0x000007d4, 0x0000 }, /* R2004 (0x7d4) - SLIMTX3MIX Input 3 Source */ - { 0x000007d5, 0x0080 }, /* R2005 (0x7d5) - SLIMTX3MIX Input 3 Volume */ - { 0x000007d6, 0x0000 }, /* R2006 (0x7d6) - SLIMTX3MIX Input 4 Source */ - { 0x000007d7, 0x0080 }, /* R2007 (0x7d7) - SLIMTX3MIX Input 4 Volume */ - { 0x000007d8, 0x0000 }, /* R2008 (0x7d8) - SLIMTX4MIX Input 1 Source */ - { 0x000007d9, 0x0080 }, /* R2009 (0x7d9) - SLIMTX4MIX Input 1 Volume */ - { 0x000007da, 0x0000 }, /* R2010 (0x7da) - SLIMTX4MIX Input 2 Source */ - { 0x000007db, 0x0080 }, /* R2011 (0x7db) - SLIMTX4MIX Input 2 Volume */ - { 0x000007dc, 0x0000 }, /* R2012 (0x7dc) - SLIMTX4MIX Input 3 Source */ - { 0x000007dd, 0x0080 }, /* R2013 (0x7dd) - SLIMTX4MIX Input 3 Volume */ - { 0x000007de, 0x0000 }, /* R2014 (0x7de) - SLIMTX4MIX Input 4 Source */ - { 0x000007df, 0x0080 }, /* R2015 (0x7df) - SLIMTX4MIX Input 4 Volume */ - { 0x000007e0, 0x0000 }, /* R2016 (0x7e0) - SLIMTX5MIX Input 1 Source */ - { 0x000007e1, 0x0080 }, /* R2017 (0x7e1) - SLIMTX5MIX Input 1 Volume */ - { 0x000007e2, 0x0000 }, /* R2018 (0x7e2) - SLIMTX5MIX Input 2 Source */ - { 0x000007e3, 0x0080 }, /* R2019 (0x7e3) - SLIMTX5MIX Input 2 Volume */ - { 0x000007e4, 0x0000 }, /* R2020 (0x7e4) - SLIMTX5MIX Input 3 Source */ - { 0x000007e5, 0x0080 }, /* R2021 (0x7e5) - SLIMTX5MIX Input 3 Volume */ - { 0x000007e6, 0x0000 }, /* R2022 (0x7e6) - SLIMTX5MIX Input 4 Source */ - { 0x000007e7, 0x0080 }, /* R2023 (0x7e7) - SLIMTX5MIX Input 4 Volume */ - { 0x000007e8, 0x0000 }, /* R2024 (0x7e8) - SLIMTX6MIX Input 1 Source */ - { 0x000007e9, 0x0080 }, /* R2025 (0x7e9) - SLIMTX6MIX Input 1 Volume */ - { 0x000007ea, 0x0000 }, /* R2026 (0x7ea) - SLIMTX6MIX Input 2 Source */ - { 0x000007eb, 0x0080 }, /* R2027 (0x7eb) - SLIMTX6MIX Input 2 Volume */ - { 0x000007ec, 0x0000 }, /* R2028 (0x7ec) - SLIMTX6MIX Input 3 Source */ - { 0x000007ed, 0x0080 }, /* R2029 (0x7ed) - SLIMTX6MIX Input 3 Volume */ - { 0x000007ee, 0x0000 }, /* R2030 (0x7ee) - SLIMTX6MIX Input 4 Source */ - { 0x000007ef, 0x0080 }, /* R2031 (0x7ef) - SLIMTX6MIX Input 4 Volume */ - { 0x00000800, 0x0000 }, /* R2048 (0x800) - SPDIF1TX1MIX Input 1 Source*/ - { 0x00000801, 0x0080 }, /* R2049 (0x801) - SPDIF1TX1MIX Input 1 Volume*/ - { 0x00000808, 0x0000 }, /* R2056 (0x808) - SPDIF1TX2MIX Input 1 Source*/ - { 0x00000809, 0x0080 }, /* R2057 (0x809) - SPDIF1TX2MIX Input 1 Volume*/ - { 0x00000880, 0x0000 }, /* R2176 (0x880) - EQ1MIX Input 1 Source */ - { 0x00000881, 0x0080 }, /* R2177 (0x881) - EQ1MIX Input 1 Volume */ - { 0x00000882, 0x0000 }, /* R2178 (0x882) - EQ1MIX Input 2 Source */ - { 0x00000883, 0x0080 }, /* R2179 (0x883) - EQ1MIX Input 2 Volume */ - { 0x00000884, 0x0000 }, /* R2180 (0x884) - EQ1MIX Input 3 Source */ - { 0x00000885, 0x0080 }, /* R2181 (0x885) - EQ1MIX Input 3 Volume */ - { 0x00000886, 0x0000 }, /* R2182 (0x886) - EQ1MIX Input 4 Source */ - { 0x00000887, 0x0080 }, /* R2183 (0x887) - EQ1MIX Input 4 Volume */ - { 0x00000888, 0x0000 }, /* R2184 (0x888) - EQ2MIX Input 1 Source */ - { 0x00000889, 0x0080 }, /* R2185 (0x889) - EQ2MIX Input 1 Volume */ - { 0x0000088a, 0x0000 }, /* R2186 (0x88a) - EQ2MIX Input 2 Source */ - { 0x0000088b, 0x0080 }, /* R2187 (0x88b) - EQ2MIX Input 2 Volume */ - { 0x0000088c, 0x0000 }, /* R2188 (0x88c) - EQ2MIX Input 3 Source */ - { 0x0000088d, 0x0080 }, /* R2189 (0x88d) - EQ2MIX Input 3 Volume */ - { 0x0000088e, 0x0000 }, /* R2190 (0x88e) - EQ2MIX Input 4 Source */ - { 0x0000088f, 0x0080 }, /* R2191 (0x88f) - EQ2MIX Input 4 Volume */ - { 0x00000890, 0x0000 }, /* R2192 (0x890) - EQ3MIX Input 1 Source */ - { 0x00000891, 0x0080 }, /* R2193 (0x891) - EQ3MIX Input 1 Volume */ - { 0x00000892, 0x0000 }, /* R2194 (0x892) - EQ3MIX Input 2 Source */ - { 0x00000893, 0x0080 }, /* R2195 (0x893) - EQ3MIX Input 2 Volume */ - { 0x00000894, 0x0000 }, /* R2196 (0x894) - EQ3MIX Input 3 Source */ - { 0x00000895, 0x0080 }, /* R2197 (0x895) - EQ3MIX Input 3 Volume */ - { 0x00000896, 0x0000 }, /* R2198 (0x896) - EQ3MIX Input 4 Source */ - { 0x00000897, 0x0080 }, /* R2199 (0x897) - EQ3MIX Input 4 Volume */ - { 0x00000898, 0x0000 }, /* R2200 (0x898) - EQ4MIX Input 1 Source */ - { 0x00000899, 0x0080 }, /* R2201 (0x899) - EQ4MIX Input 1 Volume */ - { 0x0000089a, 0x0000 }, /* R2202 (0x89a) - EQ4MIX Input 2 Source */ - { 0x0000089b, 0x0080 }, /* R2203 (0x89b) - EQ4MIX Input 2 Volume */ - { 0x0000089c, 0x0000 }, /* R2204 (0x89c) - EQ4MIX Input 3 Source */ - { 0x0000089d, 0x0080 }, /* R2205 (0x89d) - EQ4MIX Input 3 Volume */ - { 0x0000089e, 0x0000 }, /* R2206 (0x89e) - EQ4MIX Input 4 Source */ - { 0x0000089f, 0x0080 }, /* R2207 (0x89f) - EQ4MIX Input 4 Volume */ - { 0x000008c0, 0x0000 }, /* R2240 (0x8c0) - DRC1LMIX Input 1 Source */ - { 0x000008c1, 0x0080 }, /* R2241 (0x8c1) - DRC1LMIX Input 1 Volume */ - { 0x000008c2, 0x0000 }, /* R2242 (0x8c2) - DRC1LMIX Input 2 Source */ - { 0x000008c3, 0x0080 }, /* R2243 (0x8c3) - DRC1LMIX Input 2 Volume */ - { 0x000008c4, 0x0000 }, /* R2244 (0x8c4) - DRC1LMIX Input 3 Source */ - { 0x000008c5, 0x0080 }, /* R2245 (0x8c5) - DRC1LMIX Input 3 Volume */ - { 0x000008c6, 0x0000 }, /* R2246 (0x8c6) - DRC1LMIX Input 4 Source */ - { 0x000008c7, 0x0080 }, /* R2247 (0x8c7) - DRC1LMIX Input 4 Volume */ - { 0x000008c8, 0x0000 }, /* R2248 (0x8c8) - DRC1RMIX Input 1 Source */ - { 0x000008c9, 0x0080 }, /* R2249 (0x8c9) - DRC1RMIX Input 1 Volume */ - { 0x000008ca, 0x0000 }, /* R2250 (0x8ca) - DRC1RMIX Input 2 Source */ - { 0x000008cb, 0x0080 }, /* R2251 (0x8cb) - DRC1RMIX Input 2 Volume */ - { 0x000008cc, 0x0000 }, /* R2252 (0x8cc) - DRC1RMIX Input 3 Source */ - { 0x000008cd, 0x0080 }, /* R2253 (0x8cd) - DRC1RMIX Input 3 Volume */ - { 0x000008ce, 0x0000 }, /* R2254 (0x8ce) - DRC1RMIX Input 4 Source */ - { 0x000008cf, 0x0080 }, /* R2255 (0x8cf) - DRC1RMIX Input 4 Volume */ - { 0x000008d0, 0x0000 }, /* R2256 (0x8d0) - DRC2LMIX Input 1 Source */ - { 0x000008d1, 0x0080 }, /* R2257 (0x8d1) - DRC2LMIX Input 1 Volume */ - { 0x000008d2, 0x0000 }, /* R2258 (0x8d2) - DRC2LMIX Input 2 Source */ - { 0x000008d3, 0x0080 }, /* R2259 (0x8d3) - DRC2LMIX Input 2 Volume */ - { 0x000008d4, 0x0000 }, /* R2260 (0x8d4) - DRC2LMIX Input 3 Source */ - { 0x000008d5, 0x0080 }, /* R2261 (0x8d5) - DRC2LMIX Input 3 Volume */ - { 0x000008d6, 0x0000 }, /* R2262 (0x8d6) - DRC2LMIX Input 4 Source */ - { 0x000008d7, 0x0080 }, /* R2263 (0x8d7) - DRC2LMIX Input 4 Volume */ - { 0x000008d8, 0x0000 }, /* R2264 (0x8d8) - DRC2RMIX Input 1 Source */ - { 0x000008d9, 0x0080 }, /* R2265 (0x8d9) - DRC2RMIX Input 1 Volume */ - { 0x000008da, 0x0000 }, /* R2266 (0x8da) - DRC2RMIX Input 2 Source */ - { 0x000008db, 0x0080 }, /* R2267 (0x8db) - DRC2RMIX Input 2 Volume */ - { 0x000008dc, 0x0000 }, /* R2268 (0x8dc) - DRC2RMIX Input 3 Source */ - { 0x000008dd, 0x0080 }, /* R2269 (0x8dd) - DRC2RMIX Input 3 Volume */ - { 0x000008de, 0x0000 }, /* R2270 (0x8de) - DRC2RMIX Input 4 Source */ - { 0x000008df, 0x0080 }, /* R2271 (0x8df) - DRC2RMIX Input 4 Volume */ - { 0x00000900, 0x0000 }, /* R2304 (0x900) - HPLP1MIX Input 1 Source */ - { 0x00000901, 0x0080 }, /* R2305 (0x901) - HPLP1MIX Input 1 Volume */ - { 0x00000902, 0x0000 }, /* R2306 (0x902) - HPLP1MIX Input 2 Source */ - { 0x00000903, 0x0080 }, /* R2307 (0x903) - HPLP1MIX Input 2 Volume */ - { 0x00000904, 0x0000 }, /* R2308 (0x904) - HPLP1MIX Input 3 Source */ - { 0x00000905, 0x0080 }, /* R2309 (0x905) - HPLP1MIX Input 3 Volume */ - { 0x00000906, 0x0000 }, /* R2310 (0x906) - HPLP1MIX Input 4 Source */ - { 0x00000907, 0x0080 }, /* R2311 (0x907) - HPLP1MIX Input 4 Volume */ - { 0x00000908, 0x0000 }, /* R2312 (0x908) - HPLP2MIX Input 1 Source */ - { 0x00000909, 0x0080 }, /* R2313 (0x909) - HPLP2MIX Input 1 Volume */ - { 0x0000090a, 0x0000 }, /* R2314 (0x90a) - HPLP2MIX Input 2 Source */ - { 0x0000090b, 0x0080 }, /* R2315 (0x90b) - HPLP2MIX Input 2 Volume */ - { 0x0000090c, 0x0000 }, /* R2316 (0x90c) - HPLP2MIX Input 3 Source */ - { 0x0000090d, 0x0080 }, /* R2317 (0x90d) - HPLP2MIX Input 3 Volume */ - { 0x0000090e, 0x0000 }, /* R2318 (0x90e) - HPLP2MIX Input 4 Source */ - { 0x0000090f, 0x0080 }, /* R2319 (0x90f) - HPLP2MIX Input 4 Volume */ - { 0x00000910, 0x0000 }, /* R2320 (0x910) - HPLP3MIX Input 1 Source */ - { 0x00000911, 0x0080 }, /* R2321 (0x911) - HPLP3MIX Input 1 Volume */ - { 0x00000912, 0x0000 }, /* R2322 (0x912) - HPLP3MIX Input 2 Source */ - { 0x00000913, 0x0080 }, /* R2323 (0x913) - HPLP3MIX Input 2 Volume */ - { 0x00000914, 0x0000 }, /* R2324 (0x914) - HPLP3MIX Input 3 Source */ - { 0x00000915, 0x0080 }, /* R2325 (0x915) - HPLP3MIX Input 3 Volume */ - { 0x00000916, 0x0000 }, /* R2326 (0x916) - HPLP3MIX Input 4 Source */ - { 0x00000917, 0x0080 }, /* R2327 (0x917) - HPLP3MIX Input 4 Volume */ - { 0x00000918, 0x0000 }, /* R2328 (0x918) - HPLP4MIX Input 1 Source */ - { 0x00000919, 0x0080 }, /* R2329 (0x919) - HPLP4MIX Input 1 Volume */ - { 0x0000091a, 0x0000 }, /* R2330 (0x91a) - HPLP4MIX Input 2 Source */ - { 0x0000091b, 0x0080 }, /* R2331 (0x91b) - HPLP4MIX Input 2 Volume */ - { 0x0000091c, 0x0000 }, /* R2332 (0x91c) - HPLP4MIX Input 3 Source */ - { 0x0000091d, 0x0080 }, /* R2333 (0x91d) - HPLP4MIX Input 3 Volume */ - { 0x0000091e, 0x0000 }, /* R2334 (0x91e) - HPLP4MIX Input 4 Source */ - { 0x0000091f, 0x0080 }, /* R2335 (0x91f) - HPLP4MIX Input 4 Volume */ - { 0x00000940, 0x0000 }, /* R2368 (0x940) - DSP1LMIX Input 1 Source */ - { 0x00000941, 0x0080 }, /* R2369 (0x941) - DSP1LMIX Input 1 Volume */ - { 0x00000942, 0x0000 }, /* R2370 (0x942) - DSP1LMIX Input 2 Source */ - { 0x00000943, 0x0080 }, /* R2371 (0x943) - DSP1LMIX Input 2 Volume */ - { 0x00000944, 0x0000 }, /* R2372 (0x944) - DSP1LMIX Input 3 Source */ - { 0x00000945, 0x0080 }, /* R2373 (0x945) - DSP1LMIX Input 3 Volume */ - { 0x00000946, 0x0000 }, /* R2374 (0x946) - DSP1LMIX Input 4 Source */ - { 0x00000947, 0x0080 }, /* R2375 (0x947) - DSP1LMIX Input 4 Volume */ - { 0x00000948, 0x0000 }, /* R2376 (0x948) - DSP1RMIX Input 1 Source */ - { 0x00000949, 0x0080 }, /* R2377 (0x949) - DSP1RMIX Input 1 Volume */ - { 0x0000094a, 0x0000 }, /* R2378 (0x94a) - DSP1RMIX Input 2 Source */ - { 0x0000094b, 0x0080 }, /* R2379 (0x94b) - DSP1RMIX Input 2 Volume */ - { 0x0000094c, 0x0000 }, /* R2380 (0x94c) - DSP1RMIX Input 3 Source */ - { 0x0000094d, 0x0080 }, /* R2381 (0x94d) - DSP1RMIX Input 3 Volume */ - { 0x0000094e, 0x0000 }, /* R2382 (0x94e) - DSP1RMIX Input 4 Source */ - { 0x0000094f, 0x0080 }, /* R2383 (0x94f) - DSP1RMIX Input 4 Volume */ - { 0x00000950, 0x0000 }, /* R2384 (0x950) - DSP1AUX1MIX Input 1 Source */ - { 0x00000958, 0x0000 }, /* R2392 (0x958) - DSP1AUX2MIX Input 1 Source */ - { 0x00000960, 0x0000 }, /* R2400 (0x960) - DSP1AUX3MIX Input 1 Source */ - { 0x00000968, 0x0000 }, /* R2408 (0x968) - DSP1AUX4MIX Input 1 Source */ - { 0x00000970, 0x0000 }, /* R2416 (0x970) - DSP1AUX5MIX Input 1 Source */ - { 0x00000978, 0x0000 }, /* R2424 (0x978) - DSP1AUX6MIX Input 1 Source */ - { 0x00000980, 0x0000 }, /* R2432 (0x980) - DSP2LMIX Input 1 Source */ - { 0x00000981, 0x0080 }, /* R2433 (0x981) - DSP2LMIX Input 1 Volume */ - { 0x00000982, 0x0000 }, /* R2434 (0x982) - DSP2LMIX Input 2 Source */ - { 0x00000983, 0x0080 }, /* R2435 (0x983) - DSP2LMIX Input 2 Volume */ - { 0x00000984, 0x0000 }, /* R2436 (0x984) - DSP2LMIX Input 3 Source */ - { 0x00000985, 0x0080 }, /* R2437 (0x985) - DSP2LMIX Input 3 Volume */ - { 0x00000986, 0x0000 }, /* R2438 (0x986) - DSP2LMIX Input 4 Source */ - { 0x00000987, 0x0080 }, /* R2439 (0x987) - DSP2LMIX Input 4 Volume */ - { 0x00000988, 0x0000 }, /* R2440 (0x988) - DSP2RMIX Input 1 Source */ - { 0x00000989, 0x0080 }, /* R2441 (0x989) - DSP2RMIX Input 1 Volume */ - { 0x0000098a, 0x0000 }, /* R2442 (0x98a) - DSP2RMIX Input 2 Source */ - { 0x0000098b, 0x0080 }, /* R2443 (0x98b) - DSP2RMIX Input 2 Volume */ - { 0x0000098c, 0x0000 }, /* R2444 (0x98c) - DSP2RMIX Input 3 Source */ - { 0x0000098d, 0x0080 }, /* R2445 (0x98d) - DSP2RMIX Input 3 Volume */ - { 0x0000098e, 0x0000 }, /* R2446 (0x98e) - DSP2RMIX Input 4 Source */ - { 0x0000098f, 0x0080 }, /* R2447 (0x98f) - DSP2RMIX Input 4 Volume */ - { 0x00000990, 0x0000 }, /* R2448 (0x990) - DSP2AUX1MIX Input 1 Source */ - { 0x00000998, 0x0000 }, /* R2456 (0x998) - DSP2AUX2MIX Input 1 Source */ - { 0x000009a0, 0x0000 }, /* R2464 (0x9a0) - DSP2AUX3MIX Input 1 Source */ - { 0x000009a8, 0x0000 }, /* R2472 (0x9a8) - DSP2AUX4MIX Input 1 Source */ - { 0x000009b0, 0x0000 }, /* R2480 (0x9b0) - DSP2AUX5MIX Input 1 Source */ - { 0x000009b8, 0x0000 }, /* R2488 (0x9b8) - DSP2AUX6MIX Input 1 Source */ - { 0x000009c0, 0x0000 }, /* R2496 (0x9c0) - DSP3LMIX Input 1 Source */ - { 0x000009c1, 0x0080 }, /* R2497 (0x9c1) - DSP3LMIX Input 1 Volume */ - { 0x000009c2, 0x0000 }, /* R2498 (0x9c2) - DSP3LMIX Input 2 Source */ - { 0x000009c3, 0x0080 }, /* R2499 (0x9c3) - DSP3LMIX Input 2 Volume */ - { 0x000009c4, 0x0000 }, /* R2500 (0x9c4) - DSP3LMIX Input 3 Source */ - { 0x000009c5, 0x0080 }, /* R2501 (0x9c5) - DSP3LMIX Input 3 Volume */ - { 0x000009c6, 0x0000 }, /* R2502 (0x9c6) - DSP3LMIX Input 4 Source */ - { 0x000009c7, 0x0080 }, /* R2503 (0x9c7) - DSP3LMIX Input 4 Volume */ - { 0x000009c8, 0x0000 }, /* R2504 (0x9c8) - DSP3RMIX Input 1 Source */ - { 0x000009c9, 0x0080 }, /* R2505 (0x9c9) - DSP3RMIX Input 1 Volume */ - { 0x000009ca, 0x0000 }, /* R2506 (0x9ca) - DSP3RMIX Input 2 Source */ - { 0x000009cb, 0x0080 }, /* R2507 (0x9cb) - DSP3RMIX Input 2 Volume */ - { 0x000009cc, 0x0000 }, /* R2508 (0x9cc) - DSP3RMIX Input 3 Source */ - { 0x000009cd, 0x0080 }, /* R2509 (0x9cd) - DSP3RMIX Input 3 Volume */ - { 0x000009ce, 0x0000 }, /* R2510 (0x9ce) - DSP3RMIX Input 4 Source */ - { 0x000009cf, 0x0080 }, /* R2511 (0x9cf) - DSP3RMIX Input 4 Volume */ - { 0x000009d0, 0x0000 }, /* R2512 (0x9d0) - DSP3AUX1MIX Input 1 Source */ - { 0x000009d8, 0x0000 }, /* R2520 (0x9d8) - DSP3AUX2MIX Input 1 Source */ - { 0x000009e0, 0x0000 }, /* R2528 (0x9e0) - DSP3AUX3MIX Input 1 Source */ - { 0x000009e8, 0x0000 }, /* R2536 (0x9e8) - DSP3AUX4MIX Input 1 Source */ - { 0x000009f0, 0x0000 }, /* R2544 (0x9f0) - DSP3AUX5MIX Input 1 Source */ - { 0x000009f8, 0x0000 }, /* R2552 (0x9f8) - DSP3AUX6MIX Input 1 Source */ - { 0x00000b00, 0x0000 }, /* R2816 (0xb00) - ISRC1DEC1MIX Input 1 Source*/ - { 0x00000b08, 0x0000 }, /* R2824 (0xb08) - ISRC1DEC2MIX Input 1 Source*/ - { 0x00000b10, 0x0000 }, /* R2832 (0xb10) - ISRC1DEC3MIX Input 1 Source*/ - { 0x00000b18, 0x0000 }, /* R2840 (0xb18) - ISRC1DEC4MIX Input 1 Source*/ - { 0x00000b20, 0x0000 }, /* R2848 (0xb20) - ISRC1INT1MIX Input 1 Source*/ - { 0x00000b28, 0x0000 }, /* R2856 (0xb28) - ISRC1INT2MIX Input 1 Source*/ - { 0x00000b30, 0x0000 }, /* R2864 (0xb30) - ISRC1INT3MIX Input 1 Source*/ - { 0x00000b38, 0x0000 }, /* R2872 (0xb38) - ISRC1INT4MIX Input 1 Source*/ - { 0x00000b40, 0x0000 }, /* R2880 (0xb40) - ISRC2DEC1MIX Input 1 Source*/ - { 0x00000b48, 0x0000 }, /* R2888 (0xb48) - ISRC2DEC2MIX Input 1 Source*/ - { 0x00000b50, 0x0000 }, /* R2896 (0xb50) - ISRC2DEC3MIX Input 1 Source*/ - { 0x00000b58, 0x0000 }, /* R2904 (0xb58) - ISRC2DEC4MIX Input 1 Source*/ - { 0x00000b60, 0x0000 }, /* R2912 (0xb60) - ISRC2INT1MIX Input 1 Source*/ - { 0x00000b68, 0x0000 }, /* R2920 (0xb68) - ISRC2INT2MIX Input 1 Source*/ - { 0x00000b70, 0x0000 }, /* R2928 (0xb70) - ISRC2INT3MIX Input 1 Source*/ - { 0x00000b78, 0x0000 }, /* R2936 (0xb78) - ISRC2INT4MIX Input 1 Source*/ - { 0x00000e00, 0x0000 }, /* R3584 (0xe00) - FX Ctrl1 */ - { 0x00000e10, 0x6318 }, /* R3600 (0xe10) - EQ1_1 */ - { 0x00000e11, 0x6300 }, /* R3601 (0xe11) - EQ1_2 */ - { 0x00000e12, 0x0fc8 }, /* R3602 (0xe12) - EQ1_3 */ - { 0x00000e13, 0x03fe }, /* R3603 (0xe13) - EQ1_4 */ - { 0x00000e14, 0x00e0 }, /* R3604 (0xe14) - EQ1_5 */ - { 0x00000e15, 0x1ec4 }, /* R3605 (0xe15) - EQ1_6 */ - { 0x00000e16, 0xf136 }, /* R3606 (0xe16) - EQ1_7 */ - { 0x00000e17, 0x0409 }, /* R3607 (0xe17) - EQ1_8 */ - { 0x00000e18, 0x04cc }, /* R3608 (0xe18) - EQ1_9 */ - { 0x00000e19, 0x1c9b }, /* R3609 (0xe19) - EQ1_10 */ - { 0x00000e1a, 0xf337 }, /* R3610 (0xe1a) - EQ1_11 */ - { 0x00000e1b, 0x040b }, /* R3611 (0xe1b) - EQ1_12 */ - { 0x00000e1c, 0x0cbb }, /* R3612 (0xe1c) - EQ1_13 */ - { 0x00000e1d, 0x16f8 }, /* R3613 (0xe1d) - EQ1_14 */ - { 0x00000e1e, 0xf7d9 }, /* R3614 (0xe1e) - EQ1_15 */ - { 0x00000e1f, 0x040a }, /* R3615 (0xe1f) - EQ1_16 */ - { 0x00000e20, 0x1f14 }, /* R3616 (0xe20) - EQ1_17 */ - { 0x00000e21, 0x058c }, /* R3617 (0xe21) - EQ1_18 */ - { 0x00000e22, 0x0563 }, /* R3618 (0xe22) - EQ1_19 */ - { 0x00000e23, 0x4000 }, /* R3619 (0xe23) - EQ1_20 */ - { 0x00000e24, 0x0b75 }, /* R3620 (0xe24) - EQ1_21 */ - { 0x00000e26, 0x6318 }, /* R3622 (0xe26) - EQ2_1 */ - { 0x00000e27, 0x6300 }, /* R3623 (0xe27) - EQ2_2 */ - { 0x00000e28, 0x0fc8 }, /* R3624 (0xe28) - EQ2_3 */ - { 0x00000e29, 0x03fe }, /* R3625 (0xe29) - EQ2_4 */ - { 0x00000e2a, 0x00e0 }, /* R3626 (0xe2a) - EQ2_5 */ - { 0x00000e2b, 0x1ec4 }, /* R3627 (0xe2b) - EQ2_6 */ - { 0x00000e2c, 0xf136 }, /* R3628 (0xe2c) - EQ2_7 */ - { 0x00000e2d, 0x0409 }, /* R3629 (0xe2d) - EQ2_8 */ - { 0x00000e2e, 0x04cc }, /* R3630 (0xe2e) - EQ2_9 */ - { 0x00000e2f, 0x1c9b }, /* R3631 (0xe2f) - EQ2_10 */ - { 0x00000e30, 0xf337 }, /* R3632 (0xe30) - EQ2_11 */ - { 0x00000e31, 0x040b }, /* R3633 (0xe31) - EQ2_12 */ - { 0x00000e32, 0x0cbb }, /* R3634 (0xe32) - EQ2_13 */ - { 0x00000e33, 0x16f8 }, /* R3635 (0xe33) - EQ2_14 */ - { 0x00000e34, 0xf7d9 }, /* R3636 (0xe34) - EQ2_15 */ - { 0x00000e35, 0x040a }, /* R3637 (0xe35) - EQ2_16 */ - { 0x00000e36, 0x1f14 }, /* R3638 (0xe36) - EQ2_17 */ - { 0x00000e37, 0x058c }, /* R3639 (0xe37) - EQ2_18 */ - { 0x00000e38, 0x0563 }, /* R3640 (0xe38) - EQ2_19 */ - { 0x00000e39, 0x4000 }, /* R3641 (0xe39) - EQ2_20 */ - { 0x00000e3a, 0x0b75 }, /* R3642 (0xe3a) - EQ2_21 */ - { 0x00000e3c, 0x6318 }, /* R3644 (0xe3c) - EQ3_1 */ - { 0x00000e3d, 0x6300 }, /* R3645 (0xe3d) - EQ3_2 */ - { 0x00000e3e, 0x0fc8 }, /* R3646 (0xe3e) - EQ3_3 */ - { 0x00000e3f, 0x03fe }, /* R3647 (0xe3f) - EQ3_4 */ - { 0x00000e40, 0x00e0 }, /* R3648 (0xe40) - EQ3_5 */ - { 0x00000e41, 0x1ec4 }, /* R3649 (0xe41) - EQ3_6 */ - { 0x00000e42, 0xf136 }, /* R3650 (0xe42) - EQ3_7 */ - { 0x00000e43, 0x0409 }, /* R3651 (0xe43) - EQ3_8 */ - { 0x00000e44, 0x04cc }, /* R3652 (0xe44) - EQ3_9 */ - { 0x00000e45, 0x1c9b }, /* R3653 (0xe45) - EQ3_10 */ - { 0x00000e46, 0xf337 }, /* R3654 (0xe46) - EQ3_11 */ - { 0x00000e47, 0x040b }, /* R3655 (0xe47) - EQ3_12 */ - { 0x00000e48, 0x0cbb }, /* R3656 (0xe48) - EQ3_13 */ - { 0x00000e49, 0x16f8 }, /* R3657 (0xe49) - EQ3_14 */ - { 0x00000e4a, 0xf7d9 }, /* R3658 (0xe4a) - EQ3_15 */ - { 0x00000e4b, 0x040a }, /* R3659 (0xe4b) - EQ3_16 */ - { 0x00000e4c, 0x1f14 }, /* R3660 (0xe4c) - EQ3_17 */ - { 0x00000e4d, 0x058c }, /* R3661 (0xe4d) - EQ3_18 */ - { 0x00000e4e, 0x0563 }, /* R3662 (0xe4e) - EQ3_19 */ - { 0x00000e4f, 0x4000 }, /* R3663 (0xe4f) - EQ3_20 */ - { 0x00000e50, 0x0b75 }, /* R3664 (0xe50) - EQ3_21 */ - { 0x00000e52, 0x6318 }, /* R3666 (0xe52) - EQ4_1 */ - { 0x00000e53, 0x6300 }, /* R3667 (0xe53) - EQ4_2 */ - { 0x00000e54, 0x0fc8 }, /* R3668 (0xe54) - EQ4_3 */ - { 0x00000e55, 0x03fe }, /* R3669 (0xe55) - EQ4_4 */ - { 0x00000e56, 0x00e0 }, /* R3670 (0xe56) - EQ4_5 */ - { 0x00000e57, 0x1ec4 }, /* R3671 (0xe57) - EQ4_6 */ - { 0x00000e58, 0xf136 }, /* R3672 (0xe58) - EQ4_7 */ - { 0x00000e59, 0x0409 }, /* R3673 (0xe59) - EQ4_8 */ - { 0x00000e5a, 0x04cc }, /* R3674 (0xe5a) - EQ4_9 */ - { 0x00000e5b, 0x1c9b }, /* R3675 (0xe5b) - EQ4_10 */ - { 0x00000e5c, 0xf337 }, /* R3676 (0xe5c) - EQ4_11 */ - { 0x00000e5d, 0x040b }, /* R3677 (0xe5d) - EQ4_12 */ - { 0x00000e5e, 0x0cbb }, /* R3678 (0xe5e) - EQ4_13 */ - { 0x00000e5f, 0x16f8 }, /* R3679 (0xe5f) - EQ4_14 */ - { 0x00000e60, 0xf7d9 }, /* R3680 (0xe60) - EQ4_15 */ - { 0x00000e61, 0x040a }, /* R3681 (0xe61) - EQ4_16 */ - { 0x00000e62, 0x1f14 }, /* R3682 (0xe62) - EQ4_17 */ - { 0x00000e63, 0x058c }, /* R3683 (0xe63) - EQ4_18 */ - { 0x00000e64, 0x0563 }, /* R3684 (0xe64) - EQ4_19 */ - { 0x00000e65, 0x4000 }, /* R3685 (0xe65) - EQ4_20 */ - { 0x00000e66, 0x0b75 }, /* R3686 (0xe66) - EQ4_21 */ - { 0x00000e80, 0x0018 }, /* R3712 (0xe80) - DRC1 ctrl1 */ - { 0x00000e81, 0x0933 }, /* R3713 (0xe81) - DRC1 ctrl2 */ - { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */ - { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */ - { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */ - { 0x00000e88, 0x0018 }, /* R3720 (0xe88) - DRC2 ctrl1 */ - { 0x00000e89, 0x0933 }, /* R3721 (0xe89) - DRC2 ctrl2 */ - { 0x00000e8a, 0x0018 }, /* R3722 (0xe8a) - DRC2 ctrl3 */ - { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */ - { 0x00000e8c, 0x0000 }, /* R3724 (0xe8c) - DRC2 ctrl5 */ - { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */ - { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */ - { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */ - { 0x00000ec5, 0x0000 }, /* R3781 (0xec5) - HPLPF2_2 */ - { 0x00000ec8, 0x0000 }, /* R3784 (0xec8) - HPLPF3_1 */ - { 0x00000ec9, 0x0000 }, /* R3785 (0xec9) - HPLPF3_2 */ - { 0x00000ecc, 0x0000 }, /* R3788 (0xecc) - HPLPF4_1 */ - { 0x00000ecd, 0x0000 }, /* R3789 (0xecd) - HPLPF4_2 */ - { 0x00000ef0, 0x0000 }, /* R3824 (0xef0) - ISRC 1 CTRL 1 */ - { 0x00000ef1, 0x0001 }, /* R3825 (0xef1) - ISRC 1 CTRL 2 */ - { 0x00000ef2, 0x0000 }, /* R3826 (0xef2) - ISRC 1 CTRL 3 */ - { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */ - { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */ - { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */ - { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */ - { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */ - { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */ - { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */ - { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */ - { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */ - { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */ - { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */ - { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */ - { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */ - { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 4L 1 */ - { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 4L 2 */ - { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 4L 3 */ - { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 4L 4 */ - { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 5L 1 */ - { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 5L 2 */ - { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 5L 3 */ - { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 5L 4 */ - { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 5R 1 */ - { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 5R 2 */ - { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 5R 3 */ - { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 5R 4 */ - { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */ - { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */ - { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */ - { 0x00001703, 0xf000 }, /* R5891 (0x1703) - GPIO2 Control 2 */ - { 0x00001704, 0x2001 }, /* R5892 (0x1704) - GPIO3 Control 1 */ - { 0x00001705, 0xf000 }, /* R5893 (0x1705) - GPIO3 Control 2 */ - { 0x00001706, 0x2001 }, /* R5894 (0x1706) - GPIO4 Control 1 */ - { 0x00001707, 0xf000 }, /* R5895 (0x1707) - GPIO4 Control 2 */ - { 0x00001708, 0x2001 }, /* R5896 (0x1708) - GPIO5 Control 1 */ - { 0x00001709, 0xf000 }, /* R5897 (0x1709) - GPIO5 Control 2 */ - { 0x0000170a, 0x2001 }, /* R5898 (0x170a) - GPIO6 Control 1 */ - { 0x0000170b, 0xf000 }, /* R5899 (0x170b) - GPIO6 Control 2 */ - { 0x0000170c, 0x2001 }, /* R5900 (0x170c) - GPIO7 Control 1 */ - { 0x0000170d, 0xf000 }, /* R5901 (0x170d) - GPIO7 Control 2 */ - { 0x0000170e, 0x2001 }, /* R5902 (0x170e) - GPIO8 Control 1 */ - { 0x0000170f, 0xf000 }, /* R5903 (0x170f) - GPIO8 Control 2 */ - { 0x00001710, 0x2001 }, /* R5904 (0x1710) - GPIO9 Control 1 */ - { 0x00001711, 0xf000 }, /* R5905 (0x1711) - GPIO9 Control 2 */ - { 0x00001712, 0x2001 }, /* R5906 (0x1712) - GPIO10 Control 1 */ - { 0x00001713, 0xf000 }, /* R5907 (0x1713) - GPIO10 Control 2 */ - { 0x00001714, 0x2001 }, /* R5908 (0x1714) - GPIO11 Control 1 */ - { 0x00001715, 0xf000 }, /* R5909 (0x1715) - GPIO11 Control 2 */ - { 0x00001716, 0x2001 }, /* R5910 (0x1716) - GPIO12 Control 1 */ - { 0x00001717, 0xf000 }, /* R5911 (0x1717) - GPIO12 Control 2 */ - { 0x00001718, 0x2001 }, /* R5912 (0x1718) - GPIO13 Control 1 */ - { 0x00001719, 0xf000 }, /* R5913 (0x1719) - GPIO13 Control 2 */ - { 0x0000171A, 0x2001 }, /* R5914 (0x171A) - GPIO14 Control 1 */ - { 0x0000171B, 0xf000 }, /* R5915 (0x171B) - GPIO14 Control 2 */ - { 0x0000171C, 0x2001 }, /* R5916 (0x171C) - GPIO15 Control 1 */ - { 0x0000171D, 0xf000 }, /* R5917 (0x171D) - GPIO15 Control 2 */ - { 0x0000171E, 0x2001 }, /* R5918 (0x171E) - GPIO16 Control 1 */ - { 0x0000171F, 0xf000 }, /* R5919 (0x171F) - GPIO16 Control 2 */ - { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ - { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ - { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */ - { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */ - { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */ - { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */ - { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */ - { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */ - { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */ - { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */ - { 0x0000184a, 0xffff }, /* R6218 (0x184a) - IRQ1 Mask 11 */ - { 0x0000184b, 0xffff }, /* R6219 (0x184b) - IRQ1 Mask 12 */ - { 0x0000184c, 0xffff }, /* R6220 (0x184c) - IRQ1 Mask 13 */ - { 0x0000184d, 0xffff }, /* R6221 (0x184d) - IRQ1 Mask 14 */ - { 0x0000184e, 0xffff }, /* R6222 (0x184e) - IRQ1 Mask 15 */ - { 0x0000184f, 0xffff }, /* R6222 (0x184f) - IRQ1 Mask 16 */ - { 0x00001850, 0xffff }, /* R6222 (0x1850) - IRQ1 Mask 17 */ - { 0x00001851, 0xffff }, /* R6222 (0x1851) - IRQ1 Mask 18 */ - { 0x00001852, 0xffff }, /* R6222 (0x1852) - IRQ1 Mask 19 */ - { 0x00001853, 0xffff }, /* R6222 (0x1853) - IRQ1 Mask 20 */ - { 0x00001854, 0xffff }, /* R6222 (0x1854) - IRQ1 Mask 21 */ - { 0x00001855, 0xffff }, /* R6222 (0x1855) - IRQ1 Mask 22 */ - { 0x00001856, 0xffff }, /* R6222 (0x1856) - IRQ1 Mask 23 */ - { 0x00001857, 0xffff }, /* R6222 (0x1857) - IRQ1 Mask 24 */ - { 0x00001858, 0xffff }, /* R6222 (0x1858) - IRQ1 Mask 25 */ - { 0x00001859, 0xffff }, /* R6222 (0x1859) - IRQ1 Mask 26 */ - { 0x0000185a, 0xffff }, /* R6222 (0x185a) - IRQ1 Mask 27 */ - { 0x0000185b, 0xffff }, /* R6222 (0x185b) - IRQ1 Mask 28 */ - { 0x0000185c, 0xffff }, /* R6222 (0x185c) - IRQ1 Mask 29 */ - { 0x0000185d, 0xffff }, /* R6222 (0x185d) - IRQ1 Mask 30 */ - { 0x0000185e, 0xffff }, /* R6222 (0x185e) - IRQ1 Mask 31 */ - { 0x0000185f, 0xffff }, /* R6222 (0x185f) - IRQ1 Mask 32 */ - { 0x00001948, 0xffff }, /* R6472 (0x1948) - IRQ2 Mask 9 */ - { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */ - { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 CTRL */ -}; - -static bool cs47l35_is_adsp_memory(unsigned int reg) -{ - switch (reg) { - case 0x080000 ... 0x085ffe: - case 0x0a0000 ... 0x0a7ffe: - case 0x0c0000 ... 0x0c1ffe: - case 0x0e0000 ... 0x0e1ffe: - case 0x100000 ... 0x10effe: - case 0x120000 ... 0x12bffe: - case 0x136000 ... 0x137ffe: - case 0x140000 ... 0x14bffe: - case 0x160000 ... 0x161ffe: - case 0x180000 ... 0x18effe: - case 0x1a0000 ... 0x1b1ffe: - case 0x1b6000 ... 0x1b7ffe: - case 0x1c0000 ... 0x1cbffe: - case 0x1e0000 ... 0x1e1ffe: - return true; - default: - return false; - } -} - -static bool cs47l35_16bit_readable_register(struct device *dev, - unsigned int reg) -{ - switch (reg) { - case MADERA_SOFTWARE_RESET: - case MADERA_HARDWARE_REVISION: - case MADERA_CTRL_IF_CFG_1: - case MADERA_CTRL_IF_CFG_2: - case MADERA_WRITE_SEQUENCER_CTRL_0: - case MADERA_WRITE_SEQUENCER_CTRL_1: - case MADERA_WRITE_SEQUENCER_CTRL_2: - case MADERA_TONE_GENERATOR_1: - case MADERA_TONE_GENERATOR_2: - case MADERA_TONE_GENERATOR_3: - case MADERA_TONE_GENERATOR_4: - case MADERA_TONE_GENERATOR_5: - case MADERA_PWM_DRIVE_1: - case MADERA_PWM_DRIVE_2: - case MADERA_PWM_DRIVE_3: - case MADERA_SEQUENCE_CONTROL: - case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1: - case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2: - case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3: - case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4: - case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: - case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: - case MADERA_HAPTICS_CONTROL_1: - case MADERA_HAPTICS_CONTROL_2: - case MADERA_HAPTICS_PHASE_1_INTENSITY: - case MADERA_HAPTICS_PHASE_1_DURATION: - case MADERA_HAPTICS_PHASE_2_INTENSITY: - case MADERA_HAPTICS_PHASE_2_DURATION: - case MADERA_HAPTICS_PHASE_3_INTENSITY: - case MADERA_HAPTICS_PHASE_3_DURATION: - case MADERA_HAPTICS_STATUS: - case MADERA_COMFORT_NOISE_GENERATOR: - case MADERA_CLOCK_32K_1: - case MADERA_SYSTEM_CLOCK_1: - case MADERA_SAMPLE_RATE_1: - case MADERA_SAMPLE_RATE_2: - case MADERA_SAMPLE_RATE_3: - case MADERA_SAMPLE_RATE_1_STATUS: - case MADERA_SAMPLE_RATE_2_STATUS: - case MADERA_SAMPLE_RATE_3_STATUS: - case MADERA_DSP_CLOCK_1: - case MADERA_DSP_CLOCK_2: - case MADERA_OUTPUT_SYSTEM_CLOCK: - case MADERA_OUTPUT_ASYNC_CLOCK: - case MADERA_RATE_ESTIMATOR_1: - case MADERA_RATE_ESTIMATOR_2: - case MADERA_RATE_ESTIMATOR_3: - case MADERA_RATE_ESTIMATOR_4: - case MADERA_RATE_ESTIMATOR_5: - case MADERA_FLL1_CONTROL_1: - case MADERA_FLL1_CONTROL_2: - case MADERA_FLL1_CONTROL_3: - case MADERA_FLL1_CONTROL_4: - case MADERA_FLL1_CONTROL_5: - case MADERA_FLL1_CONTROL_6: - case MADERA_FLL1_CONTROL_7: - case MADERA_FLL1_LOOP_FILTER_TEST_1: - case MADERA_FLL1_NCO_TEST_0: - case CS47L35_FLL1_SYNCHRONISER_1: - case CS47L35_FLL1_SYNCHRONISER_2: - case CS47L35_FLL1_SYNCHRONISER_3: - case CS47L35_FLL1_SYNCHRONISER_4: - case CS47L35_FLL1_SYNCHRONISER_5: - case CS47L35_FLL1_SYNCHRONISER_6: - case CS47L35_FLL1_SYNCHRONISER_7: - case CS47L35_FLL1_SPREAD_SPECTRUM: - case CS47L35_FLL1_GPIO_CLOCK: - case MADERA_MIC_CHARGE_PUMP_1: - case MADERA_HP_CHARGE_PUMP_8: - case MADERA_LDO2_CONTROL_1: - case MADERA_MIC_BIAS_CTRL_1: - case MADERA_MIC_BIAS_CTRL_2: - case MADERA_MIC_BIAS_CTRL_5: - case MADERA_MIC_BIAS_CTRL_6: - case MADERA_HP_CTRL_1L: - case MADERA_HP_CTRL_1R: - case MADERA_DCS_HP1L_CONTROL: - case MADERA_DCS_HP1R_CONTROL: - case MADERA_EDRE_HP_STEREO_CONTROL: - case MADERA_ACCESSORY_DETECT_MODE_1: - case MADERA_HEADPHONE_DETECT_1: - case MADERA_HEADPHONE_DETECT_2: - case MADERA_HEADPHONE_DETECT_3: - case MADERA_HEADPHONE_DETECT_5: - case MADERA_MICD_CLAMP_CONTROL: - case MADERA_MIC_DETECT_1_CONTROL_1: - case MADERA_MIC_DETECT_1_CONTROL_2: - case MADERA_MIC_DETECT_1_CONTROL_3: - case MADERA_MIC_DETECT_1_LEVEL_1: - case MADERA_MIC_DETECT_1_LEVEL_2: - case MADERA_MIC_DETECT_1_LEVEL_3: - case MADERA_MIC_DETECT_1_LEVEL_4: - case MADERA_MIC_DETECT_1_CONTROL_4: - case MADERA_GP_SWITCH_1: - case MADERA_JACK_DETECT_ANALOGUE: - case MADERA_INPUT_ENABLES: - case MADERA_INPUT_ENABLES_STATUS: - case MADERA_INPUT_RATE: - case MADERA_INPUT_VOLUME_RAMP: - case MADERA_HPF_CONTROL: - case MADERA_IN1L_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_1L: - case MADERA_DMIC1L_CONTROL: - case MADERA_IN1R_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_1R: - case MADERA_DMIC1R_CONTROL: - case MADERA_IN2L_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_2L: - case MADERA_DMIC2L_CONTROL: - case MADERA_IN2R_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_2R: - case MADERA_DMIC2R_CONTROL: - case MADERA_OUTPUT_ENABLES_1: - case MADERA_OUTPUT_STATUS_1: - case MADERA_RAW_OUTPUT_STATUS_1: - case MADERA_OUTPUT_RATE_1: - case MADERA_OUTPUT_VOLUME_RAMP: - case MADERA_OUTPUT_PATH_CONFIG_1L: - case MADERA_DAC_DIGITAL_VOLUME_1L: - case MADERA_NOISE_GATE_SELECT_1L: - case MADERA_OUTPUT_PATH_CONFIG_1R: - case MADERA_DAC_DIGITAL_VOLUME_1R: - case MADERA_NOISE_GATE_SELECT_1R: - case MADERA_OUTPUT_PATH_CONFIG_4L: - case MADERA_DAC_DIGITAL_VOLUME_4L: - case MADERA_NOISE_GATE_SELECT_4L: - case MADERA_OUTPUT_PATH_CONFIG_5L: - case MADERA_DAC_DIGITAL_VOLUME_5L: - case MADERA_NOISE_GATE_SELECT_5L: - case MADERA_OUTPUT_PATH_CONFIG_5R: - case MADERA_DAC_DIGITAL_VOLUME_5R: - case MADERA_NOISE_GATE_SELECT_5R: - case MADERA_DRE_ENABLE: - case MADERA_EDRE_ENABLE: - case MADERA_EDRE_MANUAL: - case MADERA_DAC_AEC_CONTROL_1: - case MADERA_NOISE_GATE_CONTROL: - case MADERA_PDM_SPK1_CTRL_1: - case MADERA_PDM_SPK1_CTRL_2: - case MADERA_HP1_SHORT_CIRCUIT_CTRL: - case MADERA_HP_TEST_CTRL_5: - case MADERA_HP_TEST_CTRL_6: - case MADERA_AIF1_BCLK_CTRL: - case MADERA_AIF1_TX_PIN_CTRL: - case MADERA_AIF1_RX_PIN_CTRL: - case MADERA_AIF1_RATE_CTRL: - case MADERA_AIF1_FORMAT: - case MADERA_AIF1_TX_BCLK_RATE: - case MADERA_AIF1_RX_BCLK_RATE: - case MADERA_AIF1_FRAME_CTRL_1: - case MADERA_AIF1_FRAME_CTRL_2: - case MADERA_AIF1_FRAME_CTRL_3: - case MADERA_AIF1_FRAME_CTRL_4: - case MADERA_AIF1_FRAME_CTRL_5: - case MADERA_AIF1_FRAME_CTRL_6: - case MADERA_AIF1_FRAME_CTRL_7: - case MADERA_AIF1_FRAME_CTRL_8: - case MADERA_AIF1_FRAME_CTRL_11: - case MADERA_AIF1_FRAME_CTRL_12: - case MADERA_AIF1_FRAME_CTRL_13: - case MADERA_AIF1_FRAME_CTRL_14: - case MADERA_AIF1_FRAME_CTRL_15: - case MADERA_AIF1_FRAME_CTRL_16: - case MADERA_AIF1_TX_ENABLES: - case MADERA_AIF1_RX_ENABLES: - case MADERA_AIF2_BCLK_CTRL: - case MADERA_AIF2_TX_PIN_CTRL: - case MADERA_AIF2_RX_PIN_CTRL: - case MADERA_AIF2_RATE_CTRL: - case MADERA_AIF2_FORMAT: - case MADERA_AIF2_TX_BCLK_RATE: - case MADERA_AIF2_RX_BCLK_RATE: - case MADERA_AIF2_FRAME_CTRL_1: - case MADERA_AIF2_FRAME_CTRL_2: - case MADERA_AIF2_FRAME_CTRL_3: - case MADERA_AIF2_FRAME_CTRL_4: - case MADERA_AIF2_FRAME_CTRL_11: - case MADERA_AIF2_FRAME_CTRL_12: - case MADERA_AIF2_TX_ENABLES: - case MADERA_AIF2_RX_ENABLES: - case MADERA_AIF3_BCLK_CTRL: - case MADERA_AIF3_TX_PIN_CTRL: - case MADERA_AIF3_RX_PIN_CTRL: - case MADERA_AIF3_RATE_CTRL: - case MADERA_AIF3_FORMAT: - case MADERA_AIF3_TX_BCLK_RATE: - case MADERA_AIF3_RX_BCLK_RATE: - case MADERA_AIF3_FRAME_CTRL_1: - case MADERA_AIF3_FRAME_CTRL_2: - case MADERA_AIF3_FRAME_CTRL_3: - case MADERA_AIF3_FRAME_CTRL_4: - case MADERA_AIF3_FRAME_CTRL_11: - case MADERA_AIF3_FRAME_CTRL_12: - case MADERA_AIF3_TX_ENABLES: - case MADERA_AIF3_RX_ENABLES: - case MADERA_SPD1_TX_CONTROL: - case MADERA_SPD1_TX_CHANNEL_STATUS_1: - case MADERA_SPD1_TX_CHANNEL_STATUS_2: - case MADERA_SPD1_TX_CHANNEL_STATUS_3: - case MADERA_SLIMBUS_FRAMER_REF_GEAR: - case MADERA_SLIMBUS_RATES_1: - case MADERA_SLIMBUS_RATES_2: - case MADERA_SLIMBUS_RATES_3: - case MADERA_SLIMBUS_RATES_5: - case MADERA_SLIMBUS_RATES_6: - case MADERA_SLIMBUS_RATES_7: - case MADERA_SLIMBUS_RX_CHANNEL_ENABLE: - case MADERA_SLIMBUS_TX_CHANNEL_ENABLE: - case MADERA_SLIMBUS_RX_PORT_STATUS: - case MADERA_SLIMBUS_TX_PORT_STATUS: - case MADERA_PWM1MIX_INPUT_1_SOURCE: - case MADERA_PWM1MIX_INPUT_1_VOLUME: - case MADERA_PWM1MIX_INPUT_2_SOURCE: - case MADERA_PWM1MIX_INPUT_2_VOLUME: - case MADERA_PWM1MIX_INPUT_3_SOURCE: - case MADERA_PWM1MIX_INPUT_3_VOLUME: - case MADERA_PWM1MIX_INPUT_4_SOURCE: - case MADERA_PWM1MIX_INPUT_4_VOLUME: - case MADERA_PWM2MIX_INPUT_1_SOURCE: - case MADERA_PWM2MIX_INPUT_1_VOLUME: - case MADERA_PWM2MIX_INPUT_2_SOURCE: - case MADERA_PWM2MIX_INPUT_2_VOLUME: - case MADERA_PWM2MIX_INPUT_3_SOURCE: - case MADERA_PWM2MIX_INPUT_3_VOLUME: - case MADERA_PWM2MIX_INPUT_4_SOURCE: - case MADERA_PWM2MIX_INPUT_4_VOLUME: - case MADERA_OUT1LMIX_INPUT_1_SOURCE: - case MADERA_OUT1LMIX_INPUT_1_VOLUME: - case MADERA_OUT1LMIX_INPUT_2_SOURCE: - case MADERA_OUT1LMIX_INPUT_2_VOLUME: - case MADERA_OUT1LMIX_INPUT_3_SOURCE: - case MADERA_OUT1LMIX_INPUT_3_VOLUME: - case MADERA_OUT1LMIX_INPUT_4_SOURCE: - case MADERA_OUT1LMIX_INPUT_4_VOLUME: - case MADERA_OUT1RMIX_INPUT_1_SOURCE: - case MADERA_OUT1RMIX_INPUT_1_VOLUME: - case MADERA_OUT1RMIX_INPUT_2_SOURCE: - case MADERA_OUT1RMIX_INPUT_2_VOLUME: - case MADERA_OUT1RMIX_INPUT_3_SOURCE: - case MADERA_OUT1RMIX_INPUT_3_VOLUME: - case MADERA_OUT1RMIX_INPUT_4_SOURCE: - case MADERA_OUT1RMIX_INPUT_4_VOLUME: - case MADERA_OUT4LMIX_INPUT_1_SOURCE: - case MADERA_OUT4LMIX_INPUT_1_VOLUME: - case MADERA_OUT4LMIX_INPUT_2_SOURCE: - case MADERA_OUT4LMIX_INPUT_2_VOLUME: - case MADERA_OUT4LMIX_INPUT_3_SOURCE: - case MADERA_OUT4LMIX_INPUT_3_VOLUME: - case MADERA_OUT4LMIX_INPUT_4_SOURCE: - case MADERA_OUT4LMIX_INPUT_4_VOLUME: - case MADERA_OUT5LMIX_INPUT_1_SOURCE: - case MADERA_OUT5LMIX_INPUT_1_VOLUME: - case MADERA_OUT5LMIX_INPUT_2_SOURCE: - case MADERA_OUT5LMIX_INPUT_2_VOLUME: - case MADERA_OUT5LMIX_INPUT_3_SOURCE: - case MADERA_OUT5LMIX_INPUT_3_VOLUME: - case MADERA_OUT5LMIX_INPUT_4_SOURCE: - case MADERA_OUT5LMIX_INPUT_4_VOLUME: - case MADERA_OUT5RMIX_INPUT_1_SOURCE: - case MADERA_OUT5RMIX_INPUT_1_VOLUME: - case MADERA_OUT5RMIX_INPUT_2_SOURCE: - case MADERA_OUT5RMIX_INPUT_2_VOLUME: - case MADERA_OUT5RMIX_INPUT_3_SOURCE: - case MADERA_OUT5RMIX_INPUT_3_VOLUME: - case MADERA_OUT5RMIX_INPUT_4_SOURCE: - case MADERA_OUT5RMIX_INPUT_4_VOLUME: - case MADERA_AIF1TX1MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX1MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX1MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX1MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX1MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX1MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX1MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX1MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX2MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX2MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX2MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX2MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX2MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX2MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX2MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX2MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX3MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX3MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX3MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX3MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX3MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX3MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX3MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX3MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX4MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX4MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX4MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX4MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX4MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX4MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX4MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX4MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX5MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX5MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX5MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX5MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX5MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX5MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX5MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX5MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX6MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX6MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX6MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX6MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX6MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX6MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX6MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX6MIX_INPUT_4_VOLUME: - case MADERA_AIF2TX1MIX_INPUT_1_SOURCE: - case MADERA_AIF2TX1MIX_INPUT_1_VOLUME: - case MADERA_AIF2TX1MIX_INPUT_2_SOURCE: - case MADERA_AIF2TX1MIX_INPUT_2_VOLUME: - case MADERA_AIF2TX1MIX_INPUT_3_SOURCE: - case MADERA_AIF2TX1MIX_INPUT_3_VOLUME: - case MADERA_AIF2TX1MIX_INPUT_4_SOURCE: - case MADERA_AIF2TX1MIX_INPUT_4_VOLUME: - case MADERA_AIF2TX2MIX_INPUT_1_SOURCE: - case MADERA_AIF2TX2MIX_INPUT_1_VOLUME: - case MADERA_AIF2TX2MIX_INPUT_2_SOURCE: - case MADERA_AIF2TX2MIX_INPUT_2_VOLUME: - case MADERA_AIF2TX2MIX_INPUT_3_SOURCE: - case MADERA_AIF2TX2MIX_INPUT_3_VOLUME: - case MADERA_AIF2TX2MIX_INPUT_4_SOURCE: - case MADERA_AIF2TX2MIX_INPUT_4_VOLUME: - case MADERA_AIF3TX1MIX_INPUT_1_SOURCE: - case MADERA_AIF3TX1MIX_INPUT_1_VOLUME: - case MADERA_AIF3TX1MIX_INPUT_2_SOURCE: - case MADERA_AIF3TX1MIX_INPUT_2_VOLUME: - case MADERA_AIF3TX1MIX_INPUT_3_SOURCE: - case MADERA_AIF3TX1MIX_INPUT_3_VOLUME: - case MADERA_AIF3TX1MIX_INPUT_4_SOURCE: - case MADERA_AIF3TX1MIX_INPUT_4_VOLUME: - case MADERA_AIF3TX2MIX_INPUT_1_SOURCE: - case MADERA_AIF3TX2MIX_INPUT_1_VOLUME: - case MADERA_AIF3TX2MIX_INPUT_2_SOURCE: - case MADERA_AIF3TX2MIX_INPUT_2_VOLUME: - case MADERA_AIF3TX2MIX_INPUT_3_SOURCE: - case MADERA_AIF3TX2MIX_INPUT_3_VOLUME: - case MADERA_AIF3TX2MIX_INPUT_4_SOURCE: - case MADERA_AIF3TX2MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX1MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX1MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX1MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX1MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX1MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX1MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX1MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX1MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX2MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX2MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX2MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX2MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX2MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX2MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX2MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX2MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX3MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX3MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX3MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX3MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX3MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX3MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX3MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX3MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX4MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX4MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX4MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX4MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX4MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX4MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX4MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX4MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX5MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX5MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX5MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX5MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX5MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX5MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX5MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX5MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX6MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX6MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX6MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX6MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX6MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX6MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX6MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX6MIX_INPUT_4_VOLUME: - case MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE: - case MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME: - case MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE: - case MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME: - case MADERA_EQ1MIX_INPUT_1_SOURCE: - case MADERA_EQ1MIX_INPUT_1_VOLUME: - case MADERA_EQ1MIX_INPUT_2_SOURCE: - case MADERA_EQ1MIX_INPUT_2_VOLUME: - case MADERA_EQ1MIX_INPUT_3_SOURCE: - case MADERA_EQ1MIX_INPUT_3_VOLUME: - case MADERA_EQ1MIX_INPUT_4_SOURCE: - case MADERA_EQ1MIX_INPUT_4_VOLUME: - case MADERA_EQ2MIX_INPUT_1_SOURCE: - case MADERA_EQ2MIX_INPUT_1_VOLUME: - case MADERA_EQ2MIX_INPUT_2_SOURCE: - case MADERA_EQ2MIX_INPUT_2_VOLUME: - case MADERA_EQ2MIX_INPUT_3_SOURCE: - case MADERA_EQ2MIX_INPUT_3_VOLUME: - case MADERA_EQ2MIX_INPUT_4_SOURCE: - case MADERA_EQ2MIX_INPUT_4_VOLUME: - case MADERA_EQ3MIX_INPUT_1_SOURCE: - case MADERA_EQ3MIX_INPUT_1_VOLUME: - case MADERA_EQ3MIX_INPUT_2_SOURCE: - case MADERA_EQ3MIX_INPUT_2_VOLUME: - case MADERA_EQ3MIX_INPUT_3_SOURCE: - case MADERA_EQ3MIX_INPUT_3_VOLUME: - case MADERA_EQ3MIX_INPUT_4_SOURCE: - case MADERA_EQ3MIX_INPUT_4_VOLUME: - case MADERA_EQ4MIX_INPUT_1_SOURCE: - case MADERA_EQ4MIX_INPUT_1_VOLUME: - case MADERA_EQ4MIX_INPUT_2_SOURCE: - case MADERA_EQ4MIX_INPUT_2_VOLUME: - case MADERA_EQ4MIX_INPUT_3_SOURCE: - case MADERA_EQ4MIX_INPUT_3_VOLUME: - case MADERA_EQ4MIX_INPUT_4_SOURCE: - case MADERA_EQ4MIX_INPUT_4_VOLUME: - case MADERA_DRC1LMIX_INPUT_1_SOURCE: - case MADERA_DRC1LMIX_INPUT_1_VOLUME: - case MADERA_DRC1LMIX_INPUT_2_SOURCE: - case MADERA_DRC1LMIX_INPUT_2_VOLUME: - case MADERA_DRC1LMIX_INPUT_3_SOURCE: - case MADERA_DRC1LMIX_INPUT_3_VOLUME: - case MADERA_DRC1LMIX_INPUT_4_SOURCE: - case MADERA_DRC1LMIX_INPUT_4_VOLUME: - case MADERA_DRC1RMIX_INPUT_1_SOURCE: - case MADERA_DRC1RMIX_INPUT_1_VOLUME: - case MADERA_DRC1RMIX_INPUT_2_SOURCE: - case MADERA_DRC1RMIX_INPUT_2_VOLUME: - case MADERA_DRC1RMIX_INPUT_3_SOURCE: - case MADERA_DRC1RMIX_INPUT_3_VOLUME: - case MADERA_DRC1RMIX_INPUT_4_SOURCE: - case MADERA_DRC1RMIX_INPUT_4_VOLUME: - case MADERA_DRC2LMIX_INPUT_1_SOURCE: - case MADERA_DRC2LMIX_INPUT_1_VOLUME: - case MADERA_DRC2LMIX_INPUT_2_SOURCE: - case MADERA_DRC2LMIX_INPUT_2_VOLUME: - case MADERA_DRC2LMIX_INPUT_3_SOURCE: - case MADERA_DRC2LMIX_INPUT_3_VOLUME: - case MADERA_DRC2LMIX_INPUT_4_SOURCE: - case MADERA_DRC2LMIX_INPUT_4_VOLUME: - case MADERA_DRC2RMIX_INPUT_1_SOURCE: - case MADERA_DRC2RMIX_INPUT_1_VOLUME: - case MADERA_DRC2RMIX_INPUT_2_SOURCE: - case MADERA_DRC2RMIX_INPUT_2_VOLUME: - case MADERA_DRC2RMIX_INPUT_3_SOURCE: - case MADERA_DRC2RMIX_INPUT_3_VOLUME: - case MADERA_DRC2RMIX_INPUT_4_SOURCE: - case MADERA_DRC2RMIX_INPUT_4_VOLUME: - case MADERA_HPLP1MIX_INPUT_1_SOURCE: - case MADERA_HPLP1MIX_INPUT_1_VOLUME: - case MADERA_HPLP1MIX_INPUT_2_SOURCE: - case MADERA_HPLP1MIX_INPUT_2_VOLUME: - case MADERA_HPLP1MIX_INPUT_3_SOURCE: - case MADERA_HPLP1MIX_INPUT_3_VOLUME: - case MADERA_HPLP1MIX_INPUT_4_SOURCE: - case MADERA_HPLP1MIX_INPUT_4_VOLUME: - case MADERA_HPLP2MIX_INPUT_1_SOURCE: - case MADERA_HPLP2MIX_INPUT_1_VOLUME: - case MADERA_HPLP2MIX_INPUT_2_SOURCE: - case MADERA_HPLP2MIX_INPUT_2_VOLUME: - case MADERA_HPLP2MIX_INPUT_3_SOURCE: - case MADERA_HPLP2MIX_INPUT_3_VOLUME: - case MADERA_HPLP2MIX_INPUT_4_SOURCE: - case MADERA_HPLP2MIX_INPUT_4_VOLUME: - case MADERA_HPLP3MIX_INPUT_1_SOURCE: - case MADERA_HPLP3MIX_INPUT_1_VOLUME: - case MADERA_HPLP3MIX_INPUT_2_SOURCE: - case MADERA_HPLP3MIX_INPUT_2_VOLUME: - case MADERA_HPLP3MIX_INPUT_3_SOURCE: - case MADERA_HPLP3MIX_INPUT_3_VOLUME: - case MADERA_HPLP3MIX_INPUT_4_SOURCE: - case MADERA_HPLP3MIX_INPUT_4_VOLUME: - case MADERA_HPLP4MIX_INPUT_1_SOURCE: - case MADERA_HPLP4MIX_INPUT_1_VOLUME: - case MADERA_HPLP4MIX_INPUT_2_SOURCE: - case MADERA_HPLP4MIX_INPUT_2_VOLUME: - case MADERA_HPLP4MIX_INPUT_3_SOURCE: - case MADERA_HPLP4MIX_INPUT_3_VOLUME: - case MADERA_HPLP4MIX_INPUT_4_SOURCE: - case MADERA_HPLP4MIX_INPUT_4_VOLUME: - case MADERA_DSP1LMIX_INPUT_1_SOURCE: - case MADERA_DSP1LMIX_INPUT_1_VOLUME: - case MADERA_DSP1LMIX_INPUT_2_SOURCE: - case MADERA_DSP1LMIX_INPUT_2_VOLUME: - case MADERA_DSP1LMIX_INPUT_3_SOURCE: - case MADERA_DSP1LMIX_INPUT_3_VOLUME: - case MADERA_DSP1LMIX_INPUT_4_SOURCE: - case MADERA_DSP1LMIX_INPUT_4_VOLUME: - case MADERA_DSP1RMIX_INPUT_1_SOURCE: - case MADERA_DSP1RMIX_INPUT_1_VOLUME: - case MADERA_DSP1RMIX_INPUT_2_SOURCE: - case MADERA_DSP1RMIX_INPUT_2_VOLUME: - case MADERA_DSP1RMIX_INPUT_3_SOURCE: - case MADERA_DSP1RMIX_INPUT_3_VOLUME: - case MADERA_DSP1RMIX_INPUT_4_SOURCE: - case MADERA_DSP1RMIX_INPUT_4_VOLUME: - case MADERA_DSP1AUX1MIX_INPUT_1_SOURCE: - case MADERA_DSP1AUX2MIX_INPUT_1_SOURCE: - case MADERA_DSP1AUX3MIX_INPUT_1_SOURCE: - case MADERA_DSP1AUX4MIX_INPUT_1_SOURCE: - case MADERA_DSP1AUX5MIX_INPUT_1_SOURCE: - case MADERA_DSP1AUX6MIX_INPUT_1_SOURCE: - case MADERA_DSP2LMIX_INPUT_1_SOURCE: - case MADERA_DSP2LMIX_INPUT_1_VOLUME: - case MADERA_DSP2LMIX_INPUT_2_SOURCE: - case MADERA_DSP2LMIX_INPUT_2_VOLUME: - case MADERA_DSP2LMIX_INPUT_3_SOURCE: - case MADERA_DSP2LMIX_INPUT_3_VOLUME: - case MADERA_DSP2LMIX_INPUT_4_SOURCE: - case MADERA_DSP2LMIX_INPUT_4_VOLUME: - case MADERA_DSP2RMIX_INPUT_1_SOURCE: - case MADERA_DSP2RMIX_INPUT_1_VOLUME: - case MADERA_DSP2RMIX_INPUT_2_SOURCE: - case MADERA_DSP2RMIX_INPUT_2_VOLUME: - case MADERA_DSP2RMIX_INPUT_3_SOURCE: - case MADERA_DSP2RMIX_INPUT_3_VOLUME: - case MADERA_DSP2RMIX_INPUT_4_SOURCE: - case MADERA_DSP2RMIX_INPUT_4_VOLUME: - case MADERA_DSP2AUX1MIX_INPUT_1_SOURCE: - case MADERA_DSP2AUX2MIX_INPUT_1_SOURCE: - case MADERA_DSP2AUX3MIX_INPUT_1_SOURCE: - case MADERA_DSP2AUX4MIX_INPUT_1_SOURCE: - case MADERA_DSP2AUX5MIX_INPUT_1_SOURCE: - case MADERA_DSP2AUX6MIX_INPUT_1_SOURCE: - case MADERA_DSP3LMIX_INPUT_1_SOURCE: - case MADERA_DSP3LMIX_INPUT_1_VOLUME: - case MADERA_DSP3LMIX_INPUT_2_SOURCE: - case MADERA_DSP3LMIX_INPUT_2_VOLUME: - case MADERA_DSP3LMIX_INPUT_3_SOURCE: - case MADERA_DSP3LMIX_INPUT_3_VOLUME: - case MADERA_DSP3LMIX_INPUT_4_SOURCE: - case MADERA_DSP3LMIX_INPUT_4_VOLUME: - case MADERA_DSP3RMIX_INPUT_1_SOURCE: - case MADERA_DSP3RMIX_INPUT_1_VOLUME: - case MADERA_DSP3RMIX_INPUT_2_SOURCE: - case MADERA_DSP3RMIX_INPUT_2_VOLUME: - case MADERA_DSP3RMIX_INPUT_3_SOURCE: - case MADERA_DSP3RMIX_INPUT_3_VOLUME: - case MADERA_DSP3RMIX_INPUT_4_SOURCE: - case MADERA_DSP3RMIX_INPUT_4_VOLUME: - case MADERA_DSP3AUX1MIX_INPUT_1_SOURCE: - case MADERA_DSP3AUX2MIX_INPUT_1_SOURCE: - case MADERA_DSP3AUX3MIX_INPUT_1_SOURCE: - case MADERA_DSP3AUX4MIX_INPUT_1_SOURCE: - case MADERA_DSP3AUX5MIX_INPUT_1_SOURCE: - case MADERA_DSP3AUX6MIX_INPUT_1_SOURCE: - case MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE: - case MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE: - case MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE: - case MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE: - case MADERA_ISRC1INT1MIX_INPUT_1_SOURCE: - case MADERA_ISRC1INT2MIX_INPUT_1_SOURCE: - case MADERA_ISRC1INT3MIX_INPUT_1_SOURCE: - case MADERA_ISRC1INT4MIX_INPUT_1_SOURCE: - case MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE: - case MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE: - case MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE: - case MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE: - case MADERA_ISRC2INT1MIX_INPUT_1_SOURCE: - case MADERA_ISRC2INT2MIX_INPUT_1_SOURCE: - case MADERA_ISRC2INT3MIX_INPUT_1_SOURCE: - case MADERA_ISRC2INT4MIX_INPUT_1_SOURCE: - case MADERA_FX_CTRL1: - case MADERA_FX_CTRL2: - case MADERA_EQ1_1: - case MADERA_EQ1_2: - case MADERA_EQ1_3: - case MADERA_EQ1_4: - case MADERA_EQ1_5: - case MADERA_EQ1_6: - case MADERA_EQ1_7: - case MADERA_EQ1_8: - case MADERA_EQ1_9: - case MADERA_EQ1_10: - case MADERA_EQ1_11: - case MADERA_EQ1_12: - case MADERA_EQ1_13: - case MADERA_EQ1_14: - case MADERA_EQ1_15: - case MADERA_EQ1_16: - case MADERA_EQ1_17: - case MADERA_EQ1_18: - case MADERA_EQ1_19: - case MADERA_EQ1_20: - case MADERA_EQ1_21: - case MADERA_EQ2_1: - case MADERA_EQ2_2: - case MADERA_EQ2_3: - case MADERA_EQ2_4: - case MADERA_EQ2_5: - case MADERA_EQ2_6: - case MADERA_EQ2_7: - case MADERA_EQ2_8: - case MADERA_EQ2_9: - case MADERA_EQ2_10: - case MADERA_EQ2_11: - case MADERA_EQ2_12: - case MADERA_EQ2_13: - case MADERA_EQ2_14: - case MADERA_EQ2_15: - case MADERA_EQ2_16: - case MADERA_EQ2_17: - case MADERA_EQ2_18: - case MADERA_EQ2_19: - case MADERA_EQ2_20: - case MADERA_EQ2_21: - case MADERA_EQ3_1: - case MADERA_EQ3_2: - case MADERA_EQ3_3: - case MADERA_EQ3_4: - case MADERA_EQ3_5: - case MADERA_EQ3_6: - case MADERA_EQ3_7: - case MADERA_EQ3_8: - case MADERA_EQ3_9: - case MADERA_EQ3_10: - case MADERA_EQ3_11: - case MADERA_EQ3_12: - case MADERA_EQ3_13: - case MADERA_EQ3_14: - case MADERA_EQ3_15: - case MADERA_EQ3_16: - case MADERA_EQ3_17: - case MADERA_EQ3_18: - case MADERA_EQ3_19: - case MADERA_EQ3_20: - case MADERA_EQ3_21: - case MADERA_EQ4_1: - case MADERA_EQ4_2: - case MADERA_EQ4_3: - case MADERA_EQ4_4: - case MADERA_EQ4_5: - case MADERA_EQ4_6: - case MADERA_EQ4_7: - case MADERA_EQ4_8: - case MADERA_EQ4_9: - case MADERA_EQ4_10: - case MADERA_EQ4_11: - case MADERA_EQ4_12: - case MADERA_EQ4_13: - case MADERA_EQ4_14: - case MADERA_EQ4_15: - case MADERA_EQ4_16: - case MADERA_EQ4_17: - case MADERA_EQ4_18: - case MADERA_EQ4_19: - case MADERA_EQ4_20: - case MADERA_EQ4_21: - case MADERA_DRC1_CTRL1: - case MADERA_DRC1_CTRL2: - case MADERA_DRC1_CTRL3: - case MADERA_DRC1_CTRL4: - case MADERA_DRC1_CTRL5: - case MADERA_DRC2_CTRL1: - case MADERA_DRC2_CTRL2: - case MADERA_DRC2_CTRL3: - case MADERA_DRC2_CTRL4: - case MADERA_DRC2_CTRL5: - case MADERA_HPLPF1_1: - case MADERA_HPLPF1_2: - case MADERA_HPLPF2_1: - case MADERA_HPLPF2_2: - case MADERA_HPLPF3_1: - case MADERA_HPLPF3_2: - case MADERA_HPLPF4_1: - case MADERA_HPLPF4_2: - case MADERA_ISRC_1_CTRL_1: - case MADERA_ISRC_1_CTRL_2: - case MADERA_ISRC_1_CTRL_3: - case MADERA_ISRC_2_CTRL_1: - case MADERA_ISRC_2_CTRL_2: - case MADERA_ISRC_2_CTRL_3: - case MADERA_DAC_COMP_1: - case MADERA_DAC_COMP_2: - case MADERA_FRF_COEFFICIENT_1L_1: - case MADERA_FRF_COEFFICIENT_1L_2: - case MADERA_FRF_COEFFICIENT_1L_3: - case MADERA_FRF_COEFFICIENT_1L_4: - case MADERA_FRF_COEFFICIENT_1R_1: - case MADERA_FRF_COEFFICIENT_1R_2: - case MADERA_FRF_COEFFICIENT_1R_3: - case MADERA_FRF_COEFFICIENT_1R_4: - case CS47L35_FRF_COEFFICIENT_4L_1: - case CS47L35_FRF_COEFFICIENT_4L_2: - case CS47L35_FRF_COEFFICIENT_4L_3: - case CS47L35_FRF_COEFFICIENT_4L_4: - case CS47L35_FRF_COEFFICIENT_5L_1: - case CS47L35_FRF_COEFFICIENT_5L_2: - case CS47L35_FRF_COEFFICIENT_5L_3: - case CS47L35_FRF_COEFFICIENT_5L_4: - case CS47L35_FRF_COEFFICIENT_5R_1: - case CS47L35_FRF_COEFFICIENT_5R_2: - case CS47L35_FRF_COEFFICIENT_5R_3: - case CS47L35_FRF_COEFFICIENT_5R_4: - case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO16_CTRL_2: - case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_32: - case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_32: - case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_32: - case MADERA_IRQ2_STATUS_9: - case MADERA_IRQ2_MASK_9: - case MADERA_IRQ2_RAW_STATUS_9: - case MADERA_INTERRUPT_DEBOUNCE_7: - case MADERA_IRQ1_CTRL: - return true; - default: - return false; - } -} - -static bool cs47l35_16bit_volatile_register(struct device *dev, - unsigned int reg) -{ - switch (reg) { - case MADERA_SOFTWARE_RESET: - case MADERA_HARDWARE_REVISION: - case MADERA_HAPTICS_STATUS: - case MADERA_SAMPLE_RATE_1_STATUS: - case MADERA_SAMPLE_RATE_2_STATUS: - case MADERA_SAMPLE_RATE_3_STATUS: - case MADERA_HP_CTRL_1L: - case MADERA_HP_CTRL_1R: - case MADERA_DCS_HP1L_CONTROL: - case MADERA_DCS_HP1R_CONTROL: - case MADERA_MIC_DETECT_1_CONTROL_3: - case MADERA_MIC_DETECT_1_CONTROL_4: - case MADERA_HEADPHONE_DETECT_2: - case MADERA_HEADPHONE_DETECT_3: - case MADERA_HEADPHONE_DETECT_5: - case MADERA_INPUT_ENABLES_STATUS: - case MADERA_OUTPUT_STATUS_1: - case MADERA_RAW_OUTPUT_STATUS_1: - case MADERA_SPD1_TX_CHANNEL_STATUS_1: - case MADERA_SPD1_TX_CHANNEL_STATUS_2: - case MADERA_SPD1_TX_CHANNEL_STATUS_3: - case MADERA_SLIMBUS_RX_PORT_STATUS: - case MADERA_SLIMBUS_TX_PORT_STATUS: - case MADERA_FX_CTRL2: - case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_32: - case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_32: - case MADERA_IRQ2_STATUS_9: - case MADERA_IRQ2_RAW_STATUS_9: - return true; - default: - return false; - } -} - -static bool cs47l35_32bit_readable_register(struct device *dev, - unsigned int reg) -{ - switch (reg) { - case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_252: - case CS47L35_OTP_HPDET_CAL_1 ... CS47L35_OTP_HPDET_CAL_2: - case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_SCRATCH_2: - case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_SCRATCH_2: - case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_SCRATCH_2: - return true; - default: - return cs47l35_is_adsp_memory(reg); - } -} - -static bool cs47l35_32bit_volatile_register(struct device *dev, - unsigned int reg) -{ - switch (reg) { - case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_252: - case CS47L35_OTP_HPDET_CAL_1 ... CS47L35_OTP_HPDET_CAL_2: - case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_SCRATCH_2: - case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_SCRATCH_2: - case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_SCRATCH_2: - return true; - default: - return cs47l35_is_adsp_memory(reg); - } -} - -const struct regmap_config cs47l35_16bit_spi_regmap = { - .name = "cs47l35_16bit", - .reg_bits = 32, - .pad_bits = 16, - .val_bits = 16, - - .max_register = 0x1b00, - .readable_reg = cs47l35_16bit_readable_register, - .volatile_reg = cs47l35_16bit_volatile_register, - - .cache_type = REGCACHE_RBTREE, - .reg_defaults = cs47l35_reg_default, - .num_reg_defaults = ARRAY_SIZE(cs47l35_reg_default), -}; -EXPORT_SYMBOL_GPL(cs47l35_16bit_spi_regmap); - -const struct regmap_config cs47l35_16bit_i2c_regmap = { - .name = "cs47l35_16bit", - .reg_bits = 32, - .val_bits = 16, - - .max_register = 0x1b00, - .readable_reg = cs47l35_16bit_readable_register, - .volatile_reg = cs47l35_16bit_volatile_register, - - .cache_type = REGCACHE_RBTREE, - .reg_defaults = cs47l35_reg_default, - .num_reg_defaults = ARRAY_SIZE(cs47l35_reg_default), -}; -EXPORT_SYMBOL_GPL(cs47l35_16bit_i2c_regmap); - -const struct regmap_config cs47l35_32bit_spi_regmap = { - .name = "cs47l35_32bit", - .reg_bits = 32, - .reg_stride = 2, - .pad_bits = 16, - .val_bits = 32, - - .max_register = MADERA_DSP3_SCRATCH_2, - .readable_reg = cs47l35_32bit_readable_register, - .volatile_reg = cs47l35_32bit_volatile_register, - - .cache_type = REGCACHE_RBTREE, -}; -EXPORT_SYMBOL_GPL(cs47l35_32bit_spi_regmap); - -const struct regmap_config cs47l35_32bit_i2c_regmap = { - .name = "cs47l35_32bit", - .reg_bits = 32, - .reg_stride = 2, - .val_bits = 32, - - .max_register = MADERA_DSP3_SCRATCH_2, - .readable_reg = cs47l35_32bit_readable_register, - .volatile_reg = cs47l35_32bit_volatile_register, - - .cache_type = REGCACHE_RBTREE, -}; -EXPORT_SYMBOL_GPL(cs47l35_32bit_i2c_regmap); diff --git a/drivers/mfd/cs47l90-tables.c b/drivers/mfd/cs47l90-tables.c deleted file mode 100644 index 4b5ad894fa24..000000000000 --- a/drivers/mfd/cs47l90-tables.c +++ /dev/null @@ -1,2843 +0,0 @@ -/* - * Data tables for CS47L90 codec - * - * Copyright 2015-2016 Cirrus Logic - * - * Author: Nikesh Oswal - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include - -#include -#include -#include - -#include "madera.h" - -static const struct reg_sequence cs47l90_reva_16_patch[] = { - { 0x8A, 0x5555 }, - { 0x8A, 0xAAAA }, - { 0x4CF, 0x0700 }, - { 0x171, 0x0003 }, - { 0x101, 0x0444 }, - { 0x159, 0x0002 }, - { 0x120, 0x0444 }, - { 0x1D1, 0x0004 }, - { 0x1E0, 0xC084 }, - { 0x159, 0x0000 }, - { 0x120, 0x0404 }, - { 0x101, 0x0404 }, - { 0x171, 0x0002 }, - { 0x17A, 0x2906 }, - { 0x19A, 0x2906 }, - { 0x441, 0xC750 }, - { 0x340, 0x0001 }, - { 0x112, 0x0405 }, - { 0x124, 0x0C49 }, - { 0x1300, 0x050E }, - { 0x1302, 0x0101 }, - { 0x1380, 0x0425 }, - { 0x1381, 0xF6D8 }, - { 0x1382, 0x0632 }, - { 0x1383, 0xFEC8 }, - { 0x1390, 0x042F }, - { 0x1391, 0xF6CA }, - { 0x1392, 0x0637 }, - { 0x1393, 0xFEC8 }, - { 0x281, 0x0000 }, - { 0x282, 0x0000 }, - { 0x4EA, 0x0100 }, - { 0x8A, 0xCCCC }, - { 0x8A, 0x3333 }, -}; - -int cs47l90_patch(struct madera *madera) -{ - int ret; - - ret = regmap_register_patch(madera->regmap, - cs47l90_reva_16_patch, - ARRAY_SIZE(cs47l90_reva_16_patch)); - if (ret < 0) { - dev_err(madera->dev, - "Error in applying 16-bit patch: %d\n", ret); - return ret; - } - - return 0; -} -EXPORT_SYMBOL_GPL(cs47l90_patch); - -static const struct reg_default cs47l90_reg_default[] = { - { 0x00000008, 0x0308 }, /* R8 - Ctrl IF CFG 1 */ - { 0x00000009, 0x0200 }, /* R9 - Ctrl IF CFG 2 */ - { 0x0000000A, 0x0308 }, /* R10 - Ctrl IF CFG 3 */ - { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ - { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ - { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ - { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */ - { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */ - { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */ - { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */ - { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */ - { 0x00000041, 0x0000 }, /* R65 (0x41) - Sequence control */ - { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */ - { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ - { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ - { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4 */ - { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence Select 1 */ - { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence Select 2 */ - { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ - { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ - { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */ - { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */ - { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */ - { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */ - { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */ - { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */ - { 0x000000A0, 0x0000 }, /* R160 (0xA0) - Clearwater Comfort Noise Generator */ - { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */ - { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ - { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */ - { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */ - { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */ - { 0x00000112, 0x0405 }, /* R274 (0x112) - Async clock 1 */ - { 0x00000113, 0x0011 }, /* R275 (0x113) - Async sample rate 1 */ - { 0x00000114, 0x0011 }, /* R276 (0x114) - Async sample rate 2 */ - { 0x00000120, 0x0404 }, - { 0x00000122, 0x0000 }, - { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */ - { 0x0000014a, 0x0000 }, /* R330 (0x14A) - Output async clock */ - { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */ - { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */ - { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */ - { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */ - { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */ - { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */ - { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */ - { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */ - { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ - { 0x00000175, 0x0000 }, /* R373 - FLL1 Control 5 */ - { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ - { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ - { 0x00000178, 0x0000 }, - { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ - { 0x0000017a, 0x2906 }, /* R377 (0x17A) - FLL1 Efs 2 */ - { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ - { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */ - { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 3 */ - { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 4 */ - { 0x00000185, 0x0000 }, /* R389 (0x185) - FLL1 Synchroniser 5 */ - { 0x00000186, 0x0000 }, /* R390 (0x186) - FLL1 Synchroniser 6 */ - { 0x00000187, 0x0001 }, /* R391 (0x187) - FLL1 Synchroniser 7 */ - { 0x00000189, 0x0000 }, /* R393 (0x189) - FLL1 Spread Spectrum */ - { 0x0000018a, 0x0004 }, /* R394 (0x18A) - FLL1 GPIO Clock */ - { 0x00000191, 0x0002 }, /* R401 (0x191) - FLL2 Control 1 */ - { 0x00000192, 0x0008 }, /* R402 (0x192) - FLL2 Control 2 */ - { 0x00000193, 0x0018 }, /* R403 (0x193) - FLL2 Control 3 */ - { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */ - { 0x00000195, 0x0000 }, /* R405 - FLL2 Control 5 */ - { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */ - { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */ - { 0x00000198, 0x0000 }, - { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */ - { 0x0000019a, 0x2906 }, /* R410 (0x19A) - FLL2 Efs 2 */ - { 0x000001a1, 0x0000 }, /* R417 (0x1A1) - FLL2 Synchroniser 1 */ - { 0x000001a2, 0x0000 }, /* R418 (0x1A2) - FLL2 Synchroniser 2 */ - { 0x000001a3, 0x0000 }, /* R419 (0x1A3) - FLL2 Synchroniser 3 */ - { 0x000001a4, 0x0000 }, /* R420 (0x1A4) - FLL2 Synchroniser 4 */ - { 0x000001a5, 0x0000 }, /* R421 (0x1A5) - FLL2 Synchroniser 5 */ - { 0x000001a6, 0x0000 }, /* R422 (0x1A6) - FLL2 Synchroniser 6 */ - { 0x000001a7, 0x0001 }, /* R423 (0x1A7) - FLL2 Synchroniser 7 */ - { 0x000001a9, 0x0000 }, /* R425 (0x1A9) - FLL2 Spread Spectrum */ - { 0x000001aa, 0x0004 }, /* R426 (0x1AA) - FLL2 GPIO Clock */ - { 0x000001D1, 0x0004 }, /* R465 - FLLAO_CONTROL_1 */ - { 0x000001D2, 0x0004 }, /* R466 - FLLAO_CONTROL_2 */ - { 0x000001D3, 0x0000 }, /* R467 - FLLAO_CONTROL_3 */ - { 0x000001D4, 0x0000 }, /* R468 - FLLAO_CONTROL_4 */ - { 0x000001D5, 0x0001 }, /* R469 - FLLAO_CONTROL_5 */ - { 0x000001D6, 0x8004 }, /* R470 - FLLAO_CONTROL_6 */ - { 0x000001D8, 0x0000 }, /* R472 - FLLAO_CONTROL_7 */ - { 0x000001DA, 0x0070 }, /* R474 - FLLAO_CONTROL_8 */ - { 0x000001DB, 0x0000 }, /* R475 - FLLAO_CONTROL_9 */ - { 0x000001DC, 0x06DA }, /* R476 - FLLAO_CONTROL_10 */ - { 0x000001DD, 0x0011 }, /* R477 - FLLAO_CONTROL_11 */ - { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ - { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ - { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ - { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ - { 0x0000021C, 0x2222 }, /* R540 - Mic Bias Ctrl 5 */ - { 0x0000021E, 0x2222 }, /* R542 - Mic Bias Ctrl 6 */ - { 0x0000027e, 0x0000 }, /* R638 (0x27E) - Clearwater EDRE HP stereo control */ - { 0x00000293, 0x0080 }, /* R659 (0x293) - Accessory Detect Mode 1 */ - { 0x00000299, 0x0000 }, /* R665 (0x299) - Headphone Detect 0 */ - { 0x0000029b, 0x0000 }, /* R667 (0x29B) - Headphone Detect 1 */ - { 0x000002a2, 0x0010 }, /* R674 (0x2A2) - Mic Detect 1 Control 0 */ - { 0x000002a3, 0x1102 }, /* R675 (0x2A3) - Mic Detect 1 Control 1 */ - { 0x000002a4, 0x009f }, /* R676 (0x2A4) - Mic Detect 1 Control 2 */ - { 0x000002a6, 0x3d3d }, /* R678 (0x2A6) - Mic Detect 1 Level 1 */ - { 0x000002a7, 0x3d3d }, /* R679 (0x2A7) - Mic Detect 1 Level 2 */ - { 0x000002a8, 0x333d }, /* R680 (0x2A8) - Mic Detect 1 Level 3 */ - { 0x000002a9, 0x202d }, /* R681 (0x2A9) - Mic Detect 1 Level 4 */ - { 0x000002b2, 0x0010 }, /* R690 (0x2B2) - Mic Detect 2 Control 0 */ - { 0x000002b3, 0x1102 }, /* R691 (0x2B3) - Mic Detect 2 Control 1 */ - { 0x000002b4, 0x009f }, /* R692 (0x2B4) - Mic Detect 2 Control 2 */ - { 0x000002b6, 0x3d3d }, /* R694 (0x2B6) - Mic Detect 2 Level 1 */ - { 0x000002b7, 0x3d3d }, /* R695 (0x2B7) - Mic Detect 2 Level 2 */ - { 0x000002b8, 0x333d }, /* R696 (0x2B8) - Mic Detect 2 Level 3 */ - { 0x000002b9, 0x202d }, /* R697 (0x2B9) - Mic Detect 2 Level 4 */ - { 0x000002c6, 0x0010 }, - { 0x000002c8, 0x0000 }, /* R712 (0x2C8) - GP switch 1 */ - { 0x000002d3, 0x0000 }, /* R723 (0x2D3) - Jack detect analogue */ - { 0x00000300, 0x0000 }, /* R666 (0x300) - input_enable */ - { 0x00000308, 0x0400 }, /* R776 (0x308) - Input Rate */ - { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ - { 0x0000030c, 0x0002 }, /* R780 (0x30C) - HPF Control */ - { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */ - { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */ - { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */ - { 0x00000313, 0x0000 }, /* R787 (0x313) - IN1L Rate Control */ - { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */ - { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */ - { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */ - { 0x00000317, 0x0000 }, /* R791 (0x317) - IN1R Rate Control */ - { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */ - { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */ - { 0x0000031a, 0x0500 }, /* R794 (0x31A) - DMIC2L Control */ - { 0x0000031b, 0x0000 }, /* R795 (0x31B) - IN2L Rate Control */ - { 0x0000031c, 0x0080 }, /* R796 (0x31C) - IN2R Control */ - { 0x0000031d, 0x0180 }, /* R797 (0x31D) - ADC Digital Volume 2R */ - { 0x0000031e, 0x0000 }, /* R798 (0x31E) - DMIC2R Control */ - { 0x0000031f, 0x0000 }, /* R799 (0x31F) - IN2R Rate Control */ - { 0x00000320, 0x0000 }, /* R800 (0x320) - IN3L Control */ - { 0x00000321, 0x0180 }, /* R801 (0x321) - ADC Digital Volume 3L */ - { 0x00000322, 0x0500 }, /* R802 (0x322) - DMIC3L Control */ - { 0x00000323, 0x0000 }, /* R803 (0x323) - IN3L Rate Control */ - { 0x00000324, 0x0000 }, /* R804 (0x324) - IN3R Control */ - { 0x00000325, 0x0180 }, /* R805 (0x325) - ADC Digital Volume 3R */ - { 0x00000326, 0x0000 }, /* R806 (0x326) - DMIC3R Control */ - { 0x00000327, 0x0000 }, /* R807 (0x327) - IN3R Rate Control */ - { 0x00000328, 0x0000 }, /* R808 (0x328) - IN4 Control */ - { 0x00000329, 0x0180 }, /* R809 (0x329) - ADC Digital Volume 4L */ - { 0x0000032a, 0x0500 }, /* R810 (0x32A) - DMIC4L Control */ - { 0x0000032b, 0x0000 }, /* R811 (0x32B) - IN4L Rate Control */ - { 0x0000032c, 0x0000 }, /* R812 (0x32C) - IN4R Control */ - { 0x0000032d, 0x0180 }, /* R813 (0x32D) - ADC Digital Volume 4R */ - { 0x0000032e, 0x0000 }, /* R814 (0x32E) - DMIC4R Control */ - { 0x0000032f, 0x0000 }, /* R815 (0x32F) - IN4R Rate Control */ - { 0x00000330, 0x0000 }, /* R816 - IN5L Control */ - { 0x00000331, 0x0180 }, /* R817 - ADC Digital Volume 5L */ - { 0x00000332, 0x0500 }, /* R818 - DMIC5L Control */ - { 0x00000333, 0x0000 }, /* R819 (0x333) - IN5L Rate Control */ - { 0x00000334, 0x0000 }, /* R820 - IN5R Control */ - { 0x00000335, 0x0180 }, /* R821 - ADC Digital Volume 5R */ - { 0x00000336, 0x0000 }, /* R822 - DMIC5R Control */ - { 0x00000337, 0x0000 }, /* R823 (0x337) - IN5R Rate Control */ - { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */ - { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */ - { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */ - { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */ - { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */ - { 0x00000412, 0x0000 }, /* R1042 (0x412) - Output Path Config 1 */ - { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */ - { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */ - { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */ - { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */ - { 0x00000418, 0x0080 }, /* R1048 (0x418) - Output Path Config 2L */ - { 0x00000419, 0x0180 }, /* R1049 (0x419) - DAC Digital Volume 2L */ - { 0x0000041A, 0x0002 }, /* R1050 (0x41A) - Output Path Config 2 */ - { 0x0000041b, 0x0004 }, /* R1051 (0x41B) - Noise Gate Select 2L */ - { 0x0000041c, 0x0080 }, /* R1052 (0x41C) - Output Path Config 2R */ - { 0x0000041d, 0x0180 }, /* R1053 (0x41D) - DAC Digital Volume 2R */ - { 0x0000041f, 0x0008 }, /* R1055 (0x41F) - Noise Gate Select 2R */ - { 0x00000420, 0x0080 }, /* R1056 (0x420) - Output Path Config 3L */ - { 0x00000421, 0x0180 }, /* R1057 (0x421) - DAC Digital Volume 3L */ - { 0x00000423, 0x0010 }, /* R1059 (0x423) - Noise Gate Select 3L */ - { 0x00000424, 0x0080 }, /* R1060 (0x424) - Output Path Config 3R */ - { 0x00000425, 0x0180 }, /* R1061 (0x425) - DAC Digital Volume 3R */ - { 0x00000427, 0x0020 }, - { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */ - { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */ - { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */ - { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ - { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ - { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ - { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */ - { 0x00000448, 0x003f }, /* R1096 (0x448) - eDRE Enable */ - { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ - { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ - { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */ - { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ - { 0x000004A0, 0x3080 }, /* R1184 - HP1 Short Circuit Ctrl */ - { 0x000004A1, 0x3000 }, /* R1185 - HP2 Short Circuit Ctrl */ - { 0x000004A2, 0x3000 }, /* R1186 - HP3 Short Circuit Ctrl */ - { 0x000004A8, 0x7120 }, /* R1192 - HP Test Ctrl 5 */ - { 0x000004A9, 0x7120 }, /* R1193 - HP Test Ctrl 6 */ - { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ - { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ - { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ - { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */ - { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */ - { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */ - { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */ - { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */ - { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */ - { 0x0000050a, 0x0001 }, /* R1290 (0x50A) - AIF1 Frame Ctrl 4 */ - { 0x0000050b, 0x0002 }, /* R1291 (0x50B) - AIF1 Frame Ctrl 5 */ - { 0x0000050c, 0x0003 }, /* R1292 (0x50C) - AIF1 Frame Ctrl 6 */ - { 0x0000050d, 0x0004 }, /* R1293 (0x50D) - AIF1 Frame Ctrl 7 */ - { 0x0000050e, 0x0005 }, /* R1294 (0x50E) - AIF1 Frame Ctrl 8 */ - { 0x0000050f, 0x0006 }, /* R1295 (0x50F) - AIF1 Frame Ctrl 9 */ - { 0x00000510, 0x0007 }, /* R1296 (0x510) - AIF1 Frame Ctrl 10 */ - { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */ - { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */ - { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */ - { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */ - { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */ - { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ - { 0x00000517, 0x0006 }, /* R1303 (0x517) - AIF1 Frame Ctrl 17 */ - { 0x00000518, 0x0007 }, /* R1304 (0x518) - AIF1 Frame Ctrl 18 */ - { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ - { 0x0000051a, 0x0000 }, /* R1306 (0x51A) - AIF1 Rx Enables */ - { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ - { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ - { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ - { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */ - { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */ - { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */ - { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */ - { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */ - { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */ - { 0x0000054a, 0x0001 }, /* R1354 (0x54A) - AIF2 Frame Ctrl 4 */ - { 0x0000054b, 0x0002 }, /* R1355 (0x54B) - AIF2 Frame Ctrl 5 */ - { 0x0000054c, 0x0003 }, /* R1356 (0x54C) - AIF2 Frame Ctrl 6 */ - { 0x0000054d, 0x0004 }, /* R1357 (0x54D) - AIF2 Frame Ctrl 7 */ - { 0x0000054e, 0x0005 }, /* R1358 (0x54E) - AIF2 Frame Ctrl 8 */ - { 0x0000054F, 0x0006 }, /* R1359 - AIF2 Frame Ctrl 9 */ - { 0x00000550, 0x0007 }, /* R1360 - AIF2 Frame Ctrl 10 */ - { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */ - { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ - { 0x00000553, 0x0002 }, /* R1363 (0x553) - AIF2 Frame Ctrl 13 */ - { 0x00000554, 0x0003 }, /* R1364 (0x554) - AIF2 Frame Ctrl 14 */ - { 0x00000555, 0x0004 }, /* R1365 (0x555) - AIF2 Frame Ctrl 15 */ - { 0x00000556, 0x0005 }, /* R1366 (0x556) - AIF2 Frame Ctrl 16 */ - { 0x00000557, 0x0006 }, /* R1367 - AIF2 Frame Ctrl 17 */ - { 0x00000558, 0x0007 }, /* R1368 - AIF2 Frame Ctrl 18 */ - { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ - { 0x0000055a, 0x0000 }, /* R1370 (0x55A) - AIF2 Rx Enables */ - { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ - { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ - { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ - { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */ - { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */ - { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */ - { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */ - { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */ - { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */ - { 0x0000058a, 0x0001 }, /* R1418 (0x58A) - AIF3 Frame Ctrl 4 */ - { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */ - { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ - { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ - { 0x0000059a, 0x0000 }, /* R1434 (0x59A) - AIF3 Rx Enables */ - { 0x000005a0, 0x000c }, /* R1440 - AIF4 BCLK Ctrl */ - { 0x000005a1, 0x0000 }, /* R1441 - AIF4 Tx Pin Ctrl */ - { 0x000005a2, 0x0000 }, /* R1442 - AIF4 Rx Pin Ctrl */ - { 0x000005a3, 0x0000 }, /* R1443 - AIF4 Rate Ctrl */ - { 0x000005a4, 0x0000 }, /* R1444 - AIF4 Format */ - { 0x000005a6, 0x0040 }, /* R1446 - AIF4 Rx BCLK Rate */ - { 0x000005a7, 0x1818 }, /* R1447 - AIF4 Frame Ctrl 1 */ - { 0x000005a8, 0x1818 }, /* R1448 - AIF4 Frame Ctrl 2 */ - { 0x000005a9, 0x0000 }, /* R1449 - AIF4 Frame Ctrl 3 */ - { 0x000005aa, 0x0001 }, /* R1450 - AIF4 Frame Ctrl 4 */ - { 0x000005b1, 0x0000 }, /* R1457 - AIF4 Frame Ctrl 11 */ - { 0x000005b2, 0x0001 }, /* R1458 - AIF4 Frame Ctrl 12 */ - { 0x000005b9, 0x0000 }, /* R1465 - AIF4 Tx Enables */ - { 0x000005ba, 0x0000 }, /* R1466 - AIF4 Rx Enables */ - { 0x000005C2, 0x0000 }, /* R1474 - SPD1 TX Control */ - { 0x000005e3, 0x0000 }, /* R1507 (0x5E3) - SLIMbus Framer Ref Gear */ - { 0x000005e5, 0x0000 }, /* R1509 (0x5E5) - SLIMbus Rates 1 */ - { 0x000005e6, 0x0000 }, /* R1510 (0x5E6) - SLIMbus Rates 2 */ - { 0x000005e7, 0x0000 }, /* R1511 (0x5E7) - SLIMbus Rates 3 */ - { 0x000005e8, 0x0000 }, /* R1512 (0x5E8) - SLIMbus Rates 4 */ - { 0x000005e9, 0x0000 }, /* R1513 (0x5E9) - SLIMbus Rates 5 */ - { 0x000005ea, 0x0000 }, /* R1514 (0x5EA) - SLIMbus Rates 6 */ - { 0x000005eb, 0x0000 }, /* R1515 (0x5EB) - SLIMbus Rates 7 */ - { 0x000005ec, 0x0000 }, /* R1516 (0x5EC) - SLIMbus Rates 8 */ - { 0x000005f5, 0x0000 }, /* R1525 (0x5F5) - SLIMbus RX Channel Enable */ - { 0x000005f6, 0x0000 }, /* R1526 (0x5F6) - SLIMbus TX Channel Enable */ - { 0x00000640, 0x0000 }, - { 0x00000641, 0x0080 }, - { 0x00000642, 0x0000 }, - { 0x00000643, 0x0080 }, - { 0x00000644, 0x0000 }, - { 0x00000645, 0x0080 }, - { 0x00000646, 0x0000 }, - { 0x00000647, 0x0080 }, - { 0x00000648, 0x0000 }, - { 0x00000649, 0x0080 }, - { 0x0000064a, 0x0000 }, - { 0x0000064b, 0x0080 }, - { 0x0000064c, 0x0000 }, - { 0x0000064d, 0x0080 }, - { 0x0000064e, 0x0000 }, - { 0x0000064f, 0x0080 }, - { 0x00000680, 0x0000 }, - { 0x00000681, 0x0080 }, - { 0x00000682, 0x0000 }, - { 0x00000683, 0x0080 }, - { 0x00000684, 0x0000 }, - { 0x00000685, 0x0080 }, - { 0x00000686, 0x0000 }, - { 0x00000687, 0x0080 }, - { 0x00000688, 0x0000 }, - { 0x00000689, 0x0080 }, - { 0x0000068a, 0x0000 }, - { 0x0000068b, 0x0080 }, - { 0x0000068c, 0x0000 }, - { 0x0000068d, 0x0080 }, - { 0x0000068e, 0x0000 }, - { 0x0000068f, 0x0080 }, - { 0x00000690, 0x0000 }, - { 0x00000691, 0x0080 }, - { 0x00000692, 0x0000 }, - { 0x00000693, 0x0080 }, - { 0x00000694, 0x0000 }, - { 0x00000695, 0x0080 }, - { 0x00000696, 0x0000 }, - { 0x00000697, 0x0080 }, - { 0x00000698, 0x0000 }, - { 0x00000699, 0x0080 }, - { 0x0000069a, 0x0000 }, - { 0x0000069b, 0x0080 }, - { 0x0000069c, 0x0000 }, - { 0x0000069d, 0x0080 }, - { 0x0000069e, 0x0000 }, - { 0x0000069f, 0x0080 }, - { 0x000006a0, 0x0000 }, - { 0x000006a1, 0x0080 }, - { 0x000006a2, 0x0000 }, - { 0x000006a3, 0x0080 }, - { 0x000006a4, 0x0000 }, - { 0x000006a5, 0x0080 }, - { 0x000006a6, 0x0000 }, - { 0x000006a7, 0x0080 }, - { 0x000006a8, 0x0000 }, - { 0x000006a9, 0x0080 }, - { 0x000006aa, 0x0000 }, - { 0x000006ab, 0x0080 }, - { 0x000006ac, 0x0000 }, - { 0x000006ad, 0x0080 }, - { 0x000006ae, 0x0000 }, - { 0x000006af, 0x0080 }, - { 0x000006c0, 0x0000 }, - { 0x000006c1, 0x0080 }, - { 0x000006c2, 0x0000 }, - { 0x000006c3, 0x0080 }, - { 0x000006c4, 0x0000 }, - { 0x000006c5, 0x0080 }, - { 0x000006c6, 0x0000 }, - { 0x000006c7, 0x0080 }, - { 0x000006c8, 0x0000 }, - { 0x000006c9, 0x0080 }, - { 0x000006ca, 0x0000 }, - { 0x000006cb, 0x0080 }, - { 0x000006cc, 0x0000 }, - { 0x000006cd, 0x0080 }, - { 0x000006ce, 0x0000 }, - { 0x000006cf, 0x0080 }, - { 0x00000700, 0x0000 }, - { 0x00000701, 0x0080 }, - { 0x00000702, 0x0000 }, - { 0x00000703, 0x0080 }, - { 0x00000704, 0x0000 }, - { 0x00000705, 0x0080 }, - { 0x00000706, 0x0000 }, - { 0x00000707, 0x0080 }, - { 0x00000708, 0x0000 }, - { 0x00000709, 0x0080 }, - { 0x0000070a, 0x0000 }, - { 0x0000070b, 0x0080 }, - { 0x0000070c, 0x0000 }, - { 0x0000070d, 0x0080 }, - { 0x0000070e, 0x0000 }, - { 0x0000070f, 0x0080 }, - { 0x00000710, 0x0000 }, - { 0x00000711, 0x0080 }, - { 0x00000712, 0x0000 }, - { 0x00000713, 0x0080 }, - { 0x00000714, 0x0000 }, - { 0x00000715, 0x0080 }, - { 0x00000716, 0x0000 }, - { 0x00000717, 0x0080 }, - { 0x00000718, 0x0000 }, - { 0x00000719, 0x0080 }, - { 0x0000071a, 0x0000 }, - { 0x0000071b, 0x0080 }, - { 0x0000071c, 0x0000 }, - { 0x0000071d, 0x0080 }, - { 0x0000071e, 0x0000 }, - { 0x0000071f, 0x0080 }, - { 0x00000720, 0x0000 }, - { 0x00000721, 0x0080 }, - { 0x00000722, 0x0000 }, - { 0x00000723, 0x0080 }, - { 0x00000724, 0x0000 }, - { 0x00000725, 0x0080 }, - { 0x00000726, 0x0000 }, - { 0x00000727, 0x0080 }, - { 0x00000728, 0x0000 }, - { 0x00000729, 0x0080 }, - { 0x0000072a, 0x0000 }, - { 0x0000072b, 0x0080 }, - { 0x0000072c, 0x0000 }, - { 0x0000072d, 0x0080 }, - { 0x0000072e, 0x0000 }, - { 0x0000072f, 0x0080 }, - { 0x00000730, 0x0000 }, - { 0x00000731, 0x0080 }, - { 0x00000732, 0x0000 }, - { 0x00000733, 0x0080 }, - { 0x00000734, 0x0000 }, - { 0x00000735, 0x0080 }, - { 0x00000736, 0x0000 }, - { 0x00000737, 0x0080 }, - { 0x00000738, 0x0000 }, - { 0x00000739, 0x0080 }, - { 0x0000073a, 0x0000 }, - { 0x0000073b, 0x0080 }, - { 0x0000073c, 0x0000 }, - { 0x0000073d, 0x0080 }, - { 0x0000073e, 0x0000 }, - { 0x0000073f, 0x0080 }, - { 0x00000740, 0x0000 }, - { 0x00000741, 0x0080 }, - { 0x00000742, 0x0000 }, - { 0x00000743, 0x0080 }, - { 0x00000744, 0x0000 }, - { 0x00000745, 0x0080 }, - { 0x00000746, 0x0000 }, - { 0x00000747, 0x0080 }, - { 0x00000748, 0x0000 }, - { 0x00000749, 0x0080 }, - { 0x0000074a, 0x0000 }, - { 0x0000074b, 0x0080 }, - { 0x0000074c, 0x0000 }, - { 0x0000074d, 0x0080 }, - { 0x0000074e, 0x0000 }, - { 0x0000074f, 0x0080 }, - { 0x00000750, 0x0000 }, - { 0x00000751, 0x0080 }, - { 0x00000752, 0x0000 }, - { 0x00000753, 0x0080 }, - { 0x00000754, 0x0000 }, - { 0x00000755, 0x0080 }, - { 0x00000756, 0x0000 }, - { 0x00000757, 0x0080 }, - { 0x00000758, 0x0000 }, - { 0x00000759, 0x0080 }, - { 0x0000075a, 0x0000 }, - { 0x0000075b, 0x0080 }, - { 0x0000075c, 0x0000 }, - { 0x0000075d, 0x0080 }, - { 0x0000075e, 0x0000 }, - { 0x0000075f, 0x0080 }, - { 0x00000760, 0x0000 }, - { 0x00000761, 0x0080 }, - { 0x00000762, 0x0000 }, - { 0x00000763, 0x0080 }, - { 0x00000764, 0x0000 }, - { 0x00000765, 0x0080 }, - { 0x00000766, 0x0000 }, - { 0x00000767, 0x0080 }, - { 0x00000768, 0x0000 }, - { 0x00000769, 0x0080 }, - { 0x0000076a, 0x0000 }, - { 0x0000076b, 0x0080 }, - { 0x0000076c, 0x0000 }, - { 0x0000076d, 0x0080 }, - { 0x0000076e, 0x0000 }, - { 0x0000076f, 0x0080 }, - { 0x00000770, 0x0000 }, - { 0x00000771, 0x0080 }, - { 0x00000772, 0x0000 }, - { 0x00000773, 0x0080 }, - { 0x00000774, 0x0000 }, - { 0x00000775, 0x0080 }, - { 0x00000776, 0x0000 }, - { 0x00000777, 0x0080 }, - { 0x00000778, 0x0000 }, - { 0x00000779, 0x0080 }, - { 0x0000077a, 0x0000 }, - { 0x0000077b, 0x0080 }, - { 0x0000077c, 0x0000 }, - { 0x0000077d, 0x0080 }, - { 0x0000077e, 0x0000 }, - { 0x0000077f, 0x0080 }, - { 0x00000780, 0x0000 }, - { 0x00000781, 0x0080 }, - { 0x00000782, 0x0000 }, - { 0x00000783, 0x0080 }, - { 0x00000784, 0x0000 }, - { 0x00000785, 0x0080 }, - { 0x00000786, 0x0000 }, - { 0x00000787, 0x0080 }, - { 0x00000788, 0x0000 }, - { 0x00000789, 0x0080 }, - { 0x0000078a, 0x0000 }, - { 0x0000078b, 0x0080 }, - { 0x0000078c, 0x0000 }, - { 0x0000078d, 0x0080 }, - { 0x0000078e, 0x0000 }, - { 0x0000078f, 0x0080 }, - { 0x000007a0, 0x0000 }, /* R1952 - AIF4TX1MIX Input 1 Source */ - { 0x000007a1, 0x0080 }, /* R1953 - AIF4TX1MIX Input 1 Volume */ - { 0x000007a2, 0x0000 }, /* R1954 - AIF4TX1MIX Input 2 Source */ - { 0x000007a3, 0x0080 }, /* R1955 - AIF4TX1MIX Input 2 Volume */ - { 0x000007a4, 0x0000 }, /* R1956 - AIF4TX1MIX Input 3 Source */ - { 0x000007a5, 0x0080 }, /* R1957 - AIF4TX1MIX Input 3 Volume */ - { 0x000007a6, 0x0000 }, /* R1958 - AIF4TX1MIX Input 4 Source */ - { 0x000007a7, 0x0080 }, /* R1959 - AIF4TX1MIX Input 4 Volume */ - { 0x000007a8, 0x0000 }, /* R1960 - AIF4TX2MIX Input 1 Source */ - { 0x000007a9, 0x0080 }, /* R1961 - AIF4TX2MIX Input 1 Volume */ - { 0x000007aa, 0x0000 }, /* R1962 - AIF4TX2MIX Input 2 Source */ - { 0x000007ab, 0x0080 }, /* R1963 - AIF4TX2MIX Input 2 Volume */ - { 0x000007ac, 0x0000 }, /* R1964 - AIF4TX2MIX Input 3 Source */ - { 0x000007ad, 0x0080 }, /* R1965 - AIF4TX2MIX Input 3 Volume */ - { 0x000007ae, 0x0000 }, /* R1966 - AIF4TX2MIX Input 4 Source */ - { 0x000007af, 0x0080 }, /* R1967 - AIF4TX2MIX Input 4 Volume */ - { 0x000007c0, 0x0000 }, - { 0x000007c1, 0x0080 }, - { 0x000007c2, 0x0000 }, - { 0x000007c3, 0x0080 }, - { 0x000007c4, 0x0000 }, - { 0x000007c5, 0x0080 }, - { 0x000007c6, 0x0000 }, - { 0x000007c7, 0x0080 }, - { 0x000007c8, 0x0000 }, - { 0x000007c9, 0x0080 }, - { 0x000007ca, 0x0000 }, - { 0x000007cb, 0x0080 }, - { 0x000007cc, 0x0000 }, - { 0x000007cd, 0x0080 }, - { 0x000007ce, 0x0000 }, - { 0x000007cf, 0x0080 }, - { 0x000007d0, 0x0000 }, - { 0x000007d1, 0x0080 }, - { 0x000007d2, 0x0000 }, - { 0x000007d3, 0x0080 }, - { 0x000007d4, 0x0000 }, - { 0x000007d5, 0x0080 }, - { 0x000007d6, 0x0000 }, - { 0x000007d7, 0x0080 }, - { 0x000007d8, 0x0000 }, - { 0x000007d9, 0x0080 }, - { 0x000007da, 0x0000 }, - { 0x000007db, 0x0080 }, - { 0x000007dc, 0x0000 }, - { 0x000007dd, 0x0080 }, - { 0x000007de, 0x0000 }, - { 0x000007df, 0x0080 }, - { 0x000007e0, 0x0000 }, - { 0x000007e1, 0x0080 }, - { 0x000007e2, 0x0000 }, - { 0x000007e3, 0x0080 }, - { 0x000007e4, 0x0000 }, - { 0x000007e5, 0x0080 }, - { 0x000007e6, 0x0000 }, - { 0x000007e7, 0x0080 }, - { 0x000007e8, 0x0000 }, - { 0x000007e9, 0x0080 }, - { 0x000007ea, 0x0000 }, - { 0x000007eb, 0x0080 }, - { 0x000007ec, 0x0000 }, - { 0x000007ed, 0x0080 }, - { 0x000007ee, 0x0000 }, - { 0x000007ef, 0x0080 }, - { 0x000007f0, 0x0000 }, - { 0x000007f1, 0x0080 }, - { 0x000007f2, 0x0000 }, - { 0x000007f3, 0x0080 }, - { 0x000007f4, 0x0000 }, - { 0x000007f5, 0x0080 }, - { 0x000007f6, 0x0000 }, - { 0x000007f7, 0x0080 }, - { 0x000007f8, 0x0000 }, - { 0x000007f9, 0x0080 }, - { 0x000007fa, 0x0000 }, - { 0x000007fb, 0x0080 }, - { 0x000007fc, 0x0000 }, - { 0x000007fd, 0x0080 }, - { 0x000007fe, 0x0000 }, - { 0x000007ff, 0x0080 }, - { 0x00000800, 0x0000 }, /* (R2048) SPDIF1TX1MIX Input 1 Source */ - { 0x00000801, 0x0080 }, /* (R2049) SPDIF1TX1MIX Input 1 Volume */ - { 0x00000808, 0x0000 }, /* (R2056) SPDIF1TX2MIX Input 1 Source */ - { 0x00000809, 0x0080 }, /* (R2057) SPDIF1TX2MIX Input 1 Volume */ - { 0x00000880, 0x0000 }, - { 0x00000881, 0x0080 }, - { 0x00000882, 0x0000 }, - { 0x00000883, 0x0080 }, - { 0x00000884, 0x0000 }, - { 0x00000885, 0x0080 }, - { 0x00000886, 0x0000 }, - { 0x00000887, 0x0080 }, - { 0x00000888, 0x0000 }, - { 0x00000889, 0x0080 }, - { 0x0000088a, 0x0000 }, - { 0x0000088b, 0x0080 }, - { 0x0000088c, 0x0000 }, - { 0x0000088d, 0x0080 }, - { 0x0000088e, 0x0000 }, - { 0x0000088f, 0x0080 }, - { 0x00000890, 0x0000 }, - { 0x00000891, 0x0080 }, - { 0x00000892, 0x0000 }, - { 0x00000893, 0x0080 }, - { 0x00000894, 0x0000 }, - { 0x00000895, 0x0080 }, - { 0x00000896, 0x0000 }, - { 0x00000897, 0x0080 }, - { 0x00000898, 0x0000 }, - { 0x00000899, 0x0080 }, - { 0x0000089a, 0x0000 }, - { 0x0000089b, 0x0080 }, - { 0x0000089c, 0x0000 }, - { 0x0000089d, 0x0080 }, - { 0x0000089e, 0x0000 }, - { 0x0000089f, 0x0080 }, - { 0x000008c0, 0x0000 }, - { 0x000008c1, 0x0080 }, - { 0x000008c2, 0x0000 }, - { 0x000008c3, 0x0080 }, - { 0x000008c4, 0x0000 }, - { 0x000008c5, 0x0080 }, - { 0x000008c6, 0x0000 }, - { 0x000008c7, 0x0080 }, - { 0x000008c8, 0x0000 }, - { 0x000008c9, 0x0080 }, - { 0x000008ca, 0x0000 }, - { 0x000008cb, 0x0080 }, - { 0x000008cc, 0x0000 }, - { 0x000008cd, 0x0080 }, - { 0x000008ce, 0x0000 }, - { 0x000008cf, 0x0080 }, - { 0x000008d0, 0x0000 }, - { 0x000008d1, 0x0080 }, - { 0x000008d2, 0x0000 }, - { 0x000008d3, 0x0080 }, - { 0x000008d4, 0x0000 }, - { 0x000008d5, 0x0080 }, - { 0x000008d6, 0x0000 }, - { 0x000008d7, 0x0080 }, - { 0x000008d8, 0x0000 }, - { 0x000008d9, 0x0080 }, - { 0x000008da, 0x0000 }, - { 0x000008db, 0x0080 }, - { 0x000008dc, 0x0000 }, - { 0x000008dd, 0x0080 }, - { 0x000008de, 0x0000 }, - { 0x000008df, 0x0080 }, - { 0x00000900, 0x0000 }, - { 0x00000901, 0x0080 }, - { 0x00000902, 0x0000 }, - { 0x00000903, 0x0080 }, - { 0x00000904, 0x0000 }, - { 0x00000905, 0x0080 }, - { 0x00000906, 0x0000 }, - { 0x00000907, 0x0080 }, - { 0x00000908, 0x0000 }, - { 0x00000909, 0x0080 }, - { 0x0000090a, 0x0000 }, - { 0x0000090b, 0x0080 }, - { 0x0000090c, 0x0000 }, - { 0x0000090d, 0x0080 }, - { 0x0000090e, 0x0000 }, - { 0x0000090f, 0x0080 }, - { 0x00000910, 0x0000 }, - { 0x00000911, 0x0080 }, - { 0x00000912, 0x0000 }, - { 0x00000913, 0x0080 }, - { 0x00000914, 0x0000 }, - { 0x00000915, 0x0080 }, - { 0x00000916, 0x0000 }, - { 0x00000917, 0x0080 }, - { 0x00000918, 0x0000 }, - { 0x00000919, 0x0080 }, - { 0x0000091a, 0x0000 }, - { 0x0000091b, 0x0080 }, - { 0x0000091c, 0x0000 }, - { 0x0000091d, 0x0080 }, - { 0x0000091e, 0x0000 }, - { 0x0000091f, 0x0080 }, - { 0x00000940, 0x0000 }, - { 0x00000941, 0x0080 }, - { 0x00000942, 0x0000 }, - { 0x00000943, 0x0080 }, - { 0x00000944, 0x0000 }, - { 0x00000945, 0x0080 }, - { 0x00000946, 0x0000 }, - { 0x00000947, 0x0080 }, - { 0x00000948, 0x0000 }, - { 0x00000949, 0x0080 }, - { 0x0000094a, 0x0000 }, - { 0x0000094b, 0x0080 }, - { 0x0000094c, 0x0000 }, - { 0x0000094d, 0x0080 }, - { 0x0000094e, 0x0000 }, - { 0x0000094f, 0x0080 }, - { 0x00000950, 0x0000 }, - { 0x00000958, 0x0000 }, - { 0x00000960, 0x0000 }, - { 0x00000968, 0x0000 }, - { 0x00000970, 0x0000 }, - { 0x00000978, 0x0000 }, - { 0x00000980, 0x0000 }, - { 0x00000981, 0x0080 }, - { 0x00000982, 0x0000 }, - { 0x00000983, 0x0080 }, - { 0x00000984, 0x0000 }, - { 0x00000985, 0x0080 }, - { 0x00000986, 0x0000 }, - { 0x00000987, 0x0080 }, - { 0x00000988, 0x0000 }, - { 0x00000989, 0x0080 }, - { 0x0000098a, 0x0000 }, - { 0x0000098b, 0x0080 }, - { 0x0000098c, 0x0000 }, - { 0x0000098d, 0x0080 }, - { 0x0000098e, 0x0000 }, - { 0x0000098f, 0x0080 }, - { 0x00000990, 0x0000 }, - { 0x00000998, 0x0000 }, - { 0x000009a0, 0x0000 }, - { 0x000009a8, 0x0000 }, - { 0x000009b0, 0x0000 }, - { 0x000009b8, 0x0000 }, - { 0x000009c0, 0x0000 }, - { 0x000009c1, 0x0080 }, - { 0x000009c2, 0x0000 }, - { 0x000009c3, 0x0080 }, - { 0x000009c4, 0x0000 }, - { 0x000009c5, 0x0080 }, - { 0x000009c6, 0x0000 }, - { 0x000009c7, 0x0080 }, - { 0x000009c8, 0x0000 }, - { 0x000009c9, 0x0080 }, - { 0x000009ca, 0x0000 }, - { 0x000009cb, 0x0080 }, - { 0x000009cc, 0x0000 }, - { 0x000009cd, 0x0080 }, - { 0x000009ce, 0x0000 }, - { 0x000009cf, 0x0080 }, - { 0x000009d0, 0x0000 }, - { 0x000009d8, 0x0000 }, - { 0x000009e0, 0x0000 }, - { 0x000009e8, 0x0000 }, - { 0x000009f0, 0x0000 }, - { 0x000009f8, 0x0000 }, - { 0x00000a00, 0x0000 }, - { 0x00000a01, 0x0080 }, - { 0x00000a02, 0x0000 }, - { 0x00000a03, 0x0080 }, - { 0x00000a04, 0x0000 }, - { 0x00000a05, 0x0080 }, - { 0x00000a06, 0x0000 }, - { 0x00000a07, 0x0080 }, - { 0x00000a08, 0x0000 }, - { 0x00000a09, 0x0080 }, - { 0x00000a0a, 0x0000 }, - { 0x00000a0b, 0x0080 }, - { 0x00000a0c, 0x0000 }, - { 0x00000a0d, 0x0080 }, - { 0x00000a0e, 0x0000 }, - { 0x00000a0f, 0x0080 }, - { 0x00000a10, 0x0000 }, - { 0x00000a18, 0x0000 }, - { 0x00000a20, 0x0000 }, - { 0x00000a28, 0x0000 }, - { 0x00000a30, 0x0000 }, - { 0x00000a38, 0x0000 }, - { 0x00000a40, 0x0000 }, - { 0x00000a41, 0x0080 }, - { 0x00000a42, 0x0000 }, - { 0x00000a43, 0x0080 }, - { 0x00000a44, 0x0000 }, - { 0x00000a45, 0x0080 }, - { 0x00000a46, 0x0000 }, - { 0x00000a47, 0x0080 }, - { 0x00000a48, 0x0000 }, - { 0x00000a49, 0x0080 }, - { 0x00000a4a, 0x0000 }, - { 0x00000a4b, 0x0080 }, - { 0x00000a4c, 0x0000 }, - { 0x00000a4d, 0x0080 }, - { 0x00000a4e, 0x0000 }, - { 0x00000a4f, 0x0080 }, - { 0x00000a50, 0x0000 }, - { 0x00000a58, 0x0000 }, - { 0x00000a60, 0x0000 }, - { 0x00000a68, 0x0000 }, - { 0x00000a70, 0x0000 }, - { 0x00000a78, 0x0000 }, - { 0x00000a80, 0x0000 }, - { 0x00000a88, 0x0000 }, - { 0x00000a90, 0x0000 }, - { 0x00000a98, 0x0000 }, - { 0x00000aa0, 0x0000 }, - { 0x00000aa8, 0x0000 }, - { 0x00000ab0, 0x0000 }, - { 0x00000ab8, 0x0000 }, - { 0x00000b00, 0x0000 }, - { 0x00000b08, 0x0000 }, - { 0x00000b10, 0x0000 }, - { 0x00000b18, 0x0000 }, - { 0x00000b20, 0x0000 }, - { 0x00000b28, 0x0000 }, - { 0x00000b30, 0x0000 }, - { 0x00000b38, 0x0000 }, - { 0x00000b40, 0x0000 }, - { 0x00000b48, 0x0000 }, - { 0x00000b50, 0x0000 }, - { 0x00000b58, 0x0000 }, - { 0x00000b60, 0x0000 }, - { 0x00000b68, 0x0000 }, - { 0x00000b70, 0x0000 }, - { 0x00000b78, 0x0000 }, - { 0x00000b80, 0x0000 }, - { 0x00000b88, 0x0000 }, - { 0x00000ba0, 0x0000 }, - { 0x00000ba8, 0x0000 }, - { 0x00000bc0, 0x0000 }, /* R3008 - ISRC4DEC1MIX Input 1 Source */ - { 0x00000bc8, 0x0000 }, /* R3016 - ISRC4DEC2MIX Input 1 Source */ - { 0x00000be0, 0x0000 }, /* R3040 - ISRC4INT1MIX Input 1 Source */ - { 0x00000be8, 0x0000 }, /* R3048 - ISRC4INT2MIX Input 1 Source */ - { 0x00000c00, 0x0000 }, - { 0x00000c01, 0x0080 }, - { 0x00000c02, 0x0000 }, - { 0x00000c03, 0x0080 }, - { 0x00000c04, 0x0000 }, - { 0x00000c05, 0x0080 }, - { 0x00000c06, 0x0000 }, - { 0x00000c07, 0x0080 }, - { 0x00000c08, 0x0000 }, - { 0x00000c09, 0x0080 }, - { 0x00000c0a, 0x0000 }, - { 0x00000c0b, 0x0080 }, - { 0x00000c0c, 0x0000 }, - { 0x00000c0d, 0x0080 }, - { 0x00000c0e, 0x0000 }, - { 0x00000c0f, 0x0080 }, - { 0x00000c10, 0x0000 }, /* R3088 (0xC10) - DSP6AUX1MIX Input 1 */ - { 0x00000c18, 0x0000 }, /* R3088 (0xC18) - DSP6AUX2MIX Input 1 */ - { 0x00000c20, 0x0000 }, /* R3088 (0xC20) - DSP6AUX3MIX Input 1 */ - { 0x00000c28, 0x0000 }, /* R3088 (0xC28) - DSP6AUX4MIX Input 1 */ - { 0x00000c30, 0x0000 }, /* R3088 (0xC30) - DSP6AUX5MIX Input 1 */ - { 0x00000c38, 0x0000 }, /* R3088 (0xC38) - DSP6AUX6MIX Input 1 */ - { 0x00000c40, 0x0000 }, - { 0x00000c41, 0x0080 }, - { 0x00000c42, 0x0000 }, - { 0x00000c43, 0x0080 }, - { 0x00000c44, 0x0000 }, - { 0x00000c45, 0x0080 }, - { 0x00000c46, 0x0000 }, - { 0x00000c47, 0x0080 }, - { 0x00000c48, 0x0000 }, - { 0x00000c49, 0x0080 }, - { 0x00000c4a, 0x0000 }, - { 0x00000c4b, 0x0080 }, - { 0x00000c4c, 0x0000 }, - { 0x00000c4d, 0x0080 }, - { 0x00000c4e, 0x0000 }, - { 0x00000c4f, 0x0080 }, - { 0x00000c50, 0x0000 }, - { 0x00000c58, 0x0000 }, - { 0x00000c60, 0x0000 }, - { 0x00000c68, 0x0000 }, - { 0x00000c70, 0x0000 }, - { 0x00000c78, 0x0000 }, - { 0x00000dc0, 0x0000 }, - { 0x00000dc8, 0x0000 }, - { 0x00000dd0, 0x0000 }, - { 0x00000dd8, 0x0000 }, - { 0x00000de0, 0x0000 }, - { 0x00000de8, 0x0000 }, - { 0x00000df0, 0x0000 }, - { 0x00000df8, 0x0000 }, - { 0x00000e00, 0x0000 }, /* R3584 (0xE00) - FX_Ctrl1 */ - { 0x00000e10, 0x6318 }, /* R3600 (0xE10) - EQ1_1 */ - { 0x00000e11, 0x6300 }, /* R3601 (0xE11) - EQ1_2 */ - { 0x00000e12, 0x0fc8 }, /* R3602 (0xE12) - EQ1_3 */ - { 0x00000e13, 0x03fe }, /* R3603 (0xE13) - EQ1_4 */ - { 0x00000e14, 0x00e0 }, /* R3604 (0xE14) - EQ1_5 */ - { 0x00000e15, 0x1ec4 }, /* R3605 (0xE15) - EQ1_6 */ - { 0x00000e16, 0xf136 }, /* R3606 (0xE16) - EQ1_7 */ - { 0x00000e17, 0x0409 }, /* R3607 (0xE17) - EQ1_8 */ - { 0x00000e18, 0x04cc }, /* R3608 (0xE18) - EQ1_9 */ - { 0x00000e19, 0x1c9b }, /* R3609 (0xE19) - EQ1_10 */ - { 0x00000e1a, 0xf337 }, /* R3610 (0xE1A) - EQ1_11 */ - { 0x00000e1b, 0x040b }, /* R3611 (0xE1B) - EQ1_12 */ - { 0x00000e1c, 0x0cbb }, /* R3612 (0xE1C) - EQ1_13 */ - { 0x00000e1d, 0x16f8 }, /* R3613 (0xE1D) - EQ1_14 */ - { 0x00000e1e, 0xf7d9 }, /* R3614 (0xE1E) - EQ1_15 */ - { 0x00000e1f, 0x040a }, /* R3615 (0xE1F) - EQ1_16 */ - { 0x00000e20, 0x1f14 }, /* R3616 (0xE20) - EQ1_17 */ - { 0x00000e21, 0x058c }, /* R3617 (0xE21) - EQ1_18 */ - { 0x00000e22, 0x0563 }, /* R3618 (0xE22) - EQ1_19 */ - { 0x00000e23, 0x4000 }, /* R3619 (0xE23) - EQ1_20 */ - { 0x00000e24, 0x0b75 }, /* R3620 (0xE24) - EQ1_21 */ - { 0x00000e26, 0x6318 }, /* R3622 (0xE26) - EQ2_1 */ - { 0x00000e27, 0x6300 }, /* R3623 (0xE27) - EQ2_2 */ - { 0x00000e28, 0x0fc8 }, /* R3624 (0xE28) - EQ2_3 */ - { 0x00000e29, 0x03fe }, /* R3625 (0xE29) - EQ2_4 */ - { 0x00000e2a, 0x00e0 }, /* R3626 (0xE2A) - EQ2_5 */ - { 0x00000e2b, 0x1ec4 }, /* R3627 (0xE2B) - EQ2_6 */ - { 0x00000e2c, 0xf136 }, /* R3628 (0xE2C) - EQ2_7 */ - { 0x00000e2d, 0x0409 }, /* R3629 (0xE2D) - EQ2_8 */ - { 0x00000e2e, 0x04cc }, /* R3630 (0xE2E) - EQ2_9 */ - { 0x00000e2f, 0x1c9b }, /* R3631 (0xE2F) - EQ2_10 */ - { 0x00000e30, 0xf337 }, /* R3632 (0xE30) - EQ2_11 */ - { 0x00000e31, 0x040b }, /* R3633 (0xE31) - EQ2_12 */ - { 0x00000e32, 0x0cbb }, /* R3634 (0xE32) - EQ2_13 */ - { 0x00000e33, 0x16f8 }, /* R3635 (0xE33) - EQ2_14 */ - { 0x00000e34, 0xf7d9 }, /* R3636 (0xE34) - EQ2_15 */ - { 0x00000e35, 0x040a }, /* R3637 (0xE35) - EQ2_16 */ - { 0x00000e36, 0x1f14 }, /* R3638 (0xE36) - EQ2_17 */ - { 0x00000e37, 0x058c }, /* R3639 (0xE37) - EQ2_18 */ - { 0x00000e38, 0x0563 }, /* R3640 (0xE38) - EQ2_19 */ - { 0x00000e39, 0x4000 }, /* R3641 (0xE39) - EQ2_20 */ - { 0x00000e3a, 0x0b75 }, /* R3642 (0xE3A) - EQ2_21 */ - { 0x00000e3c, 0x6318 }, /* R3644 (0xE3C) - EQ3_1 */ - { 0x00000e3d, 0x6300 }, /* R3645 (0xE3D) - EQ3_2 */ - { 0x00000e3e, 0x0fc8 }, /* R3646 (0xE3E) - EQ3_3 */ - { 0x00000e3f, 0x03fe }, /* R3647 (0xE3F) - EQ3_4 */ - { 0x00000e40, 0x00e0 }, /* R3648 (0xE40) - EQ3_5 */ - { 0x00000e41, 0x1ec4 }, /* R3649 (0xE41) - EQ3_6 */ - { 0x00000e42, 0xf136 }, /* R3650 (0xE42) - EQ3_7 */ - { 0x00000e43, 0x0409 }, /* R3651 (0xE43) - EQ3_8 */ - { 0x00000e44, 0x04cc }, /* R3652 (0xE44) - EQ3_9 */ - { 0x00000e45, 0x1c9b }, /* R3653 (0xE45) - EQ3_10 */ - { 0x00000e46, 0xf337 }, /* R3654 (0xE46) - EQ3_11 */ - { 0x00000e47, 0x040b }, /* R3655 (0xE47) - EQ3_12 */ - { 0x00000e48, 0x0cbb }, /* R3656 (0xE48) - EQ3_13 */ - { 0x00000e49, 0x16f8 }, /* R3657 (0xE49) - EQ3_14 */ - { 0x00000e4a, 0xf7d9 }, /* R3658 (0xE4A) - EQ3_15 */ - { 0x00000e4b, 0x040a }, /* R3659 (0xE4B) - EQ3_16 */ - { 0x00000e4c, 0x1f14 }, /* R3660 (0xE4C) - EQ3_17 */ - { 0x00000e4d, 0x058c }, /* R3661 (0xE4D) - EQ3_18 */ - { 0x00000e4e, 0x0563 }, /* R3662 (0xE4E) - EQ3_19 */ - { 0x00000e4f, 0x4000 }, /* R3663 (0xE4F) - EQ3_20 */ - { 0x00000e50, 0x0b75 }, /* R3664 (0xE50) - EQ3_21 */ - { 0x00000e52, 0x6318 }, /* R3666 (0xE52) - EQ4_1 */ - { 0x00000e53, 0x6300 }, /* R3667 (0xE53) - EQ4_2 */ - { 0x00000e54, 0x0fc8 }, /* R3668 (0xE54) - EQ4_3 */ - { 0x00000e55, 0x03fe }, /* R3669 (0xE55) - EQ4_4 */ - { 0x00000e56, 0x00e0 }, /* R3670 (0xE56) - EQ4_5 */ - { 0x00000e57, 0x1ec4 }, /* R3671 (0xE57) - EQ4_6 */ - { 0x00000e58, 0xf136 }, /* R3672 (0xE58) - EQ4_7 */ - { 0x00000e59, 0x0409 }, /* R3673 (0xE59) - EQ4_8 */ - { 0x00000e5a, 0x04cc }, /* R3674 (0xE5A) - EQ4_9 */ - { 0x00000e5b, 0x1c9b }, /* R3675 (0xE5B) - EQ4_10 */ - { 0x00000e5c, 0xf337 }, /* R3676 (0xE5C) - EQ4_11 */ - { 0x00000e5d, 0x040b }, /* R3677 (0xE5D) - EQ4_12 */ - { 0x00000e5e, 0x0cbb }, /* R3678 (0xE5E) - EQ4_13 */ - { 0x00000e5f, 0x16f8 }, /* R3679 (0xE5F) - EQ4_14 */ - { 0x00000e60, 0xf7d9 }, /* R3680 (0xE60) - EQ4_15 */ - { 0x00000e61, 0x040a }, /* R3681 (0xE61) - EQ4_16 */ - { 0x00000e62, 0x1f14 }, /* R3682 (0xE62) - EQ4_17 */ - { 0x00000e63, 0x058c }, /* R3683 (0xE63) - EQ4_18 */ - { 0x00000e64, 0x0563 }, /* R3684 (0xE64) - EQ4_19 */ - { 0x00000e65, 0x4000 }, /* R3685 (0xE65) - EQ4_20 */ - { 0x00000e66, 0x0b75 }, /* R3686 (0xE66) - EQ4_21 */ - { 0x00000e80, 0x0018 }, /* R3712 (0xE80) - DRC1 ctrl1 */ - { 0x00000e81, 0x0933 }, /* R3713 (0xE81) - DRC1 ctrl2 */ - { 0x00000e82, 0x0018 }, /* R3714 (0xE82) - DRC1 ctrl3 */ - { 0x00000e83, 0x0000 }, /* R3715 (0xE83) - DRC1 ctrl4 */ - { 0x00000e84, 0x0000 }, /* R3716 (0xE84) - DRC1 ctrl5 */ - { 0x00000e88, 0x0018 }, /* R3720 (0xE88) - DRC2 ctrl1 */ - { 0x00000e89, 0x0933 }, /* R3721 (0xE89) - DRC2 ctrl2 */ - { 0x00000e8a, 0x0018 }, /* R3722 (0xE8A) - DRC2 ctrl3 */ - { 0x00000e8b, 0x0000 }, /* R3723 (0xE8B) - DRC2 ctrl4 */ - { 0x00000e8c, 0x0000 }, /* R3724 (0xE8C) - DRC2 ctrl5 */ - { 0x00000ec0, 0x0000 }, /* R3776 (0xEC0) - HPLPF1_1 */ - { 0x00000ec1, 0x0000 }, /* R3777 (0xEC1) - HPLPF1_2 */ - { 0x00000ec4, 0x0000 }, /* R3780 (0xEC4) - HPLPF2_1 */ - { 0x00000ec5, 0x0000 }, /* R3781 (0xEC5) - HPLPF2_2 */ - { 0x00000ec8, 0x0000 }, /* R3784 (0xEC8) - HPLPF3_1 */ - { 0x00000ec9, 0x0000 }, /* R3785 (0xEC9) - HPLPF3_2 */ - { 0x00000ecc, 0x0000 }, /* R3788 (0xECC) - HPLPF4_1 */ - { 0x00000ecd, 0x0000 }, /* R3789 (0xECD) - HPLPF4_2 */ - { 0x00000ed0, 0x0000 }, /* R3792 (0xED0) - ASRC2_ENABLE */ - { 0x00000ed2, 0x0000 }, /* R3794 (0xED2) - ASRC2_RATE1 */ - { 0x00000ed3, 0x4000 }, /* R3795 (0xED3) - ASRC2_RATE2 */ - { 0x00000ee0, 0x0000 }, /* R3808 (0xEE0) - ASRC1_ENABLE */ - { 0x00000ee2, 0x0000 }, /* R3810 (0xEE2) - ASRC1_RATE1 */ - { 0x00000ee3, 0x4000 }, /* R3811 (0xEE3) - ASRC1_RATE2 */ - { 0x00000ef0, 0x0000 }, /* R3824 (0xEF0) - ISRC 1 CTRL 1 */ - { 0x00000ef1, 0x0001 }, /* R3825 (0xEF1) - ISRC 1 CTRL 2 */ - { 0x00000ef2, 0x0000 }, /* R3826 (0xEF2) - ISRC 1 CTRL 3 */ - { 0x00000ef3, 0x0000 }, /* R3827 (0xEF3) - ISRC 2 CTRL 1 */ - { 0x00000ef4, 0x0001 }, /* R3828 (0xEF4) - ISRC 2 CTRL 2 */ - { 0x00000ef5, 0x0000 }, /* R3829 (0xEF5) - ISRC 2 CTRL 3 */ - { 0x00000ef6, 0x0000 }, /* R3830 (0xEF6) - ISRC 3 CTRL 1 */ - { 0x00000ef7, 0x0001 }, /* R3831 (0xEF7) - ISRC 3 CTRL 2 */ - { 0x00000ef8, 0x0000 }, /* R3832 (0xEF8) - ISRC 3 CTRL 3 */ - { 0x00000ef9, 0x0000 }, /* R3833 - ISRC 4 CTRL 1 */ - { 0x00000efa, 0x0001 }, /* R3834 - ISRC 4 CTRL 2 */ - { 0x00000efb, 0x0000 }, /* R3835 - ISRC 4 CTRL 3 */ - { 0x00000F01, 0x0000 }, /* R3841 - ANC_SRC */ - { 0x00000F02, 0x0000 }, /* R3842 - DSP Status */ - { 0x00000F08, 0x001c }, /* R3848 - ANC Coefficient */ - { 0x00000F09, 0x0000 }, /* R3849 - ANC Coefficient */ - { 0x00000F0A, 0x0000 }, /* R3850 - ANC Coefficient */ - { 0x00000F0B, 0x0000 }, /* R3851 - ANC Coefficient */ - { 0x00000F0C, 0x0000 }, /* R3852 - ANC Coefficient */ - { 0x00000F0D, 0x0000 }, /* R3853 - ANC Coefficient */ - { 0x00000F0E, 0x0000 }, /* R3854 - ANC Coefficient */ - { 0x00000F0F, 0x0000 }, /* R3855 - ANC Coefficient */ - { 0x00000F10, 0x0000 }, /* R3856 - ANC Coefficient */ - { 0x00000F11, 0x0000 }, /* R3857 - ANC Coefficient */ - { 0x00000F12, 0x0000 }, /* R3858 - ANC Coefficient */ - { 0x00000F15, 0x0000 }, /* R3861 - FCL Filter Control */ - { 0x00000F17, 0x0004 }, /* R3863 - FCL ADC Reformatter Control */ - { 0x00000F18, 0x0004 }, /* R3864 - ANC Coefficient */ - { 0x00000F19, 0x0002 }, /* R3865 - ANC Coefficient */ - { 0x00000F1A, 0x0000 }, /* R3866 - ANC Coefficient */ - { 0x00000F1B, 0x0010 }, /* R3867 - ANC Coefficient */ - { 0x00000F1C, 0x0000 }, /* R3868 - ANC Coefficient */ - { 0x00000F1D, 0x0000 }, /* R3869 - ANC Coefficient */ - { 0x00000F1E, 0x0000 }, /* R3870 - ANC Coefficient */ - { 0x00000F1F, 0x0000 }, /* R3871 - ANC Coefficient */ - { 0x00000F20, 0x0000 }, /* R3872 - ANC Coefficient */ - { 0x00000F21, 0x0000 }, /* R3873 - ANC Coefficient */ - { 0x00000F22, 0x0000 }, /* R3874 - ANC Coefficient */ - { 0x00000F23, 0x0000 }, /* R3875 - ANC Coefficient */ - { 0x00000F24, 0x0000 }, /* R3876 - ANC Coefficient */ - { 0x00000F25, 0x0000 }, /* R3877 - ANC Coefficient */ - { 0x00000F26, 0x0000 }, /* R3878 - ANC Coefficient */ - { 0x00000F27, 0x0000 }, /* R3879 - ANC Coefficient */ - { 0x00000F28, 0x0000 }, /* R3880 - ANC Coefficient */ - { 0x00000F29, 0x0000 }, /* R3881 - ANC Coefficient */ - { 0x00000F2A, 0x0000 }, /* R3882 - ANC Coefficient */ - { 0x00000F2B, 0x0000 }, /* R3883 - ANC Coefficient */ - { 0x00000F2C, 0x0000 }, /* R3884 - ANC Coefficient */ - { 0x00000F2D, 0x0000 }, /* R3885 - ANC Coefficient */ - { 0x00000F2E, 0x0000 }, /* R3886 - ANC Coefficient */ - { 0x00000F2F, 0x0000 }, /* R3887 - ANC Coefficient */ - { 0x00000F30, 0x0000 }, /* R3888 - ANC Coefficient */ - { 0x00000F31, 0x0000 }, /* R3889 - ANC Coefficient */ - { 0x00000F32, 0x0000 }, /* R3890 - ANC Coefficient */ - { 0x00000F33, 0x0000 }, /* R3891 - ANC Coefficient */ - { 0x00000F34, 0x0000 }, /* R3892 - ANC Coefficient */ - { 0x00000F35, 0x0000 }, /* R3893 - ANC Coefficient */ - { 0x00000F36, 0x0000 }, /* R3894 - ANC Coefficient */ - { 0x00000F37, 0x0000 }, /* R3895 - ANC Coefficient */ - { 0x00000F38, 0x0000 }, /* R3896 - ANC Coefficient */ - { 0x00000F39, 0x0000 }, /* R3897 - ANC Coefficient */ - { 0x00000F3A, 0x0000 }, /* R3898 - ANC Coefficient */ - { 0x00000F3B, 0x0000 }, /* R3899 - ANC Coefficient */ - { 0x00000F3C, 0x0000 }, /* R3900 - ANC Coefficient */ - { 0x00000F3D, 0x0000 }, /* R3901 - ANC Coefficient */ - { 0x00000F3E, 0x0000 }, /* R3902 - ANC Coefficient */ - { 0x00000F3F, 0x0000 }, /* R3903 - ANC Coefficient */ - { 0x00000F40, 0x0000 }, /* R3904 - ANC Coefficient */ - { 0x00000F41, 0x0000 }, /* R3905 - ANC Coefficient */ - { 0x00000F42, 0x0000 }, /* R3906 - ANC Coefficient */ - { 0x00000F43, 0x0000 }, /* R3907 - ANC Coefficient */ - { 0x00000F44, 0x0000 }, /* R3908 - ANC Coefficient */ - { 0x00000F45, 0x0000 }, /* R3909 - ANC Coefficient */ - { 0x00000F46, 0x0000 }, /* R3910 - ANC Coefficient */ - { 0x00000F47, 0x0000 }, /* R3911 - ANC Coefficient */ - { 0x00000F48, 0x0000 }, /* R3912 - ANC Coefficient */ - { 0x00000F49, 0x0000 }, /* R3913 - ANC Coefficient */ - { 0x00000F4A, 0x0000 }, /* R3914 - ANC Coefficient */ - { 0x00000F4B, 0x0000 }, /* R3915 - ANC Coefficient */ - { 0x00000F4C, 0x0000 }, /* R3916 - ANC Coefficient */ - { 0x00000F4D, 0x0000 }, /* R3917 - ANC Coefficient */ - { 0x00000F4E, 0x0000 }, /* R3918 - ANC Coefficient */ - { 0x00000F4F, 0x0000 }, /* R3919 - ANC Coefficient */ - { 0x00000F50, 0x0000 }, /* R3920 - ANC Coefficient */ - { 0x00000F51, 0x0000 }, /* R3921 - ANC Coefficient */ - { 0x00000F52, 0x0000 }, /* R3922 - ANC Coefficient */ - { 0x00000F53, 0x0000 }, /* R3923 - ANC Coefficient */ - { 0x00000F54, 0x0000 }, /* R3924 - ANC Coefficient */ - { 0x00000F55, 0x0000 }, /* R3925 - ANC Coefficient */ - { 0x00000F56, 0x0000 }, /* R3926 - ANC Coefficient */ - { 0x00000F57, 0x0000 }, /* R3927 - ANC Coefficient */ - { 0x00000F58, 0x0000 }, /* R3928 - ANC Coefficient */ - { 0x00000F59, 0x0000 }, /* R3929 - ANC Coefficient */ - { 0x00000F5A, 0x0000 }, /* R3930 - ANC Coefficient */ - { 0x00000F5B, 0x0000 }, /* R3931 - ANC Coefficient */ - { 0x00000F5C, 0x0000 }, /* R3932 - ANC Coefficient */ - { 0x00000F5D, 0x0000 }, /* R3933 - ANC Coefficient */ - { 0x00000F5E, 0x0000 }, /* R3934 - ANC Coefficient */ - { 0x00000F5F, 0x0000 }, /* R3935 - ANC Coefficient */ - { 0x00000F60, 0x0000 }, /* R3936 - ANC Coefficient */ - { 0x00000F61, 0x0000 }, /* R3937 - ANC Coefficient */ - { 0x00000F62, 0x0000 }, /* R3938 - ANC Coefficient */ - { 0x00000F63, 0x0000 }, /* R3939 - ANC Coefficient */ - { 0x00000F64, 0x0000 }, /* R3940 - ANC Coefficient */ - { 0x00000F65, 0x0000 }, /* R3941 - ANC Coefficient */ - { 0x00000F66, 0x0000 }, /* R3942 - ANC Coefficient */ - { 0x00000F67, 0x0000 }, /* R3943 - ANC Coefficient */ - { 0x00000F68, 0x0000 }, /* R3944 - ANC Coefficient */ - { 0x00000F69, 0x0000 }, /* R3945 - ANC Coefficient */ - { 0x00000F71, 0x0000 }, /* R3953 - FCR Filter Control */ - { 0x00000F73, 0x0004 }, /* R3955 - FCR ADC Reformatter Control */ - { 0x00000F74, 0x0004 }, /* R3956 - ANC Coefficient */ - { 0x00000F75, 0x0002 }, /* R3957 - ANC Coefficient */ - { 0x00000F76, 0x0000 }, /* R3958 - ANC Coefficient */ - { 0x00000F77, 0x0010 }, /* R3959 - ANC Coefficient */ - { 0x00000F78, 0x0000 }, /* R3960 - ANC Coefficient */ - { 0x00000F79, 0x0000 }, /* R3961 - ANC Coefficient */ - { 0x00000F7A, 0x0000 }, /* R3962 - ANC Coefficient */ - { 0x00000F7B, 0x0000 }, /* R3963 - ANC Coefficient */ - { 0x00000F7C, 0x0000 }, /* R3964 - ANC Coefficient */ - { 0x00000F7D, 0x0000 }, /* R3965 - ANC Coefficient */ - { 0x00000F7E, 0x0000 }, /* R3966 - ANC Coefficient */ - { 0x00000F7F, 0x0000 }, /* R3967 - ANC Coefficient */ - { 0x00000F80, 0x0000 }, /* R3968 - ANC Coefficient */ - { 0x00000F81, 0x0000 }, /* R3969 - ANC Coefficient */ - { 0x00000F82, 0x0000 }, /* R3970 - ANC Coefficient */ - { 0x00000F83, 0x0000 }, /* R3971 - ANC Coefficient */ - { 0x00000F84, 0x0000 }, /* R3972 - ANC Coefficient */ - { 0x00000F85, 0x0000 }, /* R3973 - ANC Coefficient */ - { 0x00000F86, 0x0000 }, /* R3974 - ANC Coefficient */ - { 0x00000F87, 0x0000 }, /* R3975 - ANC Coefficient */ - { 0x00000F88, 0x0000 }, /* R3976 - ANC Coefficient */ - { 0x00000F89, 0x0000 }, /* R3977 - ANC Coefficient */ - { 0x00000F8A, 0x0000 }, /* R3978 - ANC Coefficient */ - { 0x00000F8B, 0x0000 }, /* R3979 - ANC Coefficient */ - { 0x00000F8C, 0x0000 }, /* R3980 - ANC Coefficient */ - { 0x00000F8D, 0x0000 }, /* R3981 - ANC Coefficient */ - { 0x00000F8E, 0x0000 }, /* R3982 - ANC Coefficient */ - { 0x00000F8F, 0x0000 }, /* R3983 - ANC Coefficient */ - { 0x00000F90, 0x0000 }, /* R3984 - ANC Coefficient */ - { 0x00000F91, 0x0000 }, /* R3985 - ANC Coefficient */ - { 0x00000F92, 0x0000 }, /* R3986 - ANC Coefficient */ - { 0x00000F93, 0x0000 }, /* R3987 - ANC Coefficient */ - { 0x00000F94, 0x0000 }, /* R3988 - ANC Coefficient */ - { 0x00000F95, 0x0000 }, /* R3989 - ANC Coefficient */ - { 0x00000F96, 0x0000 }, /* R3990 - ANC Coefficient */ - { 0x00000F97, 0x0000 }, /* R3991 - ANC Coefficient */ - { 0x00000F98, 0x0000 }, /* R3992 - ANC Coefficient */ - { 0x00000F99, 0x0000 }, /* R3993 - ANC Coefficient */ - { 0x00000F9A, 0x0000 }, /* R3994 - ANC Coefficient */ - { 0x00000F9B, 0x0000 }, /* R3995 - ANC Coefficient */ - { 0x00000F9C, 0x0000 }, /* R3996 - ANC Coefficient */ - { 0x00000F9D, 0x0000 }, /* R3997 - ANC Coefficient */ - { 0x00000F9E, 0x0000 }, /* R3998 - ANC Coefficient */ - { 0x00000F9F, 0x0000 }, /* R3999 - ANC Coefficient */ - { 0x00000FA0, 0x0000 }, /* R4000 - ANC Coefficient */ - { 0x00000FA1, 0x0000 }, /* R4001 - ANC Coefficient */ - { 0x00000FA2, 0x0000 }, /* R4002 - ANC Coefficient */ - { 0x00000FA3, 0x0000 }, /* R4003 - ANC Coefficient */ - { 0x00000FA4, 0x0000 }, /* R4004 - ANC Coefficient */ - { 0x00000FA5, 0x0000 }, /* R4005 - ANC Coefficient */ - { 0x00000FA6, 0x0000 }, /* R4006 - ANC Coefficient */ - { 0x00000FA7, 0x0000 }, /* R4007 - ANC Coefficient */ - { 0x00000FA8, 0x0000 }, /* R4008 - ANC Coefficient */ - { 0x00000FA9, 0x0000 }, /* R4009 - ANC Coefficient */ - { 0x00000FAA, 0x0000 }, /* R4010 - ANC Coefficient */ - { 0x00000FAB, 0x0000 }, /* R4011 - ANC Coefficient */ - { 0x00000FAC, 0x0000 }, /* R4012 - ANC Coefficient */ - { 0x00000FAD, 0x0000 }, /* R4013 - ANC Coefficient */ - { 0x00000FAE, 0x0000 }, /* R4014 - ANC Coefficient */ - { 0x00000FAF, 0x0000 }, /* R4015 - ANC Coefficient */ - { 0x00000FB0, 0x0000 }, /* R4016 - ANC Coefficient */ - { 0x00000FB1, 0x0000 }, /* R4017 - ANC Coefficient */ - { 0x00000FB2, 0x0000 }, /* R4018 - ANC Coefficient */ - { 0x00000FB3, 0x0000 }, /* R4019 - ANC Coefficient */ - { 0x00000FB4, 0x0000 }, /* R4020 - ANC Coefficient */ - { 0x00000FB5, 0x0000 }, /* R4021 - ANC Coefficient */ - { 0x00000FB6, 0x0000 }, /* R4022 - ANC Coefficient */ - { 0x00000FB7, 0x0000 }, /* R4023 - ANC Coefficient */ - { 0x00000FB8, 0x0000 }, /* R4024 - ANC Coefficient */ - { 0x00000FB9, 0x0000 }, /* R4025 - ANC Coefficient */ - { 0x00000FBA, 0x0000 }, /* R4026 - ANC Coefficient */ - { 0x00000FBB, 0x0000 }, /* R4027 - ANC Coefficient */ - { 0x00000FBC, 0x0000 }, /* R4028 - ANC Coefficient */ - { 0x00000FBD, 0x0000 }, /* R4029 - ANC Coefficient */ - { 0x00000FBE, 0x0000 }, /* R4030 - ANC Coefficient */ - { 0x00000FBF, 0x0000 }, /* R4031 - ANC Coefficient */ - { 0x00000FC0, 0x0000 }, /* R4032 - ANC Coefficient */ - { 0x00000FC1, 0x0000 }, /* R4033 - ANC Coefficient */ - { 0x00000FC2, 0x0000 }, /* R4034 - ANC Coefficient */ - { 0x00000FC3, 0x0000 }, /* R4035 - ANC Coefficient */ - { 0x00000FC4, 0x0000 }, /* R4036 - ANC Coefficient */ - { 0x00000FC5, 0x0000 }, /* R4037 - ANC Coefficient */ - { 0x00001300, 0x050E }, /* R4864 - DAC Comp 1 */ - { 0x00001302, 0x0101 }, /* R4866 - DAC Comp 2 */ - { 0x00001380, 0x0425 }, - { 0x00001381, 0xF6D8 }, - { 0x00001382, 0x0632 }, - { 0x00001383, 0xFEC8 }, - { 0x00001390, 0x042F }, - { 0x00001391, 0xF6CA }, - { 0x00001392, 0x0637 }, - { 0x00001393, 0xFEC8 }, - { 0x000013a0, 0x0000 }, - { 0x000013a1, 0x0000 }, - { 0x000013a2, 0x0000 }, - { 0x000013a3, 0x0000 }, - { 0x000013b0, 0x0000 }, - { 0x000013b1, 0x0000 }, - { 0x000013b2, 0x0000 }, - { 0x000013b3, 0x0000 }, - { 0x000013c0, 0x0000 }, - { 0x000013c1, 0x0000 }, - { 0x000013c2, 0x0000 }, - { 0x000013c3, 0x0000 }, - { 0x000013d0, 0x0000 }, - { 0x000013d1, 0x0000 }, - { 0x000013d2, 0x0000 }, - { 0x000013d3, 0x0000 }, - { 0x00001400, 0x0000 }, - { 0x00001401, 0x0000 }, - { 0x00001402, 0x0000 }, - { 0x00001403, 0x0000 }, - { 0x00001410, 0x0000 }, - { 0x00001411, 0x0000 }, - { 0x00001412, 0x0000 }, - { 0x00001413, 0x0000 }, - { 0x00001480, 0x0000 }, /*R5248 - DFC1_CTRL*/ - { 0x00001482, 0x1F00 }, /*R5250 - DFC1_RX*/ - { 0x00001484, 0x1F00 }, /*R5252 - DFC1_TX*/ - { 0x00001486, 0x0000 }, - { 0x00001488, 0x1F00 }, - { 0x0000148A, 0x1F00 }, - { 0x0000148C, 0x0000 }, - { 0x0000148E, 0x1F00 }, - { 0x00001490, 0x1F00 }, - { 0x00001492, 0x0000 }, - { 0x00001494, 0x1F00 }, - { 0x00001496, 0x1F00 }, - { 0x00001498, 0x0000 }, - { 0x0000149A, 0x1F00 }, - { 0x0000149C, 0x1F00 }, - { 0x0000149E, 0x0000 }, - { 0x000014A0, 0x1F00 }, - { 0x000014A2, 0x1F00 }, - { 0x000014A4, 0x0000 }, - { 0x000014A6, 0x1F00 }, - { 0x000014A8, 0x1F00 }, - { 0x000014AA, 0x0000 }, - { 0x000014AC, 0x1F00 }, - { 0x000014AE, 0x1F00 }, /*R5294 - DFC8_TX */ - { 0x00001700, 0x2001 }, /* R5888 - GPIO1 Control 1 */ - { 0x00001701, 0xF000 }, /* R5889 - GPIO1 Control 2 */ - { 0x00001702, 0x2001 }, /* R5890 - GPIO2 Control 1 */ - { 0x00001703, 0xF000 }, /* R5891 - GPIO2 Control 2 */ - { 0x00001704, 0x2001 }, /* R5892 - GPIO3 Control 1 */ - { 0x00001705, 0xF000 }, /* R5893 - GPIO3 Control 2 */ - { 0x00001706, 0x2001 }, /* R5894 - GPIO4 Control 1 */ - { 0x00001707, 0xF000 }, /* R5895 - GPIO4 Control 2 */ - { 0x00001708, 0x2001 }, /* R5896 - GPIO5 Control 1 */ - { 0x00001709, 0xF000 }, /* R5897 - GPIO5 Control 2 */ - { 0x0000170A, 0x2001 }, /* R5898 - GPIO6 Control 1 */ - { 0x0000170B, 0xF000 }, /* R5899 - GPIO6 Control 2 */ - { 0x0000170C, 0x2001 }, /* R5900 - GPIO7 Control 1 */ - { 0x0000170D, 0xF000 }, /* R5901 - GPIO7 Control 2 */ - { 0x0000170E, 0x2001 }, /* R5902 - GPIO8 Control 1 */ - { 0x0000170F, 0xF000 }, /* R5903 - GPIO8 Control 2 */ - { 0x00001710, 0x2001 }, /* R5904 - GPIO9 Control 1 */ - { 0x00001711, 0xF000 }, /* R5905 - GPIO9 Control 2 */ - { 0x00001712, 0x2001 }, /* R5906 - GPIO10 Control 1 */ - { 0x00001713, 0xF000 }, /* R5907 - GPIO10 Control 2 */ - { 0x00001714, 0x2001 }, /* R5908 - GPIO11 Control 1 */ - { 0x00001715, 0xF000 }, /* R5909 - GPIO11 Control 2 */ - { 0x00001716, 0x2001 }, /* R5910 - GPIO12 Control 1 */ - { 0x00001717, 0xF000 }, /* R5911 - GPIO12 Control 2 */ - { 0x00001718, 0x2001 }, /* R5912 - GPIO13 Control 1 */ - { 0x00001719, 0xF000 }, /* R5913 - GPIO13 Control 2 */ - { 0x0000171A, 0x2001 }, /* R5914 - GPIO14 Control 1 */ - { 0x0000171B, 0xF000 }, /* R5915 - GPIO14 Control 2 */ - { 0x0000171C, 0x2001 }, /* R5916 - GPIO15 Control 1 */ - { 0x0000171D, 0xF000 }, /* R5917 - GPIO15 Control 2 */ - { 0x0000171E, 0x2001 }, /* R5918 - GPIO16 Control 1 */ - { 0x0000171F, 0xF000 }, /* R5919 - GPIO16 Control 2 */ - { 0x00001720, 0x2001 }, /* R5920 - GPIO17 Control 1 */ - { 0x00001721, 0xF000 }, /* R5921 - GPIO17 Control 2 */ - { 0x00001722, 0x2001 }, /* R5922 - GPIO18 Control 1 */ - { 0x00001723, 0xF000 }, /* R5923 - GPIO18 Control 2 */ - { 0x00001724, 0x2001 }, /* R5924 - GPIO19 Control 1 */ - { 0x00001725, 0xF000 }, /* R5925 - GPIO19 Control 2 */ - { 0x00001726, 0x2001 }, /* R5926 - GPIO20 Control 1 */ - { 0x00001727, 0xF000 }, /* R5927 - GPIO20 Control 2 */ - { 0x00001728, 0x2001 }, /* R5928 - GPIO21 Control 1 */ - { 0x00001729, 0xF000 }, /* R5929 - GPIO21 Control 2 */ - { 0x0000172A, 0x2001 }, /* R5930 - GPIO22 Control 1 */ - { 0x0000172B, 0xF000 }, /* R5931 - GPIO22 Control 2 */ - { 0x0000172C, 0x2001 }, /* R5932 - GPIO23 Control 1 */ - { 0x0000172D, 0xF000 }, /* R5933 - GPIO23 Control 2 */ - { 0x0000172E, 0x2001 }, /* R5934 - GPIO24 Control 1 */ - { 0x0000172F, 0xF000 }, /* R5935 - GPIO24 Control 2 */ - { 0x00001730, 0x2001 }, /* R5936 - GPIO25 Control 1 */ - { 0x00001731, 0xF000 }, /* R5937 - GPIO25 Control 2 */ - { 0x00001732, 0x2001 }, /* R5938 - GPIO26 Control 1 */ - { 0x00001733, 0xF000 }, /* R5939 - GPIO26 Control 2 */ - { 0x00001734, 0x2001 }, /* R5940 - GPIO27 Control 1 */ - { 0x00001735, 0xF000 }, /* R5941 - GPIO27 Control 2 */ - { 0x00001736, 0x2001 }, /* R5942 - GPIO28 Control 1 */ - { 0x00001737, 0xF000 }, /* R5943 - GPIO28 Control 2 */ - { 0x00001738, 0x2001 }, /* R5944 - GPIO29 Control 1 */ - { 0x00001739, 0xF000 }, /* R5945 - GPIO29 Control 2 */ - { 0x0000173A, 0x2001 }, /* R5946 - GPIO30 Control 1 */ - { 0x0000173B, 0xF000 }, /* R5947 - GPIO30 Control 2 */ - { 0x0000173C, 0x2001 }, /* R5948 - GPIO31 Control 1 */ - { 0x0000173D, 0xF000 }, /* R5949 - GPIO31 Control 2 */ - { 0x0000173E, 0x2001 }, /* R5950 - GPIO32 Control 1 */ - { 0x0000173F, 0xF000 }, /* R5951 - GPIO32 Control 2 */ - { 0x00001740, 0x2001 }, /* R5952 - GPIO33 Control 1 */ - { 0x00001741, 0xF000 }, /* R5953 - GPIO33 Control 2 */ - { 0x00001742, 0x2001 }, /* R5954 - GPIO34 Control 1 */ - { 0x00001743, 0xF000 }, /* R5955 - GPIO34 Control 2 */ - { 0x00001744, 0x2001 }, /* R5956 - GPIO35 Control 1 */ - { 0x00001745, 0xF000 }, /* R5957 - GPIO35 Control 2 */ - { 0x00001746, 0x2001 }, /* R5958 - GPIO36 Control 1 */ - { 0x00001747, 0xF000 }, /* R5959 - GPIO36 Control 2 */ - { 0x00001748, 0x2001 }, /* R5960 - GPIO37 Control 1 */ - { 0x00001749, 0xF000 }, /* R5961 - GPIO37 Control 2 */ - { 0x0000174A, 0x2001 }, /* R5962 - GPIO38 Control 1 */ - { 0x0000174B, 0xF000 }, /* R5963 - GPIO38 Control 2 */ - { 0x00001840, 0xFFFF }, /* R6208 - IRQ1 Mask 1 */ - { 0x00001841, 0xFFFF }, /* R6209 - IRQ1 Mask 2 */ - { 0x00001842, 0xFFFF }, /* R6210 - IRQ1 Mask 3 */ - { 0x00001843, 0xFFFF }, /* R6211 - IRQ1 Mask 4 */ - { 0x00001844, 0xFFFF }, /* R6212 - IRQ1 Mask 5 */ - { 0x00001845, 0xFFFF }, /* R6213 - IRQ1 Mask 6 */ - { 0x00001846, 0xFFFF }, /* R6214 - IRQ1 Mask 7 */ - { 0x00001847, 0xFFFF }, /* R6215 - IRQ1 Mask 8 */ - { 0x00001848, 0xFFFF }, /* R6216 - IRQ1 Mask 9 */ - { 0x00001849, 0xFFFF }, /* R6217 - IRQ1 Mask 10 */ - { 0x0000184A, 0xFFFF }, /* R6218 - IRQ1 Mask 11 */ - { 0x0000184B, 0xFFFF }, /* R6219 - IRQ1 Mask 12 */ - { 0x0000184C, 0xFFFF }, /* R6220 - IRQ1 Mask 13 */ - { 0x0000184D, 0xFFFF }, /* R6221 - IRQ1 Mask 14 */ - { 0x0000184E, 0xFFFF }, /* R6222 - IRQ1 Mask 15 */ - { 0x0000184F, 0xFFFF }, /* R6223 - IRQ1 Mask 16 */ - { 0x00001850, 0xFFFF }, /* R6224 - IRQ1 Mask 17 */ - { 0x00001851, 0xFFFF }, /* R6225 - IRQ1 Mask 18 */ - { 0x00001852, 0xFFFF }, /* R6226 - IRQ1 Mask 19 */ - { 0x00001853, 0xFFFF }, /* R6227 - IRQ1 Mask 20 */ - { 0x00001854, 0xFFFF }, /* R6228 - IRQ1 Mask 21 */ - { 0x00001855, 0xFFFF }, /* R6229 - IRQ1 Mask 22 */ - { 0x00001856, 0xFFFF }, /* R6230 - IRQ1 Mask 23 */ - { 0x00001857, 0xFFFF }, /* R6231 - IRQ1 Mask 24 */ - { 0x00001858, 0xFFFF }, /* R6232 - IRQ1 Mask 25 */ - { 0x00001859, 0xFFFF }, /* R6233 - IRQ1 Mask 26 */ - { 0x0000185A, 0xFFFF }, /* R6234 - IRQ1 Mask 27 */ - { 0x0000185B, 0xFFFF }, /* R6235 - IRQ1 Mask 28 */ - { 0x0000185C, 0xFFFF }, /* R6236 - IRQ1 Mask 29 */ - { 0x0000185D, 0xFFFF }, /* R6237 - IRQ1 Mask 30 */ - { 0x0000185E, 0xFFFF }, /* R6238 - IRQ1 Mask 31 */ - { 0x0000185F, 0xFFFF }, /* R6239 - IRQ1 Mask 32 */ - { 0x00001860, 0xFFFF }, /* R6240 - IRQ1 Mask 33 */ - { 0x00001948, 0xFFFF }, /* R6472 - IRQ2 Mask 9 */ - { 0x00001A06, 0x0000 }, /* R6662 - Interrupt Debounce 7 */ - { 0x00001A80, 0x4400 }, /* R6784 - IRQ1 CTRL */ -}; - -static bool cs47l90_is_adsp_memory(unsigned int reg) -{ - switch (reg) { - case 0x080000 ... 0x088ffe: - case 0x0a0000 ... 0x0a9ffe: - case 0x0c0000 ... 0x0c3ffe: - case 0x0e0000 ... 0x0e1ffe: - case 0x100000 ... 0x10effe: - case 0x120000 ... 0x12bffe: - case 0x136000 ... 0x137ffe: - case 0x140000 ... 0x14bffe: - case 0x160000 ... 0x161ffe: - case 0x180000 ... 0x18effe: - case 0x1a0000 ... 0x1b1ffe: - case 0x1b6000 ... 0x1b7ffe: - case 0x1c0000 ... 0x1cbffe: - case 0x1e0000 ... 0x1e1ffe: - case 0x200000 ... 0x208ffe: - case 0x220000 ... 0x229ffe: - case 0x240000 ... 0x243ffe: - case 0x260000 ... 0x261ffe: - case 0x280000 ... 0x288ffe: - case 0x2a0000 ... 0x2a9ffe: - case 0x2c0000 ... 0x2c3ffe: - case 0x2e0000 ... 0x2e1ffe: - case 0x300000 ... 0x308ffe: - case 0x320000 ... 0x333ffe: - case 0x340000 ... 0x353ffe: - case 0x360000 ... 0x361ffe: - case 0x380000 ... 0x388ffe: - case 0x3a0000 ... 0x3b3ffe: - case 0x3c0000 ... 0x3d3ffe: - case 0x3e0000 ... 0x3e1ffe: - return true; - default: - return false; - } -} - -static bool cs47l90_16bit_readable_register(struct device *dev, - unsigned int reg) -{ - switch (reg) { - case MADERA_SOFTWARE_RESET: - case MADERA_HARDWARE_REVISION: - case MADERA_CTRL_IF_CFG_1: - case MADERA_CTRL_IF_CFG_2: - case MADERA_CTRL_IF_CFG_3: - case MADERA_WRITE_SEQUENCER_CTRL_0: - case MADERA_WRITE_SEQUENCER_CTRL_1: - case MADERA_WRITE_SEQUENCER_CTRL_2: - case MADERA_TONE_GENERATOR_1: - case MADERA_TONE_GENERATOR_2: - case MADERA_TONE_GENERATOR_3: - case MADERA_TONE_GENERATOR_4: - case MADERA_TONE_GENERATOR_5: - case MADERA_PWM_DRIVE_1: - case MADERA_PWM_DRIVE_2: - case MADERA_PWM_DRIVE_3: - case MADERA_SEQUENCE_CONTROL: - case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1: - case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2: - case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3: - case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4: - case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: - case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: - case MADERA_HAPTICS_CONTROL_1: - case MADERA_HAPTICS_CONTROL_2: - case MADERA_HAPTICS_PHASE_1_INTENSITY: - case MADERA_HAPTICS_PHASE_1_DURATION: - case MADERA_HAPTICS_PHASE_2_INTENSITY: - case MADERA_HAPTICS_PHASE_2_DURATION: - case MADERA_HAPTICS_PHASE_3_INTENSITY: - case MADERA_HAPTICS_PHASE_3_DURATION: - case MADERA_HAPTICS_STATUS: - case MADERA_COMFORT_NOISE_GENERATOR: - case MADERA_CLOCK_32K_1: - case MADERA_SYSTEM_CLOCK_1: - case MADERA_SAMPLE_RATE_1: - case MADERA_SAMPLE_RATE_2: - case MADERA_SAMPLE_RATE_3: - case MADERA_SAMPLE_RATE_1_STATUS: - case MADERA_SAMPLE_RATE_2_STATUS: - case MADERA_SAMPLE_RATE_3_STATUS: - case MADERA_ASYNC_CLOCK_1: - case MADERA_ASYNC_SAMPLE_RATE_1: - case MADERA_ASYNC_SAMPLE_RATE_1_STATUS: - case MADERA_ASYNC_SAMPLE_RATE_2: - case MADERA_ASYNC_SAMPLE_RATE_2_STATUS: - case MADERA_DSP_CLOCK_1: - case MADERA_DSP_CLOCK_2: - case MADERA_OUTPUT_SYSTEM_CLOCK: - case MADERA_OUTPUT_ASYNC_CLOCK: - case MADERA_RATE_ESTIMATOR_1: - case MADERA_RATE_ESTIMATOR_2: - case MADERA_RATE_ESTIMATOR_3: - case MADERA_RATE_ESTIMATOR_4: - case MADERA_RATE_ESTIMATOR_5: - case MADERA_FLL1_CONTROL_1: - case MADERA_FLL1_CONTROL_2: - case MADERA_FLL1_CONTROL_3: - case MADERA_FLL1_CONTROL_4: - case MADERA_FLL1_CONTROL_5: - case MADERA_FLL1_CONTROL_6: - case MADERA_FLL1_CONTROL_7: - case MADERA_FLL1_EFS_2: - case MADERA_FLL1_LOOP_FILTER_TEST_1: - case MADERA_FLL1_NCO_TEST_0: - case MADERA_FLL1_SYNCHRONISER_1: - case MADERA_FLL1_SYNCHRONISER_2: - case MADERA_FLL1_SYNCHRONISER_3: - case MADERA_FLL1_SYNCHRONISER_4: - case MADERA_FLL1_SYNCHRONISER_5: - case MADERA_FLL1_SYNCHRONISER_6: - case MADERA_FLL1_SYNCHRONISER_7: - case MADERA_FLL1_SPREAD_SPECTRUM: - case MADERA_FLL1_GPIO_CLOCK: - case MADERA_FLL2_CONTROL_1: - case MADERA_FLL2_CONTROL_2: - case MADERA_FLL2_CONTROL_3: - case MADERA_FLL2_CONTROL_4: - case MADERA_FLL2_CONTROL_5: - case MADERA_FLL2_CONTROL_6: - case MADERA_FLL2_CONTROL_7: - case MADERA_FLL2_EFS_2: - case MADERA_FLL2_LOOP_FILTER_TEST_1: - case MADERA_FLL2_NCO_TEST_0: - case MADERA_FLL2_SYNCHRONISER_1: - case MADERA_FLL2_SYNCHRONISER_2: - case MADERA_FLL2_SYNCHRONISER_3: - case MADERA_FLL2_SYNCHRONISER_4: - case MADERA_FLL2_SYNCHRONISER_5: - case MADERA_FLL2_SYNCHRONISER_6: - case MADERA_FLL2_SYNCHRONISER_7: - case MADERA_FLL2_SPREAD_SPECTRUM: - case MADERA_FLL2_GPIO_CLOCK: - case MADERA_FLLAO_CONTROL_1: - case MADERA_FLLAO_CONTROL_2: - case MADERA_FLLAO_CONTROL_3: - case MADERA_FLLAO_CONTROL_4: - case MADERA_FLLAO_CONTROL_5: - case MADERA_FLLAO_CONTROL_6: - case MADERA_FLLAO_CONTROL_7: - case MADERA_FLLAO_CONTROL_8: - case MADERA_FLLAO_CONTROL_9: - case MADERA_FLLAO_CONTROL_10: - case MADERA_FLLAO_CONTROL_11: - case MADERA_MIC_CHARGE_PUMP_1: - case MADERA_LDO2_CONTROL_1: - case MADERA_MIC_BIAS_CTRL_1: - case MADERA_MIC_BIAS_CTRL_2: - case MADERA_MIC_BIAS_CTRL_5: - case MADERA_MIC_BIAS_CTRL_6: - case MADERA_HP_CTRL_1L: - case MADERA_HP_CTRL_1R: - case MADERA_HP_CTRL_2L: - case MADERA_HP_CTRL_2R: - case MADERA_HP_CTRL_3L: - case MADERA_HP_CTRL_3R: - case MADERA_EDRE_HP_STEREO_CONTROL: - case MADERA_ACCESSORY_DETECT_MODE_1: - case MADERA_HEADPHONE_DETECT_0: - case MADERA_HEADPHONE_DETECT_1: - case MADERA_HEADPHONE_DETECT_2: - case MADERA_HEADPHONE_DETECT_3: - case MADERA_HEADPHONE_DETECT_5: - case MADERA_MICD_CLAMP_CONTROL: - case MADERA_MIC_DETECT_1_CONTROL_0: - case MADERA_MIC_DETECT_1_CONTROL_1: - case MADERA_MIC_DETECT_1_CONTROL_2: - case MADERA_MIC_DETECT_1_CONTROL_3: - case MADERA_MIC_DETECT_1_LEVEL_1: - case MADERA_MIC_DETECT_1_LEVEL_2: - case MADERA_MIC_DETECT_1_LEVEL_3: - case MADERA_MIC_DETECT_1_LEVEL_4: - case MADERA_MIC_DETECT_1_CONTROL_4: - case MADERA_MIC_DETECT_2_CONTROL_0: - case MADERA_MIC_DETECT_2_CONTROL_1: - case MADERA_MIC_DETECT_2_CONTROL_2: - case MADERA_MIC_DETECT_2_CONTROL_3: - case MADERA_MIC_DETECT_2_LEVEL_1: - case MADERA_MIC_DETECT_2_LEVEL_2: - case MADERA_MIC_DETECT_2_LEVEL_3: - case MADERA_MIC_DETECT_2_LEVEL_4: - case MADERA_MIC_DETECT_2_CONTROL_4: - case MADERA_GP_SWITCH_1: - case MADERA_JACK_DETECT_ANALOGUE: - case MADERA_INPUT_ENABLES: - case MADERA_INPUT_ENABLES_STATUS: - case MADERA_INPUT_RATE: - case MADERA_INPUT_VOLUME_RAMP: - case MADERA_HPF_CONTROL: - case MADERA_IN1L_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_1L: - case MADERA_DMIC1L_CONTROL: - case MADERA_IN1L_RATE_CONTROL: - case MADERA_IN1R_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_1R: - case MADERA_DMIC1R_CONTROL: - case MADERA_IN1R_RATE_CONTROL: - case MADERA_IN2L_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_2L: - case MADERA_DMIC2L_CONTROL: - case MADERA_IN2L_RATE_CONTROL: - case MADERA_IN2R_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_2R: - case MADERA_DMIC2R_CONTROL: - case MADERA_IN2R_RATE_CONTROL: - case MADERA_IN3L_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_3L: - case MADERA_DMIC3L_CONTROL: - case MADERA_IN3L_RATE_CONTROL: - case MADERA_IN3R_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_3R: - case MADERA_DMIC3R_CONTROL: - case MADERA_IN3R_RATE_CONTROL: - case MADERA_IN4L_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_4L: - case MADERA_DMIC4L_CONTROL: - case MADERA_IN4L_RATE_CONTROL: - case MADERA_IN4R_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_4R: - case MADERA_DMIC4R_CONTROL: - case MADERA_IN4R_RATE_CONTROL: - case MADERA_IN5L_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_5L: - case MADERA_DMIC5L_CONTROL: - case MADERA_IN5L_RATE_CONTROL: - case MADERA_IN5R_CONTROL: - case MADERA_ADC_DIGITAL_VOLUME_5R: - case MADERA_DMIC5R_CONTROL: - case MADERA_IN5R_RATE_CONTROL: - case MADERA_OUTPUT_ENABLES_1: - case MADERA_OUTPUT_STATUS_1: - case MADERA_RAW_OUTPUT_STATUS_1: - case MADERA_OUTPUT_RATE_1: - case MADERA_OUTPUT_VOLUME_RAMP: - case MADERA_OUTPUT_PATH_CONFIG_1L: - case MADERA_DAC_DIGITAL_VOLUME_1L: - case MADERA_OUTPUT_PATH_CONFIG_1: - case MADERA_NOISE_GATE_SELECT_1L: - case MADERA_OUTPUT_PATH_CONFIG_1R: - case MADERA_DAC_DIGITAL_VOLUME_1R: - case MADERA_NOISE_GATE_SELECT_1R: - case MADERA_OUTPUT_PATH_CONFIG_2L: - case MADERA_DAC_DIGITAL_VOLUME_2L: - case MADERA_OUTPUT_PATH_CONFIG_2: - case MADERA_NOISE_GATE_SELECT_2L: - case MADERA_OUTPUT_PATH_CONFIG_2R: - case MADERA_DAC_DIGITAL_VOLUME_2R: - case MADERA_NOISE_GATE_SELECT_2R: - case MADERA_OUTPUT_PATH_CONFIG_3L: - case MADERA_DAC_DIGITAL_VOLUME_3L: - case MADERA_NOISE_GATE_SELECT_3L: - case MADERA_OUTPUT_PATH_CONFIG_3R: - case MADERA_DAC_DIGITAL_VOLUME_3R: - case MADERA_NOISE_GATE_SELECT_3R: - case MADERA_OUTPUT_PATH_CONFIG_5L: - case MADERA_DAC_DIGITAL_VOLUME_5L: - case MADERA_NOISE_GATE_SELECT_5L: - case MADERA_OUTPUT_PATH_CONFIG_5R: - case MADERA_DAC_DIGITAL_VOLUME_5R: - case MADERA_NOISE_GATE_SELECT_5R: - case MADERA_DRE_ENABLE: - case MADERA_EDRE_ENABLE: - case MADERA_DAC_AEC_CONTROL_1: - case MADERA_NOISE_GATE_CONTROL: - case MADERA_PDM_SPK1_CTRL_1: - case MADERA_PDM_SPK1_CTRL_2: - case MADERA_HP1_SHORT_CIRCUIT_CTRL: - case MADERA_HP2_SHORT_CIRCUIT_CTRL: - case MADERA_HP3_SHORT_CIRCUIT_CTRL: - case MADERA_HP_TEST_CTRL_5: - case MADERA_HP_TEST_CTRL_6: - case MADERA_AIF1_BCLK_CTRL: - case MADERA_AIF1_TX_PIN_CTRL: - case MADERA_AIF1_RX_PIN_CTRL: - case MADERA_AIF1_RATE_CTRL: - case MADERA_AIF1_FORMAT: - case MADERA_AIF1_RX_BCLK_RATE: - case MADERA_AIF1_FRAME_CTRL_1: - case MADERA_AIF1_FRAME_CTRL_2: - case MADERA_AIF1_FRAME_CTRL_3: - case MADERA_AIF1_FRAME_CTRL_4: - case MADERA_AIF1_FRAME_CTRL_5: - case MADERA_AIF1_FRAME_CTRL_6: - case MADERA_AIF1_FRAME_CTRL_7: - case MADERA_AIF1_FRAME_CTRL_8: - case MADERA_AIF1_FRAME_CTRL_9: - case MADERA_AIF1_FRAME_CTRL_10: - case MADERA_AIF1_FRAME_CTRL_11: - case MADERA_AIF1_FRAME_CTRL_12: - case MADERA_AIF1_FRAME_CTRL_13: - case MADERA_AIF1_FRAME_CTRL_14: - case MADERA_AIF1_FRAME_CTRL_15: - case MADERA_AIF1_FRAME_CTRL_16: - case MADERA_AIF1_FRAME_CTRL_17: - case MADERA_AIF1_FRAME_CTRL_18: - case MADERA_AIF1_TX_ENABLES: - case MADERA_AIF1_RX_ENABLES: - case MADERA_AIF2_BCLK_CTRL: - case MADERA_AIF2_TX_PIN_CTRL: - case MADERA_AIF2_RX_PIN_CTRL: - case MADERA_AIF2_RATE_CTRL: - case MADERA_AIF2_FORMAT: - case MADERA_AIF2_RX_BCLK_RATE: - case MADERA_AIF2_FRAME_CTRL_1: - case MADERA_AIF2_FRAME_CTRL_2: - case MADERA_AIF2_FRAME_CTRL_3: - case MADERA_AIF2_FRAME_CTRL_4: - case MADERA_AIF2_FRAME_CTRL_5: - case MADERA_AIF2_FRAME_CTRL_6: - case MADERA_AIF2_FRAME_CTRL_7: - case MADERA_AIF2_FRAME_CTRL_8: - case MADERA_AIF2_FRAME_CTRL_9: - case MADERA_AIF2_FRAME_CTRL_10: - case MADERA_AIF2_FRAME_CTRL_11: - case MADERA_AIF2_FRAME_CTRL_12: - case MADERA_AIF2_FRAME_CTRL_13: - case MADERA_AIF2_FRAME_CTRL_14: - case MADERA_AIF2_FRAME_CTRL_15: - case MADERA_AIF2_FRAME_CTRL_16: - case MADERA_AIF2_FRAME_CTRL_17: - case MADERA_AIF2_FRAME_CTRL_18: - case MADERA_AIF2_TX_ENABLES: - case MADERA_AIF2_RX_ENABLES: - case MADERA_AIF3_BCLK_CTRL: - case MADERA_AIF3_TX_PIN_CTRL: - case MADERA_AIF3_RX_PIN_CTRL: - case MADERA_AIF3_RATE_CTRL: - case MADERA_AIF3_FORMAT: - case MADERA_AIF3_RX_BCLK_RATE: - case MADERA_AIF3_FRAME_CTRL_1: - case MADERA_AIF3_FRAME_CTRL_2: - case MADERA_AIF3_FRAME_CTRL_3: - case MADERA_AIF3_FRAME_CTRL_4: - case MADERA_AIF3_FRAME_CTRL_11: - case MADERA_AIF3_FRAME_CTRL_12: - case MADERA_AIF3_TX_ENABLES: - case MADERA_AIF3_RX_ENABLES: - case MADERA_AIF4_BCLK_CTRL: - case MADERA_AIF4_TX_PIN_CTRL: - case MADERA_AIF4_RX_PIN_CTRL: - case MADERA_AIF4_RATE_CTRL: - case MADERA_AIF4_FORMAT: - case MADERA_AIF4_RX_BCLK_RATE: - case MADERA_AIF4_FRAME_CTRL_1: - case MADERA_AIF4_FRAME_CTRL_2: - case MADERA_AIF4_FRAME_CTRL_3: - case MADERA_AIF4_FRAME_CTRL_4: - case MADERA_AIF4_FRAME_CTRL_11: - case MADERA_AIF4_FRAME_CTRL_12: - case MADERA_AIF4_TX_ENABLES: - case MADERA_AIF4_RX_ENABLES: - case MADERA_SPD1_TX_CONTROL: - case MADERA_SPD1_TX_CHANNEL_STATUS_1: - case MADERA_SPD1_TX_CHANNEL_STATUS_2: - case MADERA_SPD1_TX_CHANNEL_STATUS_3: - case MADERA_SLIMBUS_FRAMER_REF_GEAR: - case MADERA_SLIMBUS_RATES_1: - case MADERA_SLIMBUS_RATES_2: - case MADERA_SLIMBUS_RATES_3: - case MADERA_SLIMBUS_RATES_4: - case MADERA_SLIMBUS_RATES_5: - case MADERA_SLIMBUS_RATES_6: - case MADERA_SLIMBUS_RATES_7: - case MADERA_SLIMBUS_RATES_8: - case MADERA_SLIMBUS_RX_CHANNEL_ENABLE: - case MADERA_SLIMBUS_TX_CHANNEL_ENABLE: - case MADERA_SLIMBUS_RX_PORT_STATUS: - case MADERA_SLIMBUS_TX_PORT_STATUS: - case MADERA_PWM1MIX_INPUT_1_SOURCE: - case MADERA_PWM1MIX_INPUT_1_VOLUME: - case MADERA_PWM1MIX_INPUT_2_SOURCE: - case MADERA_PWM1MIX_INPUT_2_VOLUME: - case MADERA_PWM1MIX_INPUT_3_SOURCE: - case MADERA_PWM1MIX_INPUT_3_VOLUME: - case MADERA_PWM1MIX_INPUT_4_SOURCE: - case MADERA_PWM1MIX_INPUT_4_VOLUME: - case MADERA_PWM2MIX_INPUT_1_SOURCE: - case MADERA_PWM2MIX_INPUT_1_VOLUME: - case MADERA_PWM2MIX_INPUT_2_SOURCE: - case MADERA_PWM2MIX_INPUT_2_VOLUME: - case MADERA_PWM2MIX_INPUT_3_SOURCE: - case MADERA_PWM2MIX_INPUT_3_VOLUME: - case MADERA_PWM2MIX_INPUT_4_SOURCE: - case MADERA_PWM2MIX_INPUT_4_VOLUME: - case MADERA_OUT1LMIX_INPUT_1_SOURCE: - case MADERA_OUT1LMIX_INPUT_1_VOLUME: - case MADERA_OUT1LMIX_INPUT_2_SOURCE: - case MADERA_OUT1LMIX_INPUT_2_VOLUME: - case MADERA_OUT1LMIX_INPUT_3_SOURCE: - case MADERA_OUT1LMIX_INPUT_3_VOLUME: - case MADERA_OUT1LMIX_INPUT_4_SOURCE: - case MADERA_OUT1LMIX_INPUT_4_VOLUME: - case MADERA_OUT1RMIX_INPUT_1_SOURCE: - case MADERA_OUT1RMIX_INPUT_1_VOLUME: - case MADERA_OUT1RMIX_INPUT_2_SOURCE: - case MADERA_OUT1RMIX_INPUT_2_VOLUME: - case MADERA_OUT1RMIX_INPUT_3_SOURCE: - case MADERA_OUT1RMIX_INPUT_3_VOLUME: - case MADERA_OUT1RMIX_INPUT_4_SOURCE: - case MADERA_OUT1RMIX_INPUT_4_VOLUME: - case MADERA_OUT2LMIX_INPUT_1_SOURCE: - case MADERA_OUT2LMIX_INPUT_1_VOLUME: - case MADERA_OUT2LMIX_INPUT_2_SOURCE: - case MADERA_OUT2LMIX_INPUT_2_VOLUME: - case MADERA_OUT2LMIX_INPUT_3_SOURCE: - case MADERA_OUT2LMIX_INPUT_3_VOLUME: - case MADERA_OUT2LMIX_INPUT_4_SOURCE: - case MADERA_OUT2LMIX_INPUT_4_VOLUME: - case MADERA_OUT2RMIX_INPUT_1_SOURCE: - case MADERA_OUT2RMIX_INPUT_1_VOLUME: - case MADERA_OUT2RMIX_INPUT_2_SOURCE: - case MADERA_OUT2RMIX_INPUT_2_VOLUME: - case MADERA_OUT2RMIX_INPUT_3_SOURCE: - case MADERA_OUT2RMIX_INPUT_3_VOLUME: - case MADERA_OUT2RMIX_INPUT_4_SOURCE: - case MADERA_OUT2RMIX_INPUT_4_VOLUME: - case MADERA_OUT3LMIX_INPUT_1_SOURCE: - case MADERA_OUT3LMIX_INPUT_1_VOLUME: - case MADERA_OUT3LMIX_INPUT_2_SOURCE: - case MADERA_OUT3LMIX_INPUT_2_VOLUME: - case MADERA_OUT3LMIX_INPUT_3_SOURCE: - case MADERA_OUT3LMIX_INPUT_3_VOLUME: - case MADERA_OUT3LMIX_INPUT_4_SOURCE: - case MADERA_OUT3LMIX_INPUT_4_VOLUME: - case MADERA_OUT3RMIX_INPUT_1_SOURCE: - case MADERA_OUT3RMIX_INPUT_1_VOLUME: - case MADERA_OUT3RMIX_INPUT_2_SOURCE: - case MADERA_OUT3RMIX_INPUT_2_VOLUME: - case MADERA_OUT3RMIX_INPUT_3_SOURCE: - case MADERA_OUT3RMIX_INPUT_3_VOLUME: - case MADERA_OUT3RMIX_INPUT_4_SOURCE: - case MADERA_OUT3RMIX_INPUT_4_VOLUME: - case MADERA_OUT5LMIX_INPUT_1_SOURCE: - case MADERA_OUT5LMIX_INPUT_1_VOLUME: - case MADERA_OUT5LMIX_INPUT_2_SOURCE: - case MADERA_OUT5LMIX_INPUT_2_VOLUME: - case MADERA_OUT5LMIX_INPUT_3_SOURCE: - case MADERA_OUT5LMIX_INPUT_3_VOLUME: - case MADERA_OUT5LMIX_INPUT_4_SOURCE: - case MADERA_OUT5LMIX_INPUT_4_VOLUME: - case MADERA_OUT5RMIX_INPUT_1_SOURCE: - case MADERA_OUT5RMIX_INPUT_1_VOLUME: - case MADERA_OUT5RMIX_INPUT_2_SOURCE: - case MADERA_OUT5RMIX_INPUT_2_VOLUME: - case MADERA_OUT5RMIX_INPUT_3_SOURCE: - case MADERA_OUT5RMIX_INPUT_3_VOLUME: - case MADERA_OUT5RMIX_INPUT_4_SOURCE: - case MADERA_OUT5RMIX_INPUT_4_VOLUME: - case MADERA_AIF1TX1MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX1MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX1MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX1MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX1MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX1MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX1MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX1MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX2MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX2MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX2MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX2MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX2MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX2MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX2MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX2MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX3MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX3MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX3MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX3MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX3MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX3MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX3MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX3MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX4MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX4MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX4MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX4MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX4MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX4MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX4MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX4MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX5MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX5MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX5MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX5MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX5MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX5MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX5MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX5MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX6MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX6MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX6MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX6MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX6MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX6MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX6MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX6MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX7MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX7MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX7MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX7MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX7MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX7MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX7MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX7MIX_INPUT_4_VOLUME: - case MADERA_AIF1TX8MIX_INPUT_1_SOURCE: - case MADERA_AIF1TX8MIX_INPUT_1_VOLUME: - case MADERA_AIF1TX8MIX_INPUT_2_SOURCE: - case MADERA_AIF1TX8MIX_INPUT_2_VOLUME: - case MADERA_AIF1TX8MIX_INPUT_3_SOURCE: - case MADERA_AIF1TX8MIX_INPUT_3_VOLUME: - case MADERA_AIF1TX8MIX_INPUT_4_SOURCE: - case MADERA_AIF1TX8MIX_INPUT_4_VOLUME: - case MADERA_AIF2TX1MIX_INPUT_1_SOURCE: - case MADERA_AIF2TX1MIX_INPUT_1_VOLUME: - case MADERA_AIF2TX1MIX_INPUT_2_SOURCE: - case MADERA_AIF2TX1MIX_INPUT_2_VOLUME: - case MADERA_AIF2TX1MIX_INPUT_3_SOURCE: - case MADERA_AIF2TX1MIX_INPUT_3_VOLUME: - case MADERA_AIF2TX1MIX_INPUT_4_SOURCE: - case MADERA_AIF2TX1MIX_INPUT_4_VOLUME: - case MADERA_AIF2TX2MIX_INPUT_1_SOURCE: - case MADERA_AIF2TX2MIX_INPUT_1_VOLUME: - case MADERA_AIF2TX2MIX_INPUT_2_SOURCE: - case MADERA_AIF2TX2MIX_INPUT_2_VOLUME: - case MADERA_AIF2TX2MIX_INPUT_3_SOURCE: - case MADERA_AIF2TX2MIX_INPUT_3_VOLUME: - case MADERA_AIF2TX2MIX_INPUT_4_SOURCE: - case MADERA_AIF2TX2MIX_INPUT_4_VOLUME: - case MADERA_AIF2TX3MIX_INPUT_1_SOURCE: - case MADERA_AIF2TX3MIX_INPUT_1_VOLUME: - case MADERA_AIF2TX3MIX_INPUT_2_SOURCE: - case MADERA_AIF2TX3MIX_INPUT_2_VOLUME: - case MADERA_AIF2TX3MIX_INPUT_3_SOURCE: - case MADERA_AIF2TX3MIX_INPUT_3_VOLUME: - case MADERA_AIF2TX3MIX_INPUT_4_SOURCE: - case MADERA_AIF2TX3MIX_INPUT_4_VOLUME: - case MADERA_AIF2TX4MIX_INPUT_1_SOURCE: - case MADERA_AIF2TX4MIX_INPUT_1_VOLUME: - case MADERA_AIF2TX4MIX_INPUT_2_SOURCE: - case MADERA_AIF2TX4MIX_INPUT_2_VOLUME: - case MADERA_AIF2TX4MIX_INPUT_3_SOURCE: - case MADERA_AIF2TX4MIX_INPUT_3_VOLUME: - case MADERA_AIF2TX4MIX_INPUT_4_SOURCE: - case MADERA_AIF2TX4MIX_INPUT_4_VOLUME: - case MADERA_AIF2TX5MIX_INPUT_1_SOURCE: - case MADERA_AIF2TX5MIX_INPUT_1_VOLUME: - case MADERA_AIF2TX5MIX_INPUT_2_SOURCE: - case MADERA_AIF2TX5MIX_INPUT_2_VOLUME: - case MADERA_AIF2TX5MIX_INPUT_3_SOURCE: - case MADERA_AIF2TX5MIX_INPUT_3_VOLUME: - case MADERA_AIF2TX5MIX_INPUT_4_SOURCE: - case MADERA_AIF2TX5MIX_INPUT_4_VOLUME: - case MADERA_AIF2TX6MIX_INPUT_1_SOURCE: - case MADERA_AIF2TX6MIX_INPUT_1_VOLUME: - case MADERA_AIF2TX6MIX_INPUT_2_SOURCE: - case MADERA_AIF2TX6MIX_INPUT_2_VOLUME: - case MADERA_AIF2TX6MIX_INPUT_3_SOURCE: - case MADERA_AIF2TX6MIX_INPUT_3_VOLUME: - case MADERA_AIF2TX6MIX_INPUT_4_SOURCE: - case MADERA_AIF2TX6MIX_INPUT_4_VOLUME: - case MADERA_AIF2TX7MIX_INPUT_1_SOURCE: - case MADERA_AIF2TX7MIX_INPUT_1_VOLUME: - case MADERA_AIF2TX7MIX_INPUT_2_SOURCE: - case MADERA_AIF2TX7MIX_INPUT_2_VOLUME: - case MADERA_AIF2TX7MIX_INPUT_3_SOURCE: - case MADERA_AIF2TX7MIX_INPUT_3_VOLUME: - case MADERA_AIF2TX7MIX_INPUT_4_SOURCE: - case MADERA_AIF2TX7MIX_INPUT_4_VOLUME: - case MADERA_AIF2TX8MIX_INPUT_1_SOURCE: - case MADERA_AIF2TX8MIX_INPUT_1_VOLUME: - case MADERA_AIF2TX8MIX_INPUT_2_SOURCE: - case MADERA_AIF2TX8MIX_INPUT_2_VOLUME: - case MADERA_AIF2TX8MIX_INPUT_3_SOURCE: - case MADERA_AIF2TX8MIX_INPUT_3_VOLUME: - case MADERA_AIF2TX8MIX_INPUT_4_SOURCE: - case MADERA_AIF2TX8MIX_INPUT_4_VOLUME: - case MADERA_AIF3TX1MIX_INPUT_1_SOURCE: - case MADERA_AIF3TX1MIX_INPUT_1_VOLUME: - case MADERA_AIF3TX1MIX_INPUT_2_SOURCE: - case MADERA_AIF3TX1MIX_INPUT_2_VOLUME: - case MADERA_AIF3TX1MIX_INPUT_3_SOURCE: - case MADERA_AIF3TX1MIX_INPUT_3_VOLUME: - case MADERA_AIF3TX1MIX_INPUT_4_SOURCE: - case MADERA_AIF3TX1MIX_INPUT_4_VOLUME: - case MADERA_AIF3TX2MIX_INPUT_1_SOURCE: - case MADERA_AIF3TX2MIX_INPUT_1_VOLUME: - case MADERA_AIF3TX2MIX_INPUT_2_SOURCE: - case MADERA_AIF3TX2MIX_INPUT_2_VOLUME: - case MADERA_AIF3TX2MIX_INPUT_3_SOURCE: - case MADERA_AIF3TX2MIX_INPUT_3_VOLUME: - case MADERA_AIF3TX2MIX_INPUT_4_SOURCE: - case MADERA_AIF3TX2MIX_INPUT_4_VOLUME: - case MADERA_AIF4TX1MIX_INPUT_1_SOURCE: - case MADERA_AIF4TX1MIX_INPUT_1_VOLUME: - case MADERA_AIF4TX1MIX_INPUT_2_SOURCE: - case MADERA_AIF4TX1MIX_INPUT_2_VOLUME: - case MADERA_AIF4TX1MIX_INPUT_3_SOURCE: - case MADERA_AIF4TX1MIX_INPUT_3_VOLUME: - case MADERA_AIF4TX1MIX_INPUT_4_SOURCE: - case MADERA_AIF4TX1MIX_INPUT_4_VOLUME: - case MADERA_AIF4TX2MIX_INPUT_1_SOURCE: - case MADERA_AIF4TX2MIX_INPUT_1_VOLUME: - case MADERA_AIF4TX2MIX_INPUT_2_SOURCE: - case MADERA_AIF4TX2MIX_INPUT_2_VOLUME: - case MADERA_AIF4TX2MIX_INPUT_3_SOURCE: - case MADERA_AIF4TX2MIX_INPUT_3_VOLUME: - case MADERA_AIF4TX2MIX_INPUT_4_SOURCE: - case MADERA_AIF4TX2MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX1MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX1MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX1MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX1MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX1MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX1MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX1MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX1MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX2MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX2MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX2MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX2MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX2MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX2MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX2MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX2MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX3MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX3MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX3MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX3MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX3MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX3MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX3MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX3MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX4MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX4MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX4MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX4MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX4MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX4MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX4MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX4MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX5MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX5MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX5MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX5MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX5MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX5MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX5MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX5MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX6MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX6MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX6MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX6MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX6MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX6MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX6MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX6MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX7MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX7MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX7MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX7MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX7MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX7MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX7MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX7MIX_INPUT_4_VOLUME: - case MADERA_SLIMTX8MIX_INPUT_1_SOURCE: - case MADERA_SLIMTX8MIX_INPUT_1_VOLUME: - case MADERA_SLIMTX8MIX_INPUT_2_SOURCE: - case MADERA_SLIMTX8MIX_INPUT_2_VOLUME: - case MADERA_SLIMTX8MIX_INPUT_3_SOURCE: - case MADERA_SLIMTX8MIX_INPUT_3_VOLUME: - case MADERA_SLIMTX8MIX_INPUT_4_SOURCE: - case MADERA_SLIMTX8MIX_INPUT_4_VOLUME: - case MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE: - case MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME: - case MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE: - case MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME: - case MADERA_EQ1MIX_INPUT_1_SOURCE: - case MADERA_EQ1MIX_INPUT_1_VOLUME: - case MADERA_EQ1MIX_INPUT_2_SOURCE: - case MADERA_EQ1MIX_INPUT_2_VOLUME: - case MADERA_EQ1MIX_INPUT_3_SOURCE: - case MADERA_EQ1MIX_INPUT_3_VOLUME: - case MADERA_EQ1MIX_INPUT_4_SOURCE: - case MADERA_EQ1MIX_INPUT_4_VOLUME: - case MADERA_EQ2MIX_INPUT_1_SOURCE: - case MADERA_EQ2MIX_INPUT_1_VOLUME: - case MADERA_EQ2MIX_INPUT_2_SOURCE: - case MADERA_EQ2MIX_INPUT_2_VOLUME: - case MADERA_EQ2MIX_INPUT_3_SOURCE: - case MADERA_EQ2MIX_INPUT_3_VOLUME: - case MADERA_EQ2MIX_INPUT_4_SOURCE: - case MADERA_EQ2MIX_INPUT_4_VOLUME: - case MADERA_EQ3MIX_INPUT_1_SOURCE: - case MADERA_EQ3MIX_INPUT_1_VOLUME: - case MADERA_EQ3MIX_INPUT_2_SOURCE: - case MADERA_EQ3MIX_INPUT_2_VOLUME: - case MADERA_EQ3MIX_INPUT_3_SOURCE: - case MADERA_EQ3MIX_INPUT_3_VOLUME: - case MADERA_EQ3MIX_INPUT_4_SOURCE: - case MADERA_EQ3MIX_INPUT_4_VOLUME: - case MADERA_EQ4MIX_INPUT_1_SOURCE: - case MADERA_EQ4MIX_INPUT_1_VOLUME: - case MADERA_EQ4MIX_INPUT_2_SOURCE: - case MADERA_EQ4MIX_INPUT_2_VOLUME: - case MADERA_EQ4MIX_INPUT_3_SOURCE: - case MADERA_EQ4MIX_INPUT_3_VOLUME: - case MADERA_EQ4MIX_INPUT_4_SOURCE: - case MADERA_EQ4MIX_INPUT_4_VOLUME: - case MADERA_DRC1LMIX_INPUT_1_SOURCE: - case MADERA_DRC1LMIX_INPUT_1_VOLUME: - case MADERA_DRC1LMIX_INPUT_2_SOURCE: - case MADERA_DRC1LMIX_INPUT_2_VOLUME: - case MADERA_DRC1LMIX_INPUT_3_SOURCE: - case MADERA_DRC1LMIX_INPUT_3_VOLUME: - case MADERA_DRC1LMIX_INPUT_4_SOURCE: - case MADERA_DRC1LMIX_INPUT_4_VOLUME: - case MADERA_DRC1RMIX_INPUT_1_SOURCE: - case MADERA_DRC1RMIX_INPUT_1_VOLUME: - case MADERA_DRC1RMIX_INPUT_2_SOURCE: - case MADERA_DRC1RMIX_INPUT_2_VOLUME: - case MADERA_DRC1RMIX_INPUT_3_SOURCE: - case MADERA_DRC1RMIX_INPUT_3_VOLUME: - case MADERA_DRC1RMIX_INPUT_4_SOURCE: - case MADERA_DRC1RMIX_INPUT_4_VOLUME: - case MADERA_DRC2LMIX_INPUT_1_SOURCE: - case MADERA_DRC2LMIX_INPUT_1_VOLUME: - case MADERA_DRC2LMIX_INPUT_2_SOURCE: - case MADERA_DRC2LMIX_INPUT_2_VOLUME: - case MADERA_DRC2LMIX_INPUT_3_SOURCE: - case MADERA_DRC2LMIX_INPUT_3_VOLUME: - case MADERA_DRC2LMIX_INPUT_4_SOURCE: - case MADERA_DRC2LMIX_INPUT_4_VOLUME: - case MADERA_DRC2RMIX_INPUT_1_SOURCE: - case MADERA_DRC2RMIX_INPUT_1_VOLUME: - case MADERA_DRC2RMIX_INPUT_2_SOURCE: - case MADERA_DRC2RMIX_INPUT_2_VOLUME: - case MADERA_DRC2RMIX_INPUT_3_SOURCE: - case MADERA_DRC2RMIX_INPUT_3_VOLUME: - case MADERA_DRC2RMIX_INPUT_4_SOURCE: - case MADERA_DRC2RMIX_INPUT_4_VOLUME: - case MADERA_HPLP1MIX_INPUT_1_SOURCE: - case MADERA_HPLP1MIX_INPUT_1_VOLUME: - case MADERA_HPLP1MIX_INPUT_2_SOURCE: - case MADERA_HPLP1MIX_INPUT_2_VOLUME: - case MADERA_HPLP1MIX_INPUT_3_SOURCE: - case MADERA_HPLP1MIX_INPUT_3_VOLUME: - case MADERA_HPLP1MIX_INPUT_4_SOURCE: - case MADERA_HPLP1MIX_INPUT_4_VOLUME: - case MADERA_HPLP2MIX_INPUT_1_SOURCE: - case MADERA_HPLP2MIX_INPUT_1_VOLUME: - case MADERA_HPLP2MIX_INPUT_2_SOURCE: - case MADERA_HPLP2MIX_INPUT_2_VOLUME: - case MADERA_HPLP2MIX_INPUT_3_SOURCE: - case MADERA_HPLP2MIX_INPUT_3_VOLUME: - case MADERA_HPLP2MIX_INPUT_4_SOURCE: - case MADERA_HPLP2MIX_INPUT_4_VOLUME: - case MADERA_HPLP3MIX_INPUT_1_SOURCE: - case MADERA_HPLP3MIX_INPUT_1_VOLUME: - case MADERA_HPLP3MIX_INPUT_2_SOURCE: - case MADERA_HPLP3MIX_INPUT_2_VOLUME: - case MADERA_HPLP3MIX_INPUT_3_SOURCE: - case MADERA_HPLP3MIX_INPUT_3_VOLUME: - case MADERA_HPLP3MIX_INPUT_4_SOURCE: - case MADERA_HPLP3MIX_INPUT_4_VOLUME: - case MADERA_HPLP4MIX_INPUT_1_SOURCE: - case MADERA_HPLP4MIX_INPUT_1_VOLUME: - case MADERA_HPLP4MIX_INPUT_2_SOURCE: - case MADERA_HPLP4MIX_INPUT_2_VOLUME: - case MADERA_HPLP4MIX_INPUT_3_SOURCE: - case MADERA_HPLP4MIX_INPUT_3_VOLUME: - case MADERA_HPLP4MIX_INPUT_4_SOURCE: - case MADERA_HPLP4MIX_INPUT_4_VOLUME: - case MADERA_DSP1LMIX_INPUT_1_SOURCE: - case MADERA_DSP1LMIX_INPUT_1_VOLUME: - case MADERA_DSP1LMIX_INPUT_2_SOURCE: - case MADERA_DSP1LMIX_INPUT_2_VOLUME: - case MADERA_DSP1LMIX_INPUT_3_SOURCE: - case MADERA_DSP1LMIX_INPUT_3_VOLUME: - case MADERA_DSP1LMIX_INPUT_4_SOURCE: - case MADERA_DSP1LMIX_INPUT_4_VOLUME: - case MADERA_DSP1RMIX_INPUT_1_SOURCE: - case MADERA_DSP1RMIX_INPUT_1_VOLUME: - case MADERA_DSP1RMIX_INPUT_2_SOURCE: - case MADERA_DSP1RMIX_INPUT_2_VOLUME: - case MADERA_DSP1RMIX_INPUT_3_SOURCE: - case MADERA_DSP1RMIX_INPUT_3_VOLUME: - case MADERA_DSP1RMIX_INPUT_4_SOURCE: - case MADERA_DSP1RMIX_INPUT_4_VOLUME: - case MADERA_DSP1AUX1MIX_INPUT_1_SOURCE: - case MADERA_DSP1AUX2MIX_INPUT_1_SOURCE: - case MADERA_DSP1AUX3MIX_INPUT_1_SOURCE: - case MADERA_DSP1AUX4MIX_INPUT_1_SOURCE: - case MADERA_DSP1AUX5MIX_INPUT_1_SOURCE: - case MADERA_DSP1AUX6MIX_INPUT_1_SOURCE: - case MADERA_DSP2LMIX_INPUT_1_SOURCE: - case MADERA_DSP2LMIX_INPUT_1_VOLUME: - case MADERA_DSP2LMIX_INPUT_2_SOURCE: - case MADERA_DSP2LMIX_INPUT_2_VOLUME: - case MADERA_DSP2LMIX_INPUT_3_SOURCE: - case MADERA_DSP2LMIX_INPUT_3_VOLUME: - case MADERA_DSP2LMIX_INPUT_4_SOURCE: - case MADERA_DSP2LMIX_INPUT_4_VOLUME: - case MADERA_DSP2RMIX_INPUT_1_SOURCE: - case MADERA_DSP2RMIX_INPUT_1_VOLUME: - case MADERA_DSP2RMIX_INPUT_2_SOURCE: - case MADERA_DSP2RMIX_INPUT_2_VOLUME: - case MADERA_DSP2RMIX_INPUT_3_SOURCE: - case MADERA_DSP2RMIX_INPUT_3_VOLUME: - case MADERA_DSP2RMIX_INPUT_4_SOURCE: - case MADERA_DSP2RMIX_INPUT_4_VOLUME: - case MADERA_DSP2AUX1MIX_INPUT_1_SOURCE: - case MADERA_DSP2AUX2MIX_INPUT_1_SOURCE: - case MADERA_DSP2AUX3MIX_INPUT_1_SOURCE: - case MADERA_DSP2AUX4MIX_INPUT_1_SOURCE: - case MADERA_DSP2AUX5MIX_INPUT_1_SOURCE: - case MADERA_DSP2AUX6MIX_INPUT_1_SOURCE: - case MADERA_DSP3LMIX_INPUT_1_SOURCE: - case MADERA_DSP3LMIX_INPUT_1_VOLUME: - case MADERA_DSP3LMIX_INPUT_2_SOURCE: - case MADERA_DSP3LMIX_INPUT_2_VOLUME: - case MADERA_DSP3LMIX_INPUT_3_SOURCE: - case MADERA_DSP3LMIX_INPUT_3_VOLUME: - case MADERA_DSP3LMIX_INPUT_4_SOURCE: - case MADERA_DSP3LMIX_INPUT_4_VOLUME: - case MADERA_DSP3RMIX_INPUT_1_SOURCE: - case MADERA_DSP3RMIX_INPUT_1_VOLUME: - case MADERA_DSP3RMIX_INPUT_2_SOURCE: - case MADERA_DSP3RMIX_INPUT_2_VOLUME: - case MADERA_DSP3RMIX_INPUT_3_SOURCE: - case MADERA_DSP3RMIX_INPUT_3_VOLUME: - case MADERA_DSP3RMIX_INPUT_4_SOURCE: - case MADERA_DSP3RMIX_INPUT_4_VOLUME: - case MADERA_DSP3AUX1MIX_INPUT_1_SOURCE: - case MADERA_DSP3AUX2MIX_INPUT_1_SOURCE: - case MADERA_DSP3AUX3MIX_INPUT_1_SOURCE: - case MADERA_DSP3AUX4MIX_INPUT_1_SOURCE: - case MADERA_DSP3AUX5MIX_INPUT_1_SOURCE: - case MADERA_DSP3AUX6MIX_INPUT_1_SOURCE: - case MADERA_DSP4LMIX_INPUT_1_SOURCE: - case MADERA_DSP4LMIX_INPUT_1_VOLUME: - case MADERA_DSP4LMIX_INPUT_2_SOURCE: - case MADERA_DSP4LMIX_INPUT_2_VOLUME: - case MADERA_DSP4LMIX_INPUT_3_SOURCE: - case MADERA_DSP4LMIX_INPUT_3_VOLUME: - case MADERA_DSP4LMIX_INPUT_4_SOURCE: - case MADERA_DSP4LMIX_INPUT_4_VOLUME: - case MADERA_DSP4RMIX_INPUT_1_SOURCE: - case MADERA_DSP4RMIX_INPUT_1_VOLUME: - case MADERA_DSP4RMIX_INPUT_2_SOURCE: - case MADERA_DSP4RMIX_INPUT_2_VOLUME: - case MADERA_DSP4RMIX_INPUT_3_SOURCE: - case MADERA_DSP4RMIX_INPUT_3_VOLUME: - case MADERA_DSP4RMIX_INPUT_4_SOURCE: - case MADERA_DSP4RMIX_INPUT_4_VOLUME: - case MADERA_DSP4AUX1MIX_INPUT_1_SOURCE: - case MADERA_DSP4AUX2MIX_INPUT_1_SOURCE: - case MADERA_DSP4AUX3MIX_INPUT_1_SOURCE: - case MADERA_DSP4AUX4MIX_INPUT_1_SOURCE: - case MADERA_DSP4AUX5MIX_INPUT_1_SOURCE: - case MADERA_DSP4AUX6MIX_INPUT_1_SOURCE: - case MADERA_DSP5LMIX_INPUT_1_SOURCE: - case MADERA_DSP5LMIX_INPUT_1_VOLUME: - case MADERA_DSP5LMIX_INPUT_2_SOURCE: - case MADERA_DSP5LMIX_INPUT_2_VOLUME: - case MADERA_DSP5LMIX_INPUT_3_SOURCE: - case MADERA_DSP5LMIX_INPUT_3_VOLUME: - case MADERA_DSP5LMIX_INPUT_4_SOURCE: - case MADERA_DSP5LMIX_INPUT_4_VOLUME: - case MADERA_DSP5RMIX_INPUT_1_SOURCE: - case MADERA_DSP5RMIX_INPUT_1_VOLUME: - case MADERA_DSP5RMIX_INPUT_2_SOURCE: - case MADERA_DSP5RMIX_INPUT_2_VOLUME: - case MADERA_DSP5RMIX_INPUT_3_SOURCE: - case MADERA_DSP5RMIX_INPUT_3_VOLUME: - case MADERA_DSP5RMIX_INPUT_4_SOURCE: - case MADERA_DSP5RMIX_INPUT_4_VOLUME: - case MADERA_DSP5AUX1MIX_INPUT_1_SOURCE: - case MADERA_DSP5AUX2MIX_INPUT_1_SOURCE: - case MADERA_DSP5AUX3MIX_INPUT_1_SOURCE: - case MADERA_DSP5AUX4MIX_INPUT_1_SOURCE: - case MADERA_DSP5AUX5MIX_INPUT_1_SOURCE: - case MADERA_DSP5AUX6MIX_INPUT_1_SOURCE: - case MADERA_ASRC1_1LMIX_INPUT_1_SOURCE: - case MADERA_ASRC1_1RMIX_INPUT_1_SOURCE: - case MADERA_ASRC1_2LMIX_INPUT_1_SOURCE: - case MADERA_ASRC1_2RMIX_INPUT_1_SOURCE: - case MADERA_ASRC2_1LMIX_INPUT_1_SOURCE: - case MADERA_ASRC2_1RMIX_INPUT_1_SOURCE: - case MADERA_ASRC2_2LMIX_INPUT_1_SOURCE: - case MADERA_ASRC2_2RMIX_INPUT_1_SOURCE: - case MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE: - case MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE: - case MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE: - case MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE: - case MADERA_ISRC1INT1MIX_INPUT_1_SOURCE: - case MADERA_ISRC1INT2MIX_INPUT_1_SOURCE: - case MADERA_ISRC1INT3MIX_INPUT_1_SOURCE: - case MADERA_ISRC1INT4MIX_INPUT_1_SOURCE: - case MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE: - case MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE: - case MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE: - case MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE: - case MADERA_ISRC2INT1MIX_INPUT_1_SOURCE: - case MADERA_ISRC2INT2MIX_INPUT_1_SOURCE: - case MADERA_ISRC2INT3MIX_INPUT_1_SOURCE: - case MADERA_ISRC2INT4MIX_INPUT_1_SOURCE: - case MADERA_ISRC3DEC1MIX_INPUT_1_SOURCE: - case MADERA_ISRC3DEC2MIX_INPUT_1_SOURCE: - case MADERA_ISRC3INT1MIX_INPUT_1_SOURCE: - case MADERA_ISRC3INT2MIX_INPUT_1_SOURCE: - case MADERA_ISRC4DEC1MIX_INPUT_1_SOURCE: - case MADERA_ISRC4DEC2MIX_INPUT_1_SOURCE: - case MADERA_ISRC4INT1MIX_INPUT_1_SOURCE: - case MADERA_ISRC4INT2MIX_INPUT_1_SOURCE: - case MADERA_DSP6LMIX_INPUT_1_SOURCE: - case MADERA_DSP6LMIX_INPUT_1_VOLUME: - case MADERA_DSP6LMIX_INPUT_2_SOURCE: - case MADERA_DSP6LMIX_INPUT_2_VOLUME: - case MADERA_DSP6LMIX_INPUT_3_SOURCE: - case MADERA_DSP6LMIX_INPUT_3_VOLUME: - case MADERA_DSP6LMIX_INPUT_4_SOURCE: - case MADERA_DSP6LMIX_INPUT_4_VOLUME: - case MADERA_DSP6RMIX_INPUT_1_SOURCE: - case MADERA_DSP6RMIX_INPUT_1_VOLUME: - case MADERA_DSP6RMIX_INPUT_2_SOURCE: - case MADERA_DSP6RMIX_INPUT_2_VOLUME: - case MADERA_DSP6RMIX_INPUT_3_SOURCE: - case MADERA_DSP6RMIX_INPUT_3_VOLUME: - case MADERA_DSP6RMIX_INPUT_4_SOURCE: - case MADERA_DSP6RMIX_INPUT_4_VOLUME: - case MADERA_DSP6AUX1MIX_INPUT_1_SOURCE: - case MADERA_DSP6AUX2MIX_INPUT_1_SOURCE: - case MADERA_DSP6AUX3MIX_INPUT_1_SOURCE: - case MADERA_DSP6AUX4MIX_INPUT_1_SOURCE: - case MADERA_DSP6AUX5MIX_INPUT_1_SOURCE: - case MADERA_DSP6AUX6MIX_INPUT_1_SOURCE: - case MADERA_DSP7LMIX_INPUT_1_SOURCE: - case MADERA_DSP7LMIX_INPUT_1_VOLUME: - case MADERA_DSP7LMIX_INPUT_2_SOURCE: - case MADERA_DSP7LMIX_INPUT_2_VOLUME: - case MADERA_DSP7LMIX_INPUT_3_SOURCE: - case MADERA_DSP7LMIX_INPUT_3_VOLUME: - case MADERA_DSP7LMIX_INPUT_4_SOURCE: - case MADERA_DSP7LMIX_INPUT_4_VOLUME: - case MADERA_DSP7RMIX_INPUT_1_SOURCE: - case MADERA_DSP7RMIX_INPUT_1_VOLUME: - case MADERA_DSP7RMIX_INPUT_2_SOURCE: - case MADERA_DSP7RMIX_INPUT_2_VOLUME: - case MADERA_DSP7RMIX_INPUT_3_SOURCE: - case MADERA_DSP7RMIX_INPUT_3_VOLUME: - case MADERA_DSP7RMIX_INPUT_4_SOURCE: - case MADERA_DSP7RMIX_INPUT_4_VOLUME: - case MADERA_DSP7AUX1MIX_INPUT_1_SOURCE: - case MADERA_DSP7AUX2MIX_INPUT_1_SOURCE: - case MADERA_DSP7AUX3MIX_INPUT_1_SOURCE: - case MADERA_DSP7AUX4MIX_INPUT_1_SOURCE: - case MADERA_DSP7AUX5MIX_INPUT_1_SOURCE: - case MADERA_DSP7AUX6MIX_INPUT_1_SOURCE: - case MADERA_DFC1MIX_INPUT_1_SOURCE: - case MADERA_DFC2MIX_INPUT_1_SOURCE: - case MADERA_DFC3MIX_INPUT_1_SOURCE: - case MADERA_DFC4MIX_INPUT_1_SOURCE: - case MADERA_DFC5MIX_INPUT_1_SOURCE: - case MADERA_DFC6MIX_INPUT_1_SOURCE: - case MADERA_DFC7MIX_INPUT_1_SOURCE: - case MADERA_DFC8MIX_INPUT_1_SOURCE: - case MADERA_FX_CTRL1: - case MADERA_FX_CTRL2: - case MADERA_EQ1_1: - case MADERA_EQ1_2: - case MADERA_EQ1_3: - case MADERA_EQ1_4: - case MADERA_EQ1_5: - case MADERA_EQ1_6: - case MADERA_EQ1_7: - case MADERA_EQ1_8: - case MADERA_EQ1_9: - case MADERA_EQ1_10: - case MADERA_EQ1_11: - case MADERA_EQ1_12: - case MADERA_EQ1_13: - case MADERA_EQ1_14: - case MADERA_EQ1_15: - case MADERA_EQ1_16: - case MADERA_EQ1_17: - case MADERA_EQ1_18: - case MADERA_EQ1_19: - case MADERA_EQ1_20: - case MADERA_EQ1_21: - case MADERA_EQ2_1: - case MADERA_EQ2_2: - case MADERA_EQ2_3: - case MADERA_EQ2_4: - case MADERA_EQ2_5: - case MADERA_EQ2_6: - case MADERA_EQ2_7: - case MADERA_EQ2_8: - case MADERA_EQ2_9: - case MADERA_EQ2_10: - case MADERA_EQ2_11: - case MADERA_EQ2_12: - case MADERA_EQ2_13: - case MADERA_EQ2_14: - case MADERA_EQ2_15: - case MADERA_EQ2_16: - case MADERA_EQ2_17: - case MADERA_EQ2_18: - case MADERA_EQ2_19: - case MADERA_EQ2_20: - case MADERA_EQ2_21: - case MADERA_EQ3_1: - case MADERA_EQ3_2: - case MADERA_EQ3_3: - case MADERA_EQ3_4: - case MADERA_EQ3_5: - case MADERA_EQ3_6: - case MADERA_EQ3_7: - case MADERA_EQ3_8: - case MADERA_EQ3_9: - case MADERA_EQ3_10: - case MADERA_EQ3_11: - case MADERA_EQ3_12: - case MADERA_EQ3_13: - case MADERA_EQ3_14: - case MADERA_EQ3_15: - case MADERA_EQ3_16: - case MADERA_EQ3_17: - case MADERA_EQ3_18: - case MADERA_EQ3_19: - case MADERA_EQ3_20: - case MADERA_EQ3_21: - case MADERA_EQ4_1: - case MADERA_EQ4_2: - case MADERA_EQ4_3: - case MADERA_EQ4_4: - case MADERA_EQ4_5: - case MADERA_EQ4_6: - case MADERA_EQ4_7: - case MADERA_EQ4_8: - case MADERA_EQ4_9: - case MADERA_EQ4_10: - case MADERA_EQ4_11: - case MADERA_EQ4_12: - case MADERA_EQ4_13: - case MADERA_EQ4_14: - case MADERA_EQ4_15: - case MADERA_EQ4_16: - case MADERA_EQ4_17: - case MADERA_EQ4_18: - case MADERA_EQ4_19: - case MADERA_EQ4_20: - case MADERA_EQ4_21: - case MADERA_DRC1_CTRL1: - case MADERA_DRC1_CTRL2: - case MADERA_DRC1_CTRL3: - case MADERA_DRC1_CTRL4: - case MADERA_DRC1_CTRL5: - case MADERA_DRC2_CTRL1: - case MADERA_DRC2_CTRL2: - case MADERA_DRC2_CTRL3: - case MADERA_DRC2_CTRL4: - case MADERA_DRC2_CTRL5: - case MADERA_HPLPF1_1: - case MADERA_HPLPF1_2: - case MADERA_HPLPF2_1: - case MADERA_HPLPF2_2: - case MADERA_HPLPF3_1: - case MADERA_HPLPF3_2: - case MADERA_HPLPF4_1: - case MADERA_HPLPF4_2: - case MADERA_ASRC1_ENABLE: - case MADERA_ASRC1_STATUS: - case MADERA_ASRC1_RATE1: - case MADERA_ASRC1_RATE2: - case MADERA_ASRC2_ENABLE: - case MADERA_ASRC2_STATUS: - case MADERA_ASRC2_RATE1: - case MADERA_ASRC2_RATE2: - case MADERA_ISRC_1_CTRL_1: - case MADERA_ISRC_1_CTRL_2: - case MADERA_ISRC_1_CTRL_3: - case MADERA_ISRC_2_CTRL_1: - case MADERA_ISRC_2_CTRL_2: - case MADERA_ISRC_2_CTRL_3: - case MADERA_ISRC_3_CTRL_1: - case MADERA_ISRC_3_CTRL_2: - case MADERA_ISRC_3_CTRL_3: - case MADERA_ISRC_4_CTRL_1: - case MADERA_ISRC_4_CTRL_2: - case MADERA_ISRC_4_CTRL_3: - case MADERA_CLOCK_CONTROL: - case MADERA_ANC_SRC: - case MADERA_DSP_STATUS: - case MADERA_ANC_COEFF_START ... MADERA_ANC_COEFF_END: - case MADERA_FCL_FILTER_CONTROL: - case MADERA_FCL_ADC_REFORMATTER_CONTROL: - case MADERA_FCL_COEFF_START ... MADERA_FCL_COEFF_END: - case MADERA_FCR_FILTER_CONTROL: - case MADERA_FCR_ADC_REFORMATTER_CONTROL: - case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END: - case MADERA_DAC_COMP_1: - case MADERA_DAC_COMP_2: - case MADERA_FRF_COEFFICIENT_1L_1: - case MADERA_FRF_COEFFICIENT_1L_2: - case MADERA_FRF_COEFFICIENT_1L_3: - case MADERA_FRF_COEFFICIENT_1L_4: - case MADERA_FRF_COEFFICIENT_1R_1: - case MADERA_FRF_COEFFICIENT_1R_2: - case MADERA_FRF_COEFFICIENT_1R_3: - case MADERA_FRF_COEFFICIENT_1R_4: - case MADERA_FRF_COEFFICIENT_2L_1: - case MADERA_FRF_COEFFICIENT_2L_2: - case MADERA_FRF_COEFFICIENT_2L_3: - case MADERA_FRF_COEFFICIENT_2L_4: - case MADERA_FRF_COEFFICIENT_2R_1: - case MADERA_FRF_COEFFICIENT_2R_2: - case MADERA_FRF_COEFFICIENT_2R_3: - case MADERA_FRF_COEFFICIENT_2R_4: - case MADERA_FRF_COEFFICIENT_3L_1: - case MADERA_FRF_COEFFICIENT_3L_2: - case MADERA_FRF_COEFFICIENT_3L_3: - case MADERA_FRF_COEFFICIENT_3L_4: - case MADERA_FRF_COEFFICIENT_3R_1: - case MADERA_FRF_COEFFICIENT_3R_2: - case MADERA_FRF_COEFFICIENT_3R_3: - case MADERA_FRF_COEFFICIENT_3R_4: - case MADERA_FRF_COEFFICIENT_5L_1: - case MADERA_FRF_COEFFICIENT_5L_2: - case MADERA_FRF_COEFFICIENT_5L_3: - case MADERA_FRF_COEFFICIENT_5L_4: - case MADERA_FRF_COEFFICIENT_5R_1: - case MADERA_FRF_COEFFICIENT_5R_2: - case MADERA_FRF_COEFFICIENT_5R_3: - case MADERA_FRF_COEFFICIENT_5R_4: - case MADERA_DFC1_CTRL: - case MADERA_DFC1_RX: - case MADERA_DFC1_TX: - case MADERA_DFC2_CTRL: - case MADERA_DFC2_RX: - case MADERA_DFC2_TX: - case MADERA_DFC3_CTRL: - case MADERA_DFC3_RX: - case MADERA_DFC3_TX: - case MADERA_DFC4_CTRL: - case MADERA_DFC4_RX: - case MADERA_DFC4_TX: - case MADERA_DFC5_CTRL: - case MADERA_DFC5_RX: - case MADERA_DFC5_TX: - case MADERA_DFC6_CTRL: - case MADERA_DFC6_RX: - case MADERA_DFC6_TX: - case MADERA_DFC7_CTRL: - case MADERA_DFC7_RX: - case MADERA_DFC7_TX: - case MADERA_DFC8_CTRL: - case MADERA_DFC8_RX: - case MADERA_DFC8_TX: - case MADERA_DFC_STATUS: - case MADERA_GPIO1_CTRL_1: - case MADERA_GPIO1_CTRL_2: - case MADERA_GPIO2_CTRL_1: - case MADERA_GPIO2_CTRL_2: - case MADERA_GPIO3_CTRL_1: - case MADERA_GPIO3_CTRL_2: - case MADERA_GPIO4_CTRL_1: - case MADERA_GPIO4_CTRL_2: - case MADERA_GPIO5_CTRL_1: - case MADERA_GPIO5_CTRL_2: - case MADERA_GPIO6_CTRL_1: - case MADERA_GPIO6_CTRL_2: - case MADERA_GPIO7_CTRL_1: - case MADERA_GPIO7_CTRL_2: - case MADERA_GPIO8_CTRL_1: - case MADERA_GPIO8_CTRL_2: - case MADERA_GPIO9_CTRL_1: - case MADERA_GPIO9_CTRL_2: - case MADERA_GPIO10_CTRL_1: - case MADERA_GPIO10_CTRL_2: - case MADERA_GPIO11_CTRL_1: - case MADERA_GPIO11_CTRL_2: - case MADERA_GPIO12_CTRL_1: - case MADERA_GPIO12_CTRL_2: - case MADERA_GPIO13_CTRL_1: - case MADERA_GPIO13_CTRL_2: - case MADERA_GPIO14_CTRL_1: - case MADERA_GPIO14_CTRL_2: - case MADERA_GPIO15_CTRL_1: - case MADERA_GPIO15_CTRL_2: - case MADERA_GPIO16_CTRL_1: - case MADERA_GPIO16_CTRL_2: - case MADERA_GPIO17_CTRL_1: - case MADERA_GPIO17_CTRL_2: - case MADERA_GPIO18_CTRL_1: - case MADERA_GPIO18_CTRL_2: - case MADERA_GPIO19_CTRL_1: - case MADERA_GPIO19_CTRL_2: - case MADERA_GPIO20_CTRL_1: - case MADERA_GPIO20_CTRL_2: - case MADERA_GPIO21_CTRL_1: - case MADERA_GPIO21_CTRL_2: - case MADERA_GPIO22_CTRL_1: - case MADERA_GPIO22_CTRL_2: - case MADERA_GPIO23_CTRL_1: - case MADERA_GPIO23_CTRL_2: - case MADERA_GPIO24_CTRL_1: - case MADERA_GPIO24_CTRL_2: - case MADERA_GPIO25_CTRL_1: - case MADERA_GPIO25_CTRL_2: - case MADERA_GPIO26_CTRL_1: - case MADERA_GPIO26_CTRL_2: - case MADERA_GPIO27_CTRL_1: - case MADERA_GPIO27_CTRL_2: - case MADERA_GPIO28_CTRL_1: - case MADERA_GPIO28_CTRL_2: - case MADERA_GPIO29_CTRL_1: - case MADERA_GPIO29_CTRL_2: - case MADERA_GPIO30_CTRL_1: - case MADERA_GPIO30_CTRL_2: - case MADERA_GPIO31_CTRL_1: - case MADERA_GPIO31_CTRL_2: - case MADERA_GPIO32_CTRL_1: - case MADERA_GPIO32_CTRL_2: - case MADERA_GPIO33_CTRL_1: - case MADERA_GPIO33_CTRL_2: - case MADERA_GPIO34_CTRL_1: - case MADERA_GPIO34_CTRL_2: - case MADERA_GPIO35_CTRL_1: - case MADERA_GPIO35_CTRL_2: - case MADERA_GPIO36_CTRL_1: - case MADERA_GPIO36_CTRL_2: - case MADERA_GPIO37_CTRL_1: - case MADERA_GPIO37_CTRL_2: - case MADERA_GPIO38_CTRL_1: - case MADERA_GPIO38_CTRL_2: - case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: - case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: - case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: - case MADERA_IRQ2_STATUS_9: - case MADERA_IRQ2_MASK_9: - case MADERA_IRQ2_RAW_STATUS_9: - case MADERA_INTERRUPT_DEBOUNCE_7: - case MADERA_IRQ1_CTRL: - return true; - default: - return false; - } -} - -static bool cs47l90_16bit_volatile_register(struct device *dev, - unsigned int reg) -{ - switch (reg) { - case MADERA_SOFTWARE_RESET: - case MADERA_HARDWARE_REVISION: - case MADERA_WRITE_SEQUENCER_CTRL_0: - case MADERA_WRITE_SEQUENCER_CTRL_1: - case MADERA_WRITE_SEQUENCER_CTRL_2: - case MADERA_HAPTICS_STATUS: - case MADERA_SAMPLE_RATE_1_STATUS: - case MADERA_SAMPLE_RATE_2_STATUS: - case MADERA_SAMPLE_RATE_3_STATUS: - case MADERA_ASYNC_SAMPLE_RATE_1_STATUS: - case MADERA_ASYNC_SAMPLE_RATE_2_STATUS: - case MADERA_HP_CTRL_1L: - case MADERA_HP_CTRL_1R: - case MADERA_HP_CTRL_2L: - case MADERA_HP_CTRL_2R: - case MADERA_HP_CTRL_3L: - case MADERA_HP_CTRL_3R: - case MADERA_MIC_DETECT_1_CONTROL_3: - case MADERA_MIC_DETECT_1_CONTROL_4: - case MADERA_MIC_DETECT_2_CONTROL_3: - case MADERA_MIC_DETECT_2_CONTROL_4: - case MADERA_HEADPHONE_DETECT_2: - case MADERA_HEADPHONE_DETECT_3: - case MADERA_HEADPHONE_DETECT_5: - case MADERA_INPUT_ENABLES_STATUS: - case MADERA_OUTPUT_STATUS_1: - case MADERA_RAW_OUTPUT_STATUS_1: - case MADERA_SPD1_TX_CHANNEL_STATUS_1: - case MADERA_SPD1_TX_CHANNEL_STATUS_2: - case MADERA_SPD1_TX_CHANNEL_STATUS_3: - case MADERA_SLIMBUS_RX_PORT_STATUS: - case MADERA_SLIMBUS_TX_PORT_STATUS: - case MADERA_FX_CTRL2: - case MADERA_ASRC2_STATUS: - case MADERA_ASRC1_STATUS: - case MADERA_CLOCK_CONTROL: - case MADERA_DFC_STATUS: - case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: - case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: - case MADERA_IRQ2_STATUS_9: - case MADERA_IRQ2_RAW_STATUS_9: - return true; - default: - return false; - } -} - -static bool cs47l90_32bit_readable_register(struct device *dev, - unsigned int reg) -{ - switch (reg) { - case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508: - case MADERA_OTP_HPDET_CAL_1 ... MADERA_OTP_HPDET_CAL_2: - case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP4_CONFIG_1 ... MADERA_DSP4_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP5_CONFIG_1 ... MADERA_DSP5_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP6_CONFIG_1 ... MADERA_DSP6_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP7_CONFIG_1 ... MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - return true; - default: - return cs47l90_is_adsp_memory(reg); - } -} - -static bool cs47l90_32bit_volatile_register(struct device *dev, - unsigned int reg) -{ - switch (reg) { - case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508: - case MADERA_OTP_HPDET_CAL_1 ... MADERA_OTP_HPDET_CAL_2: - case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP4_CONFIG_1 ... MADERA_DSP4_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP5_CONFIG_1 ... MADERA_DSP5_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP6_CONFIG_1 ... MADERA_DSP6_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - case MADERA_DSP7_CONFIG_1 ... MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR: - return true; - default: - return cs47l90_is_adsp_memory(reg); - } -} - -const struct regmap_config cs47l90_16bit_spi_regmap = { - .name = "cs47l90_16bit", - .reg_bits = 32, - .pad_bits = 16, - .val_bits = 16, - - .max_register = MADERA_INTERRUPT_RAW_STATUS_1, - .readable_reg = cs47l90_16bit_readable_register, - .volatile_reg = cs47l90_16bit_volatile_register, - - .cache_type = REGCACHE_RBTREE, - .reg_defaults = cs47l90_reg_default, - .num_reg_defaults = ARRAY_SIZE(cs47l90_reg_default), -}; -EXPORT_SYMBOL_GPL(cs47l90_16bit_spi_regmap); - -const struct regmap_config cs47l90_16bit_i2c_regmap = { - .name = "cs47l90_16bit", - .reg_bits = 32, - .val_bits = 16, - - .max_register = MADERA_INTERRUPT_RAW_STATUS_1, - .readable_reg = cs47l90_16bit_readable_register, - .volatile_reg = cs47l90_16bit_volatile_register, - - .cache_type = REGCACHE_RBTREE, - .reg_defaults = cs47l90_reg_default, - .num_reg_defaults = ARRAY_SIZE(cs47l90_reg_default), -}; -EXPORT_SYMBOL_GPL(cs47l90_16bit_i2c_regmap); - -const struct regmap_config cs47l90_32bit_spi_regmap = { - .name = "cs47l90_32bit", - .reg_bits = 32, - .reg_stride = 2, - .pad_bits = 16, - .val_bits = 32, - - .max_register = MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR, - .readable_reg = cs47l90_32bit_readable_register, - .volatile_reg = cs47l90_32bit_volatile_register, - - .cache_type = REGCACHE_RBTREE, -}; -EXPORT_SYMBOL_GPL(cs47l90_32bit_spi_regmap); - -const struct regmap_config cs47l90_32bit_i2c_regmap = { - .name = "cs47l90_32bit", - .reg_bits = 32, - .reg_stride = 2, - .val_bits = 32, - - .max_register = MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR, - .readable_reg = cs47l90_32bit_readable_register, - .volatile_reg = cs47l90_32bit_volatile_register, - - .cache_type = REGCACHE_RBTREE, -}; -EXPORT_SYMBOL_GPL(cs47l90_32bit_i2c_regmap); diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c deleted file mode 100644 index 49dcd57115ce..000000000000 --- a/drivers/mfd/madera-core.c +++ /dev/null @@ -1,953 +0,0 @@ -/* - * Core MFD support for Cirrus Logic Madera codecs - * - * Copyright 2015-2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "madera.h" - -#define CS47L35_SILICON_ID 0x6360 -#define CS47L85_SILICON_ID 0x6338 -#define CS47L90_SILICON_ID 0x6364 - -struct madera_sysclk_state { - unsigned int fll; - unsigned int sysclk; -}; - -static const char * const madera_core_supplies[] = { - "AVDD", - "DBVDD1", -}; - -static const struct mfd_cell madera_ldo1_devs[] = { - { .name = "madera-ldo1" }, -}; - -static const char * const cs47l35_supplies[] = { - "MICVDD", - "DBVDD2", - "CPVDD1", - "CPVDD2", - "SPKVDD", -}; - -static const struct mfd_cell cs47l35_devs[] = { - { .name = "madera-irq" }, - { .name = "madera-micsupp" }, - { .name = "madera-extcon" }, - { .name = "madera-gpio" }, - { .name = "madera-haptics" }, - { .name = "madera-pwm" }, - { - .name = "cs47l35-codec", - .parent_supplies = cs47l35_supplies, - .num_parent_supplies = ARRAY_SIZE(cs47l35_supplies), - }, -}; - -static const char * const cs47l85_supplies[] = { - "MICVDD", - "DBVDD2", - "DBVDD3", - "DBVDD4", - "CPVDD1", - "CPVDD2", - "SPKVDDL", - "SPKVDDR", -}; - -static const struct mfd_cell cs47l85_devs[] = { - { .name = "madera-irq" }, - { .name = "madera-micsupp" }, - { .name = "madera-extcon" }, - { .name = "madera-gpio" }, - { .name = "madera-haptics" }, - { .name = "madera-pwm" }, - { - .name = "cs47l85-codec", - .parent_supplies = cs47l85_supplies, - .num_parent_supplies = ARRAY_SIZE(cs47l85_supplies), - }, -}; - -static const char * const cs47l90_supplies[] = { - "MICVDD", - "DBVDD2", - "DBVDD3", - "DBVDD4", - "CPVDD1", - "CPVDD2", -}; - -static const struct mfd_cell cs47l90_devs[] = { - { .name = "madera-irq" }, - { .name = "madera-micsupp" }, - { .name = "madera-extcon" }, - { .name = "madera-gpio" }, - { .name = "madera-haptics" }, - { .name = "madera-pwm" }, - { - .name = "cs47l90-codec", - .parent_supplies = cs47l90_supplies, - .num_parent_supplies = ARRAY_SIZE(cs47l90_supplies), - }, -}; - -const char *madera_name_from_type(enum madera_type type) -{ - switch (type) { - case CS47L35: - return "CS47L35"; - case CS47L85: - return "CS47L85"; - case CS47L90: - return "CS47L90"; - case CS47L91: - return "CS47L91"; - case WM1840: - return "WM1840"; - default: - return "Unknown"; - } -} -EXPORT_SYMBOL_GPL(madera_name_from_type); - -#ifdef CONFIG_OF -const struct of_device_id madera_of_match[] = { - { .compatible = "cirrus,cs47l35", .data = (void *)CS47L35 }, - { .compatible = "cirrus,cs47l85", .data = (void *)CS47L85 }, - { .compatible = "cirrus,cs47l90", .data = (void *)CS47L90 }, - { .compatible = "cirrus,cs47l91", .data = (void *)CS47L91 }, - { .compatible = "cirrus,wm1840", .data = (void *)WM1840 }, - {}, -}; -EXPORT_SYMBOL_GPL(madera_of_match); -#endif - -static int madera_poll_reg(struct madera *madera, - int timeout, unsigned int reg, - unsigned int mask, unsigned int target) -{ - unsigned int val = 0; - int ret, i; - - for (i = 0; i < timeout; i++) { - ret = regmap_read(madera->regmap, reg, &val); - if (ret != 0) { - dev_err(madera->dev, "Failed to read reg %u: %d\n", - reg, ret); - continue; - } - - if ((val & mask) == target) - return 0; - - usleep_range(1000, 1010); - } - - dev_err(madera->dev, "Polling reg %u timed out: %x\n", reg, val); - return -ETIMEDOUT; -} - -static int madera_wait_for_boot(struct madera *madera) -{ - int ret, i; - unsigned int timeout = 5; - unsigned int val; - - /* ensure chid can read correctly, then check boot done bit */ - for (i = 0; i < timeout; i++) { - ret = regmap_read(madera->regmap, MADERA_SOFTWARE_RESET, &val); - if (ret != 0) { - dev_err(madera->dev, "Failed to read chip id, ret %d\n", ret); - continue; - } - if (val == CS47L35_SILICON_ID || val == CS47L90_SILICON_ID) - break; - - usleep_range(1000, 1010); - } - if (i >= timeout) - return -ETIMEDOUT; - /* - * We can't use an interrupt as we need to runtime resume to do so, - * we won't race with the interrupt handler as it'll be blocked on - * runtime resume. - */ - ret = madera_poll_reg(madera, 5, MADERA_IRQ1_RAW_STATUS_1, - MADERA_BOOT_DONE_STS1, MADERA_BOOT_DONE_STS1); - - if (!ret) - regmap_write(madera->regmap, MADERA_IRQ1_STATUS_1, - MADERA_BOOT_DONE_EINT1); - - pm_runtime_mark_last_busy(madera->dev); - - return ret; -} - -static inline void madera_enable_reset(struct madera *madera) -{ - if (gpio_is_valid(madera->pdata.reset)) - gpio_set_value_cansleep(madera->pdata.reset, 0); -} - -static void madera_disable_reset(struct madera *madera) -{ - if (gpio_is_valid(madera->pdata.reset)) { - gpio_set_value_cansleep(madera->pdata.reset, 1); - usleep_range(1000, 1010); - } -} - -static int madera_soft_reset(struct madera *madera) -{ - int ret; - - ret = regmap_write(madera->regmap, MADERA_SOFTWARE_RESET, 0); - if (ret != 0) { - dev_err(madera->dev, "Failed to soft reset device: %d\n", ret); - return ret; - } - usleep_range(1000, 1010); - return 0; -} - -static int madera_dcvdd_notify(struct notifier_block *nb, - unsigned long action, void *data) -{ - struct madera *madera = container_of(nb, struct madera, - dcvdd_notifier); - - dev_dbg(madera->dev, "DCVDD notify %lx\n", action); - - if (action & REGULATOR_EVENT_DISABLE) - madera->dcvdd_powered_off = true; - - return NOTIFY_DONE; -} - -#ifdef CONFIG_PM -static int madera_runtime_resume(struct device *dev) -{ - struct madera *madera = dev_get_drvdata(dev); - bool force_reset = false; - int ret; - - dev_dbg(madera->dev, "Leaving sleep mode\n"); - - /* If DCVDD didn't power off we must force a reset so that the - * cache syncs correctly. If we have a hardware reset this must - * be done before powering up DCVDD. If not, we'll use a software - * reset after powering-up DCVDD - */ - if (!madera->dcvdd_powered_off) { - dev_dbg(madera->dev, "DCVDD did not power off, forcing reset\n"); - force_reset = true; - madera_enable_reset(madera); - } - - ret = regulator_enable(madera->dcvdd); - if (ret) { - dev_err(madera->dev, "Failed to enable DCVDD: %d\n", ret); - return ret; - } - - regcache_cache_only(madera->regmap, false); - regcache_cache_only(madera->regmap_32bit, false); - - if (force_reset) { - if (gpio_is_valid(madera->pdata.reset)) { - madera_disable_reset(madera); - } else { - ret = madera_soft_reset(madera); - if (ret) - goto err; - } - } - - ret = madera_wait_for_boot(madera); - if (ret) - goto err; - - ret = regcache_sync(madera->regmap); - if (ret) { - dev_err(madera->dev, - "Failed to restore 16-bit register cache\n"); - goto err; - } - - ret = regcache_sync(madera->regmap_32bit); - if (ret) { - dev_err(madera->dev, - "Failed to restore 32-bit register cache\n"); - goto err; - } - - return 0; - -err: - regcache_cache_only(madera->regmap_32bit, true); - regcache_cache_only(madera->regmap, true); - madera->dcvdd_powered_off = false; - regulator_disable(madera->dcvdd); - return ret; -} - -static int madera_runtime_suspend(struct device *dev) -{ - struct madera *madera = dev_get_drvdata(dev); - - dev_dbg(madera->dev, "Entering sleep mode\n"); - - regcache_cache_only(madera->regmap, true); - regcache_mark_dirty(madera->regmap); - regcache_cache_only(madera->regmap_32bit, true); - regcache_mark_dirty(madera->regmap_32bit); - - madera->dcvdd_powered_off = false; - regulator_disable(madera->dcvdd); - - return 0; -} -#endif - -const struct dev_pm_ops madera_pm_ops = { - SET_RUNTIME_PM_OPS(madera_runtime_suspend, - madera_runtime_resume, - NULL) -}; -EXPORT_SYMBOL_GPL(madera_pm_ops); - -int madera_get_num_micbias(struct madera *madera, unsigned int *n_micbiases, - unsigned int *n_child_micbiases) -{ - unsigned int biases, children; - - switch (madera->type) { - case CS47L35: - biases = 2; - children = 2; - break; - case CS47L85: - case WM1840: - biases = 4; - children = 0; - break; - default: - biases = 2; - children = 4; - break; - } - - if (n_micbiases) - *n_micbiases = biases; - - if (n_child_micbiases) - *n_child_micbiases = children; - - return 0; -} -EXPORT_SYMBOL_GPL(madera_get_num_micbias); - -#ifdef CONFIG_OF -unsigned long madera_of_get_type(struct device *dev) -{ - const struct of_device_id *id = of_match_device(madera_of_match, dev); - - if (id) - return (unsigned long)id->data; - else - return 0; -} -EXPORT_SYMBOL_GPL(madera_of_get_type); - -static void madera_of_report_error(struct madera *madera, const char *prop, - bool mandatory, int err) -{ - switch (err) { - case -ENOENT: - if (mandatory) - dev_err(madera->dev, - "Mandatory DT property %s is missing\n", prop); - break; - default: - dev_err(madera->dev, - "DT property %s is malformed: %d\n", prop, err); - break; - } -} - -int madera_of_read_uint_array(struct madera *madera, const char *prop, - bool mandatory, - unsigned int *dest, int minlen, int maxlen) -{ - struct device_node *np = madera->dev->of_node; - struct property *tempprop; - const __be32 *cur; - u32 val; - int n_elems, i, ret; - - n_elems = of_property_count_u32_elems(np, prop); - if (n_elems < 0) { - /* of_property_count_u32_elems uses -EINVAL to mean missing */ - if (n_elems == -EINVAL) - ret = -ENOENT; - else - ret = n_elems; - goto err; - } - if (n_elems < minlen) { - ret = -EOVERFLOW; - goto err; - } - if (n_elems == 0) - return 0; - - i = 0; - of_property_for_each_u32(np, prop, tempprop, cur, val) { - if (i == maxlen) - break; - - dest[i++] = val; - } - - return i; - -err: - madera_of_report_error(madera, prop, mandatory, ret); - return ret; -} -EXPORT_SYMBOL_GPL(madera_of_read_uint_array); - -int madera_of_read_uint(struct madera *madera, const char *prop, - bool mandatory, unsigned int *data) -{ - u32 value; - int ret; - - ret = of_property_read_u32(madera->dev->of_node, prop, &value); - if (ret < 0) { - /* of_property_read_u32 uses EINVAL to mean missing */ - if (ret == -EINVAL) - ret = -ENOENT; - madera_of_report_error(madera, prop, mandatory, ret); - return ret; - } - - *data = value; - - return 0; -} -EXPORT_SYMBOL_GPL(madera_of_read_uint); - -static int madera_of_get_gpio_defaults(struct madera *madera, const char *prop) -{ - struct madera_pdata *pdata = &madera->pdata; - int n; - - - n = madera_of_read_uint_array(madera, prop, false, - pdata->gpio_defaults, - 0, ARRAY_SIZE(pdata->gpio_defaults)); - if (n < 0) - return n; - - /* - * All values are literal except out of range values - * which are chip default, translate into platform - * data which uses 0 as chip default and out of range - * as zero. - */ - while (n > 0) { - --n; - if (pdata->gpio_defaults[n] > 0xffff) - pdata->gpio_defaults[n] = 0; /* use chip default */ - else if (pdata->gpio_defaults[n] == 0) - pdata->gpio_defaults[n] = 0xffffffff; /* set to zero */ - } - - return 0; -} - -static int madera_of_get_micbias(struct madera *madera, - const char *prop, int index) -{ - int ret, i; - int j = 0; - u32 micbias_config[4 + MADERA_MAX_CHILD_MICBIAS] = {0}; - - BUILD_BUG_ON(ARRAY_SIZE(madera->pdata.micbias[0].discharge) != - MADERA_MAX_CHILD_MICBIAS); - - ret = madera_of_read_uint_array(madera, prop, false, micbias_config, - ARRAY_SIZE(micbias_config), - ARRAY_SIZE(micbias_config)); - - if (ret > 0) { - madera->pdata.micbias[index].mV = micbias_config[j++]; - madera->pdata.micbias[index].ext_cap = micbias_config[j++]; - for (i = 0; i < MADERA_MAX_CHILD_MICBIAS; i++) - madera->pdata.micbias[index].discharge[i] = - micbias_config[j++]; - madera->pdata.micbias[index].soft_start = micbias_config[j++]; - madera->pdata.micbias[index].bypass = micbias_config[j]; - } - - return ret; -} - -static int madera_of_get_core_pdata(struct madera *madera) -{ - struct madera_pdata *pdata = &madera->pdata; - - pdata->reset = of_get_named_gpio(madera->dev->of_node, - "reset-gpios", 0); - if (pdata->reset < 0) - madera_of_report_error(madera, "reset-gpios", false, - pdata->reset); - - madera_of_read_uint(madera, "cirrus,clk32k-src", false, - &pdata->clk32k_src); - - madera_of_get_micbias(madera, "cirrus,micbias1", 0); - madera_of_get_micbias(madera, "cirrus,micbias2", 1); - madera_of_get_micbias(madera, "cirrus,micbias3", 2); - madera_of_get_micbias(madera, "cirrus,micbias4", 3); - - /* We have to deal with the gpio defaults here. If none of the pins - * will be used as a GPIO it's not mandatory to include the GPIO - * child driver but the hardware block must still be setup correctly - */ - madera_of_get_gpio_defaults(madera, "cirrus,gpio-defaults"); - - return 0; -} -#endif - -static void madera_configure_gpio(struct madera *madera) -{ - unsigned int val; - int i; - - /* We can't leave this to the GPIO driver because most of the - * pins are used as digital audio interfaces, not GPIOs, - * so must be configured correctly on boot# - */ - for (i = 0; i < ARRAY_SIZE(madera->pdata.gpio_defaults); i++) { - val = madera->pdata.gpio_defaults[i]; - - if (val == 0) - continue; /* leave at chip default */ - - if (val > 0xffff) - val = 0; /* write as zero */ - - regmap_write(madera->regmap, MADERA_GPIO1_CTRL_1 + i, val); - } -} - -static int madera_configure_clk32k(struct madera *madera) -{ - unsigned int src_val; - int ret = 0; - - switch (madera->pdata.clk32k_src) { - case 0: - /* Default to MCLK2 */ - src_val = MADERA_32KZ_MCLK2 - 1; - break; - case MADERA_32KZ_MCLK1: - case MADERA_32KZ_MCLK2: - case MADERA_32KZ_SYSCLK: - src_val = (unsigned int)madera->pdata.clk32k_src - 1; - break; - default: - dev_err(madera->dev, "Invalid 32kHz clock source: %d\n", - madera->pdata.clk32k_src); - return -EINVAL; - } - - ret = regmap_update_bits(madera->regmap, MADERA_CLOCK_32K_1, - MADERA_CLK_32K_ENA_MASK | MADERA_CLK_32K_SRC_MASK, - MADERA_CLK_32K_ENA | src_val); - if (ret) - dev_err(madera->dev, "Failed to init 32kHz clock: %d\n", ret); - - return ret; -} - -static void madera_configure_micbias(struct madera *madera) -{ - unsigned int max_micbias = 0, num_child_micbias = 0; - unsigned int val, mask; - int i, j; - - madera_get_num_micbias(madera, &max_micbias, &num_child_micbias); - - for (i = 0; i < max_micbias; i++) { - if (!madera->pdata.micbias[i].mV && - !madera->pdata.micbias[i].bypass) - continue; - - /* Apply default for bypass mode */ - if (!madera->pdata.micbias[i].mV) - madera->pdata.micbias[i].mV = 2800; - - val = (madera->pdata.micbias[i].mV - 1500) / 100; - - mask = MADERA_MICB1_LVL_MASK | MADERA_MICB1_EXT_CAP | - MADERA_MICB1_BYPASS | MADERA_MICB1_RATE; - - val <<= MADERA_MICB1_LVL_SHIFT; - - if (madera->pdata.micbias[i].ext_cap) - val |= MADERA_MICB1_EXT_CAP; - - if (num_child_micbias == 0) { - mask |= MADERA_MICB1_DISCH; - if (madera->pdata.micbias[i].discharge[0]) - val |= MADERA_MICB1_DISCH; - } - - if (madera->pdata.micbias[i].soft_start) - val |= MADERA_MICB1_RATE; - - if (madera->pdata.micbias[i].bypass) - val |= MADERA_MICB1_BYPASS; - - regmap_update_bits(madera->regmap, MADERA_MIC_BIAS_CTRL_1 + i, - mask, val); - - if (num_child_micbias) { - val = 0; - mask = 0; - for (j = 0; j < num_child_micbias; j++) { - mask |= (MADERA_MICB1A_DISCH << (j * 4)); - if (madera->pdata.micbias[i].discharge[j]) - val |= (MADERA_MICB1A_DISCH << (j * 4)); - } - regmap_update_bits(madera->regmap, - MADERA_MIC_BIAS_CTRL_5 + (i * 2), - mask, val); - } - } -} - -int madera_dev_init(struct madera *madera) -{ - struct device *dev = madera->dev; - const char *name; - unsigned int hwid, reg; - int (*patch_fn)(struct madera *) = NULL; - const struct mfd_cell *mfd_devs; - int n_devs, i; - int ret; - - dev_set_drvdata(madera->dev, madera); - mutex_init(&madera->reg_setting_lock); - BLOCKING_INIT_NOTIFIER_HEAD(&madera->notifier); - - /* default headphone impedance in case the extcon driver is not used */ - for (i = 0; i < ARRAY_SIZE(madera->hp_impedance_x100); ++i) - madera->hp_impedance_x100[i] = 3200; - - if (dev_get_platdata(madera->dev)) { - memcpy(&madera->pdata, dev_get_platdata(madera->dev), - sizeof(madera->pdata)); - - /* We use 0 in pdata to indicate a GPIO has not been set, - * translate to -1 so that gpio_is_valid() will work - */ - if (!madera->pdata.reset) - madera->pdata.reset = -1; - } else if (IS_ENABLED(CONFIG_OF)) { - madera_of_get_core_pdata(madera); - } - - regcache_cache_only(madera->regmap, true); - regcache_cache_only(madera->regmap_32bit, true); - - for (i = 0; i < ARRAY_SIZE(madera_core_supplies); i++) - madera->core_supplies[i].supply = madera_core_supplies[i]; - madera->num_core_supplies = ARRAY_SIZE(madera_core_supplies); - - switch (madera->type) { - case CS47L35: - case CS47L90: - case CS47L91: - break; - case CS47L85: - case WM1840: - ret = mfd_add_devices(madera->dev, -1, madera_ldo1_devs, - ARRAY_SIZE(madera_ldo1_devs), NULL, 0, NULL); - if (ret != 0) { - dev_err(dev, "Failed to add LDO1 child: %d\n", ret); - return ret; - } - break; - default: - dev_err(madera->dev, "Unknown device type %d\n", madera->type); - return -EINVAL; - } - - ret = devm_regulator_bulk_get(dev, madera->num_core_supplies, - madera->core_supplies); - if (ret) { - dev_err(dev, "Failed to request core supplies: %d\n", ret); - goto err_devs; - } - - /** - * Don't use devres here because the only device we have to get - * against is the MFD device and DCVDD will likely be supplied by - * one of its children. Meaning that the regulator will be - * destroyed by the time devres calls regulator put. - */ - madera->dcvdd = regulator_get(madera->dev, "DCVDD"); - if (IS_ERR(madera->dcvdd)) { - ret = PTR_ERR(madera->dcvdd); - dev_err(dev, "Failed to request DCVDD: %d\n", ret); - goto err_devs; - } - - madera->dcvdd_notifier.notifier_call = madera_dcvdd_notify; - ret = regulator_register_notifier(madera->dcvdd, - &madera->dcvdd_notifier); - if (ret) { - dev_err(dev, "Failed to register DCVDD notifier %d\n", ret); - goto err_dcvdd; - } - - if (gpio_is_valid(madera->pdata.reset)) { - /* Start out with /RESET low to put the chip into reset */ - ret = devm_gpio_request_one(madera->dev, madera->pdata.reset, - GPIOF_DIR_OUT | GPIOF_INIT_LOW, - "madera /RESET"); - if (ret) { - dev_err(dev, "Failed to request /RESET: %d\n", ret); - goto err_notifier; - } - } - - /* Ensure period of reset asserted before we apply the supplies */ - msleep(20); - - ret = regulator_bulk_enable(madera->num_core_supplies, - madera->core_supplies); - if (ret) { - dev_err(dev, "Failed to enable core supplies: %d\n", ret); - goto err_notifier; - } - - ret = regulator_enable(madera->dcvdd); - if (ret) { - dev_err(dev, "Failed to enable DCVDD: %d\n", ret); - goto err_enable; - } - - madera_disable_reset(madera); - - regcache_cache_only(madera->regmap, false); - regcache_cache_only(madera->regmap_32bit, false); - - /* If we don't have a /RESET GPIO use a soft reset */ - if (!madera->pdata.reset) { - ret = madera_soft_reset(madera); - if (ret) - goto err_reset; - } - - ret = madera_wait_for_boot(madera); - if (ret) { - dev_err(madera->dev, "Device failed initial boot: %d\n", ret); - goto err_reset; - } - /* Verify that this is a chip we know about before we - * starting doing any writes to its registers - */ - ret = regmap_read(madera->regmap, MADERA_SOFTWARE_RESET, ®); - if (ret) { - dev_err(dev, "Failed to read ID register: %d\n", ret); - goto err_reset; - } - - switch (reg) { - case CS47L35_SILICON_ID: - case CS47L85_SILICON_ID: - case CS47L90_SILICON_ID: - break; - default: - dev_err(madera->dev, "Unknown device ID: %x\n", reg); - ret = -EINVAL; - goto err_reset; - } - - /* Read the device ID information & do device specific stuff */ - ret = regmap_read(madera->regmap, MADERA_SOFTWARE_RESET, &hwid); - if (ret) { - dev_err(dev, "Failed to read ID register: %d\n", ret); - goto err_reset; - } - - ret = regmap_read(madera->regmap, MADERA_HARDWARE_REVISION, - &madera->rev); - if (ret) { - dev_err(dev, "Failed to read revision register: %d\n", ret); - goto err_reset; - } - madera->rev &= MADERA_HW_REVISION_MASK; - - name = madera_name_from_type(madera->type); - - switch (hwid) { - case CS47L35_SILICON_ID: - if (IS_ENABLED(CONFIG_MFD_CS47L35)) { - switch (madera->type) { - case CS47L35: - patch_fn = cs47l35_patch; - mfd_devs = cs47l35_devs; - n_devs = ARRAY_SIZE(cs47l35_devs); - break; - default: - ret = -EINVAL; - break; - } - } else { - ret = -EINVAL; - } - break; - case CS47L85_SILICON_ID: - if (IS_ENABLED(CONFIG_MFD_CS47L85)) { - switch (madera->type) { - case CS47L85: - case WM1840: - patch_fn = cs47l85_patch; - mfd_devs = cs47l85_devs; - n_devs = ARRAY_SIZE(cs47l85_devs); - break; - default: - ret = -EINVAL; - break; - } - } else { - ret = -EINVAL; - } - break; - case CS47L90_SILICON_ID: - if (IS_ENABLED(CONFIG_MFD_CS47L90)) { - switch (madera->type) { - case CS47L90: - case CS47L91: - patch_fn = cs47l90_patch; - mfd_devs = cs47l90_devs; - n_devs = ARRAY_SIZE(cs47l90_devs); - break; - default: - ret = -EINVAL; - break; - } - } else { - ret = -EINVAL; - } - break; - default: - ret = -EINVAL; - break; - } - - if (ret == -EINVAL) { - dev_err(madera->dev, "Device ID 0x%x is not a %s\n", - hwid, name); - goto err_reset; - } - - dev_info(dev, "%s silicon revision %d\n", name, madera->rev); - - /* Apply hardware patch */ - if (patch_fn) { - ret = patch_fn(madera); - if (ret) { - dev_err(madera->dev, "Failed to apply patch %d\n", ret); - goto err_reset; - } - } - - madera_configure_gpio(madera); - - ret = madera_configure_clk32k(madera); - if (ret) - goto err_reset; - - madera_configure_micbias(madera); - - pm_runtime_set_active(madera->dev); - pm_runtime_enable(madera->dev); - pm_runtime_set_autosuspend_delay(madera->dev, 100); - pm_runtime_use_autosuspend(madera->dev); - pm_runtime_get(madera->dev); - - ret = mfd_add_devices(madera->dev, -1, mfd_devs, n_devs, NULL, 0, NULL); - if (ret) { - dev_err(madera->dev, "Failed to add subdevices: %d\n", ret); - goto err_reset; - } - - return 0; - -err_reset: - madera_enable_reset(madera); - regulator_disable(madera->dcvdd); -err_enable: - regulator_bulk_disable(madera->num_core_supplies, - madera->core_supplies); -err_notifier: - regulator_unregister_notifier(madera->dcvdd, &madera->dcvdd_notifier); -err_dcvdd: - regulator_put(madera->dcvdd); -err_devs: - mfd_remove_devices(dev); - return ret; -} -EXPORT_SYMBOL_GPL(madera_dev_init); - -int madera_dev_exit(struct madera *madera) -{ - pm_runtime_disable(madera->dev); - - regulator_disable(madera->dcvdd); - regulator_unregister_notifier(madera->dcvdd, &madera->dcvdd_notifier); - regulator_put(madera->dcvdd); - - mfd_remove_devices(madera->dev); - madera_enable_reset(madera); - - regulator_bulk_disable(madera->num_core_supplies, - madera->core_supplies); - return 0; -} -EXPORT_SYMBOL_GPL(madera_dev_exit); diff --git a/drivers/mfd/madera-spi.c b/drivers/mfd/madera-spi.c deleted file mode 100644 index 9a970291cf2e..000000000000 --- a/drivers/mfd/madera-spi.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * SPI bus interface to Cirrus Logic Madera codecs - * - * Copyright 2015 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include "madera.h" - -static int madera_spi_probe(struct spi_device *spi) -{ - const struct spi_device_id *id = spi_get_device_id(spi); - struct madera *madera; - const struct regmap_config *regmap_16bit_config = NULL; - const struct regmap_config *regmap_32bit_config = NULL; - unsigned long type; - int ret; - - dev_info(&spi->dev, "***********%s***********\n", __func__); - if (spi->dev.of_node) - type = madera_of_get_type(&spi->dev); - else - type = id->driver_data; - - switch (type) { - case CS47L35: - if (IS_ENABLED(CONFIG_MFD_CS47L35)) { - regmap_16bit_config = &cs47l35_16bit_spi_regmap; - regmap_32bit_config = &cs47l35_32bit_spi_regmap; - } - break; - case CS47L85: - case WM1840: - if (IS_ENABLED(CONFIG_MFD_CS47L85)) { - regmap_16bit_config = &cs47l85_16bit_spi_regmap; - regmap_32bit_config = &cs47l85_32bit_spi_regmap; - } - break; - case CS47L90: - case CS47L91: - if (IS_ENABLED(CONFIG_MFD_CS47L90)) { - regmap_16bit_config = &cs47l90_16bit_spi_regmap; - regmap_32bit_config = &cs47l90_32bit_spi_regmap; - } - break; - default: - dev_err(&spi->dev, - "Unknown Madera SPI device type %ld\n", type); - return -EINVAL; - } - - if (!regmap_16bit_config) { - dev_err(&spi->dev, - "Kernel does not include support for %s\n", - madera_name_from_type(type)); - return -EINVAL; - } - - madera = devm_kzalloc(&spi->dev, sizeof(*madera), GFP_KERNEL); - if (!madera) - return -ENOMEM; - - madera->regmap = devm_regmap_init_spi(spi, regmap_16bit_config); - if (IS_ERR(madera->regmap)) { - ret = PTR_ERR(madera->regmap); - dev_err(&spi->dev, - "Failed to allocate 16-bit register map: %d\n", ret); - return ret; - } - - madera->regmap_32bit = devm_regmap_init_spi(spi, regmap_32bit_config); - if (IS_ERR(madera->regmap_32bit)) { - ret = PTR_ERR(madera->regmap_32bit); - dev_err(&spi->dev, - "Failed to allocate 32-bit register map: %d\n", ret); - return ret; - } - - madera->type = type; - madera->dev = &spi->dev; - madera->irq = spi->irq; - - return madera_dev_init(madera); -} - -static int madera_spi_remove(struct spi_device *spi) -{ - struct madera *madera = spi_get_drvdata(spi); - - madera_dev_exit(madera); - return 0; -} - -static const struct spi_device_id madera_spi_ids[] = { - { "cs47l35", CS47L35 }, - { "cs47l85", CS47L85 }, - { "cs47l90", CS47L90 }, - { "cs47l91", CS47L91 }, - { "wm1840", WM1840 }, - { }, -}; -MODULE_DEVICE_TABLE(spi, madera_spi_ids); - -static struct spi_driver madera_spi_driver = { - .driver = { - .name = "madera", - .owner = THIS_MODULE, - .pm = &madera_pm_ops, - .of_match_table = of_match_ptr(madera_of_match), - }, - .probe = madera_spi_probe, - .remove = madera_spi_remove, - .id_table = madera_spi_ids, -}; - -module_spi_driver(madera_spi_driver); - -MODULE_DESCRIPTION("Madera SPI bus interface"); -MODULE_AUTHOR("Richard Fitzgerald "); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/madera.h b/drivers/mfd/madera.h deleted file mode 100644 index 538011a2b9bf..000000000000 --- a/drivers/mfd/madera.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * madera.h -- MFD internals for Cirrus Logic Madera codecs - * - * Copyright 2015-2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _MADERA_MFD_H -#define _MADERA_MFD_H - -#include -#include - -struct madera; - -extern const struct dev_pm_ops madera_pm_ops; -extern const struct of_device_id madera_of_match[]; - -int madera_dev_init(struct madera *madera); -int madera_dev_exit(struct madera *madera); -int madera_irq_init(struct madera *madera); -int madera_irq_exit(struct madera *madera); - -#ifdef CONFIG_OF -unsigned long madera_of_get_type(struct device *dev); -#else -static inline unsigned long madera_of_get_type(struct device *dev) -{ - return 0; -} -#endif - -extern const struct regmap_config cs47l35_16bit_spi_regmap; -extern const struct regmap_config cs47l35_32bit_spi_regmap; -extern const struct regmap_config cs47l35_16bit_i2c_regmap; -extern const struct regmap_config cs47l35_32bit_i2c_regmap; -extern int cs47l35_patch(struct madera *madera); - -extern const struct regmap_config cs47l85_16bit_spi_regmap; -extern const struct regmap_config cs47l85_32bit_spi_regmap; -extern const struct regmap_config cs47l85_16bit_i2c_regmap; -extern const struct regmap_config cs47l85_32bit_i2c_regmap; -extern int cs47l85_patch(struct madera *madera); - -extern const struct regmap_config cs47l90_16bit_spi_regmap; -extern const struct regmap_config cs47l90_32bit_spi_regmap; -extern const struct regmap_config cs47l90_16bit_i2c_regmap; -extern const struct regmap_config cs47l90_32bit_i2c_regmap; -extern int cs47l90_patch(struct madera *madera); - -#endif diff --git a/drivers/regulator/Android.mk b/drivers/regulator/Android.mk deleted file mode 100644 index 944e119f69b3..000000000000 --- a/drivers/regulator/Android.mk +++ /dev/null @@ -1,14 +0,0 @@ -DLKM_DIR := motorola/kernel/modules -LOCAL_PATH := $(call my-dir) - -include $(CLEAR_VARS) -LOCAL_MODULE := madera-ldo1.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - -include $(CLEAR_VARS) -LOCAL_MODULE := madera-micsupp.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk diff --git a/drivers/regulator/Kbuild b/drivers/regulator/Kbuild deleted file mode 100644 index cd94e147ebbb..000000000000 --- a/drivers/regulator/Kbuild +++ /dev/null @@ -1,5 +0,0 @@ -# add -Wall to try to catch everything we can. -EXTRA_CFLAGS += -Wall -EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/include - -obj-m += madera-ldo1.o madera-micsupp.o diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile deleted file mode 100644 index 34b09dd815a7..000000000000 --- a/drivers/regulator/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build - -all: - $(MAKE) -C $(KERNEL_SRC) M=$(shell pwd) modules $(KBUILD_OPTIONS) - -modules_install: - $(MAKE) INSTALL_MOD_STRIP=1 -C $(KERNEL_SRC) M=$(shell pwd) modules_install - -clean: - $(MAKE) -C $(KERNEL_SRC) M=$(PWD) clean \ No newline at end of file diff --git a/drivers/regulator/madera-ldo1.c b/drivers/regulator/madera-ldo1.c deleted file mode 100644 index 142de57d9133..000000000000 --- a/drivers/regulator/madera-ldo1.c +++ /dev/null @@ -1,208 +0,0 @@ -/* - * madera-ldo1.c -- Driver for the LDO1 regulator on Madera codecs - * - * Copyright 2015-2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -struct madera_ldo1 { - struct regulator_dev *regulator; - - struct regulator_consumer_supply supply; - struct regulator_init_data init_data; -}; - -static const struct regulator_ops madera_ldo1_ops = { - .list_voltage = regulator_list_voltage_linear, - .map_voltage = regulator_map_voltage_linear, - .get_voltage_sel = regulator_get_voltage_sel_regmap, - .set_voltage_sel = regulator_set_voltage_sel_regmap, -}; - -static const struct regulator_desc madera_ldo1 = { - .name = "LDO1", - .supply_name = "LDOVDD", - .type = REGULATOR_VOLTAGE, - .ops = &madera_ldo1_ops, - - .vsel_reg = MADERA_LDO1_CONTROL_1, - .vsel_mask = MADERA_LDO1_VSEL_MASK, - .min_uV = 900000, - .uV_step = 25000, - .n_voltages = 13, - .enable_time = 3000, - - .owner = THIS_MODULE, -}; - -static const struct regulator_init_data madera_ldo1_default = { - .constraints = { - .min_uV = 1200000, - .max_uV = 1200000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, -}; - -static int madera_ldo1_of_get_pdata(struct madera *madera, - struct regulator_config *config, - const struct regulator_desc *desc) -{ - struct madera_pdata *pdata = &madera->pdata; - struct madera_ldo1 *ldo1 = config->driver_data; - struct device_node *init_node, *dcvdd_node; - struct regulator_init_data *init_data; - - init_node = of_get_child_by_name(madera->dev->of_node, "ldo1"); - dcvdd_node = of_parse_phandle(madera->dev->of_node, "DCVDD-supply", 0); - - if (init_node) { - config->of_node = init_node; - - init_data = of_get_regulator_init_data(madera->dev, init_node, - desc); - - if (init_data) { - init_data->consumer_supplies = &ldo1->supply; - init_data->num_consumer_supplies = 1; - - if (dcvdd_node && dcvdd_node != init_node) - madera->internal_dcvdd = false; - - pdata->ldo1.init_data = init_data; - } - } else if (dcvdd_node) { - madera->internal_dcvdd = false; - } - - if (madera->internal_dcvdd) { - pdata->ldo1.ldoena = of_get_named_gpio(madera->dev->of_node, - "cirrus,ldoena-gpios", - 0); - if (pdata->ldo1.ldoena < 0) { - if (pdata->ldo1.ldoena != -ENOENT) - dev_warn(madera->dev, - "Malformed cirrus,ldoena-gpios ignored: %d\n", - pdata->ldo1.ldoena); - - pdata->ldo1.ldoena = 0; - } - } - - of_node_put(dcvdd_node); - - return 0; -} - -static int madera_ldo1_probe(struct platform_device *pdev) -{ - struct madera *madera = dev_get_drvdata(pdev->dev.parent); - const struct regulator_desc *desc; - struct regulator_config config = { }; - struct madera_ldo1 *ldo1; - int ret; - - madera->internal_dcvdd = true; - - ldo1 = devm_kzalloc(&pdev->dev, sizeof(*ldo1), GFP_KERNEL); - if (!ldo1) - return -ENOMEM; - - /* - * Since the chip usually supplies itself we provide some - * default init_data for it. This will be overridden with - * platform data if provided. - */ - desc = &madera_ldo1; - ldo1->init_data = madera_ldo1_default; - - ldo1->init_data.consumer_supplies = &ldo1->supply; - ldo1->supply.supply = "DCVDD"; - ldo1->supply.dev_name = dev_name(madera->dev); - - config.dev = madera->dev; - config.driver_data = ldo1; - config.regmap = madera->regmap; - - if (IS_ENABLED(CONFIG_OF)) { - if (!dev_get_platdata(madera->dev)) { - ret = madera_ldo1_of_get_pdata(madera, &config, desc); - if (ret < 0) - return ret; - } - } - - /* pdata entries default to 0 if not explicitly set. If the - * value is 0 this means 'undefined' - */ - if (madera->pdata.ldo1.ldoena == 0) - madera->pdata.ldo1.ldoena = -1; - - if (madera->pdata.ldo1.init_data) - ldo1->init_data = *madera->pdata.ldo1.init_data; - - config.ena_gpio = madera->pdata.ldo1.ldoena; - config.ena_gpio_flags = GPIOF_OUT_INIT_LOW; - - config.init_data = &ldo1->init_data; - - /* - * LDO1 can only be used to supply DCVDD so if it has no - * consumers then DCVDD is supplied externally. - */ - if (config.init_data->num_consumer_supplies == 0) - madera->internal_dcvdd = false; - - ldo1->regulator = devm_regulator_register(&pdev->dev, desc, &config); - - of_node_put(config.of_node); - - if (IS_ERR(ldo1->regulator)) { - ret = PTR_ERR(ldo1->regulator); - dev_err(madera->dev, "Failed to register LDO1 supply: %d\n", - ret); - return ret; - } - - platform_set_drvdata(pdev, ldo1); - - return 0; -} - -static struct platform_driver madera_ldo1_driver = { - .probe = madera_ldo1_probe, - .driver = { - .name = "madera-ldo1", - }, -}; - -module_platform_driver(madera_ldo1_driver); - -MODULE_DESCRIPTION("Madera LDO1 driver"); -MODULE_AUTHOR("Charles Keepax "); -MODULE_AUTHOR("Richard Fitzgerald "); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:madera-ldo1"); diff --git a/drivers/regulator/madera-micsupp.c b/drivers/regulator/madera-micsupp.c deleted file mode 100644 index 71e191c55bca..000000000000 --- a/drivers/regulator/madera-micsupp.c +++ /dev/null @@ -1,322 +0,0 @@ -/* - * madera-micsupp.c -- Driver for the mic supply regulator on Madera codecs - * - * Copyright 2015-2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -struct madera_micsupp { - struct regulator_dev *regulator; - struct madera *madera; - - struct regulator_consumer_supply supply; - struct regulator_init_data init_data; - - struct work_struct check_cp_work; -}; - -static void madera_micsupp_check_cp(struct work_struct *work) -{ - struct madera_micsupp *micsupp = - container_of(work, struct madera_micsupp, check_cp_work); - struct snd_soc_dapm_context *dapm = micsupp->madera->dapm; - struct madera *madera = micsupp->madera; - struct regmap *regmap = madera->regmap; - unsigned int reg; - int ret; - - if (dapm) { - ret = regmap_read(regmap, MADERA_MIC_CHARGE_PUMP_1, ®); - if (ret) { - dev_err(madera->dev, - "Failed to read CP state: %d\n", ret); - return; - } - - if ((reg & (MADERA_CPMIC_ENA | MADERA_CPMIC_BYPASS)) == - MADERA_CPMIC_ENA) { - snd_soc_dapm_enable_pin(dapm, "MICSUPP"); - madera->micvdd_regulated = true; - } else { - snd_soc_dapm_disable_pin(dapm, "MICSUPP"); - madera->micvdd_regulated = false; - } - - snd_soc_dapm_sync(dapm); - } -} - -static int madera_micsupp_enable(struct regulator_dev *rdev) -{ - struct madera_micsupp *micsupp = rdev_get_drvdata(rdev); - int ret; - - ret = regulator_enable_regmap(rdev); - - if (ret == 0) - schedule_work(&micsupp->check_cp_work); - - return ret; -} - -static int madera_micsupp_disable(struct regulator_dev *rdev) -{ - struct madera_micsupp *micsupp = rdev_get_drvdata(rdev); - int ret; - - ret = regulator_disable_regmap(rdev); - if (ret == 0) - schedule_work(&micsupp->check_cp_work); - - return ret; -} - -static int madera_micsupp_set_bypass(struct regulator_dev *rdev, bool ena) -{ - struct madera_micsupp *micsupp = rdev_get_drvdata(rdev); - int ret; - - ret = regulator_set_bypass_regmap(rdev, ena); - udelay(1000); - if (ret == 0) - schedule_work(&micsupp->check_cp_work); - - return ret; -} - -static const struct regulator_ops madera_micsupp_ops = { - .enable = madera_micsupp_enable, - .disable = madera_micsupp_disable, - .is_enabled = regulator_is_enabled_regmap, - - .list_voltage = regulator_list_voltage_linear_range, - .map_voltage = regulator_map_voltage_linear_range, - - .get_voltage_sel = regulator_get_voltage_sel_regmap, - .set_voltage_sel = regulator_set_voltage_sel_regmap, - - .get_bypass = regulator_get_bypass_regmap, - .set_bypass = madera_micsupp_set_bypass, -}; - -static const struct regulator_linear_range madera_micsupp_ranges[] = { - REGULATOR_LINEAR_RANGE(900000, 0, 0x14, 25000), - REGULATOR_LINEAR_RANGE(1500000, 0x15, 0x27, 100000), -}; - -static const struct regulator_desc madera_micsupp = { - .name = "MICVDD", - .supply_name = "CPVDD1", - .type = REGULATOR_VOLTAGE, - .n_voltages = 40, - .ops = &madera_micsupp_ops, - - .vsel_reg = MADERA_LDO2_CONTROL_1, - .vsel_mask = MADERA_LDO2_VSEL_MASK, - .enable_reg = MADERA_MIC_CHARGE_PUMP_1, - .enable_mask = MADERA_CPMIC_ENA, - .bypass_reg = MADERA_MIC_CHARGE_PUMP_1, - .bypass_mask = MADERA_CPMIC_BYPASS, - - .linear_ranges = madera_micsupp_ranges, - .n_linear_ranges = ARRAY_SIZE(madera_micsupp_ranges), - - .enable_time = 3000, - - .owner = THIS_MODULE, -}; - -static const struct regulator_init_data madera_micsupp_default = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_BYPASS, - .min_uV = 900000, - .max_uV = 3300000, - }, - - .num_consumer_supplies = 1, -}; - -static int madera_micsupp_of_get_pdata(struct madera *madera, - struct regulator_config *config, - const struct regulator_desc *desc) -{ - struct madera_pdata *pdata = &madera->pdata; - struct madera_micsupp *micsupp = config->driver_data; - struct device_node *np; - struct regulator_init_data *init_data; - - np = of_get_child_by_name(madera->dev->of_node, "micvdd"); - - if (np) { - config->of_node = np; - - init_data = of_get_regulator_init_data(madera->dev, np, desc); - - if (init_data) { - init_data->consumer_supplies = &micsupp->supply; - init_data->num_consumer_supplies = 1; - - pdata->micsupp.init_data = init_data; - } - } - - return 0; -} - -static unsigned int madera_get_max_micbias(struct madera *madera) -{ - unsigned int num_micbias, i, micbias_mv; - unsigned int max_micbias = 0; - int ret; - - madera_get_num_micbias(madera, &num_micbias, NULL); - - for (i = 0; i < num_micbias; i++) { - ret = regmap_read(madera->regmap, MADERA_MIC_BIAS_CTRL_1 + i, - &micbias_mv); - if (ret) { - dev_err(madera->dev, - "Failed to read micbias level: %d\n", ret); - return 0; - } - - micbias_mv = (micbias_mv & MADERA_MICB1_LVL_MASK) >> - MADERA_MICB1_LVL_SHIFT; - micbias_mv = 1500 + (100 * micbias_mv); - - if (micbias_mv > max_micbias) - max_micbias = micbias_mv; - } - - return max_micbias * 1000; -} - -static int madera_micsupp_probe(struct platform_device *pdev) -{ - struct madera *madera = dev_get_drvdata(pdev->dev.parent); - const struct regulator_desc *desc; - struct regulator_config config = { }; - struct madera_micsupp *micsupp; - int ret; - unsigned int max_micbias; - - micsupp = devm_kzalloc(&pdev->dev, sizeof(*micsupp), GFP_KERNEL); - if (!micsupp) - return -ENOMEM; - - micsupp->madera = madera; - INIT_WORK(&micsupp->check_cp_work, madera_micsupp_check_cp); - - /* - * Since the chip usually supplies itself we provide some - * default init_data for it. This will be overridden with - * platform data if provided. - */ - desc = &madera_micsupp; - micsupp->init_data = madera_micsupp_default; - - micsupp->init_data.consumer_supplies = &micsupp->supply; - micsupp->supply.supply = "MICVDD"; - micsupp->supply.dev_name = dev_name(madera->dev); - - config.dev = madera->dev; - config.driver_data = micsupp; - config.regmap = madera->regmap; - - if (IS_ENABLED(CONFIG_OF)) { - if (!dev_get_platdata(madera->dev)) { - ret = madera_micsupp_of_get_pdata(madera, &config, - desc); - if (ret < 0) - return ret; - } - } - - max_micbias = madera_get_max_micbias(madera); - if (max_micbias) { - /* micvdd must be 200mV more than maximum micbias */ - max_micbias += 200000; - if (micsupp->init_data.constraints.max_uV >= max_micbias) { - micsupp->init_data.constraints.max_uV = max_micbias; - micsupp->init_data.constraints.min_uV = max_micbias; - micsupp->init_data.constraints.apply_uV = true; - micsupp->init_data.constraints.valid_ops_mask &= - ~REGULATOR_CHANGE_VOLTAGE; - } - } - - if (madera->pdata.micsupp.init_data) - config.init_data = madera->pdata.micsupp.init_data; - else - config.init_data = &micsupp->init_data; - - if (max_micbias) { - if (config.init_data->constraints.max_uV < max_micbias) - dev_err(madera->dev, - "micvdd must be atleast set to %duV\n", - max_micbias); - } - - /* Default to bypassed mode */ - regmap_update_bits(madera->regmap, MADERA_MIC_CHARGE_PUMP_1, - MADERA_CPMIC_BYPASS, MADERA_CPMIC_BYPASS); - - micsupp->regulator = devm_regulator_register(&pdev->dev, desc, - &config); - - of_node_put(config.of_node); - - if (IS_ERR(micsupp->regulator)) { - ret = PTR_ERR(micsupp->regulator); - dev_err(madera->dev, "Failed to register mic supply: %d\n", - ret); - return ret; - } - - platform_set_drvdata(pdev, micsupp); - - return 0; -} - -static struct platform_driver madera_micsupp_driver = { - .probe = madera_micsupp_probe, - .driver = { - .name = "madera-micsupp", - }, -}; - -module_platform_driver(madera_micsupp_driver); - -/* Module information */ -MODULE_DESCRIPTION("Madera microphone supply driver"); -MODULE_AUTHOR("Charles Keepax "); -MODULE_AUTHOR("Richard Fitzgerald "); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:madera-micsupp"); diff --git a/include/dt-bindings/extcon/extcon-madera.h b/include/dt-bindings/extcon/extcon-madera.h deleted file mode 100644 index 298753cfceb5..000000000000 --- a/include/dt-bindings/extcon/extcon-madera.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Device Tree defines for Madera codec extcon driver - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef DT_BINDINGS_EXTCON_MADERA_H -#define DT_BINDINGS_EXTCON_MADERA_H - -/* output clamp pin for cirrus,hpd-pins */ -#define MADERA_HPD_OUT_OUT1L 0 -#define MADERA_HPD_OUT_OUT1R 1 -#define MADERA_HPD_OUT_OUT2L 2 -#define MADERA_HPD_OUT_OUT2R 3 - -/* Sense pin selection for cirrus,hpd-pins */ -#define MADERA_HPD_SENSE_MICDET1 0 -#define MADERA_HPD_SENSE_MICDET2 1 -#define MADERA_HPD_SENSE_MICDET3 2 -#define MADERA_HPD_SENSE_MICDET4 3 -#define MADERA_HPD_SENSE_HPDET1 4 -#define MADERA_HPD_SENSE_HPDET2 5 -#define MADERA_HPD_SENSE_JD1 6 -#define MADERA_HPD_SENSE_JD2 7 - -/* source setting for cirrus,micd-configs (cs47l35, cs47l85) */ -#define MADERA_ACCD_SENSE_MICDET1 0 -#define MADERA_ACCD_SENSE_MICDET2 1 - -/* bias setting for cirrus,micd-configs (cs47l35, cs47l85) */ -#define MADERA_ACCD_BIAS_SRC_MICBIAS1 1 -#define MADERA_ACCD_BIAS_SRC_MICBIAS2 2 - -/* source setting for cirrus,micd-configs */ -#define MADERA_MICD1_SENSE_MICDET1 0 -#define MADERA_MICD1_SENSE_MICDET2 1 -#define MADERA_MICD1_SENSE_MICDET3 2 -#define MADERA_MICD1_SENSE_MICDET4 3 - -/* ground setting for cirrus,micd-configs */ -#define MADERA_MICD1_GND_MICDET1 0 -#define MADERA_MICD1_GND_MICDET2 1 -#define MADERA_MICD1_GND_MICDET3 2 -#define MADERA_MICD1_GND_MICDET4 3 - -/* bias setting for cirrus,micd-configs */ -#define MADERA_MICD_BIAS_SRC_MICBIAS1A 0x0 -#define MADERA_MICD_BIAS_SRC_MICBIAS1B 0x1 -#define MADERA_MICD_BIAS_SRC_MICBIAS1C 0x2 -#define MADERA_MICD_BIAS_SRC_MICBIAS1D 0x3 -#define MADERA_MICD_BIAS_SRC_MICBIAS2A 0x4 -#define MADERA_MICD_BIAS_SRC_MICBIAS2B 0x5 -#define MADERA_MICD_BIAS_SRC_MICBIAS2C 0x6 -#define MADERA_MICD_BIAS_SRC_MICBIAS2D 0x7 -#define MADERA_MICD_BIAS_SRC_MICVDD 0xF - -/* HP gnd setting for cirrus,micd-configs */ -#define MADERA_HPD_GND_HPOUTFB1 0 -#define MADERA_HPD_GND_HPOUTFB2 1 -#define MADERA_HPD_GND_HPOUTFB3 2 -#define MADERA_HPD_GND_HPOUTFB4 3 - -#endif - diff --git a/include/dt-bindings/mfd/madera.h b/include/dt-bindings/mfd/madera.h deleted file mode 100644 index 9c3a0fde267c..000000000000 --- a/include/dt-bindings/mfd/madera.h +++ /dev/null @@ -1,123 +0,0 @@ -/* - * Device Tree defines for Madera codecs - * - * Copyright 2015-2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _DT_BINDINGS_MFD_MADERA_H -#define _DT_BINDINGS_MFD_MADERA_H - -/* GPIO Function Definitions */ -#define MADERA_GP_FN_ALTERNATE 0x00 -#define MADERA_GP_FN_GPIO 0x01 -#define MADERA_GP_FN_DSP_GPIO 0x02 -#define MADERA_GP_FN_IRQ1 0x03 -#define MADERA_GP_FN_IRQ2 0x04 -#define MADERA_GP_FN_FLL1_CLOCK 0x10 -#define MADERA_GP_FN_FLL2_CLOCK 0x11 -#define MADERA_GP_FN_FLL3_CLOCK 0x12 -#define MADERA_GP_FN_FLLAO_CLOCK 0x13 -#define MADERA_GP_FN_FLL1_LOCK 0x18 -#define MADERA_GP_FN_FLL2_LOCK 0x19 -#define MADERA_GP_FN_FLL3_LOCK 0x1A -#define MADERA_GP_FN_FLLAO_LOCK 0x1B -#define MADERA_GP_FN_OPCLK_OUT 0x40 -#define MADERA_GP_FN_OPCLK_ASYNC_OUT 0x41 -#define MADERA_GP_FN_PWM1 0x48 -#define MADERA_GP_FN_PWM2 0x49 -#define MADERA_GP_FN_SPDIF_OUT 0x4C -#define MADERA_GP_FN_HEADPHONE_DET 0x50 -#define MADERA_GP_FN_MIC_DET 0x58 -#define MADERA_GP_FN_DRC1_SIGNAL_DETECT 0x80 -#define MADERA_GP_FN_DRC2_SIGNAL_DETECT 0x81 -#define MADERA_GP_FN_ASRC1_IN1_LOCK 0x88 -#define MADERA_GP_FN_ASRC1_IN2_LOCK 0x89 -#define MADERA_GP_FN_ASRC2_IN1_LOCK 0x8A -#define MADERA_GP_FN_ASRC2_IN2_LOCK 0x8B -#define MADERA_GP_FN_DSP_IRQ1 0xA0 -#define MADERA_GP_FN_DSP_IRQ2 0xA1 -#define MADERA_GP_FN_DSP_IRQ3 0xA2 -#define MADERA_GP_FN_DSP_IRQ4 0xA3 -#define MADERA_GP_FN_DSP_IRQ5 0xA4 -#define MADERA_GP_FN_DSP_IRQ6 0xA5 -#define MADERA_GP_FN_DSP_IRQ7 0xA6 -#define MADERA_GP_FN_DSP_IRQ8 0xA7 -#define MADERA_GP_FN_DSP_IRQ9 0xA8 -#define MADERA_GP_FN_DSP_IRQ10 0xA9 -#define MADERA_GP_FN_DSP_IRQ11 0xAA -#define MADERA_GP_FN_DSP_IRQ12 0xAB -#define MADERA_GP_FN_DSP_IRQ13 0xAC -#define MADERA_GP_FN_DSP_IRQ14 0xAD -#define MADERA_GP_FN_DSP_IRQ15 0xAE -#define MADERA_GP_FN_DSP_IRQ16 0xAF -#define MADERA_GP_FN_HPOUT1L_SC 0xB0 -#define MADERA_GP_FN_HPOUT1R_SC 0xB1 -#define MADERA_GP_FN_HPOUT2L_SC 0xB2 -#define MADERA_GP_FN_HPOUT2R_SC 0xB3 -#define MADERA_GP_FN_HPOUT3L_SC 0xB4 -#define MADERA_GP_FN_HPOUT4R_SC 0xB5 -#define MADERA_GP_FN_SPKOUTL_SC 0xB6 -#define MADERA_GP_FN_SPKOUTR_SC 0xB7 -#define MADERA_GP_FN_HPOUT1L_ENA 0xC0 -#define MADERA_GP_FN_HPOUT1R_ENA 0xC1 -#define MADERA_GP_FN_HPOUT2L_ENA 0xC2 -#define MADERA_GP_FN_HPOUT2R_ENA 0xC3 -#define MADERA_GP_FN_HPOUT3L_ENA 0xC4 -#define MADERA_GP_FN_HPOUT4R_ENA 0xC5 -#define MADERA_GP_FN_SPKOUTL_ENA 0xC6 -#define MADERA_GP_FN_SPKOUTR_ENA 0xC7 -#define MADERA_GP_FN_HPOUT1L_DIS 0xD0 -#define MADERA_GP_FN_HPOUT1R_DIS 0xD1 -#define MADERA_GP_FN_HPOUT2L_DIS 0xD2 -#define MADERA_GP_FN_HPOUT2R_DIS 0xD3 -#define MADERA_GP_FN_HPOUT3L_DIS 0xD4 -#define MADERA_GP_FN_HPOUT4R_DIS 0xD5 -#define MADERA_GP_FN_SPKOUTL_DIS 0xD6 -#define MADERA_GP_FN_SPKOUTR_DIS 0xD7 -#define MADERA_GP_FN_SPK_SHUTDOWN 0xE0 -#define MADERA_GP_FN_SPK_OVH_SHUTDOWN 0xE1 -#define MADERA_GP_FN_SPK_OVH_WARN 0xE2 -#define MADERA_GP_FN_TIMER1_STATUS 0x140 -#define MADERA_GP_FN_TIMER2_STATUS 0x141 -#define MADERA_GP_FN_TIMER3_STATUS 0x142 -#define MADERA_GP_FN_TIMER4_STATUS 0x143 -#define MADERA_GP_FN_TIMER5_STATUS 0x144 -#define MADERA_GP_FN_TIMER6_STATUS 0x145 -#define MADERA_GP_FN_TIMER7_STATUS 0x146 -#define MADERA_GP_FN_TIMER8_STATUS 0x147 -#define MADERA_GP_FN_EVENTLOG1_FIFO_STS 0x150 -#define MADERA_GP_FN_EVENTLOG2_FIFO_STS 0x151 -#define MADERA_GP_FN_EVENTLOG3_FIFO_STS 0x152 -#define MADERA_GP_FN_EVENTLOG4_FIFO_STS 0x153 -#define MADERA_GP_FN_EVENTLOG5_FIFO_STS 0x154 -#define MADERA_GP_FN_EVENTLOG6_FIFO_STS 0x155 -#define MADERA_GP_FN_EVENTLOG7_FIFO_STS 0x156 -#define MADERA_GP_FN_EVENTLOG8_FIFO_STS 0x157 - -/* GPIOn_CTRL_1 Configuration Bits */ -#define MADERA_GPN_LVL 0x8000 -#define MADERA_GPN_OP_CFG_MASK 0x4000 -#define MADERA_GPN_DB_MASK 0x2000 -#define MADERA_GPN_POL_MASK 0x0800 - -/* GPIOn_CTRL_2 Configuration Bits */ -#define MADERA_GPN_DIR_MASK 0x8000 -#define MADERA_GPN_PU_MASK 0x4000 -#define MADERA_GPN_PD_MASK 0x2000 - -/* Provide some defines for the most common GPIO configs */ -#define MADERA_GP_DEFAULT 0xffffffff -#define MADERA_GP_BUSKEEP (MADERA_GPN_PU_MASK | MADERA_GPN_PD_MASK) -#define MADERA_GP_OUTPUT MADERA_GP_FN_GPIO -#define MADERA_GP_INPUT (MADERA_GP_FN_GPIO | MADERA_GPN_DIR) - - -#define MADERA_32KZ_MCLK1 1 -#define MADERA_32KZ_MCLK2 2 -#define MADERA_32KZ_SYSCLK 3 - -#endif diff --git a/include/dt-bindings/sound/madera.h b/include/dt-bindings/sound/madera.h deleted file mode 100644 index 93fc7ffde708..000000000000 --- a/include/dt-bindings/sound/madera.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Device Tree defines for Madera codecs - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _DT_BINDINGS_SOUND_MADERA_H -#define _DT_BINDINGS_SOUND_MADERA_H - -#define MADERA_INMODE_DIFF 0 -#define MADERA_INMODE_SE 1 -#define MADERA_INMODE_DMIC 2 - -#endif diff --git a/include/linux/extcon/extcon-madera-pdata.h b/include/linux/extcon/extcon-madera-pdata.h deleted file mode 100644 index be31cd326a1a..000000000000 --- a/include/linux/extcon/extcon-madera-pdata.h +++ /dev/null @@ -1,156 +0,0 @@ -/* - * Platform data for Madera codecs - * - * Copyright 2017 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef EXTCON_MADERA_PDATA_H -#define EXTCON_MADERA_PDATA_H - -#include - -#define MADERA_MAX_ACCESSORY 1 - -/* Treat INT_MAX impedance as open circuit */ -#define MADERA_HP_Z_OPEN INT_MAX - -struct madera_jd_state; - -/** Bias and sense configuration for probing MICDET */ -struct madera_micd_config { - /** cs47l35, cs47l85, WM1840: value of the ACCDET_SRC field - * other codecs: value of MICDn_SENSE_SEL field - * See datasheet for field values - */ - u32 src; - - /** cs47l35, cs47l85, wm1840: unused - * other codecs: value of MICDn_GND_SEL - * - * See datasheet for field values - */ - u32 gnd; - - /** MICBIAS number to enable */ - u32 bias; - - /** State of polarity gpio during probe (true == gpio asserted) */ - bool gpio; - - /** cs47l35, cs47l85, wm1840: unused - * other codecs: value of HPn_GND_SEL - * - * See datasheet for field values - */ - u32 hp_gnd; -}; - -struct madera_micd_range { - int max; /** Ohms */ - int key; /** Key to report to input layer */ -}; - -/** pdata sub-structure for accessory detect configuration */ -struct madera_accdet_pdata { - /** set to true to enable this accessory detect */ - bool enabled; - - /** which output this accdet is for (1 = OUT1, ...) */ - u32 output; - - /** Time in milliseconds to keep wake lock during jack detection */ - u32 jd_wake_time; - - /** Set whether JD2 is used for jack detection */ - bool jd_use_jd2; - - /** set to true if jackdet contact opens on insert */ - bool jd_invert; - - /** If non-zero don't run headphone detection, just report this value - * Specified as hundredths-of-an-ohm, that is (ohms * 100) - */ - u32 fixed_hpdet_imp_x100; - - /** Impedance of external series resistor on hpdet. - * Specified as hundredths-of-an-ohm, that is (ohms * 100) - */ - u32 hpdet_ext_res_x100; - - /** If non-zero, specifies the maximum impedance in ohms - * that will be considered as a short circuit. - */ - u32 hpdet_short_circuit_imp; - - /** - * Channel to use for headphone detection, valid values are 0 for - * left and 1 for right - */ - u32 hpdet_channel; - - /* Extra delay time to wait the headset plug in totally (milliseconds) */ - u32 init_mic_delay_ms; - - /** Extra debounce timeout during initial mic detect (milliseconds) */ - u32 micd_detect_debounce_ms; - - /** Extra software debounces during button detection */ - u32 micd_manual_debounce; - - /** GPIO for mic detection polarity */ - int micd_pol_gpio; - - /** Mic detect ramp rate */ - u32 micd_bias_start_time; - - /** Setting for the codec MICD_RATE field - * See the datasheet for documentation of the field values - */ - u32 micd_rate; - - /** Mic detect debounce level */ - u32 micd_dbtime; - - /** Mic detect timeout (milliseconds) */ - u32 micd_timeout_ms; - - /** Mic detect clamp function */ - u32 micd_clamp_mode; - - /** Force MICBIAS on for mic detect */ - bool micd_force_micbias; - - /** Declare an open circuit as a 4 pole jack */ - bool micd_open_circuit_declare; - - /** Use software comparison to determine mic presence */ - bool micd_software_compare; - - /** Mic detect level parameters */ - const struct madera_micd_range *micd_ranges; - int num_micd_ranges; - - /** Headset polarity configurations */ - const struct madera_micd_config *micd_configs; - int num_micd_configs; - - /** - * 4 entries: - * [HPL_clamp_pin, HPL_impedance_measurement_pin, - * HPR_clamp_pin, HPR_impedance_measurement_pin] - * - * 0 = use default setting - * values 0x1..0xffff = set to this value - * >0xffff = set to 0 - */ - u32 hpd_pins[4]; - - /** Override the normal jack detection */ - const struct madera_jd_state *custom_jd; -}; - -#endif diff --git a/include/linux/extcon/extcon-madera.h b/include/linux/extcon/extcon-madera.h deleted file mode 100644 index 2e892ca7cc87..000000000000 --- a/include/linux/extcon/extcon-madera.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * extcon-madera.h - public extcon driver API for Cirrus Logic Madera codecs - * - * Copyright 2015-2017 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef EXTCON_MADERA_H -#define EXTCON_MADERA_H - -#include - -/* Conversion between ohms and hundredths of an ohm. */ -static inline unsigned int madera_hohm_to_ohm(unsigned int hohms) -{ - if (hohms == INT_MAX) - return hohms; - else - return (hohms + 50) / 100; -} - -static inline unsigned int madera_ohm_to_hohm(unsigned int ohms) -{ - if (ohms >= (INT_MAX / 100)) - return INT_MAX; - else - return ohms * 100; -} - -#define MADERA_MICD_LVL_1_TO_7 \ - (MADERA_MICD_LVL_1 | MADERA_MICD_LVL_2 | \ - MADERA_MICD_LVL_3 | MADERA_MICD_LVL_4 | \ - MADERA_MICD_LVL_5 | MADERA_MICD_LVL_6 | \ - MADERA_MICD_LVL_7) - -#define MADERA_MICD_LVL_0_TO_7 (MADERA_MICD_LVL_0 | MADERA_MICD_LVL_1_TO_7) - -#define MADERA_MICD_LVL_0_TO_8 (MADERA_MICD_LVL_0_TO_7 | MADERA_MICD_LVL_8) - -/* Notify data structure for MADERA_NOTIFY_HPDET */ -struct madera_hpdet_notify_data { - unsigned int impedance_x100; /* ohms * 100 */ -}; - -/* Notify data structure for MADERA_NOTIFY_MICDET */ -struct madera_micdet_notify_data { - unsigned int impedance_x100; /* ohms * 100 */ - bool present; - int out_num; /* 1 = OUT1, 2 = OUT2 */ -}; - -struct madera_micd_bias { - unsigned int bias; - bool enabled; -}; - -struct madera_hpdet_trims { - int off_x4; - int grad_x4; -}; - -struct madera_extcon { - struct device *dev; - struct madera *madera; - const struct madera_accdet_pdata *pdata; - struct mutex lock; - struct regulator *micvdd; - struct input_dev *input; - struct extcon_dev *edev; - struct gpio_desc *micd_pol_gpio[2]; - struct gpio_desc *usbc_det_gpio[2]; - - u16 last_jackdet; - int hp_tuning_level; - - const struct madera_hpdet_calibration_data *hpdet_ranges; - int num_hpdet_ranges; - unsigned int hpdet_init_range; - const struct madera_hpdet_trims *hpdet_trims; - - int micd_mode; - const struct madera_micd_config *micd_modes; - int num_micd_modes; - - const struct madera_micd_range *micd_ranges; - int num_micd_ranges; - - int micd_res_old; - int micd_debounce; - int micd_count; - - struct completion manual_mic_completion; - - struct delayed_work micd_detect_work; - - bool have_mic; - bool detecting; - int jack_flips; - - const struct madera_jd_state *state; - const struct madera_jd_state *old_state; - struct delayed_work state_timeout_work; - - struct madera_micd_bias micd_bias; - bool usbc_headset_support; - bool usbc_connected; - struct notifier_block psy_nb; - struct power_supply *usb_psy; -}; - -enum madera_accdet_mode { - MADERA_ACCDET_MODE_MIC, - MADERA_ACCDET_MODE_HPL, - MADERA_ACCDET_MODE_HPR, - MADERA_ACCDET_MODE_HPM, - MADERA_ACCDET_MODE_ADC, - MADERA_ACCDET_MODE_INVALID, -}; - -struct madera_jd_state { - enum madera_accdet_mode mode; - - int (*start)(struct madera_extcon *); - void (*restart)(struct madera_extcon *); - int (*reading)(struct madera_extcon *, int); - void (*stop)(struct madera_extcon *); - - int (*timeout_ms)(struct madera_extcon *); - void (*timeout)(struct madera_extcon *); -}; - -int madera_jds_set_state(struct madera_extcon *info, - const struct madera_jd_state *new_state); - -void madera_set_headphone_imp(struct madera_extcon *info, int ohms_x100); - -extern const struct madera_jd_state madera_hpdet_left; -extern const struct madera_jd_state madera_hpdet_right; -extern const struct madera_jd_state madera_micd_button; -extern const struct madera_jd_state madera_micd_microphone; -extern const struct madera_jd_state madera_micd_adc_mic; - -int madera_hpdet_start(struct madera_extcon *info); -void madera_hpdet_restart(struct madera_extcon *info); -void madera_hpdet_stop(struct madera_extcon *info); -int madera_hpdet_reading(struct madera_extcon *info, int val); - -int madera_micd_start(struct madera_extcon *info); -void madera_micd_stop(struct madera_extcon *info); -int madera_micd_button_reading(struct madera_extcon *info, int val); - -int madera_micd_mic_start(struct madera_extcon *info); -void madera_micd_mic_stop(struct madera_extcon *info); -int madera_micd_mic_reading(struct madera_extcon *info, int val); -int madera_micd_mic_timeout_ms(struct madera_extcon *info); -void madera_micd_mic_timeout(struct madera_extcon *info); - -void madera_extcon_report(struct madera_extcon *info, int which, bool attached); - -#endif diff --git a/include/linux/irqchip/irq-madera-pdata.h b/include/linux/irqchip/irq-madera-pdata.h deleted file mode 100644 index 7d3c25757a9a..000000000000 --- a/include/linux/irqchip/irq-madera-pdata.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Platform data for Cirrus Logic Madera codecs irqchip driver - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _IRQCHIP_MADERA_PDATA_H -#define _IRQCHIP_MADERA_PDATA_H - -struct madera_irqchip_pdata { - /** Mode for primary IRQ (defaults to active low) */ - unsigned int irq_flags; - - /** GPIO for primary IRQ - * Required if the codec IRQ output is connected to an edge-triggered - * input on the host interrupt controller - */ - int irq_gpio; -}; - -#endif diff --git a/include/linux/irqchip/irq-madera.h b/include/linux/irqchip/irq-madera.h deleted file mode 100644 index ee1ccc8fea64..000000000000 --- a/include/linux/irqchip/irq-madera.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Interrupt support for Cirrus Logic Madera codecs - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _IRQCHIP_MADERA_H -#define _IRQCHIP_MADERA_H - -#define MADERA_IRQ_BOOT_DONE 0 -#define MADERA_IRQ_CTRLIF_ERR 1 -#define MADERA_IRQ_FLL1_LOCK 2 -#define MADERA_IRQ_FLL2_LOCK 3 -#define MADERA_IRQ_FLL3_LOCK 4 -#define MADERA_IRQ_FLLAO_LOCK 5 -#define MADERA_IRQ_CLK_SYS_ERR 6 -#define MADERA_IRQ_CLK_ASYNC_ERR 7 -#define MADERA_IRQ_CLK_DSP_ERR 8 -#define MADERA_IRQ_HPDET 9 -#define MADERA_IRQ_MICDET1 10 -#define MADERA_IRQ_MICDET2 11 -#define MADERA_IRQ_JD1_RISE 12 -#define MADERA_IRQ_JD1_FALL 13 -#define MADERA_IRQ_JD2_RISE 14 -#define MADERA_IRQ_JD2_FALL 15 -#define MADERA_IRQ_MICD_CLAMP_RISE 16 -#define MADERA_IRQ_MICD_CLAMP_FALL 17 -#define MADERA_IRQ_DRC2_SIG_DET 18 -#define MADERA_IRQ_DRC1_SIG_DET 19 -#define MADERA_IRQ_ASRC1_IN1_LOCK 20 -#define MADERA_IRQ_ASRC1_IN2_LOCK 21 -#define MADERA_IRQ_ASRC2_IN1_LOCK 22 -#define MADERA_IRQ_ASRC2_IN2_LOCK 23 -#define MADERA_IRQ_DSP_IRQ1 24 -#define MADERA_IRQ_DSP_IRQ2 25 -#define MADERA_IRQ_DSP_IRQ3 26 -#define MADERA_IRQ_DSP_IRQ4 27 -#define MADERA_IRQ_DSP_IRQ5 28 -#define MADERA_IRQ_DSP_IRQ6 29 -#define MADERA_IRQ_DSP_IRQ7 30 -#define MADERA_IRQ_DSP_IRQ8 31 -#define MADERA_IRQ_DSP_IRQ9 32 -#define MADERA_IRQ_DSP_IRQ10 33 -#define MADERA_IRQ_DSP_IRQ11 34 -#define MADERA_IRQ_DSP_IRQ12 35 -#define MADERA_IRQ_DSP_IRQ13 36 -#define MADERA_IRQ_DSP_IRQ14 37 -#define MADERA_IRQ_DSP_IRQ15 38 -#define MADERA_IRQ_DSP_IRQ16 39 -#define MADERA_IRQ_HP1L_SC 40 -#define MADERA_IRQ_HP1R_SC 41 -#define MADERA_IRQ_HP2L_SC 42 -#define MADERA_IRQ_HP2R_SC 43 -#define MADERA_IRQ_HP3L_SC 44 -#define MADERA_IRQ_HP3R_SC 45 -#define MADERA_IRQ_SPKOUTL_SC 46 -#define MADERA_IRQ_SPKOUTR_SC 47 -#define MADERA_IRQ_HP1L_ENABLE_DONE 48 -#define MADERA_IRQ_HP1R_ENABLE_DONE 49 -#define MADERA_IRQ_HP2L_ENABLE_DONE 50 -#define MADERA_IRQ_HP2R_ENABLE_DONE 51 -#define MADERA_IRQ_HP3L_ENABLE_DONE 52 -#define MADERA_IRQ_HP3R_ENABLE_DONE 53 -#define MADERA_IRQ_SPKOUTL_ENABLE_DONE 54 -#define MADERA_IRQ_SPKOUTR_ENABLE_DONE 55 -#define MADERA_IRQ_SPK_SHUTDOWN 56 -#define MADERA_IRQ_SPK_OVERHEAT 57 -#define MADERA_IRQ_SPK_OVERHEAT_WARN 58 -#define MADERA_IRQ_GPIO1 59 -#define MADERA_IRQ_GPIO2 60 -#define MADERA_IRQ_GPIO3 61 -#define MADERA_IRQ_GPIO4 62 -#define MADERA_IRQ_GPIO5 63 -#define MADERA_IRQ_GPIO6 64 -#define MADERA_IRQ_GPIO7 65 -#define MADERA_IRQ_GPIO8 66 -#define MADERA_IRQ_DSP1_BUS_ERROR 67 -#define MADERA_IRQ_DSP2_BUS_ERROR 68 -#define MADERA_IRQ_DSP3_BUS_ERROR 69 -#define MADERA_IRQ_DSP4_BUS_ERROR 70 -#define MADERA_IRQ_DSP5_BUS_ERROR 71 -#define MADERA_IRQ_DSP6_BUS_ERROR 72 -#define MADERA_IRQ_DSP7_BUS_ERROR 73 - -#define MADERA_NUM_IRQ 74 - -struct madera; - -extern int madera_request_irq(struct madera *madera, int irq, const char *name, - irq_handler_t handler, void *data); -extern void madera_free_irq(struct madera *madera, int irq, void *data); -extern int madera_set_irq_wake(struct madera *madera, int irq, int on); - -#endif diff --git a/include/linux/mfd/madera/core.h b/include/linux/mfd/madera/core.h deleted file mode 100644 index 4c28b047c52f..000000000000 --- a/include/linux/mfd/madera/core.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Madera MFD internals - * - * Copyright 2015-2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _MADERA_CORE_H -#define _MADERA_CORE_H - -#include -#include -#include -#include -#include -#include - -enum madera_type { - CS47L35 = 1, - CS47L85 = 2, - CS47L90 = 3, - CS47L91 = 4, - WM1840 = 7, -}; - -#define MADERA_MAX_CORE_SUPPLIES 2 - -/* Notifier events */ -#define MADERA_NOTIFY_VOICE_TRIGGER 0x1 -#define MADERA_NOTIFY_HPDET 0x2 -#define MADERA_NOTIFY_MICDET 0x4 - -struct snd_soc_dapm_context; -struct madera_extcon_info; - -struct madera { - struct regmap *regmap; - struct regmap *regmap_32bit; - - struct device *dev; - - enum madera_type type; - unsigned int rev; - - int num_core_supplies; - struct regulator_bulk_data core_supplies[MADERA_MAX_CORE_SUPPLIES]; - struct regulator *dcvdd; - struct notifier_block dcvdd_notifier; - bool internal_dcvdd; - bool micvdd_regulated; - bool bypass_cache; - bool dcvdd_powered_off; - - struct madera_pdata pdata; - - struct device *irq_dev; - int irq; - - unsigned int out_clamp[MADERA_MAX_OUTPUT]; - unsigned int out_shorted[MADERA_MAX_OUTPUT]; - bool hpdet_clamp[MADERA_MAX_ACCESSORY]; - unsigned int hp_ena; - unsigned int hp_impedance_x100[MADERA_MAX_ACCESSORY]; - - struct madera_extcon_info *extcon_info; - - struct snd_soc_dapm_context *dapm; - - struct mutex reg_setting_lock; - - struct blocking_notifier_head notifier; -}; - -extern int madera_of_read_uint_array(struct madera *madera, const char *prop, - bool mandatory, - unsigned int *dest, - int minlen, int maxlen); -extern int madera_of_read_uint(struct madera *madera, const char *prop, - bool mandatory, unsigned int *data); - -extern int madera_get_num_micbias(struct madera *madera, - unsigned int *n_micbiases, - unsigned int *n_child_micbiases); - -extern const char *madera_name_from_type(enum madera_type type); - -static inline int madera_of_read_int(struct madera *madera, const char *prop, - bool mandatory, int *data) -{ - return madera_of_read_uint(madera, prop, mandatory, - (unsigned int *)data); -} - -static inline int madera_call_notifiers(struct madera *madera, - unsigned long event, - void *data) -{ - return blocking_notifier_call_chain(&madera->notifier, event, data); -} -#endif diff --git a/include/linux/mfd/madera/pdata.h b/include/linux/mfd/madera/pdata.h deleted file mode 100644 index f214bffe120d..000000000000 --- a/include/linux/mfd/madera/pdata.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Platform data for Madera codecs - * - * Copyright 2015-2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _MADERA_PDATA_H -#define _MADERA_PDATA_H - -#include - -#include -#include -#include -#include -#include -#include - -#define MADERA_MAX_GPIO_REGS 80 - -#define CS47L35_NUM_GPIOS 16 -#define CS47L85_NUM_GPIOS 40 -#define CS47L90_NUM_GPIOS 38 - -#define MADERA_MAX_MICBIAS 4 -#define MADERA_MAX_CHILD_MICBIAS 4 - -#define MADERA_MAX_GPSW 2 - -struct regulator_init_data; - -struct madera_micbias { - int mV; /** Regulated voltage */ - unsigned int ext_cap:1; /** External capacitor fitted */ - unsigned int discharge[MADERA_MAX_CHILD_MICBIAS]; /** Actively discharge */ - unsigned int soft_start:1; /** Disable aggressive startup ramp rate */ - unsigned int bypass:1; /** Use bypass mode */ -}; - -struct madera_pdata { - int reset; /** GPIO controlling /RESET, if any */ - - /** Substruct of pdata for the LDO1 regulator */ - struct madera_ldo1_pdata ldo1; - - /** Substruct of pdata for the MICSUPP regulator */ - struct madera_micsupp_pdata micsupp; - - /** Substruct of pdata for the irqchip driver */ - struct madera_irqchip_pdata irqchip; - - /** If a direct 32kHz clock is provided on an MCLK specify it here */ - unsigned int clk32k_src; - - /** Base GPIO */ - int gpio_base; - - /** Pin state for GPIO pins - * Defines default pin function and state for each GPIO. The values in - * here are written into the GPn_CONFIGx register block. There are - * two entries for each GPIO pin, for the GPn_CONFIG1 and GPn_CONFIG2 - * registers. - * - * See the codec datasheet for a description of the contents of the - * GPn_CONFIGx registers. - * - * 0 = leave at chip default - * values 0x1..0xffff = set to this value - * 0xffffffff = set to 0 - */ - unsigned int gpio_defaults[MADERA_MAX_GPIO_REGS]; - - /** MICBIAS configurations */ - struct madera_micbias micbias[MADERA_MAX_MICBIAS]; - - /** Substructure of pdata for the ASoC codec driver - * See include/sound/madera-pdata.h - */ - struct madera_codec_pdata codec; - - /** General purpose switch mode setting - * See the SW1_MODE field in the datasheet for the available values - */ - unsigned int gpsw[MADERA_MAX_GPSW]; - - /** Accessory detection configurations */ - struct madera_accdet_pdata accdet[MADERA_MAX_ACCESSORY]; -}; - -#endif diff --git a/include/linux/mfd/madera/registers.h b/include/linux/mfd/madera/registers.h deleted file mode 100644 index 2a0f3e7991b6..000000000000 --- a/include/linux/mfd/madera/registers.h +++ /dev/null @@ -1,8865 +0,0 @@ -/* - * Madera register definitions - * - * Copyright 2015-2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _MADERA_REGISTERS_H -#define _MADERA_REGISTERS_H - -/* - * Register Addresses. - */ -#define MADERA_SOFTWARE_RESET 0x00 -#define MADERA_HARDWARE_REVISION 0x01 -#define MADERA_CTRL_IF_CFG_1 0x08 -#define MADERA_CTRL_IF_CFG_2 0x09 -#define MADERA_CTRL_IF_CFG_3 0x0A -#define MADERA_WRITE_SEQUENCER_CTRL_0 0x16 -#define MADERA_WRITE_SEQUENCER_CTRL_1 0x17 -#define MADERA_WRITE_SEQUENCER_CTRL_2 0x18 -#define MADERA_TONE_GENERATOR_1 0x20 -#define MADERA_TONE_GENERATOR_2 0x21 -#define MADERA_TONE_GENERATOR_3 0x22 -#define MADERA_TONE_GENERATOR_4 0x23 -#define MADERA_TONE_GENERATOR_5 0x24 -#define MADERA_PWM_DRIVE_1 0x30 -#define MADERA_PWM_DRIVE_2 0x31 -#define MADERA_PWM_DRIVE_3 0x32 -#define MADERA_SEQUENCE_CONTROL 0x41 -#define MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1 0x61 -#define MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2 0x62 -#define MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3 0x63 -#define MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4 0x64 -#define MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x66 -#define MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x67 -#define MADERA_HAPTICS_CONTROL_1 0x90 -#define MADERA_HAPTICS_CONTROL_2 0x91 -#define MADERA_HAPTICS_PHASE_1_INTENSITY 0x92 -#define MADERA_HAPTICS_PHASE_1_DURATION 0x93 -#define MADERA_HAPTICS_PHASE_2_INTENSITY 0x94 -#define MADERA_HAPTICS_PHASE_2_DURATION 0x95 -#define MADERA_HAPTICS_PHASE_3_INTENSITY 0x96 -#define MADERA_HAPTICS_PHASE_3_DURATION 0x97 -#define MADERA_HAPTICS_STATUS 0x98 -#define MADERA_COMFORT_NOISE_GENERATOR 0xA0 -#define MADERA_CLOCK_32K_1 0x100 -#define MADERA_SYSTEM_CLOCK_1 0x101 -#define MADERA_SAMPLE_RATE_1 0x102 -#define MADERA_SAMPLE_RATE_2 0x103 -#define MADERA_SAMPLE_RATE_3 0x104 -#define MADERA_SAMPLE_RATE_1_STATUS 0x10A -#define MADERA_SAMPLE_RATE_2_STATUS 0x10B -#define MADERA_SAMPLE_RATE_3_STATUS 0x10C -#define MADERA_ASYNC_CLOCK_1 0x112 -#define MADERA_ASYNC_SAMPLE_RATE_1 0x113 -#define MADERA_ASYNC_SAMPLE_RATE_2 0x114 -#define MADERA_ASYNC_SAMPLE_RATE_1_STATUS 0x11B -#define MADERA_ASYNC_SAMPLE_RATE_2_STATUS 0x11C -#define MADERA_DSP_CLOCK_1 0x120 -#define MADERA_DSP_CLOCK_2 0x122 -#define MADERA_OUTPUT_SYSTEM_CLOCK 0x149 -#define MADERA_OUTPUT_ASYNC_CLOCK 0x14A -#define MADERA_RATE_ESTIMATOR_1 0x152 -#define MADERA_RATE_ESTIMATOR_2 0x153 -#define MADERA_RATE_ESTIMATOR_3 0x154 -#define MADERA_RATE_ESTIMATOR_4 0x155 -#define MADERA_RATE_ESTIMATOR_5 0x156 -#define MADERA_FLL1_CONTROL_1 0x171 -#define MADERA_FLL1_CONTROL_2 0x172 -#define MADERA_FLL1_CONTROL_3 0x173 -#define MADERA_FLL1_CONTROL_4 0x174 -#define MADERA_FLL1_CONTROL_5 0x175 -#define MADERA_FLL1_CONTROL_6 0x176 -#define MADERA_FLL1_LOOP_FILTER_TEST_1 0x177 -#define MADERA_FLL1_NCO_TEST_0 0x178 -#define MADERA_FLL1_CONTROL_7 0x179 -#define MADERA_FLL1_EFS_2 0x17A -#define CS47L35_FLL1_SYNCHRONISER_1 0x17F -#define CS47L35_FLL1_SYNCHRONISER_2 0x180 -#define CS47L35_FLL1_SYNCHRONISER_3 0x181 -#define CS47L35_FLL1_SYNCHRONISER_4 0x182 -#define CS47L35_FLL1_SYNCHRONISER_5 0x183 -#define CS47L35_FLL1_SYNCHRONISER_6 0x184 -#define CS47L35_FLL1_SYNCHRONISER_7 0x185 -#define CS47L35_FLL1_SPREAD_SPECTRUM 0x187 -#define CS47L35_FLL1_GPIO_CLOCK 0x188 -#define MADERA_FLL1_SYNCHRONISER_1 0x181 -#define MADERA_FLL1_SYNCHRONISER_2 0x182 -#define MADERA_FLL1_SYNCHRONISER_3 0x183 -#define MADERA_FLL1_SYNCHRONISER_4 0x184 -#define MADERA_FLL1_SYNCHRONISER_5 0x185 -#define MADERA_FLL1_SYNCHRONISER_6 0x186 -#define MADERA_FLL1_SYNCHRONISER_7 0x187 -#define MADERA_FLL1_SPREAD_SPECTRUM 0x189 -#define MADERA_FLL1_GPIO_CLOCK 0x18A -#define MADERA_FLL2_CONTROL_1 0x191 -#define MADERA_FLL2_CONTROL_2 0x192 -#define MADERA_FLL2_CONTROL_3 0x193 -#define MADERA_FLL2_CONTROL_4 0x194 -#define MADERA_FLL2_CONTROL_5 0x195 -#define MADERA_FLL2_CONTROL_6 0x196 -#define MADERA_FLL2_LOOP_FILTER_TEST_1 0x197 -#define MADERA_FLL2_NCO_TEST_0 0x198 -#define MADERA_FLL2_CONTROL_7 0x199 -#define MADERA_FLL2_EFS_2 0x19A -#define MADERA_FLL2_SYNCHRONISER_1 0x1A1 -#define MADERA_FLL2_SYNCHRONISER_2 0x1A2 -#define MADERA_FLL2_SYNCHRONISER_3 0x1A3 -#define MADERA_FLL2_SYNCHRONISER_4 0x1A4 -#define MADERA_FLL2_SYNCHRONISER_5 0x1A5 -#define MADERA_FLL2_SYNCHRONISER_6 0x1A6 -#define MADERA_FLL2_SYNCHRONISER_7 0x1A7 -#define MADERA_FLL2_SPREAD_SPECTRUM 0x1A9 -#define MADERA_FLL2_GPIO_CLOCK 0x1AA -#define MADERA_FLL3_CONTROL_1 0x1B1 -#define MADERA_FLL3_CONTROL_2 0x1B2 -#define MADERA_FLL3_CONTROL_3 0x1B3 -#define MADERA_FLL3_CONTROL_4 0x1B4 -#define MADERA_FLL3_CONTROL_5 0x1B5 -#define MADERA_FLL3_CONTROL_6 0x1B6 -#define MADERA_FLL3_LOOP_FILTER_TEST_1 0x1B7 -#define MADERA_FLL3_NCO_TEST_0 0x1B8 -#define MADERA_FLL3_CONTROL_7 0x1B9 -#define MADERA_FLL3_SYNCHRONISER_1 0x1C1 -#define MADERA_FLL3_SYNCHRONISER_2 0x1C2 -#define MADERA_FLL3_SYNCHRONISER_3 0x1C3 -#define MADERA_FLL3_SYNCHRONISER_4 0x1C4 -#define MADERA_FLL3_SYNCHRONISER_5 0x1C5 -#define MADERA_FLL3_SYNCHRONISER_6 0x1C6 -#define MADERA_FLL3_SYNCHRONISER_7 0x1C7 -#define MADERA_FLL3_SPREAD_SPECTRUM 0x1C9 -#define MADERA_FLL3_GPIO_CLOCK 0x1CA -#define MADERA_FLLAO_CONTROL_1 0x1D1 -#define MADERA_FLLAO_CONTROL_2 0x1D2 -#define MADERA_FLLAO_CONTROL_3 0x1D3 -#define MADERA_FLLAO_CONTROL_4 0x1D4 -#define MADERA_FLLAO_CONTROL_5 0x1D5 -#define MADERA_FLLAO_CONTROL_6 0x1D6 -#define MADERA_FLLAO_CONTROL_7 0x1D8 -#define MADERA_FLLAO_CONTROL_8 0x1DA -#define MADERA_FLLAO_CONTROL_9 0x1DB -#define MADERA_FLLAO_CONTROL_10 0x1DC -#define MADERA_FLLAO_CONTROL_11 0x1DD -#define MADERA_MIC_CHARGE_PUMP_1 0x200 -#define MADERA_HP_CHARGE_PUMP_8 0x20B -#define MADERA_LDO1_CONTROL_1 0x210 -#define MADERA_LDO2_CONTROL_1 0x213 -#define MADERA_MIC_BIAS_CTRL_1 0x218 -#define MADERA_MIC_BIAS_CTRL_2 0x219 -#define MADERA_MIC_BIAS_CTRL_3 0x21A -#define MADERA_MIC_BIAS_CTRL_4 0x21B -#define MADERA_MIC_BIAS_CTRL_5 0x21C -#define MADERA_MIC_BIAS_CTRL_6 0x21E -#define MADERA_HP_CTRL_1L 0x225 -#define MADERA_HP_CTRL_1R 0x226 -#define MADERA_HP_CTRL_2L 0x227 -#define MADERA_HP_CTRL_2R 0x228 -#define MADERA_HP_CTRL_3L 0x229 -#define MADERA_HP_CTRL_3R 0x22A -#define MADERA_DCS_HP1L_CONTROL 0x232 -#define MADERA_DCS_HP1R_CONTROL 0x238 -#define MADERA_EDRE_HP_STEREO_CONTROL 0x27E -#define MADERA_ACCESSORY_DETECT_MODE_1 0x293 -#define MADERA_HEADPHONE_DETECT_0 0x299 -#define MADERA_HEADPHONE_DETECT_1 0x29B -#define MADERA_HEADPHONE_DETECT_2 0x29C -#define MADERA_HEADPHONE_DETECT_3 0x29D -#define MADERA_HEADPHONE_DETECT_4 0x29E -#define MADERA_HEADPHONE_DETECT_5 0x29F -#define MADERA_MIC_DETECT_1_CONTROL_0 0x2A2 -#define MADERA_MIC_DETECT_1_CONTROL_1 0x2A3 -#define MADERA_MIC_DETECT_1_CONTROL_2 0x2A4 -#define MADERA_MIC_DETECT_1_CONTROL_3 0x2A5 -#define MADERA_MIC_DETECT_1_LEVEL_1 0x2A6 -#define MADERA_MIC_DETECT_1_LEVEL_2 0x2A7 -#define MADERA_MIC_DETECT_1_LEVEL_3 0x2A8 -#define MADERA_MIC_DETECT_1_LEVEL_4 0x2A9 -#define MADERA_MIC_DETECT_1_CONTROL_4 0x2AB -#define MADERA_MIC_DETECT_2_CONTROL_0 0x2B2 -#define MADERA_MIC_DETECT_2_CONTROL_1 0x2B3 -#define MADERA_MIC_DETECT_2_CONTROL_2 0x2B4 -#define MADERA_MIC_DETECT_2_CONTROL_3 0x2B5 -#define MADERA_MIC_DETECT_2_LEVEL_1 0x2B6 -#define MADERA_MIC_DETECT_2_LEVEL_2 0x2B7 -#define MADERA_MIC_DETECT_2_LEVEL_3 0x2B8 -#define MADERA_MIC_DETECT_2_LEVEL_4 0x2B9 -#define MADERA_MIC_DETECT_2_CONTROL_4 0x2BB -#define MADERA_MICD_CLAMP_CONTROL 0x2C6 -#define MADERA_GP_SWITCH_1 0x2C8 -#define MADERA_JACK_DETECT_ANALOGUE 0x2D3 -#define MADERA_INPUT_ENABLES 0x300 -#define MADERA_INPUT_ENABLES_STATUS 0x301 -#define MADERA_INPUT_RATE 0x308 -#define MADERA_INPUT_VOLUME_RAMP 0x309 -#define MADERA_HPF_CONTROL 0x30C -#define MADERA_IN1L_CONTROL 0x310 -#define MADERA_ADC_DIGITAL_VOLUME_1L 0x311 -#define MADERA_DMIC1L_CONTROL 0x312 -#define MADERA_IN1L_RATE_CONTROL 0x313 -#define MADERA_IN1R_CONTROL 0x314 -#define MADERA_ADC_DIGITAL_VOLUME_1R 0x315 -#define MADERA_DMIC1R_CONTROL 0x316 -#define MADERA_IN1R_RATE_CONTROL 0x317 -#define MADERA_IN2L_CONTROL 0x318 -#define MADERA_ADC_DIGITAL_VOLUME_2L 0x319 -#define MADERA_DMIC2L_CONTROL 0x31A -#define MADERA_IN2L_RATE_CONTROL 0x31B -#define MADERA_IN2R_CONTROL 0x31C -#define MADERA_ADC_DIGITAL_VOLUME_2R 0x31D -#define MADERA_DMIC2R_CONTROL 0x31E -#define MADERA_IN2R_RATE_CONTROL 0x31F -#define MADERA_IN3L_CONTROL 0x320 -#define MADERA_ADC_DIGITAL_VOLUME_3L 0x321 -#define MADERA_DMIC3L_CONTROL 0x322 -#define MADERA_IN3L_RATE_CONTROL 0x323 -#define MADERA_IN3R_CONTROL 0x324 -#define MADERA_ADC_DIGITAL_VOLUME_3R 0x325 -#define MADERA_DMIC3R_CONTROL 0x326 -#define MADERA_IN3R_RATE_CONTROL 0x327 -#define MADERA_IN4L_CONTROL 0x328 -#define MADERA_ADC_DIGITAL_VOLUME_4L 0x329 -#define MADERA_DMIC4L_CONTROL 0x32A -#define MADERA_IN4L_RATE_CONTROL 0x32B -#define MADERA_IN4R_CONTROL 0x32C -#define MADERA_ADC_DIGITAL_VOLUME_4R 0x32D -#define MADERA_DMIC4R_CONTROL 0x32E -#define MADERA_IN4R_RATE_CONTROL 0x32F -#define MADERA_IN5L_CONTROL 0x330 -#define MADERA_ADC_DIGITAL_VOLUME_5L 0x331 -#define MADERA_DMIC5L_CONTROL 0x332 -#define MADERA_IN5L_RATE_CONTROL 0x333 -#define MADERA_IN5R_CONTROL 0x334 -#define MADERA_ADC_DIGITAL_VOLUME_5R 0x335 -#define MADERA_DMIC5R_CONTROL 0x336 -#define MADERA_IN5R_RATE_CONTROL 0x337 -#define MADERA_IN6L_CONTROL 0x338 -#define MADERA_ADC_DIGITAL_VOLUME_6L 0x339 -#define MADERA_DMIC6L_CONTROL 0x33A -#define MADERA_IN6R_CONTROL 0x33C -#define MADERA_ADC_DIGITAL_VOLUME_6R 0x33D -#define MADERA_DMIC6R_CONTROL 0x33E -#define MADERA_OUTPUT_ENABLES_1 0x400 -#define MADERA_OUTPUT_STATUS_1 0x401 -#define MADERA_RAW_OUTPUT_STATUS_1 0x406 -#define MADERA_OUTPUT_RATE_1 0x408 -#define MADERA_OUTPUT_VOLUME_RAMP 0x409 -#define MADERA_OUTPUT_PATH_CONFIG_1L 0x410 -#define MADERA_DAC_DIGITAL_VOLUME_1L 0x411 -#define MADERA_OUTPUT_PATH_CONFIG_1 0x412 -#define MADERA_NOISE_GATE_SELECT_1L 0x413 -#define MADERA_OUTPUT_PATH_CONFIG_1R 0x414 -#define MADERA_DAC_DIGITAL_VOLUME_1R 0x415 -#define MADERA_NOISE_GATE_SELECT_1R 0x417 -#define MADERA_OUTPUT_PATH_CONFIG_2L 0x418 -#define MADERA_DAC_DIGITAL_VOLUME_2L 0x419 -#define MADERA_OUTPUT_PATH_CONFIG_2 0x41A -#define MADERA_NOISE_GATE_SELECT_2L 0x41B -#define MADERA_OUTPUT_PATH_CONFIG_2R 0x41C -#define MADERA_DAC_DIGITAL_VOLUME_2R 0x41D -#define MADERA_NOISE_GATE_SELECT_2R 0x41F -#define MADERA_OUTPUT_PATH_CONFIG_3L 0x420 -#define MADERA_DAC_DIGITAL_VOLUME_3L 0x421 -#define MADERA_NOISE_GATE_SELECT_3L 0x423 -#define MADERA_OUTPUT_PATH_CONFIG_3R 0x424 -#define MADERA_DAC_DIGITAL_VOLUME_3R 0x425 -#define MADERA_NOISE_GATE_SELECT_3R 0x427 -#define MADERA_OUTPUT_PATH_CONFIG_4L 0x428 -#define MADERA_DAC_DIGITAL_VOLUME_4L 0x429 -#define MADERA_NOISE_GATE_SELECT_4L 0x42B -#define MADERA_OUTPUT_PATH_CONFIG_4R 0x42C -#define MADERA_DAC_DIGITAL_VOLUME_4R 0x42D -#define MADERA_NOISE_GATE_SELECT_4R 0x42F -#define MADERA_OUTPUT_PATH_CONFIG_5L 0x430 -#define MADERA_DAC_DIGITAL_VOLUME_5L 0x431 -#define MADERA_NOISE_GATE_SELECT_5L 0x433 -#define MADERA_OUTPUT_PATH_CONFIG_5R 0x434 -#define MADERA_DAC_DIGITAL_VOLUME_5R 0x435 -#define MADERA_NOISE_GATE_SELECT_5R 0x437 -#define MADERA_OUTPUT_PATH_CONFIG_6L 0x438 -#define MADERA_DAC_DIGITAL_VOLUME_6L 0x439 -#define MADERA_NOISE_GATE_SELECT_6L 0x43B -#define MADERA_OUTPUT_PATH_CONFIG_6R 0x43C -#define MADERA_DAC_DIGITAL_VOLUME_6R 0x43D -#define MADERA_NOISE_GATE_SELECT_6R 0x43F -#define MADERA_DRE_ENABLE 0x440 -#define MADERA_EDRE_ENABLE 0x448 -#define MADERA_EDRE_MANUAL 0x44A -#define MADERA_DAC_AEC_CONTROL_1 0x450 -#define MADERA_DAC_AEC_CONTROL_2 0x451 -#define MADERA_NOISE_GATE_CONTROL 0x458 -#define MADERA_PDM_SPK1_CTRL_1 0x490 -#define MADERA_PDM_SPK1_CTRL_2 0x491 -#define MADERA_PDM_SPK2_CTRL_1 0x492 -#define MADERA_PDM_SPK2_CTRL_2 0x493 -#define MADERA_HP1_SHORT_CIRCUIT_CTRL 0x4A0 -#define MADERA_HP2_SHORT_CIRCUIT_CTRL 0x4A1 -#define MADERA_HP3_SHORT_CIRCUIT_CTRL 0x4A2 -#define MADERA_HP_TEST_CTRL_1 0x4A4 -#define MADERA_HP_TEST_CTRL_5 0x4A8 -#define MADERA_HP_TEST_CTRL_6 0x4A9 -#define MADERA_AIF1_BCLK_CTRL 0x500 -#define MADERA_AIF1_TX_PIN_CTRL 0x501 -#define MADERA_AIF1_RX_PIN_CTRL 0x502 -#define MADERA_AIF1_RATE_CTRL 0x503 -#define MADERA_AIF1_FORMAT 0x504 -#define MADERA_AIF1_TX_BCLK_RATE 0x505 -#define MADERA_AIF1_RX_BCLK_RATE 0x506 -#define MADERA_AIF1_FRAME_CTRL_1 0x507 -#define MADERA_AIF1_FRAME_CTRL_2 0x508 -#define MADERA_AIF1_FRAME_CTRL_3 0x509 -#define MADERA_AIF1_FRAME_CTRL_4 0x50A -#define MADERA_AIF1_FRAME_CTRL_5 0x50B -#define MADERA_AIF1_FRAME_CTRL_6 0x50C -#define MADERA_AIF1_FRAME_CTRL_7 0x50D -#define MADERA_AIF1_FRAME_CTRL_8 0x50E -#define MADERA_AIF1_FRAME_CTRL_9 0x50F -#define MADERA_AIF1_FRAME_CTRL_10 0x510 -#define MADERA_AIF1_FRAME_CTRL_11 0x511 -#define MADERA_AIF1_FRAME_CTRL_12 0x512 -#define MADERA_AIF1_FRAME_CTRL_13 0x513 -#define MADERA_AIF1_FRAME_CTRL_14 0x514 -#define MADERA_AIF1_FRAME_CTRL_15 0x515 -#define MADERA_AIF1_FRAME_CTRL_16 0x516 -#define MADERA_AIF1_FRAME_CTRL_17 0x517 -#define MADERA_AIF1_FRAME_CTRL_18 0x518 -#define MADERA_AIF1_TX_ENABLES 0x519 -#define MADERA_AIF1_RX_ENABLES 0x51A -#define MADERA_AIF1_FORCE_WRITE 0x51B -#define MADERA_AIF2_BCLK_CTRL 0x540 -#define MADERA_AIF2_TX_PIN_CTRL 0x541 -#define MADERA_AIF2_RX_PIN_CTRL 0x542 -#define MADERA_AIF2_RATE_CTRL 0x543 -#define MADERA_AIF2_FORMAT 0x544 -#define MADERA_AIF2_TX_BCLK_RATE 0x545 -#define MADERA_AIF2_RX_BCLK_RATE 0x546 -#define MADERA_AIF2_FRAME_CTRL_1 0x547 -#define MADERA_AIF2_FRAME_CTRL_2 0x548 -#define MADERA_AIF2_FRAME_CTRL_3 0x549 -#define MADERA_AIF2_FRAME_CTRL_4 0x54A -#define MADERA_AIF2_FRAME_CTRL_5 0x54B -#define MADERA_AIF2_FRAME_CTRL_6 0x54C -#define MADERA_AIF2_FRAME_CTRL_7 0x54D -#define MADERA_AIF2_FRAME_CTRL_8 0x54E -#define MADERA_AIF2_FRAME_CTRL_9 0x54F -#define MADERA_AIF2_FRAME_CTRL_10 0x550 -#define MADERA_AIF2_FRAME_CTRL_11 0x551 -#define MADERA_AIF2_FRAME_CTRL_12 0x552 -#define MADERA_AIF2_FRAME_CTRL_13 0x553 -#define MADERA_AIF2_FRAME_CTRL_14 0x554 -#define MADERA_AIF2_FRAME_CTRL_15 0x555 -#define MADERA_AIF2_FRAME_CTRL_16 0x556 -#define MADERA_AIF2_FRAME_CTRL_17 0x557 -#define MADERA_AIF2_FRAME_CTRL_18 0x558 -#define MADERA_AIF2_TX_ENABLES 0x559 -#define MADERA_AIF2_RX_ENABLES 0x55A -#define MADERA_AIF2_FORCE_WRITE 0x55B -#define MADERA_AIF3_BCLK_CTRL 0x580 -#define MADERA_AIF3_TX_PIN_CTRL 0x581 -#define MADERA_AIF3_RX_PIN_CTRL 0x582 -#define MADERA_AIF3_RATE_CTRL 0x583 -#define MADERA_AIF3_FORMAT 0x584 -#define MADERA_AIF3_TX_BCLK_RATE 0x585 -#define MADERA_AIF3_RX_BCLK_RATE 0x586 -#define MADERA_AIF3_FRAME_CTRL_1 0x587 -#define MADERA_AIF3_FRAME_CTRL_2 0x588 -#define MADERA_AIF3_FRAME_CTRL_3 0x589 -#define MADERA_AIF3_FRAME_CTRL_4 0x58A -#define MADERA_AIF3_FRAME_CTRL_11 0x591 -#define MADERA_AIF3_FRAME_CTRL_12 0x592 -#define MADERA_AIF3_TX_ENABLES 0x599 -#define MADERA_AIF3_RX_ENABLES 0x59A -#define MADERA_AIF3_FORCE_WRITE 0x59B -#define MADERA_AIF4_BCLK_CTRL 0x5A0 -#define MADERA_AIF4_TX_PIN_CTRL 0x5A1 -#define MADERA_AIF4_RX_PIN_CTRL 0x5A2 -#define MADERA_AIF4_RATE_CTRL 0x5A3 -#define MADERA_AIF4_FORMAT 0x5A4 -#define MADERA_AIF4_TX_BCLK_RATE 0x5A5 -#define MADERA_AIF4_RX_BCLK_RATE 0x5A6 -#define MADERA_AIF4_FRAME_CTRL_1 0x5A7 -#define MADERA_AIF4_FRAME_CTRL_2 0x5A8 -#define MADERA_AIF4_FRAME_CTRL_3 0x5A9 -#define MADERA_AIF4_FRAME_CTRL_4 0x5AA -#define MADERA_AIF4_FRAME_CTRL_11 0x5B1 -#define MADERA_AIF4_FRAME_CTRL_12 0x5B2 -#define MADERA_AIF4_TX_ENABLES 0x5B9 -#define MADERA_AIF4_RX_ENABLES 0x5BA -#define MADERA_AIF4_FORCE_WRITE 0x5BB -#define MADERA_SPD1_TX_CONTROL 0x5C2 -#define MADERA_SPD1_TX_CHANNEL_STATUS_1 0x5C3 -#define MADERA_SPD1_TX_CHANNEL_STATUS_2 0x5C4 -#define MADERA_SPD1_TX_CHANNEL_STATUS_3 0x5C5 -#define MADERA_SLIMBUS_FRAMER_REF_GEAR 0x5E3 -#define MADERA_SLIMBUS_RATES_1 0x5E5 -#define MADERA_SLIMBUS_RATES_2 0x5E6 -#define MADERA_SLIMBUS_RATES_3 0x5E7 -#define MADERA_SLIMBUS_RATES_4 0x5E8 -#define MADERA_SLIMBUS_RATES_5 0x5E9 -#define MADERA_SLIMBUS_RATES_6 0x5EA -#define MADERA_SLIMBUS_RATES_7 0x5EB -#define MADERA_SLIMBUS_RATES_8 0x5EC -#define MADERA_SLIMBUS_RX_CHANNEL_ENABLE 0x5F5 -#define MADERA_SLIMBUS_TX_CHANNEL_ENABLE 0x5F6 -#define MADERA_SLIMBUS_RX_PORT_STATUS 0x5F7 -#define MADERA_SLIMBUS_TX_PORT_STATUS 0x5F8 -#define MADERA_PWM1MIX_INPUT_1_SOURCE 0x640 -#define MADERA_PWM1MIX_INPUT_1_VOLUME 0x641 -#define MADERA_PWM1MIX_INPUT_2_SOURCE 0x642 -#define MADERA_PWM1MIX_INPUT_2_VOLUME 0x643 -#define MADERA_PWM1MIX_INPUT_3_SOURCE 0x644 -#define MADERA_PWM1MIX_INPUT_3_VOLUME 0x645 -#define MADERA_PWM1MIX_INPUT_4_SOURCE 0x646 -#define MADERA_PWM1MIX_INPUT_4_VOLUME 0x647 -#define MADERA_PWM2MIX_INPUT_1_SOURCE 0x648 -#define MADERA_PWM2MIX_INPUT_1_VOLUME 0x649 -#define MADERA_PWM2MIX_INPUT_2_SOURCE 0x64A -#define MADERA_PWM2MIX_INPUT_2_VOLUME 0x64B -#define MADERA_PWM2MIX_INPUT_3_SOURCE 0x64C -#define MADERA_PWM2MIX_INPUT_3_VOLUME 0x64D -#define MADERA_PWM2MIX_INPUT_4_SOURCE 0x64E -#define MADERA_PWM2MIX_INPUT_4_VOLUME 0x64F -#define MADERA_OUT1LMIX_INPUT_1_SOURCE 0x680 -#define MADERA_OUT1LMIX_INPUT_1_VOLUME 0x681 -#define MADERA_OUT1LMIX_INPUT_2_SOURCE 0x682 -#define MADERA_OUT1LMIX_INPUT_2_VOLUME 0x683 -#define MADERA_OUT1LMIX_INPUT_3_SOURCE 0x684 -#define MADERA_OUT1LMIX_INPUT_3_VOLUME 0x685 -#define MADERA_OUT1LMIX_INPUT_4_SOURCE 0x686 -#define MADERA_OUT1LMIX_INPUT_4_VOLUME 0x687 -#define MADERA_OUT1RMIX_INPUT_1_SOURCE 0x688 -#define MADERA_OUT1RMIX_INPUT_1_VOLUME 0x689 -#define MADERA_OUT1RMIX_INPUT_2_SOURCE 0x68A -#define MADERA_OUT1RMIX_INPUT_2_VOLUME 0x68B -#define MADERA_OUT1RMIX_INPUT_3_SOURCE 0x68C -#define MADERA_OUT1RMIX_INPUT_3_VOLUME 0x68D -#define MADERA_OUT1RMIX_INPUT_4_SOURCE 0x68E -#define MADERA_OUT1RMIX_INPUT_4_VOLUME 0x68F -#define MADERA_OUT2LMIX_INPUT_1_SOURCE 0x690 -#define MADERA_OUT2LMIX_INPUT_1_VOLUME 0x691 -#define MADERA_OUT2LMIX_INPUT_2_SOURCE 0x692 -#define MADERA_OUT2LMIX_INPUT_2_VOLUME 0x693 -#define MADERA_OUT2LMIX_INPUT_3_SOURCE 0x694 -#define MADERA_OUT2LMIX_INPUT_3_VOLUME 0x695 -#define MADERA_OUT2LMIX_INPUT_4_SOURCE 0x696 -#define MADERA_OUT2LMIX_INPUT_4_VOLUME 0x697 -#define MADERA_OUT2RMIX_INPUT_1_SOURCE 0x698 -#define MADERA_OUT2RMIX_INPUT_1_VOLUME 0x699 -#define MADERA_OUT2RMIX_INPUT_2_SOURCE 0x69A -#define MADERA_OUT2RMIX_INPUT_2_VOLUME 0x69B -#define MADERA_OUT2RMIX_INPUT_3_SOURCE 0x69C -#define MADERA_OUT2RMIX_INPUT_3_VOLUME 0x69D -#define MADERA_OUT2RMIX_INPUT_4_SOURCE 0x69E -#define MADERA_OUT2RMIX_INPUT_4_VOLUME 0x69F -#define MADERA_OUT3LMIX_INPUT_1_SOURCE 0x6A0 -#define MADERA_OUT3LMIX_INPUT_1_VOLUME 0x6A1 -#define MADERA_OUT3LMIX_INPUT_2_SOURCE 0x6A2 -#define MADERA_OUT3LMIX_INPUT_2_VOLUME 0x6A3 -#define MADERA_OUT3LMIX_INPUT_3_SOURCE 0x6A4 -#define MADERA_OUT3LMIX_INPUT_3_VOLUME 0x6A5 -#define MADERA_OUT3LMIX_INPUT_4_SOURCE 0x6A6 -#define MADERA_OUT3LMIX_INPUT_4_VOLUME 0x6A7 -#define MADERA_OUT3RMIX_INPUT_1_SOURCE 0x6A8 -#define MADERA_OUT3RMIX_INPUT_1_VOLUME 0x6A9 -#define MADERA_OUT3RMIX_INPUT_2_SOURCE 0x6AA -#define MADERA_OUT3RMIX_INPUT_2_VOLUME 0x6AB -#define MADERA_OUT3RMIX_INPUT_3_SOURCE 0x6AC -#define MADERA_OUT3RMIX_INPUT_3_VOLUME 0x6AD -#define MADERA_OUT3RMIX_INPUT_4_SOURCE 0x6AE -#define MADERA_OUT3RMIX_INPUT_4_VOLUME 0x6AF -#define MADERA_OUT4LMIX_INPUT_1_SOURCE 0x6B0 -#define MADERA_OUT4LMIX_INPUT_1_VOLUME 0x6B1 -#define MADERA_OUT4LMIX_INPUT_2_SOURCE 0x6B2 -#define MADERA_OUT4LMIX_INPUT_2_VOLUME 0x6B3 -#define MADERA_OUT4LMIX_INPUT_3_SOURCE 0x6B4 -#define MADERA_OUT4LMIX_INPUT_3_VOLUME 0x6B5 -#define MADERA_OUT4LMIX_INPUT_4_SOURCE 0x6B6 -#define MADERA_OUT4LMIX_INPUT_4_VOLUME 0x6B7 -#define MADERA_OUT4RMIX_INPUT_1_SOURCE 0x6B8 -#define MADERA_OUT4RMIX_INPUT_1_VOLUME 0x6B9 -#define MADERA_OUT4RMIX_INPUT_2_SOURCE 0x6BA -#define MADERA_OUT4RMIX_INPUT_2_VOLUME 0x6BB -#define MADERA_OUT4RMIX_INPUT_3_SOURCE 0x6BC -#define MADERA_OUT4RMIX_INPUT_3_VOLUME 0x6BD -#define MADERA_OUT4RMIX_INPUT_4_SOURCE 0x6BE -#define MADERA_OUT4RMIX_INPUT_4_VOLUME 0x6BF -#define MADERA_OUT5LMIX_INPUT_1_SOURCE 0x6C0 -#define MADERA_OUT5LMIX_INPUT_1_VOLUME 0x6C1 -#define MADERA_OUT5LMIX_INPUT_2_SOURCE 0x6C2 -#define MADERA_OUT5LMIX_INPUT_2_VOLUME 0x6C3 -#define MADERA_OUT5LMIX_INPUT_3_SOURCE 0x6C4 -#define MADERA_OUT5LMIX_INPUT_3_VOLUME 0x6C5 -#define MADERA_OUT5LMIX_INPUT_4_SOURCE 0x6C6 -#define MADERA_OUT5LMIX_INPUT_4_VOLUME 0x6C7 -#define MADERA_OUT5RMIX_INPUT_1_SOURCE 0x6C8 -#define MADERA_OUT5RMIX_INPUT_1_VOLUME 0x6C9 -#define MADERA_OUT5RMIX_INPUT_2_SOURCE 0x6CA -#define MADERA_OUT5RMIX_INPUT_2_VOLUME 0x6CB -#define MADERA_OUT5RMIX_INPUT_3_SOURCE 0x6CC -#define MADERA_OUT5RMIX_INPUT_3_VOLUME 0x6CD -#define MADERA_OUT5RMIX_INPUT_4_SOURCE 0x6CE -#define MADERA_OUT5RMIX_INPUT_4_VOLUME 0x6CF -#define MADERA_OUT6LMIX_INPUT_1_SOURCE 0x6D0 -#define MADERA_OUT6LMIX_INPUT_1_VOLUME 0x6D1 -#define MADERA_OUT6LMIX_INPUT_2_SOURCE 0x6D2 -#define MADERA_OUT6LMIX_INPUT_2_VOLUME 0x6D3 -#define MADERA_OUT6LMIX_INPUT_3_SOURCE 0x6D4 -#define MADERA_OUT6LMIX_INPUT_3_VOLUME 0x6D5 -#define MADERA_OUT6LMIX_INPUT_4_SOURCE 0x6D6 -#define MADERA_OUT6LMIX_INPUT_4_VOLUME 0x6D7 -#define MADERA_OUT6RMIX_INPUT_1_SOURCE 0x6D8 -#define MADERA_OUT6RMIX_INPUT_1_VOLUME 0x6D9 -#define MADERA_OUT6RMIX_INPUT_2_SOURCE 0x6DA -#define MADERA_OUT6RMIX_INPUT_2_VOLUME 0x6DB -#define MADERA_OUT6RMIX_INPUT_3_SOURCE 0x6DC -#define MADERA_OUT6RMIX_INPUT_3_VOLUME 0x6DD -#define MADERA_OUT6RMIX_INPUT_4_SOURCE 0x6DE -#define MADERA_OUT6RMIX_INPUT_4_VOLUME 0x6DF -#define MADERA_AIF1TX1MIX_INPUT_1_SOURCE 0x700 -#define MADERA_AIF1TX1MIX_INPUT_1_VOLUME 0x701 -#define MADERA_AIF1TX1MIX_INPUT_2_SOURCE 0x702 -#define MADERA_AIF1TX1MIX_INPUT_2_VOLUME 0x703 -#define MADERA_AIF1TX1MIX_INPUT_3_SOURCE 0x704 -#define MADERA_AIF1TX1MIX_INPUT_3_VOLUME 0x705 -#define MADERA_AIF1TX1MIX_INPUT_4_SOURCE 0x706 -#define MADERA_AIF1TX1MIX_INPUT_4_VOLUME 0x707 -#define MADERA_AIF1TX2MIX_INPUT_1_SOURCE 0x708 -#define MADERA_AIF1TX2MIX_INPUT_1_VOLUME 0x709 -#define MADERA_AIF1TX2MIX_INPUT_2_SOURCE 0x70A -#define MADERA_AIF1TX2MIX_INPUT_2_VOLUME 0x70B -#define MADERA_AIF1TX2MIX_INPUT_3_SOURCE 0x70C -#define MADERA_AIF1TX2MIX_INPUT_3_VOLUME 0x70D -#define MADERA_AIF1TX2MIX_INPUT_4_SOURCE 0x70E -#define MADERA_AIF1TX2MIX_INPUT_4_VOLUME 0x70F -#define MADERA_AIF1TX3MIX_INPUT_1_SOURCE 0x710 -#define MADERA_AIF1TX3MIX_INPUT_1_VOLUME 0x711 -#define MADERA_AIF1TX3MIX_INPUT_2_SOURCE 0x712 -#define MADERA_AIF1TX3MIX_INPUT_2_VOLUME 0x713 -#define MADERA_AIF1TX3MIX_INPUT_3_SOURCE 0x714 -#define MADERA_AIF1TX3MIX_INPUT_3_VOLUME 0x715 -#define MADERA_AIF1TX3MIX_INPUT_4_SOURCE 0x716 -#define MADERA_AIF1TX3MIX_INPUT_4_VOLUME 0x717 -#define MADERA_AIF1TX4MIX_INPUT_1_SOURCE 0x718 -#define MADERA_AIF1TX4MIX_INPUT_1_VOLUME 0x719 -#define MADERA_AIF1TX4MIX_INPUT_2_SOURCE 0x71A -#define MADERA_AIF1TX4MIX_INPUT_2_VOLUME 0x71B -#define MADERA_AIF1TX4MIX_INPUT_3_SOURCE 0x71C -#define MADERA_AIF1TX4MIX_INPUT_3_VOLUME 0x71D -#define MADERA_AIF1TX4MIX_INPUT_4_SOURCE 0x71E -#define MADERA_AIF1TX4MIX_INPUT_4_VOLUME 0x71F -#define MADERA_AIF1TX5MIX_INPUT_1_SOURCE 0x720 -#define MADERA_AIF1TX5MIX_INPUT_1_VOLUME 0x721 -#define MADERA_AIF1TX5MIX_INPUT_2_SOURCE 0x722 -#define MADERA_AIF1TX5MIX_INPUT_2_VOLUME 0x723 -#define MADERA_AIF1TX5MIX_INPUT_3_SOURCE 0x724 -#define MADERA_AIF1TX5MIX_INPUT_3_VOLUME 0x725 -#define MADERA_AIF1TX5MIX_INPUT_4_SOURCE 0x726 -#define MADERA_AIF1TX5MIX_INPUT_4_VOLUME 0x727 -#define MADERA_AIF1TX6MIX_INPUT_1_SOURCE 0x728 -#define MADERA_AIF1TX6MIX_INPUT_1_VOLUME 0x729 -#define MADERA_AIF1TX6MIX_INPUT_2_SOURCE 0x72A -#define MADERA_AIF1TX6MIX_INPUT_2_VOLUME 0x72B -#define MADERA_AIF1TX6MIX_INPUT_3_SOURCE 0x72C -#define MADERA_AIF1TX6MIX_INPUT_3_VOLUME 0x72D -#define MADERA_AIF1TX6MIX_INPUT_4_SOURCE 0x72E -#define MADERA_AIF1TX6MIX_INPUT_4_VOLUME 0x72F -#define MADERA_AIF1TX7MIX_INPUT_1_SOURCE 0x730 -#define MADERA_AIF1TX7MIX_INPUT_1_VOLUME 0x731 -#define MADERA_AIF1TX7MIX_INPUT_2_SOURCE 0x732 -#define MADERA_AIF1TX7MIX_INPUT_2_VOLUME 0x733 -#define MADERA_AIF1TX7MIX_INPUT_3_SOURCE 0x734 -#define MADERA_AIF1TX7MIX_INPUT_3_VOLUME 0x735 -#define MADERA_AIF1TX7MIX_INPUT_4_SOURCE 0x736 -#define MADERA_AIF1TX7MIX_INPUT_4_VOLUME 0x737 -#define MADERA_AIF1TX8MIX_INPUT_1_SOURCE 0x738 -#define MADERA_AIF1TX8MIX_INPUT_1_VOLUME 0x739 -#define MADERA_AIF1TX8MIX_INPUT_2_SOURCE 0x73A -#define MADERA_AIF1TX8MIX_INPUT_2_VOLUME 0x73B -#define MADERA_AIF1TX8MIX_INPUT_3_SOURCE 0x73C -#define MADERA_AIF1TX8MIX_INPUT_3_VOLUME 0x73D -#define MADERA_AIF1TX8MIX_INPUT_4_SOURCE 0x73E -#define MADERA_AIF1TX8MIX_INPUT_4_VOLUME 0x73F -#define MADERA_AIF2TX1MIX_INPUT_1_SOURCE 0x740 -#define MADERA_AIF2TX1MIX_INPUT_1_VOLUME 0x741 -#define MADERA_AIF2TX1MIX_INPUT_2_SOURCE 0x742 -#define MADERA_AIF2TX1MIX_INPUT_2_VOLUME 0x743 -#define MADERA_AIF2TX1MIX_INPUT_3_SOURCE 0x744 -#define MADERA_AIF2TX1MIX_INPUT_3_VOLUME 0x745 -#define MADERA_AIF2TX1MIX_INPUT_4_SOURCE 0x746 -#define MADERA_AIF2TX1MIX_INPUT_4_VOLUME 0x747 -#define MADERA_AIF2TX2MIX_INPUT_1_SOURCE 0x748 -#define MADERA_AIF2TX2MIX_INPUT_1_VOLUME 0x749 -#define MADERA_AIF2TX2MIX_INPUT_2_SOURCE 0x74A -#define MADERA_AIF2TX2MIX_INPUT_2_VOLUME 0x74B -#define MADERA_AIF2TX2MIX_INPUT_3_SOURCE 0x74C -#define MADERA_AIF2TX2MIX_INPUT_3_VOLUME 0x74D -#define MADERA_AIF2TX2MIX_INPUT_4_SOURCE 0x74E -#define MADERA_AIF2TX2MIX_INPUT_4_VOLUME 0x74F -#define MADERA_AIF2TX3MIX_INPUT_1_SOURCE 0x750 -#define MADERA_AIF2TX3MIX_INPUT_1_VOLUME 0x751 -#define MADERA_AIF2TX3MIX_INPUT_2_SOURCE 0x752 -#define MADERA_AIF2TX3MIX_INPUT_2_VOLUME 0x753 -#define MADERA_AIF2TX3MIX_INPUT_3_SOURCE 0x754 -#define MADERA_AIF2TX3MIX_INPUT_3_VOLUME 0x755 -#define MADERA_AIF2TX3MIX_INPUT_4_SOURCE 0x756 -#define MADERA_AIF2TX3MIX_INPUT_4_VOLUME 0x757 -#define MADERA_AIF2TX4MIX_INPUT_1_SOURCE 0x758 -#define MADERA_AIF2TX4MIX_INPUT_1_VOLUME 0x759 -#define MADERA_AIF2TX4MIX_INPUT_2_SOURCE 0x75A -#define MADERA_AIF2TX4MIX_INPUT_2_VOLUME 0x75B -#define MADERA_AIF2TX4MIX_INPUT_3_SOURCE 0x75C -#define MADERA_AIF2TX4MIX_INPUT_3_VOLUME 0x75D -#define MADERA_AIF2TX4MIX_INPUT_4_SOURCE 0x75E -#define MADERA_AIF2TX4MIX_INPUT_4_VOLUME 0x75F -#define MADERA_AIF2TX5MIX_INPUT_1_SOURCE 0x760 -#define MADERA_AIF2TX5MIX_INPUT_1_VOLUME 0x761 -#define MADERA_AIF2TX5MIX_INPUT_2_SOURCE 0x762 -#define MADERA_AIF2TX5MIX_INPUT_2_VOLUME 0x763 -#define MADERA_AIF2TX5MIX_INPUT_3_SOURCE 0x764 -#define MADERA_AIF2TX5MIX_INPUT_3_VOLUME 0x765 -#define MADERA_AIF2TX5MIX_INPUT_4_SOURCE 0x766 -#define MADERA_AIF2TX5MIX_INPUT_4_VOLUME 0x767 -#define MADERA_AIF2TX6MIX_INPUT_1_SOURCE 0x768 -#define MADERA_AIF2TX6MIX_INPUT_1_VOLUME 0x769 -#define MADERA_AIF2TX6MIX_INPUT_2_SOURCE 0x76A -#define MADERA_AIF2TX6MIX_INPUT_2_VOLUME 0x76B -#define MADERA_AIF2TX6MIX_INPUT_3_SOURCE 0x76C -#define MADERA_AIF2TX6MIX_INPUT_3_VOLUME 0x76D -#define MADERA_AIF2TX6MIX_INPUT_4_SOURCE 0x76E -#define MADERA_AIF2TX6MIX_INPUT_4_VOLUME 0x76F -#define MADERA_AIF2TX7MIX_INPUT_1_SOURCE 0x770 -#define MADERA_AIF2TX7MIX_INPUT_1_VOLUME 0x771 -#define MADERA_AIF2TX7MIX_INPUT_2_SOURCE 0x772 -#define MADERA_AIF2TX7MIX_INPUT_2_VOLUME 0x773 -#define MADERA_AIF2TX7MIX_INPUT_3_SOURCE 0x774 -#define MADERA_AIF2TX7MIX_INPUT_3_VOLUME 0x775 -#define MADERA_AIF2TX7MIX_INPUT_4_SOURCE 0x776 -#define MADERA_AIF2TX7MIX_INPUT_4_VOLUME 0x777 -#define MADERA_AIF2TX8MIX_INPUT_1_SOURCE 0x778 -#define MADERA_AIF2TX8MIX_INPUT_1_VOLUME 0x779 -#define MADERA_AIF2TX8MIX_INPUT_2_SOURCE 0x77A -#define MADERA_AIF2TX8MIX_INPUT_2_VOLUME 0x77B -#define MADERA_AIF2TX8MIX_INPUT_3_SOURCE 0x77C -#define MADERA_AIF2TX8MIX_INPUT_3_VOLUME 0x77D -#define MADERA_AIF2TX8MIX_INPUT_4_SOURCE 0x77E -#define MADERA_AIF2TX8MIX_INPUT_4_VOLUME 0x77F -#define MADERA_AIF3TX1MIX_INPUT_1_SOURCE 0x780 -#define MADERA_AIF3TX1MIX_INPUT_1_VOLUME 0x781 -#define MADERA_AIF3TX1MIX_INPUT_2_SOURCE 0x782 -#define MADERA_AIF3TX1MIX_INPUT_2_VOLUME 0x783 -#define MADERA_AIF3TX1MIX_INPUT_3_SOURCE 0x784 -#define MADERA_AIF3TX1MIX_INPUT_3_VOLUME 0x785 -#define MADERA_AIF3TX1MIX_INPUT_4_SOURCE 0x786 -#define MADERA_AIF3TX1MIX_INPUT_4_VOLUME 0x787 -#define MADERA_AIF3TX2MIX_INPUT_1_SOURCE 0x788 -#define MADERA_AIF3TX2MIX_INPUT_1_VOLUME 0x789 -#define MADERA_AIF3TX2MIX_INPUT_2_SOURCE 0x78A -#define MADERA_AIF3TX2MIX_INPUT_2_VOLUME 0x78B -#define MADERA_AIF3TX2MIX_INPUT_3_SOURCE 0x78C -#define MADERA_AIF3TX2MIX_INPUT_3_VOLUME 0x78D -#define MADERA_AIF3TX2MIX_INPUT_4_SOURCE 0x78E -#define MADERA_AIF3TX2MIX_INPUT_4_VOLUME 0x78F -#define MADERA_AIF4TX1MIX_INPUT_1_SOURCE 0x7A0 -#define MADERA_AIF4TX1MIX_INPUT_1_VOLUME 0x7A1 -#define MADERA_AIF4TX1MIX_INPUT_2_SOURCE 0x7A2 -#define MADERA_AIF4TX1MIX_INPUT_2_VOLUME 0x7A3 -#define MADERA_AIF4TX1MIX_INPUT_3_SOURCE 0x7A4 -#define MADERA_AIF4TX1MIX_INPUT_3_VOLUME 0x7A5 -#define MADERA_AIF4TX1MIX_INPUT_4_SOURCE 0x7A6 -#define MADERA_AIF4TX1MIX_INPUT_4_VOLUME 0x7A7 -#define MADERA_AIF4TX2MIX_INPUT_1_SOURCE 0x7A8 -#define MADERA_AIF4TX2MIX_INPUT_1_VOLUME 0x7A9 -#define MADERA_AIF4TX2MIX_INPUT_2_SOURCE 0x7AA -#define MADERA_AIF4TX2MIX_INPUT_2_VOLUME 0x7AB -#define MADERA_AIF4TX2MIX_INPUT_3_SOURCE 0x7AC -#define MADERA_AIF4TX2MIX_INPUT_3_VOLUME 0x7AD -#define MADERA_AIF4TX2MIX_INPUT_4_SOURCE 0x7AE -#define MADERA_AIF4TX2MIX_INPUT_4_VOLUME 0x7AF -#define MADERA_SLIMTX1MIX_INPUT_1_SOURCE 0x7C0 -#define MADERA_SLIMTX1MIX_INPUT_1_VOLUME 0x7C1 -#define MADERA_SLIMTX1MIX_INPUT_2_SOURCE 0x7C2 -#define MADERA_SLIMTX1MIX_INPUT_2_VOLUME 0x7C3 -#define MADERA_SLIMTX1MIX_INPUT_3_SOURCE 0x7C4 -#define MADERA_SLIMTX1MIX_INPUT_3_VOLUME 0x7C5 -#define MADERA_SLIMTX1MIX_INPUT_4_SOURCE 0x7C6 -#define MADERA_SLIMTX1MIX_INPUT_4_VOLUME 0x7C7 -#define MADERA_SLIMTX2MIX_INPUT_1_SOURCE 0x7C8 -#define MADERA_SLIMTX2MIX_INPUT_1_VOLUME 0x7C9 -#define MADERA_SLIMTX2MIX_INPUT_2_SOURCE 0x7CA -#define MADERA_SLIMTX2MIX_INPUT_2_VOLUME 0x7CB -#define MADERA_SLIMTX2MIX_INPUT_3_SOURCE 0x7CC -#define MADERA_SLIMTX2MIX_INPUT_3_VOLUME 0x7CD -#define MADERA_SLIMTX2MIX_INPUT_4_SOURCE 0x7CE -#define MADERA_SLIMTX2MIX_INPUT_4_VOLUME 0x7CF -#define MADERA_SLIMTX3MIX_INPUT_1_SOURCE 0x7D0 -#define MADERA_SLIMTX3MIX_INPUT_1_VOLUME 0x7D1 -#define MADERA_SLIMTX3MIX_INPUT_2_SOURCE 0x7D2 -#define MADERA_SLIMTX3MIX_INPUT_2_VOLUME 0x7D3 -#define MADERA_SLIMTX3MIX_INPUT_3_SOURCE 0x7D4 -#define MADERA_SLIMTX3MIX_INPUT_3_VOLUME 0x7D5 -#define MADERA_SLIMTX3MIX_INPUT_4_SOURCE 0x7D6 -#define MADERA_SLIMTX3MIX_INPUT_4_VOLUME 0x7D7 -#define MADERA_SLIMTX4MIX_INPUT_1_SOURCE 0x7D8 -#define MADERA_SLIMTX4MIX_INPUT_1_VOLUME 0x7D9 -#define MADERA_SLIMTX4MIX_INPUT_2_SOURCE 0x7DA -#define MADERA_SLIMTX4MIX_INPUT_2_VOLUME 0x7DB -#define MADERA_SLIMTX4MIX_INPUT_3_SOURCE 0x7DC -#define MADERA_SLIMTX4MIX_INPUT_3_VOLUME 0x7DD -#define MADERA_SLIMTX4MIX_INPUT_4_SOURCE 0x7DE -#define MADERA_SLIMTX4MIX_INPUT_4_VOLUME 0x7DF -#define MADERA_SLIMTX5MIX_INPUT_1_SOURCE 0x7E0 -#define MADERA_SLIMTX5MIX_INPUT_1_VOLUME 0x7E1 -#define MADERA_SLIMTX5MIX_INPUT_2_SOURCE 0x7E2 -#define MADERA_SLIMTX5MIX_INPUT_2_VOLUME 0x7E3 -#define MADERA_SLIMTX5MIX_INPUT_3_SOURCE 0x7E4 -#define MADERA_SLIMTX5MIX_INPUT_3_VOLUME 0x7E5 -#define MADERA_SLIMTX5MIX_INPUT_4_SOURCE 0x7E6 -#define MADERA_SLIMTX5MIX_INPUT_4_VOLUME 0x7E7 -#define MADERA_SLIMTX6MIX_INPUT_1_SOURCE 0x7E8 -#define MADERA_SLIMTX6MIX_INPUT_1_VOLUME 0x7E9 -#define MADERA_SLIMTX6MIX_INPUT_2_SOURCE 0x7EA -#define MADERA_SLIMTX6MIX_INPUT_2_VOLUME 0x7EB -#define MADERA_SLIMTX6MIX_INPUT_3_SOURCE 0x7EC -#define MADERA_SLIMTX6MIX_INPUT_3_VOLUME 0x7ED -#define MADERA_SLIMTX6MIX_INPUT_4_SOURCE 0x7EE -#define MADERA_SLIMTX6MIX_INPUT_4_VOLUME 0x7EF -#define MADERA_SLIMTX7MIX_INPUT_1_SOURCE 0x7F0 -#define MADERA_SLIMTX7MIX_INPUT_1_VOLUME 0x7F1 -#define MADERA_SLIMTX7MIX_INPUT_2_SOURCE 0x7F2 -#define MADERA_SLIMTX7MIX_INPUT_2_VOLUME 0x7F3 -#define MADERA_SLIMTX7MIX_INPUT_3_SOURCE 0x7F4 -#define MADERA_SLIMTX7MIX_INPUT_3_VOLUME 0x7F5 -#define MADERA_SLIMTX7MIX_INPUT_4_SOURCE 0x7F6 -#define MADERA_SLIMTX7MIX_INPUT_4_VOLUME 0x7F7 -#define MADERA_SLIMTX8MIX_INPUT_1_SOURCE 0x7F8 -#define MADERA_SLIMTX8MIX_INPUT_1_VOLUME 0x7F9 -#define MADERA_SLIMTX8MIX_INPUT_2_SOURCE 0x7FA -#define MADERA_SLIMTX8MIX_INPUT_2_VOLUME 0x7FB -#define MADERA_SLIMTX8MIX_INPUT_3_SOURCE 0x7FC -#define MADERA_SLIMTX8MIX_INPUT_3_VOLUME 0x7FD -#define MADERA_SLIMTX8MIX_INPUT_4_SOURCE 0x7FE -#define MADERA_SLIMTX8MIX_INPUT_4_VOLUME 0x7FF -#define MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE 0x800 -#define MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME 0x801 -#define MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE 0x808 -#define MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME 0x809 -#define MADERA_EQ1MIX_INPUT_1_SOURCE 0x880 -#define MADERA_EQ1MIX_INPUT_1_VOLUME 0x881 -#define MADERA_EQ1MIX_INPUT_2_SOURCE 0x882 -#define MADERA_EQ1MIX_INPUT_2_VOLUME 0x883 -#define MADERA_EQ1MIX_INPUT_3_SOURCE 0x884 -#define MADERA_EQ1MIX_INPUT_3_VOLUME 0x885 -#define MADERA_EQ1MIX_INPUT_4_SOURCE 0x886 -#define MADERA_EQ1MIX_INPUT_4_VOLUME 0x887 -#define MADERA_EQ2MIX_INPUT_1_SOURCE 0x888 -#define MADERA_EQ2MIX_INPUT_1_VOLUME 0x889 -#define MADERA_EQ2MIX_INPUT_2_SOURCE 0x88A -#define MADERA_EQ2MIX_INPUT_2_VOLUME 0x88B -#define MADERA_EQ2MIX_INPUT_3_SOURCE 0x88C -#define MADERA_EQ2MIX_INPUT_3_VOLUME 0x88D -#define MADERA_EQ2MIX_INPUT_4_SOURCE 0x88E -#define MADERA_EQ2MIX_INPUT_4_VOLUME 0x88F -#define MADERA_EQ3MIX_INPUT_1_SOURCE 0x890 -#define MADERA_EQ3MIX_INPUT_1_VOLUME 0x891 -#define MADERA_EQ3MIX_INPUT_2_SOURCE 0x892 -#define MADERA_EQ3MIX_INPUT_2_VOLUME 0x893 -#define MADERA_EQ3MIX_INPUT_3_SOURCE 0x894 -#define MADERA_EQ3MIX_INPUT_3_VOLUME 0x895 -#define MADERA_EQ3MIX_INPUT_4_SOURCE 0x896 -#define MADERA_EQ3MIX_INPUT_4_VOLUME 0x897 -#define MADERA_EQ4MIX_INPUT_1_SOURCE 0x898 -#define MADERA_EQ4MIX_INPUT_1_VOLUME 0x899 -#define MADERA_EQ4MIX_INPUT_2_SOURCE 0x89A -#define MADERA_EQ4MIX_INPUT_2_VOLUME 0x89B -#define MADERA_EQ4MIX_INPUT_3_SOURCE 0x89C -#define MADERA_EQ4MIX_INPUT_3_VOLUME 0x89D -#define MADERA_EQ4MIX_INPUT_4_SOURCE 0x89E -#define MADERA_EQ4MIX_INPUT_4_VOLUME 0x89F -#define MADERA_DRC1LMIX_INPUT_1_SOURCE 0x8C0 -#define MADERA_DRC1LMIX_INPUT_1_VOLUME 0x8C1 -#define MADERA_DRC1LMIX_INPUT_2_SOURCE 0x8C2 -#define MADERA_DRC1LMIX_INPUT_2_VOLUME 0x8C3 -#define MADERA_DRC1LMIX_INPUT_3_SOURCE 0x8C4 -#define MADERA_DRC1LMIX_INPUT_3_VOLUME 0x8C5 -#define MADERA_DRC1LMIX_INPUT_4_SOURCE 0x8C6 -#define MADERA_DRC1LMIX_INPUT_4_VOLUME 0x8C7 -#define MADERA_DRC1RMIX_INPUT_1_SOURCE 0x8C8 -#define MADERA_DRC1RMIX_INPUT_1_VOLUME 0x8C9 -#define MADERA_DRC1RMIX_INPUT_2_SOURCE 0x8CA -#define MADERA_DRC1RMIX_INPUT_2_VOLUME 0x8CB -#define MADERA_DRC1RMIX_INPUT_3_SOURCE 0x8CC -#define MADERA_DRC1RMIX_INPUT_3_VOLUME 0x8CD -#define MADERA_DRC1RMIX_INPUT_4_SOURCE 0x8CE -#define MADERA_DRC1RMIX_INPUT_4_VOLUME 0x8CF -#define MADERA_DRC2LMIX_INPUT_1_SOURCE 0x8D0 -#define MADERA_DRC2LMIX_INPUT_1_VOLUME 0x8D1 -#define MADERA_DRC2LMIX_INPUT_2_SOURCE 0x8D2 -#define MADERA_DRC2LMIX_INPUT_2_VOLUME 0x8D3 -#define MADERA_DRC2LMIX_INPUT_3_SOURCE 0x8D4 -#define MADERA_DRC2LMIX_INPUT_3_VOLUME 0x8D5 -#define MADERA_DRC2LMIX_INPUT_4_SOURCE 0x8D6 -#define MADERA_DRC2LMIX_INPUT_4_VOLUME 0x8D7 -#define MADERA_DRC2RMIX_INPUT_1_SOURCE 0x8D8 -#define MADERA_DRC2RMIX_INPUT_1_VOLUME 0x8D9 -#define MADERA_DRC2RMIX_INPUT_2_SOURCE 0x8DA -#define MADERA_DRC2RMIX_INPUT_2_VOLUME 0x8DB -#define MADERA_DRC2RMIX_INPUT_3_SOURCE 0x8DC -#define MADERA_DRC2RMIX_INPUT_3_VOLUME 0x8DD -#define MADERA_DRC2RMIX_INPUT_4_SOURCE 0x8DE -#define MADERA_DRC2RMIX_INPUT_4_VOLUME 0x8DF -#define MADERA_HPLP1MIX_INPUT_1_SOURCE 0x900 -#define MADERA_HPLP1MIX_INPUT_1_VOLUME 0x901 -#define MADERA_HPLP1MIX_INPUT_2_SOURCE 0x902 -#define MADERA_HPLP1MIX_INPUT_2_VOLUME 0x903 -#define MADERA_HPLP1MIX_INPUT_3_SOURCE 0x904 -#define MADERA_HPLP1MIX_INPUT_3_VOLUME 0x905 -#define MADERA_HPLP1MIX_INPUT_4_SOURCE 0x906 -#define MADERA_HPLP1MIX_INPUT_4_VOLUME 0x907 -#define MADERA_HPLP2MIX_INPUT_1_SOURCE 0x908 -#define MADERA_HPLP2MIX_INPUT_1_VOLUME 0x909 -#define MADERA_HPLP2MIX_INPUT_2_SOURCE 0x90A -#define MADERA_HPLP2MIX_INPUT_2_VOLUME 0x90B -#define MADERA_HPLP2MIX_INPUT_3_SOURCE 0x90C -#define MADERA_HPLP2MIX_INPUT_3_VOLUME 0x90D -#define MADERA_HPLP2MIX_INPUT_4_SOURCE 0x90E -#define MADERA_HPLP2MIX_INPUT_4_VOLUME 0x90F -#define MADERA_HPLP3MIX_INPUT_1_SOURCE 0x910 -#define MADERA_HPLP3MIX_INPUT_1_VOLUME 0x911 -#define MADERA_HPLP3MIX_INPUT_2_SOURCE 0x912 -#define MADERA_HPLP3MIX_INPUT_2_VOLUME 0x913 -#define MADERA_HPLP3MIX_INPUT_3_SOURCE 0x914 -#define MADERA_HPLP3MIX_INPUT_3_VOLUME 0x915 -#define MADERA_HPLP3MIX_INPUT_4_SOURCE 0x916 -#define MADERA_HPLP3MIX_INPUT_4_VOLUME 0x917 -#define MADERA_HPLP4MIX_INPUT_1_SOURCE 0x918 -#define MADERA_HPLP4MIX_INPUT_1_VOLUME 0x919 -#define MADERA_HPLP4MIX_INPUT_2_SOURCE 0x91A -#define MADERA_HPLP4MIX_INPUT_2_VOLUME 0x91B -#define MADERA_HPLP4MIX_INPUT_3_SOURCE 0x91C -#define MADERA_HPLP4MIX_INPUT_3_VOLUME 0x91D -#define MADERA_HPLP4MIX_INPUT_4_SOURCE 0x91E -#define MADERA_HPLP4MIX_INPUT_4_VOLUME 0x91F -#define MADERA_DSP1LMIX_INPUT_1_SOURCE 0x940 -#define MADERA_DSP1LMIX_INPUT_1_VOLUME 0x941 -#define MADERA_DSP1LMIX_INPUT_2_SOURCE 0x942 -#define MADERA_DSP1LMIX_INPUT_2_VOLUME 0x943 -#define MADERA_DSP1LMIX_INPUT_3_SOURCE 0x944 -#define MADERA_DSP1LMIX_INPUT_3_VOLUME 0x945 -#define MADERA_DSP1LMIX_INPUT_4_SOURCE 0x946 -#define MADERA_DSP1LMIX_INPUT_4_VOLUME 0x947 -#define MADERA_DSP1RMIX_INPUT_1_SOURCE 0x948 -#define MADERA_DSP1RMIX_INPUT_1_VOLUME 0x949 -#define MADERA_DSP1RMIX_INPUT_2_SOURCE 0x94A -#define MADERA_DSP1RMIX_INPUT_2_VOLUME 0x94B -#define MADERA_DSP1RMIX_INPUT_3_SOURCE 0x94C -#define MADERA_DSP1RMIX_INPUT_3_VOLUME 0x94D -#define MADERA_DSP1RMIX_INPUT_4_SOURCE 0x94E -#define MADERA_DSP1RMIX_INPUT_4_VOLUME 0x94F -#define MADERA_DSP1AUX1MIX_INPUT_1_SOURCE 0x950 -#define MADERA_DSP1AUX2MIX_INPUT_1_SOURCE 0x958 -#define MADERA_DSP1AUX3MIX_INPUT_1_SOURCE 0x960 -#define MADERA_DSP1AUX4MIX_INPUT_1_SOURCE 0x968 -#define MADERA_DSP1AUX5MIX_INPUT_1_SOURCE 0x970 -#define MADERA_DSP1AUX6MIX_INPUT_1_SOURCE 0x978 -#define MADERA_DSP2LMIX_INPUT_1_SOURCE 0x980 -#define MADERA_DSP2LMIX_INPUT_1_VOLUME 0x981 -#define MADERA_DSP2LMIX_INPUT_2_SOURCE 0x982 -#define MADERA_DSP2LMIX_INPUT_2_VOLUME 0x983 -#define MADERA_DSP2LMIX_INPUT_3_SOURCE 0x984 -#define MADERA_DSP2LMIX_INPUT_3_VOLUME 0x985 -#define MADERA_DSP2LMIX_INPUT_4_SOURCE 0x986 -#define MADERA_DSP2LMIX_INPUT_4_VOLUME 0x987 -#define MADERA_DSP2RMIX_INPUT_1_SOURCE 0x988 -#define MADERA_DSP2RMIX_INPUT_1_VOLUME 0x989 -#define MADERA_DSP2RMIX_INPUT_2_SOURCE 0x98A -#define MADERA_DSP2RMIX_INPUT_2_VOLUME 0x98B -#define MADERA_DSP2RMIX_INPUT_3_SOURCE 0x98C -#define MADERA_DSP2RMIX_INPUT_3_VOLUME 0x98D -#define MADERA_DSP2RMIX_INPUT_4_SOURCE 0x98E -#define MADERA_DSP2RMIX_INPUT_4_VOLUME 0x98F -#define MADERA_DSP2AUX1MIX_INPUT_1_SOURCE 0x990 -#define MADERA_DSP2AUX2MIX_INPUT_1_SOURCE 0x998 -#define MADERA_DSP2AUX3MIX_INPUT_1_SOURCE 0x9A0 -#define MADERA_DSP2AUX4MIX_INPUT_1_SOURCE 0x9A8 -#define MADERA_DSP2AUX5MIX_INPUT_1_SOURCE 0x9B0 -#define MADERA_DSP2AUX6MIX_INPUT_1_SOURCE 0x9B8 -#define MADERA_DSP3LMIX_INPUT_1_SOURCE 0x9C0 -#define MADERA_DSP3LMIX_INPUT_1_VOLUME 0x9C1 -#define MADERA_DSP3LMIX_INPUT_2_SOURCE 0x9C2 -#define MADERA_DSP3LMIX_INPUT_2_VOLUME 0x9C3 -#define MADERA_DSP3LMIX_INPUT_3_SOURCE 0x9C4 -#define MADERA_DSP3LMIX_INPUT_3_VOLUME 0x9C5 -#define MADERA_DSP3LMIX_INPUT_4_SOURCE 0x9C6 -#define MADERA_DSP3LMIX_INPUT_4_VOLUME 0x9C7 -#define MADERA_DSP3RMIX_INPUT_1_SOURCE 0x9C8 -#define MADERA_DSP3RMIX_INPUT_1_VOLUME 0x9C9 -#define MADERA_DSP3RMIX_INPUT_2_SOURCE 0x9CA -#define MADERA_DSP3RMIX_INPUT_2_VOLUME 0x9CB -#define MADERA_DSP3RMIX_INPUT_3_SOURCE 0x9CC -#define MADERA_DSP3RMIX_INPUT_3_VOLUME 0x9CD -#define MADERA_DSP3RMIX_INPUT_4_SOURCE 0x9CE -#define MADERA_DSP3RMIX_INPUT_4_VOLUME 0x9CF -#define MADERA_DSP3AUX1MIX_INPUT_1_SOURCE 0x9D0 -#define MADERA_DSP3AUX2MIX_INPUT_1_SOURCE 0x9D8 -#define MADERA_DSP3AUX3MIX_INPUT_1_SOURCE 0x9E0 -#define MADERA_DSP3AUX4MIX_INPUT_1_SOURCE 0x9E8 -#define MADERA_DSP3AUX5MIX_INPUT_1_SOURCE 0x9F0 -#define MADERA_DSP3AUX6MIX_INPUT_1_SOURCE 0x9F8 -#define MADERA_DSP4LMIX_INPUT_1_SOURCE 0xA00 -#define MADERA_DSP4LMIX_INPUT_1_VOLUME 0xA01 -#define MADERA_DSP4LMIX_INPUT_2_SOURCE 0xA02 -#define MADERA_DSP4LMIX_INPUT_2_VOLUME 0xA03 -#define MADERA_DSP4LMIX_INPUT_3_SOURCE 0xA04 -#define MADERA_DSP4LMIX_INPUT_3_VOLUME 0xA05 -#define MADERA_DSP4LMIX_INPUT_4_SOURCE 0xA06 -#define MADERA_DSP4LMIX_INPUT_4_VOLUME 0xA07 -#define MADERA_DSP4RMIX_INPUT_1_SOURCE 0xA08 -#define MADERA_DSP4RMIX_INPUT_1_VOLUME 0xA09 -#define MADERA_DSP4RMIX_INPUT_2_SOURCE 0xA0A -#define MADERA_DSP4RMIX_INPUT_2_VOLUME 0xA0B -#define MADERA_DSP4RMIX_INPUT_3_SOURCE 0xA0C -#define MADERA_DSP4RMIX_INPUT_3_VOLUME 0xA0D -#define MADERA_DSP4RMIX_INPUT_4_SOURCE 0xA0E -#define MADERA_DSP4RMIX_INPUT_4_VOLUME 0xA0F -#define MADERA_DSP4AUX1MIX_INPUT_1_SOURCE 0xA10 -#define MADERA_DSP4AUX2MIX_INPUT_1_SOURCE 0xA18 -#define MADERA_DSP4AUX3MIX_INPUT_1_SOURCE 0xA20 -#define MADERA_DSP4AUX4MIX_INPUT_1_SOURCE 0xA28 -#define MADERA_DSP4AUX5MIX_INPUT_1_SOURCE 0xA30 -#define MADERA_DSP4AUX6MIX_INPUT_1_SOURCE 0xA38 -#define MADERA_DSP5LMIX_INPUT_1_SOURCE 0xA40 -#define MADERA_DSP5LMIX_INPUT_1_VOLUME 0xA41 -#define MADERA_DSP5LMIX_INPUT_2_SOURCE 0xA42 -#define MADERA_DSP5LMIX_INPUT_2_VOLUME 0xA43 -#define MADERA_DSP5LMIX_INPUT_3_SOURCE 0xA44 -#define MADERA_DSP5LMIX_INPUT_3_VOLUME 0xA45 -#define MADERA_DSP5LMIX_INPUT_4_SOURCE 0xA46 -#define MADERA_DSP5LMIX_INPUT_4_VOLUME 0xA47 -#define MADERA_DSP5RMIX_INPUT_1_SOURCE 0xA48 -#define MADERA_DSP5RMIX_INPUT_1_VOLUME 0xA49 -#define MADERA_DSP5RMIX_INPUT_2_SOURCE 0xA4A -#define MADERA_DSP5RMIX_INPUT_2_VOLUME 0xA4B -#define MADERA_DSP5RMIX_INPUT_3_SOURCE 0xA4C -#define MADERA_DSP5RMIX_INPUT_3_VOLUME 0xA4D -#define MADERA_DSP5RMIX_INPUT_4_SOURCE 0xA4E -#define MADERA_DSP5RMIX_INPUT_4_VOLUME 0xA4F -#define MADERA_DSP5AUX1MIX_INPUT_1_SOURCE 0xA50 -#define MADERA_DSP5AUX2MIX_INPUT_1_SOURCE 0xA58 -#define MADERA_DSP5AUX3MIX_INPUT_1_SOURCE 0xA60 -#define MADERA_DSP5AUX4MIX_INPUT_1_SOURCE 0xA68 -#define MADERA_DSP5AUX5MIX_INPUT_1_SOURCE 0xA70 -#define MADERA_DSP5AUX6MIX_INPUT_1_SOURCE 0xA78 -#define MADERA_ASRC1_1LMIX_INPUT_1_SOURCE 0xA80 -#define MADERA_ASRC1_1RMIX_INPUT_1_SOURCE 0xA88 -#define MADERA_ASRC1_2LMIX_INPUT_1_SOURCE 0xA90 -#define MADERA_ASRC1_2RMIX_INPUT_1_SOURCE 0xA98 -#define MADERA_ASRC2_1LMIX_INPUT_1_SOURCE 0xAA0 -#define MADERA_ASRC2_1RMIX_INPUT_1_SOURCE 0xAA8 -#define MADERA_ASRC2_2LMIX_INPUT_1_SOURCE 0xAB0 -#define MADERA_ASRC2_2RMIX_INPUT_1_SOURCE 0xAB8 -#define MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE 0xB00 -#define MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE 0xB08 -#define MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE 0xB10 -#define MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE 0xB18 -#define MADERA_ISRC1INT1MIX_INPUT_1_SOURCE 0xB20 -#define MADERA_ISRC1INT2MIX_INPUT_1_SOURCE 0xB28 -#define MADERA_ISRC1INT3MIX_INPUT_1_SOURCE 0xB30 -#define MADERA_ISRC1INT4MIX_INPUT_1_SOURCE 0xB38 -#define MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE 0xB40 -#define MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE 0xB48 -#define MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE 0xB50 -#define MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE 0xB58 -#define MADERA_ISRC2INT1MIX_INPUT_1_SOURCE 0xB60 -#define MADERA_ISRC2INT2MIX_INPUT_1_SOURCE 0xB68 -#define MADERA_ISRC2INT3MIX_INPUT_1_SOURCE 0xB70 -#define MADERA_ISRC2INT4MIX_INPUT_1_SOURCE 0xB78 -#define MADERA_ISRC3DEC1MIX_INPUT_1_SOURCE 0xB80 -#define MADERA_ISRC3DEC2MIX_INPUT_1_SOURCE 0xB88 -#define MADERA_ISRC3DEC3MIX_INPUT_1_SOURCE 0xB90 -#define MADERA_ISRC3DEC4MIX_INPUT_1_SOURCE 0xB98 -#define MADERA_ISRC3INT1MIX_INPUT_1_SOURCE 0xBA0 -#define MADERA_ISRC3INT2MIX_INPUT_1_SOURCE 0xBA8 -#define MADERA_ISRC3INT3MIX_INPUT_1_SOURCE 0xBB0 -#define MADERA_ISRC3INT4MIX_INPUT_1_SOURCE 0xBB8 -#define MADERA_ISRC4DEC1MIX_INPUT_1_SOURCE 0xBC0 -#define MADERA_ISRC4DEC2MIX_INPUT_1_SOURCE 0xBC8 -#define MADERA_ISRC4INT1MIX_INPUT_1_SOURCE 0xBE0 -#define MADERA_ISRC4INT2MIX_INPUT_1_SOURCE 0xBE8 -#define MADERA_DSP6LMIX_INPUT_1_SOURCE 0xC00 -#define MADERA_DSP6LMIX_INPUT_1_VOLUME 0xC01 -#define MADERA_DSP6LMIX_INPUT_2_SOURCE 0xC02 -#define MADERA_DSP6LMIX_INPUT_2_VOLUME 0xC03 -#define MADERA_DSP6LMIX_INPUT_3_SOURCE 0xC04 -#define MADERA_DSP6LMIX_INPUT_3_VOLUME 0xC05 -#define MADERA_DSP6LMIX_INPUT_4_SOURCE 0xC06 -#define MADERA_DSP6LMIX_INPUT_4_VOLUME 0xC07 -#define MADERA_DSP6RMIX_INPUT_1_SOURCE 0xC08 -#define MADERA_DSP6RMIX_INPUT_1_VOLUME 0xC09 -#define MADERA_DSP6RMIX_INPUT_2_SOURCE 0xC0A -#define MADERA_DSP6RMIX_INPUT_2_VOLUME 0xC0B -#define MADERA_DSP6RMIX_INPUT_3_SOURCE 0xC0C -#define MADERA_DSP6RMIX_INPUT_3_VOLUME 0xC0D -#define MADERA_DSP6RMIX_INPUT_4_SOURCE 0xC0E -#define MADERA_DSP6RMIX_INPUT_4_VOLUME 0xC0F -#define MADERA_DSP6AUX1MIX_INPUT_1_SOURCE 0xC10 -#define MADERA_DSP6AUX2MIX_INPUT_1_SOURCE 0xC18 -#define MADERA_DSP6AUX3MIX_INPUT_1_SOURCE 0xC20 -#define MADERA_DSP6AUX4MIX_INPUT_1_SOURCE 0xC28 -#define MADERA_DSP6AUX5MIX_INPUT_1_SOURCE 0xC30 -#define MADERA_DSP6AUX6MIX_INPUT_1_SOURCE 0xC38 -#define MADERA_DSP7LMIX_INPUT_1_SOURCE 0xC40 -#define MADERA_DSP7LMIX_INPUT_1_VOLUME 0xC41 -#define MADERA_DSP7LMIX_INPUT_2_SOURCE 0xC42 -#define MADERA_DSP7LMIX_INPUT_2_VOLUME 0xC43 -#define MADERA_DSP7LMIX_INPUT_3_SOURCE 0xC44 -#define MADERA_DSP7LMIX_INPUT_3_VOLUME 0xC45 -#define MADERA_DSP7LMIX_INPUT_4_SOURCE 0xC46 -#define MADERA_DSP7LMIX_INPUT_4_VOLUME 0xC47 -#define MADERA_DSP7RMIX_INPUT_1_SOURCE 0xC48 -#define MADERA_DSP7RMIX_INPUT_1_VOLUME 0xC49 -#define MADERA_DSP7RMIX_INPUT_2_SOURCE 0xC4A -#define MADERA_DSP7RMIX_INPUT_2_VOLUME 0xC4B -#define MADERA_DSP7RMIX_INPUT_3_SOURCE 0xC4C -#define MADERA_DSP7RMIX_INPUT_3_VOLUME 0xC4D -#define MADERA_DSP7RMIX_INPUT_4_SOURCE 0xC4E -#define MADERA_DSP7RMIX_INPUT_4_VOLUME 0xC4F -#define MADERA_DSP7AUX1MIX_INPUT_1_SOURCE 0xC50 -#define MADERA_DSP7AUX2MIX_INPUT_1_SOURCE 0xC58 -#define MADERA_DSP7AUX3MIX_INPUT_1_SOURCE 0xC60 -#define MADERA_DSP7AUX4MIX_INPUT_1_SOURCE 0xC68 -#define MADERA_DSP7AUX5MIX_INPUT_1_SOURCE 0xC70 -#define MADERA_DSP7AUX6MIX_INPUT_1_SOURCE 0xC78 -#define MADERA_DFC1MIX_INPUT_1_SOURCE 0xDC0 -#define MADERA_DFC2MIX_INPUT_1_SOURCE 0xDC8 -#define MADERA_DFC3MIX_INPUT_1_SOURCE 0xDD0 -#define MADERA_DFC4MIX_INPUT_1_SOURCE 0xDD8 -#define MADERA_DFC5MIX_INPUT_1_SOURCE 0xDE0 -#define MADERA_DFC6MIX_INPUT_1_SOURCE 0xDE8 -#define MADERA_DFC7MIX_INPUT_1_SOURCE 0xDF0 -#define MADERA_DFC8MIX_INPUT_1_SOURCE 0xDF8 -#define MADERA_FX_CTRL1 0xE00 -#define MADERA_FX_CTRL2 0xE01 -#define MADERA_EQ1_1 0xE10 -#define MADERA_EQ1_2 0xE11 -#define MADERA_EQ1_3 0xE12 -#define MADERA_EQ1_4 0xE13 -#define MADERA_EQ1_5 0xE14 -#define MADERA_EQ1_6 0xE15 -#define MADERA_EQ1_7 0xE16 -#define MADERA_EQ1_8 0xE17 -#define MADERA_EQ1_9 0xE18 -#define MADERA_EQ1_10 0xE19 -#define MADERA_EQ1_11 0xE1A -#define MADERA_EQ1_12 0xE1B -#define MADERA_EQ1_13 0xE1C -#define MADERA_EQ1_14 0xE1D -#define MADERA_EQ1_15 0xE1E -#define MADERA_EQ1_16 0xE1F -#define MADERA_EQ1_17 0xE20 -#define MADERA_EQ1_18 0xE21 -#define MADERA_EQ1_19 0xE22 -#define MADERA_EQ1_20 0xE23 -#define MADERA_EQ1_21 0xE24 -#define MADERA_EQ2_1 0xE26 -#define MADERA_EQ2_2 0xE27 -#define MADERA_EQ2_3 0xE28 -#define MADERA_EQ2_4 0xE29 -#define MADERA_EQ2_5 0xE2A -#define MADERA_EQ2_6 0xE2B -#define MADERA_EQ2_7 0xE2C -#define MADERA_EQ2_8 0xE2D -#define MADERA_EQ2_9 0xE2E -#define MADERA_EQ2_10 0xE2F -#define MADERA_EQ2_11 0xE30 -#define MADERA_EQ2_12 0xE31 -#define MADERA_EQ2_13 0xE32 -#define MADERA_EQ2_14 0xE33 -#define MADERA_EQ2_15 0xE34 -#define MADERA_EQ2_16 0xE35 -#define MADERA_EQ2_17 0xE36 -#define MADERA_EQ2_18 0xE37 -#define MADERA_EQ2_19 0xE38 -#define MADERA_EQ2_20 0xE39 -#define MADERA_EQ2_21 0xE3A -#define MADERA_EQ3_1 0xE3C -#define MADERA_EQ3_2 0xE3D -#define MADERA_EQ3_3 0xE3E -#define MADERA_EQ3_4 0xE3F -#define MADERA_EQ3_5 0xE40 -#define MADERA_EQ3_6 0xE41 -#define MADERA_EQ3_7 0xE42 -#define MADERA_EQ3_8 0xE43 -#define MADERA_EQ3_9 0xE44 -#define MADERA_EQ3_10 0xE45 -#define MADERA_EQ3_11 0xE46 -#define MADERA_EQ3_12 0xE47 -#define MADERA_EQ3_13 0xE48 -#define MADERA_EQ3_14 0xE49 -#define MADERA_EQ3_15 0xE4A -#define MADERA_EQ3_16 0xE4B -#define MADERA_EQ3_17 0xE4C -#define MADERA_EQ3_18 0xE4D -#define MADERA_EQ3_19 0xE4E -#define MADERA_EQ3_20 0xE4F -#define MADERA_EQ3_21 0xE50 -#define MADERA_EQ4_1 0xE52 -#define MADERA_EQ4_2 0xE53 -#define MADERA_EQ4_3 0xE54 -#define MADERA_EQ4_4 0xE55 -#define MADERA_EQ4_5 0xE56 -#define MADERA_EQ4_6 0xE57 -#define MADERA_EQ4_7 0xE58 -#define MADERA_EQ4_8 0xE59 -#define MADERA_EQ4_9 0xE5A -#define MADERA_EQ4_10 0xE5B -#define MADERA_EQ4_11 0xE5C -#define MADERA_EQ4_12 0xE5D -#define MADERA_EQ4_13 0xE5E -#define MADERA_EQ4_14 0xE5F -#define MADERA_EQ4_15 0xE60 -#define MADERA_EQ4_16 0xE61 -#define MADERA_EQ4_17 0xE62 -#define MADERA_EQ4_18 0xE63 -#define MADERA_EQ4_19 0xE64 -#define MADERA_EQ4_20 0xE65 -#define MADERA_EQ4_21 0xE66 -#define MADERA_DRC1_CTRL1 0xE80 -#define MADERA_DRC1_CTRL2 0xE81 -#define MADERA_DRC1_CTRL3 0xE82 -#define MADERA_DRC1_CTRL4 0xE83 -#define MADERA_DRC1_CTRL5 0xE84 -#define MADERA_DRC2_CTRL1 0xE88 -#define MADERA_DRC2_CTRL2 0xE89 -#define MADERA_DRC2_CTRL3 0xE8A -#define MADERA_DRC2_CTRL4 0xE8B -#define MADERA_DRC2_CTRL5 0xE8C -#define MADERA_HPLPF1_1 0xEC0 -#define MADERA_HPLPF1_2 0xEC1 -#define MADERA_HPLPF2_1 0xEC4 -#define MADERA_HPLPF2_2 0xEC5 -#define MADERA_HPLPF3_1 0xEC8 -#define MADERA_HPLPF3_2 0xEC9 -#define MADERA_HPLPF4_1 0xECC -#define MADERA_HPLPF4_2 0xECD -#define MADERA_ASRC2_ENABLE 0xED0 -#define MADERA_ASRC2_STATUS 0xED1 -#define MADERA_ASRC2_RATE1 0xED2 -#define MADERA_ASRC2_RATE2 0xED3 -#define MADERA_ASRC1_ENABLE 0xEE0 -#define MADERA_ASRC1_STATUS 0xEE1 -#define MADERA_ASRC1_RATE1 0xEE2 -#define MADERA_ASRC1_RATE2 0xEE3 -#define MADERA_ISRC_1_CTRL_1 0xEF0 -#define MADERA_ISRC_1_CTRL_2 0xEF1 -#define MADERA_ISRC_1_CTRL_3 0xEF2 -#define MADERA_ISRC_2_CTRL_1 0xEF3 -#define MADERA_ISRC_2_CTRL_2 0xEF4 -#define MADERA_ISRC_2_CTRL_3 0xEF5 -#define MADERA_ISRC_3_CTRL_1 0xEF6 -#define MADERA_ISRC_3_CTRL_2 0xEF7 -#define MADERA_ISRC_3_CTRL_3 0xEF8 -#define MADERA_ISRC_4_CTRL_1 0xEF9 -#define MADERA_ISRC_4_CTRL_2 0xEFA -#define MADERA_ISRC_4_CTRL_3 0xEFB -#define MADERA_CLOCK_CONTROL 0xF00 -#define MADERA_ANC_SRC 0xF01 -#define MADERA_DSP_STATUS 0xF02 -#define MADERA_ANC_COEFF_START 0xF08 -#define MADERA_ANC_COEFF_END 0xF12 -#define MADERA_FCL_FILTER_CONTROL 0xF15 -#define MADERA_FCL_ADC_REFORMATTER_CONTROL 0xF17 -#define MADERA_FCL_COEFF_START 0xF18 -#define MADERA_FCL_COEFF_END 0xF69 -#define MADERA_FCR_FILTER_CONTROL 0xF71 -#define MADERA_FCR_ADC_REFORMATTER_CONTROL 0xF73 -#define MADERA_FCR_COEFF_START 0xF74 -#define MADERA_FCR_COEFF_END 0xFC5 -#define MADERA_DAC_COMP_1 0x1300 -#define MADERA_DAC_COMP_2 0x1302 -#define MADERA_FRF_COEFFICIENT_1L_1 0x1380 -#define MADERA_FRF_COEFFICIENT_1L_2 0x1381 -#define MADERA_FRF_COEFFICIENT_1L_3 0x1382 -#define MADERA_FRF_COEFFICIENT_1L_4 0x1383 -#define MADERA_FRF_COEFFICIENT_1R_1 0x1390 -#define MADERA_FRF_COEFFICIENT_1R_2 0x1391 -#define MADERA_FRF_COEFFICIENT_1R_3 0x1392 -#define MADERA_FRF_COEFFICIENT_1R_4 0x1393 -#define MADERA_FRF_COEFFICIENT_2L_1 0x13A0 -#define MADERA_FRF_COEFFICIENT_2L_2 0x13A1 -#define MADERA_FRF_COEFFICIENT_2L_3 0x13A2 -#define MADERA_FRF_COEFFICIENT_2L_4 0x13A3 -#define MADERA_FRF_COEFFICIENT_2R_1 0x13B0 -#define MADERA_FRF_COEFFICIENT_2R_2 0x13B1 -#define MADERA_FRF_COEFFICIENT_2R_3 0x13B2 -#define MADERA_FRF_COEFFICIENT_2R_4 0x13B3 -#define MADERA_FRF_COEFFICIENT_3L_1 0x13C0 -#define MADERA_FRF_COEFFICIENT_3L_2 0x13C1 -#define MADERA_FRF_COEFFICIENT_3L_3 0x13C2 -#define MADERA_FRF_COEFFICIENT_3L_4 0x13C3 -#define MADERA_FRF_COEFFICIENT_3R_1 0x13D0 -#define MADERA_FRF_COEFFICIENT_3R_2 0x13D1 -#define MADERA_FRF_COEFFICIENT_3R_3 0x13D2 -#define MADERA_FRF_COEFFICIENT_3R_4 0x13D3 -#define MADERA_FRF_COEFFICIENT_4L_1 0x13E0 -#define MADERA_FRF_COEFFICIENT_4L_2 0x13E1 -#define MADERA_FRF_COEFFICIENT_4L_3 0x13E2 -#define MADERA_FRF_COEFFICIENT_4L_4 0x13E3 -#define MADERA_FRF_COEFFICIENT_4R_1 0x13F0 -#define MADERA_FRF_COEFFICIENT_4R_2 0x13F1 -#define MADERA_FRF_COEFFICIENT_4R_3 0x13F2 -#define MADERA_FRF_COEFFICIENT_4R_4 0x13F3 -#define CS47L35_FRF_COEFFICIENT_4L_1 0x13A0 -#define CS47L35_FRF_COEFFICIENT_4L_2 0x13A1 -#define CS47L35_FRF_COEFFICIENT_4L_3 0x13A2 -#define CS47L35_FRF_COEFFICIENT_4L_4 0x13A3 -#define CS47L35_FRF_COEFFICIENT_5L_1 0x13B0 -#define CS47L35_FRF_COEFFICIENT_5L_2 0x13B1 -#define CS47L35_FRF_COEFFICIENT_5L_3 0x13B2 -#define CS47L35_FRF_COEFFICIENT_5L_4 0x13B3 -#define CS47L35_FRF_COEFFICIENT_5R_1 0x13C0 -#define CS47L35_FRF_COEFFICIENT_5R_2 0x13C1 -#define CS47L35_FRF_COEFFICIENT_5R_3 0x13C2 -#define CS47L35_FRF_COEFFICIENT_5R_4 0x13C3 -#define MADERA_FRF_COEFFICIENT_5L_1 0x1400 -#define MADERA_FRF_COEFFICIENT_5L_2 0x1401 -#define MADERA_FRF_COEFFICIENT_5L_3 0x1402 -#define MADERA_FRF_COEFFICIENT_5L_4 0x1403 -#define MADERA_FRF_COEFFICIENT_5R_1 0x1410 -#define MADERA_FRF_COEFFICIENT_5R_2 0x1411 -#define MADERA_FRF_COEFFICIENT_5R_3 0x1412 -#define MADERA_FRF_COEFFICIENT_5R_4 0x1413 -#define MADERA_FRF_COEFFICIENT_6L_1 0x1420 -#define MADERA_FRF_COEFFICIENT_6L_2 0x1421 -#define MADERA_FRF_COEFFICIENT_6L_3 0x1422 -#define MADERA_FRF_COEFFICIENT_6L_4 0x1423 -#define MADERA_FRF_COEFFICIENT_6R_1 0x1430 -#define MADERA_FRF_COEFFICIENT_6R_2 0x1431 -#define MADERA_FRF_COEFFICIENT_6R_3 0x1432 -#define MADERA_FRF_COEFFICIENT_6R_4 0x1433 -#define MADERA_DFC1_CTRL 0x1480 -#define MADERA_DFC1_RX 0x1482 -#define MADERA_DFC1_TX 0x1484 -#define MADERA_DFC2_CTRL 0x1486 -#define MADERA_DFC2_RX 0x1488 -#define MADERA_DFC2_TX 0x148A -#define MADERA_DFC3_CTRL 0x148C -#define MADERA_DFC3_RX 0x148E -#define MADERA_DFC3_TX 0x1490 -#define MADERA_DFC4_CTRL 0x1492 -#define MADERA_DFC4_RX 0x1494 -#define MADERA_DFC4_TX 0x1496 -#define MADERA_DFC5_CTRL 0x1498 -#define MADERA_DFC5_RX 0x149A -#define MADERA_DFC5_TX 0x149C -#define MADERA_DFC6_CTRL 0x149E -#define MADERA_DFC6_RX 0x14A0 -#define MADERA_DFC6_TX 0x14A2 -#define MADERA_DFC7_CTRL 0x14A4 -#define MADERA_DFC7_RX 0x14A6 -#define MADERA_DFC7_TX 0x14A8 -#define MADERA_DFC8_CTRL 0x14AA -#define MADERA_DFC8_RX 0x14AC -#define MADERA_DFC8_TX 0x14AE -#define MADERA_DFC_STATUS 0x14B6 -#define MADERA_ADSP2_IRQ0 0x1600 -#define MADERA_ADSP2_IRQ1 0x1601 -#define MADERA_ADSP2_IRQ2 0x1602 -#define MADERA_ADSP2_IRQ3 0x1603 -#define MADERA_ADSP2_IRQ4 0x1604 -#define MADERA_ADSP2_IRQ5 0x1605 -#define MADERA_ADSP2_IRQ6 0x1606 -#define MADERA_ADSP2_IRQ7 0x1607 -#define MADERA_GPIO1_CTRL_1 0x1700 -#define MADERA_GPIO1_CTRL_2 0x1701 -#define MADERA_GPIO2_CTRL_1 0x1702 -#define MADERA_GPIO2_CTRL_2 0x1703 -#define MADERA_GPIO3_CTRL_1 0x1704 -#define MADERA_GPIO3_CTRL_2 0x1705 -#define MADERA_GPIO4_CTRL_1 0x1706 -#define MADERA_GPIO4_CTRL_2 0x1707 -#define MADERA_GPIO5_CTRL_1 0x1708 -#define MADERA_GPIO5_CTRL_2 0x1709 -#define MADERA_GPIO6_CTRL_1 0x170A -#define MADERA_GPIO6_CTRL_2 0x170B -#define MADERA_GPIO7_CTRL_1 0x170C -#define MADERA_GPIO7_CTRL_2 0x170D -#define MADERA_GPIO8_CTRL_1 0x170E -#define MADERA_GPIO8_CTRL_2 0x170F -#define MADERA_GPIO9_CTRL_1 0x1710 -#define MADERA_GPIO9_CTRL_2 0x1711 -#define MADERA_GPIO10_CTRL_1 0x1712 -#define MADERA_GPIO10_CTRL_2 0x1713 -#define MADERA_GPIO11_CTRL_1 0x1714 -#define MADERA_GPIO11_CTRL_2 0x1715 -#define MADERA_GPIO12_CTRL_1 0x1716 -#define MADERA_GPIO12_CTRL_2 0x1717 -#define MADERA_GPIO13_CTRL_1 0x1718 -#define MADERA_GPIO13_CTRL_2 0x1719 -#define MADERA_GPIO14_CTRL_1 0x171A -#define MADERA_GPIO14_CTRL_2 0x171B -#define MADERA_GPIO15_CTRL_1 0x171C -#define MADERA_GPIO15_CTRL_2 0x171D -#define MADERA_GPIO16_CTRL_1 0x171E -#define MADERA_GPIO16_CTRL_2 0x171F -#define MADERA_GPIO17_CTRL_1 0x1720 -#define MADERA_GPIO17_CTRL_2 0x1721 -#define MADERA_GPIO18_CTRL_1 0x1722 -#define MADERA_GPIO18_CTRL_2 0x1723 -#define MADERA_GPIO19_CTRL_1 0x1724 -#define MADERA_GPIO19_CTRL_2 0x1725 -#define MADERA_GPIO20_CTRL_1 0x1726 -#define MADERA_GPIO20_CTRL_2 0x1727 -#define MADERA_GPIO21_CTRL_1 0x1728 -#define MADERA_GPIO21_CTRL_2 0x1729 -#define MADERA_GPIO22_CTRL_1 0x172A -#define MADERA_GPIO22_CTRL_2 0x172B -#define MADERA_GPIO23_CTRL_1 0x172C -#define MADERA_GPIO23_CTRL_2 0x172D -#define MADERA_GPIO24_CTRL_1 0x172E -#define MADERA_GPIO24_CTRL_2 0x172F -#define MADERA_GPIO25_CTRL_1 0x1730 -#define MADERA_GPIO25_CTRL_2 0x1731 -#define MADERA_GPIO26_CTRL_1 0x1732 -#define MADERA_GPIO26_CTRL_2 0x1733 -#define MADERA_GPIO27_CTRL_1 0x1734 -#define MADERA_GPIO27_CTRL_2 0x1735 -#define MADERA_GPIO28_CTRL_1 0x1736 -#define MADERA_GPIO28_CTRL_2 0x1737 -#define MADERA_GPIO29_CTRL_1 0x1738 -#define MADERA_GPIO29_CTRL_2 0x1739 -#define MADERA_GPIO30_CTRL_1 0x173A -#define MADERA_GPIO30_CTRL_2 0x173B -#define MADERA_GPIO31_CTRL_1 0x173C -#define MADERA_GPIO31_CTRL_2 0x173D -#define MADERA_GPIO32_CTRL_1 0x173E -#define MADERA_GPIO32_CTRL_2 0x173F -#define MADERA_GPIO33_CTRL_1 0x1740 -#define MADERA_GPIO33_CTRL_2 0x1741 -#define MADERA_GPIO34_CTRL_1 0x1742 -#define MADERA_GPIO34_CTRL_2 0x1743 -#define MADERA_GPIO35_CTRL_1 0x1744 -#define MADERA_GPIO35_CTRL_2 0x1745 -#define MADERA_GPIO36_CTRL_1 0x1746 -#define MADERA_GPIO36_CTRL_2 0x1747 -#define MADERA_GPIO37_CTRL_1 0x1748 -#define MADERA_GPIO37_CTRL_2 0x1749 -#define MADERA_GPIO38_CTRL_1 0x174A -#define MADERA_GPIO38_CTRL_2 0x174B -#define MADERA_GPIO39_CTRL_1 0x174C -#define MADERA_GPIO39_CTRL_2 0x174D -#define MADERA_GPIO40_CTRL_1 0x174E -#define MADERA_GPIO40_CTRL_2 0x174F -#define MADERA_IRQ1_STATUS_1 0x1800 -#define MADERA_IRQ1_STATUS_2 0x1801 -#define MADERA_IRQ1_STATUS_3 0x1802 -#define MADERA_IRQ1_STATUS_4 0x1803 -#define MADERA_IRQ1_STATUS_5 0x1804 -#define MADERA_IRQ1_STATUS_6 0x1805 -#define MADERA_IRQ1_STATUS_7 0x1806 -#define MADERA_IRQ1_STATUS_8 0x1807 -#define MADERA_IRQ1_STATUS_9 0x1808 -#define MADERA_IRQ1_STATUS_10 0x1809 -#define MADERA_IRQ1_STATUS_11 0x180A -#define MADERA_IRQ1_STATUS_12 0x180B -#define MADERA_IRQ1_STATUS_13 0x180C -#define MADERA_IRQ1_STATUS_14 0x180D -#define MADERA_IRQ1_STATUS_15 0x180E -#define MADERA_IRQ1_STATUS_16 0x180F -#define MADERA_IRQ1_STATUS_17 0x1810 -#define MADERA_IRQ1_STATUS_18 0x1811 -#define MADERA_IRQ1_STATUS_19 0x1812 -#define MADERA_IRQ1_STATUS_20 0x1813 -#define MADERA_IRQ1_STATUS_21 0x1814 -#define MADERA_IRQ1_STATUS_22 0x1815 -#define MADERA_IRQ1_STATUS_23 0x1816 -#define MADERA_IRQ1_STATUS_24 0x1817 -#define MADERA_IRQ1_STATUS_25 0x1818 -#define MADERA_IRQ1_STATUS_26 0x1819 -#define MADERA_IRQ1_STATUS_27 0x181A -#define MADERA_IRQ1_STATUS_28 0x181B -#define MADERA_IRQ1_STATUS_29 0x181C -#define MADERA_IRQ1_STATUS_30 0x181D -#define MADERA_IRQ1_STATUS_31 0x181E -#define MADERA_IRQ1_STATUS_32 0x181F -#define MADERA_IRQ1_STATUS_33 0x1820 -#define MADERA_IRQ1_MASK_1 0x1840 -#define MADERA_IRQ1_MASK_2 0x1841 -#define MADERA_IRQ1_MASK_3 0x1842 -#define MADERA_IRQ1_MASK_4 0x1843 -#define MADERA_IRQ1_MASK_5 0x1844 -#define MADERA_IRQ1_MASK_6 0x1845 -#define MADERA_IRQ1_MASK_7 0x1846 -#define MADERA_IRQ1_MASK_8 0x1847 -#define MADERA_IRQ1_MASK_9 0x1848 -#define MADERA_IRQ1_MASK_10 0x1849 -#define MADERA_IRQ1_MASK_11 0x184A -#define MADERA_IRQ1_MASK_12 0x184B -#define MADERA_IRQ1_MASK_13 0x184C -#define MADERA_IRQ1_MASK_14 0x184D -#define MADERA_IRQ1_MASK_15 0x184E -#define MADERA_IRQ1_MASK_16 0x184F -#define MADERA_IRQ1_MASK_17 0x1850 -#define MADERA_IRQ1_MASK_18 0x1851 -#define MADERA_IRQ1_MASK_19 0x1852 -#define MADERA_IRQ1_MASK_20 0x1853 -#define MADERA_IRQ1_MASK_21 0x1854 -#define MADERA_IRQ1_MASK_22 0x1855 -#define MADERA_IRQ1_MASK_23 0x1856 -#define MADERA_IRQ1_MASK_24 0x1857 -#define MADERA_IRQ1_MASK_25 0x1858 -#define MADERA_IRQ1_MASK_26 0x1859 -#define MADERA_IRQ1_MASK_27 0x185A -#define MADERA_IRQ1_MASK_28 0x185B -#define MADERA_IRQ1_MASK_29 0x185C -#define MADERA_IRQ1_MASK_30 0x185D -#define MADERA_IRQ1_MASK_31 0x185E -#define MADERA_IRQ1_MASK_32 0x185F -#define MADERA_IRQ1_MASK_33 0x1860 -#define MADERA_IRQ1_RAW_STATUS_1 0x1880 -#define MADERA_IRQ1_RAW_STATUS_2 0x1881 -#define MADERA_IRQ1_RAW_STATUS_3 0x1882 -#define MADERA_IRQ1_RAW_STATUS_4 0x1883 -#define MADERA_IRQ1_RAW_STATUS_5 0x1884 -#define MADERA_IRQ1_RAW_STATUS_6 0x1885 -#define MADERA_IRQ1_RAW_STATUS_7 0x1886 -#define MADERA_IRQ1_RAW_STATUS_8 0x1887 -#define MADERA_IRQ1_RAW_STATUS_9 0x1888 -#define MADERA_IRQ1_RAW_STATUS_10 0x1889 -#define MADERA_IRQ1_RAW_STATUS_11 0x188A -#define MADERA_IRQ1_RAW_STATUS_12 0x188B -#define MADERA_IRQ1_RAW_STATUS_13 0x188C -#define MADERA_IRQ1_RAW_STATUS_14 0x188D -#define MADERA_IRQ1_RAW_STATUS_15 0x188E -#define MADERA_IRQ1_RAW_STATUS_16 0x188F -#define MADERA_IRQ1_RAW_STATUS_17 0x1890 -#define MADERA_IRQ1_RAW_STATUS_18 0x1891 -#define MADERA_IRQ1_RAW_STATUS_19 0x1892 -#define MADERA_IRQ1_RAW_STATUS_20 0x1893 -#define MADERA_IRQ1_RAW_STATUS_21 0x1894 -#define MADERA_IRQ1_RAW_STATUS_22 0x1895 -#define MADERA_IRQ1_RAW_STATUS_23 0x1896 -#define MADERA_IRQ1_RAW_STATUS_24 0x1897 -#define MADERA_IRQ1_RAW_STATUS_25 0x1898 -#define MADERA_IRQ1_RAW_STATUS_26 0x1899 -#define MADERA_IRQ1_RAW_STATUS_27 0x189A -#define MADERA_IRQ1_RAW_STATUS_28 0x189D -#define MADERA_IRQ1_RAW_STATUS_29 0x189C -#define MADERA_IRQ1_RAW_STATUS_30 0x189D -#define MADERA_IRQ1_RAW_STATUS_31 0x189E -#define MADERA_IRQ1_RAW_STATUS_32 0x189F -#define MADERA_IRQ1_RAW_STATUS_33 0x18A0 -#define MADERA_IRQ2_STATUS_1 0x1900 -#define MADERA_IRQ2_STATUS_2 0x1901 -#define MADERA_IRQ2_STATUS_6 0x1905 -#define MADERA_IRQ2_STATUS_7 0x1906 -#define MADERA_IRQ2_STATUS_9 0x1908 -#define MADERA_IRQ2_STATUS_11 0x190A -#define MADERA_IRQ2_STATUS_12 0x190B -#define MADERA_IRQ2_STATUS_13 0x190C -#define MADERA_IRQ2_STATUS_14 0x190D -#define MADERA_IRQ2_STATUS_15 0x190E -#define MADERA_IRQ2_STATUS_17 0x1910 -#define MADERA_IRQ2_STATUS_18 0x1911 -#define MADERA_IRQ2_STATUS_19 0x1912 -#define MADERA_IRQ2_STATUS_21 0x1914 -#define MADERA_IRQ2_STATUS_22 0x1915 -#define MADERA_IRQ2_STATUS_23 0x1916 -#define MADERA_IRQ2_STATUS_24 0x1917 -#define MADERA_IRQ2_STATUS_25 0x1918 -#define MADERA_IRQ2_STATUS_27 0x191A -#define MADERA_IRQ2_STATUS_28 0x191B -#define MADERA_IRQ2_STATUS_30 0x191D -#define MADERA_IRQ2_STATUS_31 0x191E -#define MADERA_IRQ2_STATUS_32 0x191F -#define MADERA_IRQ2_STATUS_33 0x1920 -#define MADERA_IRQ2_MASK_1 0x1940 -#define MADERA_IRQ2_MASK_2 0x1941 -#define MADERA_IRQ2_MASK_6 0x1945 -#define MADERA_IRQ2_MASK_7 0x1946 -#define MADERA_IRQ2_MASK_9 0x1948 -#define MADERA_IRQ2_MASK_11 0x194A -#define MADERA_IRQ2_MASK_12 0x194B -#define MADERA_IRQ2_MASK_13 0x194C -#define MADERA_IRQ2_MASK_14 0x194D -#define MADERA_IRQ2_MASK_15 0x194E -#define MADERA_IRQ2_MASK_17 0x1950 -#define MADERA_IRQ2_MASK_18 0x1951 -#define MADERA_IRQ2_MASK_19 0x1952 -#define MADERA_IRQ2_MASK_21 0x1954 -#define MADERA_IRQ2_MASK_22 0x1955 -#define MADERA_IRQ2_MASK_23 0x1956 -#define MADERA_IRQ2_MASK_24 0x1957 -#define MADERA_IRQ2_MASK_25 0x1958 -#define MADERA_IRQ2_MASK_27 0x195A -#define MADERA_IRQ2_MASK_28 0x195B -#define MADERA_IRQ2_MASK_30 0x195D -#define MADERA_IRQ2_MASK_31 0x195E -#define MADERA_IRQ2_MASK_32 0x195F -#define MADERA_IRQ2_MASK_33 0x1960 -#define MADERA_IRQ2_RAW_STATUS_1 0x1980 -#define MADERA_IRQ2_RAW_STATUS_2 0x1981 -#define MADERA_IRQ2_RAW_STATUS_6 0x1985 -#define MADERA_IRQ2_RAW_STATUS_7 0x1986 -#define MADERA_IRQ2_RAW_STATUS_9 0x1988 -#define MADERA_IRQ2_RAW_STATUS_10 0x1989 -#define MADERA_IRQ2_RAW_STATUS_11 0x198A -#define MADERA_IRQ2_RAW_STATUS_12 0x198B -#define MADERA_IRQ2_RAW_STATUS_13 0x198C -#define MADERA_IRQ2_RAW_STATUS_14 0x198D -#define MADERA_IRQ2_RAW_STATUS_15 0x198E -#define MADERA_IRQ2_RAW_STATUS_17 0x1990 -#define MADERA_IRQ2_RAW_STATUS_18 0x1991 -#define MADERA_IRQ2_RAW_STATUS_19 0x1992 -#define MADERA_IRQ2_RAW_STATUS_21 0x1994 -#define MADERA_IRQ2_RAW_STATUS_22 0x1995 -#define MADERA_IRQ2_RAW_STATUS_23 0x1996 -#define MADERA_IRQ2_RAW_STATUS_24 0x1997 -#define MADERA_IRQ2_RAW_STATUS_25 0x1998 -#define MADERA_IRQ2_RAW_STATUS_30 0x199D -#define MADERA_IRQ2_RAW_STATUS_31 0x199E -#define MADERA_IRQ2_RAW_STATUS_32 0x199F -#define MADERA_IRQ2_RAW_STATUS_33 0x19A0 -#define MADERA_INTERRUPT_DEBOUNCE_7 0x1A06 -#define MADERA_INTERRUPT_DEBOUNCE_15 0x1A0E -#define MADERA_IRQ1_CTRL 0x1A80 -#define MADERA_IRQ2_CTRL 0x1A82 -#define MADERA_INTERRUPT_RAW_STATUS_1 0x1AA0 -#define MADERA_WSEQ_SEQUENCE_1 0x3000 -#define MADERA_WSEQ_SEQUENCE_2 0x3002 -#define MADERA_WSEQ_SEQUENCE_3 0x3004 -#define MADERA_WSEQ_SEQUENCE_4 0x3006 -#define MADERA_WSEQ_SEQUENCE_5 0x3008 -#define MADERA_WSEQ_SEQUENCE_6 0x300A -#define MADERA_WSEQ_SEQUENCE_7 0x300C -#define MADERA_WSEQ_SEQUENCE_8 0x300E -#define MADERA_WSEQ_SEQUENCE_9 0x3010 -#define MADERA_WSEQ_SEQUENCE_10 0x3012 -#define MADERA_WSEQ_SEQUENCE_11 0x3014 -#define MADERA_WSEQ_SEQUENCE_12 0x3016 -#define MADERA_WSEQ_SEQUENCE_13 0x3018 -#define MADERA_WSEQ_SEQUENCE_14 0x301A -#define MADERA_WSEQ_SEQUENCE_15 0x301C -#define MADERA_WSEQ_SEQUENCE_16 0x301E -#define MADERA_WSEQ_SEQUENCE_17 0x3020 -#define MADERA_WSEQ_SEQUENCE_18 0x3022 -#define MADERA_WSEQ_SEQUENCE_19 0x3024 -#define MADERA_WSEQ_SEQUENCE_20 0x3026 -#define MADERA_WSEQ_SEQUENCE_21 0x3028 -#define MADERA_WSEQ_SEQUENCE_22 0x302A -#define MADERA_WSEQ_SEQUENCE_23 0x302C -#define MADERA_WSEQ_SEQUENCE_24 0x302E -#define MADERA_WSEQ_SEQUENCE_25 0x3030 -#define MADERA_WSEQ_SEQUENCE_26 0x3032 -#define MADERA_WSEQ_SEQUENCE_27 0x3034 -#define MADERA_WSEQ_SEQUENCE_28 0x3036 -#define MADERA_WSEQ_SEQUENCE_29 0x3038 -#define MADERA_WSEQ_SEQUENCE_30 0x303A -#define MADERA_WSEQ_SEQUENCE_31 0x303C -#define MADERA_WSEQ_SEQUENCE_32 0x303E -#define MADERA_WSEQ_SEQUENCE_33 0x3040 -#define MADERA_WSEQ_SEQUENCE_34 0x3042 -#define MADERA_WSEQ_SEQUENCE_35 0x3044 -#define MADERA_WSEQ_SEQUENCE_36 0x3046 -#define MADERA_WSEQ_SEQUENCE_37 0x3048 -#define MADERA_WSEQ_SEQUENCE_38 0x304A -#define MADERA_WSEQ_SEQUENCE_39 0x304C -#define MADERA_WSEQ_SEQUENCE_40 0x304E -#define MADERA_WSEQ_SEQUENCE_41 0x3050 -#define MADERA_WSEQ_SEQUENCE_42 0x3052 -#define MADERA_WSEQ_SEQUENCE_43 0x3054 -#define MADERA_WSEQ_SEQUENCE_44 0x3056 -#define MADERA_WSEQ_SEQUENCE_45 0x3058 -#define MADERA_WSEQ_SEQUENCE_46 0x305A -#define MADERA_WSEQ_SEQUENCE_47 0x305C -#define MADERA_WSEQ_SEQUENCE_48 0x305E -#define MADERA_WSEQ_SEQUENCE_49 0x3060 -#define MADERA_WSEQ_SEQUENCE_50 0x3062 -#define MADERA_WSEQ_SEQUENCE_51 0x3064 -#define MADERA_WSEQ_SEQUENCE_52 0x3066 -#define MADERA_WSEQ_SEQUENCE_53 0x3068 -#define MADERA_WSEQ_SEQUENCE_54 0x306A -#define MADERA_WSEQ_SEQUENCE_55 0x306C -#define MADERA_WSEQ_SEQUENCE_56 0x306E -#define MADERA_WSEQ_SEQUENCE_57 0x3070 -#define MADERA_WSEQ_SEQUENCE_58 0x3072 -#define MADERA_WSEQ_SEQUENCE_59 0x3074 -#define MADERA_WSEQ_SEQUENCE_60 0x3076 -#define MADERA_WSEQ_SEQUENCE_61 0x3078 -#define MADERA_WSEQ_SEQUENCE_62 0x307A -#define MADERA_WSEQ_SEQUENCE_63 0x307C -#define MADERA_WSEQ_SEQUENCE_64 0x307E -#define MADERA_WSEQ_SEQUENCE_65 0x3080 -#define MADERA_WSEQ_SEQUENCE_66 0x3082 -#define MADERA_WSEQ_SEQUENCE_67 0x3084 -#define MADERA_WSEQ_SEQUENCE_68 0x3086 -#define MADERA_WSEQ_SEQUENCE_69 0x3088 -#define MADERA_WSEQ_SEQUENCE_70 0x308A -#define MADERA_WSEQ_SEQUENCE_71 0x308C -#define MADERA_WSEQ_SEQUENCE_72 0x308E -#define MADERA_WSEQ_SEQUENCE_73 0x3090 -#define MADERA_WSEQ_SEQUENCE_74 0x3092 -#define MADERA_WSEQ_SEQUENCE_75 0x3094 -#define MADERA_WSEQ_SEQUENCE_76 0x3096 -#define MADERA_WSEQ_SEQUENCE_77 0x3098 -#define MADERA_WSEQ_SEQUENCE_78 0x309A -#define MADERA_WSEQ_SEQUENCE_79 0x309C -#define MADERA_WSEQ_SEQUENCE_80 0x309E -#define MADERA_WSEQ_SEQUENCE_81 0x30A0 -#define MADERA_WSEQ_SEQUENCE_82 0x30A2 -#define MADERA_WSEQ_SEQUENCE_83 0x30A4 -#define MADERA_WSEQ_SEQUENCE_84 0x30A6 -#define MADERA_WSEQ_SEQUENCE_85 0x30A8 -#define MADERA_WSEQ_SEQUENCE_86 0x30AA -#define MADERA_WSEQ_SEQUENCE_87 0x30AC -#define MADERA_WSEQ_SEQUENCE_88 0x30AE -#define MADERA_WSEQ_SEQUENCE_89 0x30B0 -#define MADERA_WSEQ_SEQUENCE_90 0x30B2 -#define MADERA_WSEQ_SEQUENCE_91 0x30B4 -#define MADERA_WSEQ_SEQUENCE_92 0x30B6 -#define MADERA_WSEQ_SEQUENCE_93 0x30B8 -#define MADERA_WSEQ_SEQUENCE_94 0x30BA -#define MADERA_WSEQ_SEQUENCE_95 0x30BC -#define MADERA_WSEQ_SEQUENCE_96 0x30BE -#define MADERA_WSEQ_SEQUENCE_97 0x30C0 -#define MADERA_WSEQ_SEQUENCE_98 0x30C2 -#define MADERA_WSEQ_SEQUENCE_99 0x30C4 -#define MADERA_WSEQ_SEQUENCE_100 0x30C6 -#define MADERA_WSEQ_SEQUENCE_101 0x30C8 -#define MADERA_WSEQ_SEQUENCE_102 0x30CA -#define MADERA_WSEQ_SEQUENCE_103 0x30CC -#define MADERA_WSEQ_SEQUENCE_104 0x30CE -#define MADERA_WSEQ_SEQUENCE_105 0x30D0 -#define MADERA_WSEQ_SEQUENCE_106 0x30D2 -#define MADERA_WSEQ_SEQUENCE_107 0x30D4 -#define MADERA_WSEQ_SEQUENCE_108 0x30D6 -#define MADERA_WSEQ_SEQUENCE_109 0x30D8 -#define MADERA_WSEQ_SEQUENCE_110 0x30DA -#define MADERA_WSEQ_SEQUENCE_111 0x30DC -#define MADERA_WSEQ_SEQUENCE_112 0x30DE -#define MADERA_WSEQ_SEQUENCE_113 0x30E0 -#define MADERA_WSEQ_SEQUENCE_114 0x30E2 -#define MADERA_WSEQ_SEQUENCE_115 0x30E4 -#define MADERA_WSEQ_SEQUENCE_116 0x30E6 -#define MADERA_WSEQ_SEQUENCE_117 0x30E8 -#define MADERA_WSEQ_SEQUENCE_118 0x30EA -#define MADERA_WSEQ_SEQUENCE_119 0x30EC -#define MADERA_WSEQ_SEQUENCE_120 0x30EE -#define MADERA_WSEQ_SEQUENCE_121 0x30F0 -#define MADERA_WSEQ_SEQUENCE_122 0x30F2 -#define MADERA_WSEQ_SEQUENCE_123 0x30F4 -#define MADERA_WSEQ_SEQUENCE_124 0x30F6 -#define MADERA_WSEQ_SEQUENCE_125 0x30F8 -#define MADERA_WSEQ_SEQUENCE_126 0x30FA -#define MADERA_WSEQ_SEQUENCE_127 0x30FC -#define MADERA_WSEQ_SEQUENCE_128 0x30FE -#define MADERA_WSEQ_SEQUENCE_129 0x3100 -#define MADERA_WSEQ_SEQUENCE_130 0x3102 -#define MADERA_WSEQ_SEQUENCE_131 0x3104 -#define MADERA_WSEQ_SEQUENCE_132 0x3106 -#define MADERA_WSEQ_SEQUENCE_133 0x3108 -#define MADERA_WSEQ_SEQUENCE_134 0x310A -#define MADERA_WSEQ_SEQUENCE_135 0x310C -#define MADERA_WSEQ_SEQUENCE_136 0x310E -#define MADERA_WSEQ_SEQUENCE_137 0x3110 -#define MADERA_WSEQ_SEQUENCE_138 0x3112 -#define MADERA_WSEQ_SEQUENCE_139 0x3114 -#define MADERA_WSEQ_SEQUENCE_140 0x3116 -#define MADERA_WSEQ_SEQUENCE_141 0x3118 -#define MADERA_WSEQ_SEQUENCE_142 0x311A -#define MADERA_WSEQ_SEQUENCE_143 0x311C -#define MADERA_WSEQ_SEQUENCE_144 0x311E -#define MADERA_WSEQ_SEQUENCE_145 0x3120 -#define MADERA_WSEQ_SEQUENCE_146 0x3122 -#define MADERA_WSEQ_SEQUENCE_147 0x3124 -#define MADERA_WSEQ_SEQUENCE_148 0x3126 -#define MADERA_WSEQ_SEQUENCE_149 0x3128 -#define MADERA_WSEQ_SEQUENCE_150 0x312A -#define MADERA_WSEQ_SEQUENCE_151 0x312C -#define MADERA_WSEQ_SEQUENCE_152 0x312E -#define MADERA_WSEQ_SEQUENCE_153 0x3130 -#define MADERA_WSEQ_SEQUENCE_154 0x3132 -#define MADERA_WSEQ_SEQUENCE_155 0x3134 -#define MADERA_WSEQ_SEQUENCE_156 0x3136 -#define MADERA_WSEQ_SEQUENCE_157 0x3138 -#define MADERA_WSEQ_SEQUENCE_158 0x313A -#define MADERA_WSEQ_SEQUENCE_159 0x313C -#define MADERA_WSEQ_SEQUENCE_160 0x313E -#define MADERA_WSEQ_SEQUENCE_161 0x3140 -#define MADERA_WSEQ_SEQUENCE_162 0x3142 -#define MADERA_WSEQ_SEQUENCE_163 0x3144 -#define MADERA_WSEQ_SEQUENCE_164 0x3146 -#define MADERA_WSEQ_SEQUENCE_165 0x3148 -#define MADERA_WSEQ_SEQUENCE_166 0x314A -#define MADERA_WSEQ_SEQUENCE_167 0x314C -#define MADERA_WSEQ_SEQUENCE_168 0x314E -#define MADERA_WSEQ_SEQUENCE_169 0x3150 -#define MADERA_WSEQ_SEQUENCE_170 0x3152 -#define MADERA_WSEQ_SEQUENCE_171 0x3154 -#define MADERA_WSEQ_SEQUENCE_172 0x3156 -#define MADERA_WSEQ_SEQUENCE_173 0x3158 -#define MADERA_WSEQ_SEQUENCE_174 0x315A -#define MADERA_WSEQ_SEQUENCE_175 0x315C -#define MADERA_WSEQ_SEQUENCE_176 0x315E -#define MADERA_WSEQ_SEQUENCE_177 0x3160 -#define MADERA_WSEQ_SEQUENCE_178 0x3162 -#define MADERA_WSEQ_SEQUENCE_179 0x3164 -#define MADERA_WSEQ_SEQUENCE_180 0x3166 -#define MADERA_WSEQ_SEQUENCE_181 0x3168 -#define MADERA_WSEQ_SEQUENCE_182 0x316A -#define MADERA_WSEQ_SEQUENCE_183 0x316C -#define MADERA_WSEQ_SEQUENCE_184 0x316E -#define MADERA_WSEQ_SEQUENCE_185 0x3170 -#define MADERA_WSEQ_SEQUENCE_186 0x3172 -#define MADERA_WSEQ_SEQUENCE_187 0x3174 -#define MADERA_WSEQ_SEQUENCE_188 0x3176 -#define MADERA_WSEQ_SEQUENCE_189 0x3178 -#define MADERA_WSEQ_SEQUENCE_190 0x317A -#define MADERA_WSEQ_SEQUENCE_191 0x317C -#define MADERA_WSEQ_SEQUENCE_192 0x317E -#define MADERA_WSEQ_SEQUENCE_193 0x3180 -#define MADERA_WSEQ_SEQUENCE_194 0x3182 -#define MADERA_WSEQ_SEQUENCE_195 0x3184 -#define MADERA_WSEQ_SEQUENCE_196 0x3186 -#define MADERA_WSEQ_SEQUENCE_197 0x3188 -#define MADERA_WSEQ_SEQUENCE_198 0x318A -#define MADERA_WSEQ_SEQUENCE_199 0x318C -#define MADERA_WSEQ_SEQUENCE_200 0x318E -#define MADERA_WSEQ_SEQUENCE_201 0x3190 -#define MADERA_WSEQ_SEQUENCE_202 0x3192 -#define MADERA_WSEQ_SEQUENCE_203 0x3194 -#define MADERA_WSEQ_SEQUENCE_204 0x3196 -#define MADERA_WSEQ_SEQUENCE_205 0x3198 -#define MADERA_WSEQ_SEQUENCE_206 0x319A -#define MADERA_WSEQ_SEQUENCE_207 0x319C -#define MADERA_WSEQ_SEQUENCE_208 0x319E -#define MADERA_WSEQ_SEQUENCE_209 0x31A0 -#define MADERA_WSEQ_SEQUENCE_210 0x31A2 -#define MADERA_WSEQ_SEQUENCE_211 0x31A4 -#define MADERA_WSEQ_SEQUENCE_212 0x31A6 -#define MADERA_WSEQ_SEQUENCE_213 0x31A8 -#define MADERA_WSEQ_SEQUENCE_214 0x31AA -#define MADERA_WSEQ_SEQUENCE_215 0x31AC -#define MADERA_WSEQ_SEQUENCE_216 0x31AE -#define MADERA_WSEQ_SEQUENCE_217 0x31B0 -#define MADERA_WSEQ_SEQUENCE_218 0x31B2 -#define MADERA_WSEQ_SEQUENCE_219 0x31B4 -#define MADERA_WSEQ_SEQUENCE_220 0x31B6 -#define MADERA_WSEQ_SEQUENCE_221 0x31B8 -#define MADERA_WSEQ_SEQUENCE_222 0x31BA -#define MADERA_WSEQ_SEQUENCE_223 0x31BC -#define MADERA_WSEQ_SEQUENCE_224 0x31BE -#define MADERA_WSEQ_SEQUENCE_225 0x31C0 -#define MADERA_WSEQ_SEQUENCE_226 0x31C2 -#define MADERA_WSEQ_SEQUENCE_227 0x31C4 -#define MADERA_WSEQ_SEQUENCE_228 0x31C6 -#define MADERA_WSEQ_SEQUENCE_229 0x31C8 -#define MADERA_WSEQ_SEQUENCE_230 0x31CA -#define MADERA_WSEQ_SEQUENCE_231 0x31CC -#define MADERA_WSEQ_SEQUENCE_232 0x31CE -#define MADERA_WSEQ_SEQUENCE_233 0x31D0 -#define MADERA_WSEQ_SEQUENCE_234 0x31D2 -#define MADERA_WSEQ_SEQUENCE_235 0x31D4 -#define MADERA_WSEQ_SEQUENCE_236 0x31D6 -#define MADERA_WSEQ_SEQUENCE_237 0x31D8 -#define MADERA_WSEQ_SEQUENCE_238 0x31DA -#define MADERA_WSEQ_SEQUENCE_239 0x31DC -#define MADERA_WSEQ_SEQUENCE_240 0x31DE -#define MADERA_WSEQ_SEQUENCE_241 0x31E0 -#define MADERA_WSEQ_SEQUENCE_242 0x31E2 -#define MADERA_WSEQ_SEQUENCE_243 0x31E4 -#define MADERA_WSEQ_SEQUENCE_244 0x31E6 -#define MADERA_WSEQ_SEQUENCE_245 0x31E8 -#define MADERA_WSEQ_SEQUENCE_246 0x31EA -#define MADERA_WSEQ_SEQUENCE_247 0x31EC -#define MADERA_WSEQ_SEQUENCE_248 0x31EE -#define MADERA_WSEQ_SEQUENCE_249 0x31F0 -#define MADERA_WSEQ_SEQUENCE_250 0x31F2 -#define MADERA_WSEQ_SEQUENCE_251 0x31F4 -#define MADERA_WSEQ_SEQUENCE_252 0x31F6 -#define MADERA_WSEQ_SEQUENCE_253 0x31F8 -#define CS47L35_OTP_HPDET_CAL_1 0x31F8 -#define CS47L35_OTP_HPDET_CAL_2 0x31FA -#define MADERA_WSEQ_SEQUENCE_254 0x31FA -#define MADERA_WSEQ_SEQUENCE_255 0x31FC -#define MADERA_WSEQ_SEQUENCE_256 0x31FE -#define MADERA_WSEQ_SEQUENCE_257 0x3200 -#define MADERA_WSEQ_SEQUENCE_258 0x3202 -#define MADERA_WSEQ_SEQUENCE_259 0x3204 -#define MADERA_WSEQ_SEQUENCE_260 0x3206 -#define MADERA_WSEQ_SEQUENCE_261 0x3208 -#define MADERA_WSEQ_SEQUENCE_262 0x320A -#define MADERA_WSEQ_SEQUENCE_263 0x320C -#define MADERA_WSEQ_SEQUENCE_264 0x320E -#define MADERA_WSEQ_SEQUENCE_265 0x3210 -#define MADERA_WSEQ_SEQUENCE_266 0x3212 -#define MADERA_WSEQ_SEQUENCE_267 0x3214 -#define MADERA_WSEQ_SEQUENCE_268 0x3216 -#define MADERA_WSEQ_SEQUENCE_269 0x3218 -#define MADERA_WSEQ_SEQUENCE_270 0x321A -#define MADERA_WSEQ_SEQUENCE_271 0x321C -#define MADERA_WSEQ_SEQUENCE_272 0x321E -#define MADERA_WSEQ_SEQUENCE_273 0x3220 -#define MADERA_WSEQ_SEQUENCE_274 0x3222 -#define MADERA_WSEQ_SEQUENCE_275 0x3224 -#define MADERA_WSEQ_SEQUENCE_276 0x3226 -#define MADERA_WSEQ_SEQUENCE_277 0x3228 -#define MADERA_WSEQ_SEQUENCE_278 0x322A -#define MADERA_WSEQ_SEQUENCE_279 0x322C -#define MADERA_WSEQ_SEQUENCE_280 0x322E -#define MADERA_WSEQ_SEQUENCE_281 0x3230 -#define MADERA_WSEQ_SEQUENCE_282 0x3232 -#define MADERA_WSEQ_SEQUENCE_283 0x3234 -#define MADERA_WSEQ_SEQUENCE_284 0x3236 -#define MADERA_WSEQ_SEQUENCE_285 0x3238 -#define MADERA_WSEQ_SEQUENCE_286 0x323A -#define MADERA_WSEQ_SEQUENCE_287 0x323C -#define MADERA_WSEQ_SEQUENCE_288 0x323E -#define MADERA_WSEQ_SEQUENCE_289 0x3240 -#define MADERA_WSEQ_SEQUENCE_290 0x3242 -#define MADERA_WSEQ_SEQUENCE_291 0x3244 -#define MADERA_WSEQ_SEQUENCE_292 0x3246 -#define MADERA_WSEQ_SEQUENCE_293 0x3248 -#define MADERA_WSEQ_SEQUENCE_294 0x324A -#define MADERA_WSEQ_SEQUENCE_295 0x324C -#define MADERA_WSEQ_SEQUENCE_296 0x324E -#define MADERA_WSEQ_SEQUENCE_297 0x3250 -#define MADERA_WSEQ_SEQUENCE_298 0x3252 -#define MADERA_WSEQ_SEQUENCE_299 0x3254 -#define MADERA_WSEQ_SEQUENCE_300 0x3256 -#define MADERA_WSEQ_SEQUENCE_301 0x3258 -#define MADERA_WSEQ_SEQUENCE_302 0x325A -#define MADERA_WSEQ_SEQUENCE_303 0x325C -#define MADERA_WSEQ_SEQUENCE_304 0x325E -#define MADERA_WSEQ_SEQUENCE_305 0x3260 -#define MADERA_WSEQ_SEQUENCE_306 0x3262 -#define MADERA_WSEQ_SEQUENCE_307 0x3264 -#define MADERA_WSEQ_SEQUENCE_308 0x3266 -#define MADERA_WSEQ_SEQUENCE_309 0x3268 -#define MADERA_WSEQ_SEQUENCE_310 0x326A -#define MADERA_WSEQ_SEQUENCE_311 0x326C -#define MADERA_WSEQ_SEQUENCE_312 0x326E -#define MADERA_WSEQ_SEQUENCE_313 0x3270 -#define MADERA_WSEQ_SEQUENCE_314 0x3272 -#define MADERA_WSEQ_SEQUENCE_315 0x3274 -#define MADERA_WSEQ_SEQUENCE_316 0x3276 -#define MADERA_WSEQ_SEQUENCE_317 0x3278 -#define MADERA_WSEQ_SEQUENCE_318 0x327A -#define MADERA_WSEQ_SEQUENCE_319 0x327C -#define MADERA_WSEQ_SEQUENCE_320 0x327E -#define MADERA_WSEQ_SEQUENCE_321 0x3280 -#define MADERA_WSEQ_SEQUENCE_322 0x3282 -#define MADERA_WSEQ_SEQUENCE_323 0x3284 -#define MADERA_WSEQ_SEQUENCE_324 0x3286 -#define MADERA_WSEQ_SEQUENCE_325 0x3288 -#define MADERA_WSEQ_SEQUENCE_326 0x328A -#define MADERA_WSEQ_SEQUENCE_327 0x328C -#define MADERA_WSEQ_SEQUENCE_328 0x328E -#define MADERA_WSEQ_SEQUENCE_329 0x3290 -#define MADERA_WSEQ_SEQUENCE_330 0x3292 -#define MADERA_WSEQ_SEQUENCE_331 0x3294 -#define MADERA_WSEQ_SEQUENCE_332 0x3296 -#define MADERA_WSEQ_SEQUENCE_333 0x3298 -#define MADERA_WSEQ_SEQUENCE_334 0x329A -#define MADERA_WSEQ_SEQUENCE_335 0x329C -#define MADERA_WSEQ_SEQUENCE_336 0x329E -#define MADERA_WSEQ_SEQUENCE_337 0x32A0 -#define MADERA_WSEQ_SEQUENCE_338 0x32A2 -#define MADERA_WSEQ_SEQUENCE_339 0x32A4 -#define MADERA_WSEQ_SEQUENCE_340 0x32A6 -#define MADERA_WSEQ_SEQUENCE_341 0x32A8 -#define MADERA_WSEQ_SEQUENCE_342 0x32AA -#define MADERA_WSEQ_SEQUENCE_343 0x32AC -#define MADERA_WSEQ_SEQUENCE_344 0x32AE -#define MADERA_WSEQ_SEQUENCE_345 0x32B0 -#define MADERA_WSEQ_SEQUENCE_346 0x32B2 -#define MADERA_WSEQ_SEQUENCE_347 0x32B4 -#define MADERA_WSEQ_SEQUENCE_348 0x32B6 -#define MADERA_WSEQ_SEQUENCE_349 0x32B8 -#define MADERA_WSEQ_SEQUENCE_350 0x32BA -#define MADERA_WSEQ_SEQUENCE_351 0x32BC -#define MADERA_WSEQ_SEQUENCE_352 0x32BE -#define MADERA_WSEQ_SEQUENCE_353 0x32C0 -#define MADERA_WSEQ_SEQUENCE_354 0x32C2 -#define MADERA_WSEQ_SEQUENCE_355 0x32C4 -#define MADERA_WSEQ_SEQUENCE_356 0x32C6 -#define MADERA_WSEQ_SEQUENCE_357 0x32C8 -#define MADERA_WSEQ_SEQUENCE_358 0x32CA -#define MADERA_WSEQ_SEQUENCE_359 0x32CC -#define MADERA_WSEQ_SEQUENCE_360 0x32CE -#define MADERA_WSEQ_SEQUENCE_361 0x32D0 -#define MADERA_WSEQ_SEQUENCE_362 0x32D2 -#define MADERA_WSEQ_SEQUENCE_363 0x32D4 -#define MADERA_WSEQ_SEQUENCE_364 0x32D6 -#define MADERA_WSEQ_SEQUENCE_365 0x32D8 -#define MADERA_WSEQ_SEQUENCE_366 0x32DA -#define MADERA_WSEQ_SEQUENCE_367 0x32DC -#define MADERA_WSEQ_SEQUENCE_368 0x32DE -#define MADERA_WSEQ_SEQUENCE_369 0x32E0 -#define MADERA_WSEQ_SEQUENCE_370 0x32E2 -#define MADERA_WSEQ_SEQUENCE_371 0x32E4 -#define MADERA_WSEQ_SEQUENCE_372 0x32E6 -#define MADERA_WSEQ_SEQUENCE_373 0x32E8 -#define MADERA_WSEQ_SEQUENCE_374 0x32EA -#define MADERA_WSEQ_SEQUENCE_375 0x32EC -#define MADERA_WSEQ_SEQUENCE_376 0x32EE -#define MADERA_WSEQ_SEQUENCE_377 0x32F0 -#define MADERA_WSEQ_SEQUENCE_378 0x32F2 -#define MADERA_WSEQ_SEQUENCE_379 0x32F4 -#define MADERA_WSEQ_SEQUENCE_380 0x32F6 -#define MADERA_WSEQ_SEQUENCE_381 0x32F8 -#define MADERA_WSEQ_SEQUENCE_382 0x32FA -#define MADERA_WSEQ_SEQUENCE_383 0x32FC -#define MADERA_WSEQ_SEQUENCE_384 0x32FE -#define MADERA_WSEQ_SEQUENCE_385 0x3300 -#define MADERA_WSEQ_SEQUENCE_386 0x3302 -#define MADERA_WSEQ_SEQUENCE_387 0x3304 -#define MADERA_WSEQ_SEQUENCE_388 0x3306 -#define MADERA_WSEQ_SEQUENCE_389 0x3308 -#define MADERA_WSEQ_SEQUENCE_390 0x330A -#define MADERA_WSEQ_SEQUENCE_391 0x330C -#define MADERA_WSEQ_SEQUENCE_392 0x330E -#define MADERA_WSEQ_SEQUENCE_393 0x3310 -#define MADERA_WSEQ_SEQUENCE_394 0x3312 -#define MADERA_WSEQ_SEQUENCE_395 0x3314 -#define MADERA_WSEQ_SEQUENCE_396 0x3316 -#define MADERA_WSEQ_SEQUENCE_397 0x3318 -#define MADERA_WSEQ_SEQUENCE_398 0x331A -#define MADERA_WSEQ_SEQUENCE_399 0x331C -#define MADERA_WSEQ_SEQUENCE_400 0x331E -#define MADERA_WSEQ_SEQUENCE_401 0x3320 -#define MADERA_WSEQ_SEQUENCE_402 0x3322 -#define MADERA_WSEQ_SEQUENCE_403 0x3324 -#define MADERA_WSEQ_SEQUENCE_404 0x3326 -#define MADERA_WSEQ_SEQUENCE_405 0x3328 -#define MADERA_WSEQ_SEQUENCE_406 0x332A -#define MADERA_WSEQ_SEQUENCE_407 0x332C -#define MADERA_WSEQ_SEQUENCE_408 0x332E -#define MADERA_WSEQ_SEQUENCE_409 0x3330 -#define MADERA_WSEQ_SEQUENCE_410 0x3332 -#define MADERA_WSEQ_SEQUENCE_411 0x3334 -#define MADERA_WSEQ_SEQUENCE_412 0x3336 -#define MADERA_WSEQ_SEQUENCE_413 0x3338 -#define MADERA_WSEQ_SEQUENCE_414 0x333A -#define MADERA_WSEQ_SEQUENCE_415 0x333C -#define MADERA_WSEQ_SEQUENCE_416 0x333E -#define MADERA_WSEQ_SEQUENCE_417 0x3340 -#define MADERA_WSEQ_SEQUENCE_418 0x3342 -#define MADERA_WSEQ_SEQUENCE_419 0x3344 -#define MADERA_WSEQ_SEQUENCE_420 0x3346 -#define MADERA_WSEQ_SEQUENCE_421 0x3348 -#define MADERA_WSEQ_SEQUENCE_422 0x334A -#define MADERA_WSEQ_SEQUENCE_423 0x334C -#define MADERA_WSEQ_SEQUENCE_424 0x334E -#define MADERA_WSEQ_SEQUENCE_425 0x3350 -#define MADERA_WSEQ_SEQUENCE_426 0x3352 -#define MADERA_WSEQ_SEQUENCE_427 0x3354 -#define MADERA_WSEQ_SEQUENCE_428 0x3356 -#define MADERA_WSEQ_SEQUENCE_429 0x3358 -#define MADERA_WSEQ_SEQUENCE_430 0x335A -#define MADERA_WSEQ_SEQUENCE_431 0x335C -#define MADERA_WSEQ_SEQUENCE_432 0x335E -#define MADERA_WSEQ_SEQUENCE_433 0x3360 -#define MADERA_WSEQ_SEQUENCE_434 0x3362 -#define MADERA_WSEQ_SEQUENCE_435 0x3364 -#define MADERA_WSEQ_SEQUENCE_436 0x3366 -#define MADERA_WSEQ_SEQUENCE_437 0x3368 -#define MADERA_WSEQ_SEQUENCE_438 0x336A -#define MADERA_WSEQ_SEQUENCE_439 0x336C -#define MADERA_WSEQ_SEQUENCE_440 0x336E -#define MADERA_WSEQ_SEQUENCE_441 0x3370 -#define MADERA_WSEQ_SEQUENCE_442 0x3372 -#define MADERA_WSEQ_SEQUENCE_443 0x3374 -#define MADERA_WSEQ_SEQUENCE_444 0x3376 -#define MADERA_WSEQ_SEQUENCE_445 0x3378 -#define MADERA_WSEQ_SEQUENCE_446 0x337A -#define MADERA_WSEQ_SEQUENCE_447 0x337C -#define MADERA_WSEQ_SEQUENCE_448 0x337E -#define MADERA_WSEQ_SEQUENCE_449 0x3380 -#define MADERA_WSEQ_SEQUENCE_450 0x3382 -#define MADERA_WSEQ_SEQUENCE_451 0x3384 -#define MADERA_WSEQ_SEQUENCE_452 0x3386 -#define MADERA_WSEQ_SEQUENCE_453 0x3388 -#define MADERA_WSEQ_SEQUENCE_454 0x338A -#define MADERA_WSEQ_SEQUENCE_455 0x338C -#define MADERA_WSEQ_SEQUENCE_456 0x338E -#define MADERA_WSEQ_SEQUENCE_457 0x3390 -#define MADERA_WSEQ_SEQUENCE_458 0x3392 -#define MADERA_WSEQ_SEQUENCE_459 0x3394 -#define MADERA_WSEQ_SEQUENCE_460 0x3396 -#define MADERA_WSEQ_SEQUENCE_461 0x3398 -#define MADERA_WSEQ_SEQUENCE_462 0x339A -#define MADERA_WSEQ_SEQUENCE_463 0x339C -#define MADERA_WSEQ_SEQUENCE_464 0x339E -#define MADERA_WSEQ_SEQUENCE_465 0x33A0 -#define MADERA_WSEQ_SEQUENCE_466 0x33A2 -#define MADERA_WSEQ_SEQUENCE_467 0x33A4 -#define MADERA_WSEQ_SEQUENCE_468 0x33A6 -#define MADERA_WSEQ_SEQUENCE_469 0x33A8 -#define MADERA_WSEQ_SEQUENCE_470 0x33AA -#define MADERA_WSEQ_SEQUENCE_471 0x33AC -#define MADERA_WSEQ_SEQUENCE_472 0x33AE -#define MADERA_WSEQ_SEQUENCE_473 0x33B0 -#define MADERA_WSEQ_SEQUENCE_474 0x33B2 -#define MADERA_WSEQ_SEQUENCE_475 0x33B4 -#define MADERA_WSEQ_SEQUENCE_476 0x33B6 -#define MADERA_WSEQ_SEQUENCE_477 0x33B8 -#define MADERA_WSEQ_SEQUENCE_478 0x33BA -#define MADERA_WSEQ_SEQUENCE_479 0x33BC -#define MADERA_WSEQ_SEQUENCE_480 0x33BE -#define MADERA_WSEQ_SEQUENCE_481 0x33C0 -#define MADERA_WSEQ_SEQUENCE_482 0x33C2 -#define MADERA_WSEQ_SEQUENCE_483 0x33C4 -#define MADERA_WSEQ_SEQUENCE_484 0x33C6 -#define MADERA_WSEQ_SEQUENCE_485 0x33C8 -#define MADERA_WSEQ_SEQUENCE_486 0x33CA -#define MADERA_WSEQ_SEQUENCE_487 0x33CC -#define MADERA_WSEQ_SEQUENCE_488 0x33CE -#define MADERA_WSEQ_SEQUENCE_489 0x33D0 -#define MADERA_WSEQ_SEQUENCE_490 0x33D2 -#define MADERA_WSEQ_SEQUENCE_491 0x33D4 -#define MADERA_WSEQ_SEQUENCE_492 0x33D6 -#define MADERA_WSEQ_SEQUENCE_493 0x33D8 -#define MADERA_WSEQ_SEQUENCE_494 0x33DA -#define MADERA_WSEQ_SEQUENCE_495 0x33DC -#define MADERA_WSEQ_SEQUENCE_496 0x33DE -#define MADERA_WSEQ_SEQUENCE_497 0x33E0 -#define MADERA_WSEQ_SEQUENCE_498 0x33E2 -#define MADERA_WSEQ_SEQUENCE_499 0x33E4 -#define MADERA_WSEQ_SEQUENCE_500 0x33E6 -#define MADERA_WSEQ_SEQUENCE_501 0x33E8 -#define MADERA_WSEQ_SEQUENCE_502 0x33EA -#define MADERA_WSEQ_SEQUENCE_503 0x33EC -#define MADERA_WSEQ_SEQUENCE_504 0x33EE -#define MADERA_WSEQ_SEQUENCE_505 0x33F0 -#define MADERA_WSEQ_SEQUENCE_506 0x33F2 -#define MADERA_WSEQ_SEQUENCE_507 0x33F4 -#define MADERA_WSEQ_SEQUENCE_508 0x33F6 -#define CS47L85_OTP_HPDET_CAL_1 0x33F8 -#define CS47L85_OTP_HPDET_CAL_2 0x33FA -#define MADERA_OTP_HPDET_CAL_1 0x20004 -#define MADERA_OTP_HPDET_CAL_2 0x20006 -#define MADERA_DSP1_CONFIG_1 0x0FFE00 -#define MADERA_DSP1_CONFIG_2 0x0FFE02 -#define MADERA_DSP1_STATUS_1 0x0FFE04 -#define MADERA_DSP1_STATUS_2 0x0FFE06 -#define MADERA_DSP1_STATUS_3 0x0FFE08 -#define MADERA_DSP1_WATCHDOG_1 0x0FFE0A -#define MADERA_DSP1_DMA_CONFIG_1 0x0FFE30 -#define MADERA_DSP1_DMA_CONFIG_2 0x0FFE32 -#define MADERA_DSP1_DMA_CONFIG_3 0x0FFE34 -#define MADERA_DSP1_DMA_CONFIG_4 0x0FFE36 -#define MADERA_DSP1_SCRATCH_1 0x0FFE40 -#define MADERA_DSP1_SCRATCH_2 0x0FFE42 -#define MADERA_DSP1_BUS_ERROR_ADDR 0xFFE52 -#define MADERA_DSP1_REGION_LOCK_STS_0 0xFFE64 -#define MADERA_DSP1_REGION_LOCK_1___DSP1_REGION_LOCK_0 0xFFE66 -#define MADERA_DSP1_REGION_LOCK_3___DSP1_REGION_LOCK_2 0xFFE68 -#define MADERA_DSP1_REGION_LOCK_5___DSP1_REGION_LOCK_4 0xFFE6A -#define MADERA_DSP1_REGION_LOCK_7___DSP1_REGION_LOCK_6 0xFFE6C -#define MADERA_DSP1_REGION_LOCK_9___DSP1_REGION_LOCK_8 0xFFE6E -#define MADERA_DSP1_REGION_LOCK_CTRL_0 0xFFE7A -#define MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0xFFE7C -#define MADERA_DSP2_CONFIG_1 0x17FE00 -#define MADERA_DSP2_CONFIG_2 0x17FE02 -#define MADERA_DSP2_STATUS_1 0x17FE04 -#define MADERA_DSP2_STATUS_2 0x17FE06 -#define MADERA_DSP2_STATUS_3 0x17FE08 -#define MADERA_DSP2_WATCHDOG_1 0x17FE0A -#define MADERA_DSP2_DMA_CONFIG_1 0x17FE30 -#define MADERA_DSP2_DMA_CONFIG_2 0x17FE32 -#define MADERA_DSP2_DMA_CONFIG_3 0x17FE34 -#define MADERA_DSP2_DMA_CONFIG_4 0x17FE36 -#define MADERA_DSP2_SCRATCH_1 0x17FE40 -#define MADERA_DSP2_SCRATCH_2 0x17FE42 -#define MADERA_DSP2_BUS_ERROR_ADDR 0x17FE52 -#define MADERA_DSP2_REGION_LOCK_STS_0 0x17FE64 -#define MADERA_DSP2_REGION_LOCK_1___DSP2_REGION_LOCK_0 0x17FE66 -#define MADERA_DSP2_REGION_LOCK_3___DSP2_REGION_LOCK_2 0x17FE68 -#define MADERA_DSP2_REGION_LOCK_5___DSP2_REGION_LOCK_4 0x17FE6A -#define MADERA_DSP2_REGION_LOCK_7___DSP2_REGION_LOCK_6 0x17FE6C -#define MADERA_DSP2_REGION_LOCK_9___DSP2_REGION_LOCK_8 0x17FE6E -#define MADERA_DSP2_REGION_LOCK_CTRL_0 0x17FE7A -#define MADERA_DSP2_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x17FE7C -#define MADERA_DSP3_CONFIG_1 0x1FFE00 -#define MADERA_DSP3_CONFIG_2 0x1FFE02 -#define MADERA_DSP3_STATUS_1 0x1FFE04 -#define MADERA_DSP3_STATUS_2 0x1FFE06 -#define MADERA_DSP3_STATUS_3 0x1FFE08 -#define MADERA_DSP3_WATCHDOG_1 0x1FFE0A -#define MADERA_DSP3_DMA_CONFIG_1 0x1FFE30 -#define MADERA_DSP3_DMA_CONFIG_2 0x1FFE32 -#define MADERA_DSP3_DMA_CONFIG_3 0x1FFE34 -#define MADERA_DSP3_DMA_CONFIG_4 0x1FFE36 -#define MADERA_DSP3_SCRATCH_1 0x1FFE40 -#define MADERA_DSP3_SCRATCH_2 0x1FFE42 -#define MADERA_DSP3_BUS_ERROR_ADDR 0x1FFE52 -#define MADERA_DSP3_REGION_LOCK_STS_0 0x1FFE64 -#define MADERA_DSP3_REGION_LOCK_1___DSP3_REGION_LOCK_0 0x1FFE66 -#define MADERA_DSP3_REGION_LOCK_3___DSP3_REGION_LOCK_2 0x1FFE68 -#define MADERA_DSP3_REGION_LOCK_5___DSP3_REGION_LOCK_4 0x1FFE6A -#define MADERA_DSP3_REGION_LOCK_7___DSP3_REGION_LOCK_6 0x1FFE6C -#define MADERA_DSP3_REGION_LOCK_9___DSP3_REGION_LOCK_8 0x1FFE6E -#define MADERA_DSP3_REGION_LOCK_CTRL_0 0x1FFE7A -#define MADERA_DSP3_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x1FFE7C -#define MADERA_DSP4_CONFIG_1 0x27FE00 -#define MADERA_DSP4_CONFIG_2 0x27FE02 -#define MADERA_DSP4_STATUS_1 0x27FE04 -#define MADERA_DSP4_STATUS_2 0x27FE06 -#define MADERA_DSP4_STATUS_3 0x27FE08 -#define MADERA_DSP4_WATCHDOG_1 0x27FE0A -#define MADERA_DSP4_DMA_CONFIG_1 0x27FE30 -#define MADERA_DSP4_DMA_CONFIG_2 0x27FE32 -#define MADERA_DSP4_DMA_CONFIG_3 0x27FE34 -#define MADERA_DSP4_DMA_CONFIG_4 0x27FE36 -#define MADERA_DSP4_SCRATCH_1 0x27FE40 -#define MADERA_DSP4_SCRATCH_2 0x27FE42 -#define MADERA_DSP4_BUS_ERROR_ADDR 0x27FE52 -#define MADERA_DSP4_REGION_LOCK_STS_0 0x27FE64 -#define MADERA_DSP4_REGION_LOCK_1___DSP4_REGION_LOCK_0 0x27FE66 -#define MADERA_DSP4_REGION_LOCK_3___DSP4_REGION_LOCK_2 0x27FE68 -#define MADERA_DSP4_REGION_LOCK_5___DSP4_REGION_LOCK_4 0x27FE6A -#define MADERA_DSP4_REGION_LOCK_7___DSP4_REGION_LOCK_6 0x27FE6C -#define MADERA_DSP4_REGION_LOCK_9___DSP4_REGION_LOCK_8 0x27FE6E -#define MADERA_DSP4_REGION_LOCK_CTRL_0 0x27FE7A -#define MADERA_DSP4_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x27FE7C -#define MADERA_DSP5_CONFIG_1 0x2FFE00 -#define MADERA_DSP5_CONFIG_2 0x2FFE02 -#define MADERA_DSP5_STATUS_1 0x2FFE04 -#define MADERA_DSP5_STATUS_2 0x2FFE06 -#define MADERA_DSP5_STATUS_3 0x2FFE08 -#define MADERA_DSP5_WATCHDOG_1 0x2FFE0A -#define MADERA_DSP5_DMA_CONFIG_1 0x2FFE30 -#define MADERA_DSP5_DMA_CONFIG_2 0x2FFE32 -#define MADERA_DSP5_DMA_CONFIG_3 0x2FFE34 -#define MADERA_DSP5_DMA_CONFIG_4 0x2FFE36 -#define MADERA_DSP5_SCRATCH_1 0x2FFE40 -#define MADERA_DSP5_SCRATCH_2 0x2FFE42 -#define MADERA_DSP5_BUS_ERROR_ADDR 0x2FFE52 -#define MADERA_DSP5_REGION_LOCK_STS_0 0x2FFE64 -#define MADERA_DSP5_REGION_LOCK_1___DSP5_REGION_LOCK_0 0x2FFE66 -#define MADERA_DSP5_REGION_LOCK_3___DSP5_REGION_LOCK_2 0x2FFE68 -#define MADERA_DSP5_REGION_LOCK_5___DSP5_REGION_LOCK_4 0x2FFE6A -#define MADERA_DSP5_REGION_LOCK_7___DSP5_REGION_LOCK_6 0x2FFE6C -#define MADERA_DSP5_REGION_LOCK_9___DSP5_REGION_LOCK_8 0x2FFE6E -#define MADERA_DSP5_REGION_LOCK_CTRL_0 0x2FFE7A -#define MADERA_DSP5_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x2FFE7C -#define MADERA_DSP6_CONFIG_1 0x37FE00 -#define MADERA_DSP6_CONFIG_2 0x37FE02 -#define MADERA_DSP6_STATUS_1 0x37FE04 -#define MADERA_DSP6_STATUS_2 0x37FE06 -#define MADERA_DSP6_STATUS_3 0x37FE08 -#define MADERA_DSP6_WATCHDOG_1 0x37FE0A -#define MADERA_DSP6_DMA_CONFIG_1 0x37FE30 -#define MADERA_DSP6_DMA_CONFIG_2 0x37FE32 -#define MADERA_DSP6_DMA_CONFIG_3 0x37FE34 -#define MADERA_DSP6_DMA_CONFIG_4 0x37FE36 -#define MADERA_DSP6_SCRATCH_1 0x37FE40 -#define MADERA_DSP6_SCRATCH_2 0x37FE42 -#define MADERA_DSP6_BUS_ERROR_ADDR 0x37FE52 -#define MADERA_DSP6_REGION_LOCK_STS_0 0x37FE64 -#define MADERA_DSP6_REGION_LOCK_1___DSP6_REGION_LOCK_0 0x37FE66 -#define MADERA_DSP6_REGION_LOCK_3___DSP6_REGION_LOCK_2 0x37FE68 -#define MADERA_DSP6_REGION_LOCK_5___DSP6_REGION_LOCK_4 0x37FE6A -#define MADERA_DSP6_REGION_LOCK_7___DSP6_REGION_LOCK_6 0x37FE6C -#define MADERA_DSP6_REGION_LOCK_9___DSP6_REGION_LOCK_8 0x37FE6E -#define MADERA_DSP6_REGION_LOCK_CTRL_0 0x37FE7A -#define MADERA_DSP6_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x37FE7C -#define MADERA_DSP7_CONFIG_1 0x3FFE00 -#define MADERA_DSP7_CONFIG_2 0x3FFE02 -#define MADERA_DSP7_STATUS_1 0x3FFE04 -#define MADERA_DSP7_STATUS_2 0x3FFE06 -#define MADERA_DSP7_STATUS_3 0x3FFE08 -#define MADERA_DSP7_WATCHDOG_1 0x3FFE0A -#define MADERA_DSP7_DMA_CONFIG_1 0x3FFE30 -#define MADERA_DSP7_DMA_CONFIG_2 0x3FFE32 -#define MADERA_DSP7_DMA_CONFIG_3 0x3FFE34 -#define MADERA_DSP7_DMA_CONFIG_4 0x3FFE36 -#define MADERA_DSP7_SCRATCH_1 0x3FFE40 -#define MADERA_DSP7_SCRATCH_2 0x3FFE42 -#define MADERA_DSP7_BUS_ERROR_ADDR 0x3FFE52 -#define MADERA_DSP7_REGION_LOCK_STS_0 0x3FFE64 -#define MADERA_DSP7_REGION_LOCK_1___DSP7_REGION_LOCK_0 0x3FFE66 -#define MADERA_DSP7_REGION_LOCK_3___DSP7_REGION_LOCK_2 0x3FFE68 -#define MADERA_DSP7_REGION_LOCK_5___DSP7_REGION_LOCK_4 0x3FFE6A -#define MADERA_DSP7_REGION_LOCK_7___DSP7_REGION_LOCK_6 0x3FFE6C -#define MADERA_DSP7_REGION_LOCK_9___DSP7_REGION_LOCK_8 0x3FFE6E -#define MADERA_DSP7_REGION_LOCK_CTRL_0 0x3FFE7A -#define MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR 0x3FFE7C - - -/* (0x0000) Software_Reset */ -#define MADERA_SW_RST_DEV_ID1_MASK 0xFFFF -#define MADERA_SW_RST_DEV_ID1_SHIFT 0 -#define MADERA_SW_RST_DEV_ID1_WIDTH 16 - -/* (0x0001) Hardware_Revision */ -#define MADERA_HW_REVISION_MASK 0x00FF -#define MADERA_HW_REVISION_SHIFT 0 -#define MADERA_HW_REVISION_WIDTH 8 - -/* (0x0016) Write_Sequencer_Ctrl_0 */ -#define MADERA_WSEQ_ABORT 0x0800 -#define MADERA_WSEQ_ABORT_MASK 0x0800 -#define MADERA_WSEQ_ABORT_SHIFT 11 -#define MADERA_WSEQ_ABORT_WIDTH 1 -#define MADERA_WSEQ_START 0x0400 -#define MADERA_WSEQ_START_MASK 0x0400 -#define MADERA_WSEQ_START_SHIFT 10 -#define MADERA_WSEQ_START_WIDTH 1 -#define MADERA_WSEQ_ENA 0x0200 -#define MADERA_WSEQ_ENA_MASK 0x0200 -#define MADERA_WSEQ_ENA_SHIFT 9 -#define MADERA_WSEQ_ENA_WIDTH 1 -#define MADERA_WSEQ_START_INDEX_MASK 0x01FF -#define MADERA_WSEQ_START_INDEX_SHIFT 0 -#define MADERA_WSEQ_START_INDEX_WIDTH 9 - -/* (0x0017) Write_Sequencer_Ctrl_1 */ -#define MADERA_WSEQ_BUSY 0x0200 -#define MADERA_WSEQ_BUSY_MASK 0x0200 -#define MADERA_WSEQ_BUSY_SHIFT 9 -#define MADERA_WSEQ_BUSY_WIDTH 1 -#define MADERA_WSEQ_CURRENT_INDEX_MASK 0x01FF -#define MADERA_WSEQ_CURRENT_INDEX_SHIFT 0 -#define MADERA_WSEQ_CURRENT_INDEX_WIDTH 9 - -/* (0x0018) Write_Sequencer_Ctrl_2 */ -#define MADERA_LOAD_DEFAULTS 0x0002 -#define MADERA_LOAD_DEFAULTS_MASK 0x0002 -#define MADERA_LOAD_DEFAULTS_SHIFT 1 -#define MADERA_LOAD_DEFAULTS_WIDTH 1 -#define MADERA_WSEQ_LOAD_MEM 0x0001 -#define MADERA_WSEQ_LOAD_MEM_MASK 0x0001 -#define MADERA_WSEQ_LOAD_MEM_SHIFT 0 -#define MADERA_WSEQ_LOAD_MEM_WIDTH 1 - -/* (0x0020) Tone_Generator_1 */ -#define MADERA_TONE_RATE_MASK 0x7800 -#define MADERA_TONE_RATE_SHIFT 11 -#define MADERA_TONE_RATE_WIDTH 4 -#define MADERA_TONE_OFFSET_MASK 0x0300 -#define MADERA_TONE_OFFSET_SHIFT 8 -#define MADERA_TONE_OFFSET_WIDTH 2 -#define MADERA_TONE2_OVD 0x0020 -#define MADERA_TONE2_OVD_MASK 0x0020 -#define MADERA_TONE2_OVD_SHIFT 5 -#define MADERA_TONE2_OVD_WIDTH 1 -#define MADERA_TONE1_OVD 0x0010 -#define MADERA_TONE1_OVD_MASK 0x0010 -#define MADERA_TONE1_OVD_SHIFT 4 -#define MADERA_TONE1_OVD_WIDTH 1 -#define MADERA_TONE2_ENA 0x0002 -#define MADERA_TONE2_ENA_MASK 0x0002 -#define MADERA_TONE2_ENA_SHIFT 1 -#define MADERA_TONE2_ENA_WIDTH 1 -#define MADERA_TONE1_ENA 0x0001 -#define MADERA_TONE1_ENA_MASK 0x0001 -#define MADERA_TONE1_ENA_SHIFT 0 -#define MADERA_TONE1_ENA_WIDTH 1 - -/* (0x0021) Tone_Generator_2 */ -#define MADERA_TONE1_LVL_0_MASK 0xFFFF -#define MADERA_TONE1_LVL_0_SHIFT 0 -#define MADERA_TONE1_LVL_0_WIDTH 16 - -/* (0x0022) Tone_Generator_3 */ -#define MADERA_TONE1_LVL_MASK 0x00FF -#define MADERA_TONE1_LVL_SHIFT 0 -#define MADERA_TONE1_LVL_WIDTH 8 - -/* (0x0023) Tone_Generator_4 */ -#define MADERA_TONE2_LVL_0_MASK 0xFFFF -#define MADERA_TONE2_LVL_0_SHIFT 0 -#define MADERA_TONE2_LVL_0_WIDTH 16 - -/* (0x0024) Tone_Generator_5 */ -#define MADERA_TONE2_LVL_MASK 0x00FF -#define MADERA_TONE2_LVL_SHIFT 0 -#define MADERA_TONE2_LVL_WIDTH 8 - -/* (0x0030) PWM_Drive_1 */ -#define MADERA_PWM_RATE_MASK 0x7800 -#define MADERA_PWM_RATE_SHIFT 11 -#define MADERA_PWM_RATE_WIDTH 4 -#define MADERA_PWM_CLK_SEL_MASK 0x0700 -#define MADERA_PWM_CLK_SEL_SHIFT 8 -#define MADERA_PWM_CLK_SEL_WIDTH 3 -#define MADERA_PWM2_OVD 0x0020 -#define MADERA_PWM2_OVD_MASK 0x0020 -#define MADERA_PWM2_OVD_SHIFT 5 -#define MADERA_PWM2_OVD_WIDTH 1 -#define MADERA_PWM1_OVD 0x0010 -#define MADERA_PWM1_OVD_MASK 0x0010 -#define MADERA_PWM1_OVD_SHIFT 4 -#define MADERA_PWM1_OVD_WIDTH 1 -#define MADERA_PWM2_ENA 0x0002 -#define MADERA_PWM2_ENA_MASK 0x0002 -#define MADERA_PWM2_ENA_SHIFT 1 -#define MADERA_PWM2_ENA_WIDTH 1 -#define MADERA_PWM1_ENA 0x0001 -#define MADERA_PWM1_ENA_MASK 0x0001 -#define MADERA_PWM1_ENA_SHIFT 0 -#define MADERA_PWM1_ENA_WIDTH 1 - -/* (0x0031) PWM_Drive_2 */ -#define MADERA_PWM1_LVL_MASK 0x03FF -#define MADERA_PWM1_LVL_SHIFT 0 -#define MADERA_PWM1_LVL_WIDTH 10 - -/* (0x0032) PWM_Drive_3 */ -#define MADERA_PWM2_LVL_MASK 0x03FF -#define MADERA_PWM2_LVL_SHIFT 0 -#define MADERA_PWM2_LVL_WIDTH 10 - -/* (0x0041) Sequence_control */ -#define MADERA_WSEQ_ENA_MICD_CLAMP_FALL 0x0080 -#define MADERA_WSEQ_ENA_MICD_CLAMP_FALL_MASK 0x0080 -#define MADERA_WSEQ_ENA_MICD_CLAMP_FALL_SHIFT 7 -#define MADERA_WSEQ_ENA_MICD_CLAMP_FALL_WIDTH 1 -#define MADERA_WSEQ_ENA_MICD_CLAMP_RISE 0x0040 -#define MADERA_WSEQ_ENA_MICD_CLAMP_RISE_MASK 0x0040 -#define MADERA_WSEQ_ENA_MICD_CLAMP_RISE_SHIFT 6 -#define MADERA_WSEQ_ENA_MICD_CLAMP_RISE_WIDTH 1 - -/* (0x0090) Haptics_Control_1 */ -#define MADERA_HAP_RATE_MASK 0x7800 -#define MADERA_HAP_RATE_SHIFT 11 -#define MADERA_HAP_RATE_WIDTH 4 -#define MADERA_ONESHOT_TRIG 0x0010 -#define MADERA_ONESHOT_TRIG_MASK 0x0010 -#define MADERA_ONESHOT_TRIG_SHIFT 4 -#define MADERA_ONESHOT_TRIG_WIDTH 1 -#define MADERA_HAP_CTRL_MASK 0x000C -#define MADERA_HAP_CTRL_SHIFT 2 -#define MADERA_HAP_CTRL_WIDTH 2 -#define MADERA_HAP_ACT 0x0002 -#define MADERA_HAP_ACT_MASK 0x0002 -#define MADERA_HAP_ACT_SHIFT 1 -#define MADERA_HAP_ACT_WIDTH 1 - -/* (0x0091) Haptics_Control_2 */ -#define MADERA_LRA_FREQ_MASK 0x7FFF -#define MADERA_LRA_FREQ_SHIFT 0 -#define MADERA_LRA_FREQ_WIDTH 15 - -/* (0x0092) Haptics_phase_1_intensity */ -#define MADERA_PHASE1_INTENSITY_MASK 0x00FF -#define MADERA_PHASE1_INTENSITY_SHIFT 0 -#define MADERA_PHASE1_INTENSITY_WIDTH 8 - -/* (0x0093) Haptics_phase_1_duration */ -#define MADERA_PHASE1_DURATION_MASK 0x01FF -#define MADERA_PHASE1_DURATION_SHIFT 0 -#define MADERA_PHASE1_DURATION_WIDTH 9 - -/* (0x0094) Haptics_phase_2_intensity */ -#define MADERA_PHASE2_INTENSITY_MASK 0x00FF -#define MADERA_PHASE2_INTENSITY_SHIFT 0 -#define MADERA_PHASE2_INTENSITY_WIDTH 8 - -/* (0x0095) Haptics_phase_2_duration */ -#define MADERA_PHASE2_DURATION_MASK 0x07FF -#define MADERA_PHASE2_DURATION_SHIFT 0 -#define MADERA_PHASE2_DURATION_WIDTH 11 - -/* (0x0096) Haptics_phase_3_intensity */ -#define MADERA_PHASE3_INTENSITY_MASK 0x00FF -#define MADERA_PHASE3_INTENSITY_SHIFT 0 -#define MADERA_PHASE3_INTENSITY_WIDTH 8 - -/* (0x0097) Haptics_phase_3_duration */ -#define MADERA_PHASE3_DURATION_MASK 0x01FF -#define MADERA_PHASE3_DURATION_SHIFT 0 -#define MADERA_PHASE3_DURATION_WIDTH 9 - -/* (0x0098) Haptics_Status */ -#define MADERA_ONESHOT_STS 0x0001 -#define MADERA_ONESHOT_STS_MASK 0x0001 -#define MADERA_ONESHOT_STS_SHIFT 0 -#define MADERA_ONESHOT_STS_WIDTH 1 - -/* (0x00A0) Comfort_Noise_Generator */ -#define MADERA_NOISE_GEN_ENA 0x0020 -#define MADERA_NOISE_GEN_ENA_MASK 0x0020 -#define MADERA_NOISE_GEN_ENA_SHIFT 5 -#define MADERA_NOISE_GEN_ENA_WIDTH 1 -#define MADERA_NOISE_GEN_GAIN_MASK 0x001F -#define MADERA_NOISE_GEN_GAIN_SHIFT 0 -#define MADERA_NOISE_GEN_GAIN_WIDTH 5 -#define MADERA_NOISE_GEN_RATE_SHIFT 11 - -/* (0x0100) Clock_32k_1 */ -#define MADERA_CLK_32K_ENA 0x0040 -#define MADERA_CLK_32K_ENA_MASK 0x0040 -#define MADERA_CLK_32K_ENA_SHIFT 6 -#define MADERA_CLK_32K_ENA_WIDTH 1 -#define MADERA_CLK_32K_SRC_MASK 0x0003 -#define MADERA_CLK_32K_SRC_SHIFT 0 -#define MADERA_CLK_32K_SRC_WIDTH 2 - -/* (0x0101) System_Clock_1 */ -#define MADERA_SYSCLK_FRAC 0x8000 -#define MADERA_SYSCLK_FRAC_MASK 0x8000 -#define MADERA_SYSCLK_FRAC_SHIFT 15 -#define MADERA_SYSCLK_FRAC_WIDTH 1 -#define MADERA_SYSCLK_FREQ_MASK 0x0700 -#define MADERA_SYSCLK_FREQ_SHIFT 8 -#define MADERA_SYSCLK_FREQ_WIDTH 3 -#define MADERA_SYSCLK_ENA 0x0040 -#define MADERA_SYSCLK_ENA_MASK 0x0040 -#define MADERA_SYSCLK_ENA_SHIFT 6 -#define MADERA_SYSCLK_ENA_WIDTH 1 -#define MADERA_SYSCLK_SRC_MASK 0x000F -#define MADERA_SYSCLK_SRC_SHIFT 0 -#define MADERA_SYSCLK_SRC_WIDTH 4 - -/* (0x0102) Sample_rate_1 */ -#define MADERA_SAMPLE_RATE_1_MASK 0x001F -#define MADERA_SAMPLE_RATE_1_SHIFT 0 -#define MADERA_SAMPLE_RATE_1_WIDTH 5 - -/* (0x0103) Sample_rate_2 */ -#define MADERA_SAMPLE_RATE_2_MASK 0x001F -#define MADERA_SAMPLE_RATE_2_SHIFT 0 -#define MADERA_SAMPLE_RATE_2_WIDTH 5 - -/* (0x0104) Sample_rate_3 */ -#define MADERA_SAMPLE_RATE_3_MASK 0x001F -#define MADERA_SAMPLE_RATE_3_SHIFT 0 -#define MADERA_SAMPLE_RATE_3_WIDTH 5 - -/* (0x010A) Sample_rate_1_status */ -#define MADERA_SAMPLE_RATE_1_STS_MASK 0x001F -#define MADERA_SAMPLE_RATE_1_STS_SHIFT 0 -#define MADERA_SAMPLE_RATE_1_STS_WIDTH 5 - -/* (0x010B) Sample_rate_2_status */ -#define MADERA_SAMPLE_RATE_2_STS_MASK 0x001F -#define MADERA_SAMPLE_RATE_2_STS_SHIFT 0 -#define MADERA_SAMPLE_RATE_2_STS_WIDTH 5 - -/* (0x010C) Sample_rate_3_status */ -#define MADERA_SAMPLE_RATE_3_STS_MASK 0x001F -#define MADERA_SAMPLE_RATE_3_STS_SHIFT 0 -#define MADERA_SAMPLE_RATE_3_STS_WIDTH 5 - -/* (0x0112) Async_clock_1 */ -#define MADERA_ASYNC_CLK_FREQ_MASK 0x0700 -#define MADERA_ASYNC_CLK_FREQ_SHIFT 8 -#define MADERA_ASYNC_CLK_FREQ_WIDTH 3 -#define MADERA_ASYNC_CLK_ENA 0x0040 -#define MADERA_ASYNC_CLK_ENA_MASK 0x0040 -#define MADERA_ASYNC_CLK_ENA_SHIFT 6 -#define MADERA_ASYNC_CLK_ENA_WIDTH 1 -#define MADERA_ASYNC_CLK_SRC_MASK 0x000F -#define MADERA_ASYNC_CLK_SRC_SHIFT 0 -#define MADERA_ASYNC_CLK_SRC_WIDTH 4 - -/* (0x0113) Async_sample_rate_1 */ -#define MADERA_ASYNC_SAMPLE_RATE_1_MASK 0x001F -#define MADERA_ASYNC_SAMPLE_RATE_1_SHIFT 0 -#define MADERA_ASYNC_SAMPLE_RATE_1_WIDTH 5 - -/* (0x0114) Async_sample_rate_2 */ -#define MADERA_ASYNC_SAMPLE_RATE_2_MASK 0x001F -#define MADERA_ASYNC_SAMPLE_RATE_2_SHIFT 0 -#define MADERA_ASYNC_SAMPLE_RATE_2_WIDTH 5 - -/* (0x011B) Async_sample_rate_1_status */ -#define MADERA_ASYNC_SAMPLE_RATE_1_STS_MASK 0x001F -#define MADERA_ASYNC_SAMPLE_RATE_1_STS_SHIFT 0 -#define MADERA_ASYNC_SAMPLE_RATE_1_STS_WIDTH 5 - -/* (0x011C) Async_sample_rate_2_status */ -#define MADERA_ASYNC_SAMPLE_RATE_2_STS_MASK 0x001F -#define MADERA_ASYNC_SAMPLE_RATE_2_STS_SHIFT 0 -#define MADERA_ASYNC_SAMPLE_RATE_2_STS_WIDTH 5 - -/* (0x0120) DSP_Clock_1 */ -#define MADERA_DSP_CLK_FREQ_LEGACY 0x0700 -#define MADERA_DSP_CLK_FREQ_LEGACY_MASK 0x0700 -#define MADERA_DSP_CLK_FREQ_LEGACY_SHIFT 8 -#define MADERA_DSP_CLK_FREQ_LEGACY_WIDTH 3 -#define MADERA_DSP_CLK_ENA 0x0040 -#define MADERA_DSP_CLK_ENA_MASK 0x0040 -#define MADERA_DSP_CLK_ENA_SHIFT 6 -#define MADERA_DSP_CLK_ENA_WIDTH 1 -#define MADERA_DSP_CLK_SRC 0x000F -#define MADERA_DSP_CLK_SRC_MASK 0x000F -#define MADERA_DSP_CLK_SRC_SHIFT 0 -#define MADERA_DSP_CLK_SRC_WIDTH 4 - -/* (0x0122) DSP_Clock_2 */ -#define MADERA_DSP_CLK_FREQ_MASK 0x03FF -#define MADERA_DSP_CLK_FREQ_SHIFT 0 -#define MADERA_DSP_CLK_FREQ_WIDTH 10 - -/* (0x0149) Output_system_clock */ -#define MADERA_OPCLK_ENA 0x8000 -#define MADERA_OPCLK_ENA_MASK 0x8000 -#define MADERA_OPCLK_ENA_SHIFT 15 -#define MADERA_OPCLK_ENA_WIDTH 1 -#define MADERA_OPCLK_DIV_MASK 0x00F8 -#define MADERA_OPCLK_DIV_SHIFT 3 -#define MADERA_OPCLK_DIV_WIDTH 5 -#define MADERA_OPCLK_SEL_MASK 0x0007 -#define MADERA_OPCLK_SEL_SHIFT 0 -#define MADERA_OPCLK_SEL_WIDTH 3 - -/* (0x014A) Output_async_clock */ -#define MADERA_OPCLK_ASYNC_ENA 0x8000 -#define MADERA_OPCLK_ASYNC_ENA_MASK 0x8000 -#define MADERA_OPCLK_ASYNC_ENA_SHIFT 15 -#define MADERA_OPCLK_ASYNC_ENA_WIDTH 1 -#define MADERA_OPCLK_ASYNC_DIV_MASK 0x00F8 -#define MADERA_OPCLK_ASYNC_DIV_SHIFT 3 -#define MADERA_OPCLK_ASYNC_DIV_WIDTH 5 -#define MADERA_OPCLK_ASYNC_SEL_MASK 0x0007 -#define MADERA_OPCLK_ASYNC_SEL_SHIFT 0 -#define MADERA_OPCLK_ASYNC_SEL_WIDTH 3 - -/* (0x0152) Rate_Estimator_1 */ -#define MADERA_TRIG_ON_STARTUP 0x0010 -#define MADERA_TRIG_ON_STARTUP_MASK 0x0010 -#define MADERA_TRIG_ON_STARTUP_SHIFT 4 -#define MADERA_TRIG_ON_STARTUP_WIDTH 1 -#define MADERA_LRCLK_SRC_MASK 0x000E -#define MADERA_LRCLK_SRC_SHIFT 1 -#define MADERA_LRCLK_SRC_WIDTH 3 -#define MADERA_RATE_EST_ENA 0x0001 -#define MADERA_RATE_EST_ENA_MASK 0x0001 -#define MADERA_RATE_EST_ENA_SHIFT 0 -#define MADERA_RATE_EST_ENA_WIDTH 1 - -/* (0x0153) Rate_Estimator_2 */ -#define MADERA_SAMPLE_RATE_DETECT_A_MASK 0x001F -#define MADERA_SAMPLE_RATE_DETECT_A_SHIFT 0 -#define MADERA_SAMPLE_RATE_DETECT_A_WIDTH 5 - -/* (0x0154) Rate_Estimator_3 */ -#define MADERA_SAMPLE_RATE_DETECT_B_MASK 0x001F -#define MADERA_SAMPLE_RATE_DETECT_B_SHIFT 0 -#define MADERA_SAMPLE_RATE_DETECT_B_WIDTH 5 - -/* (0x0155) Rate_Estimator_4 */ -#define MADERA_SAMPLE_RATE_DETECT_C_MASK 0x001F -#define MADERA_SAMPLE_RATE_DETECT_C_SHIFT 0 -#define MADERA_SAMPLE_RATE_DETECT_C_WIDTH 5 - -/* (0x0156) Rate_Estimator_5 */ -#define MADERA_SAMPLE_RATE_DETECT_D_MASK 0x001F -#define MADERA_SAMPLE_RATE_DETECT_D_SHIFT 0 -#define MADERA_SAMPLE_RATE_DETECT_D_WIDTH 5 - -/* (0x0171) FLL1_Control_1 */ -#define MADERA_FLL1_FREERUN 0x0002 -#define MADERA_FLL1_FREERUN_MASK 0x0002 -#define MADERA_FLL1_FREERUN_SHIFT 1 -#define MADERA_FLL1_FREERUN_WIDTH 1 -#define MADERA_FLL1_ENA 0x0001 -#define MADERA_FLL1_ENA_MASK 0x0001 -#define MADERA_FLL1_ENA_SHIFT 0 -#define MADERA_FLL1_ENA_WIDTH 1 - -/* (0x0172) FLL1_Control_2 */ -#define MADERA_FLL1_CTRL_UPD 0x8000 -#define MADERA_FLL1_CTRL_UPD_MASK 0x8000 -#define MADERA_FLL1_CTRL_UPD_SHIFT 15 -#define MADERA_FLL1_CTRL_UPD_WIDTH 1 -#define MADERA_FLL1_N_MASK 0x03FF -#define MADERA_FLL1_N_SHIFT 0 -#define MADERA_FLL1_N_WIDTH 10 - -/* (0x0173) FLL1_Control_3 */ -#define MADERA_FLL1_THETA_MASK 0xFFFF -#define MADERA_FLL1_THETA_SHIFT 0 -#define MADERA_FLL1_THETA_WIDTH 16 - -/* (0x0174) FLL1_Control_4 */ -#define MADERA_FLL1_LAMBDA_MASK 0xFFFF -#define MADERA_FLL1_LAMBDA_SHIFT 0 -#define MADERA_FLL1_LAMBDA_WIDTH 16 - -/* (0x0175) FLL1_Control_5 */ -#define MADERA_FLL1_FRATIO_MASK 0x0F00 -#define MADERA_FLL1_FRATIO_SHIFT 8 -#define MADERA_FLL1_FRATIO_WIDTH 4 - -/* (0x0176) FLL1_Control_6 */ -#define MADERA_FLL1_REFCLK_DIV_MASK 0x00C0 -#define MADERA_FLL1_REFCLK_DIV_SHIFT 6 -#define MADERA_FLL1_REFCLK_DIV_WIDTH 2 -#define MADERA_FLL1_REFCLK_SRC_MASK 0x000F -#define MADERA_FLL1_REFCLK_SRC_SHIFT 0 -#define MADERA_FLL1_REFCLK_SRC_WIDTH 4 - -/* (0x0177) FLL1_Loop_Filter_Test_1 */ -#define MADERA_FLL1_FRC_INTEG_UPD 0x8000 -#define MADERA_FLL1_FRC_INTEG_UPD_MASK 0x8000 -#define MADERA_FLL1_FRC_INTEG_UPD_SHIFT 15 -#define MADERA_FLL1_FRC_INTEG_UPD_WIDTH 1 -#define MADERA_FLL1_FRC_INTEG_VAL_MASK 0x0FFF -#define MADERA_FLL1_FRC_INTEG_VAL_SHIFT 0 -#define MADERA_FLL1_FRC_INTEG_VAL_WIDTH 12 - -/* (0x0179) FLL1_Control_7 */ -#define MADERA_FLL1_GAIN_MASK 0x003c -#define MADERA_FLL1_GAIN_SHIFT 2 -#define MADERA_FLL1_GAIN_WIDTH 4 - -/* (0x017A) FLL1_EFS_2 */ -#define MADERA_FLL1_PHASE_GAIN_MASK 0xF000 -#define MADERA_FLL1_PHASE_GAIN_SHIFT 12 -#define MADERA_FLL1_PHASE_GAIN_WIDTH 4 -#define MADERA_FLL1_PHASE_ENA_MASK 0x0800 -#define MADERA_FLL1_PHASE_ENA_SHIFT 11 -#define MADERA_FLL1_PHASE_ENA_WIDTH 1 - -/* (0x0181) FLL1_Synchroniser_1 */ -#define MADERA_FLL1_SYNC_ENA 0x0001 -#define MADERA_FLL1_SYNC_ENA_MASK 0x0001 -#define MADERA_FLL1_SYNC_ENA_SHIFT 0 -#define MADERA_FLL1_SYNC_ENA_WIDTH 1 - -/* (0x0182) FLL1_Synchroniser_2 */ -#define MADERA_FLL1_SYNC_N_MASK 0x03FF -#define MADERA_FLL1_SYNC_N_SHIFT 0 -#define MADERA_FLL1_SYNC_N_WIDTH 10 - -/* (0x0183) FLL1_Synchroniser_3 */ -#define MADERA_FLL1_SYNC_THETA_MASK 0xFFFF -#define MADERA_FLL1_SYNC_THETA_SHIFT 0 -#define MADERA_FLL1_SYNC_THETA_WIDTH 16 - -/* (0x0184) FLL1_Synchroniser_4 */ -#define MADERA_FLL1_SYNC_LAMBDA_MASK 0xFFFF -#define MADERA_FLL1_SYNC_LAMBDA_SHIFT 0 -#define MADERA_FLL1_SYNC_LAMBDA_WIDTH 16 - -/* (0x0185) FLL1_Synchroniser_5 */ -#define MADERA_FLL1_SYNC_FRATIO_MASK 0x0700 -#define MADERA_FLL1_SYNC_FRATIO_SHIFT 8 -#define MADERA_FLL1_SYNC_FRATIO_WIDTH 3 - -/* (0x0186) FLL1_Synchroniser_6 */ -#define MADERA_FLL1_SYNCCLK_DIV_MASK 0x00C0 -#define MADERA_FLL1_SYNCCLK_DIV_SHIFT 6 -#define MADERA_FLL1_SYNCCLK_DIV_WIDTH 2 -#define MADERA_FLL1_SYNCCLK_SRC_MASK 0x000F -#define MADERA_FLL1_SYNCCLK_SRC_SHIFT 0 -#define MADERA_FLL1_SYNCCLK_SRC_WIDTH 4 - -/* (0x0187) FLL1_Synchroniser_7 */ -#define MADERA_FLL1_SYNC_GAIN_MASK 0x003c -#define MADERA_FLL1_SYNC_GAIN_SHIFT 2 -#define MADERA_FLL1_SYNC_GAIN_WIDTH 4 -#define MADERA_FLL1_SYNC_DFSAT 0x0001 -#define MADERA_FLL1_SYNC_DFSAT_MASK 0x0001 -#define MADERA_FLL1_SYNC_DFSAT_SHIFT 0 -#define MADERA_FLL1_SYNC_DFSAT_WIDTH 1 - -/* (0x0189) FLL1_Spread_Spectrum */ -#define MADERA_FLL1_SS_AMPL_MASK 0x0030 -#define MADERA_FLL1_SS_AMPL_SHIFT 4 -#define MADERA_FLL1_SS_AMPL_WIDTH 2 -#define MADERA_FLL1_SS_FREQ_MASK 0x000C -#define MADERA_FLL1_SS_FREQ_SHIFT 2 -#define MADERA_FLL1_SS_FREQ_WIDTH 2 -#define MADERA_FLL1_SS_SEL_MASK 0x0003 -#define MADERA_FLL1_SS_SEL_SHIFT 0 -#define MADERA_FLL1_SS_SEL_WIDTH 2 - -/* (0x018A) FLL1_GPIO_Clock */ -#define MADERA_FLL1_GPCLK_DIV_MASK 0x00FE -#define MADERA_FLL1_GPCLK_DIV_SHIFT 1 -#define MADERA_FLL1_GPCLK_DIV_WIDTH 7 -#define MADERA_FLL1_GPCLK_ENA 0x0001 -#define MADERA_FLL1_GPCLK_ENA_MASK 0x0001 -#define MADERA_FLL1_GPCLK_ENA_SHIFT 0 -#define MADERA_FLL1_GPCLK_ENA_WIDTH 1 - -/* (0x0191) FLL2_Control_1 */ -#define MADERA_FLL2_FREERUN 0x0002 -#define MADERA_FLL2_FREERUN_MASK 0x0002 -#define MADERA_FLL2_FREERUN_SHIFT 1 -#define MADERA_FLL2_FREERUN_WIDTH 1 -#define MADERA_FLL2_ENA 0x0001 -#define MADERA_FLL2_ENA_MASK 0x0001 -#define MADERA_FLL2_ENA_SHIFT 0 -#define MADERA_FLL2_ENA_WIDTH 1 - -/* (0x0192) FLL2_Control_2 */ -#define MADERA_FLL2_CTRL_UPD 0x8000 -#define MADERA_FLL2_CTRL_UPD_MASK 0x8000 -#define MADERA_FLL2_CTRL_UPD_SHIFT 15 -#define MADERA_FLL2_CTRL_UPD_WIDTH 1 -#define MADERA_FLL2_N_MASK 0x03FF -#define MADERA_FLL2_N_SHIFT 0 -#define MADERA_FLL2_N_WIDTH 10 - -/* (0x0193) FLL2_Control_3 */ -#define MADERA_FLL2_THETA_MASK 0xFFFF -#define MADERA_FLL2_THETA_SHIFT 0 -#define MADERA_FLL2_THETA_WIDTH 16 - -/* (0x0194) FLL2_Control_4 */ -#define MADERA_FLL2_LAMBDA_MASK 0xFFFF -#define MADERA_FLL2_LAMBDA_SHIFT 0 -#define MADERA_FLL2_LAMBDA_WIDTH 16 - -/* (0x0195) FLL2_Control_5 */ -#define MADERA_FLL2_FRATIO_MASK 0x0700 -#define MADERA_FLL2_FRATIO_SHIFT 8 -#define MADERA_FLL2_FRATIO_WIDTH 3 - -/* (0x0196) FLL2_Control_6 */ -#define MADERA_FLL2_REFCLK_DIV_MASK 0x00C0 -#define MADERA_FLL2_REFCLK_DIV_SHIFT 6 -#define MADERA_FLL2_REFCLK_DIV_WIDTH 2 -#define MADERA_FLL2_REFCLK_SRC_MASK 0x000F -#define MADERA_FLL2_REFCLK_SRC_SHIFT 0 -#define MADERA_FLL2_REFCLK_SRC_WIDTH 4 - -/* (0x0197) FLL2_Loop_Filter_Test_1 */ -#define MADERA_FLL2_FRC_INTEG_UPD 0x8000 -#define MADERA_FLL2_FRC_INTEG_UPD_MASK 0x8000 -#define MADERA_FLL2_FRC_INTEG_UPD_SHIFT 15 -#define MADERA_FLL2_FRC_INTEG_UPD_WIDTH 1 -#define MADERA_FLL2_FRC_INTEG_VAL_MASK 0x0FFF -#define MADERA_FLL2_FRC_INTEG_VAL_SHIFT 0 -#define MADERA_FLL2_FRC_INTEG_VAL_WIDTH 12 - -/* (0x0199) FLL2_Control_7 */ -#define MADERA_FLL2_GAIN_MASK 0x003c -#define MADERA_FLL2_GAIN_SHIFT 2 -#define MADERA_FLL2_GAIN_WIDTH 4 - -/* (0x019A) FLL2_EFS_2 */ -#define MADERA_FLL2_PHASE_GAIN_MASK 0xF000 -#define MADERA_FLL2_PHASE_GAIN_SHIFT 12 -#define MADERA_FLL2_PHASE_GAIN_WIDTH 4 -#define MADERA_FLL2_PHASE_ENA_MASK 0x0800 -#define MADERA_FLL2_PHASE_ENA_SHIFT 11 -#define MADERA_FLL2_PHASE_ENA_WIDTH 1 - -/* (0x01A1) FLL2_Synchroniser_1 */ -#define MADERA_FLL2_SYNC_ENA 0x0001 -#define MADERA_FLL2_SYNC_ENA_MASK 0x0001 -#define MADERA_FLL2_SYNC_ENA_SHIFT 0 -#define MADERA_FLL2_SYNC_ENA_WIDTH 1 - -/* (0x01A2) FLL2_Synchroniser_2 */ -#define MADERA_FLL2_SYNC_N_MASK 0x03FF -#define MADERA_FLL2_SYNC_N_SHIFT 0 -#define MADERA_FLL2_SYNC_N_WIDTH 10 - -/* (0x01A3) FLL2_Synchroniser_3 */ -#define MADERA_FLL2_SYNC_THETA_MASK 0xFFFF -#define MADERA_FLL2_SYNC_THETA_SHIFT 0 -#define MADERA_FLL2_SYNC_THETA_WIDTH 16 - -/* (0x01A4) FLL2_Synchroniser_4 */ -#define MADERA_FLL2_SYNC_LAMBDA_MASK 0xFFFF -#define MADERA_FLL2_SYNC_LAMBDA_SHIFT 0 -#define MADERA_FLL2_SYNC_LAMBDA_WIDTH 16 - -/* (0x01A5) FLL2_Synchroniser_5 */ -#define MADERA_FLL2_SYNC_FRATIO_MASK 0x0700 -#define MADERA_FLL2_SYNC_FRATIO_SHIFT 8 -#define MADERA_FLL2_SYNC_FRATIO_WIDTH 3 - -/* (0x01A6) FLL2_Synchroniser_6 */ -#define MADERA_FLL2_SYNCCLK_DIV_MASK 0x00C0 -#define MADERA_FLL2_SYNCCLK_DIV_SHIFT 6 -#define MADERA_FLL2_SYNCCLK_DIV_WIDTH 2 -#define MADERA_FLL2_SYNCCLK_SRC_MASK 0x000F -#define MADERA_FLL2_SYNCCLK_SRC_SHIFT 0 -#define MADERA_FLL2_SYNCCLK_SRC_WIDTH 4 - -/* (0x01A7) FLL2_Synchroniser_7 */ -#define MADERA_FLL2_SYNC_GAIN_MASK 0x003c -#define MADERA_FLL2_SYNC_GAIN_SHIFT 2 -#define MADERA_FLL2_SYNC_GAIN_WIDTH 4 -#define MADERA_FLL2_SYNC_DFSAT 0x0001 -#define MADERA_FLL2_SYNC_DFSAT_MASK 0x0001 -#define MADERA_FLL2_SYNC_DFSAT_SHIFT 0 -#define MADERA_FLL2_SYNC_DFSAT_WIDTH 1 - -/* (0x01A9) FLL2_Spread_Spectrum */ -#define MADERA_FLL2_SS_AMPL_MASK 0x0030 -#define MADERA_FLL2_SS_AMPL_SHIFT 4 -#define MADERA_FLL2_SS_AMPL_WIDTH 2 -#define MADERA_FLL2_SS_FREQ_MASK 0x000C -#define MADERA_FLL2_SS_FREQ_SHIFT 2 -#define MADERA_FLL2_SS_FREQ_WIDTH 2 -#define MADERA_FLL2_SS_SEL_MASK 0x0003 -#define MADERA_FLL2_SS_SEL_SHIFT 0 -#define MADERA_FLL2_SS_SEL_WIDTH 2 - -/* (0x01AA) FLL2_GPIO_Clock */ -#define MADERA_FLL2_GPCLK_DIV_MASK 0x00FE -#define MADERA_FLL2_GPCLK_DIV_SHIFT 1 -#define MADERA_FLL2_GPCLK_DIV_WIDTH 7 -#define MADERA_FLL2_GPCLK_ENA 0x0001 -#define MADERA_FLL2_GPCLK_ENA_MASK 0x0001 -#define MADERA_FLL2_GPCLK_ENA_SHIFT 0 -#define MADERA_FLL2_GPCLK_ENA_WIDTH 1 - -/* (0x01B1) FLL3_Control_1 */ -#define MADERA_FLL3_FREERUN 0x0002 -#define MADERA_FLL3_FREERUN_MASK 0x0002 -#define MADERA_FLL3_FREERUN_SHIFT 1 -#define MADERA_FLL3_FREERUN_WIDTH 1 -#define MADERA_FLL3_ENA 0x0001 -#define MADERA_FLL3_ENA_MASK 0x0001 -#define MADERA_FLL3_ENA_SHIFT 0 -#define MADERA_FLL3_ENA_WIDTH 1 - -/* (0x01B2) FLL3_Control_2 */ -#define MADERA_FLL3_CTRL_UPD 0x8000 -#define MADERA_FLL3_CTRL_UPD_MASK 0x8000 -#define MADERA_FLL3_CTRL_UPD_SHIFT 15 -#define MADERA_FLL3_CTRL_UPD_WIDTH 1 -#define MADERA_FLL3_N_MASK 0x03FF -#define MADERA_FLL3_N_SHIFT 0 -#define MADERA_FLL3_N_WIDTH 10 - -/* (0x01B3) FLL3_Control_3 */ -#define MADERA_FLL3_THETA_MASK 0xFFFF -#define MADERA_FLL3_THETA_SHIFT 0 -#define MADERA_FLL3_THETA_WIDTH 16 - -/* (0x01B4) FLL3_Control_4 */ -#define MADERA_FLL3_LAMBDA_MASK 0xFFFF -#define MADERA_FLL3_LAMBDA_SHIFT 0 -#define MADERA_FLL3_LAMBDA_WIDTH 16 - -/* (0x01B5) FLL3_Control_5 */ -#define MADERA_FLL3_FRATIO_MASK 0x0700 -#define MADERA_FLL3_FRATIO_SHIFT 8 -#define MADERA_FLL3_FRATIO_WIDTH 3 - -/* (0x01B6) FLL3_Control_6 */ -#define MADERA_FLL3_REFCLK_DIV_MASK 0x00C0 -#define MADERA_FLL3_REFCLK_DIV_SHIFT 6 -#define MADERA_FLL3_REFCLK_DIV_WIDTH 2 -#define MADERA_FLL3_REFCLK_SRC_MASK 0x000F -#define MADERA_FLL3_REFCLK_SRC_SHIFT 0 -#define MADERA_FLL3_REFCLK_SRC_WIDTH 4 - -/* (0x01B7) FLL3_Loop_Filter_Test_1 */ -#define MADERA_FLL3_FRC_INTEG_UPD 0x8000 -#define MADERA_FLL3_FRC_INTEG_UPD_MASK 0x8000 -#define MADERA_FLL3_FRC_INTEG_UPD_SHIFT 15 -#define MADERA_FLL3_FRC_INTEG_UPD_WIDTH 1 -#define MADERA_FLL3_FRC_INTEG_VAL_MASK 0x0FFF -#define MADERA_FLL3_FRC_INTEG_VAL_SHIFT 0 -#define MADERA_FLL3_FRC_INTEG_VAL_WIDTH 12 - -/* (0x01B9) FLL3_Control_7 */ -#define MADERA_FLL3_GAIN_MASK 0x003c -#define MADERA_FLL3_GAIN_SHIFT 2 -#define MADERA_FLL3_GAIN_WIDTH 4 - -/* (0x01C1) FLL3_Synchroniser_1 */ -#define MADERA_FLL3_SYNC_ENA 0x0001 -#define MADERA_FLL3_SYNC_ENA_MASK 0x0001 -#define MADERA_FLL3_SYNC_ENA_SHIFT 0 -#define MADERA_FLL3_SYNC_ENA_WIDTH 1 - -/* (0x01C2) FLL3_Synchroniser_2 */ -#define MADERA_FLL3_SYNC_N_MASK 0x03FF -#define MADERA_FLL3_SYNC_N_SHIFT 0 -#define MADERA_FLL3_SYNC_N_WIDTH 10 - -/* (0x01C3) FLL3_Synchroniser_3 */ -#define MADERA_FLL3_SYNC_THETA_MASK 0xFFFF -#define MADERA_FLL3_SYNC_THETA_SHIFT 0 -#define MADERA_FLL3_SYNC_THETA_WIDTH 16 - -/* (0x01C4) FLL3_Synchroniser_4 */ -#define MADERA_FLL3_SYNC_LAMBDA_MASK 0xFFFF -#define MADERA_FLL3_SYNC_LAMBDA_SHIFT 0 -#define MADERA_FLL3_SYNC_LAMBDA_WIDTH 16 - -/* (0x01C5) FLL3_Synchroniser_5 */ -#define MADERA_FLL3_SYNC_FRATIO_MASK 0x0700 -#define MADERA_FLL3_SYNC_FRATIO_SHIFT 8 -#define MADERA_FLL3_SYNC_FRATIO_WIDTH 3 - -/* (0x01C6) FLL3_Synchroniser_6 */ -#define MADERA_FLL3_SYNCCLK_DIV_MASK 0x00C0 -#define MADERA_FLL3_SYNCCLK_DIV_SHIFT 6 -#define MADERA_FLL3_SYNCCLK_DIV_WIDTH 2 -#define MADERA_FLL3_SYNCCLK_SRC_MASK 0x000F -#define MADERA_FLL3_SYNCCLK_SRC_SHIFT 0 -#define MADERA_FLL3_SYNCCLK_SRC_WIDTH 4 - -/* (0x01C7) FLL3_Synchroniser_7 */ -#define MADERA_FLL3_SYNC_GAIN_MASK 0x003c -#define MADERA_FLL3_SYNC_GAIN_SHIFT 2 -#define MADERA_FLL3_SYNC_GAIN_WIDTH 4 -#define MADERA_FLL3_SYNC_DFSAT 0x0001 -#define MADERA_FLL3_SYNC_DFSAT_MASK 0x0001 -#define MADERA_FLL3_SYNC_DFSAT_SHIFT 0 -#define MADERA_FLL3_SYNC_DFSAT_WIDTH 1 - -/* (0x01C9) FLL3_Spread_Spectrum */ -#define MADERA_FLL3_SS_AMPL_MASK 0x0030 -#define MADERA_FLL3_SS_AMPL_SHIFT 4 -#define MADERA_FLL3_SS_AMPL_WIDTH 2 -#define MADERA_FLL3_SS_FREQ_MASK 0x000C -#define MADERA_FLL3_SS_FREQ_SHIFT 2 -#define MADERA_FLL3_SS_FREQ_WIDTH 2 -#define MADERA_FLL3_SS_SEL_MASK 0x0003 -#define MADERA_FLL3_SS_SEL_SHIFT 0 -#define MADERA_FLL3_SS_SEL_WIDTH 2 - -/* (0x01CA) FLL3_GPIO_Clock */ -#define MADERA_FLL3_GPCLK_DIV_MASK 0x00FE -#define MADERA_FLL3_GPCLK_DIV_SHIFT 1 -#define MADERA_FLL3_GPCLK_DIV_WIDTH 7 -#define MADERA_FLL3_GPCLK_DIV_ENA 0x0001 -#define MADERA_FLL3_GPCLK_DIV_ENA_MASK 0x0001 -#define MADERA_FLL3_GPCLK_DIV_ENA_SHIFT 0 -#define MADERA_FLL3_GPCLK_DIV_ENA_WIDTH 1 - -/* (0x01D1) FLL_AO_Control_1 */ -#define MADERA_FLL_AO_HOLD 0x0004 -#define MADERA_FLL_AO_HOLD_MASK 0x0004 -#define MADERA_FLL_AO_HOLD_SHIFT 2 -#define MADERA_FLL_AO_HOLD_WIDTH 1 -#define MADERA_FLL_AO_FREERUN 0x0002 -#define MADERA_FLL_AO_FREERUN_MASK 0x0002 -#define MADERA_FLL_AO_FREERUN_SHIFT 1 -#define MADERA_FLL_AO_FREERUN_WIDTH 1 -#define MADERA_FLL_AO_ENA 0x0001 -#define MADERA_FLL_AO_ENA_MASK 0x0001 -#define MADERA_FLL_AO_ENA_SHIFT 0 -#define MADERA_FLL_AO_ENA_WIDTH 1 - -/* (0x01D2) FLL_AO_Control_2 */ -#define MADERA_FLL_AO_CTRL_UPD 0x8000 -#define MADERA_FLL_AO_CTRL_UPD_MASK 0x8000 -#define MADERA_FLL_AO_CTRL_UPD_SHIFT 15 -#define MADERA_FLL_AO_CTRL_UPD_WIDTH 1 -#define MADERA_FLL_AO_N_MASK 0x03FF -#define MADERA_FLL_AO_N_SHIFT 0 -#define MADERA_FLL_AO_N_WIDTH 10 - -/* (0x01D3) FLL_AO_Control_3 */ -#define MADERA_FLL_AO_THETA_MASK 0x00FF -#define MADERA_FLL_AO_THETA_SHIFT 0 -#define MADERA_FLL_AO_THETA_WIDTH 8 - -/* (0x01D4) FLL_AO_Control_4 */ -#define MADERA_FLL_AO_LAMBDA_MASK 0x00FF -#define MADERA_FLL_AO_LAMBDA_SHIFT 0 -#define MADERA_FLL_AO_LAMBDA_WIDTH 8 - -/* (0x01D5) FLL_AO_Control_5 */ -#define MADERA_FLL_AO_FB_DIV_MASK 0x00FF -#define MADERA_FLL_AO_FB_DIV_SHIFT 0 -#define MADERA_FLL_AO_FB_DIV_WIDTH 8 - -/* (0x01D6) FLL_AO_Control_6 */ -#define MADERA_FLL_AO_REFDET_ENA 0x8000 -#define MADERA_FLL_AO_REFDET_ENA_MASK 0x8000 -#define MADERA_FLL_AO_REFDET_ENA_SHIFT 15 -#define MADERA_FLL_AO_REFDET_ENA_WIDTH 1 -#define MADERA_FLL_AO_REFCLK_DIV_MASK 0x00C0 -#define MADERA_FLL_AO_REFCLK_DIV_SHIFT 6 -#define MADERA_FLL_AO_REFCLK_DIV_WIDTH 2 -#define MADERA_FLL_AO_REFCLK_SRC_MASK 0x000F -#define MADERA_FLL_AO_REFCLK_SRC_SHIFT 0 -#define MADERA_FLL_AO_REFCLK_SRC_WIDTH 4 - -/* (0x01D8) FLL_AO_Control_7 */ -#define MADERA_FLL_AO_GAIN_MASK 0x000F -#define MADERA_FLL_AO_GAIN_SHIFT 0 -#define MADERA_FLL_AO_GAIN_WIDTH 4 - -/* (0x01DA) FLL_AO_Control_8 */ -#define MADERA_FLL_AO_HS_DITH_TUNE_MASK 0xF000 -#define MADERA_FLL_AO_HS_DITH_TUNE_SHIFT 12 -#define MADERA_FLL_AO_HS_DITH_TUNE_WIDTH 4 -#define MADERA_FLL_AO_LS_DITH_TUNE_SHAPED_MASK 0x00F0 -#define MADERA_FLL_AO_LS_DITH_TUNE_SHAPED_SHIFT 4 -#define MADERA_FLL_AO_LS_DITH_TUNE_SHAPED_WIDTH 4 -#define MADERA_FLL_AO_LS_DITH_TUNE_NONSHAPED_MASK 0x000F -#define MADERA_FLL_AO_LS_DITH_TUNE_NONSHAPED_SHIFT 0 -#define MADERA_FLL_AO_LS_DITH_TUNE_NONSHAPED_WIDTH 4 - -/* (0x01DB) FLL_AO_Control_9 */ -#define MADERA_FLL_AO_TR_RATE_MASK 0x000F -#define MADERA_FLL_AO_TR_RATE_SHIFT 0 -#define MADERA_FLL_AO_TR_RATE_WIDTH 4 - -/* (0x01DC) FLL_AO_Control_10 */ -#define MADERA_FLL_AO_PHASEDET_ENA 0x1000 -#define MADERA_FLL_AO_PHASEDET_ENA_MASK 0x1000 -#define MADERA_FLL_AO_PHASEDET_ENA_SHIFT 12 -#define MADERA_FLL_AO_PHASEDET_ENA_WIDTH 1 -#define MADERA_FLL_AO_WLR_SDM_FRC_ENA 0x0800 -#define MADERA_FLL_AO_WLR_SDM_FRC_ENA_MASK 0x0800 -#define MADERA_FLL_AO_WLR_SDM_FRC_ENA_SHIFT 11 -#define MADERA_FLL_AO_WLR_SDM_FRC_ENA_WIDTH 1 -#define MADERA_FLL_AO_WLR_SDM_ENA 0x0400 -#define MADERA_FLL_AO_WLR_SDM_ENA_MASK 0x0400 -#define MADERA_FLL_AO_WLR_SDM_ENA_SHIFT 10 -#define MADERA_FLL_AO_WLR_SDM_ENA_WIDTH 1 -#define MADERA_FLL_AO_SYNC_EFS_ENA 0x0200 -#define MADERA_FLL_AO_SYNC_EFS_ENA_MASK 0x0200 -#define MADERA_FLL_AO_SYNC_EFS_ENA_SHIFT 9 -#define MADERA_FLL_AO_SYNC_EFS_ENA_WIDTH 1 -#define MADERA_FLL_AO_LS_DITH_ENA 0x0080 -#define MADERA_FLL_AO_LS_DITH_ENA_MASK 0x0080 -#define MADERA_FLL_AO_LS_DITH_ENA_SHIFT 7 -#define MADERA_FLL_AO_LS_DITH_ENA_WIDTH 1 -#define MADERA_FLL_AO_HS_DITH_ENA 0x0040 -#define MADERA_FLL_AO_HS_DITH_ENA_MASK 0x0040 -#define MADERA_FLL_AO_HS_DITH_ENA_SHIFT 6 -#define MADERA_FLL_AO_HS_DITH_ENA_WIDTH 1 -#define MADERA_FLL_AO_OSF_FRC_ENA 0x0010 -#define MADERA_FLL_AO_OSF_FRC_ENA_MASK 0x0010 -#define MADERA_FLL_AO_OSF_FRC_ENA_SHIFT 4 -#define MADERA_FLL_AO_OSF_FRC_ENA_WIDTH 1 -#define MADERA_FLL_AO_OSF_ENA 0x0008 -#define MADERA_FLL_AO_OSF_ENA_MASK 0x0008 -#define MADERA_FLL_AO_OSF_ENA_SHIFT 3 -#define MADERA_FLL_AO_OSF_ENA_WIDTH 1 -#define MADERA_FLL_AO_AUTO_DFSAT_ENA 0x0002 -#define MADERA_FLL_AO_AUTO_DFSAT_ENA_MASK 0x0002 -#define MADERA_FLL_AO_AUTO_DFSAT_ENA_SHIFT 1 -#define MADERA_FLL_AO_AUTO_DFSAT_ENA_WIDTH 1 -#define MADERA_FLL_AO_DFSAT_ENA 0x0001 -#define MADERA_FLL_AO_DFSAT_ENA_MASK 0x0001 -#define MADERA_FLL_AO_DFSAT_ENA_SHIFT 0 -#define MADERA_FLL_AO_DFSAT_ENA_WIDTH 1 - -/* (0x01DD) FLL_AO_Control_11 */ -#define MADERA_FLL_AO_LOCKDET_PHASE_MASK 0x0080 -#define MADERA_FLL_AO_LOCKDET_PHASE_MASK_MASK 0x0080 -#define MADERA_FLL_AO_LOCKDET_PHASE_MASK_SHIFT 7 -#define MADERA_FLL_AO_LOCKDET_PHASE_MASK_WIDTH 1 -#define MADERA_FLL_AO_LOCKDET_THR_MASK 0x001E -#define MADERA_FLL_AO_LOCKDET_THR_SHIFT 1 -#define MADERA_FLL_AO_LOCKDET_THR_WIDTH 4 -#define MADERA_FLL_AO_LOCKDET_ENA 0x0001 -#define MADERA_FLL_AO_LOCKDET_ENA_MASK 0x0001 -#define MADERA_FLL_AO_LOCKDET_ENA_SHIFT 0 -#define MADERA_FLL_AO_LOCKDET_ENA_WIDTH 1 - -/* (0x0200) Mic_Charge_Pump_1 */ -#define MADERA_CPMIC_DISCH 0x0004 -#define MADERA_CPMIC_DISCH_MASK 0x0004 -#define MADERA_CPMIC_DISCH_SHIFT 2 -#define MADERA_CPMIC_DISCH_WIDTH 1 -#define MADERA_CPMIC_BYPASS 0x0002 -#define MADERA_CPMIC_BYPASS_MASK 0x0002 -#define MADERA_CPMIC_BYPASS_SHIFT 1 -#define MADERA_CPMIC_BYPASS_WIDTH 1 -#define MADERA_CPMIC_ENA 0x0001 -#define MADERA_CPMIC_ENA_MASK 0x0001 -#define MADERA_CPMIC_ENA_SHIFT 0 -#define MADERA_CPMIC_ENA_WIDTH 1 - -/* (0x0210) LDO1_Control_1 */ -#define MADERA_LDO1_VSEL_MASK 0x07E0 -#define MADERA_LDO1_VSEL_SHIFT 5 -#define MADERA_LDO1_VSEL_WIDTH 6 -#define MADERA_LDO1_FAST 0x0010 -#define MADERA_LDO1_FAST_MASK 0x0010 -#define MADERA_LDO1_FAST_SHIFT 4 -#define MADERA_LDO1_FAST_WIDTH 1 -#define MADERA_LDO1_DISCH 0x0004 -#define MADERA_LDO1_DISCH_MASK 0x0004 -#define MADERA_LDO1_DISCH_SHIFT 2 -#define MADERA_LDO1_DISCH_WIDTH 1 -#define MADERA_LDO1_BYPASS 0x0002 -#define MADERA_LDO1_BYPASS_MASK 0x0002 -#define MADERA_LDO1_BYPASS_SHIFT 1 -#define MADERA_LDO1_BYPASS_WIDTH 1 -#define MADERA_LDO1_ENA 0x0001 -#define MADERA_LDO1_ENA_MASK 0x0001 -#define MADERA_LDO1_ENA_SHIFT 0 -#define MADERA_LDO1_ENA_WIDTH 1 - -/* (0x0213) LDO2_Control_1 */ -#define MADERA_LDO2_VSEL_MASK 0x07E0 -#define MADERA_LDO2_VSEL_SHIFT 5 -#define MADERA_LDO2_VSEL_WIDTH 6 -#define MADERA_LDO2_FAST 0x0010 -#define MADERA_LDO2_FAST_MASK 0x0010 -#define MADERA_LDO2_FAST_SHIFT 4 -#define MADERA_LDO2_FAST_WIDTH 1 -#define MADERA_LDO2_DISCH 0x0004 -#define MADERA_LDO2_DISCH_MASK 0x0004 -#define MADERA_LDO2_DISCH_SHIFT 2 -#define MADERA_LDO2_DISCH_WIDTH 1 -#define MADERA_LDO2_BYPASS 0x0002 -#define MADERA_LDO2_BYPASS_MASK 0x0002 -#define MADERA_LDO2_BYPASS_SHIFT 1 -#define MADERA_LDO2_BYPASS_WIDTH 1 -#define MADERA_LDO2_ENA 0x0001 -#define MADERA_LDO2_ENA_MASK 0x0001 -#define MADERA_LDO2_ENA_SHIFT 0 -#define MADERA_LDO2_ENA_WIDTH 1 - -/* (0x0218) Mic_Bias_Ctrl_1 */ -#define MADERA_MICB1_EXT_CAP 0x8000 -#define MADERA_MICB1_EXT_CAP_MASK 0x8000 -#define MADERA_MICB1_EXT_CAP_SHIFT 15 -#define MADERA_MICB1_EXT_CAP_WIDTH 1 -#define MADERA_MICB1_LVL_MASK 0x01E0 -#define MADERA_MICB1_LVL_SHIFT 5 -#define MADERA_MICB1_LVL_WIDTH 4 -#define MADERA_MICB1_FAST 0x0010 -#define MADERA_MICB1_FAST_MASK 0x0010 -#define MADERA_MICB1_FAST_SHIFT 4 -#define MADERA_MICB1_FAST_WIDTH 1 -#define MADERA_MICB1_RATE 0x0008 -#define MADERA_MICB1_RATE_MASK 0x0008 -#define MADERA_MICB1_RATE_SHIFT 3 -#define MADERA_MICB1_RATE_WIDTH 1 -#define MADERA_MICB1_DISCH 0x0004 -#define MADERA_MICB1_DISCH_MASK 0x0004 -#define MADERA_MICB1_DISCH_SHIFT 2 -#define MADERA_MICB1_DISCH_WIDTH 1 -#define MADERA_MICB1_BYPASS 0x0002 -#define MADERA_MICB1_BYPASS_MASK 0x0002 -#define MADERA_MICB1_BYPASS_SHIFT 1 -#define MADERA_MICB1_BYPASS_WIDTH 1 -#define MADERA_MICB1_ENA 0x0001 -#define MADERA_MICB1_ENA_MASK 0x0001 -#define MADERA_MICB1_ENA_SHIFT 0 -#define MADERA_MICB1_ENA_WIDTH 1 - -/* (0x0219) Mic_Bias_Ctrl_2 */ -#define MADERA_MICB2_EXT_CAP 0x8000 -#define MADERA_MICB2_EXT_CAP_MASK 0x8000 -#define MADERA_MICB2_EXT_CAP_SHIFT 15 -#define MADERA_MICB2_EXT_CAP_WIDTH 1 -#define MADERA_MICB2_LVL_MASK 0x01E0 -#define MADERA_MICB2_LVL_SHIFT 5 -#define MADERA_MICB2_LVL_WIDTH 4 -#define MADERA_MICB2_FAST 0x0010 -#define MADERA_MICB2_FAST_MASK 0x0010 -#define MADERA_MICB2_FAST_SHIFT 4 -#define MADERA_MICB2_FAST_WIDTH 1 -#define MADERA_MICB2_RATE 0x0008 -#define MADERA_MICB2_RATE_MASK 0x0008 -#define MADERA_MICB2_RATE_SHIFT 3 -#define MADERA_MICB2_RATE_WIDTH 1 -#define MADERA_MICB2_DISCH 0x0004 -#define MADERA_MICB2_DISCH_MASK 0x0004 -#define MADERA_MICB2_DISCH_SHIFT 2 -#define MADERA_MICB2_DISCH_WIDTH 1 -#define MADERA_MICB2_BYPASS 0x0002 -#define MADERA_MICB2_BYPASS_MASK 0x0002 -#define MADERA_MICB2_BYPASS_SHIFT 1 -#define MADERA_MICB2_BYPASS_WIDTH 1 -#define MADERA_MICB2_ENA 0x0001 -#define MADERA_MICB2_ENA_MASK 0x0001 -#define MADERA_MICB2_ENA_SHIFT 0 -#define MADERA_MICB2_ENA_WIDTH 1 - -/* (0x021A) Mic_Bias_Ctrl_3 */ -#define MADERA_MICB3_EXT_CAP 0x8000 -#define MADERA_MICB3_EXT_CAP_MASK 0x8000 -#define MADERA_MICB3_EXT_CAP_SHIFT 15 -#define MADERA_MICB3_EXT_CAP_WIDTH 1 -#define MADERA_MICB3_LVL_MASK 0x01E0 -#define MADERA_MICB3_LVL_SHIFT 5 -#define MADERA_MICB3_LVL_WIDTH 4 -#define MADERA_MICB3_FAST 0x0010 -#define MADERA_MICB3_FAST_MASK 0x0010 -#define MADERA_MICB3_FAST_SHIFT 4 -#define MADERA_MICB3_FAST_WIDTH 1 -#define MADERA_MICB3_RATE 0x0008 -#define MADERA_MICB3_RATE_MASK 0x0008 -#define MADERA_MICB3_RATE_SHIFT 3 -#define MADERA_MICB3_RATE_WIDTH 1 -#define MADERA_MICB3_DISCH 0x0004 -#define MADERA_MICB3_DISCH_MASK 0x0004 -#define MADERA_MICB3_DISCH_SHIFT 2 -#define MADERA_MICB3_DISCH_WIDTH 1 -#define MADERA_MICB3_BYPASS 0x0002 -#define MADERA_MICB3_BYPASS_MASK 0x0002 -#define MADERA_MICB3_BYPASS_SHIFT 1 -#define MADERA_MICB3_BYPASS_WIDTH 1 -#define MADERA_MICB3_ENA 0x0001 -#define MADERA_MICB3_ENA_MASK 0x0001 -#define MADERA_MICB3_ENA_SHIFT 0 -#define MADERA_MICB3_ENA_WIDTH 1 - -/* (0x021B) Mic_Bias_Ctrl_4 */ -#define MADERA_MICB4_EXT_CAP 0x8000 -#define MADERA_MICB4_EXT_CAP_MASK 0x8000 -#define MADERA_MICB4_EXT_CAP_SHIFT 15 -#define MADERA_MICB4_EXT_CAP_WIDTH 1 -#define MADERA_MICB4_LVL_MASK 0x01E0 -#define MADERA_MICB4_LVL_SHIFT 5 -#define MADERA_MICB4_LVL_WIDTH 4 -#define MADERA_MICB4_FAST 0x0010 -#define MADERA_MICB4_FAST_MASK 0x0010 -#define MADERA_MICB4_FAST_SHIFT 4 -#define MADERA_MICB4_FAST_WIDTH 1 -#define MADERA_MICB4_RATE 0x0008 -#define MADERA_MICB4_RATE_MASK 0x0008 -#define MADERA_MICB4_RATE_SHIFT 3 -#define MADERA_MICB4_RATE_WIDTH 1 -#define MADERA_MICB4_DISCH 0x0004 -#define MADERA_MICB4_DISCH_MASK 0x0004 -#define MADERA_MICB4_DISCH_SHIFT 2 -#define MADERA_MICB4_DISCH_WIDTH 1 -#define MADERA_MICB4_BYPASS 0x0002 -#define MADERA_MICB4_BYPASS_MASK 0x0002 -#define MADERA_MICB4_BYPASS_SHIFT 1 -#define MADERA_MICB4_BYPASS_WIDTH 1 -#define MADERA_MICB4_ENA 0x0001 -#define MADERA_MICB4_ENA_MASK 0x0001 -#define MADERA_MICB4_ENA_SHIFT 0 -#define MADERA_MICB4_ENA_WIDTH 1 - -/* (0x021C) Mic_Bias_Ctrl_5 */ -#define MADERA_MICB1D_BYP 0x4000 -#define MADERA_MICB1D_BYP_MASK 0x4000 -#define MADERA_MICB1D_BYP_SHIFT 14 -#define MADERA_MICB1D_BYP_WIDTH 1 -#define MADERA_MICB1D_DISCH 0x2000 -#define MADERA_MICB1D_DISCH_MASK 0x2000 -#define MADERA_MICB1D_DISCH_SHIFT 13 -#define MADERA_MICB1D_DISCH_WIDTH 1 -#define MADERA_MICB1D_ENA 0x1000 -#define MADERA_MICB1D_ENA_MASK 0x1000 -#define MADERA_MICB1D_ENA_SHIFT 12 -#define MADERA_MICB1D_ENA_WIDTH 1 -#define MADERA_MICB1C_BYP 0x0400 -#define MADERA_MICB1C_BYP_MASK 0x0400 -#define MADERA_MICB1C_BYP_SHIFT 10 -#define MADERA_MICB1C_BYP_WIDTH 1 -#define MADERA_MICB1C_DISCH 0x0200 -#define MADERA_MICB1C_DISCH_MASK 0x0200 -#define MADERA_MICB1C_DISCH_SHIFT 9 -#define MADERA_MICB1C_DISCH_WIDTH 1 -#define MADERA_MICB1C_ENA 0x0100 -#define MADERA_MICB1C_ENA_MASK 0x0100 -#define MADERA_MICB1C_ENA_SHIFT 8 -#define MADERA_MICB1C_ENA_WIDTH 1 -#define MADERA_MICB1B_BYP 0x0040 -#define MADERA_MICB1B_BYP_MASK 0x0040 -#define MADERA_MICB1B_BYP_SHIFT 6 -#define MADERA_MICB1B_BYP_WIDTH 1 -#define MADERA_MICB1B_DISCH 0x0020 -#define MADERA_MICB1B_DISCH_MASK 0x0020 -#define MADERA_MICB1B_DISCH_SHIFT 5 -#define MADERA_MICB1B_DISCH_WIDTH 1 -#define MADERA_MICB1B_ENA 0x0010 -#define MADERA_MICB1B_ENA_MASK 0x0010 -#define MADERA_MICB1B_ENA_SHIFT 4 -#define MADERA_MICB1B_ENA_WIDTH 1 -#define MADERA_MICB1A_BYP 0x0004 -#define MADERA_MICB1A_BYP_MASK 0x0004 -#define MADERA_MICB1A_BYP_SHIFT 2 -#define MADERA_MICB1A_BYP_WIDTH 1 -#define MADERA_MICB1A_DISCH 0x0002 -#define MADERA_MICB1A_DISCH_MASK 0x0002 -#define MADERA_MICB1A_DISCH_SHIFT 1 -#define MADERA_MICB1A_DISCH_WIDTH 1 -#define MADERA_MICB1A_ENA 0x0001 -#define MADERA_MICB1A_ENA_MASK 0x0001 -#define MADERA_MICB1A_ENA_SHIFT 0 -#define MADERA_MICB1A_ENA_WIDTH 1 - -/* (0x021E) Mic_Bias_Ctrl_6 */ -#define MADERA_MICB2D_BYP 0x4000 -#define MADERA_MICB2D_BYP_MASK 0x4000 -#define MADERA_MICB2D_BYP_SHIFT 14 -#define MADERA_MICB2D_BYP_WIDTH 1 -#define MADERA_MICB2D_DISCH 0x2000 -#define MADERA_MICB2D_DISCH_MASK 0x2000 -#define MADERA_MICB2D_DISCH_SHIFT 13 -#define MADERA_MICB2D_DISCH_WIDTH 1 -#define MADERA_MICB2D_ENA 0x1000 -#define MADERA_MICB2D_ENA_MASK 0x1000 -#define MADERA_MICB2D_ENA_SHIFT 12 -#define MADERA_MICB2D_ENA_WIDTH 1 -#define MADERA_MICB2C_BYP 0x0400 -#define MADERA_MICB2C_BYP_MASK 0x0400 -#define MADERA_MICB2C_BYP_SHIFT 10 -#define MADERA_MICB2C_BYP_WIDTH 1 -#define MADERA_MICB2C_DISCH 0x0200 -#define MADERA_MICB2C_DISCH_MASK 0x0200 -#define MADERA_MICB2C_DISCH_SHIFT 9 -#define MADERA_MICB2C_DISCH_WIDTH 1 -#define MADERA_MICB2C_ENA 0x0100 -#define MADERA_MICB2C_ENA_MASK 0x0100 -#define MADERA_MICB2C_ENA_SHIFT 8 -#define MADERA_MICB2C_ENA_WIDTH 1 -#define MADERA_MICB2B_BYP 0x0040 -#define MADERA_MICB2B_BYP_MASK 0x0040 -#define MADERA_MICB2B_BYP_SHIFT 6 -#define MADERA_MICB2B_BYP_WIDTH 1 -#define MADERA_MICB2B_DISCH 0x0020 -#define MADERA_MICB2B_DISCH_MASK 0x0020 -#define MADERA_MICB2B_DISCH_SHIFT 5 -#define MADERA_MICB2B_DISCH_WIDTH 1 -#define MADERA_MICB2B_ENA 0x0010 -#define MADERA_MICB2B_ENA_MASK 0x0010 -#define MADERA_MICB2B_ENA_SHIFT 4 -#define MADERA_MICB2B_ENA_WIDTH 1 -#define MADERA_MICB2A_BYP 0x0004 -#define MADERA_MICB2A_BYP_MASK 0x0004 -#define MADERA_MICB2A_BYP_SHIFT 2 -#define MADERA_MICB2A_BYP_WIDTH 1 -#define MADERA_MICB2A_DISCH 0x0002 -#define MADERA_MICB2A_DISCH_MASK 0x0002 -#define MADERA_MICB2A_DISCH_SHIFT 1 -#define MADERA_MICB2A_DISCH_WIDTH 1 -#define MADERA_MICB2A_ENA 0x0001 -#define MADERA_MICB2A_ENA_MASK 0x0001 -#define MADERA_MICB2A_ENA_SHIFT 0 -#define MADERA_MICB2A_ENA_WIDTH 1 - -/* (0x0225) - HP Ctrl 1L */ -#define MADERA_RMV_SHRT_HP1L 0x4000 -#define MADERA_RMV_SHRT_HP1L_MASK 0x4000 -#define MADERA_RMV_SHRT_HP1L_SHIFT 14 -#define MADERA_RMV_SHRT_HP1L_WIDTH 1 -#define MADERA_HP1L_FLWR 0x0004 -#define MADERA_HP1L_FLWR_MASK 0x0004 -#define MADERA_HP1L_FLWR_SHIFT 2 -#define MADERA_HP1L_FLWR_WIDTH 1 -#define MADERA_HP1L_SHRTI 0x0002 -#define MADERA_HP1L_SHRTI_MASK 0x0002 -#define MADERA_HP1L_SHRTI_SHIFT 1 -#define MADERA_HP1L_SHRTI_WIDTH 1 -#define MADERA_HP1L_SHRTO 0x0001 -#define MADERA_HP1L_SHRTO_MASK 0x0001 -#define MADERA_HP1L_SHRTO_SHIFT 0 -#define MADERA_HP1L_SHRTO_WIDTH 1 - -/* (0x0226) - HP Ctrl 1R */ -#define MADERA_RMV_SHRT_HP1R 0x4000 -#define MADERA_RMV_SHRT_HP1R_MASK 0x4000 -#define MADERA_RMV_SHRT_HP1R_SHIFT 14 -#define MADERA_RMV_SHRT_HP1R_WIDTH 1 -#define MADERA_HP1R_FLWR 0x0004 -#define MADERA_HP1R_FLWR_MASK 0x0004 -#define MADERA_HP1R_FLWR_SHIFT 2 -#define MADERA_HP1R_FLWR_WIDTH 1 -#define MADERA_HP1R_SHRTI 0x0002 -#define MADERA_HP1R_SHRTI_MASK 0x0002 -#define MADERA_HP1R_SHRTI_SHIFT 1 -#define MADERA_HP1R_SHRTI_WIDTH 1 -#define MADERA_HP1R_SHRTO 0x0001 -#define MADERA_HP1R_SHRTO_MASK 0x0001 -#define MADERA_HP1R_SHRTO_SHIFT 0 -#define MADERA_HP1R_SHRTO_WIDTH 1 - -/* (0x027E) - EDRE HP stereo control */ -#define MADERA_HP3_EDRE_STEREO 0x0004 -#define MADERA_HP3_EDRE_STEREO_MASK 0x0004 -#define MADERA_HP3_EDRE_STEREO_SHIFT 2 -#define MADERA_HP3_EDRE_STEREO_WIDTH 1 -#define MADERA_HP2_EDRE_STEREO 0x0002 -#define MADERA_HP2_EDRE_STEREO_MASK 0x0002 -#define MADERA_HP2_EDRE_STEREO_SHIFT 1 -#define MADERA_HP2_EDRE_STEREO_WIDTH 1 -#define MADERA_HP1_EDRE_STEREO 0x0001 -#define MADERA_HP1_EDRE_STEREO_MASK 0x0001 -#define MADERA_HP1_EDRE_STEREO_SHIFT 0 -#define MADERA_HP1_EDRE_STEREO_WIDTH 1 - -/* (0x0293) Accessory_Detect_Mode_1 */ -#define MADERA_ACCDET_SRC 0x2000 -#define MADERA_ACCDET_SRC_MASK 0x2000 -#define MADERA_ACCDET_SRC_SHIFT 13 -#define MADERA_ACCDET_SRC_WIDTH 1 -#define MADERA_ACCDET_POLARITY_INV_ENA 0x0080 -#define MADERA_ACCDET_POLARITY_INV_ENA_MASK 0x0080 -#define MADERA_ACCDET_POLARITY_INV_ENA_SHIFT 7 -#define MADERA_ACCDET_POLARITY_INV_ENA_WIDTH 1 -#define MADERA_ACCDET_MODE_MASK 0x0007 -#define MADERA_ACCDET_MODE_SHIFT 0 -#define MADERA_ACCDET_MODE_WIDTH 3 - -/* (0x0299) Headphone_Detect_0 */ -#define MADERA_HPD_GND_SEL 0x0007 -#define MADERA_HPD_GND_SEL_MASK 0x0007 -#define MADERA_HPD_GND_SEL_SHIFT 0 -#define MADERA_HPD_GND_SEL_WIDTH 3 -#define MADERA_HPD_SENSE_SEL 0x0070 -#define MADERA_HPD_SENSE_SEL_MASK 0x0070 -#define MADERA_HPD_SENSE_SEL_SHIFT 4 -#define MADERA_HPD_SENSE_SEL_WIDTH 3 -#define MADERA_HPD_FRC_SEL 0x0700 -#define MADERA_HPD_FRC_SEL_MASK 0x0700 -#define MADERA_HPD_FRC_SEL_SHIFT 8 -#define MADERA_HPD_FRC_SEL_WIDTH 3 -#define MADERA_HPD_OUT_SEL 0x7000 -#define MADERA_HPD_OUT_SEL_MASK 0x7000 -#define MADERA_HPD_OUT_SEL_SHIFT 12 -#define MADERA_HPD_OUT_SEL_WIDTH 3 -#define MADERA_HPD_OVD_ENA_SEL 0x8000 -#define MADERA_HPD_OVD_ENA_SEL_MASK 0x8000 -#define MADERA_HPD_OVD_ENA_SEL_SHIFT 15 -#define MADERA_HPD_OVD_ENA_SEL_WIDTH 1 - -/* (0x029B) Headphone_Detect_1 */ -#define MADERA_HP_IMPEDANCE_RANGE_MASK 0x0600 -#define MADERA_HP_IMPEDANCE_RANGE_SHIFT 9 -#define MADERA_HP_IMPEDANCE_RANGE_WIDTH 2 -#define MADERA_HP_STEP_SIZE 0x0100 -#define MADERA_HP_STEP_SIZE_MASK 0x0100 -#define MADERA_HP_STEP_SIZE_SHIFT 8 -#define MADERA_HP_STEP_SIZE_WIDTH 1 -#define MADERA_HP_HOLDTIME_MASK 0x00E0 -#define MADERA_HP_HOLDTIME_SHIFT 5 -#define MADERA_HP_HOLDTIME_WIDTH 3 -#define MADERA_HP_CLK_DIV_MASK 0x0018 -#define MADERA_HP_CLK_DIV_SHIFT 3 -#define MADERA_HP_CLK_DIV_WIDTH 2 -#define MADERA_HP_IDAC_STEER 0x0004 -#define MADERA_HP_IDAC_STEER_MASK 0x0004 -#define MADERA_HP_IDAC_STEER_SHIFT 2 -#define MADERA_HP_IDAC_STEER_WIDTH 1 -#define MADERA_HP_RATE_MASK 0x0006 -#define MADERA_HP_RATE_SHIFT 1 -#define MADERA_HP_RATE_WIDTH 2 -#define MADERA_HP_POLL 0x0001 -#define MADERA_HP_POLL_MASK 0x0001 -#define MADERA_HP_POLL_SHIFT 0 -#define MADERA_HP_POLL_WIDTH 1 - -/* (0x029C) Headphone_Detect_2 */ -#define MADERA_HP_DONE_MASK 0x8000 -#define MADERA_HP_DONE_SHIFT 15 -#define MADERA_HP_DONE_WIDTH 1 -#define MADERA_HP_LVL_MASK 0x7FFF -#define MADERA_HP_LVL_SHIFT 0 -#define MADERA_HP_LVL_WIDTH 15 - -#define MADERA_HP_DONE_B 0x8000 -#define MADERA_HP_DONE_B_MASK 0x8000 -#define MADERA_HP_DONE_B_SHIFT 15 -#define MADERA_HP_DONE_B_WIDTH 1 -#define MADERA_HP_LVL_B_MASK 0x7FFF -#define MADERA_HP_LVL_B_SHIFT 0 -#define MADERA_HP_LVL_B_WIDTH 15 - -/* (0x029D) Headphone_Detect_3 */ -#define MADERA_HP_DACVAL_MASK 0x03FF -#define MADERA_HP_DACVAL_SHIFT 0 -#define MADERA_HP_DACVAL_WIDTH 10 - -/* (0x029F) - Headphone Detect 5 */ -#define MADERA_HP_DACVAL_DOWN_MASK 0x03FF -#define MADERA_HP_DACVAL_DOWN_SHIFT 0 -#define MADERA_HP_DACVAL_DOWN_WIDTH 10 - -/* (0x02A2) Mic_Detect_1_Control_0 */ -#define MADERA_MICD1_GND_MASK 0x0007 -#define MADERA_MICD1_GND_SHIFT 0 -#define MADERA_MICD1_GND_WIDTH 3 -#define MADERA_MICD1_SENSE_MASK 0x00F0 -#define MADERA_MICD1_SENSE_SHIFT 4 -#define MADERA_MICD1_SENSE_WIDTH 4 -#define MADERA_MICD1_ADC_MODE_MASK 0x8000 -#define MADERA_MICD1_ADC_MODE_SHIFT 15 -#define MADERA_MICD1_ADC_MODE_WIDTH 1 - -/* (0x02A3) Mic_Detect_1_Control_1 */ -#define MADERA_MICD_BIAS_STARTTIME_MASK 0xF000 -#define MADERA_MICD_BIAS_STARTTIME_SHIFT 12 -#define MADERA_MICD_BIAS_STARTTIME_WIDTH 4 -#define MADERA_MICD_RATE_MASK 0x0F00 -#define MADERA_MICD_RATE_SHIFT 8 -#define MADERA_MICD_RATE_WIDTH 4 -#define MADERA_MICD_BIAS_SRC_MASK 0x00F0 -#define MADERA_MICD_BIAS_SRC_SHIFT 4 -#define MADERA_MICD_BIAS_SRC_WIDTH 4 -#define MADERA_MICD_DBTIME 0x0002 -#define MADERA_MICD_DBTIME_MASK 0x0002 -#define MADERA_MICD_DBTIME_SHIFT 1 -#define MADERA_MICD_DBTIME_WIDTH 1 -#define MADERA_MICD_ENA 0x0001 -#define MADERA_MICD_ENA_MASK 0x0001 -#define MADERA_MICD_ENA_SHIFT 0 -#define MADERA_MICD_ENA_WIDTH 1 - -/* (0x02A4) Mic_Detect_1_Control_2 */ -#define MADERA_MICD_LVL_SEL_MASK 0x00FF -#define MADERA_MICD_LVL_SEL_SHIFT 0 -#define MADERA_MICD_LVL_SEL_WIDTH 8 - -/* (0x02A5) Mic_Detect_1_Control_3 */ -#define MADERA_MICD_LVL_0 0x0004 -#define MADERA_MICD_LVL_1 0x0008 -#define MADERA_MICD_LVL_2 0x0010 -#define MADERA_MICD_LVL_3 0x0020 -#define MADERA_MICD_LVL_4 0x0040 -#define MADERA_MICD_LVL_5 0x0080 -#define MADERA_MICD_LVL_6 0x0100 -#define MADERA_MICD_LVL_7 0x0200 -#define MADERA_MICD_LVL_8 0x0400 -#define MADERA_MICD_LVL_MASK 0x07FC -#define MADERA_MICD_LVL_SHIFT 2 -#define MADERA_MICD_LVL_WIDTH 9 -#define MADERA_MICD_VALID 0x0002 -#define MADERA_MICD_VALID_MASK 0x0002 -#define MADERA_MICD_VALID_SHIFT 1 -#define MADERA_MICD_VALID_WIDTH 1 -#define MADERA_MICD_STS 0x0001 -#define MADERA_MICD_STS_MASK 0x0001 -#define MADERA_MICD_STS_SHIFT 0 -#define MADERA_MICD_STS_WIDTH 1 - -/* (0x02AB) Mic_Detect_1_Control_4 */ -#define MADERA_MICDET_ADCVAL_DIFF_MASK 0xFF00 -#define MADERA_MICDET_ADCVAL_DIFF_SHIFT 8 -#define MADERA_MICDET_ADCVAL_DIFF_WIDTH 8 -#define MADERA_MICDET_ADCVAL_MASK 0x007F -#define MADERA_MICDET_ADCVAL_SHIFT 0 -#define MADERA_MICDET_ADCVAL_WIDTH 7 - -/* (0x02B2) Mic_Detect_2_Control_0 */ -#define MADERA_MICD2_ADC_MODE 0x8000 -#define MADERA_MICD2_ADC_MODE_MASK 0x8000 -#define MADERA_MICD2_ADC_MODE_SHIFT 15 -#define MADERA_MICD2_ADC_MODE_WIDTH 1 -#define MADERA_MICD2_SENSE_SEL 0x0070 -#define MADERA_MICD2_SENSE_SEL_MASK 0x0070 -#define MADERA_MICD2_SENSE_SEL_SHIFT 4 -#define MADERA_MICD2_SENSE_SEL_WIDTH 3 -#define MADERA_MICD2_GND_SEL 0x0007 -#define MADERA_MICD2_GND_SEL_MASK 0x0007 -#define MADERA_MICD2_GND_SEL_SHIFT 0 -#define MADERA_MICD2_GND_SEL_WIDTH 3 - -/* (0x02B3) Mic_Detect_2_Control_1 */ -#define MADERA_MICD2_BIAS_STARTTIME 0xF000 -#define MADERA_MICD2_BIAS_STARTTIME_MASK 0xF000 -#define MADERA_MICD2_BIAS_STARTTIME_SHIFT 12 -#define MADERA_MICD2_BIAS_STARTTIME_WIDTH 4 -#define MADERA_MICD2_RATE 0x0F00 -#define MADERA_MICD2_RATE_MASK 0x0F00 -#define MADERA_MICD2_RATE_SHIFT 8 -#define MADERA_MICD2_RATE_WIDTH 4 -#define MADERA_MICD2_BIAS_SRC 0x00F0 -#define MADERA_MICD2_BIAS_SRC_MASK 0x00F0 -#define MADERA_MICD2_BIAS_SRC_SHIFT 4 -#define MADERA_MICD2_BIAS_SRC_WIDTH 4 -#define MADERA_MICD2_DBTIME 0x0002 -#define MADERA_MICD2_DBTIME_MASK 0x0002 -#define MADERA_MICD2_DBTIME_SHIFT 1 -#define MADERA_MICD2_DBTIME_WIDTH 1 -#define MADERA_MICD2_ENA 0x0001 -#define MADERA_MICD2_ENA_MASK 0x0001 -#define MADERA_MICD2_ENA_SHIFT 0 -#define MADERA_MICD2_ENA_WIDTH 1 - -/* (0x02B4) Mic_Detect_2_Control_2 */ -#define MADERA_MICD2_LVL_SEL_MASK 0x00FF -#define MADERA_MICD2_LVL_SEL_SHIFT 0 -#define MADERA_MICD2_LVL_SEL_WIDTH 8 - -/* (0x02B5) Mic_Detect_2_Control_3 */ -#define MADERA_MICD2_LVL 0x07FC -#define MADERA_MICD2_LVL_MASK 0x07FC -#define MADERA_MICD2_LVL_SHIFT 2 -#define MADERA_MICD2_LVL_WIDTH 9 -#define MADERA_MICD2_VALID 0x0002 -#define MADERA_MICD2_VALID_MASK 0x0002 -#define MADERA_MICD2_VALID_SHIFT 1 -#define MADERA_MICD2_VALID_WIDTH 1 -#define MADERA_MICD2_STS 0x0001 -#define MADERA_MICD2_STS_MASK 0x0001 -#define MADERA_MICD2_STS_SHIFT 0 -#define MADERA_MICD2_STS_WIDTH 1 - -/* (0x02BB) Mic_Detect_2_Control_4 */ -#define MADERA_MICD2_ADCVAL_DIFF 0xFF00 -#define MADERA_MICD2_ADCVAL_DIFF_MASK 0xFF00 -#define MADERA_MICD2_ADCVAL_DIFF_SHIFT 8 -#define MADERA_MICD2_ADCVAL_DIFF_WIDTH 8 -#define MADERA_MICD2_ADCVAL 0x007F -#define MADERA_MICD2_ADCVAL_MASK 0x007F -#define MADERA_MICD2_ADCVAL_SHIFT 0 -#define MADERA_MICD2_ADCVAL_WIDTH 7 - -/* (0x02C6) Micd_Clamp_control */ -#define MADERA_MICD_CLAMP_OVD 0x0010 -#define MADERA_MICD_CLAMP_OVD_MASK 0x0010 -#define MADERA_MICD_CLAMP_OVD_SHIFT 4 -#define MADERA_MICD_CLAMP_OVD_WIDTH 1 -#define MADERA_MICD_CLAMP_MODE_MASK 0x000F -#define MADERA_MICD_CLAMP_MODE_SHIFT 0 -#define MADERA_MICD_CLAMP_MODE_WIDTH 4 - -/* (0x02C8) GP_Switch_1 */ -#define MADERA_SW2_MODE_MASK 0x000C -#define MADERA_SW2_MODE_SHIFT 2 -#define MADERA_SW2_MODE_WIDTH 2 -#define MADERA_SW1_MODE_MASK 0x0003 -#define MADERA_SW1_MODE_SHIFT 0 -#define MADERA_SW1_MODE_WIDTH 2 - -/* (0x02D3) Jack_detect_analogue */ -#define MADERA_JD2_ENA 0x0002 -#define MADERA_JD2_ENA_MASK 0x0002 -#define MADERA_JD2_ENA_SHIFT 1 -#define MADERA_JD2_ENA_WIDTH 1 -#define MADERA_JD1_ENA 0x0001 -#define MADERA_JD1_ENA_MASK 0x0001 -#define MADERA_JD1_ENA_SHIFT 0 -#define MADERA_JD1_ENA_WIDTH 1 - -/* (0x0300) Input_Enables */ -#define MADERA_IN6L_ENA 0x0800 -#define MADERA_IN6L_ENA_MASK 0x0800 -#define MADERA_IN6L_ENA_SHIFT 11 -#define MADERA_IN6L_ENA_WIDTH 1 -#define MADERA_IN6R_ENA 0x0400 -#define MADERA_IN6R_ENA_MASK 0x0400 -#define MADERA_IN6R_ENA_SHIFT 10 -#define MADERA_IN6R_ENA_WIDTH 1 -#define MADERA_IN5L_ENA 0x0200 -#define MADERA_IN5L_ENA_MASK 0x0200 -#define MADERA_IN5L_ENA_SHIFT 9 -#define MADERA_IN5L_ENA_WIDTH 1 -#define MADERA_IN5R_ENA 0x0100 -#define MADERA_IN5R_ENA_MASK 0x0100 -#define MADERA_IN5R_ENA_SHIFT 8 -#define MADERA_IN5R_ENA_WIDTH 1 -#define MADERA_IN4L_ENA 0x0080 -#define MADERA_IN4L_ENA_MASK 0x0080 -#define MADERA_IN4L_ENA_SHIFT 7 -#define MADERA_IN4L_ENA_WIDTH 1 -#define MADERA_IN4R_ENA 0x0040 -#define MADERA_IN4R_ENA_MASK 0x0040 -#define MADERA_IN4R_ENA_SHIFT 6 -#define MADERA_IN4R_ENA_WIDTH 1 -#define MADERA_IN3L_ENA 0x0020 -#define MADERA_IN3L_ENA_MASK 0x0020 -#define MADERA_IN3L_ENA_SHIFT 5 -#define MADERA_IN3L_ENA_WIDTH 1 -#define MADERA_IN3R_ENA 0x0010 -#define MADERA_IN3R_ENA_MASK 0x0010 -#define MADERA_IN3R_ENA_SHIFT 4 -#define MADERA_IN3R_ENA_WIDTH 1 -#define MADERA_IN2L_ENA 0x0008 -#define MADERA_IN2L_ENA_MASK 0x0008 -#define MADERA_IN2L_ENA_SHIFT 3 -#define MADERA_IN2L_ENA_WIDTH 1 -#define MADERA_IN2R_ENA 0x0004 -#define MADERA_IN2R_ENA_MASK 0x0004 -#define MADERA_IN2R_ENA_SHIFT 2 -#define MADERA_IN2R_ENA_WIDTH 1 -#define MADERA_IN1L_ENA 0x0002 -#define MADERA_IN1L_ENA_MASK 0x0002 -#define MADERA_IN1L_ENA_SHIFT 1 -#define MADERA_IN1L_ENA_WIDTH 1 -#define MADERA_IN1R_ENA 0x0001 -#define MADERA_IN1R_ENA_MASK 0x0001 -#define MADERA_IN1R_ENA_SHIFT 0 -#define MADERA_IN1R_ENA_WIDTH 1 - -/* (0x0308) Input_Rate */ -#define MADERA_IN_RATE_MASK 0x7800 -#define MADERA_IN_RATE_SHIFT 11 -#define MADERA_IN_RATE_WIDTH 4 -#define MADERA_IN_MODE_MASK 0x0400 -#define MADERA_IN_MODE_SHIFT 10 -#define MADERA_IN_MODE_WIDTH 1 - -/* (0x0309) Input_Volume_Ramp */ -#define MADERA_IN_VD_RAMP_MASK 0x0070 -#define MADERA_IN_VD_RAMP_SHIFT 4 -#define MADERA_IN_VD_RAMP_WIDTH 3 -#define MADERA_IN_VI_RAMP_MASK 0x0007 -#define MADERA_IN_VI_RAMP_SHIFT 0 -#define MADERA_IN_VI_RAMP_WIDTH 3 - -/* (0x030C) HPF_Control */ -#define MADERA_IN_HPF_CUT_MASK 0x0007 -#define MADERA_IN_HPF_CUT_SHIFT 0 -#define MADERA_IN_HPF_CUT_WIDTH 3 - -/* (0x0310) IN1L_Control */ -#define MADERA_IN1L_HPF_MASK 0x8000 -#define MADERA_IN1L_HPF_SHIFT 15 -#define MADERA_IN1L_HPF_WIDTH 1 -#define MADERA_IN1_DMIC_SUP_MASK 0x1800 -#define MADERA_IN1_DMIC_SUP_SHIFT 11 -#define MADERA_IN1_DMIC_SUP_WIDTH 2 -#define MADERA_IN1_MODE_MASK 0x0400 -#define MADERA_IN1_MODE_SHIFT 10 -#define MADERA_IN1_MODE_WIDTH 1 -#define MADERA_IN1_SINGLE_ENDED_MASK 0x0200 -#define MADERA_IN1_SINGLE_ENDED_SHIFT 9 -#define MADERA_IN1_SINGLE_ENDED_WIDTH 1 -#define MADERA_IN1L_PGA_VOL_MASK 0x00FE -#define MADERA_IN1L_PGA_VOL_SHIFT 1 -#define MADERA_IN1L_PGA_VOL_WIDTH 7 - -/* (0x0311) ADC_Digital_Volume_1L */ -#define MADERA_IN1L_SRC_MASK 0x4000 -#define MADERA_IN1L_SRC_SHIFT 14 -#define MADERA_IN1L_SRC_WIDTH 1 -#define MADERA_IN1L_SRC_SE_MASK 0x2000 -#define MADERA_IN1L_SRC_SE_SHIFT 13 -#define MADERA_IN1L_SRC_SE_WIDTH 1 -#define MADERA_IN1L_LP_MODE 0x0800 -#define MADERA_IN1L_LP_MODE_MASK 0x0800 -#define MADERA_IN1L_LP_MODE_SHIFT 11 -#define MADERA_IN1L_LP_MODE_WIDTH 1 -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN1L_MUTE 0x0100 -#define MADERA_IN1L_MUTE_MASK 0x0100 -#define MADERA_IN1L_MUTE_SHIFT 8 -#define MADERA_IN1L_MUTE_WIDTH 1 -#define MADERA_IN1L_DIG_VOL_MASK 0x00FF -#define MADERA_IN1L_DIG_VOL_SHIFT 0 -#define MADERA_IN1L_DIG_VOL_WIDTH 8 - -/* (0x0312) DMIC1L_Control */ -#define MADERA_IN1_DMICL_DLY_MASK 0x003F -#define MADERA_IN1_DMICL_DLY_SHIFT 0 -#define MADERA_IN1_DMICL_DLY_WIDTH 6 -#define MADERA_IN1_OSR_MASK 0x0700 -#define MADERA_IN1_OSR_SHIFT 8 -#define MADERA_IN1_OSR_WIDTH 3 - -/* (0x0313) IN1L_Rate_Control */ -#define MADERA_IN1L_RATE_MASK 0x7800 -#define MADERA_IN1L_RATE_SHIFT 11 -#define MADERA_IN1L_RATE_WIDTH 4 - -/* (0x0314) IN1R_Control */ -#define MADERA_IN1R_HPF_MASK 0x8000 -#define MADERA_IN1R_HPF_SHIFT 15 -#define MADERA_IN1R_HPF_WIDTH 1 -#define MADERA_IN1R_PGA_VOL_MASK 0x00FE -#define MADERA_IN1R_PGA_VOL_SHIFT 1 -#define MADERA_IN1R_PGA_VOL_WIDTH 7 -#define MADERA_IN1_DMICCLK_SRC_MASK 0x1800 -#define MADERA_IN1_DMICCLK_SRC_SHIFT 11 -#define MADERA_IN1_DMICCLK_SRC_WIDTH 2 - -/* (0x0315) ADC_Digital_Volume_1R */ -#define MADERA_IN1R_SRC_MASK 0x4000 -#define MADERA_IN1R_SRC_SHIFT 14 -#define MADERA_IN1R_SRC_WIDTH 1 -#define MADERA_IN1R_SRC_SE_MASK 0x2000 -#define MADERA_IN1R_SRC_SE_SHIFT 13 -#define MADERA_IN1R_SRC_SE_WIDTH 1 -#define MADERA_IN1R_LP_MODE 0x0800 -#define MADERA_IN1R_LP_MODE_MASK 0x0800 -#define MADERA_IN1R_LP_MODE_SHIFT 11 -#define MADERA_IN1R_LP_MODE_WIDTH 1 -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN1R_MUTE 0x0100 -#define MADERA_IN1R_MUTE_MASK 0x0100 -#define MADERA_IN1R_MUTE_SHIFT 8 -#define MADERA_IN1R_MUTE_WIDTH 1 -#define MADERA_IN1R_DIG_VOL_MASK 0x00FF -#define MADERA_IN1R_DIG_VOL_SHIFT 0 -#define MADERA_IN1R_DIG_VOL_WIDTH 8 - -/* (0x0316) DMIC1R_Control */ -#define MADERA_IN1_DMICR_DLY_MASK 0x003F -#define MADERA_IN1_DMICR_DLY_SHIFT 0 -#define MADERA_IN1_DMICR_DLY_WIDTH 6 - -/* (0x0317) IN1R_Rate_Control */ -#define MADERA_IN1R_RATE_MASK 0x7800 -#define MADERA_IN1R_RATE_SHIFT 11 -#define MADERA_IN1R_RATE_WIDTH 4 - -/* (0x0318) IN2L_Control */ -#define MADERA_IN2L_HPF_MASK 0x8000 -#define MADERA_IN2L_HPF_SHIFT 15 -#define MADERA_IN2L_HPF_WIDTH 1 -#define MADERA_IN2_DMIC_SUP_MASK 0x1800 -#define MADERA_IN2_DMIC_SUP_SHIFT 11 -#define MADERA_IN2_DMIC_SUP_WIDTH 2 -#define MADERA_IN2_MODE_MASK 0x0400 -#define MADERA_IN2_MODE_SHIFT 10 -#define MADERA_IN2_MODE_WIDTH 1 -#define MADERA_IN2_SINGLE_ENDED_MASK 0x0200 -#define MADERA_IN2_SINGLE_ENDED_SHIFT 9 -#define MADERA_IN2_SINGLE_ENDED_WIDTH 1 -#define MADERA_IN2L_PGA_VOL_MASK 0x00FE -#define MADERA_IN2L_PGA_VOL_SHIFT 1 -#define MADERA_IN2L_PGA_VOL_WIDTH 7 - -/* (0x0319) ADC_Digital_Volume_2L */ -#define MADERA_IN2L_SRC_MASK 0x4000 -#define MADERA_IN2L_SRC_SHIFT 14 -#define MADERA_IN2L_SRC_WIDTH 1 -#define MADERA_IN2L_SRC_SE_MASK 0x2000 -#define MADERA_IN2L_SRC_SE_SHIFT 13 -#define MADERA_IN2L_SRC_SE_WIDTH 1 -#define MADERA_IN2L_LP_MODE 0x0800 -#define MADERA_IN2L_LP_MODE_MASK 0x0800 -#define MADERA_IN2L_LP_MODE_SHIFT 11 -#define MADERA_IN2L_LP_MODE_WIDTH 1 -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN2L_MUTE 0x0100 -#define MADERA_IN2L_MUTE_MASK 0x0100 -#define MADERA_IN2L_MUTE_SHIFT 8 -#define MADERA_IN2L_MUTE_WIDTH 1 -#define MADERA_IN2L_DIG_VOL_MASK 0x00FF -#define MADERA_IN2L_DIG_VOL_SHIFT 0 -#define MADERA_IN2L_DIG_VOL_WIDTH 8 - -/* (0x031A) DMIC2L_Control */ -#define MADERA_IN2_DMICL_DLY_MASK 0x003F -#define MADERA_IN2_DMICL_DLY_SHIFT 0 -#define MADERA_IN2_DMICL_DLY_WIDTH 6 -#define MADERA_IN2_OSR_MASK 0x0700 -#define MADERA_IN2_OSR_SHIFT 8 -#define MADERA_IN2_OSR_WIDTH 3 - -/* (0x031B) IN2L_Rate_Control */ -#define MADERA_IN2L_RATE_MASK 0x7800 -#define MADERA_IN2L_RATE_SHIFT 11 -#define MADERA_IN2L_RATE_WIDTH 4 - -/* (0x031C) IN2R_Control */ -#define MADERA_IN2R_HPF_MASK 0x8000 -#define MADERA_IN2R_HPF_SHIFT 15 -#define MADERA_IN2R_HPF_WIDTH 1 -#define MADERA_IN2R_PGA_VOL_MASK 0x00FE -#define MADERA_IN2R_PGA_VOL_SHIFT 1 -#define MADERA_IN2R_PGA_VOL_WIDTH 7 -#define MADERA_IN2_DMICCLK_SRC_MASK 0x1800 -#define MADERA_IN2_DMICCLK_SRC_SHIFT 11 -#define MADERA_IN2_DMICCLK_SRC_WIDTH 2 - -/* (0x031D) ADC_Digital_Volume_2R */ -#define MADERA_IN2R_SRC_MASK 0x4000 -#define MADERA_IN2R_SRC_SHIFT 14 -#define MADERA_IN2R_SRC_WIDTH 1 -#define MADERA_IN2R_SRC_SE_MASK 0x2000 -#define MADERA_IN2R_SRC_SE_SHIFT 13 -#define MADERA_IN2R_SRC_SE_WIDTH 1 -#define MADERA_IN2R_LP_MODE 0x0800 -#define MADERA_IN2R_LP_MODE_MASK 0x0800 -#define MADERA_IN2R_LP_MODE_SHIFT 11 -#define MADERA_IN2R_LP_MODE_WIDTH 1 -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN2R_MUTE 0x0100 -#define MADERA_IN2R_MUTE_MASK 0x0100 -#define MADERA_IN2R_MUTE_SHIFT 8 -#define MADERA_IN2R_MUTE_WIDTH 1 -#define MADERA_IN2R_DIG_VOL_MASK 0x00FF -#define MADERA_IN2R_DIG_VOL_SHIFT 0 -#define MADERA_IN2R_DIG_VOL_WIDTH 8 - -/* (0x031E) DMIC2R_Control */ -#define MADERA_IN2_DMICR_DLY_MASK 0x003F -#define MADERA_IN2_DMICR_DLY_SHIFT 0 -#define MADERA_IN2_DMICR_DLY_WIDTH 6 - -/* (0x031F) IN2R_Rate_Control */ -#define MADERA_IN2R_RATE_MASK 0x7800 -#define MADERA_IN2R_RATE_SHIFT 11 -#define MADERA_IN2R_RATE_WIDTH 4 - -/* (0x0320) IN3L_Control */ -#define MADERA_IN3L_HPF_MASK 0x8000 -#define MADERA_IN3L_HPF_SHIFT 15 -#define MADERA_IN3L_HPF_WIDTH 1 -#define MADERA_IN3_DMIC_SUP_MASK 0x1800 -#define MADERA_IN3_DMIC_SUP_SHIFT 11 -#define MADERA_IN3_DMIC_SUP_WIDTH 2 -#define MADERA_IN3_MODE_MASK 0x0400 -#define MADERA_IN3_MODE_SHIFT 10 -#define MADERA_IN3_MODE_WIDTH 1 -#define MADERA_IN3_SINGLE_ENDED_MASK 0x0200 -#define MADERA_IN3_SINGLE_ENDED_SHIFT 9 -#define MADERA_IN3_SINGLE_ENDED_WIDTH 1 -#define MADERA_IN3L_PGA_VOL_MASK 0x00FE -#define MADERA_IN3L_PGA_VOL_SHIFT 1 -#define MADERA_IN3L_PGA_VOL_WIDTH 7 - -/* (0x0321) ADC_Digital_Volume_3L */ -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN3L_MUTE 0x0100 -#define MADERA_IN3L_MUTE_MASK 0x0100 -#define MADERA_IN3L_MUTE_SHIFT 8 -#define MADERA_IN3L_MUTE_WIDTH 1 -#define MADERA_IN3L_DIG_VOL_MASK 0x00FF -#define MADERA_IN3L_DIG_VOL_SHIFT 0 -#define MADERA_IN3L_DIG_VOL_WIDTH 8 - -/* (0x0322) DMIC3L_Control */ -#define MADERA_IN3_DMICL_DLY_MASK 0x003F -#define MADERA_IN3_DMICL_DLY_SHIFT 0 -#define MADERA_IN3_DMICL_DLY_WIDTH 6 -#define MADERA_IN3_OSR_MASK 0x0700 -#define MADERA_IN3_OSR_SHIFT 8 -#define MADERA_IN3_OSR_WIDTH 3 - -/* (0x0323) IN3L_Rate_Control */ -#define MADERA_IN3L_RATE_MASK 0x7800 -#define MADERA_IN3L_RATE_SHIFT 11 -#define MADERA_IN3L_RATE_WIDTH 4 - -/* (0x0324) IN3R_Control */ -#define MADERA_IN3R_HPF_MASK 0x8000 -#define MADERA_IN3R_HPF_SHIFT 15 -#define MADERA_IN3R_HPF_WIDTH 1 -#define MADERA_IN3R_PGA_VOL_MASK 0x00FE -#define MADERA_IN3R_PGA_VOL_SHIFT 1 -#define MADERA_IN3R_PGA_VOL_WIDTH 7 -#define MADERA_IN3_DMICCLK_SRC_MASK 0x1800 -#define MADERA_IN3_DMICCLK_SRC_SHIFT 11 -#define MADERA_IN3_DMICCLK_SRC_WIDTH 2 - -/* (0x0325) ADC_Digital_Volume_3R */ -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN3R_MUTE 0x0100 -#define MADERA_IN3R_MUTE_MASK 0x0100 -#define MADERA_IN3R_MUTE_SHIFT 8 -#define MADERA_IN3R_MUTE_WIDTH 1 -#define MADERA_IN3R_DIG_VOL_MASK 0x00FF -#define MADERA_IN3R_DIG_VOL_SHIFT 0 -#define MADERA_IN3R_DIG_VOL_WIDTH 8 - -/* (0x0326) DMIC3R_Control */ -#define MADERA_IN3_DMICR_DLY_MASK 0x003F -#define MADERA_IN3_DMICR_DLY_SHIFT 0 -#define MADERA_IN3_DMICR_DLY_WIDTH 6 - -/* (0x0327) IN3R_Rate_Control */ -#define MADERA_IN3R_RATE_MASK 0x7800 -#define MADERA_IN3R_RATE_SHIFT 11 -#define MADERA_IN3R_RATE_WIDTH 4 - -/* (0x0328) IN4L_Control */ -#define MADERA_IN4L_HPF_MASK 0x8000 -#define MADERA_IN4L_HPF_SHIFT 15 -#define MADERA_IN4L_HPF_WIDTH 1 -#define MADERA_IN4_DMIC_SUP_MASK 0x1800 -#define MADERA_IN4_DMIC_SUP_SHIFT 11 -#define MADERA_IN4_DMIC_SUP_WIDTH 2 - -/* (0x0329) ADC_Digital_Volume_4L */ -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN4L_MUTE 0x0100 -#define MADERA_IN4L_MUTE_MASK 0x0100 -#define MADERA_IN4L_MUTE_SHIFT 8 -#define MADERA_IN4L_MUTE_WIDTH 1 -#define MADERA_IN4L_DIG_VOL_MASK 0x00FF -#define MADERA_IN4L_DIG_VOL_SHIFT 0 -#define MADERA_IN4L_DIG_VOL_WIDTH 8 - -/* (0x032A) DMIC4L_Control */ -#define MADERA_IN4L_DMIC_DLY_MASK 0x003F -#define MADERA_IN4L_DMIC_DLY_SHIFT 0 -#define MADERA_IN4L_DMIC_DLY_WIDTH 6 -#define MADERA_IN4_OSR_MASK 0x0700 -#define MADERA_IN4_OSR_SHIFT 8 -#define MADERA_IN4_OSR_WIDTH 3 - -/* (0x032B) IN4L_Rate_Control */ -#define MADERA_IN4L_RATE_MASK 0x7800 -#define MADERA_IN4L_RATE_SHIFT 11 -#define MADERA_IN4L_RATE_WIDTH 4 - -/* (0x032C) IN4R_Control */ -#define MADERA_IN4R_HPF_MASK 0x8000 -#define MADERA_IN4R_HPF_SHIFT 15 -#define MADERA_IN4R_HPF_WIDTH 1 -#define MADERA_IN4_DMICCLK_SRC_MASK 0x1800 -#define MADERA_IN4_DMICCLK_SRC_SHIFT 11 -#define MADERA_IN4_DMICCLK_SRC_WIDTH 2 - -/* (0x032D) ADC_Digital_Volume_4R */ -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN4R_MUTE 0x0100 -#define MADERA_IN4R_MUTE_MASK 0x0100 -#define MADERA_IN4R_MUTE_SHIFT 8 -#define MADERA_IN4R_MUTE_WIDTH 1 -#define MADERA_IN4R_DIG_VOL_MASK 0x00FF -#define MADERA_IN4R_DIG_VOL_SHIFT 0 -#define MADERA_IN4R_DIG_VOL_WIDTH 8 - -/* (0x032E) DMIC4R_Control */ -#define MADERA_IN4R_DMIC_DLY_MASK 0x003F -#define MADERA_IN4R_DMIC_DLY_SHIFT 0 -#define MADERA_IN4R_DMIC_DLY_WIDTH 6 - -/* (0x032F) IN4R_Rate_Control */ -#define MADERA_IN4R_RATE_MASK 0x7800 -#define MADERA_IN4R_RATE_SHIFT 11 -#define MADERA_IN4R_RATE_WIDTH 4 - -/* (0x0330) IN5L_Control */ -#define MADERA_IN5L_HPF_MASK 0x8000 -#define MADERA_IN5L_HPF_SHIFT 15 -#define MADERA_IN5L_HPF_WIDTH 1 -#define MADERA_IN5_DMIC_SUP_MASK 0x1800 -#define MADERA_IN5_DMIC_SUP_SHIFT 11 -#define MADERA_IN5_DMIC_SUP_WIDTH 2 - -/* (0x0331) ADC_Digital_Volume_5L */ -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN5L_MUTE 0x0100 -#define MADERA_IN5L_MUTE_MASK 0x0100 -#define MADERA_IN5L_MUTE_SHIFT 8 -#define MADERA_IN5L_MUTE_WIDTH 1 -#define MADERA_IN5L_DIG_VOL_MASK 0x00FF -#define MADERA_IN5L_DIG_VOL_SHIFT 0 -#define MADERA_IN5L_DIG_VOL_WIDTH 8 - -/* (0x0332) DMIC5L_Control */ -#define MADERA_IN5L_DMIC_DLY_MASK 0x003F -#define MADERA_IN5L_DMIC_DLY_SHIFT 0 -#define MADERA_IN5L_DMIC_DLY_WIDTH 6 -#define MADERA_IN5_OSR_MASK 0x0700 -#define MADERA_IN5_OSR_SHIFT 8 -#define MADERA_IN5_OSR_WIDTH 3 - -/* (0x0333) IN5L_Rate_Control */ -#define MADERA_IN5L_RATE_MASK 0x7800 -#define MADERA_IN5L_RATE_SHIFT 11 -#define MADERA_IN5L_RATE_WIDTH 4 - -/* (0x0334) IN5R_Control */ -#define MADERA_IN5R_HPF_MASK 0x8000 -#define MADERA_IN5R_HPF_SHIFT 15 -#define MADERA_IN5R_HPF_WIDTH 1 -#define MADERA_IN5_DMICCLK_SRC_MASK 0x1800 -#define MADERA_IN5_DMICCLK_SRC_SHIFT 11 -#define MADERA_IN5_DMICCLK_SRC_WIDTH 2 - -/* (0x0335) ADC_Digital_Volume_5R */ -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN5R_MUTE 0x0100 -#define MADERA_IN5R_MUTE_MASK 0x0100 -#define MADERA_IN5R_MUTE_SHIFT 8 -#define MADERA_IN5R_MUTE_WIDTH 1 -#define MADERA_IN5R_DIG_VOL_MASK 0x00FF -#define MADERA_IN5R_DIG_VOL_SHIFT 0 -#define MADERA_IN5R_DIG_VOL_WIDTH 8 - -/* (0x0336) DMIC5R_Control */ -#define MADERA_IN5R_DMIC_DLY_MASK 0x003F -#define MADERA_IN5R_DMIC_DLY_SHIFT 0 -#define MADERA_IN5R_DMIC_DLY_WIDTH 6 - -/* (0x0337) IN5R_Rate_Control */ -#define MADERA_IN5R_RATE_MASK 0x7800 -#define MADERA_IN5R_RATE_SHIFT 11 -#define MADERA_IN5R_RATE_WIDTH 4 - -/* (0x0338) IN6L_Control */ -#define MADERA_IN6L_HPF_MASK 0x8000 -#define MADERA_IN6L_HPF_SHIFT 15 -#define MADERA_IN6L_HPF_WIDTH 1 -#define MADERA_IN6_DMIC_SUP_MASK 0x1800 -#define MADERA_IN6_DMIC_SUP_SHIFT 11 -#define MADERA_IN6_DMIC_SUP_WIDTH 2 - -/* (0x0339) ADC_Digital_Volume_6L */ -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN6L_MUTE 0x0100 -#define MADERA_IN6L_MUTE_MASK 0x0100 -#define MADERA_IN6L_MUTE_SHIFT 8 -#define MADERA_IN6L_MUTE_WIDTH 1 -#define MADERA_IN6L_DIG_VOL_MASK 0x00FF -#define MADERA_IN6L_DIG_VOL_SHIFT 0 -#define MADERA_IN6L_DIG_VOL_WIDTH 8 - -/* (0x033A) DMIC6L_Control */ -#define MADERA_IN6L_DMIC_DLY_MASK 0x003F -#define MADERA_IN6L_DMIC_DLY_SHIFT 0 -#define MADERA_IN6L_DMIC_DLY_WIDTH 6 -#define MADERA_IN6_OSR_MASK 0x0700 -#define MADERA_IN6_OSR_SHIFT 8 -#define MADERA_IN6_OSR_WIDTH 3 - -/* (0x033C) IN6R_Control */ -#define MADERA_IN6R_HPF_MASK 0x8000 -#define MADERA_IN6R_HPF_SHIFT 15 -#define MADERA_IN6R_HPF_WIDTH 1 - -/* (0x033D) ADC_Digital_Volume_6R */ -#define MADERA_IN_VU 0x0200 -#define MADERA_IN_VU_MASK 0x0200 -#define MADERA_IN_VU_SHIFT 9 -#define MADERA_IN_VU_WIDTH 1 -#define MADERA_IN6R_MUTE 0x0100 -#define MADERA_IN6R_MUTE_MASK 0x0100 -#define MADERA_IN6R_MUTE_SHIFT 8 -#define MADERA_IN6R_MUTE_WIDTH 1 -#define MADERA_IN6R_DIG_VOL_MASK 0x00FF -#define MADERA_IN6R_DIG_VOL_SHIFT 0 -#define MADERA_IN6R_DIG_VOL_WIDTH 8 - -/* (0x033E) DMIC6R_Control */ -#define MADERA_IN6R_DMIC_DLY_MASK 0x003F -#define MADERA_IN6R_DMIC_DLY_SHIFT 0 -#define MADERA_IN6R_DMIC_DLY_WIDTH 6 -#define MADERA_IN6_DMICCLK_SRC_MASK 0x1800 -#define MADERA_IN6_DMICCLK_SRC_SHIFT 11 -#define MADERA_IN6_DMICCLK_SRC_WIDTH 2 - -/* (0x0400) Output_Enables_1 */ -#define MADERA_EP_SEL 0x8000 -#define MADERA_EP_SEL_MASK 0x8000 -#define MADERA_EP_SEL_SHIFT 15 -#define MADERA_EP_SEL_WIDTH 1 -#define MADERA_OUT6L_ENA 0x0800 -#define MADERA_OUT6L_ENA_MASK 0x0800 -#define MADERA_OUT6L_ENA_SHIFT 11 -#define MADERA_OUT6L_ENA_WIDTH 1 -#define MADERA_OUT6R_ENA 0x0400 -#define MADERA_OUT6R_ENA_MASK 0x0400 -#define MADERA_OUT6R_ENA_SHIFT 10 -#define MADERA_OUT6R_ENA_WIDTH 1 -#define MADERA_OUT5L_ENA 0x0200 -#define MADERA_OUT5L_ENA_MASK 0x0200 -#define MADERA_OUT5L_ENA_SHIFT 9 -#define MADERA_OUT5L_ENA_WIDTH 1 -#define MADERA_OUT5R_ENA 0x0100 -#define MADERA_OUT5R_ENA_MASK 0x0100 -#define MADERA_OUT5R_ENA_SHIFT 8 -#define MADERA_OUT5R_ENA_WIDTH 1 -#define MADERA_OUT4L_ENA 0x0080 -#define MADERA_OUT4L_ENA_MASK 0x0080 -#define MADERA_OUT4L_ENA_SHIFT 7 -#define MADERA_OUT4L_ENA_WIDTH 1 -#define MADERA_OUT4R_ENA 0x0040 -#define MADERA_OUT4R_ENA_MASK 0x0040 -#define MADERA_OUT4R_ENA_SHIFT 6 -#define MADERA_OUT4R_ENA_WIDTH 1 -#define MADERA_OUT3L_ENA 0x0020 -#define MADERA_OUT3L_ENA_MASK 0x0020 -#define MADERA_OUT3L_ENA_SHIFT 5 -#define MADERA_OUT3L_ENA_WIDTH 1 -#define MADERA_OUT3R_ENA 0x0010 -#define MADERA_OUT3R_ENA_MASK 0x0010 -#define MADERA_OUT3R_ENA_SHIFT 4 -#define MADERA_OUT3R_ENA_WIDTH 1 -#define MADERA_OUT2L_ENA 0x0008 -#define MADERA_OUT2L_ENA_MASK 0x0008 -#define MADERA_OUT2L_ENA_SHIFT 3 -#define MADERA_OUT2L_ENA_WIDTH 1 -#define MADERA_OUT2R_ENA 0x0004 -#define MADERA_OUT2R_ENA_MASK 0x0004 -#define MADERA_OUT2R_ENA_SHIFT 2 -#define MADERA_OUT2R_ENA_WIDTH 1 -#define MADERA_OUT1L_ENA 0x0002 -#define MADERA_OUT1L_ENA_MASK 0x0002 -#define MADERA_OUT1L_ENA_SHIFT 1 -#define MADERA_OUT1L_ENA_WIDTH 1 -#define MADERA_OUT1R_ENA 0x0001 -#define MADERA_OUT1R_ENA_MASK 0x0001 -#define MADERA_OUT1R_ENA_SHIFT 0 -#define MADERA_OUT1R_ENA_WIDTH 1 - -/* (0x0401) Output_Status_1 */ -#define MADERA_OUT6L_ENA_STS 0x0800 -#define MADERA_OUT6L_ENA_STS_MASK 0x0800 -#define MADERA_OUT6L_ENA_STS_SHIFT 11 -#define MADERA_OUT6L_ENA_STS_WIDTH 1 -#define MADERA_OUT6R_ENA_STS 0x0400 -#define MADERA_OUT6R_ENA_STS_MASK 0x0400 -#define MADERA_OUT6R_ENA_STS_SHIFT 10 -#define MADERA_OUT6R_ENA_STS_WIDTH 1 -#define MADERA_OUT5L_ENA_STS 0x0200 -#define MADERA_OUT5L_ENA_STS_MASK 0x0200 -#define MADERA_OUT5L_ENA_STS_SHIFT 9 -#define MADERA_OUT5L_ENA_STS_WIDTH 1 -#define MADERA_OUT5R_ENA_STS 0x0100 -#define MADERA_OUT5R_ENA_STS_MASK 0x0100 -#define MADERA_OUT5R_ENA_STS_SHIFT 8 -#define MADERA_OUT5R_ENA_STS_WIDTH 1 -#define MADERA_OUT4L_ENA_STS 0x0080 -#define MADERA_OUT4L_ENA_STS_MASK 0x0080 -#define MADERA_OUT4L_ENA_STS_SHIFT 7 -#define MADERA_OUT4L_ENA_STS_WIDTH 1 -#define MADERA_OUT4R_ENA_STS 0x0040 -#define MADERA_OUT4R_ENA_STS_MASK 0x0040 -#define MADERA_OUT4R_ENA_STS_SHIFT 6 -#define MADERA_OUT4R_ENA_STS_WIDTH 1 - -/* (0x0408) Output_Rate_1 */ -#define MADERA_OUT_RATE_MASK 0x7800 -#define MADERA_OUT_RATE_SHIFT 11 -#define MADERA_OUT_RATE_WIDTH 4 - -/* (0x0409) Output_Volume_Ramp */ -#define MADERA_OUT_VD_RAMP_MASK 0x0070 -#define MADERA_OUT_VD_RAMP_SHIFT 4 -#define MADERA_OUT_VD_RAMP_WIDTH 3 -#define MADERA_OUT_VI_RAMP_MASK 0x0007 -#define MADERA_OUT_VI_RAMP_SHIFT 0 -#define MADERA_OUT_VI_RAMP_WIDTH 3 - -/* (0x0410) Output_Path_Config_1L */ -#define MADERA_OUT1_LP_MODE 0x8000 -#define MADERA_OUT1_LP_MODE_MASK 0x8000 -#define MADERA_OUT1_LP_MODE_SHIFT 15 -#define MADERA_OUT1_LP_MODE_WIDTH 1 -#define MADERA_OUT1_OSR 0x2000 -#define MADERA_OUT1_OSR_MASK 0x2000 -#define MADERA_OUT1_OSR_SHIFT 13 -#define MADERA_OUT1_OSR_WIDTH 1 -#define MADERA_OUT1_MONO 0x1000 -#define MADERA_OUT1_MONO_MASK 0x1000 -#define MADERA_OUT1_MONO_SHIFT 12 -#define MADERA_OUT1_MONO_WIDTH 1 -#define MADERA_OUT1L_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT1L_ANC_SRC_SHIFT 10 -#define MADERA_OUT1L_ANC_SRC_WIDTH 2 -#define MADERA_OUT1L_PGA_VOL_MASK 0x00FE -#define MADERA_OUT1L_PGA_VOL_SHIFT 1 -#define MADERA_OUT1L_PGA_VOL_WIDTH 7 - -/* (0x0411) DAC_Digital_Volume_1L */ -#define MADERA_OUT1L_VU 0x0200 -#define MADERA_OUT1L_VU_MASK 0x0200 -#define MADERA_OUT1L_VU_SHIFT 9 -#define MADERA_OUT1L_VU_WIDTH 1 -#define MADERA_OUT1L_MUTE 0x0100 -#define MADERA_OUT1L_MUTE_MASK 0x0100 -#define MADERA_OUT1L_MUTE_SHIFT 8 -#define MADERA_OUT1L_MUTE_WIDTH 1 -#define MADERA_OUT1L_VOL_MASK 0x00FF -#define MADERA_OUT1L_VOL_SHIFT 0 -#define MADERA_OUT1L_VOL_WIDTH 8 - -/* (0x0412) Output_Path_Config_1 */ -#define MADERA_HP1_GND_SEL_MASK 0x0007 -#define MADERA_HP1_GND_SEL_SHIFT 0 -#define MADERA_HP1_GND_SEL_WIDTH 3 - -/* (0x0413) Noise_Gate_Select_1L */ -#define MADERA_OUT1L_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT1L_NGATE_SRC_SHIFT 0 -#define MADERA_OUT1L_NGATE_SRC_WIDTH 12 - -/* (0x0414) Output_Path_Config_1R */ -#define MADERA_OUT1R_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT1R_ANC_SRC_SHIFT 10 -#define MADERA_OUT1R_ANC_SRC_WIDTH 2 -#define MADERA_OUT1R_PGA_VOL_MASK 0x00FE -#define MADERA_OUT1R_PGA_VOL_SHIFT 1 -#define MADERA_OUT1R_PGA_VOL_WIDTH 7 - -/* (0x0415) DAC_Digital_Volume_1R */ -#define MADERA_OUT1R_VU 0x0200 -#define MADERA_OUT1R_VU_MASK 0x0200 -#define MADERA_OUT1R_VU_SHIFT 9 -#define MADERA_OUT1R_VU_WIDTH 1 -#define MADERA_OUT1R_MUTE 0x0100 -#define MADERA_OUT1R_MUTE_MASK 0x0100 -#define MADERA_OUT1R_MUTE_SHIFT 8 -#define MADERA_OUT1R_MUTE_WIDTH 1 -#define MADERA_OUT1R_VOL_MASK 0x00FF -#define MADERA_OUT1R_VOL_SHIFT 0 -#define MADERA_OUT1R_VOL_WIDTH 8 - -/* (0x0417) Noise_Gate_Select_1R */ -#define MADERA_OUT1R_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT1R_NGATE_SRC_SHIFT 0 -#define MADERA_OUT1R_NGATE_SRC_WIDTH 12 - -/* (0x0418) Output_Path_Config_2L */ -#define MADERA_OUT2_LP_MODE 0x8000 -#define MADERA_OUT2_LP_MODE_MASK 0x8000 -#define MADERA_OUT2_LP_MODE_SHIFT 15 -#define MADERA_OUT2_LP_MODE_WIDTH 1 -#define MADERA_OUT2_OSR 0x2000 -#define MADERA_OUT2_OSR_MASK 0x2000 -#define MADERA_OUT2_OSR_SHIFT 13 -#define MADERA_OUT2_OSR_WIDTH 1 -#define MADERA_OUT2_MONO 0x1000 -#define MADERA_OUT2_MONO_MASK 0x1000 -#define MADERA_OUT2_MONO_SHIFT 12 -#define MADERA_OUT2_MONO_WIDTH 1 -#define MADERA_OUT2L_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT2L_ANC_SRC_SHIFT 10 -#define MADERA_OUT2L_ANC_SRC_WIDTH 2 -#define MADERA_OUT2L_PGA_VOL_MASK 0x00FE -#define MADERA_OUT2L_PGA_VOL_SHIFT 1 -#define MADERA_OUT2L_PGA_VOL_WIDTH 7 - -/* (0x0419) DAC_Digital_Volume_2L */ -#define MADERA_OUT2L_VU 0x0200 -#define MADERA_OUT2L_VU_MASK 0x0200 -#define MADERA_OUT2L_VU_SHIFT 9 -#define MADERA_OUT2L_VU_WIDTH 1 -#define MADERA_OUT2L_MUTE 0x0100 -#define MADERA_OUT2L_MUTE_MASK 0x0100 -#define MADERA_OUT2L_MUTE_SHIFT 8 -#define MADERA_OUT2L_MUTE_WIDTH 1 -#define MADERA_OUT2L_VOL_MASK 0x00FF -#define MADERA_OUT2L_VOL_SHIFT 0 -#define MADERA_OUT2L_VOL_WIDTH 8 - -/* (0x041A) Output_Path_Config_2 */ -#define MADERA_HP2_GND_SEL_MASK 0x0007 -#define MADERA_HP2_GND_SEL_SHIFT 0 -#define MADERA_HP2_GND_SEL_WIDTH 3 - -/* (0x041B) Noise_Gate_Select_2L */ -#define MADERA_OUT2L_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT2L_NGATE_SRC_SHIFT 0 -#define MADERA_OUT2L_NGATE_SRC_WIDTH 12 - -/* (0x041C) Output_Path_Config_2R */ -#define MADERA_OUT2R_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT2R_ANC_SRC_SHIFT 10 -#define MADERA_OUT2R_ANC_SRC_WIDTH 2 -#define MADERA_OUT2R_PGA_VOL_MASK 0x00FE -#define MADERA_OUT2R_PGA_VOL_SHIFT 1 -#define MADERA_OUT2R_PGA_VOL_WIDTH 7 - -/* (0x041D) DAC_Digital_Volume_2R */ -#define MADERA_OUT2R_VU 0x0200 -#define MADERA_OUT2R_VU_MASK 0x0200 -#define MADERA_OUT2R_VU_SHIFT 9 -#define MADERA_OUT2R_VU_WIDTH 1 -#define MADERA_OUT2R_MUTE 0x0100 -#define MADERA_OUT2R_MUTE_MASK 0x0100 -#define MADERA_OUT2R_MUTE_SHIFT 8 -#define MADERA_OUT2R_MUTE_WIDTH 1 -#define MADERA_OUT2R_VOL_MASK 0x00FF -#define MADERA_OUT2R_VOL_SHIFT 0 -#define MADERA_OUT2R_VOL_WIDTH 8 - -/* (0x041F) Noise_Gate_Select_2R */ -#define MADERA_OUT2R_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT2R_NGATE_SRC_SHIFT 0 -#define MADERA_OUT2R_NGATE_SRC_WIDTH 12 - -/* (0x0420) Output_Path_Config_3L */ -#define MADERA_OUT3_LP_MODE 0x8000 -#define MADERA_OUT3_LP_MODE_MASK 0x8000 -#define MADERA_OUT3_LP_MODE_SHIFT 15 -#define MADERA_OUT3_LP_MODE_WIDTH 1 -#define MADERA_OUT3_OSR 0x2000 -#define MADERA_OUT3_OSR_MASK 0x2000 -#define MADERA_OUT3_OSR_SHIFT 13 -#define MADERA_OUT3_OSR_WIDTH 1 -#define MADERA_OUT3_MONO 0x1000 -#define MADERA_OUT3_MONO_MASK 0x1000 -#define MADERA_OUT3_MONO_SHIFT 12 -#define MADERA_OUT3_MONO_WIDTH 1 -#define MADERA_OUT3L_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT3L_ANC_SRC_SHIFT 10 -#define MADERA_OUT3L_ANC_SRC_WIDTH 2 -#define MADERA_OUT3L_PGA_VOL_MASK 0x00FE -#define MADERA_OUT3L_PGA_VOL_SHIFT 1 -#define MADERA_OUT3L_PGA_VOL_WIDTH 7 - -/* (0x0421) DAC_Digital_Volume_3L */ -#define MADERA_OUT3L_VU 0x0200 -#define MADERA_OUT3L_VU_MASK 0x0200 -#define MADERA_OUT3L_VU_SHIFT 9 -#define MADERA_OUT3L_VU_WIDTH 1 -#define MADERA_OUT3L_MUTE 0x0100 -#define MADERA_OUT3L_MUTE_MASK 0x0100 -#define MADERA_OUT3L_MUTE_SHIFT 8 -#define MADERA_OUT3L_MUTE_WIDTH 1 -#define MADERA_OUT3L_VOL_MASK 0x00FF -#define MADERA_OUT3L_VOL_SHIFT 0 -#define MADERA_OUT3L_VOL_WIDTH 8 - -/* (0x0423) Noise_Gate_Select_3L */ -#define MADERA_OUT3_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT3_NGATE_SRC_SHIFT 0 -#define MADERA_OUT3_NGATE_SRC_WIDTH 12 - -/* (0x0424) Output_Path_Config_3R */ -#define MADERA_OUT3R_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT3R_ANC_SRC_SHIFT 10 -#define MADERA_OUT3R_ANC_SRC_WIDTH 2 -#define MADERA_OUT3R_PGA_VOL_MASK 0x00FE -#define MADERA_OUT3R_PGA_VOL_SHIFT 1 -#define MADERA_OUT3R_PGA_VOL_WIDTH 7 - -/* (0x0425) DAC_Digital_Volume_3R */ -#define MADERA_OUT3R_VU 0x0200 -#define MADERA_OUT3R_VU_MASK 0x0200 -#define MADERA_OUT3R_VU_SHIFT 9 -#define MADERA_OUT3R_VU_WIDTH 1 -#define MADERA_OUT3R_MUTE 0x0100 -#define MADERA_OUT3R_MUTE_MASK 0x0100 -#define MADERA_OUT3R_MUTE_SHIFT 8 -#define MADERA_OUT3R_MUTE_WIDTH 1 -#define MADERA_OUT3R_VOL_MASK 0x00FF -#define MADERA_OUT3R_VOL_SHIFT 0 -#define MADERA_OUT3R_VOL_WIDTH 8 - -/* (0x0428) Output_Path_Config_4L */ -#define MADERA_OUT4_OSR 0x2000 -#define MADERA_OUT4_OSR_MASK 0x2000 -#define MADERA_OUT4_OSR_SHIFT 13 -#define MADERA_OUT4_OSR_WIDTH 1 -#define MADERA_OUT4L_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT4L_ANC_SRC_SHIFT 10 -#define MADERA_OUT4L_ANC_SRC_WIDTH 2 - -/* (0x0429) DAC_Digital_Volume_4L */ -#define MADERA_OUT4L_VU 0x0200 -#define MADERA_OUT4L_VU_MASK 0x0200 -#define MADERA_OUT4L_VU_SHIFT 9 -#define MADERA_OUT4L_VU_WIDTH 1 -#define MADERA_OUT4L_MUTE 0x0100 -#define MADERA_OUT4L_MUTE_MASK 0x0100 -#define MADERA_OUT4L_MUTE_SHIFT 8 -#define MADERA_OUT4L_MUTE_WIDTH 1 -#define MADERA_OUT4L_VOL_MASK 0x00FF -#define MADERA_OUT4L_VOL_SHIFT 0 -#define MADERA_OUT4L_VOL_WIDTH 8 - -/* (0x042B) Noise_Gate_Select_4L */ -#define MADERA_OUT4L_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT4L_NGATE_SRC_SHIFT 0 -#define MADERA_OUT4L_NGATE_SRC_WIDTH 12 - -/* (0x042C) Output_Path_Config_4R */ -#define MADERA_OUT4R_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT4R_ANC_SRC_SHIFT 10 -#define MADERA_OUT4R_ANC_SRC_WIDTH 2 - -/* (0x042D) DAC_Digital_Volume_4R */ -#define MADERA_OUT4R_VU 0x0200 -#define MADERA_OUT4R_VU_MASK 0x0200 -#define MADERA_OUT4R_VU_SHIFT 9 -#define MADERA_OUT4R_VU_WIDTH 1 -#define MADERA_OUT4R_MUTE 0x0100 -#define MADERA_OUT4R_MUTE_MASK 0x0100 -#define MADERA_OUT4R_MUTE_SHIFT 8 -#define MADERA_OUT4R_MUTE_WIDTH 1 -#define MADERA_OUT4R_VOL_MASK 0x00FF -#define MADERA_OUT4R_VOL_SHIFT 0 -#define MADERA_OUT4R_VOL_WIDTH 8 - -/* (0x042F) Noise_Gate_Select_4R */ -#define MADERA_OUT4R_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT4R_NGATE_SRC_SHIFT 0 -#define MADERA_OUT4R_NGATE_SRC_WIDTH 12 - -/* (0x0430) Output_Path_Config_5L */ -#define MADERA_OUT5_OSR 0x2000 -#define MADERA_OUT5_OSR_MASK 0x2000 -#define MADERA_OUT5_OSR_SHIFT 13 -#define MADERA_OUT5_OSR_WIDTH 1 -#define MADERA_OUT5L_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT5L_ANC_SRC_SHIFT 10 -#define MADERA_OUT5L_ANC_SRC_WIDTH 2 - -/* (0x0431) DAC_Digital_Volume_5L */ -#define MADERA_OUT5L_VU 0x0200 -#define MADERA_OUT5L_VU_MASK 0x0200 -#define MADERA_OUT5L_VU_SHIFT 9 -#define MADERA_OUT5L_VU_WIDTH 1 -#define MADERA_OUT5L_MUTE 0x0100 -#define MADERA_OUT5L_MUTE_MASK 0x0100 -#define MADERA_OUT5L_MUTE_SHIFT 8 -#define MADERA_OUT5L_MUTE_WIDTH 1 -#define MADERA_OUT5L_VOL_MASK 0x00FF -#define MADERA_OUT5L_VOL_SHIFT 0 -#define MADERA_OUT5L_VOL_WIDTH 8 - -/* (0x0433) Noise_Gate_Select_5L */ -#define MADERA_OUT5L_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT5L_NGATE_SRC_SHIFT 0 -#define MADERA_OUT5L_NGATE_SRC_WIDTH 12 - -/* (0x0434) Output_Path_Config_5R */ -#define MADERA_OUT5R_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT5R_ANC_SRC_SHIFT 10 -#define MADERA_OUT5R_ANC_SRC_WIDTH 2 - -/* (0x0435) DAC_Digital_Volume_5R */ -#define MADERA_OUT5R_VU 0x0200 -#define MADERA_OUT5R_VU_MASK 0x0200 -#define MADERA_OUT5R_VU_SHIFT 9 -#define MADERA_OUT5R_VU_WIDTH 1 -#define MADERA_OUT5R_MUTE 0x0100 -#define MADERA_OUT5R_MUTE_MASK 0x0100 -#define MADERA_OUT5R_MUTE_SHIFT 8 -#define MADERA_OUT5R_MUTE_WIDTH 1 -#define MADERA_OUT5R_VOL_MASK 0x00FF -#define MADERA_OUT5R_VOL_SHIFT 0 -#define MADERA_OUT5R_VOL_WIDTH 8 - -/* (0x0437) Noise_Gate_Select_5R */ -#define MADERA_OUT5R_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT5R_NGATE_SRC_SHIFT 0 -#define MADERA_OUT5R_NGATE_SRC_WIDTH 12 - -/* (0x0438) Output_Path_Config_6L */ -#define MADERA_OUT6_OSR 0x2000 -#define MADERA_OUT6_OSR_MASK 0x2000 -#define MADERA_OUT6_OSR_SHIFT 13 -#define MADERA_OUT6_OSR_WIDTH 1 -#define MADERA_OUT6L_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT6L_ANC_SRC_SHIFT 10 -#define MADERA_OUT6L_ANC_SRC_WIDTH 2 - -/* (0x0439) DAC_Digital_Volume_6L */ -#define MADERA_OUT6L_VU 0x0200 -#define MADERA_OUT6L_VU_MASK 0x0200 -#define MADERA_OUT6L_VU_SHIFT 9 -#define MADERA_OUT6L_VU_WIDTH 1 -#define MADERA_OUT6L_MUTE 0x0100 -#define MADERA_OUT6L_MUTE_MASK 0x0100 -#define MADERA_OUT6L_MUTE_SHIFT 8 -#define MADERA_OUT6L_MUTE_WIDTH 1 -#define MADERA_OUT6L_VOL_MASK 0x00FF -#define MADERA_OUT6L_VOL_SHIFT 0 -#define MADERA_OUT6L_VOL_WIDTH 8 - -/* (0x043B) Noise_Gate_Select_6L */ -#define MADERA_OUT6L_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT6L_NGATE_SRC_SHIFT 0 -#define MADERA_OUT6L_NGATE_SRC_WIDTH 12 - -/* (0x043C) Output_Path_Config_6R */ -#define MADERA_OUT6R_ANC_SRC_MASK 0x0C00 -#define MADERA_OUT6R_ANC_SRC_SHIFT 10 -#define MADERA_OUT6R_ANC_SRC_WIDTH 2 - -/* (0x043D) DAC_Digital_Volume_6R */ -#define MADERA_OUT6R_VU 0x0200 -#define MADERA_OUT6R_VU_MASK 0x0200 -#define MADERA_OUT6R_VU_SHIFT 9 -#define MADERA_OUT6R_VU_WIDTH 1 -#define MADERA_OUT6R_MUTE 0x0100 -#define MADERA_OUT6R_MUTE_MASK 0x0100 -#define MADERA_OUT6R_MUTE_SHIFT 8 -#define MADERA_OUT6R_MUTE_WIDTH 1 -#define MADERA_OUT6R_VOL_MASK 0x00FF -#define MADERA_OUT6R_VOL_SHIFT 0 -#define MADERA_OUT6R_VOL_WIDTH 8 - -/* (0x043F) Noise_Gate_Select_6R */ -#define MADERA_OUT6R_NGATE_SRC_MASK 0x0FFF -#define MADERA_OUT6R_NGATE_SRC_SHIFT 0 -#define MADERA_OUT6R_NGATE_SRC_WIDTH 12 - -/* (0x0440) - DRE Enable */ -#define MADERA_DRE3R_ENA 0x0020 -#define MADERA_DRE3R_ENA_MASK 0x0020 -#define MADERA_DRE3R_ENA_SHIFT 5 -#define MADERA_DRE3R_ENA_WIDTH 1 -#define MADERA_DRE3L_ENA 0x0010 -#define MADERA_DRE3L_ENA_MASK 0x0010 -#define MADERA_DRE3L_ENA_SHIFT 4 -#define MADERA_DRE3L_ENA_WIDTH 1 -#define MADERA_DRE2R_ENA 0x0008 -#define MADERA_DRE2R_ENA_MASK 0x0008 -#define MADERA_DRE2R_ENA_SHIFT 3 -#define MADERA_DRE2R_ENA_WIDTH 1 -#define MADERA_DRE2L_ENA 0x0004 -#define MADERA_DRE2L_ENA_MASK 0x0004 -#define MADERA_DRE2L_ENA_SHIFT 2 -#define MADERA_DRE2L_ENA_WIDTH 1 -#define MADERA_DRE1R_ENA 0x0002 -#define MADERA_DRE1R_ENA_MASK 0x0002 -#define MADERA_DRE1R_ENA_SHIFT 1 -#define MADERA_DRE1R_ENA_WIDTH 1 -#define MADERA_DRE1L_ENA 0x0001 -#define MADERA_DRE1L_ENA_MASK 0x0001 -#define MADERA_DRE1L_ENA_SHIFT 0 -#define MADERA_DRE1L_ENA_WIDTH 1 - -/* (0x0448) - EDRE_Enable */ -#define MADERA_EDRE_OUT4L_THR3_ENA 0x0800 -#define MADERA_EDRE_OUT4L_THR3_ENA_MASK 0x0800 -#define MADERA_EDRE_OUT4L_THR3_ENA_SHIFT 11 -#define MADERA_EDRE_OUT4L_THR3_ENA_WIDTH 1 -#define MADERA_EDRE_OUT4R_THR3_ENA 0x0400 -#define MADERA_EDRE_OUT4R_THR3_ENA_MASK 0x0400 -#define MADERA_EDRE_OUT4R_THR3_ENA_SHIFT 10 -#define MADERA_EDRE_OUT4R_THR3_ENA_WIDTH 1 -#define MADERA_EDRE_OUT4L_THR2_ENA 0x0200 -#define MADERA_EDRE_OUT4L_THR2_ENA_MASK 0x0200 -#define MADERA_EDRE_OUT4L_THR2_ENA_SHIFT 9 -#define MADERA_EDRE_OUT4L_THR2_ENA_WIDTH 1 -#define MADERA_EDRE_OUT4R_THR2_ENA 0x0100 -#define MADERA_EDRE_OUT4R_THR2_ENA_MASK 0x0100 -#define MADERA_EDRE_OUT4R_THR2_ENA_SHIFT 8 -#define MADERA_EDRE_OUT4R_THR2_ENA_WIDTH 1 -#define MADERA_EDRE_OUT4L_THR1_ENA 0x0080 -#define MADERA_EDRE_OUT4L_THR1_ENA_MASK 0x0080 -#define MADERA_EDRE_OUT4L_THR1_ENA_SHIFT 7 -#define MADERA_EDRE_OUT4L_THR1_ENA_WIDTH 1 -#define MADERA_EDRE_OUT4R_THR1_ENA 0x0040 -#define MADERA_EDRE_OUT4R_THR1_ENA_MASK 0x0040 -#define MADERA_EDRE_OUT4R_THR1_ENA_SHIFT 6 -#define MADERA_EDRE_OUT4R_THR1_ENA_WIDTH 1 -#define MADERA_EDRE_OUT3L_THR1_ENA 0x0020 -#define MADERA_EDRE_OUT3L_THR1_ENA_MASK 0x0020 -#define MADERA_EDRE_OUT3L_THR1_ENA_SHIFT 5 -#define MADERA_EDRE_OUT3L_THR1_ENA_WIDTH 1 -#define MADERA_EDRE_OUT3R_THR1_ENA 0x0010 -#define MADERA_EDRE_OUT3R_THR1_ENA_MASK 0x0010 -#define MADERA_EDRE_OUT3R_THR1_ENA_SHIFT 4 -#define MADERA_EDRE_OUT3R_THR1_ENA_WIDTH 1 -#define MADERA_EDRE_OUT2L_THR1_ENA 0x0008 -#define MADERA_EDRE_OUT2L_THR1_ENA_MASK 0x0008 -#define MADERA_EDRE_OUT2L_THR1_ENA_SHIFT 3 -#define MADERA_EDRE_OUT2L_THR1_ENA_WIDTH 1 -#define MADERA_EDRE_OUT2R_THR1_ENA 0x0004 -#define MADERA_EDRE_OUT2R_THR1_ENA_MASK 0x0004 -#define MADERA_EDRE_OUT2R_THR1_ENA_SHIFT 2 -#define MADERA_EDRE_OUT2R_THR1_ENA_WIDTH 1 -#define MADERA_EDRE_OUT1L_THR1_ENA 0x0002 -#define MADERA_EDRE_OUT1L_THR1_ENA_MASK 0x0002 -#define MADERA_EDRE_OUT1L_THR1_ENA_SHIFT 1 -#define MADERA_EDRE_OUT1L_THR1_ENA_WIDTH 1 -#define MADERA_EDRE_OUT1R_THR1_ENA 0x0001 -#define MADERA_EDRE_OUT1R_THR1_ENA_MASK 0x0001 -#define MADERA_EDRE_OUT1R_THR1_ENA_SHIFT 0 -#define MADERA_EDRE_OUT1R_THR1_ENA_WIDTH 1 - -/* (0x044A) - EDRE_Manual */ -#define MADERA_EDRE_OUT3L_MANUAL 0x0020 -#define MADERA_EDRE_OUT3L_MANUAL_MASK 0x0020 -#define MADERA_EDRE_OUT3L_MANUAL_SHIFT 5 -#define MADERA_EDRE_OUT3L_MANUAL_WIDTH 1 -#define MADERA_EDRE_OUT3R_MANUAL 0x0010 -#define MADERA_EDRE_OUT3R_MANUAL_MASK 0x0010 -#define MADERA_EDRE_OUT3R_MANUAL_SHIFT 4 -#define MADERA_EDRE_OUT3R_MANUAL_WIDTH 1 -#define MADERA_EDRE_OUT2L_MANUAL 0x0008 -#define MADERA_EDRE_OUT2L_MANUAL_MASK 0x0008 -#define MADERA_EDRE_OUT2L_MANUAL_SHIFT 3 -#define MADERA_EDRE_OUT2L_MANUAL_WIDTH 1 -#define MADERA_EDRE_OUT2R_MANUAL 0x0004 -#define MADERA_EDRE_OUT2R_MANUAL_MASK 0x0004 -#define MADERA_EDRE_OUT2R_MANUAL_SHIFT 2 -#define MADERA_EDRE_OUT2R_MANUAL_WIDTH 1 -#define MADERA_EDRE_OUT1L_MANUAL 0x0002 -#define MADERA_EDRE_OUT1L_MANUAL_MASK 0x0002 -#define MADERA_EDRE_OUT1L_MANUAL_SHIFT 1 -#define MADERA_EDRE_OUT1L_MANUAL_WIDTH 1 -#define MADERA_EDRE_OUT1R_MANUAL 0x0001 -#define MADERA_EDRE_OUT1R_MANUAL_MASK 0x0001 -#define MADERA_EDRE_OUT1R_MANUAL_SHIFT 0 -#define MADERA_EDRE_OUT1R_MANUAL_WIDTH 1 - -/* (0x0450) - DAC AEC Control 1 */ -#define MADERA_AEC1_LOOPBACK_SRC_MASK 0x003C -#define MADERA_AEC1_LOOPBACK_SRC_SHIFT 2 -#define MADERA_AEC1_LOOPBACK_SRC_WIDTH 4 -#define MADERA_AEC1_ENA_STS 0x0002 -#define MADERA_AEC1_ENA_STS_MASK 0x0002 -#define MADERA_AEC1_ENA_STS_SHIFT 1 -#define MADERA_AEC1_ENA_STS_WIDTH 1 -#define MADERA_AEC1_LOOPBACK_ENA 0x0001 -#define MADERA_AEC1_LOOPBACK_ENA_MASK 0x0001 -#define MADERA_AEC1_LOOPBACK_ENA_SHIFT 0 -#define MADERA_AEC1_LOOPBACK_ENA_WIDTH 1 - -/* (0x0451) DAC_AEC_Control_2 */ -#define MADERA_AEC2_LOOPBACK_SRC_MASK 0x003C -#define MADERA_AEC2_LOOPBACK_SRC_SHIFT 2 -#define MADERA_AEC2_LOOPBACK_SRC_WIDTH 4 -#define MADERA_AEC2_ENA_STS 0x0002 -#define MADERA_AEC2_ENA_STS_MASK 0x0002 -#define MADERA_AEC2_ENA_STS_SHIFT 1 -#define MADERA_AEC2_ENA_STS_WIDTH 1 -#define MADERA_AEC2_LOOPBACK_ENA 0x0001 -#define MADERA_AEC2_LOOPBACK_ENA_MASK 0x0001 -#define MADERA_AEC2_LOOPBACK_ENA_SHIFT 0 -#define MADERA_AEC2_LOOPBACK_ENA_WIDTH 1 - -/* (0x0458) Noise_Gate_Control */ -#define MADERA_NGATE_HOLD_MASK 0x0030 -#define MADERA_NGATE_HOLD_SHIFT 4 -#define MADERA_NGATE_HOLD_WIDTH 2 -#define MADERA_NGATE_THR_MASK 0x000E -#define MADERA_NGATE_THR_SHIFT 1 -#define MADERA_NGATE_THR_WIDTH 3 -#define MADERA_NGATE_ENA 0x0001 -#define MADERA_NGATE_ENA_MASK 0x0001 -#define MADERA_NGATE_ENA_SHIFT 0 -#define MADERA_NGATE_ENA_WIDTH 1 - -/* (0x0490) PDM_SPK1_CTRL_1 */ -#define MADERA_SPK1R_MUTE 0x2000 -#define MADERA_SPK1R_MUTE_MASK 0x2000 -#define MADERA_SPK1R_MUTE_SHIFT 13 -#define MADERA_SPK1R_MUTE_WIDTH 1 -#define MADERA_SPK1L_MUTE 0x1000 -#define MADERA_SPK1L_MUTE_MASK 0x1000 -#define MADERA_SPK1L_MUTE_SHIFT 12 -#define MADERA_SPK1L_MUTE_WIDTH 1 -#define MADERA_SPK1_MUTE_ENDIAN 0x0100 -#define MADERA_SPK1_MUTE_ENDIAN_MASK 0x0100 -#define MADERA_SPK1_MUTE_ENDIAN_SHIFT 8 -#define MADERA_SPK1_MUTE_ENDIAN_WIDTH 1 -#define MADERA_SPK1_MUTE_SEQ1_MASK 0x00FF -#define MADERA_SPK1_MUTE_SEQ1_SHIFT 0 -#define MADERA_SPK1_MUTE_SEQ1_WIDTH 8 - -/* (0x0491) PDM_SPK1_CTRL_2 */ -#define MADERA_SPK1_FMT 0x0001 -#define MADERA_SPK1_FMT_MASK 0x0001 -#define MADERA_SPK1_FMT_SHIFT 0 -#define MADERA_SPK1_FMT_WIDTH 1 - -/* (0x0492) PDM_SPK2_CTRL_1 */ -#define MADERA_SPK2R_MUTE 0x2000 -#define MADERA_SPK2R_MUTE_MASK 0x2000 -#define MADERA_SPK2R_MUTE_SHIFT 13 -#define MADERA_SPK2R_MUTE_WIDTH 1 -#define MADERA_SPK2L_MUTE 0x1000 -#define MADERA_SPK2L_MUTE_MASK 0x1000 -#define MADERA_SPK2L_MUTE_SHIFT 12 -#define MADERA_SPK2L_MUTE_WIDTH 1 -#define MADERA_SPK2_MUTE_ENDIAN 0x0100 -#define MADERA_SPK2_MUTE_ENDIAN_MASK 0x0100 -#define MADERA_SPK2_MUTE_ENDIAN_SHIFT 8 -#define MADERA_SPK2_MUTE_ENDIAN_WIDTH 1 -#define MADERA_SPK2_MUTE_SEQ_MASK 0x00FF -#define MADERA_SPK2_MUTE_SEQ_SHIFT 0 -#define MADERA_SPK2_MUTE_SEQ_WIDTH 8 - -/* (0x0493) PDM_SPK2_CTRL_2 */ -#define MADERA_SPK2_FMT 0x0001 -#define MADERA_SPK2_FMT_MASK 0x0001 -#define MADERA_SPK2_FMT_SHIFT 0 -#define MADERA_SPK2_FMT_WIDTH 1 - -/* (0x04A0) - HP1 Short Circuit Ctrl */ -#define MADERA_HP1_SC_ENA 0x1000 -#define MADERA_HP1_SC_ENA_MASK 0x1000 -#define MADERA_HP1_SC_ENA_SHIFT 12 -#define MADERA_HP1_SC_ENA_WIDTH 1 - -/* (0x04A1) - HP2 Short Circuit Ctrl */ -#define MADERA_HP2_SC_ENA 0x1000 -#define MADERA_HP2_SC_ENA_MASK 0x1000 -#define MADERA_HP2_SC_ENA_SHIFT 12 -#define MADERA_HP2_SC_ENA_WIDTH 1 - -/* (0x04A2) - HP3 Short Circuit Ctrl */ -#define MADERA_HP3_SC_ENA 0x1000 -#define MADERA_HP3_SC_ENA_MASK 0x1000 -#define MADERA_HP3_SC_ENA_SHIFT 12 -#define MADERA_HP3_SC_ENA_WIDTH 1 - -/* (0x04A4) HP Test Ctrl 1 */ -#define MADERA_HP1_TST_CAP_SEL_MASK 0x0003 -#define MADERA_HP1_TST_CAP_SEL_SHIFT 0 -#define MADERA_HP1_TST_CAP_SEL_WIDTH 2 - -/* (0x04A8) - HP_Test_Ctrl_5 */ -#define MADERA_HP1L_TST_CINT 0x4000 -#define MADERA_HP1L_TST_CINT_MASK 0x4000 -#define MADERA_HP1L_TST_CINT_SHIFT 14 -#define MADERA_HP1L_TST_CINT_WIDTH 1 -#define MADERA_HP1L_TST_GBW 0x3000 -#define MADERA_HP1L_TST_GBW_MASK 0x3000 -#define MADERA_HP1L_TST_GBW_SHIFT 12 -#define MADERA_HP1L_TST_GBW_WIDTH 2 -#define MADERA_HP1L_TST_PGAS 0x0800 -#define MADERA_HP1L_TST_PGAS_MASK 0x0800 -#define MADERA_HP1L_TST_PGAS_SHIFT 11 -#define MADERA_HP1L_TST_PGAS_WIDTH 1 -#define MADERA_HP1L_TST_DUMP 0x0400 -#define MADERA_HP1L_TST_DUMP_MASK 0x0400 -#define MADERA_HP1L_TST_DUMP_SHIFT 10 -#define MADERA_HP1L_TST_DUMP_WIDTH 1 -#define MADERA_HP1L_TST_RST 0x0200 -#define MADERA_HP1L_TST_RST_MASK 0x0200 -#define MADERA_HP1L_TST_RST_SHIFT 9 -#define MADERA_HP1L_TST_RST_WIDTH 1 -#define MADERA_HP1L_ONEFLT 0x0100 -#define MADERA_HP1L_ONEFLT_MASK 0x0100 -#define MADERA_HP1L_ONEFLT_SHIFT 8 -#define MADERA_HP1L_ONEFLT_WIDTH 1 -#define MADERA_HP1L_TST_THDOFF 0x00C0 -#define MADERA_HP1L_TST_THDOFF_MASK 0x00C0 -#define MADERA_HP1L_TST_THDOFF_SHIFT 6 -#define MADERA_HP1L_TST_THDOFF_WIDTH 2 -#define MADERA_HP1L_CTRL_IOUT 0x0030 -#define MADERA_HP1L_CTRL_IOUT_MASK 0x0030 -#define MADERA_HP1L_CTRL_IOUT_SHIFT 4 -#define MADERA_HP1L_CTRL_IOUT_WIDTH 2 -#define MADERA_HP1L_TST_ILG 0x0008 -#define MADERA_HP1L_TST_ILG_MASK 0x0008 -#define MADERA_HP1L_TST_ILG_SHIFT 3 -#define MADERA_HP1L_TST_ILG_WIDTH 1 -#define MADERA_HP1L_TST_IBIAS 0x0003 -#define MADERA_HP1L_TST_IBIAS_MASK 0x0003 -#define MADERA_HP1L_TST_IBIAS_SHIFT 0 -#define MADERA_HP1L_TST_IBIAS_WIDTH 2 - -/* (0x04A9) - HP_Test_Ctrl_6 */ -#define MADERA_HP1R_TST_CINT 0x4000 -#define MADERA_HP1R_TST_CINT_MASK 0x4000 -#define MADERA_HP1R_TST_CINT_SHIFT 14 -#define MADERA_HP1R_TST_CINT_WIDTH 1 -#define MADERA_HP1R_TST_GBW 0x3000 -#define MADERA_HP1R_TST_GBW_MASK 0x3000 -#define MADERA_HP1R_TST_GBW_SHIFT 12 -#define MADERA_HP1R_TST_GBW_WIDTH 2 -#define MADERA_HP1R_TST_PGAS 0x0800 -#define MADERA_HP1R_TST_PGAS_MASK 0x0800 -#define MADERA_HP1R_TST_PGAS_SHIFT 11 -#define MADERA_HP1R_TST_PGAS_WIDTH 1 -#define MADERA_HP1R_TST_DUMP 0x0400 -#define MADERA_HP1R_TST_DUMP_MASK 0x0400 -#define MADERA_HP1R_TST_DUMP_SHIFT 10 -#define MADERA_HP1R_TST_DUMP_WIDTH 1 -#define MADERA_HP1R_TST_RST 0x0200 -#define MADERA_HP1R_TST_RST_MASK 0x0200 -#define MADERA_HP1R_TST_RST_SHIFT 9 -#define MADERA_HP1R_TST_RST_WIDTH 1 -#define MADERA_HP1R_ONEFLT 0x0100 -#define MADERA_HP1R_ONEFLT_MASK 0x0100 -#define MADERA_HP1R_ONEFLT_SHIFT 8 -#define MADERA_HP1R_ONEFLT_WIDTH 1 -#define MADERA_HP1R_TST_THDOFF 0x00C0 -#define MADERA_HP1R_TST_THDOFF_MASK 0x00C0 -#define MADERA_HP1R_TST_THDOFF_SHIFT 6 -#define MADERA_HP1R_TST_THDOFF_WIDTH 2 -#define MADERA_HP1R_CTRL_IOUT 0x0030 -#define MADERA_HP1R_CTRL_IOUT_MASK 0x0030 -#define MADERA_HP1R_CTRL_IOUT_SHIFT 4 -#define MADERA_HP1R_CTRL_IOUT_WIDTH 2 -#define MADERA_HP1R_TST_ILG 0x0008 -#define MADERA_HP1R_TST_ILG_MASK 0x0008 -#define MADERA_HP1R_TST_ILG_SHIFT 3 -#define MADERA_HP1R_TST_ILG_WIDTH 1 -#define MADERA_HP1R_TST_IBIAS 0x0003 -#define MADERA_HP1R_TST_IBIAS_MASK 0x0003 -#define MADERA_HP1R_TST_IBIAS_SHIFT 0 -#define MADERA_HP1R_TST_IBIAS_WIDTH 2 - -/* (0x0500) AIF1_BCLK_Ctrl */ -#define MADERA_AIF1_BCLK_INV 0x0080 -#define MADERA_AIF1_BCLK_INV_MASK 0x0080 -#define MADERA_AIF1_BCLK_INV_SHIFT 7 -#define MADERA_AIF1_BCLK_INV_WIDTH 1 -#define MADERA_AIF1_BCLK_FRC 0x0040 -#define MADERA_AIF1_BCLK_FRC_MASK 0x0040 -#define MADERA_AIF1_BCLK_FRC_SHIFT 6 -#define MADERA_AIF1_BCLK_FRC_WIDTH 1 -#define MADERA_AIF1_BCLK_MSTR 0x0020 -#define MADERA_AIF1_BCLK_MSTR_MASK 0x0020 -#define MADERA_AIF1_BCLK_MSTR_SHIFT 5 -#define MADERA_AIF1_BCLK_MSTR_WIDTH 1 -#define MADERA_AIF1_BCLK_FREQ_MASK 0x001F -#define MADERA_AIF1_BCLK_FREQ_SHIFT 0 -#define MADERA_AIF1_BCLK_FREQ_WIDTH 5 - -/* (0x0501) AIF1_Tx_Pin_Ctrl */ -#define MADERA_AIF1TX_DAT_TRI 0x0020 -#define MADERA_AIF1TX_DAT_TRI_MASK 0x0020 -#define MADERA_AIF1TX_DAT_TRI_SHIFT 5 -#define MADERA_AIF1TX_DAT_TRI_WIDTH 1 -#define MADERA_AIF1TX_LRCLK_SRC 0x0008 -#define MADERA_AIF1TX_LRCLK_SRC_MASK 0x0008 -#define MADERA_AIF1TX_LRCLK_SRC_SHIFT 3 -#define MADERA_AIF1TX_LRCLK_SRC_WIDTH 1 -#define MADERA_AIF1TX_LRCLK_INV 0x0004 -#define MADERA_AIF1TX_LRCLK_INV_MASK 0x0004 -#define MADERA_AIF1TX_LRCLK_INV_SHIFT 2 -#define MADERA_AIF1TX_LRCLK_INV_WIDTH 1 -#define MADERA_AIF1TX_LRCLK_FRC 0x0002 -#define MADERA_AIF1TX_LRCLK_FRC_MASK 0x0002 -#define MADERA_AIF1TX_LRCLK_FRC_SHIFT 1 -#define MADERA_AIF1TX_LRCLK_FRC_WIDTH 1 -#define MADERA_AIF1TX_LRCLK_MSTR 0x0001 -#define MADERA_AIF1TX_LRCLK_MSTR_MASK 0x0001 -#define MADERA_AIF1TX_LRCLK_MSTR_SHIFT 0 -#define MADERA_AIF1TX_LRCLK_MSTR_WIDTH 1 - -/* (0x0502) AIF1_Rx_Pin_Ctrl */ -#define MADERA_AIF1RX_LRCLK_INV 0x0004 -#define MADERA_AIF1RX_LRCLK_INV_MASK 0x0004 -#define MADERA_AIF1RX_LRCLK_INV_SHIFT 2 -#define MADERA_AIF1RX_LRCLK_INV_WIDTH 1 -#define MADERA_AIF1RX_LRCLK_FRC 0x0002 -#define MADERA_AIF1RX_LRCLK_FRC_MASK 0x0002 -#define MADERA_AIF1RX_LRCLK_FRC_SHIFT 1 -#define MADERA_AIF1RX_LRCLK_FRC_WIDTH 1 -#define MADERA_AIF1RX_LRCLK_MSTR 0x0001 -#define MADERA_AIF1RX_LRCLK_MSTR_MASK 0x0001 -#define MADERA_AIF1RX_LRCLK_MSTR_SHIFT 0 -#define MADERA_AIF1RX_LRCLK_MSTR_WIDTH 1 - -/* (0x0503) AIF1_Rate_Ctrl */ -#define MADERA_AIF1_RATE_MASK 0x7800 -#define MADERA_AIF1_RATE_SHIFT 11 -#define MADERA_AIF1_RATE_WIDTH 4 -#define MADERA_AIF1_TRI 0x0040 -#define MADERA_AIF1_TRI_MASK 0x0040 -#define MADERA_AIF1_TRI_SHIFT 6 -#define MADERA_AIF1_TRI_WIDTH 1 - -/* (0x0504) AIF1_Format */ -#define MADERA_AIF1_FMT_MASK 0x0007 -#define MADERA_AIF1_FMT_SHIFT 0 -#define MADERA_AIF1_FMT_WIDTH 3 - -/* (0x0505) - AIF1 Tx BCLK Rate */ -#define MADERA_AIF1TX_BCPF_MASK 0x1FFF -#define MADERA_AIF1TX_BCPF_SHIFT 0 -#define MADERA_AIF1TX_BCPF_WIDTH 13 - -/* (0x0506) AIF1_Rx_BCLK_Rate */ -#define MADERA_AIF1RX_BCPF_MASK 0x1FFF -#define MADERA_AIF1RX_BCPF_SHIFT 0 -#define MADERA_AIF1RX_BCPF_WIDTH 13 - -/* (0x0507) AIF1_Frame_Ctrl_1 */ -#define MADERA_AIF1TX_WL_MASK 0x3F00 -#define MADERA_AIF1TX_WL_SHIFT 8 -#define MADERA_AIF1TX_WL_WIDTH 6 -#define MADERA_AIF1TX_SLOT_LEN_MASK 0x00FF -#define MADERA_AIF1TX_SLOT_LEN_SHIFT 0 -#define MADERA_AIF1TX_SLOT_LEN_WIDTH 8 - -/* (0x0508) AIF1_Frame_Ctrl_2 */ -#define MADERA_AIF1RX_WL_MASK 0x3F00 -#define MADERA_AIF1RX_WL_SHIFT 8 -#define MADERA_AIF1RX_WL_WIDTH 6 -#define MADERA_AIF1RX_SLOT_LEN_MASK 0x00FF -#define MADERA_AIF1RX_SLOT_LEN_SHIFT 0 -#define MADERA_AIF1RX_SLOT_LEN_WIDTH 8 - -/* (0x0509) AIF1_Frame_Ctrl_3 */ -#define MADERA_AIF1TX1_SLOT_MASK 0x003F -#define MADERA_AIF1TX1_SLOT_SHIFT 0 -#define MADERA_AIF1TX1_SLOT_WIDTH 6 - -/* (0x050A) AIF1_Frame_Ctrl_4 */ -#define MADERA_AIF1TX2_SLOT_MASK 0x003F -#define MADERA_AIF1TX2_SLOT_SHIFT 0 -#define MADERA_AIF1TX2_SLOT_WIDTH 6 - -/* (0x050B) AIF1_Frame_Ctrl_5 */ -#define MADERA_AIF1TX3_SLOT_MASK 0x003F -#define MADERA_AIF1TX3_SLOT_SHIFT 0 -#define MADERA_AIF1TX3_SLOT_WIDTH 6 - -/* (0x050C) AIF1_Frame_Ctrl_6 */ -#define MADERA_AIF1TX4_SLOT_MASK 0x003F -#define MADERA_AIF1TX4_SLOT_SHIFT 0 -#define MADERA_AIF1TX4_SLOT_WIDTH 6 - -/* (0x050D) AIF1_Frame_Ctrl_7 */ -#define MADERA_AIF1TX5_SLOT_MASK 0x003F -#define MADERA_AIF1TX5_SLOT_SHIFT 0 -#define MADERA_AIF1TX5_SLOT_WIDTH 6 - -/* (0x050E) AIF1_Frame_Ctrl_8 */ -#define MADERA_AIF1TX6_SLOT_MASK 0x003F -#define MADERA_AIF1TX6_SLOT_SHIFT 0 -#define MADERA_AIF1TX6_SLOT_WIDTH 6 - -/* (0x050F) AIF1_Frame_Ctrl_9 */ -#define MADERA_AIF1TX7_SLOT_MASK 0x003F -#define MADERA_AIF1TX7_SLOT_SHIFT 0 -#define MADERA_AIF1TX7_SLOT_WIDTH 6 - -/* (0x0510) AIF1_Frame_Ctrl_10 */ -#define MADERA_AIF1TX8_SLOT_MASK 0x003F -#define MADERA_AIF1TX8_SLOT_SHIFT 0 -#define MADERA_AIF1TX8_SLOT_WIDTH 6 - -/* (0x0511) AIF1_Frame_Ctrl_11 */ -#define MADERA_AIF1RX1_SLOT_MASK 0x003F -#define MADERA_AIF1RX1_SLOT_SHIFT 0 -#define MADERA_AIF1RX1_SLOT_WIDTH 6 - -/* (0x0512) AIF1_Frame_Ctrl_12 */ -#define MADERA_AIF1RX2_SLOT_MASK 0x003F -#define MADERA_AIF1RX2_SLOT_SHIFT 0 -#define MADERA_AIF1RX2_SLOT_WIDTH 6 - -/* (0x0513) AIF1_Frame_Ctrl_13 */ -#define MADERA_AIF1RX3_SLOT_MASK 0x003F -#define MADERA_AIF1RX3_SLOT_SHIFT 0 -#define MADERA_AIF1RX3_SLOT_WIDTH 6 - -/* (0x0514) AIF1_Frame_Ctrl_14 */ -#define MADERA_AIF1RX4_SLOT_MASK 0x003F -#define MADERA_AIF1RX4_SLOT_SHIFT 0 -#define MADERA_AIF1RX4_SLOT_WIDTH 6 - -/* (0x0515) AIF1_Frame_Ctrl_15 */ -#define MADERA_AIF1RX5_SLOT_MASK 0x003F -#define MADERA_AIF1RX5_SLOT_SHIFT 0 -#define MADERA_AIF1RX5_SLOT_WIDTH 6 - -/* (0x0516) AIF1_Frame_Ctrl_16 */ -#define MADERA_AIF1RX6_SLOT_MASK 0x003F -#define MADERA_AIF1RX6_SLOT_SHIFT 0 -#define MADERA_AIF1RX6_SLOT_WIDTH 6 - -/* (0x0517) AIF1_Frame_Ctrl_17 */ -#define MADERA_AIF1RX7_SLOT_MASK 0x003F -#define MADERA_AIF1RX7_SLOT_SHIFT 0 -#define MADERA_AIF1RX7_SLOT_WIDTH 6 - -/* (0x0518) AIF1_Frame_Ctrl_18 */ -#define MADERA_AIF1RX8_SLOT_MASK 0x003F -#define MADERA_AIF1RX8_SLOT_SHIFT 0 -#define MADERA_AIF1RX8_SLOT_WIDTH 6 - -/* (0x0519) AIF1_Tx_Enables */ -#define MADERA_AIF1TX8_ENA 0x0080 -#define MADERA_AIF1TX8_ENA_MASK 0x0080 -#define MADERA_AIF1TX8_ENA_SHIFT 7 -#define MADERA_AIF1TX8_ENA_WIDTH 1 -#define MADERA_AIF1TX7_ENA 0x0040 -#define MADERA_AIF1TX7_ENA_MASK 0x0040 -#define MADERA_AIF1TX7_ENA_SHIFT 6 -#define MADERA_AIF1TX7_ENA_WIDTH 1 -#define MADERA_AIF1TX6_ENA 0x0020 -#define MADERA_AIF1TX6_ENA_MASK 0x0020 -#define MADERA_AIF1TX6_ENA_SHIFT 5 -#define MADERA_AIF1TX6_ENA_WIDTH 1 -#define MADERA_AIF1TX5_ENA 0x0010 -#define MADERA_AIF1TX5_ENA_MASK 0x0010 -#define MADERA_AIF1TX5_ENA_SHIFT 4 -#define MADERA_AIF1TX5_ENA_WIDTH 1 -#define MADERA_AIF1TX4_ENA 0x0008 -#define MADERA_AIF1TX4_ENA_MASK 0x0008 -#define MADERA_AIF1TX4_ENA_SHIFT 3 -#define MADERA_AIF1TX4_ENA_WIDTH 1 -#define MADERA_AIF1TX3_ENA 0x0004 -#define MADERA_AIF1TX3_ENA_MASK 0x0004 -#define MADERA_AIF1TX3_ENA_SHIFT 2 -#define MADERA_AIF1TX3_ENA_WIDTH 1 -#define MADERA_AIF1TX2_ENA 0x0002 -#define MADERA_AIF1TX2_ENA_MASK 0x0002 -#define MADERA_AIF1TX2_ENA_SHIFT 1 -#define MADERA_AIF1TX2_ENA_WIDTH 1 -#define MADERA_AIF1TX1_ENA 0x0001 -#define MADERA_AIF1TX1_ENA_MASK 0x0001 -#define MADERA_AIF1TX1_ENA_SHIFT 0 -#define MADERA_AIF1TX1_ENA_WIDTH 1 - -/* (0x051A) AIF1_Rx_Enables */ -#define MADERA_AIF1RX8_ENA 0x0080 -#define MADERA_AIF1RX8_ENA_MASK 0x0080 -#define MADERA_AIF1RX8_ENA_SHIFT 7 -#define MADERA_AIF1RX8_ENA_WIDTH 1 -#define MADERA_AIF1RX7_ENA 0x0040 -#define MADERA_AIF1RX7_ENA_MASK 0x0040 -#define MADERA_AIF1RX7_ENA_SHIFT 6 -#define MADERA_AIF1RX7_ENA_WIDTH 1 -#define MADERA_AIF1RX6_ENA 0x0020 -#define MADERA_AIF1RX6_ENA_MASK 0x0020 -#define MADERA_AIF1RX6_ENA_SHIFT 5 -#define MADERA_AIF1RX6_ENA_WIDTH 1 -#define MADERA_AIF1RX5_ENA 0x0010 -#define MADERA_AIF1RX5_ENA_MASK 0x0010 -#define MADERA_AIF1RX5_ENA_SHIFT 4 -#define MADERA_AIF1RX5_ENA_WIDTH 1 -#define MADERA_AIF1RX4_ENA 0x0008 -#define MADERA_AIF1RX4_ENA_MASK 0x0008 -#define MADERA_AIF1RX4_ENA_SHIFT 3 -#define MADERA_AIF1RX4_ENA_WIDTH 1 -#define MADERA_AIF1RX3_ENA 0x0004 -#define MADERA_AIF1RX3_ENA_MASK 0x0004 -#define MADERA_AIF1RX3_ENA_SHIFT 2 -#define MADERA_AIF1RX3_ENA_WIDTH 1 -#define MADERA_AIF1RX2_ENA 0x0002 -#define MADERA_AIF1RX2_ENA_MASK 0x0002 -#define MADERA_AIF1RX2_ENA_SHIFT 1 -#define MADERA_AIF1RX2_ENA_WIDTH 1 -#define MADERA_AIF1RX1_ENA 0x0001 -#define MADERA_AIF1RX1_ENA_MASK 0x0001 -#define MADERA_AIF1RX1_ENA_SHIFT 0 -#define MADERA_AIF1RX1_ENA_WIDTH 1 - -/* (0x051B) - AIF1 Force Write */ -#define MADERA_AIF1_FRC_WR 0x0001 -#define MADERA_AIF1_FRC_WR_MASK 0x0001 -#define MADERA_AIF1_FRC_WR_SHIFT 0 -#define MADERA_AIF1_FRC_WR_WIDTH 1 - -/* (0x0540) AIF2_BCLK_Ctrl */ -#define MADERA_AIF2_BCLK_INV 0x0080 -#define MADERA_AIF2_BCLK_INV_MASK 0x0080 -#define MADERA_AIF2_BCLK_INV_SHIFT 7 -#define MADERA_AIF2_BCLK_INV_WIDTH 1 -#define MADERA_AIF2_BCLK_FRC 0x0040 -#define MADERA_AIF2_BCLK_FRC_MASK 0x0040 -#define MADERA_AIF2_BCLK_FRC_SHIFT 6 -#define MADERA_AIF2_BCLK_FRC_WIDTH 1 -#define MADERA_AIF2_BCLK_MSTR 0x0020 -#define MADERA_AIF2_BCLK_MSTR_MASK 0x0020 -#define MADERA_AIF2_BCLK_MSTR_SHIFT 5 -#define MADERA_AIF2_BCLK_MSTR_WIDTH 1 -#define MADERA_AIF2_BCLK_FREQ_MASK 0x001F -#define MADERA_AIF2_BCLK_FREQ_SHIFT 0 -#define MADERA_AIF2_BCLK_FREQ_WIDTH 5 - -/* (0x0541) AIF2_Tx_Pin_Ctrl */ -#define MADERA_AIF2TX_DAT_TRI 0x0020 -#define MADERA_AIF2TX_DAT_TRI_MASK 0x0020 -#define MADERA_AIF2TX_DAT_TRI_SHIFT 5 -#define MADERA_AIF2TX_DAT_TRI_WIDTH 1 -#define MADERA_AIF2TX_LRCLK_SRC 0x0008 -#define MADERA_AIF2TX_LRCLK_SRC_MASK 0x0008 -#define MADERA_AIF2TX_LRCLK_SRC_SHIFT 3 -#define MADERA_AIF2TX_LRCLK_SRC_WIDTH 1 -#define MADERA_AIF2TX_LRCLK_INV 0x0004 -#define MADERA_AIF2TX_LRCLK_INV_MASK 0x0004 -#define MADERA_AIF2TX_LRCLK_INV_SHIFT 2 -#define MADERA_AIF2TX_LRCLK_INV_WIDTH 1 -#define MADERA_AIF2TX_LRCLK_FRC 0x0002 -#define MADERA_AIF2TX_LRCLK_FRC_MASK 0x0002 -#define MADERA_AIF2TX_LRCLK_FRC_SHIFT 1 -#define MADERA_AIF2TX_LRCLK_FRC_WIDTH 1 -#define MADERA_AIF2TX_LRCLK_MSTR 0x0001 -#define MADERA_AIF2TX_LRCLK_MSTR_MASK 0x0001 -#define MADERA_AIF2TX_LRCLK_MSTR_SHIFT 0 -#define MADERA_AIF2TX_LRCLK_MSTR_WIDTH 1 - -/* (0x0542) AIF2_Rx_Pin_Ctrl */ -#define MADERA_AIF2RX_LRCLK_INV 0x0004 -#define MADERA_AIF2RX_LRCLK_INV_MASK 0x0004 -#define MADERA_AIF2RX_LRCLK_INV_SHIFT 2 -#define MADERA_AIF2RX_LRCLK_INV_WIDTH 1 -#define MADERA_AIF2RX_LRCLK_FRC 0x0002 -#define MADERA_AIF2RX_LRCLK_FRC_MASK 0x0002 -#define MADERA_AIF2RX_LRCLK_FRC_SHIFT 1 -#define MADERA_AIF2RX_LRCLK_FRC_WIDTH 1 -#define MADERA_AIF2RX_LRCLK_MSTR 0x0001 -#define MADERA_AIF2RX_LRCLK_MSTR_MASK 0x0001 -#define MADERA_AIF2RX_LRCLK_MSTR_SHIFT 0 -#define MADERA_AIF2RX_LRCLK_MSTR_WIDTH 1 - -/* (0x0543) AIF2_Rate_Ctrl */ -#define MADERA_AIF2_RATE_MASK 0x7800 -#define MADERA_AIF2_RATE_SHIFT 11 -#define MADERA_AIF2_RATE_WIDTH 4 -#define MADERA_AIF2_TRI 0x0040 -#define MADERA_AIF2_TRI_MASK 0x0040 -#define MADERA_AIF2_TRI_SHIFT 6 -#define MADERA_AIF2_TRI_WIDTH 1 - -/* (0x0544) AIF2_Format */ -#define MADERA_AIF2_FMT_MASK 0x0007 -#define MADERA_AIF2_FMT_SHIFT 0 -#define MADERA_AIF2_FMT_WIDTH 3 - -/* (0x0545) - AIF2 Tx BCLK Rate */ -#define MADERA_AIF2TX_BCPF_MASK 0x1FFF -#define MADERA_AIF2TX_BCPF_SHIFT 0 -#define MADERA_AIF2TX_BCPF_WIDTH 13 - -/* (0x0546) AIF2_Rx_BCLK_Rate */ -#define MADERA_AIF2RX_BCPF_MASK 0x1FFF -#define MADERA_AIF2RX_BCPF_SHIFT 0 -#define MADERA_AIF2RX_BCPF_WIDTH 13 - -/* (0x0547) AIF2_Frame_Ctrl_1 */ -#define MADERA_AIF2TX_WL_MASK 0x3F00 -#define MADERA_AIF2TX_WL_SHIFT 8 -#define MADERA_AIF2TX_WL_WIDTH 6 -#define MADERA_AIF2TX_SLOT_LEN_MASK 0x00FF -#define MADERA_AIF2TX_SLOT_LEN_SHIFT 0 -#define MADERA_AIF2TX_SLOT_LEN_WIDTH 8 - -/* (0x0548) AIF2_Frame_Ctrl_2 */ -#define MADERA_AIF2RX_WL_MASK 0x3F00 -#define MADERA_AIF2RX_WL_SHIFT 8 -#define MADERA_AIF2RX_WL_WIDTH 6 -#define MADERA_AIF2RX_SLOT_LEN_MASK 0x00FF -#define MADERA_AIF2RX_SLOT_LEN_SHIFT 0 -#define MADERA_AIF2RX_SLOT_LEN_WIDTH 8 - -/* (0x0549) AIF2_Frame_Ctrl_3 */ -#define MADERA_AIF2TX1_SLOT_MASK 0x003F -#define MADERA_AIF2TX1_SLOT_SHIFT 0 -#define MADERA_AIF2TX1_SLOT_WIDTH 6 - -/* (0x054A) AIF2_Frame_Ctrl_4 */ -#define MADERA_AIF2TX2_SLOT_MASK 0x003F -#define MADERA_AIF2TX2_SLOT_SHIFT 0 -#define MADERA_AIF2TX2_SLOT_WIDTH 6 - -/* (0x054B) AIF2_Frame_Ctrl_5 */ -#define MADERA_AIF2TX3_SLOT_MASK 0x003F -#define MADERA_AIF2TX3_SLOT_SHIFT 0 -#define MADERA_AIF2TX3_SLOT_WIDTH 6 - -/* (0x054C) AIF2_Frame_Ctrl_6 */ -#define MADERA_AIF2TX4_SLOT_MASK 0x003F -#define MADERA_AIF2TX4_SLOT_SHIFT 0 -#define MADERA_AIF2TX4_SLOT_WIDTH 6 - - -/* (0x054D) AIF2_Frame_Ctrl_7 */ -#define MADERA_AIF2TX5_SLOT_MASK 0x003F -#define MADERA_AIF2TX5_SLOT_SHIFT 0 -#define MADERA_AIF2TX5_SLOT_WIDTH 6 - -/* (0x054E) AIF2_Frame_Ctrl_8 */ -#define MADERA_AIF2TX6_SLOT_MASK 0x003F -#define MADERA_AIF2TX6_SLOT_SHIFT 0 -#define MADERA_AIF2TX6_SLOT_WIDTH 6 - -/* (0x054F) AIF2_Frame_Ctrl_9 */ -#define MADERA_AIF2TX7_SLOT_MASK 0x003F -#define MADERA_AIF2TX7_SLOT_SHIFT 0 -#define MADERA_AIF2TX7_SLOT_WIDTH 6 -/* (0x0550) AIF2_Frame_Ctrl_10 */ -#define MADERA_AIF2TX8_SLOT_MASK 0x003F -#define MADERA_AIF2TX8_SLOT_SHIFT 0 -#define MADERA_AIF2TX8_SLOT_WIDTH 6 - -/* (0x0551) AIF2_Frame_Ctrl_11 */ -#define MADERA_AIF2RX1_SLOT_MASK 0x003F -#define MADERA_AIF2RX1_SLOT_SHIFT 0 -#define MADERA_AIF2RX1_SLOT_WIDTH 6 - -/* (0x0552) AIF2_Frame_Ctrl_12 */ -#define MADERA_AIF2RX2_SLOT_MASK 0x003F -#define MADERA_AIF2RX2_SLOT_SHIFT 0 -#define MADERA_AIF2RX2_SLOT_WIDTH 6 - -/* (0x0553) AIF2_Frame_Ctrl_13 */ -#define MADERA_AIF2RX3_SLOT_MASK 0x003F -#define MADERA_AIF2RX3_SLOT_SHIFT 0 -#define MADERA_AIF2RX3_SLOT_WIDTH 6 - -/* (0x0554) AIF2_Frame_Ctrl_14 */ -#define MADERA_AIF2RX4_SLOT_MASK 0x003F -#define MADERA_AIF2RX4_SLOT_SHIFT 0 -#define MADERA_AIF2RX4_SLOT_WIDTH 6 - -/* (0x0555) AIF2_Frame_Ctrl_15 */ -#define MADERA_AIF2RX5_SLOT_MASK 0x003F -#define MADERA_AIF2RX5_SLOT_SHIFT 0 -#define MADERA_AIF2RX5_SLOT_WIDTH 6 - -/* (0x0556) AIF2_Frame_Ctrl_16 */ -#define MADERA_AIF2RX6_SLOT_MASK 0x003F -#define MADERA_AIF2RX6_SLOT_SHIFT 0 -#define MADERA_AIF2RX6_SLOT_WIDTH 6 - -/* (0x0557) AIF2_Frame_Ctrl_17 */ -#define MADERA_AIF2RX7_SLOT_MASK 0x003F -#define MADERA_AIF2RX7_SLOT_SHIFT 0 -#define MADERA_AIF2RX7_SLOT_WIDTH 6 - -/* (0x0558) AIF2_Frame_Ctrl_18 */ -#define MADERA_AIF2RX8_SLOT_MASK 0x003F -#define MADERA_AIF2RX8_SLOT_SHIFT 0 -#define MADERA_AIF2RX8_SLOT_WIDTH 6 - -/* (0x0559) AIF2_Tx_Enables */ -#define MADERA_AIF2TX8_ENA 0x0080 -#define MADERA_AIF2TX8_ENA_MASK 0x0080 -#define MADERA_AIF2TX8_ENA_SHIFT 7 -#define MADERA_AIF2TX8_ENA_WIDTH 1 -#define MADERA_AIF2TX7_ENA 0x0040 -#define MADERA_AIF2TX7_ENA_MASK 0x0040 -#define MADERA_AIF2TX7_ENA_SHIFT 6 -#define MADERA_AIF2TX7_ENA_WIDTH 1 -#define MADERA_AIF2TX6_ENA 0x0020 -#define MADERA_AIF2TX6_ENA_MASK 0x0020 -#define MADERA_AIF2TX6_ENA_SHIFT 5 -#define MADERA_AIF2TX6_ENA_WIDTH 1 -#define MADERA_AIF2TX5_ENA 0x0010 -#define MADERA_AIF2TX5_ENA_MASK 0x0010 -#define MADERA_AIF2TX5_ENA_SHIFT 4 -#define MADERA_AIF2TX5_ENA_WIDTH 1 -#define MADERA_AIF2TX4_ENA 0x0008 -#define MADERA_AIF2TX4_ENA_MASK 0x0008 -#define MADERA_AIF2TX4_ENA_SHIFT 3 -#define MADERA_AIF2TX4_ENA_WIDTH 1 -#define MADERA_AIF2TX3_ENA 0x0004 -#define MADERA_AIF2TX3_ENA_MASK 0x0004 -#define MADERA_AIF2TX3_ENA_SHIFT 2 -#define MADERA_AIF2TX3_ENA_WIDTH 1 -#define MADERA_AIF2TX2_ENA 0x0002 -#define MADERA_AIF2TX2_ENA_MASK 0x0002 -#define MADERA_AIF2TX2_ENA_SHIFT 1 -#define MADERA_AIF2TX2_ENA_WIDTH 1 -#define MADERA_AIF2TX1_ENA 0x0001 -#define MADERA_AIF2TX1_ENA_MASK 0x0001 -#define MADERA_AIF2TX1_ENA_SHIFT 0 -#define MADERA_AIF2TX1_ENA_WIDTH 1 - -/* (0x055A) AIF2_Rx_Enables */ -#define MADERA_AIF2RX8_ENA 0x0080 -#define MADERA_AIF2RX8_ENA_MASK 0x0080 -#define MADERA_AIF2RX8_ENA_SHIFT 7 -#define MADERA_AIF2RX8_ENA_WIDTH 1 -#define MADERA_AIF2RX7_ENA 0x0040 -#define MADERA_AIF2RX7_ENA_MASK 0x0040 -#define MADERA_AIF2RX7_ENA_SHIFT 6 -#define MADERA_AIF2RX7_ENA_WIDTH 1 -#define MADERA_AIF2RX6_ENA 0x0020 -#define MADERA_AIF2RX6_ENA_MASK 0x0020 -#define MADERA_AIF2RX6_ENA_SHIFT 5 -#define MADERA_AIF2RX6_ENA_WIDTH 1 -#define MADERA_AIF2RX5_ENA 0x0010 -#define MADERA_AIF2RX5_ENA_MASK 0x0010 -#define MADERA_AIF2RX5_ENA_SHIFT 4 -#define MADERA_AIF2RX5_ENA_WIDTH 1 -#define MADERA_AIF2RX4_ENA 0x0008 -#define MADERA_AIF2RX4_ENA_MASK 0x0008 -#define MADERA_AIF2RX4_ENA_SHIFT 3 -#define MADERA_AIF2RX4_ENA_WIDTH 1 -#define MADERA_AIF2RX3_ENA 0x0004 -#define MADERA_AIF2RX3_ENA_MASK 0x0004 -#define MADERA_AIF2RX3_ENA_SHIFT 2 -#define MADERA_AIF2RX3_ENA_WIDTH 1 -#define MADERA_AIF2RX2_ENA 0x0002 -#define MADERA_AIF2RX2_ENA_MASK 0x0002 -#define MADERA_AIF2RX2_ENA_SHIFT 1 -#define MADERA_AIF2RX2_ENA_WIDTH 1 -#define MADERA_AIF2RX1_ENA 0x0001 -#define MADERA_AIF2RX1_ENA_MASK 0x0001 -#define MADERA_AIF2RX1_ENA_SHIFT 0 -#define MADERA_AIF2RX1_ENA_WIDTH 1 - -/* (0x055B) - AIF2 Force Write */ -#define MADERA_AIF2_FRC_WR 0x0001 -#define MADERA_AIF2_FRC_WR_MASK 0x0001 -#define MADERA_AIF2_FRC_WR_SHIFT 0 -#define MADERA_AIF2_FRC_WR_WIDTH 1 - -/* (0x0580) AIF3_BCLK_Ctrl */ -#define MADERA_AIF3_BCLK_INV 0x0080 -#define MADERA_AIF3_BCLK_INV_MASK 0x0080 -#define MADERA_AIF3_BCLK_INV_SHIFT 7 -#define MADERA_AIF3_BCLK_INV_WIDTH 1 -#define MADERA_AIF3_BCLK_FRC 0x0040 -#define MADERA_AIF3_BCLK_FRC_MASK 0x0040 -#define MADERA_AIF3_BCLK_FRC_SHIFT 6 -#define MADERA_AIF3_BCLK_FRC_WIDTH 1 -#define MADERA_AIF3_BCLK_MSTR 0x0020 -#define MADERA_AIF3_BCLK_MSTR_MASK 0x0020 -#define MADERA_AIF3_BCLK_MSTR_SHIFT 5 -#define MADERA_AIF3_BCLK_MSTR_WIDTH 1 -#define MADERA_AIF3_BCLK_FREQ_MASK 0x001F -#define MADERA_AIF3_BCLK_FREQ_SHIFT 0 -#define MADERA_AIF3_BCLK_FREQ_WIDTH 5 - -/* (0x0581) AIF3_Tx_Pin_Ctrl */ -#define MADERA_AIF3TX_DAT_TRI 0x0020 -#define MADERA_AIF3TX_DAT_TRI_MASK 0x0020 -#define MADERA_AIF3TX_DAT_TRI_SHIFT 5 -#define MADERA_AIF3TX_DAT_TRI_WIDTH 1 -#define MADERA_AIF3TX_LRCLK_SRC 0x0008 -#define MADERA_AIF3TX_LRCLK_SRC_MASK 0x0008 -#define MADERA_AIF3TX_LRCLK_SRC_SHIFT 3 -#define MADERA_AIF3TX_LRCLK_SRC_WIDTH 1 -#define MADERA_AIF3TX_LRCLK_INV 0x0004 -#define MADERA_AIF3TX_LRCLK_INV_MASK 0x0004 -#define MADERA_AIF3TX_LRCLK_INV_SHIFT 2 -#define MADERA_AIF3TX_LRCLK_INV_WIDTH 1 -#define MADERA_AIF3TX_LRCLK_FRC 0x0002 -#define MADERA_AIF3TX_LRCLK_FRC_MASK 0x0002 -#define MADERA_AIF3TX_LRCLK_FRC_SHIFT 1 -#define MADERA_AIF3TX_LRCLK_FRC_WIDTH 1 -#define MADERA_AIF3TX_LRCLK_MSTR 0x0001 -#define MADERA_AIF3TX_LRCLK_MSTR_MASK 0x0001 -#define MADERA_AIF3TX_LRCLK_MSTR_SHIFT 0 -#define MADERA_AIF3TX_LRCLK_MSTR_WIDTH 1 - -/* (0x0582) AIF3_Rx_Pin_Ctrl */ -#define MADERA_AIF3RX_LRCLK_INV 0x0004 -#define MADERA_AIF3RX_LRCLK_INV_MASK 0x0004 -#define MADERA_AIF3RX_LRCLK_INV_SHIFT 2 -#define MADERA_AIF3RX_LRCLK_INV_WIDTH 1 -#define MADERA_AIF3RX_LRCLK_FRC 0x0002 -#define MADERA_AIF3RX_LRCLK_FRC_MASK 0x0002 -#define MADERA_AIF3RX_LRCLK_FRC_SHIFT 1 -#define MADERA_AIF3RX_LRCLK_FRC_WIDTH 1 -#define MADERA_AIF3RX_LRCLK_MSTR 0x0001 -#define MADERA_AIF3RX_LRCLK_MSTR_MASK 0x0001 -#define MADERA_AIF3RX_LRCLK_MSTR_SHIFT 0 -#define MADERA_AIF3RX_LRCLK_MSTR_WIDTH 1 - -/* (0x0583) AIF3_Rate_Ctrl */ -#define MADERA_AIF3_RATE_MASK 0x7800 -#define MADERA_AIF3_RATE_SHIFT 11 -#define MADERA_AIF3_RATE_WIDTH 4 -#define MADERA_AIF3_TRI 0x0040 -#define MADERA_AIF3_TRI_MASK 0x0040 -#define MADERA_AIF3_TRI_SHIFT 6 -#define MADERA_AIF3_TRI_WIDTH 1 - -/* (0x0584) AIF3_Format */ -#define MADERA_AIF3_FMT_MASK 0x0007 -#define MADERA_AIF3_FMT_SHIFT 0 -#define MADERA_AIF3_FMT_WIDTH 3 - -/* (0x0585) - AIF3 Tx BCLK Rate */ -#define MADERA_AIF3TX_BCPF_MASK 0x1FFF -#define MADERA_AIF3TX_BCPF_SHIFT 0 -#define MADERA_AIF3TX_BCPF_WIDTH 13 - -/* (0x0586) AIF3_Rx_BCLK_Rate */ -#define MADERA_AIF3RX_BCPF_MASK 0x1FFF -#define MADERA_AIF3RX_BCPF_SHIFT 0 -#define MADERA_AIF3RX_BCPF_WIDTH 13 - -/* (0x0587) AIF3_Frame_Ctrl_1 */ -#define MADERA_AIF3TX_WL_MASK 0x3F00 -#define MADERA_AIF3TX_WL_SHIFT 8 -#define MADERA_AIF3TX_WL_WIDTH 6 -#define MADERA_AIF3TX_SLOT_LEN_MASK 0x00FF -#define MADERA_AIF3TX_SLOT_LEN_SHIFT 0 -#define MADERA_AIF3TX_SLOT_LEN_WIDTH 8 - -/* (0x0588) AIF3_Frame_Ctrl_2 */ -#define MADERA_AIF3RX_WL_MASK 0x3F00 -#define MADERA_AIF3RX_WL_SHIFT 8 -#define MADERA_AIF3RX_WL_WIDTH 6 -#define MADERA_AIF3RX_SLOT_LEN_MASK 0x00FF -#define MADERA_AIF3RX_SLOT_LEN_SHIFT 0 -#define MADERA_AIF3RX_SLOT_LEN_WIDTH 8 - -/* (0x0589) AIF3_Frame_Ctrl_3 */ -#define MADERA_AIF3TX1_SLOT_MASK 0x003F -#define MADERA_AIF3TX1_SLOT_SHIFT 0 -#define MADERA_AIF3TX1_SLOT_WIDTH 6 - -/* (0x058A) AIF3_Frame_Ctrl_4 */ -#define MADERA_AIF3TX2_SLOT_MASK 0x003F -#define MADERA_AIF3TX2_SLOT_SHIFT 0 -#define MADERA_AIF3TX2_SLOT_WIDTH 6 - -/* (0x0591) AIF3_Frame_Ctrl_11 */ -#define MADERA_AIF3RX1_SLOT_MASK 0x003F -#define MADERA_AIF3RX1_SLOT_SHIFT 0 -#define MADERA_AIF3RX1_SLOT_WIDTH 6 - -/* (0x0592) AIF3_Frame_Ctrl_12 */ -#define MADERA_AIF3RX2_SLOT_MASK 0x003F -#define MADERA_AIF3RX2_SLOT_SHIFT 0 -#define MADERA_AIF3RX2_SLOT_WIDTH 6 - -/* (0x0599) AIF3_Tx_Enables */ -#define MADERA_AIF3TX2_ENA 0x0002 -#define MADERA_AIF3TX2_ENA_MASK 0x0002 -#define MADERA_AIF3TX2_ENA_SHIFT 1 -#define MADERA_AIF3TX2_ENA_WIDTH 1 -#define MADERA_AIF3TX1_ENA 0x0001 -#define MADERA_AIF3TX1_ENA_MASK 0x0001 -#define MADERA_AIF3TX1_ENA_SHIFT 0 -#define MADERA_AIF3TX1_ENA_WIDTH 1 - -/* (0x059A) AIF3_Rx_Enables */ -#define MADERA_AIF3RX2_ENA 0x0002 -#define MADERA_AIF3RX2_ENA_MASK 0x0002 -#define MADERA_AIF3RX2_ENA_SHIFT 1 -#define MADERA_AIF3RX2_ENA_WIDTH 1 -#define MADERA_AIF3RX1_ENA 0x0001 -#define MADERA_AIF3RX1_ENA_MASK 0x0001 -#define MADERA_AIF3RX1_ENA_SHIFT 0 -#define MADERA_AIF3RX1_ENA_WIDTH 1 - -/* (0x059B) - AIF3 Force Write */ -#define MADERA_AIF3_FRC_WR 0x0001 -#define MADERA_AIF3_FRC_WR_MASK 0x0001 -#define MADERA_AIF3_FRC_WR_SHIFT 0 -#define MADERA_AIF3_FRC_WR_WIDTH 1 - -/* (0x05A0) AIF4_BCLK_Ctrl */ -#define MADERA_AIF4_BCLK_INV 0x0080 -#define MADERA_AIF4_BCLK_INV_MASK 0x0080 -#define MADERA_AIF4_BCLK_INV_SHIFT 7 -#define MADERA_AIF4_BCLK_INV_WIDTH 1 -#define MADERA_AIF4_BCLK_FRC 0x0040 -#define MADERA_AIF4_BCLK_FRC_MASK 0x0040 -#define MADERA_AIF4_BCLK_FRC_SHIFT 6 -#define MADERA_AIF4_BCLK_FRC_WIDTH 1 -#define MADERA_AIF4_BCLK_MSTR 0x0020 -#define MADERA_AIF4_BCLK_MSTR_MASK 0x0020 -#define MADERA_AIF4_BCLK_MSTR_SHIFT 5 -#define MADERA_AIF4_BCLK_MSTR_WIDTH 1 -#define MADERA_AIF4_BCLK_FREQ_MASK 0x001F -#define MADERA_AIF4_BCLK_FREQ_SHIFT 0 -#define MADERA_AIF4_BCLK_FREQ_WIDTH 5 - -/* (0x05A1) AIF4_Tx_Pin_Ctrl */ -#define MADERA_AIF4TX_DAT_TRI 0x0020 -#define MADERA_AIF4TX_DAT_TRI_MASK 0x0020 -#define MADERA_AIF4TX_DAT_TRI_SHIFT 5 -#define MADERA_AIF4TX_DAT_TRI_WIDTH 1 -#define MADERA_AIF4TX_LRCLK_SRC 0x0008 -#define MADERA_AIF4TX_LRCLK_SRC_MASK 0x0008 -#define MADERA_AIF4TX_LRCLK_SRC_SHIFT 3 -#define MADERA_AIF4TX_LRCLK_SRC_WIDTH 1 -#define MADERA_AIF4TX_LRCLK_INV 0x0004 -#define MADERA_AIF4TX_LRCLK_INV_MASK 0x0004 -#define MADERA_AIF4TX_LRCLK_INV_SHIFT 2 -#define MADERA_AIF4TX_LRCLK_INV_WIDTH 1 -#define MADERA_AIF4TX_LRCLK_FRC 0x0002 -#define MADERA_AIF4TX_LRCLK_FRC_MASK 0x0002 -#define MADERA_AIF4TX_LRCLK_FRC_SHIFT 1 -#define MADERA_AIF4TX_LRCLK_FRC_WIDTH 1 -#define MADERA_AIF4TX_LRCLK_MSTR 0x0001 -#define MADERA_AIF4TX_LRCLK_MSTR_MASK 0x0001 -#define MADERA_AIF4TX_LRCLK_MSTR_SHIFT 0 -#define MADERA_AIF4TX_LRCLK_MSTR_WIDTH 1 - -/* (0x05A2) AIF4_Rx_Pin_Ctrl */ -#define MADERA_AIF4RX_LRCLK_INV 0x0004 -#define MADERA_AIF4RX_LRCLK_INV_MASK 0x0004 -#define MADERA_AIF4RX_LRCLK_INV_SHIFT 2 -#define MADERA_AIF4RX_LRCLK_INV_WIDTH 1 -#define MADERA_AIF4RX_LRCLK_FRC 0x0002 -#define MADERA_AIF4RX_LRCLK_FRC_MASK 0x0002 -#define MADERA_AIF4RX_LRCLK_FRC_SHIFT 1 -#define MADERA_AIF4RX_LRCLK_FRC_WIDTH 1 -#define MADERA_AIF4RX_LRCLK_MSTR 0x0001 -#define MADERA_AIF4RX_LRCLK_MSTR_MASK 0x0001 -#define MADERA_AIF4RX_LRCLK_MSTR_SHIFT 0 -#define MADERA_AIF4RX_LRCLK_MSTR_WIDTH 1 - -/* (0x05A3) AIF4_Rate_Ctrl */ -#define MADERA_AIF4_RATE_MASK 0x7800 -#define MADERA_AIF4_RATE_SHIFT 11 -#define MADERA_AIF4_RATE_WIDTH 4 -#define MADERA_AIF4_TRI 0x0040 -#define MADERA_AIF4_TRI_MASK 0x0040 -#define MADERA_AIF4_TRI_SHIFT 6 -#define MADERA_AIF4_TRI_WIDTH 1 - -/* (0x05A4) AIF4_Format */ -#define MADERA_AIF4_FMT_MASK 0x0007 -#define MADERA_AIF4_FMT_SHIFT 0 -#define MADERA_AIF4_FMT_WIDTH 3 - -/* (0x05A5) - AIF4 Tx BCLK Rate */ -#define MADERA_AIF4TX_BCPF_MASK 0x1FFF -#define MADERA_AIF4TX_BCPF_SHIFT 0 -#define MADERA_AIF4TX_BCPF_WIDTH 13 - -/* (0x05A6) AIF4_Rx_BCLK_Rate */ -#define MADERA_AIF4RX_BCPF_MASK 0x1FFF -#define MADERA_AIF4RX_BCPF_SHIFT 0 -#define MADERA_AIF4RX_BCPF_WIDTH 13 - -/* (0x05A7) AIF4_Frame_Ctrl_1 */ -#define MADERA_AIF4TX_WL_MASK 0x3F00 -#define MADERA_AIF4TX_WL_SHIFT 8 -#define MADERA_AIF4TX_WL_WIDTH 6 -#define MADERA_AIF4TX_SLOT_LEN_MASK 0x00FF -#define MADERA_AIF4TX_SLOT_LEN_SHIFT 0 -#define MADERA_AIF4TX_SLOT_LEN_WIDTH 8 - -/* (0x05A8) AIF4_Frame_Ctrl_2 */ -#define MADERA_AIF4RX_WL_MASK 0x3F00 -#define MADERA_AIF4RX_WL_SHIFT 8 -#define MADERA_AIF4RX_WL_WIDTH 6 -#define MADERA_AIF4RX_SLOT_LEN_MASK 0x00FF -#define MADERA_AIF4RX_SLOT_LEN_SHIFT 0 -#define MADERA_AIF4RX_SLOT_LEN_WIDTH 8 - -/* (0x05A9) AIF4_Frame_Ctrl_3 */ -#define MADERA_AIF4TX1_SLOT_MASK 0x003F -#define MADERA_AIF4TX1_SLOT_SHIFT 0 -#define MADERA_AIF4TX1_SLOT_WIDTH 6 - -/* (0x05AA) AIF4_Frame_Ctrl_4 */ -#define MADERA_AIF4TX2_SLOT_MASK 0x003F -#define MADERA_AIF4TX2_SLOT_SHIFT 0 -#define MADERA_AIF4TX2_SLOT_WIDTH 6 - -/* (0x05B1) AIF4_Frame_Ctrl_11 */ -#define MADERA_AIF4RX1_SLOT_MASK 0x003F -#define MADERA_AIF4RX1_SLOT_SHIFT 0 -#define MADERA_AIF4RX1_SLOT_WIDTH 6 - -/* (0x05B2) AIF4_Frame_Ctrl_12 */ -#define MADERA_AIF4RX2_SLOT_MASK 0x003F -#define MADERA_AIF4RX2_SLOT_SHIFT 0 -#define MADERA_AIF4RX2_SLOT_WIDTH 6 - -/* (0x05B9) AIF4_Tx_Enables */ -#define MADERA_AIF4TX2_ENA 0x0002 -#define MADERA_AIF4TX2_ENA_MASK 0x0002 -#define MADERA_AIF4TX2_ENA_SHIFT 1 -#define MADERA_AIF4TX2_ENA_WIDTH 1 -#define MADERA_AIF4TX1_ENA 0x0001 -#define MADERA_AIF4TX1_ENA_MASK 0x0001 -#define MADERA_AIF4TX1_ENA_SHIFT 0 -#define MADERA_AIF4TX1_ENA_WIDTH 1 - -/* (0x05BA) AIF4_Rx_Enables */ -#define MADERA_AIF4RX2_ENA 0x0002 -#define MADERA_AIF4RX2_ENA_MASK 0x0002 -#define MADERA_AIF4RX2_ENA_SHIFT 1 -#define MADERA_AIF4RX2_ENA_WIDTH 1 -#define MADERA_AIF4RX1_ENA 0x0001 -#define MADERA_AIF4RX1_ENA_MASK 0x0001 -#define MADERA_AIF4RX1_ENA_SHIFT 0 -#define MADERA_AIF4RX1_ENA_WIDTH 1 - -/* (0x05BB) - AIF4 Force Write */ -#define MADERA_AIF4_FRC_WR 0x0001 -#define MADERA_AIF4_FRC_WR_MASK 0x0001 -#define MADERA_AIF4_FRC_WR_SHIFT 0 -#define MADERA_AIF4_FRC_WR_WIDTH 1 - -/* (0x05C2) SPD1_TX_Control */ -#define MADERA_SPD1_VAL2 0x2000 -#define MADERA_SPD1_VAL2_MASK 0x2000 -#define MADERA_SPD1_VAL2_SHIFT 13 -#define MADERA_SPD1_VAL2_WIDTH 1 -#define MADERA_SPD1_VAL1 0x1000 -#define MADERA_SPD1_VAL1_MASK 0x1000 -#define MADERA_SPD1_VAL1_SHIFT 12 -#define MADERA_SPD1_VAL1_WIDTH 1 -#define MADERA_SPD1_RATE_MASK 0x00F0 -#define MADERA_SPD1_RATE_SHIFT 4 -#define MADERA_SPD1_RATE_WIDTH 4 -#define MADERA_SPD1_ENA 0x0001 -#define MADERA_SPD1_ENA_MASK 0x0001 -#define MADERA_SPD1_ENA_SHIFT 0 -#define MADERA_SPD1_ENA_WIDTH 1 - -/* (0x05C3) SPD1_TX_Channel_Status_1 */ -#define MADERA_SPD1_CATCODE_MASK 0xFF00 -#define MADERA_SPD1_CATCODE_SHIFT 8 -#define MADERA_SPD1_CATCODE_WIDTH 8 -#define MADERA_SPD1_CHSTMODE_MASK 0x00C0 -#define MADERA_SPD1_CHSTMODE_SHIFT 6 -#define MADERA_SPD1_CHSTMODE_WIDTH 2 -#define MADERA_SPD1_PREEMPH_MASK 0x0038 -#define MADERA_SPD1_PREEMPH_SHIFT 3 -#define MADERA_SPD1_PREEMPH_WIDTH 3 -#define MADERA_SPD1_NOCOPY 0x0004 -#define MADERA_SPD1_NOCOPY_MASK 0x0004 -#define MADERA_SPD1_NOCOPY_SHIFT 2 -#define MADERA_SPD1_NOCOPY_WIDTH 1 -#define MADERA_SPD1_NOAUDIO 0x0002 -#define MADERA_SPD1_NOAUDIO_MASK 0x0002 -#define MADERA_SPD1_NOAUDIO_SHIFT 1 -#define MADERA_SPD1_NOAUDIO_WIDTH 1 -#define MADERA_SPD1_PRO 0x0001 -#define MADERA_SPD1_PRO_MASK 0x0001 -#define MADERA_SPD1_PRO_SHIFT 0 -#define MADERA_SPD1_PRO_WIDTH 1 - -/* (0x05C4) SPD1_TX_Channel_Status_2 */ -#define MADERA_SPD1_FREQ_MASK 0xF000 -#define MADERA_SPD1_FREQ_SHIFT 12 -#define MADERA_SPD1_FREQ_WIDTH 4 -#define MADERA_SPD1_CHNUM2_MASK 0x0F00 -#define MADERA_SPD1_CHNUM2_SHIFT 8 -#define MADERA_SPD1_CHNUM2_WIDTH 4 -#define MADERA_SPD1_CHNUM1_MASK 0x00F0 -#define MADERA_SPD1_CHNUM1_SHIFT 4 -#define MADERA_SPD1_CHNUM1_WIDTH 4 -#define MADERA_SPD1_SRCNUM_MASK 0x000F -#define MADERA_SPD1_SRCNUM_SHIFT 0 -#define MADERA_SPD1_SRCNUM_WIDTH 4 - -/* (0x05C5) SPD1_TX_Channel_Status_3 */ -#define MADERA_SPD1_ORGSAMP_MASK 0x0F00 -#define MADERA_SPD1_ORGSAMP_SHIFT 8 -#define MADERA_SPD1_ORGSAMP_WIDTH 4 -#define MADERA_SPD1_TXWL_MASK 0x00E0 -#define MADERA_SPD1_TXWL_SHIFT 5 -#define MADERA_SPD1_TXWL_WIDTH 3 -#define MADERA_SPD1_MAXWL 0x0010 -#define MADERA_SPD1_MAXWL_MASK 0x0010 -#define MADERA_SPD1_MAXWL_SHIFT 4 -#define MADERA_SPD1_MAXWL_WIDTH 1 -#define MADERA_SPD1_CS31_30_MASK 0x000C -#define MADERA_SPD1_CS31_30_SHIFT 2 -#define MADERA_SPD1_CS31_30_WIDTH 2 -#define MADERA_SPD1_CLKACU_MASK 0x0003 -#define MADERA_SPD1_CLKACU_SHIFT 2 -#define MADERA_SPD1_CLKACU_WIDTH 0 - -/* (0x05E3) SLIMbus_Framer_Ref_Gear */ -#define MADERA_SLIMCLK_SRC 0x0010 -#define MADERA_SLIMCLK_SRC_MASK 0x0010 -#define MADERA_SLIMCLK_SRC_SHIFT 4 -#define MADERA_SLIMCLK_SRC_WIDTH 1 -#define MADERA_FRAMER_REF_GEAR_MASK 0x000F -#define MADERA_FRAMER_REF_GEAR_SHIFT 0 -#define MADERA_FRAMER_REF_GEAR_WIDTH 4 - -/* (0x05E5) SLIMbus_Rates_1 */ -#define MADERA_SLIMRX2_RATE_MASK 0x7800 -#define MADERA_SLIMRX2_RATE_SHIFT 11 -#define MADERA_SLIMRX2_RATE_WIDTH 4 -#define MADERA_SLIMRX1_RATE_MASK 0x0078 -#define MADERA_SLIMRX1_RATE_SHIFT 3 -#define MADERA_SLIMRX1_RATE_WIDTH 4 - -/* (0x05E6) SLIMbus_Rates_2 */ -#define MADERA_SLIMRX4_RATE_MASK 0x7800 -#define MADERA_SLIMRX4_RATE_SHIFT 11 -#define MADERA_SLIMRX4_RATE_WIDTH 4 -#define MADERA_SLIMRX3_RATE_MASK 0x0078 -#define MADERA_SLIMRX3_RATE_SHIFT 3 -#define MADERA_SLIMRX3_RATE_WIDTH 4 - -/* (0x05E7) SLIMbus_Rates_3 */ -#define MADERA_SLIMRX6_RATE_MASK 0x7800 -#define MADERA_SLIMRX6_RATE_SHIFT 11 -#define MADERA_SLIMRX6_RATE_WIDTH 4 -#define MADERA_SLIMRX5_RATE_MASK 0x0078 -#define MADERA_SLIMRX5_RATE_SHIFT 3 -#define MADERA_SLIMRX5_RATE_WIDTH 4 - -/* (0x05E8) SLIMbus_Rates_4 */ -#define MADERA_SLIMRX8_RATE_MASK 0x7800 -#define MADERA_SLIMRX8_RATE_SHIFT 11 -#define MADERA_SLIMRX8_RATE_WIDTH 4 -#define MADERA_SLIMRX7_RATE_MASK 0x0078 -#define MADERA_SLIMRX7_RATE_SHIFT 3 -#define MADERA_SLIMRX7_RATE_WIDTH 4 - -/* (0x05E9) SLIMbus_Rates_5 */ -#define MADERA_SLIMTX2_RATE_MASK 0x7800 -#define MADERA_SLIMTX2_RATE_SHIFT 11 -#define MADERA_SLIMTX2_RATE_WIDTH 4 -#define MADERA_SLIMTX1_RATE_MASK 0x0078 -#define MADERA_SLIMTX1_RATE_SHIFT 3 -#define MADERA_SLIMTX1_RATE_WIDTH 4 - -/* (0x05EA) SLIMbus_Rates_6 */ -#define MADERA_SLIMTX4_RATE_MASK 0x7800 -#define MADERA_SLIMTX4_RATE_SHIFT 11 -#define MADERA_SLIMTX4_RATE_WIDTH 4 -#define MADERA_SLIMTX3_RATE_MASK 0x0078 -#define MADERA_SLIMTX3_RATE_SHIFT 3 -#define MADERA_SLIMTX3_RATE_WIDTH 4 - -/* (0x05EB) SLIMbus_Rates_7 */ -#define MADERA_SLIMTX6_RATE_MASK 0x7800 -#define MADERA_SLIMTX6_RATE_SHIFT 11 -#define MADERA_SLIMTX6_RATE_WIDTH 4 -#define MADERA_SLIMTX5_RATE_MASK 0x0078 -#define MADERA_SLIMTX5_RATE_SHIFT 3 -#define MADERA_SLIMTX5_RATE_WIDTH 4 - -/* (0x05EC) SLIMbus_Rates_8 */ -#define MADERA_SLIMTX8_RATE_MASK 0x7800 -#define MADERA_SLIMTX8_RATE_SHIFT 11 -#define MADERA_SLIMTX8_RATE_WIDTH 4 -#define MADERA_SLIMTX7_RATE_MASK 0x0078 -#define MADERA_SLIMTX7_RATE_SHIFT 3 -#define MADERA_SLIMTX7_RATE_WIDTH 4 - -/* (0x05F5) SLIMbus_RX_Channel_Enable */ -#define MADERA_SLIMRX8_ENA 0x0080 -#define MADERA_SLIMRX8_ENA_MASK 0x0080 -#define MADERA_SLIMRX8_ENA_SHIFT 7 -#define MADERA_SLIMRX8_ENA_WIDTH 1 -#define MADERA_SLIMRX7_ENA 0x0040 -#define MADERA_SLIMRX7_ENA_MASK 0x0040 -#define MADERA_SLIMRX7_ENA_SHIFT 6 -#define MADERA_SLIMRX7_ENA_WIDTH 1 -#define MADERA_SLIMRX6_ENA 0x0020 -#define MADERA_SLIMRX6_ENA_MASK 0x0020 -#define MADERA_SLIMRX6_ENA_SHIFT 5 -#define MADERA_SLIMRX6_ENA_WIDTH 1 -#define MADERA_SLIMRX5_ENA 0x0010 -#define MADERA_SLIMRX5_ENA_MASK 0x0010 -#define MADERA_SLIMRX5_ENA_SHIFT 4 -#define MADERA_SLIMRX5_ENA_WIDTH 1 -#define MADERA_SLIMRX4_ENA 0x0008 -#define MADERA_SLIMRX4_ENA_MASK 0x0008 -#define MADERA_SLIMRX4_ENA_SHIFT 3 -#define MADERA_SLIMRX4_ENA_WIDTH 1 -#define MADERA_SLIMRX3_ENA 0x0004 -#define MADERA_SLIMRX3_ENA_MASK 0x0004 -#define MADERA_SLIMRX3_ENA_SHIFT 2 -#define MADERA_SLIMRX3_ENA_WIDTH 1 -#define MADERA_SLIMRX2_ENA 0x0002 -#define MADERA_SLIMRX2_ENA_MASK 0x0002 -#define MADERA_SLIMRX2_ENA_SHIFT 1 -#define MADERA_SLIMRX2_ENA_WIDTH 1 -#define MADERA_SLIMRX1_ENA 0x0001 -#define MADERA_SLIMRX1_ENA_MASK 0x0001 -#define MADERA_SLIMRX1_ENA_SHIFT 0 -#define MADERA_SLIMRX1_ENA_WIDTH 1 - -/* (0x05F6) SLIMbus_TX_Channel_Enable */ -#define MADERA_SLIMTX8_ENA 0x0080 -#define MADERA_SLIMTX8_ENA_MASK 0x0080 -#define MADERA_SLIMTX8_ENA_SHIFT 7 -#define MADERA_SLIMTX8_ENA_WIDTH 1 -#define MADERA_SLIMTX7_ENA 0x0040 -#define MADERA_SLIMTX7_ENA_MASK 0x0040 -#define MADERA_SLIMTX7_ENA_SHIFT 6 -#define MADERA_SLIMTX7_ENA_WIDTH 1 -#define MADERA_SLIMTX6_ENA 0x0020 -#define MADERA_SLIMTX6_ENA_MASK 0x0020 -#define MADERA_SLIMTX6_ENA_SHIFT 5 -#define MADERA_SLIMTX6_ENA_WIDTH 1 -#define MADERA_SLIMTX5_ENA 0x0010 -#define MADERA_SLIMTX5_ENA_MASK 0x0010 -#define MADERA_SLIMTX5_ENA_SHIFT 4 -#define MADERA_SLIMTX5_ENA_WIDTH 1 -#define MADERA_SLIMTX4_ENA 0x0008 -#define MADERA_SLIMTX4_ENA_MASK 0x0008 -#define MADERA_SLIMTX4_ENA_SHIFT 3 -#define MADERA_SLIMTX4_ENA_WIDTH 1 -#define MADERA_SLIMTX3_ENA 0x0004 -#define MADERA_SLIMTX3_ENA_MASK 0x0004 -#define MADERA_SLIMTX3_ENA_SHIFT 2 -#define MADERA_SLIMTX3_ENA_WIDTH 1 -#define MADERA_SLIMTX2_ENA 0x0002 -#define MADERA_SLIMTX2_ENA_MASK 0x0002 -#define MADERA_SLIMTX2_ENA_SHIFT 1 -#define MADERA_SLIMTX2_ENA_WIDTH 1 -#define MADERA_SLIMTX1_ENA 0x0001 -#define MADERA_SLIMTX1_ENA_MASK 0x0001 -#define MADERA_SLIMTX1_ENA_SHIFT 0 -#define MADERA_SLIMTX1_ENA_WIDTH 1 - -/* (0x05F7) SLIMbus_RX_Port_Status */ -#define MADERA_SLIMRX8_PORT_STS 0x0080 -#define MADERA_SLIMRX8_PORT_STS_MASK 0x0080 -#define MADERA_SLIMRX8_PORT_STS_SHIFT 7 -#define MADERA_SLIMRX8_PORT_STS_WIDTH 1 -#define MADERA_SLIMRX7_PORT_STS 0x0040 -#define MADERA_SLIMRX7_PORT_STS_MASK 0x0040 -#define MADERA_SLIMRX7_PORT_STS_SHIFT 6 -#define MADERA_SLIMRX7_PORT_STS_WIDTH 1 -#define MADERA_SLIMRX6_PORT_STS 0x0020 -#define MADERA_SLIMRX6_PORT_STS_MASK 0x0020 -#define MADERA_SLIMRX6_PORT_STS_SHIFT 5 -#define MADERA_SLIMRX6_PORT_STS_WIDTH 1 -#define MADERA_SLIMRX5_PORT_STS 0x0010 -#define MADERA_SLIMRX5_PORT_STS_MASK 0x0010 -#define MADERA_SLIMRX5_PORT_STS_SHIFT 4 -#define MADERA_SLIMRX5_PORT_STS_WIDTH 1 -#define MADERA_SLIMRX4_PORT_STS 0x0008 -#define MADERA_SLIMRX4_PORT_STS_MASK 0x0008 -#define MADERA_SLIMRX4_PORT_STS_SHIFT 3 -#define MADERA_SLIMRX4_PORT_STS_WIDTH 1 -#define MADERA_SLIMRX3_PORT_STS 0x0004 -#define MADERA_SLIMRX3_PORT_STS_MASK 0x0004 -#define MADERA_SLIMRX3_PORT_STS_SHIFT 2 -#define MADERA_SLIMRX3_PORT_STS_WIDTH 1 -#define MADERA_SLIMRX2_PORT_STS 0x0002 -#define MADERA_SLIMRX2_PORT_STS_MASK 0x0002 -#define MADERA_SLIMRX2_PORT_STS_SHIFT 1 -#define MADERA_SLIMRX2_PORT_STS_WIDTH 1 -#define MADERA_SLIMRX1_PORT_STS 0x0001 -#define MADERA_SLIMRX1_PORT_STS_MASK 0x0001 -#define MADERA_SLIMRX1_PORT_STS_SHIFT 0 -#define MADERA_SLIMRX1_PORT_STS_WIDTH 1 - -/* (0x05F8) SLIMbus_TX_Port_Status */ -#define MADERA_SLIMTX8_PORT_STS 0x0080 -#define MADERA_SLIMTX8_PORT_STS_MASK 0x0080 -#define MADERA_SLIMTX8_PORT_STS_SHIFT 7 -#define MADERA_SLIMTX8_PORT_STS_WIDTH 1 -#define MADERA_SLIMTX7_PORT_STS 0x0040 -#define MADERA_SLIMTX7_PORT_STS_MASK 0x0040 -#define MADERA_SLIMTX7_PORT_STS_SHIFT 6 -#define MADERA_SLIMTX7_PORT_STS_WIDTH 1 -#define MADERA_SLIMTX6_PORT_STS 0x0020 -#define MADERA_SLIMTX6_PORT_STS_MASK 0x0020 -#define MADERA_SLIMTX6_PORT_STS_SHIFT 5 -#define MADERA_SLIMTX6_PORT_STS_WIDTH 1 -#define MADERA_SLIMTX5_PORT_STS 0x0010 -#define MADERA_SLIMTX5_PORT_STS_MASK 0x0010 -#define MADERA_SLIMTX5_PORT_STS_SHIFT 4 -#define MADERA_SLIMTX5_PORT_STS_WIDTH 1 -#define MADERA_SLIMTX4_PORT_STS 0x0008 -#define MADERA_SLIMTX4_PORT_STS_MASK 0x0008 -#define MADERA_SLIMTX4_PORT_STS_SHIFT 3 -#define MADERA_SLIMTX4_PORT_STS_WIDTH 1 -#define MADERA_SLIMTX3_PORT_STS 0x0004 -#define MADERA_SLIMTX3_PORT_STS_MASK 0x0004 -#define MADERA_SLIMTX3_PORT_STS_SHIFT 2 -#define MADERA_SLIMTX3_PORT_STS_WIDTH 1 -#define MADERA_SLIMTX2_PORT_STS 0x0002 -#define MADERA_SLIMTX2_PORT_STS_MASK 0x0002 -#define MADERA_SLIMTX2_PORT_STS_SHIFT 1 -#define MADERA_SLIMTX2_PORT_STS_WIDTH 1 -#define MADERA_SLIMTX1_PORT_STS 0x0001 -#define MADERA_SLIMTX1_PORT_STS_MASK 0x0001 -#define MADERA_SLIMTX1_PORT_STS_SHIFT 0 -#define MADERA_SLIMTX1_PORT_STS_WIDTH 1 - -/* (0x0E00) FX_Ctrl1 */ -#define MADERA_FX_RATE_MASK 0x7800 -#define MADERA_FX_RATE_SHIFT 11 -#define MADERA_FX_RATE_WIDTH 4 - -/* (0x0E01) FX_Ctrl2 */ -#define MADERA_FX_STS_MASK 0xFFF0 -#define MADERA_FX_STS_SHIFT 4 -#define MADERA_FX_STS_WIDTH 12 - -/* (0x0E10) EQ1_1 */ -#define MADERA_EQ1_B1_GAIN_MASK 0xF800 -#define MADERA_EQ1_B1_GAIN_SHIFT 11 -#define MADERA_EQ1_B1_GAIN_WIDTH 5 -#define MADERA_EQ1_B2_GAIN_MASK 0x07C0 -#define MADERA_EQ1_B2_GAIN_SHIFT 6 -#define MADERA_EQ1_B2_GAIN_WIDTH 5 -#define MADERA_EQ1_B3_GAIN_MASK 0x003E -#define MADERA_EQ1_B3_GAIN_SHIFT 1 -#define MADERA_EQ1_B3_GAIN_WIDTH 5 -#define MADERA_EQ1_ENA 0x0001 -#define MADERA_EQ1_ENA_MASK 0x0001 -#define MADERA_EQ1_ENA_SHIFT 0 -#define MADERA_EQ1_ENA_WIDTH 1 - -/* (0x0E11) EQ1_2 */ -#define MADERA_EQ1_B4_GAIN_MASK 0xF800 -#define MADERA_EQ1_B4_GAIN_SHIFT 11 -#define MADERA_EQ1_B4_GAIN_WIDTH 5 -#define MADERA_EQ1_B5_GAIN_MASK 0x07C0 -#define MADERA_EQ1_B5_GAIN_SHIFT 6 -#define MADERA_EQ1_B5_GAIN_WIDTH 5 -#define MADERA_EQ1_B1_MODE 0x0001 -#define MADERA_EQ1_B1_MODE_MASK 0x0001 -#define MADERA_EQ1_B1_MODE_SHIFT 0 -#define MADERA_EQ1_B1_MODE_WIDTH 1 - -/* (0x0E12) EQ1_3 */ -#define MADERA_EQ1_B1_A_MASK 0xFFFF -#define MADERA_EQ1_B1_A_SHIFT 0 -#define MADERA_EQ1_B1_A_WIDTH 16 - -/* (0x0E13) EQ1_4 */ -#define MADERA_EQ1_B1_B_MASK 0xFFFF -#define MADERA_EQ1_B1_B_SHIFT 0 -#define MADERA_EQ1_B1_B_WIDTH 16 - -/* (0x0E14) EQ1_5 */ -#define MADERA_EQ1_B1_PG_MASK 0xFFFF -#define MADERA_EQ1_B1_PG_SHIFT 0 -#define MADERA_EQ1_B1_PG_WIDTH 16 - -/* (0x0E15) EQ1_6 */ -#define MADERA_EQ1_B2_A_MASK 0xFFFF -#define MADERA_EQ1_B2_A_SHIFT 0 -#define MADERA_EQ1_B2_A_WIDTH 16 - -/* (0x0E16) EQ1_7 */ -#define MADERA_EQ1_B2_B_MASK 0xFFFF -#define MADERA_EQ1_B2_B_SHIFT 0 -#define MADERA_EQ1_B2_B_WIDTH 16 - -/* (0x0E17) EQ1_8 */ -#define MADERA_EQ1_B2_C_MASK 0xFFFF -#define MADERA_EQ1_B2_C_SHIFT 0 -#define MADERA_EQ1_B2_C_WIDTH 16 - -/* (0x0E18) EQ1_9 */ -#define MADERA_EQ1_B2_PG_MASK 0xFFFF -#define MADERA_EQ1_B2_PG_SHIFT 0 -#define MADERA_EQ1_B2_PG_WIDTH 16 - -/* (0x0E19) EQ1_10 */ -#define MADERA_EQ1_B3_A_MASK 0xFFFF -#define MADERA_EQ1_B3_A_SHIFT 0 -#define MADERA_EQ1_B3_A_WIDTH 16 - -/* (0x0E1A) EQ1_11 */ -#define MADERA_EQ1_B3_B_MASK 0xFFFF -#define MADERA_EQ1_B3_B_SHIFT 0 -#define MADERA_EQ1_B3_B_WIDTH 16 - -/* (0x0E1B) EQ1_12 */ -#define MADERA_EQ1_B3_C_MASK 0xFFFF -#define MADERA_EQ1_B3_C_SHIFT 0 -#define MADERA_EQ1_B3_C_WIDTH 16 - -/* (0x0E1C) EQ1_13 */ -#define MADERA_EQ1_B3_PG_MASK 0xFFFF -#define MADERA_EQ1_B3_PG_SHIFT 0 -#define MADERA_EQ1_B3_PG_WIDTH 16 - -/* (0x0E1D) EQ1_14 */ -#define MADERA_EQ1_B4_A_MASK 0xFFFF -#define MADERA_EQ1_B4_A_SHIFT 0 -#define MADERA_EQ1_B4_A_WIDTH 16 - -/* (0x0E1E) EQ1_15 */ -#define MADERA_EQ1_B4_B_MASK 0xFFFF -#define MADERA_EQ1_B4_B_SHIFT 0 -#define MADERA_EQ1_B4_B_WIDTH 16 - -/* (0x0E1F) EQ1_16 */ -#define MADERA_EQ1_B4_C_MASK 0xFFFF -#define MADERA_EQ1_B4_C_SHIFT 0 -#define MADERA_EQ1_B4_C_WIDTH 16 - -/* (0x0E20) EQ1_17 */ -#define MADERA_EQ1_B4_PG_MASK 0xFFFF -#define MADERA_EQ1_B4_PG_SHIFT 0 -#define MADERA_EQ1_B4_PG_WIDTH 16 - -/* (0x0E21) EQ1_18 */ -#define MADERA_EQ1_B5_A_MASK 0xFFFF -#define MADERA_EQ1_B5_A_SHIFT 0 -#define MADERA_EQ1_B5_A_WIDTH 16 - -/* (0x0E22) EQ1_19 */ -#define MADERA_EQ1_B5_B_MASK 0xFFFF -#define MADERA_EQ1_B5_B_SHIFT 0 -#define MADERA_EQ1_B5_B_WIDTH 16 - -/* (0x0E23) EQ1_20 */ -#define MADERA_EQ1_B5_PG_MASK 0xFFFF -#define MADERA_EQ1_B5_PG_SHIFT 0 -#define MADERA_EQ1_B5_PG_WIDTH 16 - -/* (0x0E24) EQ1_21 */ -#define MADERA_EQ1_B1_C_MASK 0xFFFF -#define MADERA_EQ1_B1_C_SHIFT 0 -#define MADERA_EQ1_B1_C_WIDTH 16 - -/* (0x0E26) EQ2_1 */ -#define MADERA_EQ2_B1_GAIN_MASK 0xF800 -#define MADERA_EQ2_B1_GAIN_SHIFT 11 -#define MADERA_EQ2_B1_GAIN_WIDTH 5 -#define MADERA_EQ2_B2_GAIN_MASK 0x07C0 -#define MADERA_EQ2_B2_GAIN_SHIFT 6 -#define MADERA_EQ2_B2_GAIN_WIDTH 5 -#define MADERA_EQ2_B3_GAIN_MASK 0x003E -#define MADERA_EQ2_B3_GAIN_SHIFT 1 -#define MADERA_EQ2_B3_GAIN_WIDTH 5 -#define MADERA_EQ2_ENA 0x0001 -#define MADERA_EQ2_ENA_MASK 0x0001 -#define MADERA_EQ2_ENA_SHIFT 0 -#define MADERA_EQ2_ENA_WIDTH 1 - -/* (0x0E27) EQ2_2 */ -#define MADERA_EQ2_B4_GAIN_MASK 0xF800 -#define MADERA_EQ2_B4_GAIN_SHIFT 11 -#define MADERA_EQ2_B4_GAIN_WIDTH 5 -#define MADERA_EQ2_B5_GAIN_MASK 0x07C0 -#define MADERA_EQ2_B5_GAIN_SHIFT 6 -#define MADERA_EQ2_B5_GAIN_WIDTH 5 -#define MADERA_EQ2_B1_MODE 0x0001 -#define MADERA_EQ2_B1_MODE_MASK 0x0001 -#define MADERA_EQ2_B1_MODE_SHIFT 0 -#define MADERA_EQ2_B1_MODE_WIDTH 1 - -/* (0x0E28) EQ2_3 */ -#define MADERA_EQ2_B1_A_MASK 0xFFFF -#define MADERA_EQ2_B1_A_SHIFT 0 -#define MADERA_EQ2_B1_A_WIDTH 16 - -/* (0x0E29) EQ2_4 */ -#define MADERA_EQ2_B1_B_MASK 0xFFFF -#define MADERA_EQ2_B1_B_SHIFT 0 -#define MADERA_EQ2_B1_B_WIDTH 16 - -/* (0x0E2A) EQ2_5 */ -#define MADERA_EQ2_B1_PG_MASK 0xFFFF -#define MADERA_EQ2_B1_PG_SHIFT 0 -#define MADERA_EQ2_B1_PG_WIDTH 16 - -/* (0x0E2B) EQ2_6 */ -#define MADERA_EQ2_B2_A_MASK 0xFFFF -#define MADERA_EQ2_B2_A_SHIFT 0 -#define MADERA_EQ2_B2_A_WIDTH 16 - -/* (0x0E2C) EQ2_7 */ -#define MADERA_EQ2_B2_B_MASK 0xFFFF -#define MADERA_EQ2_B2_B_SHIFT 0 -#define MADERA_EQ2_B2_B_WIDTH 16 - -/* (0x0E2D) EQ2_8 */ -#define MADERA_EQ2_B2_C_MASK 0xFFFF -#define MADERA_EQ2_B2_C_SHIFT 0 -#define MADERA_EQ2_B2_C_WIDTH 16 - -/* (0x0E2E) EQ2_9 */ -#define MADERA_EQ2_B2_PG_MASK 0xFFFF -#define MADERA_EQ2_B2_PG_SHIFT 0 -#define MADERA_EQ2_B2_PG_WIDTH 16 - -/* (0x0E2F) EQ2_10 */ -#define MADERA_EQ2_B3_A_MASK 0xFFFF -#define MADERA_EQ2_B3_A_SHIFT 0 -#define MADERA_EQ2_B3_A_WIDTH 16 - -/* (0x0E30) EQ2_11 */ -#define MADERA_EQ2_B3_B_MASK 0xFFFF -#define MADERA_EQ2_B3_B_SHIFT 0 -#define MADERA_EQ2_B3_B_WIDTH 16 - -/* (0x0E31) EQ2_12 */ -#define MADERA_EQ2_B3_C_MASK 0xFFFF -#define MADERA_EQ2_B3_C_SHIFT 0 -#define MADERA_EQ2_B3_C_WIDTH 16 - -/* (0x0E32) EQ2_13 */ -#define MADERA_EQ2_B3_PG_MASK 0xFFFF -#define MADERA_EQ2_B3_PG_SHIFT 0 -#define MADERA_EQ2_B3_PG_WIDTH 16 - -/* (0x0E33) EQ2_14 */ -#define MADERA_EQ2_B4_A_MASK 0xFFFF -#define MADERA_EQ2_B4_A_SHIFT 0 -#define MADERA_EQ2_B4_A_WIDTH 16 - -/* (0x0E34) EQ2_15 */ -#define MADERA_EQ2_B4_B_MASK 0xFFFF -#define MADERA_EQ2_B4_B_SHIFT 0 -#define MADERA_EQ2_B4_B_WIDTH 16 - -/* (0x0E35) EQ2_16 */ -#define MADERA_EQ2_B4_C_MASK 0xFFFF -#define MADERA_EQ2_B4_C_SHIFT 0 -#define MADERA_EQ2_B4_C_WIDTH 16 - -/* (0x0E36) EQ2_17 */ -#define MADERA_EQ2_B4_PG_MASK 0xFFFF -#define MADERA_EQ2_B4_PG_SHIFT 0 -#define MADERA_EQ2_B4_PG_WIDTH 16 - -/* (0x0E37) EQ2_18 */ -#define MADERA_EQ2_B5_A_MASK 0xFFFF -#define MADERA_EQ2_B5_A_SHIFT 0 -#define MADERA_EQ2_B5_A_WIDTH 16 - -/* (0x0E38) EQ2_19 */ -#define MADERA_EQ2_B5_B_MASK 0xFFFF -#define MADERA_EQ2_B5_B_SHIFT 0 -#define MADERA_EQ2_B5_B_WIDTH 16 - -/* (0x0E39) EQ2_20 */ -#define MADERA_EQ2_B5_PG_MASK 0xFFFF -#define MADERA_EQ2_B5_PG_SHIFT 0 -#define MADERA_EQ2_B5_PG_WIDTH 16 - -/* (0x0E3A) EQ2_21 */ -#define MADERA_EQ2_B1_C_MASK 0xFFFF -#define MADERA_EQ2_B1_C_SHIFT 0 -#define MADERA_EQ2_B1_C_WIDTH 16 - -/* (0x0E3C) EQ3_1 */ -#define MADERA_EQ3_B1_GAIN_MASK 0xF800 -#define MADERA_EQ3_B1_GAIN_SHIFT 11 -#define MADERA_EQ3_B1_GAIN_WIDTH 5 -#define MADERA_EQ3_B2_GAIN_MASK 0x07C0 -#define MADERA_EQ3_B2_GAIN_SHIFT 6 -#define MADERA_EQ3_B2_GAIN_WIDTH 5 -#define MADERA_EQ3_B3_GAIN_MASK 0x003E -#define MADERA_EQ3_B3_GAIN_SHIFT 1 -#define MADERA_EQ3_B3_GAIN_WIDTH 5 -#define MADERA_EQ3_ENA 0x0001 -#define MADERA_EQ3_ENA_MASK 0x0001 -#define MADERA_EQ3_ENA_SHIFT 0 -#define MADERA_EQ3_ENA_WIDTH 1 - -/* (0x0E3D) EQ3_2 */ -#define MADERA_EQ3_B4_GAIN_MASK 0xF800 -#define MADERA_EQ3_B4_GAIN_SHIFT 11 -#define MADERA_EQ3_B4_GAIN_WIDTH 5 -#define MADERA_EQ3_B5_GAIN_MASK 0x07C0 -#define MADERA_EQ3_B5_GAIN_SHIFT 6 -#define MADERA_EQ3_B5_GAIN_WIDTH 5 -#define MADERA_EQ3_B1_MODE 0x0001 -#define MADERA_EQ3_B1_MODE_MASK 0x0001 -#define MADERA_EQ3_B1_MODE_SHIFT 0 -#define MADERA_EQ3_B1_MODE_WIDTH 1 - -/* (0x0E3E) EQ3_3 */ -#define MADERA_EQ3_B1_A_MASK 0xFFFF -#define MADERA_EQ3_B1_A_SHIFT 0 -#define MADERA_EQ3_B1_A_WIDTH 16 - -/* (0x0E3F) EQ3_4 */ -#define MADERA_EQ3_B1_B_MASK 0xFFFF -#define MADERA_EQ3_B1_B_SHIFT 0 -#define MADERA_EQ3_B1_B_WIDTH 16 - -/* (0x0E40) EQ3_5 */ -#define MADERA_EQ3_B1_PG_MASK 0xFFFF -#define MADERA_EQ3_B1_PG_SHIFT 0 -#define MADERA_EQ3_B1_PG_WIDTH 16 - -/* (0x0E41) EQ3_6 */ -#define MADERA_EQ3_B2_A_MASK 0xFFFF -#define MADERA_EQ3_B2_A_SHIFT 0 -#define MADERA_EQ3_B2_A_WIDTH 16 - -/* (0x0E42) EQ3_7 */ -#define MADERA_EQ3_B2_B_MASK 0xFFFF -#define MADERA_EQ3_B2_B_SHIFT 0 -#define MADERA_EQ3_B2_B_WIDTH 16 - -/* (0x0E43) EQ3_8 */ -#define MADERA_EQ3_B2_C_MASK 0xFFFF -#define MADERA_EQ3_B2_C_SHIFT 0 -#define MADERA_EQ3_B2_C_WIDTH 16 - -/* (0x0E44) EQ3_9 */ -#define MADERA_EQ3_B2_PG_MASK 0xFFFF -#define MADERA_EQ3_B2_PG_SHIFT 0 -#define MADERA_EQ3_B2_PG_WIDTH 16 - -/* (0x0E45) EQ3_10 */ -#define MADERA_EQ3_B3_A_MASK 0xFFFF -#define MADERA_EQ3_B3_A_SHIFT 0 -#define MADERA_EQ3_B3_A_WIDTH 16 - -/* (0x0E46) EQ3_11 */ -#define MADERA_EQ3_B3_B_MASK 0xFFFF -#define MADERA_EQ3_B3_B_SHIFT 0 -#define MADERA_EQ3_B3_B_WIDTH 16 - -/* (0x0E47) EQ3_12 */ -#define MADERA_EQ3_B3_C_MASK 0xFFFF -#define MADERA_EQ3_B3_C_SHIFT 0 -#define MADERA_EQ3_B3_C_WIDTH 16 - -/* (0x0E48) EQ3_13 */ -#define MADERA_EQ3_B3_PG_MASK 0xFFFF -#define MADERA_EQ3_B3_PG_SHIFT 0 -#define MADERA_EQ3_B3_PG_WIDTH 16 - -/* (0x0E49) EQ3_14 */ -#define MADERA_EQ3_B4_A_MASK 0xFFFF -#define MADERA_EQ3_B4_A_SHIFT 0 -#define MADERA_EQ3_B4_A_WIDTH 16 - -/* (0x0E4A) EQ3_15 */ -#define MADERA_EQ3_B4_B_MASK 0xFFFF -#define MADERA_EQ3_B4_B_SHIFT 0 -#define MADERA_EQ3_B4_B_WIDTH 16 - -/* (0x0E4B) EQ3_16 */ -#define MADERA_EQ3_B4_C_MASK 0xFFFF -#define MADERA_EQ3_B4_C_SHIFT 0 -#define MADERA_EQ3_B4_C_WIDTH 16 - -/* (0x0E4C) EQ3_17 */ -#define MADERA_EQ3_B4_PG_MASK 0xFFFF -#define MADERA_EQ3_B4_PG_SHIFT 0 -#define MADERA_EQ3_B4_PG_WIDTH 16 - -/* (0x0E4D) EQ3_18 */ -#define MADERA_EQ3_B5_A_MASK 0xFFFF -#define MADERA_EQ3_B5_A_SHIFT 0 -#define MADERA_EQ3_B5_A_WIDTH 16 - -/* (0x0E4E) EQ3_19 */ -#define MADERA_EQ3_B5_B_MASK 0xFFFF -#define MADERA_EQ3_B5_B_SHIFT 0 -#define MADERA_EQ3_B5_B_WIDTH 16 - -/* (0x0E4F) EQ3_20 */ -#define MADERA_EQ3_B5_PG_MASK 0xFFFF -#define MADERA_EQ3_B5_PG_SHIFT 0 -#define MADERA_EQ3_B5_PG_WIDTH 16 - -/* (0x0E50) EQ3_21 */ -#define MADERA_EQ3_B1_C_MASK 0xFFFF -#define MADERA_EQ3_B1_C_SHIFT 0 -#define MADERA_EQ3_B1_C_WIDTH 16 - -/* (0x0E52) EQ4_1 */ -#define MADERA_EQ4_B1_GAIN_MASK 0xF800 -#define MADERA_EQ4_B1_GAIN_SHIFT 11 -#define MADERA_EQ4_B1_GAIN_WIDTH 5 -#define MADERA_EQ4_B2_GAIN_MASK 0x07C0 -#define MADERA_EQ4_B2_GAIN_SHIFT 6 -#define MADERA_EQ4_B2_GAIN_WIDTH 5 -#define MADERA_EQ4_B3_GAIN_MASK 0x003E -#define MADERA_EQ4_B3_GAIN_SHIFT 1 -#define MADERA_EQ4_B3_GAIN_WIDTH 5 -#define MADERA_EQ4_ENA 0x0001 -#define MADERA_EQ4_ENA_MASK 0x0001 -#define MADERA_EQ4_ENA_SHIFT 0 -#define MADERA_EQ4_ENA_WIDTH 1 - -/* (0x0E53) EQ4_2 */ -#define MADERA_EQ4_B4_GAIN_MASK 0xF800 -#define MADERA_EQ4_B4_GAIN_SHIFT 11 -#define MADERA_EQ4_B4_GAIN_WIDTH 5 -#define MADERA_EQ4_B5_GAIN_MASK 0x07C0 -#define MADERA_EQ4_B5_GAIN_SHIFT 6 -#define MADERA_EQ4_B5_GAIN_WIDTH 5 -#define MADERA_EQ4_B1_MODE 0x0001 -#define MADERA_EQ4_B1_MODE_MASK 0x0001 -#define MADERA_EQ4_B1_MODE_SHIFT 0 -#define MADERA_EQ4_B1_MODE_WIDTH 1 - -/* (0x0E54) EQ4_3 */ -#define MADERA_EQ4_B1_A_MASK 0xFFFF -#define MADERA_EQ4_B1_A_SHIFT 0 -#define MADERA_EQ4_B1_A_WIDTH 16 - -/* (0x0E55) EQ4_4 */ -#define MADERA_EQ4_B1_B_MASK 0xFFFF -#define MADERA_EQ4_B1_B_SHIFT 0 -#define MADERA_EQ4_B1_B_WIDTH 16 - -/* (0x0E56) EQ4_5 */ -#define MADERA_EQ4_B1_PG_MASK 0xFFFF -#define MADERA_EQ4_B1_PG_SHIFT 0 -#define MADERA_EQ4_B1_PG_WIDTH 16 - -/* (0x0E57) EQ4_6 */ -#define MADERA_EQ4_B2_A_MASK 0xFFFF -#define MADERA_EQ4_B2_A_SHIFT 0 -#define MADERA_EQ4_B2_A_WIDTH 16 - -/* (0x0E58) EQ4_7 */ -#define MADERA_EQ4_B2_B_MASK 0xFFFF -#define MADERA_EQ4_B2_B_SHIFT 0 -#define MADERA_EQ4_B2_B_WIDTH 16 - -/* (0x0E59) EQ4_8 */ -#define MADERA_EQ4_B2_C_MASK 0xFFFF -#define MADERA_EQ4_B2_C_SHIFT 0 -#define MADERA_EQ4_B2_C_WIDTH 16 - -/* (0x0E5A) EQ4_9 */ -#define MADERA_EQ4_B2_PG_MASK 0xFFFF -#define MADERA_EQ4_B2_PG_SHIFT 0 -#define MADERA_EQ4_B2_PG_WIDTH 16 - -/* (0x0E5B) EQ4_10 */ -#define MADERA_EQ4_B3_A_MASK 0xFFFF -#define MADERA_EQ4_B3_A_SHIFT 0 -#define MADERA_EQ4_B3_A_WIDTH 16 - -/* (0x0E5C) EQ4_11 */ -#define MADERA_EQ4_B3_B_MASK 0xFFFF -#define MADERA_EQ4_B3_B_SHIFT 0 -#define MADERA_EQ4_B3_B_WIDTH 16 - -/* (0x0E5D) EQ4_12 */ -#define MADERA_EQ4_B3_C_MASK 0xFFFF -#define MADERA_EQ4_B3_C_SHIFT 0 -#define MADERA_EQ4_B3_C_WIDTH 16 - -/* (0x0E5E) EQ4_13 */ -#define MADERA_EQ4_B3_PG_MASK 0xFFFF -#define MADERA_EQ4_B3_PG_SHIFT 0 -#define MADERA_EQ4_B3_PG_WIDTH 16 - -/* (0x0E5F) EQ4_14 */ -#define MADERA_EQ4_B4_A_MASK 0xFFFF -#define MADERA_EQ4_B4_A_SHIFT 0 -#define MADERA_EQ4_B4_A_WIDTH 16 - -/* (0x0E60) EQ4_15 */ -#define MADERA_EQ4_B4_B_MASK 0xFFFF -#define MADERA_EQ4_B4_B_SHIFT 0 -#define MADERA_EQ4_B4_B_WIDTH 16 - -/* (0x0E61) EQ4_16 */ -#define MADERA_EQ4_B4_C_MASK 0xFFFF -#define MADERA_EQ4_B4_C_SHIFT 0 -#define MADERA_EQ4_B4_C_WIDTH 16 - -/* (0x0E62) EQ4_17 */ -#define MADERA_EQ4_B4_PG_MASK 0xFFFF -#define MADERA_EQ4_B4_PG_SHIFT 0 -#define MADERA_EQ4_B4_PG_WIDTH 16 - -/* (0x0E63) EQ4_18 */ -#define MADERA_EQ4_B5_A_MASK 0xFFFF -#define MADERA_EQ4_B5_A_SHIFT 0 -#define MADERA_EQ4_B5_A_WIDTH 16 - -/* (0x0E64) EQ4_19 */ -#define MADERA_EQ4_B5_B_MASK 0xFFFF -#define MADERA_EQ4_B5_B_SHIFT 0 -#define MADERA_EQ4_B5_B_WIDTH 16 - -/* (0x0E65) EQ4_20 */ -#define MADERA_EQ4_B5_PG_MASK 0xFFFF -#define MADERA_EQ4_B5_PG_SHIFT 0 -#define MADERA_EQ4_B5_PG_WIDTH 16 - -/* (0x0E66) EQ4_21 */ -#define MADERA_EQ4_B1_C_MASK 0xFFFF -#define MADERA_EQ4_B1_C_SHIFT 0 -#define MADERA_EQ4_B1_C_WIDTH 16 - -/* (0x0E80) DRC1_ctrl1 */ -#define MADERA_DRC1_SIG_DET_RMS_MASK 0xF800 -#define MADERA_DRC1_SIG_DET_RMS_SHIFT 11 -#define MADERA_DRC1_SIG_DET_RMS_WIDTH 5 -#define MADERA_DRC1_SIG_DET_PK_MASK 0x0600 -#define MADERA_DRC1_SIG_DET_PK_SHIFT 9 -#define MADERA_DRC1_SIG_DET_PK_WIDTH 2 -#define MADERA_DRC1_NG_ENA 0x0100 -#define MADERA_DRC1_NG_ENA_MASK 0x0100 -#define MADERA_DRC1_NG_ENA_SHIFT 8 -#define MADERA_DRC1_NG_ENA_WIDTH 1 -#define MADERA_DRC1_SIG_DET_MODE 0x0080 -#define MADERA_DRC1_SIG_DET_MODE_MASK 0x0080 -#define MADERA_DRC1_SIG_DET_MODE_SHIFT 7 -#define MADERA_DRC1_SIG_DET_MODE_WIDTH 1 -#define MADERA_DRC1_SIG_DET 0x0040 -#define MADERA_DRC1_SIG_DET_MASK 0x0040 -#define MADERA_DRC1_SIG_DET_SHIFT 6 -#define MADERA_DRC1_SIG_DET_WIDTH 1 -#define MADERA_DRC1_KNEE2_OP_ENA 0x0020 -#define MADERA_DRC1_KNEE2_OP_ENA_MASK 0x0020 -#define MADERA_DRC1_KNEE2_OP_ENA_SHIFT 5 -#define MADERA_DRC1_KNEE2_OP_ENA_WIDTH 1 -#define MADERA_DRC1_QR 0x0010 -#define MADERA_DRC1_QR_MASK 0x0010 -#define MADERA_DRC1_QR_SHIFT 4 -#define MADERA_DRC1_QR_WIDTH 1 -#define MADERA_DRC1_ANTICLIP 0x0008 -#define MADERA_DRC1_ANTICLIP_MASK 0x0008 -#define MADERA_DRC1_ANTICLIP_SHIFT 3 -#define MADERA_DRC1_ANTICLIP_WIDTH 1 -#define MADERA_DRC1L_ENA 0x0002 -#define MADERA_DRC1L_ENA_MASK 0x0002 -#define MADERA_DRC1L_ENA_SHIFT 1 -#define MADERA_DRC1L_ENA_WIDTH 1 -#define MADERA_DRC1R_ENA 0x0001 -#define MADERA_DRC1R_ENA_MASK 0x0001 -#define MADERA_DRC1R_ENA_SHIFT 0 -#define MADERA_DRC1R_ENA_WIDTH 1 - -/* (0x0E81) DRC1_ctrl2 */ -#define MADERA_DRC1_ATK_MASK 0x1E00 -#define MADERA_DRC1_ATK_SHIFT 9 -#define MADERA_DRC1_ATK_WIDTH 4 -#define MADERA_DRC1_DCY_MASK 0x01E0 -#define MADERA_DRC1_DCY_SHIFT 5 -#define MADERA_DRC1_DCY_WIDTH 4 -#define MADERA_DRC1_MINGAIN_MASK 0x001C -#define MADERA_DRC1_MINGAIN_SHIFT 2 -#define MADERA_DRC1_MINGAIN_WIDTH 3 -#define MADERA_DRC1_MAXGAIN_MASK 0x0003 -#define MADERA_DRC1_MAXGAIN_SHIFT 0 -#define MADERA_DRC1_MAXGAIN_WIDTH 2 - -/* (0x0E82) DRC1_ctrl3 */ -#define MADERA_DRC1_NG_MINGAIN_MASK 0xF000 -#define MADERA_DRC1_NG_MINGAIN_SHIFT 12 -#define MADERA_DRC1_NG_MINGAIN_WIDTH 4 -#define MADERA_DRC1_NG_EXP_MASK 0x0C00 -#define MADERA_DRC1_NG_EXP_SHIFT 10 -#define MADERA_DRC1_NG_EXP_WIDTH 2 -#define MADERA_DRC1_QR_THR_MASK 0x0300 -#define MADERA_DRC1_QR_THR_SHIFT 8 -#define MADERA_DRC1_QR_THR_WIDTH 2 -#define MADERA_DRC1_QR_DCY_MASK 0x00C0 -#define MADERA_DRC1_QR_DCY_SHIFT 6 -#define MADERA_DRC1_QR_DCY_WIDTH 2 -#define MADERA_DRC1_HI_COMP_MASK 0x0038 -#define MADERA_DRC1_HI_COMP_SHIFT 3 -#define MADERA_DRC1_HI_COMP_WIDTH 3 -#define MADERA_DRC1_LO_COMP_MASK 0x0007 -#define MADERA_DRC1_LO_COMP_SHIFT 0 -#define MADERA_DRC1_LO_COMP_WIDTH 3 - -/* (0x0E83) DRC1_ctrl4 */ -#define MADERA_DRC1_KNEE_IP_MASK 0x07E0 -#define MADERA_DRC1_KNEE_IP_SHIFT 5 -#define MADERA_DRC1_KNEE_IP_WIDTH 6 -#define MADERA_DRC1_KNEE_OP_MASK 0x001F -#define MADERA_DRC1_KNEE_OP_SHIFT 0 -#define MADERA_DRC1_KNEE_OP_WIDTH 5 - -/* (0x0E84) DRC1_ctrl5 */ -#define MADERA_DRC1_KNEE2_IP_MASK 0x03E0 -#define MADERA_DRC1_KNEE2_IP_SHIFT 5 -#define MADERA_DRC1_KNEE2_IP_WIDTH 5 -#define MADERA_DRC1_KNEE2_OP_MASK 0x001F -#define MADERA_DRC1_KNEE2_OP_SHIFT 0 -#define MADERA_DRC1_KNEE2_OP_WIDTH 5 - -/* (0x0E88) DRC2_ctrl1 */ -#define MADERA_DRC2_SIG_DET_RMS_MASK 0xF800 -#define MADERA_DRC2_SIG_DET_RMS_SHIFT 11 -#define MADERA_DRC2_SIG_DET_RMS_WIDTH 5 -#define MADERA_DRC2_SIG_DET_PK_MASK 0x0600 -#define MADERA_DRC2_SIG_DET_PK_SHIFT 9 -#define MADERA_DRC2_SIG_DET_PK_WIDTH 2 -#define MADERA_DRC2_NG_ENA 0x0100 -#define MADERA_DRC2_NG_ENA_MASK 0x0100 -#define MADERA_DRC2_NG_ENA_SHIFT 8 -#define MADERA_DRC2_NG_ENA_WIDTH 1 -#define MADERA_DRC2_SIG_DET_MODE 0x0080 -#define MADERA_DRC2_SIG_DET_MODE_MASK 0x0080 -#define MADERA_DRC2_SIG_DET_MODE_SHIFT 7 -#define MADERA_DRC2_SIG_DET_MODE_WIDTH 1 -#define MADERA_DRC2_SIG_DET 0x0040 -#define MADERA_DRC2_SIG_DET_MASK 0x0040 -#define MADERA_DRC2_SIG_DET_SHIFT 6 -#define MADERA_DRC2_SIG_DET_WIDTH 1 -#define MADERA_DRC2_KNEE2_OP_ENA 0x0020 -#define MADERA_DRC2_KNEE2_OP_ENA_MASK 0x0020 -#define MADERA_DRC2_KNEE2_OP_ENA_SHIFT 5 -#define MADERA_DRC2_KNEE2_OP_ENA_WIDTH 1 -#define MADERA_DRC2_QR 0x0010 -#define MADERA_DRC2_QR_MASK 0x0010 -#define MADERA_DRC2_QR_SHIFT 4 -#define MADERA_DRC2_QR_WIDTH 1 -#define MADERA_DRC2_ANTICLIP 0x0008 -#define MADERA_DRC2_ANTICLIP_MASK 0x0008 -#define MADERA_DRC2_ANTICLIP_SHIFT 3 -#define MADERA_DRC2_ANTICLIP_WIDTH 1 -#define MADERA_DRC2L_ENA 0x0002 -#define MADERA_DRC2L_ENA_MASK 0x0002 -#define MADERA_DRC2L_ENA_SHIFT 1 -#define MADERA_DRC2L_ENA_WIDTH 1 -#define MADERA_DRC2R_ENA 0x0001 -#define MADERA_DRC2R_ENA_MASK 0x0001 -#define MADERA_DRC2R_ENA_SHIFT 0 -#define MADERA_DRC2R_ENA_WIDTH 1 - -/* (0x0E89) DRC2_ctrl2 */ -#define MADERA_DRC2_ATK_MASK 0x1E00 -#define MADERA_DRC2_ATK_SHIFT 9 -#define MADERA_DRC2_ATK_WIDTH 4 -#define MADERA_DRC2_DCY_MASK 0x01E0 -#define MADERA_DRC2_DCY_SHIFT 5 -#define MADERA_DRC2_DCY_WIDTH 4 -#define MADERA_DRC2_MINGAIN_MASK 0x001C -#define MADERA_DRC2_MINGAIN_SHIFT 2 -#define MADERA_DRC2_MINGAIN_WIDTH 3 -#define MADERA_DRC2_MAXGAIN_MASK 0x0003 -#define MADERA_DRC2_MAXGAIN_SHIFT 0 -#define MADERA_DRC2_MAXGAIN_WIDTH 2 - -/* (0x0E8A) DRC2_ctrl3 */ -#define MADERA_DRC2_NG_MINGAIN_MASK 0xF000 -#define MADERA_DRC2_NG_MINGAIN_SHIFT 12 -#define MADERA_DRC2_NG_MINGAIN_WIDTH 4 -#define MADERA_DRC2_NG_EXP_MASK 0x0C00 -#define MADERA_DRC2_NG_EXP_SHIFT 10 -#define MADERA_DRC2_NG_EXP_WIDTH 2 -#define MADERA_DRC2_QR_THR_MASK 0x0300 -#define MADERA_DRC2_QR_THR_SHIFT 8 -#define MADERA_DRC2_QR_THR_WIDTH 2 -#define MADERA_DRC2_QR_DCY_MASK 0x00C0 -#define MADERA_DRC2_QR_DCY_SHIFT 6 -#define MADERA_DRC2_QR_DCY_WIDTH 2 -#define MADERA_DRC2_HI_COMP_MASK 0x0038 -#define MADERA_DRC2_HI_COMP_SHIFT 3 -#define MADERA_DRC2_HI_COMP_WIDTH 3 -#define MADERA_DRC2_LO_COMP_MASK 0x0007 -#define MADERA_DRC2_LO_COMP_SHIFT 0 -#define MADERA_DRC2_LO_COMP_WIDTH 3 - -/* (0x0E8B) DRC2_ctrl4 */ -#define MADERA_DRC2_KNEE_IP_MASK 0x07E0 -#define MADERA_DRC2_KNEE_IP_SHIFT 5 -#define MADERA_DRC2_KNEE_IP_WIDTH 6 -#define MADERA_DRC2_KNEE_OP_MASK 0x001F -#define MADERA_DRC2_KNEE_OP_SHIFT 0 -#define MADERA_DRC2_KNEE_OP_WIDTH 5 - -/* (0x0E8C) DRC2_ctrl5 */ -#define MADERA_DRC2_KNEE2_IP_MASK 0x03E0 -#define MADERA_DRC2_KNEE2_IP_SHIFT 5 -#define MADERA_DRC2_KNEE2_IP_WIDTH 5 -#define MADERA_DRC2_KNEE2_OP_MASK 0x001F -#define MADERA_DRC2_KNEE2_OP_SHIFT 0 -#define MADERA_DRC2_KNEE2_OP_WIDTH 5 - -/* (0x0EC0) HPLPF1_1 */ -#define MADERA_LHPF1_MODE 0x0002 -#define MADERA_LHPF1_MODE_MASK 0x0002 -#define MADERA_LHPF1_MODE_SHIFT 1 -#define MADERA_LHPF1_MODE_WIDTH 1 -#define MADERA_LHPF1_ENA 0x0001 -#define MADERA_LHPF1_ENA_MASK 0x0001 -#define MADERA_LHPF1_ENA_SHIFT 0 -#define MADERA_LHPF1_ENA_WIDTH 1 - -/* (0x0EC1) HPLPF1_2 */ -#define MADERA_LHPF1_COEFF_MASK 0xFFFF -#define MADERA_LHPF1_COEFF_SHIFT 0 -#define MADERA_LHPF1_COEFF_WIDTH 16 - -/* (0x0EC4) HPLPF2_1 */ -#define MADERA_LHPF2_MODE 0x0002 -#define MADERA_LHPF2_MODE_MASK 0x0002 -#define MADERA_LHPF2_MODE_SHIFT 1 -#define MADERA_LHPF2_MODE_WIDTH 1 -#define MADERA_LHPF2_ENA 0x0001 -#define MADERA_LHPF2_ENA_MASK 0x0001 -#define MADERA_LHPF2_ENA_SHIFT 0 -#define MADERA_LHPF2_ENA_WIDTH 1 - -/* (0x0EC5) HPLPF2_2 */ -#define MADERA_LHPF2_COEFF_MASK 0xFFFF -#define MADERA_LHPF2_COEFF_SHIFT 0 -#define MADERA_LHPF2_COEFF_WIDTH 16 - -/* (0x0EC8) HPLPF3_1 */ -#define MADERA_LHPF3_MODE 0x0002 -#define MADERA_LHPF3_MODE_MASK 0x0002 -#define MADERA_LHPF3_MODE_SHIFT 1 -#define MADERA_LHPF3_MODE_WIDTH 1 -#define MADERA_LHPF3_ENA 0x0001 -#define MADERA_LHPF3_ENA_MASK 0x0001 -#define MADERA_LHPF3_ENA_SHIFT 0 -#define MADERA_LHPF3_ENA_WIDTH 1 - -/* (0x0EC9) HPLPF3_2 */ -#define MADERA_LHPF3_COEFF_MASK 0xFFFF -#define MADERA_LHPF3_COEFF_SHIFT 0 -#define MADERA_LHPF3_COEFF_WIDTH 16 - -/* (0x0ECC) HPLPF4_1 */ -#define MADERA_LHPF4_MODE 0x0002 -#define MADERA_LHPF4_MODE_MASK 0x0002 -#define MADERA_LHPF4_MODE_SHIFT 1 -#define MADERA_LHPF4_MODE_WIDTH 1 -#define MADERA_LHPF4_ENA 0x0001 -#define MADERA_LHPF4_ENA_MASK 0x0001 -#define MADERA_LHPF4_ENA_SHIFT 0 -#define MADERA_LHPF4_ENA_WIDTH 1 - -/* (0x0ECD) HPLPF4_2 */ -#define MADERA_LHPF4_COEFF_MASK 0xFFFF -#define MADERA_LHPF4_COEFF_SHIFT 0 -#define MADERA_LHPF4_COEFF_WIDTH 16 - -/* (0x0ED0) ASRC2_ENABLE */ -#define MADERA_ASRC2_IN2L_ENA 0x0008 -#define MADERA_ASRC2_IN2L_ENA_MASK 0x0008 -#define MADERA_ASRC2_IN2L_ENA_SHIFT 3 -#define MADERA_ASRC2_IN2L_ENA_WIDTH 1 -#define MADERA_ASRC2_IN2R_ENA 0x0004 -#define MADERA_ASRC2_IN2R_ENA_MASK 0x0004 -#define MADERA_ASRC2_IN2R_ENA_SHIFT 2 -#define MADERA_ASRC2_IN2R_ENA_WIDTH 1 -#define MADERA_ASRC2_IN1L_ENA 0x0002 -#define MADERA_ASRC2_IN1L_ENA_MASK 0x0002 -#define MADERA_ASRC2_IN1L_ENA_SHIFT 1 -#define MADERA_ASRC2_IN1L_ENA_WIDTH 1 -#define MADERA_ASRC2_IN1R_ENA 0x0001 -#define MADERA_ASRC2_IN1R_ENA_MASK 0x0001 -#define MADERA_ASRC2_IN1R_ENA_SHIFT 0 -#define MADERA_ASRC2_IN1R_ENA_WIDTH 1 - -/* (0x0ED2) ASRC2_RATE1 */ -#define MADERA_ASRC2_RATE1_MASK 0x7800 -#define MADERA_ASRC2_RATE1_SHIFT 11 -#define MADERA_ASRC2_RATE1_WIDTH 4 - -/* (0x0ED3) ASRC2_RATE2 */ -#define MADERA_ASRC2_RATE2_MASK 0x7800 -#define MADERA_ASRC2_RATE2_SHIFT 11 -#define MADERA_ASRC2_RATE2_WIDTH 4 - -/* (0x0EE0) ASRC1_ENABLE */ -#define MADERA_ASRC1_IN2L_ENA 0x0008 -#define MADERA_ASRC1_IN2L_ENA_MASK 0x0008 -#define MADERA_ASRC1_IN2L_ENA_SHIFT 3 -#define MADERA_ASRC1_IN2L_ENA_WIDTH 1 -#define MADERA_ASRC1_IN2R_ENA 0x0004 -#define MADERA_ASRC1_IN2R_ENA_MASK 0x0004 -#define MADERA_ASRC1_IN2R_ENA_SHIFT 2 -#define MADERA_ASRC1_IN2R_ENA_WIDTH 1 -#define MADERA_ASRC1_IN1L_ENA 0x0002 -#define MADERA_ASRC1_IN1L_ENA_MASK 0x0002 -#define MADERA_ASRC1_IN1L_ENA_SHIFT 1 -#define MADERA_ASRC1_IN1L_ENA_WIDTH 1 -#define MADERA_ASRC1_IN1R_ENA 0x0001 -#define MADERA_ASRC1_IN1R_ENA_MASK 0x0001 -#define MADERA_ASRC1_IN1R_ENA_SHIFT 0 -#define MADERA_ASRC1_IN1R_ENA_WIDTH 1 - -/* (0x0EE2) ASRC1_RATE1 */ -#define MADERA_ASRC1_RATE1_MASK 0x7800 -#define MADERA_ASRC1_RATE1_SHIFT 11 -#define MADERA_ASRC1_RATE1_WIDTH 4 - -/* (0x0EE3) ASRC1_RATE2 */ -#define MADERA_ASRC1_RATE2_MASK 0x7800 -#define MADERA_ASRC1_RATE2_SHIFT 11 -#define MADERA_ASRC1_RATE2_WIDTH 4 - -/* (0x0EF0) - ISRC1 CTRL 1 */ -#define MADERA_ISRC1_FSH_MASK 0x7800 -#define MADERA_ISRC1_FSH_SHIFT 11 -#define MADERA_ISRC1_FSH_WIDTH 4 -#define MADERA_ISRC1_CLK_SEL_MASK 0x0700 -#define MADERA_ISRC1_CLK_SEL_SHIFT 8 -#define MADERA_ISRC1_CLK_SEL_WIDTH 3 - -/* (0x0EF1) ISRC1_CTRL_2 */ -#define MADERA_ISRC1_FSL_MASK 0x7800 -#define MADERA_ISRC1_FSL_SHIFT 11 -#define MADERA_ISRC1_FSL_WIDTH 4 - -/* (0x0EF2) ISRC1_CTRL_3 */ -#define MADERA_ISRC1_INT1_ENA 0x8000 -#define MADERA_ISRC1_INT1_ENA_MASK 0x8000 -#define MADERA_ISRC1_INT1_ENA_SHIFT 15 -#define MADERA_ISRC1_INT1_ENA_WIDTH 1 -#define MADERA_ISRC1_INT2_ENA 0x4000 -#define MADERA_ISRC1_INT2_ENA_MASK 0x4000 -#define MADERA_ISRC1_INT2_ENA_SHIFT 14 -#define MADERA_ISRC1_INT2_ENA_WIDTH 1 -#define MADERA_ISRC1_INT3_ENA 0x2000 -#define MADERA_ISRC1_INT3_ENA_MASK 0x2000 -#define MADERA_ISRC1_INT3_ENA_SHIFT 13 -#define MADERA_ISRC1_INT3_ENA_WIDTH 1 -#define MADERA_ISRC1_INT4_ENA 0x1000 -#define MADERA_ISRC1_INT4_ENA_MASK 0x1000 -#define MADERA_ISRC1_INT4_ENA_SHIFT 12 -#define MADERA_ISRC1_INT4_ENA_WIDTH 1 -#define MADERA_ISRC1_DEC1_ENA 0x0200 -#define MADERA_ISRC1_DEC1_ENA_MASK 0x0200 -#define MADERA_ISRC1_DEC1_ENA_SHIFT 9 -#define MADERA_ISRC1_DEC1_ENA_WIDTH 1 -#define MADERA_ISRC1_DEC2_ENA 0x0100 -#define MADERA_ISRC1_DEC2_ENA_MASK 0x0100 -#define MADERA_ISRC1_DEC2_ENA_SHIFT 8 -#define MADERA_ISRC1_DEC2_ENA_WIDTH 1 -#define MADERA_ISRC1_DEC3_ENA 0x0080 -#define MADERA_ISRC1_DEC3_ENA_MASK 0x0080 -#define MADERA_ISRC1_DEC3_ENA_SHIFT 7 -#define MADERA_ISRC1_DEC3_ENA_WIDTH 1 -#define MADERA_ISRC1_DEC4_ENA 0x0040 -#define MADERA_ISRC1_DEC4_ENA_MASK 0x0040 -#define MADERA_ISRC1_DEC4_ENA_SHIFT 6 -#define MADERA_ISRC1_DEC4_ENA_WIDTH 1 -#define MADERA_ISRC1_NOTCH_ENA 0x0001 -#define MADERA_ISRC1_NOTCH_ENA_MASK 0x0001 -#define MADERA_ISRC1_NOTCH_ENA_SHIFT 0 -#define MADERA_ISRC1_NOTCH_ENA_WIDTH 1 - -/* (0x0EF3) ISRC2_CTRL_1 */ -#define MADERA_ISRC2_FSH_MASK 0x7800 -#define MADERA_ISRC2_FSH_SHIFT 11 -#define MADERA_ISRC2_FSH_WIDTH 4 -#define MADERA_ISRC2_CLK_SEL_MASK 0x0700 -#define MADERA_ISRC2_CLK_SEL_SHIFT 8 -#define MADERA_ISRC2_CLK_SEL_WIDTH 3 - -/* (0x0EF4) ISRC2_CTRL_2 */ -#define MADERA_ISRC2_FSL_MASK 0x7800 -#define MADERA_ISRC2_FSL_SHIFT 11 -#define MADERA_ISRC2_FSL_WIDTH 4 - -/* (0x0EF5) ISRC2_CTRL_3 */ -#define MADERA_ISRC2_INT1_ENA 0x8000 -#define MADERA_ISRC2_INT1_ENA_MASK 0x8000 -#define MADERA_ISRC2_INT1_ENA_SHIFT 15 -#define MADERA_ISRC2_INT1_ENA_WIDTH 1 -#define MADERA_ISRC2_INT2_ENA 0x4000 -#define MADERA_ISRC2_INT2_ENA_MASK 0x4000 -#define MADERA_ISRC2_INT2_ENA_SHIFT 14 -#define MADERA_ISRC2_INT2_ENA_WIDTH 1 -#define MADERA_ISRC2_INT3_ENA 0x2000 -#define MADERA_ISRC2_INT3_ENA_MASK 0x2000 -#define MADERA_ISRC2_INT3_ENA_SHIFT 13 -#define MADERA_ISRC2_INT3_ENA_WIDTH 1 -#define MADERA_ISRC2_INT4_ENA 0x1000 -#define MADERA_ISRC2_INT4_ENA_MASK 0x1000 -#define MADERA_ISRC2_INT4_ENA_SHIFT 12 -#define MADERA_ISRC2_INT4_ENA_WIDTH 1 -#define MADERA_ISRC2_DEC1_ENA 0x0200 -#define MADERA_ISRC2_DEC1_ENA_MASK 0x0200 -#define MADERA_ISRC2_DEC1_ENA_SHIFT 9 -#define MADERA_ISRC2_DEC1_ENA_WIDTH 1 -#define MADERA_ISRC2_DEC2_ENA 0x0100 -#define MADERA_ISRC2_DEC2_ENA_MASK 0x0100 -#define MADERA_ISRC2_DEC2_ENA_SHIFT 8 -#define MADERA_ISRC2_DEC2_ENA_WIDTH 1 -#define MADERA_ISRC2_DEC3_ENA 0x0080 -#define MADERA_ISRC2_DEC3_ENA_MASK 0x0080 -#define MADERA_ISRC2_DEC3_ENA_SHIFT 7 -#define MADERA_ISRC2_DEC3_ENA_WIDTH 1 -#define MADERA_ISRC2_DEC4_ENA 0x0040 -#define MADERA_ISRC2_DEC4_ENA_MASK 0x0040 -#define MADERA_ISRC2_DEC4_ENA_SHIFT 6 -#define MADERA_ISRC2_DEC4_ENA_WIDTH 1 -#define MADERA_ISRC2_NOTCH_ENA 0x0001 -#define MADERA_ISRC2_NOTCH_ENA_MASK 0x0001 -#define MADERA_ISRC2_NOTCH_ENA_SHIFT 0 -#define MADERA_ISRC2_NOTCH_ENA_WIDTH 1 - -/* (0x0EF6) ISRC3_CTRL_1 */ -#define MADERA_ISRC3_FSH_MASK 0x7800 -#define MADERA_ISRC3_FSH_SHIFT 11 -#define MADERA_ISRC3_FSH_WIDTH 4 -#define MADERA_ISRC3_CLK_SEL_MASK 0x0700 -#define MADERA_ISRC3_CLK_SEL_SHIFT 8 -#define MADERA_ISRC3_CLK_SEL_WIDTH 3 - -/* (0x0EF7) ISRC3_CTRL_2 */ -#define MADERA_ISRC3_FSL_MASK 0x7800 -#define MADERA_ISRC3_FSL_SHIFT 11 -#define MADERA_ISRC3_FSL_WIDTH 4 - -/* (0x0EF8) ISRC3_CTRL_3 */ -#define MADERA_ISRC3_INT1_ENA 0x8000 -#define MADERA_ISRC3_INT1_ENA_MASK 0x8000 -#define MADERA_ISRC3_INT1_ENA_SHIFT 15 -#define MADERA_ISRC3_INT1_ENA_WIDTH 1 -#define MADERA_ISRC3_INT2_ENA 0x4000 -#define MADERA_ISRC3_INT2_ENA_MASK 0x4000 -#define MADERA_ISRC3_INT2_ENA_SHIFT 14 -#define MADERA_ISRC3_INT2_ENA_WIDTH 1 -#define MADERA_ISRC3_INT3_ENA 0x2000 -#define MADERA_ISRC3_INT3_ENA_MASK 0x2000 -#define MADERA_ISRC3_INT3_ENA_SHIFT 13 -#define MADERA_ISRC3_INT3_ENA_WIDTH 1 -#define MADERA_ISRC3_INT4_ENA 0x1000 -#define MADERA_ISRC3_INT4_ENA_MASK 0x1000 -#define MADERA_ISRC3_INT4_ENA_SHIFT 12 -#define MADERA_ISRC3_INT4_ENA_WIDTH 1 -#define MADERA_ISRC3_DEC1_ENA 0x0200 -#define MADERA_ISRC3_DEC1_ENA_MASK 0x0200 -#define MADERA_ISRC3_DEC1_ENA_SHIFT 9 -#define MADERA_ISRC3_DEC1_ENA_WIDTH 1 -#define MADERA_ISRC3_DEC2_ENA 0x0100 -#define MADERA_ISRC3_DEC2_ENA_MASK 0x0100 -#define MADERA_ISRC3_DEC2_ENA_SHIFT 8 -#define MADERA_ISRC3_DEC2_ENA_WIDTH 1 -#define MADERA_ISRC3_DEC3_ENA 0x0080 -#define MADERA_ISRC3_DEC3_ENA_MASK 0x0080 -#define MADERA_ISRC3_DEC3_ENA_SHIFT 7 -#define MADERA_ISRC3_DEC3_ENA_WIDTH 1 -#define MADERA_ISRC3_DEC4_ENA 0x0040 -#define MADERA_ISRC3_DEC4_ENA_MASK 0x0040 -#define MADERA_ISRC3_DEC4_ENA_SHIFT 6 -#define MADERA_ISRC3_DEC4_ENA_WIDTH 1 -#define MADERA_ISRC3_NOTCH_ENA 0x0001 -#define MADERA_ISRC3_NOTCH_ENA_MASK 0x0001 -#define MADERA_ISRC3_NOTCH_ENA_SHIFT 0 -#define MADERA_ISRC3_NOTCH_ENA_WIDTH 1 - -/* (0x0EF9) ISRC4_CTRL_1 */ -#define MADERA_ISRC4_FSH_MASK 0x7800 -#define MADERA_ISRC4_FSH_SHIFT 11 -#define MADERA_ISRC4_FSH_WIDTH 4 -#define MADERA_ISRC4_CLK_SEL_MASK 0x0700 -#define MADERA_ISRC4_CLK_SEL_SHIFT 8 -#define MADERA_ISRC4_CLK_SEL_WIDTH 3 - -/* (0x0EFA) ISRC4_CTRL_2 */ -#define MADERA_ISRC4_FSL_MASK 0x7800 -#define MADERA_ISRC4_FSL_SHIFT 11 -#define MADERA_ISRC4_FSL_WIDTH 4 - -/* (0x0EFB) ISRC4_CTRL_3 */ -#define MADERA_ISRC4_INT1_ENA 0x8000 -#define MADERA_ISRC4_INT1_ENA_MASK 0x8000 -#define MADERA_ISRC4_INT1_ENA_SHIFT 15 -#define MADERA_ISRC4_INT1_ENA_WIDTH 1 -#define MADERA_ISRC4_INT2_ENA 0x4000 -#define MADERA_ISRC4_INT2_ENA_MASK 0x4000 -#define MADERA_ISRC4_INT2_ENA_SHIFT 14 -#define MADERA_ISRC4_INT2_ENA_WIDTH 1 -#define MADERA_ISRC4_INT3_ENA 0x2000 -#define MADERA_ISRC4_INT3_ENA_MASK 0x2000 -#define MADERA_ISRC4_INT3_ENA_SHIFT 13 -#define MADERA_ISRC4_INT3_ENA_WIDTH 1 -#define MADERA_ISRC4_INT4_ENA 0x1000 -#define MADERA_ISRC4_INT4_ENA_MASK 0x1000 -#define MADERA_ISRC4_INT4_ENA_SHIFT 12 -#define MADERA_ISRC4_INT4_ENA_WIDTH 1 -#define MADERA_ISRC4_DEC1_ENA 0x0200 -#define MADERA_ISRC4_DEC1_ENA_MASK 0x0200 -#define MADERA_ISRC4_DEC1_ENA_SHIFT 9 -#define MADERA_ISRC4_DEC1_ENA_WIDTH 1 -#define MADERA_ISRC4_DEC2_ENA 0x0100 -#define MADERA_ISRC4_DEC2_ENA_MASK 0x0100 -#define MADERA_ISRC4_DEC2_ENA_SHIFT 8 -#define MADERA_ISRC4_DEC2_ENA_WIDTH 1 -#define MADERA_ISRC4_DEC3_ENA 0x0080 -#define MADERA_ISRC4_DEC3_ENA_MASK 0x0080 -#define MADERA_ISRC4_DEC3_ENA_SHIFT 7 -#define MADERA_ISRC4_DEC3_ENA_WIDTH 1 -#define MADERA_ISRC4_DEC4_ENA 0x0040 -#define MADERA_ISRC4_DEC4_ENA_MASK 0x0040 -#define MADERA_ISRC4_DEC4_ENA_SHIFT 6 -#define MADERA_ISRC4_DEC4_ENA_WIDTH 1 -#define MADERA_ISRC4_NOTCH_ENA 0x0001 -#define MADERA_ISRC4_NOTCH_ENA_MASK 0x0001 -#define MADERA_ISRC4_NOTCH_ENA_SHIFT 0 -#define MADERA_ISRC4_NOTCH_ENA_WIDTH 1 - -/* (0x0F00) Clock_Control */ -#define MADERA_EXT_NG_SEL_CLR 0x0080 -#define MADERA_EXT_NG_SEL_CLR_MASK 0x0080 -#define MADERA_EXT_NG_SEL_CLR_SHIFT 7 -#define MADERA_EXT_NG_SEL_CLR_WIDTH 1 -#define MADERA_EXT_NG_SEL_SET 0x0040 -#define MADERA_EXT_NG_SEL_SET_MASK 0x0040 -#define MADERA_EXT_NG_SEL_SET_SHIFT 6 -#define MADERA_EXT_NG_SEL_SET_WIDTH 1 -#define MADERA_CLK_R_ENA_CLR 0x0020 -#define MADERA_CLK_R_ENA_CLR_MASK 0x0020 -#define MADERA_CLK_R_ENA_CLR_SHIFT 5 -#define MADERA_CLK_R_ENA_CLR_WIDTH 1 -#define MADERA_CLK_R_ENA_SET 0x0010 -#define MADERA_CLK_R_ENA_SET_MASK 0x0010 -#define MADERA_CLK_R_ENA_SET_SHIFT 4 -#define MADERA_CLK_R_ENA_SET_WIDTH 1 -#define MADERA_CLK_NG_ENA_CLR 0x0008 -#define MADERA_CLK_NG_ENA_CLR_MASK 0x0008 -#define MADERA_CLK_NG_ENA_CLR_SHIFT 3 -#define MADERA_CLK_NG_ENA_CLR_WIDTH 1 -#define MADERA_CLK_NG_ENA_SET 0x0004 -#define MADERA_CLK_NG_ENA_SET_MASK 0x0004 -#define MADERA_CLK_NG_ENA_SET_SHIFT 2 -#define MADERA_CLK_NG_ENA_SET_WIDTH 1 -#define MADERA_CLK_L_ENA_CLR 0x0002 -#define MADERA_CLK_L_ENA_CLR_MASK 0x0002 -#define MADERA_CLK_L_ENA_CLR_SHIFT 1 -#define MADERA_CLK_L_ENA_CLR_WIDTH 1 -#define MADERA_CLK_L_ENA_SET 0x0001 -#define MADERA_CLK_L_ENA_SET_MASK 0x0001 -#define MADERA_CLK_L_ENA_SET_SHIFT 0 -#define MADERA_CLK_L_ENA_SET_WIDTH 1 - -/* (0x0F01) ANC_SRC */ -#define MADERA_IN_RXANCR_SEL_MASK 0x0070 -#define MADERA_IN_RXANCR_SEL_SHIFT 4 -#define MADERA_IN_RXANCR_SEL_WIDTH 3 -#define MADERA_IN_RXANCL_SEL_MASK 0x0007 -#define MADERA_IN_RXANCL_SEL_SHIFT 0 -#define MADERA_IN_RXANCL_SEL_WIDTH 3 - -/* (0x0F17) FCL_ADC_reformatter_control */ -#define MADERA_FCL_MIC_MODE_SEL 0x000C -#define MADERA_FCL_MIC_MODE_SEL_SHIFT 2 -#define MADERA_FCL_MIC_MODE_SEL_WIDTH 2 - -/* (0x0F73) FCR_ADC_reformatter_control */ -#define MADERA_FCR_MIC_MODE_SEL 0x000C -#define MADERA_FCR_MIC_MODE_SEL_SHIFT 2 -#define MADERA_FCR_MIC_MODE_SEL_WIDTH 2 - -/* (0x1480) DFC1_CTRL_W0 */ - -#define MADERA_DFC1_RATE_MASK 0x003C -#define MADERA_DFC1_RATE_SHIFT 2 -#define MADERA_DFC1_RATE_WIDTH 4 -#define MADERA_DFC1_DITH_ENA 0x0002 -#define MADERA_DFC1_DITH_ENA_MASK 0x0002 -#define MADERA_DFC1_DITH_ENA_SHIFT 1 -#define MADERA_DFC1_DITH_ENA_WIDTH 1 -#define MADERA_DFC1_ENA 0x0001 -#define MADERA_DFC1_ENA_MASK 0x0001 -#define MADERA_DFC1_ENA_SHIFT 0 -#define MADERA_DFC1_ENA_WIDTH 1 - -/* (0x1482) DFC1_RX_W0 */ - -#define MADERA_DFC1_RX_DATA_WIDTH_MASK 0x1F00 -#define MADERA_DFC1_RX_DATA_WIDTH_SHIFT 8 -#define MADERA_DFC1_RX_DATA_WIDTH_WIDTH 5 - -#define MADERA_DFC1_RX_DATA_TYPE_MASK 0x0007 -#define MADERA_DFC1_RX_DATA_TYPE_SHIFT 0 -#define MADERA_DFC1_RX_DATA_TYPE_WIDTH 3 - -/* (0x1484) DFC1_TX_W0 */ - -#define MADERA_DFC1_TX_DATA_WIDTH_MASK 0x1F00 -#define MADERA_DFC1_TX_DATA_WIDTH_SHIFT 8 -#define MADERA_DFC1_TX_DATA_WIDTH_WIDTH 5 - -#define MADERA_DFC1_TX_DATA_TYPE_MASK 0x0007 -#define MADERA_DFC1_TX_DATA_TYPE_SHIFT 0 -#define MADERA_DFC1_TX_DATA_TYPE_WIDTH 3 - -/* (0x1600) ADSP2_IRQ0 */ -#define MADERA_DSP_IRQ2 0x0002 -#define MADERA_DSP_IRQ1 0x0001 - -/* (0x1601) ADSP2_IRQ1 */ -#define MADERA_DSP_IRQ4 0x0002 -#define MADERA_DSP_IRQ3 0x0001 - -/* (0x1602) ADSP2_IRQ2 */ -#define MADERA_DSP_IRQ6 0x0002 -#define MADERA_DSP_IRQ5 0x0001 - -/* (0x1603) ADSP2_IRQ3 */ -#define MADERA_DSP_IRQ8 0x0002 -#define MADERA_DSP_IRQ7 0x0001 - -/* (0x1604) ADSP2_IRQ4 */ -#define MADERA_DSP_IRQ10 0x0002 -#define MADERA_DSP_IRQ9 0x0001 - -/* (0x1605) ADSP2_IRQ5 */ -#define MADERA_DSP_IRQ12 0x0002 -#define MADERA_DSP_IRQ11 0x0001 - -/* (0x1606) ADSP2_IRQ6 */ -#define MADERA_DSP_IRQ14 0x0002 -#define MADERA_DSP_IRQ13 0x0001 - -/* (0x1607) ADSP2_IRQ7 */ -#define MADERA_DSP_IRQ16 0x0002 -#define MADERA_DSP_IRQ15 0x0001 - -/* (0x1700) GPIO1_CTRL_1 */ -#define MADERA_GP1_LVL 0x8000 -#define MADERA_GP1_LVL_MASK 0x8000 -#define MADERA_GP1_LVL_SHIFT 15 -#define MADERA_GP1_LVL_WIDTH 1 -#define MADERA_GP1_OP_CFG 0x4000 -#define MADERA_GP1_OP_CFG_MASK 0x4000 -#define MADERA_GP1_OP_CFG_SHIFT 14 -#define MADERA_GP1_OP_CFG_WIDTH 1 -#define MADERA_GP1_DB 0x2000 -#define MADERA_GP1_DB_MASK 0x2000 -#define MADERA_GP1_DB_SHIFT 13 -#define MADERA_GP1_DB_WIDTH 1 -#define MADERA_GP1_POL 0x1000 -#define MADERA_GP1_POL_MASK 0x1000 -#define MADERA_GP1_POL_SHIFT 12 -#define MADERA_GP1_POL_WIDTH 1 -#define MADERA_GP1_FN_MASK 0x03FF -#define MADERA_GP1_FN_SHIFT 0 -#define MADERA_GP1_FN_WIDTH 10 - -/* (0x1701) GPIO1_CTRL_2 */ -#define MADERA_GP1_DIR 0x8000 -#define MADERA_GP1_DIR_MASK 0x8000 -#define MADERA_GP1_DIR_SHIFT 15 -#define MADERA_GP1_DIR_WIDTH 1 -#define MADERA_GP1_PU 0x4000 -#define MADERA_GP1_PU_MASK 0x4000 -#define MADERA_GP1_PU_SHIFT 14 -#define MADERA_GP1_PU_WIDTH 1 -#define MADERA_GP1_PD 0x2000 -#define MADERA_GP1_PD_MASK 0x2000 -#define MADERA_GP1_PD_SHIFT 13 -#define MADERA_GP1_PD_WIDTH 1 -#define MADERA_GP1_DRV_STR 0x1000 -#define MADERA_GP1_DRV_STR_MASK 0x1000 -#define MADERA_GP1_DRV_STR_SHIFT 12 -#define MADERA_GP1_DRV_STR_WIDTH 1 - -/* (0x1800) IRQ1_Status_1 */ -#define MADERA_DSP_SHARED_WR_COLL_EINT1 0x8000 -#define MADERA_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 -#define MADERA_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 -#define MADERA_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 -#define MADERA_CTRLIF_ERR_EINT1 0x1000 -#define MADERA_CTRLIF_ERR_EINT1_MASK 0x1000 -#define MADERA_CTRLIF_ERR_EINT1_SHIFT 12 -#define MADERA_CTRLIF_ERR_EINT1_WIDTH 1 -#define MADERA_SYSCLK_FAIL_EINT1 0x0200 -#define MADERA_SYSCLK_FAIL_EINT1_MASK 0x0200 -#define MADERA_SYSCLK_FAIL_EINT1_SHIFT 9 -#define MADERA_SYSCLK_FAIL_EINT1_WIDTH 1 -#define MADERA_CLOCK_DETECT_EINT1 0x0100 -#define MADERA_CLOCK_DETECT_EINT1_MASK 0x0100 -#define MADERA_CLOCK_DETECT_EINT1_SHIFT 8 -#define MADERA_CLOCK_DETECT_EINT1_WIDTH 1 -#define MADERA_BOOT_DONE_EINT1 0x0080 -#define MADERA_BOOT_DONE_EINT1_MASK 0x0080 -#define MADERA_BOOT_DONE_EINT1_SHIFT 7 -#define MADERA_BOOT_DONE_EINT1_WIDTH 1 - -/* (0x1801) IRQ1_Status_2 */ -#define MADERA_FLLAO_LOCK_EINT1 0x0800 -#define MADERA_FLLAO_LOCK_EINT1_MASK 0x0800 -#define MADERA_FLLAO_LOCK_EINT1_SHIFT 11 -#define MADERA_FLLAO_LOCK_EINT1_WIDTH 1 -#define MADERA_FLL3_LOCK_EINT1 0x0400 -#define MADERA_FLL3_LOCK_EINT1_MASK 0x0400 -#define MADERA_FLL3_LOCK_EINT1_SHIFT 10 -#define MADERA_FLL3_LOCK_EINT1_WIDTH 1 -#define MADERA_FLL2_LOCK_EINT1 0x0200 -#define MADERA_FLL2_LOCK_EINT1_MASK 0x0200 -#define MADERA_FLL2_LOCK_EINT1_SHIFT 9 -#define MADERA_FLL2_LOCK_EINT1_WIDTH 1 -#define MADERA_FLL1_LOCK_EINT1 0x0100 -#define MADERA_FLL1_LOCK_EINT1_MASK 0x0100 -#define MADERA_FLL1_LOCK_EINT1_SHIFT 8 -#define MADERA_FLL1_LOCK_EINT1_WIDTH 1 - -/* (0x1805) IRQ1_Status_6 */ -#define MADERA_MICDET2_EINT1 0x0200 -#define MADERA_MICDET2_EINT1_MASK 0x0200 -#define MADERA_MICDET2_EINT1_SHIFT 9 -#define MADERA_MICDET2_EINT1_WIDTH 1 -#define MADERA_MICDET1_EINT1 0x0100 -#define MADERA_MICDET1_EINT1_MASK 0x0100 -#define MADERA_MICDET1_EINT1_SHIFT 8 -#define MADERA_MICDET1_EINT1_WIDTH 1 -#define MADERA_HPDET_EINT1 0x0001 -#define MADERA_HPDET_EINT1_MASK 0x0001 -#define MADERA_HPDET_EINT1_SHIFT 0 -#define MADERA_HPDET_EINT1_WIDTH 1 - -/* (0x1806) IRQ1_Status_7 */ -#define MADERA_MICD_CLAMP_FALL_EINT1 0x0020 -#define MADERA_MICD_CLAMP_FALL_EINT1_MASK 0x0020 -#define MADERA_MICD_CLAMP_FALL_EINT1_SHIFT 5 -#define MADERA_MICD_CLAMP_FALL_EINT1_WIDTH 1 -#define MADERA_MICD_CLAMP_RISE_EINT1 0x0010 -#define MADERA_MICD_CLAMP_RISE_EINT1_MASK 0x0010 -#define MADERA_MICD_CLAMP_RISE_EINT1_SHIFT 4 -#define MADERA_MICD_CLAMP_RISE_EINT1_WIDTH 1 -#define MADERA_JD2_FALL_EINT1 0x0008 -#define MADERA_JD2_FALL_EINT1_MASK 0x0008 -#define MADERA_JD2_FALL_EINT1_SHIFT 3 -#define MADERA_JD2_FALL_EINT1_WIDTH 1 -#define MADERA_JD2_RISE_EINT1 0x0004 -#define MADERA_JD2_RISE_EINT1_MASK 0x0004 -#define MADERA_JD2_RISE_EINT1_SHIFT 2 -#define MADERA_JD2_RISE_EINT1_WIDTH 1 -#define MADERA_JD1_FALL_EINT1 0x0002 -#define MADERA_JD1_FALL_EINT1_MASK 0x0002 -#define MADERA_JD1_FALL_EINT1_SHIFT 1 -#define MADERA_JD1_FALL_EINT1_WIDTH 1 -#define MADERA_JD1_RISE_EINT1 0x0001 -#define MADERA_JD1_RISE_EINT1_MASK 0x0001 -#define MADERA_JD1_RISE_EINT1_SHIFT 0 -#define MADERA_JD1_RISE_EINT1_WIDTH 1 - -/* (0x1808) IRQ1_Status_9 */ -#define MADERA_ASRC2_IN2_LOCK_EINT1 0x0800 -#define MADERA_ASRC2_IN2_LOCK_EINT1_MASK 0x0800 -#define MADERA_ASRC2_IN2_LOCK_EINT1_SHIFT 11 -#define MADERA_ASRC2_IN2_LOCK_EINT1_WIDTH 1 -#define MADERA_ASRC2_IN1_LOCK_EINT1 0x0400 -#define MADERA_ASRC2_IN1_LOCK_EINT1_MASK 0x0400 -#define MADERA_ASRC2_IN1_LOCK_EINT1_SHIFT 10 -#define MADERA_ASRC2_IN1_LOCK_EINT1_WIDTH 1 -#define MADERA_ASRC1_IN2_LOCK_EINT1 0x0200 -#define MADERA_ASRC1_IN2_LOCK_EINT1_MASK 0x0200 -#define MADERA_ASRC1_IN2_LOCK_EINT1_SHIFT 9 -#define MADERA_ASRC1_IN2_LOCK_EINT1_WIDTH 1 -#define MADERA_ASRC1_IN1_LOCK_EINT1 0x0100 -#define MADERA_ASRC1_IN1_LOCK_EINT1_MASK 0x0100 -#define MADERA_ASRC1_IN1_LOCK_EINT1_SHIFT 8 -#define MADERA_ASRC1_IN1_LOCK_EINT1_WIDTH 1 -#define MADERA_DRC2_SIG_DET_EINT1 0x0002 -#define MADERA_DRC2_SIG_DET_EINT1_MASK 0x0002 -#define MADERA_DRC2_SIG_DET_EINT1_SHIFT 1 -#define MADERA_DRC2_SIG_DET_EINT1_WIDTH 1 -#define MADERA_DRC1_SIG_DET_EINT1 0x0001 -#define MADERA_DRC1_SIG_DET_EINT1_MASK 0x0001 -#define MADERA_DRC1_SIG_DET_EINT1_SHIFT 0 -#define MADERA_DRC1_SIG_DET_EINT1_WIDTH 1 - -/* (0x180A) IRQ1_Status_11 */ -#define MADERA_DSP_IRQ16_EINT1 0x8000 -#define MADERA_DSP_IRQ16_EINT1_MASK 0x8000 -#define MADERA_DSP_IRQ16_EINT1_SHIFT 15 -#define MADERA_DSP_IRQ16_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ15_EINT1 0x4000 -#define MADERA_DSP_IRQ15_EINT1_MASK 0x4000 -#define MADERA_DSP_IRQ15_EINT1_SHIFT 14 -#define MADERA_DSP_IRQ15_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ14_EINT1 0x2000 -#define MADERA_DSP_IRQ14_EINT1_MASK 0x2000 -#define MADERA_DSP_IRQ14_EINT1_SHIFT 13 -#define MADERA_DSP_IRQ14_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ13_EINT1 0x1000 -#define MADERA_DSP_IRQ13_EINT1_MASK 0x1000 -#define MADERA_DSP_IRQ13_EINT1_SHIFT 12 -#define MADERA_DSP_IRQ13_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ12_EINT1 0x0800 -#define MADERA_DSP_IRQ12_EINT1_MASK 0x0800 -#define MADERA_DSP_IRQ12_EINT1_SHIFT 11 -#define MADERA_DSP_IRQ12_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ11_EINT1 0x0400 -#define MADERA_DSP_IRQ11_EINT1_MASK 0x0400 -#define MADERA_DSP_IRQ11_EINT1_SHIFT 10 -#define MADERA_DSP_IRQ11_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ10_EINT1 0x0200 -#define MADERA_DSP_IRQ10_EINT1_MASK 0x0200 -#define MADERA_DSP_IRQ10_EINT1_SHIFT 9 -#define MADERA_DSP_IRQ10_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ9_EINT1 0x0100 -#define MADERA_DSP_IRQ9_EINT1_MASK 0x0100 -#define MADERA_DSP_IRQ9_EINT1_SHIFT 8 -#define MADERA_DSP_IRQ9_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ8_EINT1 0x0080 -#define MADERA_DSP_IRQ8_EINT1_MASK 0x0080 -#define MADERA_DSP_IRQ8_EINT1_SHIFT 7 -#define MADERA_DSP_IRQ8_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ7_EINT1 0x0040 -#define MADERA_DSP_IRQ7_EINT1_MASK 0x0040 -#define MADERA_DSP_IRQ7_EINT1_SHIFT 6 -#define MADERA_DSP_IRQ7_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ6_EINT1 0x0020 -#define MADERA_DSP_IRQ6_EINT1_MASK 0x0020 -#define MADERA_DSP_IRQ6_EINT1_SHIFT 5 -#define MADERA_DSP_IRQ6_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ5_EINT1 0x0010 -#define MADERA_DSP_IRQ5_EINT1_MASK 0x0010 -#define MADERA_DSP_IRQ5_EINT1_SHIFT 4 -#define MADERA_DSP_IRQ5_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ4_EINT1 0x0008 -#define MADERA_DSP_IRQ4_EINT1_MASK 0x0008 -#define MADERA_DSP_IRQ4_EINT1_SHIFT 3 -#define MADERA_DSP_IRQ4_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ3_EINT1 0x0004 -#define MADERA_DSP_IRQ3_EINT1_MASK 0x0004 -#define MADERA_DSP_IRQ3_EINT1_SHIFT 2 -#define MADERA_DSP_IRQ3_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ2_EINT1 0x0002 -#define MADERA_DSP_IRQ2_EINT1_MASK 0x0002 -#define MADERA_DSP_IRQ2_EINT1_SHIFT 1 -#define MADERA_DSP_IRQ2_EINT1_WIDTH 1 -#define MADERA_DSP_IRQ1_EINT1 0x0001 -#define MADERA_DSP_IRQ1_EINT1_MASK 0x0001 -#define MADERA_DSP_IRQ1_EINT1_SHIFT 0 -#define MADERA_DSP_IRQ1_EINT1_WIDTH 1 - -/* (0x180B) IRQ1_Status_12 */ -#define MADERA_SPKOUTR_SC_EINT1 0x0080 -#define MADERA_SPKOUTR_SC_EINT1_MASK 0x0080 -#define MADERA_SPKOUTR_SC_EINT1_SHIFT 7 -#define MADERA_SPKOUTR_SC_EINT1_WIDTH 1 -#define MADERA_SPKOUTL_SC_EINT1 0x0040 -#define MADERA_SPKOUTL_SC_EINT1_MASK 0x0040 -#define MADERA_SPKOUTL_SC_EINT1_SHIFT 6 -#define MADERA_SPKOUTL_SC_EINT1_WIDTH 1 -#define MADERA_HP3R_SC_EINT1 0x0020 -#define MADERA_HP3R_SC_EINT1_MASK 0x0020 -#define MADERA_HP3R_SC_EINT1_SHIFT 5 -#define MADERA_HP3R_SC_EINT1_WIDTH 1 -#define MADERA_HP3L_SC_EINT1 0x0010 -#define MADERA_HP3L_SC_EINT1_MASK 0x0010 -#define MADERA_HP3L_SC_EINT1_SHIFT 4 -#define MADERA_HP3L_SC_EINT1_WIDTH 1 -#define MADERA_HP2R_SC_EINT1 0x0008 -#define MADERA_HP2R_SC_EINT1_MASK 0x0008 -#define MADERA_HP2R_SC_EINT1_SHIFT 3 -#define MADERA_HP2R_SC_EINT1_WIDTH 1 -#define MADERA_HP2L_SC_EINT1 0x0004 -#define MADERA_HP2L_SC_EINT1_MASK 0x0004 -#define MADERA_HP2L_SC_EINT1_SHIFT 2 -#define MADERA_HP2L_SC_EINT1_WIDTH 1 -#define MADERA_HP1R_SC_EINT1 0x0002 -#define MADERA_HP1R_SC_EINT1_MASK 0x0002 -#define MADERA_HP1R_SC_EINT1_SHIFT 1 -#define MADERA_HP1R_SC_EINT1_WIDTH 1 -#define MADERA_HP1L_SC_EINT1 0x0001 -#define MADERA_HP1L_SC_EINT1_MASK 0x0001 -#define MADERA_HP1L_SC_EINT1_SHIFT 0 -#define MADERA_HP1L_SC_EINT1_WIDTH 1 - -/* (0x180C) IRQ1_Status_13 */ -#define MADERA_SPKOUTR_ENABLE_DONE_EINT1 0x0080 -#define MADERA_SPKOUTR_ENABLE_DONE_EINT1_MASK 0x0080 -#define MADERA_SPKOUTR_ENABLE_DONE_EINT1_SHIFT 7 -#define MADERA_SPKOUTR_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_SPKOUTL_ENABLE_DONE_EINT1 0x0040 -#define MADERA_SPKOUTL_ENABLE_DONE_EINT1_MASK 0x0040 -#define MADERA_SPKOUTL_ENABLE_DONE_EINT1_SHIFT 6 -#define MADERA_SPKOUTL_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP3R_ENABLE_DONE_EINT1 0x0020 -#define MADERA_HP3R_ENABLE_DONE_EINT1_MASK 0x0020 -#define MADERA_HP3R_ENABLE_DONE_EINT1_SHIFT 5 -#define MADERA_HP3R_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP3L_ENABLE_DONE_EINT1 0x0010 -#define MADERA_HP3L_ENABLE_DONE_EINT1_MASK 0x0010 -#define MADERA_HP3L_ENABLE_DONE_EINT1_SHIFT 4 -#define MADERA_HP3L_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP2R_ENABLE_DONE_EINT1 0x0008 -#define MADERA_HP2R_ENABLE_DONE_EINT1_MASK 0x0008 -#define MADERA_HP2R_ENABLE_DONE_EINT1_SHIFT 3 -#define MADERA_HP2R_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP2L_ENABLE_DONE_EINT1 0x0004 -#define MADERA_HP2L_ENABLE_DONE_EINT1_MASK 0x0004 -#define MADERA_HP2L_ENABLE_DONE_EINT1_SHIFT 2 -#define MADERA_HP2L_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP1R_ENABLE_DONE_EINT1 0x0002 -#define MADERA_HP1R_ENABLE_DONE_EINT1_MASK 0x0002 -#define MADERA_HP1R_ENABLE_DONE_EINT1_SHIFT 1 -#define MADERA_HP1R_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP1L_ENABLE_DONE_EINT1 0x0001 -#define MADERA_HP1L_ENABLE_DONE_EINT1_MASK 0x0001 -#define MADERA_HP1L_ENABLE_DONE_EINT1_SHIFT 0 -#define MADERA_HP1L_ENABLE_DONE_EINT1_WIDTH 1 - -/* (0x180D) IRQ1_Status_14 */ -#define MADERA_SPKOUTR_DISABLE_DONE_EINT1 0x0080 -#define MADERA_SPKOUTR_DISABLE_DONE_EINT1_MASK 0x0080 -#define MADERA_SPKOUTR_DISABLE_DONE_EINT1_SHIFT 7 -#define MADERA_SPKOUTR_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_SPKOUTL_DISABLE_DONE_EINT1 0x0040 -#define MADERA_SPKOUTL_DISABLE_DONE_EINT1_MASK 0x0040 -#define MADERA_SPKOUTL_DISABLE_DONE_EINT1_SHIFT 6 -#define MADERA_SPKOUTL_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP3R_DISABLE_DONE_EINT1 0x0020 -#define MADERA_HP3R_DISABLE_DONE_EINT1_MASK 0x0020 -#define MADERA_HP3R_DISABLE_DONE_EINT1_SHIFT 5 -#define MADERA_HP3R_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP3L_DISABLE_DONE_EINT1 0x0010 -#define MADERA_HP3L_DISABLE_DONE_EINT1_MASK 0x0010 -#define MADERA_HP3L_DISABLE_DONE_EINT1_SHIFT 4 -#define MADERA_HP3L_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP2R_DISABLE_DONE_EINT1 0x0008 -#define MADERA_HP2R_DISABLE_DONE_EINT1_MASK 0x0008 -#define MADERA_HP2R_DISABLE_DONE_EINT1_SHIFT 3 -#define MADERA_HP2R_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP2L_DISABLE_DONE_EINT1 0x0004 -#define MADERA_HP2L_DISABLE_DONE_EINT1_MASK 0x0004 -#define MADERA_HP2L_DISABLE_DONE_EINT1_SHIFT 2 -#define MADERA_HP2L_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP1R_DISABLE_DONE_EINT1 0x0002 -#define MADERA_HP1R_DISABLE_DONE_EINT1_MASK 0x0002 -#define MADERA_HP1R_DISABLE_DONE_EINT1_SHIFT 1 -#define MADERA_HP1R_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_HP1L_DISABLE_DONE_EINT1 0x0001 -#define MADERA_HP1L_DISABLE_DONE_EINT1_MASK 0x0001 -#define MADERA_HP1L_DISABLE_DONE_EINT1_SHIFT 0 -#define MADERA_HP1L_DISABLE_DONE_EINT1_WIDTH 1 - -/* (0x180E) IRQ1_Status_15 */ -#define MADERA_SPK_OVERHEAT_WARN_EINT1 0x0004 -#define MADERA_SPK_OVERHEAT_WARN_EINT1_MASK 0x0004 -#define MADERA_SPK_OVERHEAT_WARN_EINT1_SHIFT 2 -#define MADERA_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 -#define MADERA_SPK_OVERHEAT_EINT1 0x0002 -#define MADERA_SPK_OVERHEAT_EINT1_MASK 0x0002 -#define MADERA_SPK_OVERHEAT_EINT1_SHIFT 1 -#define MADERA_SPK_OVERHEAT_EINT1_WIDTH 1 -#define MADERA_SPK_SHUTDOWN_EINT1 0x0001 -#define MADERA_SPK_SHUTDOWN_EINT1_MASK 0x0001 -#define MADERA_SPK_SHUTDOWN_EINT1_SHIFT 0 -#define MADERA_SPK_SHUTDOWN_EINT1_WIDTH 1 - -/* (0x1820) - IRQ1 Status 33 */ -#define MADERA_ADSP_ERROR_STATUS_DSP7 0x0040 -#define MADERA_ADSP_ERROR_STATUS_DSP7_MASK 0x0040 -#define MADERA_ADSP_ERROR_STATUS_DSP7_SHIFT 6 -#define MADERA_ADSP_ERROR_STATUS_DSP7_WIDTH 1 -#define MADERA_ADSP_ERROR_STATUS_DSP6 0x0020 -#define MADERA_ADSP_ERROR_STATUS_DSP6_MASK 0x0020 -#define MADERA_ADSP_ERROR_STATUS_DSP6_SHIFT 5 -#define MADERA_ADSP_ERROR_STATUS_DSP6_WIDTH 1 -#define MADERA_ADSP_ERROR_STATUS_DSP5 0x0010 -#define MADERA_ADSP_ERROR_STATUS_DSP5_MASK 0x0010 -#define MADERA_ADSP_ERROR_STATUS_DSP5_SHIFT 4 -#define MADERA_ADSP_ERROR_STATUS_DSP5_WIDTH 1 -#define MADERA_ADSP_ERROR_STATUS_DSP4 0x0008 -#define MADERA_ADSP_ERROR_STATUS_DSP4_MASK 0x0008 -#define MADERA_ADSP_ERROR_STATUS_DSP4_SHIFT 3 -#define MADERA_ADSP_ERROR_STATUS_DSP4_WIDTH 1 -#define MADERA_ADSP_ERROR_STATUS_DSP3 0x0004 -#define MADERA_ADSP_ERROR_STATUS_DSP3_MASK 0x0004 -#define MADERA_ADSP_ERROR_STATUS_DSP3_SHIFT 2 -#define MADERA_ADSP_ERROR_STATUS_DSP3_WIDTH 1 -#define MADERA_ADSP_ERROR_STATUS_DSP2 0x0002 -#define MADERA_ADSP_ERROR_STATUS_DSP2_MASK 0x0002 -#define MADERA_ADSP_ERROR_STATUS_DSP2_SHIFT 1 -#define MADERA_ADSP_ERROR_STATUS_DSP2_WIDTH 1 -#define MADERA_ADSP_ERROR_STATUS_DSP1 0x0001 -#define MADERA_ADSP_ERROR_STATUS_DSP1_MASK 0x0001 -#define MADERA_ADSP_ERROR_STATUS_DSP1_SHIFT 0 -#define MADERA_ADSP_ERROR_STATUS_DSP1_WIDTH 1 - -/* (0x1840) IRQ1_Mask_1 */ -#define MADERA_IM_DSP_SHARED_WR_COLL_EINT1 0x8000 -#define MADERA_IM_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 -#define MADERA_IM_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 -#define MADERA_IM_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 -#define MADERA_IM_CTRLIF_ERR_EINT1 0x1000 -#define MADERA_IM_CTRLIF_ERR_EINT1_MASK 0x1000 -#define MADERA_IM_CTRLIF_ERR_EINT1_SHIFT 12 -#define MADERA_IM_CTRLIF_ERR_EINT1_WIDTH 1 -#define MADERA_IM_SYSCLK_FAIL_EINT1 0x0200 -#define MADERA_IM_SYSCLK_FAIL_EINT1_MASK 0x0200 -#define MADERA_IM_SYSCLK_FAIL_EINT1_SHIFT 9 -#define MADERA_IM_SYSCLK_FAIL_EINT1_WIDTH 1 -#define MADERA_IM_CLOCK_DETECT_EINT1 0x0100 -#define MADERA_IM_CLOCK_DETECT_EINT1_MASK 0x0100 -#define MADERA_IM_CLOCK_DETECT_EINT1_SHIFT 8 -#define MADERA_IM_CLOCK_DETECT_EINT1_WIDTH 1 -#define MADERA_IM_BOOT_DONE_EINT1 0x0080 -#define MADERA_IM_BOOT_DONE_EINT1_MASK 0x0080 -#define MADERA_IM_BOOT_DONE_EINT1_SHIFT 7 -#define MADERA_IM_BOOT_DONE_EINT1_WIDTH 1 - -/* (0x1841) IRQ1_Mask_2 */ -#define MADERA_IM_FLL3_LOCK_EINT1 0x0400 -#define MADERA_IM_FLL3_LOCK_EINT1_MASK 0x0400 -#define MADERA_IM_FLL3_LOCK_EINT1_SHIFT 10 -#define MADERA_IM_FLL3_LOCK_EINT1_WIDTH 1 -#define MADERA_IM_FLL2_LOCK_EINT1 0x0200 -#define MADERA_IM_FLL2_LOCK_EINT1_MASK 0x0200 -#define MADERA_IM_FLL2_LOCK_EINT1_SHIFT 9 -#define MADERA_IM_FLL2_LOCK_EINT1_WIDTH 1 -#define MADERA_IM_FLL1_LOCK_EINT1 0x0100 -#define MADERA_IM_FLL1_LOCK_EINT1_MASK 0x0100 -#define MADERA_IM_FLL1_LOCK_EINT1_SHIFT 8 -#define MADERA_IM_FLL1_LOCK_EINT1_WIDTH 1 - -/* (0x1845) IRQ1_Mask_6 */ -#define MADERA_IM_MICDET2_EINT1 0x0200 -#define MADERA_IM_MICDET2_EINT1_MASK 0x0200 -#define MADERA_IM_MICDET2_EINT1_SHIFT 9 -#define MADERA_IM_MICDET2_EINT1_WIDTH 1 -#define MADERA_IM_MICDET1_EINT1 0x0100 -#define MADERA_IM_MICDET1_EINT1_MASK 0x0100 -#define MADERA_IM_MICDET1_EINT1_SHIFT 8 -#define MADERA_IM_MICDET1_EINT1_WIDTH 1 -#define MADERA_IM_HPDET_EINT1 0x0001 -#define MADERA_IM_HPDET_EINT1_MASK 0x0001 -#define MADERA_IM_HPDET_EINT1_SHIFT 0 -#define MADERA_IM_HPDET_EINT1_WIDTH 1 - -/* (0x1846) IRQ1_Mask_7 */ -#define MADERA_IM_MICD_CLAMP_FALL_EINT1 0x0020 -#define MADERA_IM_MICD_CLAMP_FALL_EINT1_MASK 0x0020 -#define MADERA_IM_MICD_CLAMP_FALL_EINT1_SHIFT 5 -#define MADERA_IM_MICD_CLAMP_FALL_EINT1_WIDTH 1 -#define MADERA_IM_MICD_CLAMP_RISE_EINT1 0x0010 -#define MADERA_IM_MICD_CLAMP_RISE_EINT1_MASK 0x0010 -#define MADERA_IM_MICD_CLAMP_RISE_EINT1_SHIFT 4 -#define MADERA_IM_MICD_CLAMP_RISE_EINT1_WIDTH 1 -#define MADERA_IM_JD2_FALL_EINT1 0x0008 -#define MADERA_IM_JD2_FALL_EINT1_MASK 0x0008 -#define MADERA_IM_JD2_FALL_EINT1_SHIFT 3 -#define MADERA_IM_JD2_FALL_EINT1_WIDTH 1 -#define MADERA_IM_JD2_RISE_EINT1 0x0004 -#define MADERA_IM_JD2_RISE_EINT1_MASK 0x0004 -#define MADERA_IM_JD2_RISE_EINT1_SHIFT 2 -#define MADERA_IM_JD2_RISE_EINT1_WIDTH 1 -#define MADERA_IM_JD1_FALL_EINT1 0x0002 -#define MADERA_IM_JD1_FALL_EINT1_MASK 0x0002 -#define MADERA_IM_JD1_FALL_EINT1_SHIFT 1 -#define MADERA_IM_JD1_FALL_EINT1_WIDTH 1 -#define MADERA_IM_JD1_RISE_EINT1 0x0001 -#define MADERA_IM_JD1_RISE_EINT1_MASK 0x0001 -#define MADERA_IM_JD1_RISE_EINT1_SHIFT 0 -#define MADERA_IM_JD1_RISE_EINT1_WIDTH 1 - -/* (0x1848) IRQ1_Mask_9 */ -#define MADERA_IM_ASRC2_IN2_LOCK_EINT1 0x0800 -#define MADERA_IM_ASRC2_IN2_LOCK_EINT1_MASK 0x0800 -#define MADERA_IM_ASRC2_IN2_LOCK_EINT1_SHIFT 11 -#define MADERA_IM_ASRC2_IN2_LOCK_EINT1_WIDTH 1 -#define MADERA_IM_ASRC2_IN1_LOCK_EINT1 0x0400 -#define MADERA_IM_ASRC2_IN1_LOCK_EINT1_MASK 0x0400 -#define MADERA_IM_ASRC2_IN1_LOCK_EINT1_SHIFT 10 -#define MADERA_IM_ASRC2_IN1_LOCK_EINT1_WIDTH 1 -#define MADERA_IM_ASRC1_IN2_LOCK_EINT1 0x0200 -#define MADERA_IM_ASRC1_IN2_LOCK_EINT1_MASK 0x0200 -#define MADERA_IM_ASRC1_IN2_LOCK_EINT1_SHIFT 9 -#define MADERA_IM_ASRC1_IN2_LOCK_EINT1_WIDTH 1 -#define MADERA_IM_ASRC1_IN1_LOCK_EINT1 0x0100 -#define MADERA_IM_ASRC1_IN1_LOCK_EINT1_MASK 0x0100 -#define MADERA_IM_ASRC1_IN1_LOCK_EINT1_SHIFT 8 -#define MADERA_IM_ASRC1_IN1_LOCK_EINT1_WIDTH 1 -#define MADERA_IM_DRC2_SIG_DET_EINT1 0x0002 -#define MADERA_IM_DRC2_SIG_DET_EINT1_MASK 0x0002 -#define MADERA_IM_DRC2_SIG_DET_EINT1_SHIFT 1 -#define MADERA_IM_DRC2_SIG_DET_EINT1_WIDTH 1 -#define MADERA_IM_DRC1_SIG_DET_EINT1 0x0001 -#define MADERA_IM_DRC1_SIG_DET_EINT1_MASK 0x0001 -#define MADERA_IM_DRC1_SIG_DET_EINT1_SHIFT 0 -#define MADERA_IM_DRC1_SIG_DET_EINT1_WIDTH 1 - -/* (0x184A) IRQ1_Mask_11 */ -#define MADERA_IM_DSP_IRQ16_EINT1 0x8000 -#define MADERA_IM_DSP_IRQ16_EINT1_MASK 0x8000 -#define MADERA_IM_DSP_IRQ16_EINT1_SHIFT 15 -#define MADERA_IM_DSP_IRQ16_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ15_EINT1 0x4000 -#define MADERA_IM_DSP_IRQ15_EINT1_MASK 0x4000 -#define MADERA_IM_DSP_IRQ15_EINT1_SHIFT 14 -#define MADERA_IM_DSP_IRQ15_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ14_EINT1 0x2000 -#define MADERA_IM_DSP_IRQ14_EINT1_MASK 0x2000 -#define MADERA_IM_DSP_IRQ14_EINT1_SHIFT 13 -#define MADERA_IM_DSP_IRQ14_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ13_EINT1 0x1000 -#define MADERA_IM_DSP_IRQ13_EINT1_MASK 0x1000 -#define MADERA_IM_DSP_IRQ13_EINT1_SHIFT 12 -#define MADERA_IM_DSP_IRQ13_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ12_EINT1 0x0800 -#define MADERA_IM_DSP_IRQ12_EINT1_MASK 0x0800 -#define MADERA_IM_DSP_IRQ12_EINT1_SHIFT 11 -#define MADERA_IM_DSP_IRQ12_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ11_EINT1 0x0400 -#define MADERA_IM_DSP_IRQ11_EINT1_MASK 0x0400 -#define MADERA_IM_DSP_IRQ11_EINT1_SHIFT 10 -#define MADERA_IM_DSP_IRQ11_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ10_EINT1 0x0200 -#define MADERA_IM_DSP_IRQ10_EINT1_MASK 0x0200 -#define MADERA_IM_DSP_IRQ10_EINT1_SHIFT 9 -#define MADERA_IM_DSP_IRQ10_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ9_EINT1 0x0100 -#define MADERA_IM_DSP_IRQ9_EINT1_MASK 0x0100 -#define MADERA_IM_DSP_IRQ9_EINT1_SHIFT 8 -#define MADERA_IM_DSP_IRQ9_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ8_EINT1 0x0080 -#define MADERA_IM_DSP_IRQ8_EINT1_MASK 0x0080 -#define MADERA_IM_DSP_IRQ8_EINT1_SHIFT 7 -#define MADERA_IM_DSP_IRQ8_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ7_EINT1 0x0040 -#define MADERA_IM_DSP_IRQ7_EINT1_MASK 0x0040 -#define MADERA_IM_DSP_IRQ7_EINT1_SHIFT 6 -#define MADERA_IM_DSP_IRQ7_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ6_EINT1 0x0020 -#define MADERA_IM_DSP_IRQ6_EINT1_MASK 0x0020 -#define MADERA_IM_DSP_IRQ6_EINT1_SHIFT 5 -#define MADERA_IM_DSP_IRQ6_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ5_EINT1 0x0010 -#define MADERA_IM_DSP_IRQ5_EINT1_MASK 0x0010 -#define MADERA_IM_DSP_IRQ5_EINT1_SHIFT 4 -#define MADERA_IM_DSP_IRQ5_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ4_EINT1 0x0008 -#define MADERA_IM_DSP_IRQ4_EINT1_MASK 0x0008 -#define MADERA_IM_DSP_IRQ4_EINT1_SHIFT 3 -#define MADERA_IM_DSP_IRQ4_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ3_EINT1 0x0004 -#define MADERA_IM_DSP_IRQ3_EINT1_MASK 0x0004 -#define MADERA_IM_DSP_IRQ3_EINT1_SHIFT 2 -#define MADERA_IM_DSP_IRQ3_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ2_EINT1 0x0002 -#define MADERA_IM_DSP_IRQ2_EINT1_MASK 0x0002 -#define MADERA_IM_DSP_IRQ2_EINT1_SHIFT 1 -#define MADERA_IM_DSP_IRQ2_EINT1_WIDTH 1 -#define MADERA_IM_DSP_IRQ1_EINT1 0x0001 -#define MADERA_IM_DSP_IRQ1_EINT1_MASK 0x0001 -#define MADERA_IM_DSP_IRQ1_EINT1_SHIFT 0 -#define MADERA_IM_DSP_IRQ1_EINT1_WIDTH 1 - -/* (0x184B) IRQ1_Mask_12 */ -#define MADERA_IM_SPKOUTR_SC_EINT1 0x0080 -#define MADERA_IM_SPKOUTR_SC_EINT1_MASK 0x0080 -#define MADERA_IM_SPKOUTR_SC_EINT1_SHIFT 7 -#define MADERA_IM_SPKOUTR_SC_EINT1_WIDTH 1 -#define MADERA_IM_SPKOUTL_SC_EINT1 0x0040 -#define MADERA_IM_SPKOUTL_SC_EINT1_MASK 0x0040 -#define MADERA_IM_SPKOUTL_SC_EINT1_SHIFT 6 -#define MADERA_IM_SPKOUTL_SC_EINT1_WIDTH 1 -#define MADERA_IM_HP3R_SC_EINT1 0x0020 -#define MADERA_IM_HP3R_SC_EINT1_MASK 0x0020 -#define MADERA_IM_HP3R_SC_EINT1_SHIFT 5 -#define MADERA_IM_HP3R_SC_EINT1_WIDTH 1 -#define MADERA_IM_HP3L_SC_EINT1 0x0010 -#define MADERA_IM_HP3L_SC_EINT1_MASK 0x0010 -#define MADERA_IM_HP3L_SC_EINT1_SHIFT 4 -#define MADERA_IM_HP3L_SC_EINT1_WIDTH 1 -#define MADERA_IM_HP2R_SC_EINT1 0x0008 -#define MADERA_IM_HP2R_SC_EINT1_MASK 0x0008 -#define MADERA_IM_HP2R_SC_EINT1_SHIFT 3 -#define MADERA_IM_HP2R_SC_EINT1_WIDTH 1 -#define MADERA_IM_HP2L_SC_EINT1 0x0004 -#define MADERA_IM_HP2L_SC_EINT1_MASK 0x0004 -#define MADERA_IM_HP2L_SC_EINT1_SHIFT 2 -#define MADERA_IM_HP2L_SC_EINT1_WIDTH 1 -#define MADERA_IM_HP1R_SC_EINT1 0x0002 -#define MADERA_IM_HP1R_SC_EINT1_MASK 0x0002 -#define MADERA_IM_HP1R_SC_EINT1_SHIFT 1 -#define MADERA_IM_HP1R_SC_EINT1_WIDTH 1 -#define MADERA_IM_HP1L_SC_EINT1 0x0001 -#define MADERA_IM_HP1L_SC_EINT1_MASK 0x0001 -#define MADERA_IM_HP1L_SC_EINT1_SHIFT 0 -#define MADERA_IM_HP1L_SC_EINT1_WIDTH 1 - -/* (0x184C) IRQ1_Mask_13 */ -#define MADERA_IM_SPKOUTR_ENABLE_DONE_EINT1 0x0080 -#define MADERA_IM_SPKOUTR_ENABLE_DONE_EINT1_MASK 0x0080 -#define MADERA_IM_SPKOUTR_ENABLE_DONE_EINT1_SHIFT 7 -#define MADERA_IM_SPKOUTR_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_SPKOUTL_ENABLE_DONE_EINT1 0x0040 -#define MADERA_IM_SPKOUTL_ENABLE_DONE_EINT1_MASK 0x0040 -#define MADERA_IM_SPKOUTL_ENABLE_DONE_EINT1_SHIFT 6 -#define MADERA_IM_SPKOUTL_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP3R_ENABLE_DONE_EINT1 0x0020 -#define MADERA_IM_HP3R_ENABLE_DONE_EINT1_MASK 0x0020 -#define MADERA_IM_HP3R_ENABLE_DONE_EINT1_SHIFT 5 -#define MADERA_IM_HP3R_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP3L_ENABLE_DONE_EINT1 0x0010 -#define MADERA_IM_HP3L_ENABLE_DONE_EINT1_MASK 0x0010 -#define MADERA_IM_HP3L_ENABLE_DONE_EINT1_SHIFT 4 -#define MADERA_IM_HP3L_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP2R_ENABLE_DONE_EINT1 0x0008 -#define MADERA_IM_HP2R_ENABLE_DONE_EINT1_MASK 0x0008 -#define MADERA_IM_HP2R_ENABLE_DONE_EINT1_SHIFT 3 -#define MADERA_IM_HP2R_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP2L_ENABLE_DONE_EINT1 0x0004 -#define MADERA_IM_HP2L_ENABLE_DONE_EINT1_MASK 0x0004 -#define MADERA_IM_HP2L_ENABLE_DONE_EINT1_SHIFT 2 -#define MADERA_IM_HP2L_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP1R_ENABLE_DONE_EINT1 0x0002 -#define MADERA_IM_HP1R_ENABLE_DONE_EINT1_MASK 0x0002 -#define MADERA_IM_HP1R_ENABLE_DONE_EINT1_SHIFT 1 -#define MADERA_IM_HP1R_ENABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP1L_ENABLE_DONE_EINT1 0x0001 -#define MADERA_IM_HP1L_ENABLE_DONE_EINT1_MASK 0x0001 -#define MADERA_IM_HP1L_ENABLE_DONE_EINT1_SHIFT 0 -#define MADERA_IM_HP1L_ENABLE_DONE_EINT1_WIDTH 1 - -/* (0x184D) IRQ1_Mask_14 */ -#define MADERA_IM_SPKOUTR_DISABLE_DONE_EINT1 0x0080 -#define MADERA_IM_SPKOUTR_DISABLE_DONE_EINT1_MASK 0x0080 -#define MADERA_IM_SPKOUTR_DISABLE_DONE_EINT1_SHIFT 7 -#define MADERA_IM_SPKOUTR_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_SPKOUTL_DISABLE_DONE_EINT1 0x0040 -#define MADERA_IM_SPKOUTL_DISABLE_DONE_EINT1_MASK 0x0040 -#define MADERA_IM_SPKOUTL_DISABLE_DONE_EINT1_SHIFT 6 -#define MADERA_IM_SPKOUTL_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP3R_DISABLE_DONE_EINT1 0x0020 -#define MADERA_IM_HP3R_DISABLE_DONE_EINT1_MASK 0x0020 -#define MADERA_IM_HP3R_DISABLE_DONE_EINT1_SHIFT 5 -#define MADERA_IM_HP3R_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP3L_DISABLE_DONE_EINT1 0x0010 -#define MADERA_IM_HP3L_DISABLE_DONE_EINT1_MASK 0x0010 -#define MADERA_IM_HP3L_DISABLE_DONE_EINT1_SHIFT 4 -#define MADERA_IM_HP3L_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP2R_DISABLE_DONE_EINT1 0x0008 -#define MADERA_IM_HP2R_DISABLE_DONE_EINT1_MASK 0x0008 -#define MADERA_IM_HP2R_DISABLE_DONE_EINT1_SHIFT 3 -#define MADERA_IM_HP2R_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP2L_DISABLE_DONE_EINT1 0x0004 -#define MADERA_IM_HP2L_DISABLE_DONE_EINT1_MASK 0x0004 -#define MADERA_IM_HP2L_DISABLE_DONE_EINT1_SHIFT 2 -#define MADERA_IM_HP2L_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP1R_DISABLE_DONE_EINT1 0x0002 -#define MADERA_IM_HP1R_DISABLE_DONE_EINT1_MASK 0x0002 -#define MADERA_IM_HP1R_DISABLE_DONE_EINT1_SHIFT 1 -#define MADERA_IM_HP1R_DISABLE_DONE_EINT1_WIDTH 1 -#define MADERA_IM_HP1L_DISABLE_DONE_EINT1 0x0001 -#define MADERA_IM_HP1L_DISABLE_DONE_EINT1_MASK 0x0001 -#define MADERA_IM_HP1L_DISABLE_DONE_EINT1_SHIFT 0 -#define MADERA_IM_HP1L_DISABLE_DONE_EINT1_WIDTH 1 - -/* (0x184E) IRQ1_Mask_15 */ -#define MADERA_IM_SPK_OVERHEAT_WARN_EINT1 0x0004 -#define MADERA_IM_SPK_OVERHEAT_WARN_EINT1_MASK 0x0004 -#define MADERA_IM_SPK_OVERHEAT_WARN_EINT1_SHIFT 2 -#define MADERA_IM_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 -#define MADERA_IM_SPK_OVERHEAT_EINT1 0x0002 -#define MADERA_IM_SPK_OVERHEAT_EINT1_MASK 0x0002 -#define MADERA_IM_SPK_OVERHEAT_EINT1_SHIFT 1 -#define MADERA_IM_SPK_OVERHEAT_EINT1_WIDTH 1 -#define MADERA_IM_SPK_SHUTDOWN_EINT1 0x0001 -#define MADERA_IM_SPK_SHUTDOWN_EINT1_MASK 0x0001 -#define MADERA_IM_SPK_SHUTDOWN_EINT1_SHIFT 0 -#define MADERA_IM_SPK_SHUTDOWN_EINT1_WIDTH 1 - -/* (0x1880) - IRQ1 Raw Status 1 */ -#define MADERA_DSP_SHARED_WR_COLL_STS1 0x8000 -#define MADERA_DSP_SHARED_WR_COLL_STS1_MASK 0x8000 -#define MADERA_DSP_SHARED_WR_COLL_STS1_SHIFT 15 -#define MADERA_DSP_SHARED_WR_COLL_STS1_WIDTH 1 -#define MADERA_CTRLIF_ERR_STS1 0x1000 -#define MADERA_CTRLIF_ERR_STS1_MASK 0x1000 -#define MADERA_CTRLIF_ERR_STS1_SHIFT 12 -#define MADERA_CTRLIF_ERR_STS1_WIDTH 1 -#define MADERA_SYSCLK_FAIL_STS1 0x0200 -#define MADERA_SYSCLK_FAIL_STS1_MASK 0x0200 -#define MADERA_SYSCLK_FAIL_STS1_SHIFT 9 -#define MADERA_SYSCLK_FAIL_STS1_WIDTH 1 -#define MADERA_CLOCK_DETECT_STS1 0x0100 -#define MADERA_CLOCK_DETECT_STS1_MASK 0x0100 -#define MADERA_CLOCK_DETECT_STS1_SHIFT 8 -#define MADERA_CLOCK_DETECT_STS1_WIDTH 1 -#define MADERA_BOOT_DONE_STS1 0x0080 -#define MADERA_BOOT_DONE_STS1_MASK 0x0080 -#define MADERA_BOOT_DONE_STS1_SHIFT 7 -#define MADERA_BOOT_DONE_STS1_WIDTH 1 - -/* (0x1881) - IRQ1 Raw Status 2 */ -#define MADERA_FLL3_LOCK_STS1 0x0400 -#define MADERA_FLL3_LOCK_STS1_MASK 0x0400 -#define MADERA_FLL3_LOCK_STS1_SHIFT 10 -#define MADERA_FLL3_LOCK_STS1_WIDTH 1 -#define MADERA_FLL2_LOCK_STS1 0x0200 -#define MADERA_FLL2_LOCK_STS1_MASK 0x0200 -#define MADERA_FLL2_LOCK_STS1_SHIFT 9 -#define MADERA_FLL2_LOCK_STS1_WIDTH 1 -#define MADERA_FLL1_LOCK_STS1 0x0100 -#define MADERA_FLL1_LOCK_STS1_MASK 0x0100 -#define MADERA_FLL1_LOCK_STS1_SHIFT 8 -#define MADERA_FLL1_LOCK_STS1_WIDTH 1 - -/* (0x1886) - IRQ1 Raw Status 7 */ -#define MADERA_MICD_CLAMP_FALL_STS1 0x0020 -#define MADERA_MICD_CLAMP_FALL_STS1_MASK 0x0020 -#define MADERA_MICD_CLAMP_FALL_STS1_SHIFT 5 -#define MADERA_MICD_CLAMP_FALL_STS1_WIDTH 1 -#define MADERA_MICD_CLAMP_RISE_STS1 0x0010 -#define MADERA_MICD_CLAMP_RISE_STS1_MASK 0x0010 -#define MADERA_MICD_CLAMP_RISE_STS1_SHIFT 4 -#define MADERA_MICD_CLAMP_RISE_STS1_WIDTH 1 -#define MADERA_JD2_FALL_STS1 0x0008 -#define MADERA_JD2_FALL_STS1_MASK 0x0008 -#define MADERA_JD2_FALL_STS1_SHIFT 3 -#define MADERA_JD2_FALL_STS1_WIDTH 1 -#define MADERA_JD2_RISE_STS1 0x0004 -#define MADERA_JD2_RISE_STS1_MASK 0x0004 -#define MADERA_JD2_RISE_STS1_SHIFT 2 -#define MADERA_JD2_RISE_STS1_WIDTH 1 -#define MADERA_JD1_FALL_STS1 0x0002 -#define MADERA_JD1_FALL_STS1_MASK 0x0002 -#define MADERA_JD1_FALL_STS1_SHIFT 1 -#define MADERA_JD1_FALL_STS1_WIDTH 1 -#define MADERA_JD1_RISE_STS1 0x0001 -#define MADERA_JD1_RISE_STS1_MASK 0x0001 -#define MADERA_JD1_RISE_STS1_SHIFT 0 -#define MADERA_JD1_RISE_STS1_WIDTH 1 - -/* (0x1888) - IRQ1 Raw Status 9 */ -#define MADERA_ASRC2_IN2_LOCK_STS1 0x0800 -#define MADERA_ASRC2_IN2_LOCK_STS1_MASK 0x0800 -#define MADERA_ASRC2_IN2_LOCK_STS1_SHIFT 11 -#define MADERA_ASRC2_IN2_LOCK_STS1_WIDTH 1 -#define MADERA_ASRC2_IN1_LOCK_STS1 0x0400 -#define MADERA_ASRC2_IN1_LOCK_STS1_MASK 0x0400 -#define MADERA_ASRC2_IN1_LOCK_STS1_SHIFT 10 -#define MADERA_ASRC2_IN1_LOCK_STS1_WIDTH 1 -#define MADERA_ASRC1_IN2_LOCK_STS1 0x0200 -#define MADERA_ASRC1_IN2_LOCK_STS1_MASK 0x0200 -#define MADERA_ASRC1_IN2_LOCK_STS1_SHIFT 9 -#define MADERA_ASRC1_IN2_LOCK_STS1_WIDTH 1 -#define MADERA_ASRC1_IN1_LOCK_STS1 0x0100 -#define MADERA_ASRC1_IN1_LOCK_STS1_MASK 0x0100 -#define MADERA_ASRC1_IN1_LOCK_STS1_SHIFT 8 -#define MADERA_ASRC1_IN1_LOCK_STS1_WIDTH 1 -#define MADERA_DRC2_SIG_DET_STS1 0x0002 -#define MADERA_DRC2_SIG_DET_STS1_MASK 0x0002 -#define MADERA_DRC2_SIG_DET_STS1_SHIFT 1 -#define MADERA_DRC2_SIG_DET_STS1_WIDTH 1 -#define MADERA_DRC1_SIG_DET_STS1 0x0001 -#define MADERA_DRC1_SIG_DET_STS1_MASK 0x0001 -#define MADERA_DRC1_SIG_DET_STS1_SHIFT 0 -#define MADERA_DRC1_SIG_DET_STS1_WIDTH 1 - -/* (0x188A) - IRQ1 Raw Status 11 */ -#define MADERA_DSP_IRQ16_STS1 0x8000 -#define MADERA_DSP_IRQ16_STS1_MASK 0x8000 -#define MADERA_DSP_IRQ16_STS1_SHIFT 15 -#define MADERA_DSP_IRQ16_STS1_WIDTH 1 -#define MADERA_DSP_IRQ15_STS1 0x4000 -#define MADERA_DSP_IRQ15_STS1_MASK 0x4000 -#define MADERA_DSP_IRQ15_STS1_SHIFT 14 -#define MADERA_DSP_IRQ15_STS1_WIDTH 1 -#define MADERA_DSP_IRQ14_STS1 0x2000 -#define MADERA_DSP_IRQ14_STS1_MASK 0x2000 -#define MADERA_DSP_IRQ14_STS1_SHIFT 13 -#define MADERA_DSP_IRQ14_STS1_WIDTH 1 -#define MADERA_DSP_IRQ13_STS1 0x1000 -#define MADERA_DSP_IRQ13_STS1_MASK 0x1000 -#define MADERA_DSP_IRQ13_STS1_SHIFT 12 -#define MADERA_DSP_IRQ13_STS1_WIDTH 1 -#define MADERA_DSP_IRQ12_STS1 0x0800 -#define MADERA_DSP_IRQ12_STS1_MASK 0x0800 -#define MADERA_DSP_IRQ12_STS1_SHIFT 11 -#define MADERA_DSP_IRQ12_STS1_WIDTH 1 -#define MADERA_DSP_IRQ11_STS1 0x0400 -#define MADERA_DSP_IRQ11_STS1_MASK 0x0400 -#define MADERA_DSP_IRQ11_STS1_SHIFT 10 -#define MADERA_DSP_IRQ11_STS1_WIDTH 1 -#define MADERA_DSP_IRQ10_STS1 0x0200 -#define MADERA_DSP_IRQ10_STS1_MASK 0x0200 -#define MADERA_DSP_IRQ10_STS1_SHIFT 9 -#define MADERA_DSP_IRQ10_STS1_WIDTH 1 -#define MADERA_DSP_IRQ9_STS1 0x0100 -#define MADERA_DSP_IRQ9_STS1_MASK 0x0100 -#define MADERA_DSP_IRQ9_STS1_SHIFT 8 -#define MADERA_DSP_IRQ9_STS1_WIDTH 1 -#define MADERA_DSP_IRQ8_STS1 0x0080 -#define MADERA_DSP_IRQ8_STS1_MASK 0x0080 -#define MADERA_DSP_IRQ8_STS1_SHIFT 7 -#define MADERA_DSP_IRQ8_STS1_WIDTH 1 -#define MADERA_DSP_IRQ7_STS1 0x0040 -#define MADERA_DSP_IRQ7_STS1_MASK 0x0040 -#define MADERA_DSP_IRQ7_STS1_SHIFT 6 -#define MADERA_DSP_IRQ7_STS1_WIDTH 1 -#define MADERA_DSP_IRQ6_STS1 0x0020 -#define MADERA_DSP_IRQ6_STS1_MASK 0x0020 -#define MADERA_DSP_IRQ6_STS1_SHIFT 5 -#define MADERA_DSP_IRQ6_STS1_WIDTH 1 -#define MADERA_DSP_IRQ5_STS1 0x0010 -#define MADERA_DSP_IRQ5_STS1_MASK 0x0010 -#define MADERA_DSP_IRQ5_STS1_SHIFT 4 -#define MADERA_DSP_IRQ5_STS1_WIDTH 1 -#define MADERA_DSP_IRQ4_STS1 0x0008 -#define MADERA_DSP_IRQ4_STS1_MASK 0x0008 -#define MADERA_DSP_IRQ4_STS1_SHIFT 3 -#define MADERA_DSP_IRQ4_STS1_WIDTH 1 -#define MADERA_DSP_IRQ3_STS1 0x0004 -#define MADERA_DSP_IRQ3_STS1_MASK 0x0004 -#define MADERA_DSP_IRQ3_STS1_SHIFT 2 -#define MADERA_DSP_IRQ3_STS1_WIDTH 1 -#define MADERA_DSP_IRQ2_STS1 0x0002 -#define MADERA_DSP_IRQ2_STS1_MASK 0x0002 -#define MADERA_DSP_IRQ2_STS1_SHIFT 1 -#define MADERA_DSP_IRQ2_STS1_WIDTH 1 -#define MADERA_DSP_IRQ1_STS1 0x0001 -#define MADERA_DSP_IRQ1_STS1_MASK 0x0001 -#define MADERA_DSP_IRQ1_STS1_SHIFT 0 -#define MADERA_DSP_IRQ1_STS1_WIDTH 1 - - -/* (0x188B) - IRQ1 Raw Status 12 */ -#define MADERA_SPKOUTR_SC_STS1 0x0080 -#define MADERA_SPKOUTR_SC_STS1_MASK 0x0080 -#define MADERA_SPKOUTR_SC_STS1_SHIFT 7 -#define MADERA_SPKOUTR_SC_STS1_WIDTH 1 -#define MADERA_SPKOUTL_SC_STS1 0x0040 -#define MADERA_SPKOUTL_SC_STS1_MASK 0x0040 -#define MADERA_SPKOUTL_SC_STS1_SHIFT 6 -#define MADERA_SPKOUTL_SC_STS1_WIDTH 1 -#define MADERA_HP3R_SC_STS1 0x0020 -#define MADERA_HP3R_SC_STS1_MASK 0x0020 -#define MADERA_HP3R_SC_STS1_SHIFT 5 -#define MADERA_HP3R_SC_STS1_WIDTH 1 -#define MADERA_HP3L_SC_STS1 0x0010 -#define MADERA_HP3L_SC_STS1_MASK 0x0010 -#define MADERA_HP3L_SC_STS1_SHIFT 4 -#define MADERA_HP3L_SC_STS1_WIDTH 1 -#define MADERA_HP2R_SC_STS1 0x0008 -#define MADERA_HP2R_SC_STS1_MASK 0x0008 -#define MADERA_HP2R_SC_STS1_SHIFT 3 -#define MADERA_HP2R_SC_STS1_WIDTH 1 -#define MADERA_HP2L_SC_STS1 0x0004 -#define MADERA_HP2L_SC_STS1_MASK 0x0004 -#define MADERA_HP2L_SC_STS1_SHIFT 2 -#define MADERA_HP2L_SC_STS1_WIDTH 1 -#define MADERA_HP1R_SC_STS1 0x0002 -#define MADERA_HP1R_SC_STS1_MASK 0x0002 -#define MADERA_HP1R_SC_STS1_SHIFT 1 -#define MADERA_HP1R_SC_STS1_WIDTH 1 -#define MADERA_HP1L_SC_STS1 0x0001 -#define MADERA_HP1L_SC_STS1_MASK 0x0001 -#define MADERA_HP1L_SC_STS1_SHIFT 0 -#define MADERA_HP1L_SC_STS1_WIDTH 1 - -/* (0x188C) - IRQ1 Raw Status 13 */ -#define MADERA_SPKOUTR_ENABLE_DONE_STS1 0x0080 -#define MADERA_SPKOUTR_ENABLE_DONE_STS1_MASK 0x0080 -#define MADERA_SPKOUTR_ENABLE_DONE_STS1_SHIFT 7 -#define MADERA_SPKOUTR_ENABLE_DONE_STS1_WIDTH 1 -#define MADERA_SPKOUTL_ENABLE_DONE_STS1 0x0040 -#define MADERA_SPKOUTL_ENABLE_DONE_STS1_MASK 0x0040 -#define MADERA_SPKOUTL_ENABLE_DONE_STS1_SHIFT 6 -#define MADERA_SPKOUTL_ENABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP3R_ENABLE_DONE_STS1 0x0020 -#define MADERA_HP3R_ENABLE_DONE_STS1_MASK 0x0020 -#define MADERA_HP3R_ENABLE_DONE_STS1_SHIFT 5 -#define MADERA_HP3R_ENABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP3L_ENABLE_DONE_STS1 0x0010 -#define MADERA_HP3L_ENABLE_DONE_STS1_MASK 0x0010 -#define MADERA_HP3L_ENABLE_DONE_STS1_SHIFT 4 -#define MADERA_HP3L_ENABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP2R_ENABLE_DONE_STS1 0x0008 -#define MADERA_HP2R_ENABLE_DONE_STS1_MASK 0x0008 -#define MADERA_HP2R_ENABLE_DONE_STS1_SHIFT 3 -#define MADERA_HP2R_ENABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP2L_ENABLE_DONE_STS1 0x0004 -#define MADERA_HP2L_ENABLE_DONE_STS1_MASK 0x0004 -#define MADERA_HP2L_ENABLE_DONE_STS1_SHIFT 2 -#define MADERA_HP2L_ENABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP1R_ENABLE_DONE_STS1 0x0002 -#define MADERA_HP1R_ENABLE_DONE_STS1_MASK 0x0002 -#define MADERA_HP1R_ENABLE_DONE_STS1_SHIFT 1 -#define MADERA_HP1R_ENABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP1L_ENABLE_DONE_STS1 0x0001 -#define MADERA_HP1L_ENABLE_DONE_STS1_MASK 0x0001 -#define MADERA_HP1L_ENABLE_DONE_STS1_SHIFT 0 -#define MADERA_HP1L_ENABLE_DONE_STS1_WIDTH 1 - -/* (0x188D) - IRQ1 Raw Status 14 */ -#define MADERA_SPKOUTR_DISABLE_DONE_STS1 0x0080 -#define MADERA_SPKOUTR_DISABLE_DONE_STS1_MASK 0x0080 -#define MADERA_SPKOUTR_DISABLE_DONE_STS1_SHIFT 7 -#define MADERA_SPKOUTR_DISABLE_DONE_STS1_WIDTH 1 -#define MADERA_SPKOUTL_DISABLE_DONE_STS1 0x0040 -#define MADERA_SPKOUTL_DISABLE_DONE_STS1_MASK 0x0040 -#define MADERA_SPKOUTL_DISABLE_DONE_STS1_SHIFT 6 -#define MADERA_SPKOUTL_DISABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP3R_DISABLE_DONE_STS1 0x0020 -#define MADERA_HP3R_DISABLE_DONE_STS1_MASK 0x0020 -#define MADERA_HP3R_DISABLE_DONE_STS1_SHIFT 5 -#define MADERA_HP3R_DISABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP3L_DISABLE_DONE_STS1 0x0010 -#define MADERA_HP3L_DISABLE_DONE_STS1_MASK 0x0010 -#define MADERA_HP3L_DISABLE_DONE_STS1_SHIFT 4 -#define MADERA_HP3L_DISABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP2R_DISABLE_DONE_STS1 0x0008 -#define MADERA_HP2R_DISABLE_DONE_STS1_MASK 0x0008 -#define MADERA_HP2R_DISABLE_DONE_STS1_SHIFT 3 -#define MADERA_HP2R_DISABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP2L_DISABLE_DONE_STS1 0x0004 -#define MADERA_HP2L_DISABLE_DONE_STS1_MASK 0x0004 -#define MADERA_HP2L_DISABLE_DONE_STS1_SHIFT 2 -#define MADERA_HP2L_DISABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP1R_DISABLE_DONE_STS1 0x0002 -#define MADERA_HP1R_DISABLE_DONE_STS1_MASK 0x0002 -#define MADERA_HP1R_DISABLE_DONE_STS1_SHIFT 1 -#define MADERA_HP1R_DISABLE_DONE_STS1_WIDTH 1 -#define MADERA_HP1L_DISABLE_DONE_STS1 0x0001 -#define MADERA_HP1L_DISABLE_DONE_STS1_MASK 0x0001 -#define MADERA_HP1L_DISABLE_DONE_STS1_SHIFT 0 -#define MADERA_HP1L_DISABLE_DONE_STS1_WIDTH 1 - -/* (0x188E) - IRQ1 Raw Status 15 */ -#define MADERA_SPK_OVERHEAT_WARN_STS1 0x0004 -#define MADERA_SPK_OVERHEAT_WARN_STS1_MASK 0x0004 -#define MADERA_SPK_OVERHEAT_WARN_STS1_SHIFT 2 -#define MADERA_SPK_OVERHEAT_WARN_STS1_WIDTH 1 -#define MADERA_SPK_OVERHEAT_STS1 0x0002 -#define MADERA_SPK_OVERHEAT_STS1_MASK 0x0002 -#define MADERA_SPK_OVERHEAT_STS1_SHIFT 1 -#define MADERA_SPK_OVERHEAT_STS1_WIDTH 1 -#define MADERA_SPK_SHUTDOWN_STS1 0x0001 -#define MADERA_SPK_SHUTDOWN_STS1_MASK 0x0001 -#define MADERA_SPK_SHUTDOWN_STS1_SHIFT 0 -#define MADERA_SPK_SHUTDOWN_STS1_WIDTH 1 - -/* (0x1900) IRQ2_Status_1 */ -#define MADERA_DSP_SHARED_WR_COLL_EINT2 0x8000 -#define MADERA_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 -#define MADERA_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 -#define MADERA_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 -#define MADERA_CTRLIF_ERR_EINT2 0x1000 -#define MADERA_CTRLIF_ERR_EINT2_MASK 0x1000 -#define MADERA_CTRLIF_ERR_EINT2_SHIFT 12 -#define MADERA_CTRLIF_ERR_EINT2_WIDTH 1 -#define MADERA_SYSCLK_FAIL_EINT2 0x0200 -#define MADERA_SYSCLK_FAIL_EINT2_MASK 0x0200 -#define MADERA_SYSCLK_FAIL_EINT2_SHIFT 9 -#define MADERA_SYSCLK_FAIL_EINT2_WIDTH 1 -#define MADERA_CLOCK_DETECT_EINT2 0x0100 -#define MADERA_CLOCK_DETECT_EINT2_MASK 0x0100 -#define MADERA_CLOCK_DETECT_EINT2_SHIFT 8 -#define MADERA_CLOCK_DETECT_EINT2_WIDTH 1 -#define MADERA_BOOT_DONE_EINT2 0x0080 -#define MADERA_BOOT_DONE_EINT2_MASK 0x0080 -#define MADERA_BOOT_DONE_EINT2_SHIFT 7 -#define MADERA_BOOT_DONE_EINT2_WIDTH 1 - -/* (0x1901) IRQ2_Status_2 */ -#define MADERA_FLL3_LOCK_EINT2 0x0400 -#define MADERA_FLL3_LOCK_EINT2_MASK 0x0400 -#define MADERA_FLL3_LOCK_EINT2_SHIFT 10 -#define MADERA_FLL3_LOCK_EINT2_WIDTH 1 -#define MADERA_FLL2_LOCK_EINT2 0x0200 -#define MADERA_FLL2_LOCK_EINT2_MASK 0x0200 -#define MADERA_FLL2_LOCK_EINT2_SHIFT 9 -#define MADERA_FLL2_LOCK_EINT2_WIDTH 1 -#define MADERA_FLL1_LOCK_EINT2 0x0100 -#define MADERA_FLL1_LOCK_EINT2_MASK 0x0100 -#define MADERA_FLL1_LOCK_EINT2_SHIFT 8 -#define MADERA_FLL1_LOCK_EINT2_WIDTH 1 - -/* (0x1905) IRQ2_Status_6 */ -#define MADERA_MICDET2_EINT2 0x0200 -#define MADERA_MICDET2_EINT2_MASK 0x0200 -#define MADERA_MICDET2_EINT2_SHIFT 9 -#define MADERA_MICDET2_EINT2_WIDTH 1 -#define MADERA_MICDET1_EINT2 0x0100 -#define MADERA_MICDET1_EINT2_MASK 0x0100 -#define MADERA_MICDET1_EINT2_SHIFT 8 -#define MADERA_MICDET1_EINT2_WIDTH 1 -#define MADERA_HPDET_EINT2 0x0001 -#define MADERA_HPDET_EINT2_MASK 0x0001 -#define MADERA_HPDET_EINT2_SHIFT 0 -#define MADERA_HPDET_EINT2_WIDTH 1 - -/* (0x1906) IRQ2_Status_7 */ -#define MADERA_MICD_CLAMP_FALL_EINT2 0x0020 -#define MADERA_MICD_CLAMP_FALL_EINT2_MASK 0x0020 -#define MADERA_MICD_CLAMP_FALL_EINT2_SHIFT 5 -#define MADERA_MICD_CLAMP_FALL_EINT2_WIDTH 1 -#define MADERA_MICD_CLAMP_RISE_EINT2 0x0010 -#define MADERA_MICD_CLAMP_RISE_EINT2_MASK 0x0010 -#define MADERA_MICD_CLAMP_RISE_EINT2_SHIFT 4 -#define MADERA_MICD_CLAMP_RISE_EINT2_WIDTH 1 -#define MADERA_JD2_FALL_EINT2 0x0008 -#define MADERA_JD2_FALL_EINT2_MASK 0x0008 -#define MADERA_JD2_FALL_EINT2_SHIFT 3 -#define MADERA_JD2_FALL_EINT2_WIDTH 1 -#define MADERA_JD2_RISE_EINT2 0x0004 -#define MADERA_JD2_RISE_EINT2_MASK 0x0004 -#define MADERA_JD2_RISE_EINT2_SHIFT 2 -#define MADERA_JD2_RISE_EINT2_WIDTH 1 -#define MADERA_JD1_FALL_EINT2 0x0002 -#define MADERA_JD1_FALL_EINT2_MASK 0x0002 -#define MADERA_JD1_FALL_EINT2_SHIFT 1 -#define MADERA_JD1_FALL_EINT2_WIDTH 1 -#define MADERA_JD1_RISE_EINT2 0x0001 -#define MADERA_JD1_RISE_EINT2_MASK 0x0001 -#define MADERA_JD1_RISE_EINT2_SHIFT 0 -#define MADERA_JD1_RISE_EINT2_WIDTH 1 - -/* (0x1908) IRQ2_Status_9 */ -#define MADERA_ASRC2_IN2_LOCK_EINT2 0x0800 -#define MADERA_ASRC2_IN2_LOCK_EINT2_MASK 0x0800 -#define MADERA_ASRC2_IN2_LOCK_EINT2_SHIFT 11 -#define MADERA_ASRC2_IN2_LOCK_EINT2_WIDTH 1 -#define MADERA_ASRC2_IN1_LOCK_EINT2 0x0400 -#define MADERA_ASRC2_IN1_LOCK_EINT2_MASK 0x0400 -#define MADERA_ASRC2_IN1_LOCK_EINT2_SHIFT 10 -#define MADERA_ASRC2_IN1_LOCK_EINT2_WIDTH 1 -#define MADERA_ASRC1_IN2_LOCK_EINT2 0x0200 -#define MADERA_ASRC1_IN2_LOCK_EINT2_MASK 0x0200 -#define MADERA_ASRC1_IN2_LOCK_EINT2_SHIFT 9 -#define MADERA_ASRC1_IN2_LOCK_EINT2_WIDTH 1 -#define MADERA_ASRC1_IN1_LOCK_EINT2 0x0100 -#define MADERA_ASRC1_IN1_LOCK_EINT2_MASK 0x0100 -#define MADERA_ASRC1_IN1_LOCK_EINT2_SHIFT 8 -#define MADERA_ASRC1_IN1_LOCK_EINT2_WIDTH 1 -#define MADERA_DRC2_SIG_DET_EINT2 0x0002 -#define MADERA_DRC2_SIG_DET_EINT2_MASK 0x0002 -#define MADERA_DRC2_SIG_DET_EINT2_SHIFT 1 -#define MADERA_DRC2_SIG_DET_EINT2_WIDTH 1 -#define MADERA_DRC1_SIG_DET_EINT2 0x0001 -#define MADERA_DRC1_SIG_DET_EINT2_MASK 0x0001 -#define MADERA_DRC1_SIG_DET_EINT2_SHIFT 0 -#define MADERA_DRC1_SIG_DET_EINT2_WIDTH 1 - -/* (0x190A) IRQ2_Status_11 */ -#define MADERA_DSP_IRQ16_EINT2 0x8000 -#define MADERA_DSP_IRQ16_EINT2_MASK 0x8000 -#define MADERA_DSP_IRQ16_EINT2_SHIFT 15 -#define MADERA_DSP_IRQ16_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ15_EINT2 0x4000 -#define MADERA_DSP_IRQ15_EINT2_MASK 0x4000 -#define MADERA_DSP_IRQ15_EINT2_SHIFT 14 -#define MADERA_DSP_IRQ15_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ14_EINT2 0x2000 -#define MADERA_DSP_IRQ14_EINT2_MASK 0x2000 -#define MADERA_DSP_IRQ14_EINT2_SHIFT 13 -#define MADERA_DSP_IRQ14_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ13_EINT2 0x1000 -#define MADERA_DSP_IRQ13_EINT2_MASK 0x1000 -#define MADERA_DSP_IRQ13_EINT2_SHIFT 12 -#define MADERA_DSP_IRQ13_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ12_EINT2 0x0800 -#define MADERA_DSP_IRQ12_EINT2_MASK 0x0800 -#define MADERA_DSP_IRQ12_EINT2_SHIFT 11 -#define MADERA_DSP_IRQ12_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ11_EINT2 0x0400 -#define MADERA_DSP_IRQ11_EINT2_MASK 0x0400 -#define MADERA_DSP_IRQ11_EINT2_SHIFT 10 -#define MADERA_DSP_IRQ11_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ10_EINT2 0x0200 -#define MADERA_DSP_IRQ10_EINT2_MASK 0x0200 -#define MADERA_DSP_IRQ10_EINT2_SHIFT 9 -#define MADERA_DSP_IRQ10_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ9_EINT2 0x0100 -#define MADERA_DSP_IRQ9_EINT2_MASK 0x0100 -#define MADERA_DSP_IRQ9_EINT2_SHIFT 8 -#define MADERA_DSP_IRQ9_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ8_EINT2 0x0080 -#define MADERA_DSP_IRQ8_EINT2_MASK 0x0080 -#define MADERA_DSP_IRQ8_EINT2_SHIFT 7 -#define MADERA_DSP_IRQ8_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ7_EINT2 0x0040 -#define MADERA_DSP_IRQ7_EINT2_MASK 0x0040 -#define MADERA_DSP_IRQ7_EINT2_SHIFT 6 -#define MADERA_DSP_IRQ7_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ6_EINT2 0x0020 -#define MADERA_DSP_IRQ6_EINT2_MASK 0x0020 -#define MADERA_DSP_IRQ6_EINT2_SHIFT 5 -#define MADERA_DSP_IRQ6_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ5_EINT2 0x0010 -#define MADERA_DSP_IRQ5_EINT2_MASK 0x0010 -#define MADERA_DSP_IRQ5_EINT2_SHIFT 4 -#define MADERA_DSP_IRQ5_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ4_EINT2 0x0008 -#define MADERA_DSP_IRQ4_EINT2_MASK 0x0008 -#define MADERA_DSP_IRQ4_EINT2_SHIFT 3 -#define MADERA_DSP_IRQ4_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ3_EINT2 0x0004 -#define MADERA_DSP_IRQ3_EINT2_MASK 0x0004 -#define MADERA_DSP_IRQ3_EINT2_SHIFT 2 -#define MADERA_DSP_IRQ3_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ2_EINT2 0x0002 -#define MADERA_DSP_IRQ2_EINT2_MASK 0x0002 -#define MADERA_DSP_IRQ2_EINT2_SHIFT 1 -#define MADERA_DSP_IRQ2_EINT2_WIDTH 1 -#define MADERA_DSP_IRQ1_EINT2 0x0001 -#define MADERA_DSP_IRQ1_EINT2_MASK 0x0001 -#define MADERA_DSP_IRQ1_EINT2_SHIFT 0 -#define MADERA_DSP_IRQ1_EINT2_WIDTH 1 - -/* (0x190B) IRQ2_Status_12 */ -#define MADERA_SPKOUTR_SC_EINT2 0x0080 -#define MADERA_SPKOUTR_SC_EINT2_MASK 0x0080 -#define MADERA_SPKOUTR_SC_EINT2_SHIFT 7 -#define MADERA_SPKOUTR_SC_EINT2_WIDTH 1 -#define MADERA_SPKOUTL_SC_EINT2 0x0040 -#define MADERA_SPKOUTL_SC_EINT2_MASK 0x0040 -#define MADERA_SPKOUTL_SC_EINT2_SHIFT 6 -#define MADERA_SPKOUTL_SC_EINT2_WIDTH 1 -#define MADERA_HP3R_SC_EINT2 0x0020 -#define MADERA_HP3R_SC_EINT2_MASK 0x0020 -#define MADERA_HP3R_SC_EINT2_SHIFT 5 -#define MADERA_HP3R_SC_EINT2_WIDTH 1 -#define MADERA_HP3L_SC_EINT2 0x0010 -#define MADERA_HP3L_SC_EINT2_MASK 0x0010 -#define MADERA_HP3L_SC_EINT2_SHIFT 4 -#define MADERA_HP3L_SC_EINT2_WIDTH 1 -#define MADERA_HP2R_SC_EINT2 0x0008 -#define MADERA_HP2R_SC_EINT2_MASK 0x0008 -#define MADERA_HP2R_SC_EINT2_SHIFT 3 -#define MADERA_HP2R_SC_EINT2_WIDTH 1 -#define MADERA_HP2L_SC_EINT2 0x0004 -#define MADERA_HP2L_SC_EINT2_MASK 0x0004 -#define MADERA_HP2L_SC_EINT2_SHIFT 2 -#define MADERA_HP2L_SC_EINT2_WIDTH 1 -#define MADERA_HP1R_SC_EINT2 0x0002 -#define MADERA_HP1R_SC_EINT2_MASK 0x0002 -#define MADERA_HP1R_SC_EINT2_SHIFT 1 -#define MADERA_HP1R_SC_EINT2_WIDTH 1 -#define MADERA_HP1L_SC_EINT2 0x0001 -#define MADERA_HP1L_SC_EINT2_MASK 0x0001 -#define MADERA_HP1L_SC_EINT2_SHIFT 0 -#define MADERA_HP1L_SC_EINT2_WIDTH 1 - -/* (0x190C) IRQ2_Status_13 */ -#define MADERA_SPKOUTR_ENABLE_DONE_EINT2 0x0080 -#define MADERA_SPKOUTR_ENABLE_DONE_EINT2_MASK 0x0080 -#define MADERA_SPKOUTR_ENABLE_DONE_EINT2_SHIFT 7 -#define MADERA_SPKOUTR_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_SPKOUTL_ENABLE_DONE_EINT2 0x0040 -#define MADERA_SPKOUTL_ENABLE_DONE_EINT2_MASK 0x0040 -#define MADERA_SPKOUTL_ENABLE_DONE_EINT2_SHIFT 6 -#define MADERA_SPKOUTL_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP3R_ENABLE_DONE_EINT2 0x0020 -#define MADERA_HP3R_ENABLE_DONE_EINT2_MASK 0x0020 -#define MADERA_HP3R_ENABLE_DONE_EINT2_SHIFT 5 -#define MADERA_HP3R_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP3L_ENABLE_DONE_EINT2 0x0010 -#define MADERA_HP3L_ENABLE_DONE_EINT2_MASK 0x0010 -#define MADERA_HP3L_ENABLE_DONE_EINT2_SHIFT 4 -#define MADERA_HP3L_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP2R_ENABLE_DONE_EINT2 0x0008 -#define MADERA_HP2R_ENABLE_DONE_EINT2_MASK 0x0008 -#define MADERA_HP2R_ENABLE_DONE_EINT2_SHIFT 3 -#define MADERA_HP2R_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP2L_ENABLE_DONE_EINT2 0x0004 -#define MADERA_HP2L_ENABLE_DONE_EINT2_MASK 0x0004 -#define MADERA_HP2L_ENABLE_DONE_EINT2_SHIFT 2 -#define MADERA_HP2L_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP1R_ENABLE_DONE_EINT2 0x0002 -#define MADERA_HP1R_ENABLE_DONE_EINT2_MASK 0x0002 -#define MADERA_HP1R_ENABLE_DONE_EINT2_SHIFT 1 -#define MADERA_HP1R_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP1L_ENABLE_DONE_EINT2 0x0001 -#define MADERA_HP1L_ENABLE_DONE_EINT2_MASK 0x0001 -#define MADERA_HP1L_ENABLE_DONE_EINT2_SHIFT 0 -#define MADERA_HP1L_ENABLE_DONE_EINT2_WIDTH 1 - -/* (0x190D) IRQ2_Status_14 */ -#define MADERA_SPKOUTR_DISABLE_DONE_EINT2 0x0080 -#define MADERA_SPKOUTR_DISABLE_DONE_EINT2_MASK 0x0080 -#define MADERA_SPKOUTR_DISABLE_DONE_EINT2_SHIFT 7 -#define MADERA_SPKOUTR_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_SPKOUTL_DISABLE_DONE_EINT2 0x0040 -#define MADERA_SPKOUTL_DISABLE_DONE_EINT2_MASK 0x0040 -#define MADERA_SPKOUTL_DISABLE_DONE_EINT2_SHIFT 6 -#define MADERA_SPKOUTL_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP3R_DISABLE_DONE_EINT2 0x0020 -#define MADERA_HP3R_DISABLE_DONE_EINT2_MASK 0x0020 -#define MADERA_HP3R_DISABLE_DONE_EINT2_SHIFT 5 -#define MADERA_HP3R_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP3L_DISABLE_DONE_EINT2 0x0010 -#define MADERA_HP3L_DISABLE_DONE_EINT2_MASK 0x0010 -#define MADERA_HP3L_DISABLE_DONE_EINT2_SHIFT 4 -#define MADERA_HP3L_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP2R_DISABLE_DONE_EINT2 0x0008 -#define MADERA_HP2R_DISABLE_DONE_EINT2_MASK 0x0008 -#define MADERA_HP2R_DISABLE_DONE_EINT2_SHIFT 3 -#define MADERA_HP2R_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP2L_DISABLE_DONE_EINT2 0x0004 -#define MADERA_HP2L_DISABLE_DONE_EINT2_MASK 0x0004 -#define MADERA_HP2L_DISABLE_DONE_EINT2_SHIFT 2 -#define MADERA_HP2L_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP1R_DISABLE_DONE_EINT2 0x0002 -#define MADERA_HP1R_DISABLE_DONE_EINT2_MASK 0x0002 -#define MADERA_HP1R_DISABLE_DONE_EINT2_SHIFT 1 -#define MADERA_HP1R_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_HP1L_DISABLE_DONE_EINT2 0x0001 -#define MADERA_HP1L_DISABLE_DONE_EINT2_MASK 0x0001 -#define MADERA_HP1L_DISABLE_DONE_EINT2_SHIFT 0 -#define MADERA_HP1L_DISABLE_DONE_EINT2_WIDTH 1 - -/* (0x190E) IRQ2_Status_15 */ -#define MADERA_SPK_OVERHEAT_WARN_EINT2 0x0004 -#define MADERA_SPK_OVERHEAT_WARN_EINT2_MASK 0x0004 -#define MADERA_SPK_OVERHEAT_WARN_EINT2_SHIFT 2 -#define MADERA_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 -#define MADERA_SPK_OVERHEAT_EINT2 0x0002 -#define MADERA_SPK_OVERHEAT_EINT2_MASK 0x0002 -#define MADERA_SPK_OVERHEAT_EINT2_SHIFT 1 -#define MADERA_SPK_OVERHEAT_EINT2_WIDTH 1 -#define MADERA_SPK_SHUTDOWN_EINT2 0x0001 -#define MADERA_SPK_SHUTDOWN_EINT2_MASK 0x0001 -#define MADERA_SPK_SHUTDOWN_EINT2_SHIFT 0 -#define MADERA_SPK_SHUTDOWN_EINT2_WIDTH 1 - -/* (0x1940) IRQ2_Mask_1 */ -#define MADERA_IM_DSP_SHARED_WR_COLL_EINT2 0x8000 -#define MADERA_IM_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 -#define MADERA_IM_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 -#define MADERA_IM_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 -#define MADERA_IM_CTRLIF_ERR_EINT2 0x1000 -#define MADERA_IM_CTRLIF_ERR_EINT2_MASK 0x1000 -#define MADERA_IM_CTRLIF_ERR_EINT2_SHIFT 12 -#define MADERA_IM_CTRLIF_ERR_EINT2_WIDTH 1 -#define MADERA_IM_SYSCLK_FAIL_EINT2 0x0200 -#define MADERA_IM_SYSCLK_FAIL_EINT2_MASK 0x0200 -#define MADERA_IM_SYSCLK_FAIL_EINT2_SHIFT 9 -#define MADERA_IM_SYSCLK_FAIL_EINT2_WIDTH 1 -#define MADERA_IM_CLOCK_DETECT_EINT2 0x0100 -#define MADERA_IM_CLOCK_DETECT_EINT2_MASK 0x0100 -#define MADERA_IM_CLOCK_DETECT_EINT2_SHIFT 8 -#define MADERA_IM_CLOCK_DETECT_EINT2_WIDTH 1 -#define MADERA_IM_BOOT_DONE_EINT2 0x0080 -#define MADERA_IM_BOOT_DONE_EINT2_MASK 0x0080 -#define MADERA_IM_BOOT_DONE_EINT2_SHIFT 7 -#define MADERA_IM_BOOT_DONE_EINT2_WIDTH 1 - -/* (0x1941) IRQ2_Mask_2 */ -#define MADERA_IM_FLL3_LOCK_EINT2 0x0400 -#define MADERA_IM_FLL3_LOCK_EINT2_MASK 0x0400 -#define MADERA_IM_FLL3_LOCK_EINT2_SHIFT 10 -#define MADERA_IM_FLL3_LOCK_EINT2_WIDTH 1 -#define MADERA_IM_FLL2_LOCK_EINT2 0x0200 -#define MADERA_IM_FLL2_LOCK_EINT2_MASK 0x0200 -#define MADERA_IM_FLL2_LOCK_EINT2_SHIFT 9 -#define MADERA_IM_FLL2_LOCK_EINT2_WIDTH 1 -#define MADERA_IM_FLL1_LOCK_EINT2 0x0100 -#define MADERA_IM_FLL1_LOCK_EINT2_MASK 0x0100 -#define MADERA_IM_FLL1_LOCK_EINT2_SHIFT 8 -#define MADERA_IM_FLL1_LOCK_EINT2_WIDTH 1 - -/* (0x1945) IRQ2_Mask_6 */ -#define MADERA_IM_MICDET2_EINT2 0x0200 -#define MADERA_IM_MICDET2_EINT2_MASK 0x0200 -#define MADERA_IM_MICDET2_EINT2_SHIFT 9 -#define MADERA_IM_MICDET2_EINT2_WIDTH 1 -#define MADERA_IM_MICDET1_EINT2 0x0100 -#define MADERA_IM_MICDET1_EINT2_MASK 0x0100 -#define MADERA_IM_MICDET1_EINT2_SHIFT 8 -#define MADERA_IM_MICDET1_EINT2_WIDTH 1 -#define MADERA_IM_HPDET_EINT2 0x0001 -#define MADERA_IM_HPDET_EINT2_MASK 0x0001 -#define MADERA_IM_HPDET_EINT2_SHIFT 0 -#define MADERA_IM_HPDET_EINT2_WIDTH 1 - -/* (0x1946) IRQ2_Mask_7 */ -#define MADERA_IM_MICD_CLAMP_FALL_EINT2 0x0020 -#define MADERA_IM_MICD_CLAMP_FALL_EINT2_MASK 0x0020 -#define MADERA_IM_MICD_CLAMP_FALL_EINT2_SHIFT 5 -#define MADERA_IM_MICD_CLAMP_FALL_EINT2_WIDTH 1 -#define MADERA_IM_MICD_CLAMP_RISE_EINT2 0x0010 -#define MADERA_IM_MICD_CLAMP_RISE_EINT2_MASK 0x0010 -#define MADERA_IM_MICD_CLAMP_RISE_EINT2_SHIFT 4 -#define MADERA_IM_MICD_CLAMP_RISE_EINT2_WIDTH 1 -#define MADERA_IM_JD2_FALL_EINT2 0x0008 -#define MADERA_IM_JD2_FALL_EINT2_MASK 0x0008 -#define MADERA_IM_JD2_FALL_EINT2_SHIFT 3 -#define MADERA_IM_JD2_FALL_EINT2_WIDTH 1 -#define MADERA_IM_JD2_RISE_EINT2 0x0004 -#define MADERA_IM_JD2_RISE_EINT2_MASK 0x0004 -#define MADERA_IM_JD2_RISE_EINT2_SHIFT 2 -#define MADERA_IM_JD2_RISE_EINT2_WIDTH 1 -#define MADERA_IM_JD1_FALL_EINT2 0x0002 -#define MADERA_IM_JD1_FALL_EINT2_MASK 0x0002 -#define MADERA_IM_JD1_FALL_EINT2_SHIFT 1 -#define MADERA_IM_JD1_FALL_EINT2_WIDTH 1 -#define MADERA_IM_JD1_RISE_EINT2 0x0001 -#define MADERA_IM_JD1_RISE_EINT2_MASK 0x0001 -#define MADERA_IM_JD1_RISE_EINT2_SHIFT 0 -#define MADERA_IM_JD1_RISE_EINT2_WIDTH 1 - -/* (0x1948) IRQ2_Mask_9 */ -#define MADERA_IM_ASRC2_IN2_LOCK_EINT2 0x0800 -#define MADERA_IM_ASRC2_IN2_LOCK_EINT2_MASK 0x0800 -#define MADERA_IM_ASRC2_IN2_LOCK_EINT2_SHIFT 11 -#define MADERA_IM_ASRC2_IN2_LOCK_EINT2_WIDTH 1 -#define MADERA_IM_ASRC2_IN1_LOCK_EINT2 0x0400 -#define MADERA_IM_ASRC2_IN1_LOCK_EINT2_MASK 0x0400 -#define MADERA_IM_ASRC2_IN1_LOCK_EINT2_SHIFT 10 -#define MADERA_IM_ASRC2_IN1_LOCK_EINT2_WIDTH 1 -#define MADERA_IM_ASRC1_IN2_LOCK_EINT2 0x0200 -#define MADERA_IM_ASRC1_IN2_LOCK_EINT2_MASK 0x0200 -#define MADERA_IM_ASRC1_IN2_LOCK_EINT2_SHIFT 9 -#define MADERA_IM_ASRC1_IN2_LOCK_EINT2_WIDTH 1 -#define MADERA_IM_ASRC1_IN1_LOCK_EINT2 0x0100 -#define MADERA_IM_ASRC1_IN1_LOCK_EINT2_MASK 0x0100 -#define MADERA_IM_ASRC1_IN1_LOCK_EINT2_SHIFT 8 -#define MADERA_IM_ASRC1_IN1_LOCK_EINT2_WIDTH 1 -#define MADERA_IM_DRC2_SIG_DET_EINT2 0x0002 -#define MADERA_IM_DRC2_SIG_DET_EINT2_MASK 0x0002 -#define MADERA_IM_DRC2_SIG_DET_EINT2_SHIFT 1 -#define MADERA_IM_DRC2_SIG_DET_EINT2_WIDTH 1 -#define MADERA_IM_DRC1_SIG_DET_EINT2 0x0001 -#define MADERA_IM_DRC1_SIG_DET_EINT2_MASK 0x0001 -#define MADERA_IM_DRC1_SIG_DET_EINT2_SHIFT 0 -#define MADERA_IM_DRC1_SIG_DET_EINT2_WIDTH 1 - -/* (0x194A) IRQ2_Mask_11 */ -#define MADERA_IM_DSP_IRQ16_EINT2 0x8000 -#define MADERA_IM_DSP_IRQ16_EINT2_MASK 0x8000 -#define MADERA_IM_DSP_IRQ16_EINT2_SHIFT 15 -#define MADERA_IM_DSP_IRQ16_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ15_EINT2 0x4000 -#define MADERA_IM_DSP_IRQ15_EINT2_MASK 0x4000 -#define MADERA_IM_DSP_IRQ15_EINT2_SHIFT 14 -#define MADERA_IM_DSP_IRQ15_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ14_EINT2 0x2000 -#define MADERA_IM_DSP_IRQ14_EINT2_MASK 0x2000 -#define MADERA_IM_DSP_IRQ14_EINT2_SHIFT 13 -#define MADERA_IM_DSP_IRQ14_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ13_EINT2 0x1000 -#define MADERA_IM_DSP_IRQ13_EINT2_MASK 0x1000 -#define MADERA_IM_DSP_IRQ13_EINT2_SHIFT 12 -#define MADERA_IM_DSP_IRQ13_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ12_EINT2 0x0800 -#define MADERA_IM_DSP_IRQ12_EINT2_MASK 0x0800 -#define MADERA_IM_DSP_IRQ12_EINT2_SHIFT 11 -#define MADERA_IM_DSP_IRQ12_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ11_EINT2 0x0400 -#define MADERA_IM_DSP_IRQ11_EINT2_MASK 0x0400 -#define MADERA_IM_DSP_IRQ11_EINT2_SHIFT 10 -#define MADERA_IM_DSP_IRQ11_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ10_EINT2 0x0200 -#define MADERA_IM_DSP_IRQ10_EINT2_MASK 0x0200 -#define MADERA_IM_DSP_IRQ10_EINT2_SHIFT 9 -#define MADERA_IM_DSP_IRQ10_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ9_EINT2 0x0100 -#define MADERA_IM_DSP_IRQ9_EINT2_MASK 0x0100 -#define MADERA_IM_DSP_IRQ9_EINT2_SHIFT 8 -#define MADERA_IM_DSP_IRQ9_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ8_EINT2 0x0080 -#define MADERA_IM_DSP_IRQ8_EINT2_MASK 0x0080 -#define MADERA_IM_DSP_IRQ8_EINT2_SHIFT 7 -#define MADERA_IM_DSP_IRQ8_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ7_EINT2 0x0040 -#define MADERA_IM_DSP_IRQ7_EINT2_MASK 0x0040 -#define MADERA_IM_DSP_IRQ7_EINT2_SHIFT 6 -#define MADERA_IM_DSP_IRQ7_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ6_EINT2 0x0020 -#define MADERA_IM_DSP_IRQ6_EINT2_MASK 0x0020 -#define MADERA_IM_DSP_IRQ6_EINT2_SHIFT 5 -#define MADERA_IM_DSP_IRQ6_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ5_EINT2 0x0010 -#define MADERA_IM_DSP_IRQ5_EINT2_MASK 0x0010 -#define MADERA_IM_DSP_IRQ5_EINT2_SHIFT 4 -#define MADERA_IM_DSP_IRQ5_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ4_EINT2 0x0008 -#define MADERA_IM_DSP_IRQ4_EINT2_MASK 0x0008 -#define MADERA_IM_DSP_IRQ4_EINT2_SHIFT 3 -#define MADERA_IM_DSP_IRQ4_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ3_EINT2 0x0004 -#define MADERA_IM_DSP_IRQ3_EINT2_MASK 0x0004 -#define MADERA_IM_DSP_IRQ3_EINT2_SHIFT 2 -#define MADERA_IM_DSP_IRQ3_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ2_EINT2 0x0002 -#define MADERA_IM_DSP_IRQ2_EINT2_MASK 0x0002 -#define MADERA_IM_DSP_IRQ2_EINT2_SHIFT 1 -#define MADERA_IM_DSP_IRQ2_EINT2_WIDTH 1 -#define MADERA_IM_DSP_IRQ1_EINT2 0x0001 -#define MADERA_IM_DSP_IRQ1_EINT2_MASK 0x0001 -#define MADERA_IM_DSP_IRQ1_EINT2_SHIFT 0 -#define MADERA_IM_DSP_IRQ1_EINT2_WIDTH 1 - -/* (0x194B) IRQ2_Mask_12 */ -#define MADERA_IM_SPKOUTR_SC_EINT2 0x0080 -#define MADERA_IM_SPKOUTR_SC_EINT2_MASK 0x0080 -#define MADERA_IM_SPKOUTR_SC_EINT2_SHIFT 7 -#define MADERA_IM_SPKOUTR_SC_EINT2_WIDTH 1 -#define MADERA_IM_SPKOUTL_SC_EINT2 0x0040 -#define MADERA_IM_SPKOUTL_SC_EINT2_MASK 0x0040 -#define MADERA_IM_SPKOUTL_SC_EINT2_SHIFT 6 -#define MADERA_IM_SPKOUTL_SC_EINT2_WIDTH 1 -#define MADERA_IM_HP3R_SC_EINT2 0x0020 -#define MADERA_IM_HP3R_SC_EINT2_MASK 0x0020 -#define MADERA_IM_HP3R_SC_EINT2_SHIFT 5 -#define MADERA_IM_HP3R_SC_EINT2_WIDTH 1 -#define MADERA_IM_HP3L_SC_EINT2 0x0010 -#define MADERA_IM_HP3L_SC_EINT2_MASK 0x0010 -#define MADERA_IM_HP3L_SC_EINT2_SHIFT 4 -#define MADERA_IM_HP3L_SC_EINT2_WIDTH 1 -#define MADERA_IM_HP2R_SC_EINT2 0x0008 -#define MADERA_IM_HP2R_SC_EINT2_MASK 0x0008 -#define MADERA_IM_HP2R_SC_EINT2_SHIFT 3 -#define MADERA_IM_HP2R_SC_EINT2_WIDTH 1 -#define MADERA_IM_HP2L_SC_EINT2 0x0004 -#define MADERA_IM_HP2L_SC_EINT2_MASK 0x0004 -#define MADERA_IM_HP2L_SC_EINT2_SHIFT 2 -#define MADERA_IM_HP2L_SC_EINT2_WIDTH 1 -#define MADERA_IM_HP1R_SC_EINT2 0x0002 -#define MADERA_IM_HP1R_SC_EINT2_MASK 0x0002 -#define MADERA_IM_HP1R_SC_EINT2_SHIFT 1 -#define MADERA_IM_HP1R_SC_EINT2_WIDTH 1 -#define MADERA_IM_HP1L_SC_EINT2 0x0001 -#define MADERA_IM_HP1L_SC_EINT2_MASK 0x0001 -#define MADERA_IM_HP1L_SC_EINT2_SHIFT 0 -#define MADERA_IM_HP1L_SC_EINT2_WIDTH 1 - -/* (0x194C) IRQ2_Mask_13 */ -#define MADERA_IM_SPKOUTR_ENABLE_DONE_EINT2 0x0080 -#define MADERA_IM_SPKOUTR_ENABLE_DONE_EINT2_MASK 0x0080 -#define MADERA_IM_SPKOUTR_ENABLE_DONE_EINT2_SHIFT 7 -#define MADERA_IM_SPKOUTR_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_SPKOUTL_ENABLE_DONE_EINT2 0x0040 -#define MADERA_IM_SPKOUTL_ENABLE_DONE_EINT2_MASK 0x0040 -#define MADERA_IM_SPKOUTL_ENABLE_DONE_EINT2_SHIFT 6 -#define MADERA_IM_SPKOUTL_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP3R_ENABLE_DONE_EINT2 0x0020 -#define MADERA_IM_HP3R_ENABLE_DONE_EINT2_MASK 0x0020 -#define MADERA_IM_HP3R_ENABLE_DONE_EINT2_SHIFT 5 -#define MADERA_IM_HP3R_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP3L_ENABLE_DONE_EINT2 0x0010 -#define MADERA_IM_HP3L_ENABLE_DONE_EINT2_MASK 0x0010 -#define MADERA_IM_HP3L_ENABLE_DONE_EINT2_SHIFT 4 -#define MADERA_IM_HP3L_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP2R_ENABLE_DONE_EINT2 0x0008 -#define MADERA_IM_HP2R_ENABLE_DONE_EINT2_MASK 0x0008 -#define MADERA_IM_HP2R_ENABLE_DONE_EINT2_SHIFT 3 -#define MADERA_IM_HP2R_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP2L_ENABLE_DONE_EINT2 0x0004 -#define MADERA_IM_HP2L_ENABLE_DONE_EINT2_MASK 0x0004 -#define MADERA_IM_HP2L_ENABLE_DONE_EINT2_SHIFT 2 -#define MADERA_IM_HP2L_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP1R_ENABLE_DONE_EINT2 0x0002 -#define MADERA_IM_HP1R_ENABLE_DONE_EINT2_MASK 0x0002 -#define MADERA_IM_HP1R_ENABLE_DONE_EINT2_SHIFT 1 -#define MADERA_IM_HP1R_ENABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP1L_ENABLE_DONE_EINT2 0x0001 -#define MADERA_IM_HP1L_ENABLE_DONE_EINT2_MASK 0x0001 -#define MADERA_IM_HP1L_ENABLE_DONE_EINT2_SHIFT 0 -#define MADERA_IM_HP1L_ENABLE_DONE_EINT2_WIDTH 1 - -/* (0x194D) IRQ2_Mask_14 */ -#define MADERA_IM_SPKOUTR_DISABLE_DONE_EINT2 0x0080 -#define MADERA_IM_SPKOUTR_DISABLE_DONE_EINT2_MASK 0x0080 -#define MADERA_IM_SPKOUTR_DISABLE_DONE_EINT2_SHIFT 7 -#define MADERA_IM_SPKOUTR_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_SPKOUTL_DISABLE_DONE_EINT2 0x0040 -#define MADERA_IM_SPKOUTL_DISABLE_DONE_EINT2_MASK 0x0040 -#define MADERA_IM_SPKOUTL_DISABLE_DONE_EINT2_SHIFT 6 -#define MADERA_IM_SPKOUTL_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP3R_DISABLE_DONE_EINT2 0x0020 -#define MADERA_IM_HP3R_DISABLE_DONE_EINT2_MASK 0x0020 -#define MADERA_IM_HP3R_DISABLE_DONE_EINT2_SHIFT 5 -#define MADERA_IM_HP3R_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP3L_DISABLE_DONE_EINT2 0x0010 -#define MADERA_IM_HP3L_DISABLE_DONE_EINT2_MASK 0x0010 -#define MADERA_IM_HP3L_DISABLE_DONE_EINT2_SHIFT 4 -#define MADERA_IM_HP3L_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP2R_DISABLE_DONE_EINT2 0x0008 -#define MADERA_IM_HP2R_DISABLE_DONE_EINT2_MASK 0x0008 -#define MADERA_IM_HP2R_DISABLE_DONE_EINT2_SHIFT 3 -#define MADERA_IM_HP2R_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP2L_DISABLE_DONE_EINT2 0x0004 -#define MADERA_IM_HP2L_DISABLE_DONE_EINT2_MASK 0x0004 -#define MADERA_IM_HP2L_DISABLE_DONE_EINT2_SHIFT 2 -#define MADERA_IM_HP2L_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP1R_DISABLE_DONE_EINT2 0x0002 -#define MADERA_IM_HP1R_DISABLE_DONE_EINT2_MASK 0x0002 -#define MADERA_IM_HP1R_DISABLE_DONE_EINT2_SHIFT 1 -#define MADERA_IM_HP1R_DISABLE_DONE_EINT2_WIDTH 1 -#define MADERA_IM_HP1L_DISABLE_DONE_EINT2 0x0001 -#define MADERA_IM_HP1L_DISABLE_DONE_EINT2_MASK 0x0001 -#define MADERA_IM_HP1L_DISABLE_DONE_EINT2_SHIFT 0 -#define MADERA_IM_HP1L_DISABLE_DONE_EINT2_WIDTH 1 - -/* (0x194E) IRQ2_Mask_15 */ -#define MADERA_IM_SPK_OVERHEAT_WARN_EINT2 0x0004 -#define MADERA_IM_SPK_OVERHEAT_WARN_EINT2_MASK 0x0004 -#define MADERA_IM_SPK_OVERHEAT_WARN_EINT2_SHIFT 2 -#define MADERA_IM_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 -#define MADERA_IM_SPK_OVERHEAT_EINT2 0x0002 -#define MADERA_IM_SPK_OVERHEAT_EINT2_MASK 0x0002 -#define MADERA_IM_SPK_OVERHEAT_EINT2_SHIFT 1 -#define MADERA_IM_SPK_OVERHEAT_EINT2_WIDTH 1 -#define MADERA_IM_SPK_SHUTDOWN_EINT2 0x0001 -#define MADERA_IM_SPK_SHUTDOWN_EINT2_MASK 0x0001 -#define MADERA_IM_SPK_SHUTDOWN_EINT2_SHIFT 0 -#define MADERA_IM_SPK_SHUTDOWN_EINT2_WIDTH 1 - -/* (0x1980) IRQ2_Raw_Status_1 */ -#define MADERA_DSP_SHARED_WR_COLL_STS2 0x8000 -#define MADERA_DSP_SHARED_WR_COLL_STS2_MASK 0x8000 -#define MADERA_DSP_SHARED_WR_COLL_STS2_SHIFT 15 -#define MADERA_DSP_SHARED_WR_COLL_STS2_WIDTH 1 -#define MADERA_CTRLIF_ERR_STS2 0x1000 -#define MADERA_CTRLIF_ERR_STS2_MASK 0x1000 -#define MADERA_CTRLIF_ERR_STS2_SHIFT 12 -#define MADERA_CTRLIF_ERR_STS2_WIDTH 1 -#define MADERA_SYSCLK_FAIL_STS2 0x0200 -#define MADERA_SYSCLK_FAIL_STS2_MASK 0x0200 -#define MADERA_SYSCLK_FAIL_STS2_SHIFT 9 -#define MADERA_SYSCLK_FAIL_STS2_WIDTH 1 -#define MADERA_CLOCK_DETECT_STS2 0x0100 -#define MADERA_CLOCK_DETECT_STS2_MASK 0x0100 -#define MADERA_CLOCK_DETECT_STS2_SHIFT 8 -#define MADERA_CLOCK_DETECT_STS2_WIDTH 1 -#define MADERA_BOOT_DONE_STS2 0x0080 -#define MADERA_BOOT_DONE_STS2_MASK 0x0080 -#define MADERA_BOOT_DONE_STS2_SHIFT 7 -#define MADERA_BOOT_DONE_STS2_WIDTH 1 - -/* (0x1981) IRQ2_Raw_Status_2 */ -#define MADERA_FLL3_LOCK_STS2 0x0400 -#define MADERA_FLL3_LOCK_STS2_MASK 0x0400 -#define MADERA_FLL3_LOCK_STS2_SHIFT 10 -#define MADERA_FLL3_LOCK_STS2_WIDTH 1 -#define MADERA_FLL2_LOCK_STS2 0x0200 -#define MADERA_FLL2_LOCK_STS2_MASK 0x0200 -#define MADERA_FLL2_LOCK_STS2_SHIFT 9 -#define MADERA_FLL2_LOCK_STS2_WIDTH 1 -#define MADERA_FLL1_LOCK_STS2 0x0100 -#define MADERA_FLL1_LOCK_STS2_MASK 0x0100 -#define MADERA_FLL1_LOCK_STS2_SHIFT 8 -#define MADERA_FLL1_LOCK_STS2_WIDTH 1 - - -/* (0x1986) IRQ2_Raw_Status_7 */ -#define MADERA_MICD_CLAMP_FALL_STS2 0x0020 -#define MADERA_MICD_CLAMP_FALL_STS2_MASK 0x0020 -#define MADERA_MICD_CLAMP_FALL_STS2_SHIFT 5 -#define MADERA_MICD_CLAMP_FALL_STS2_WIDTH 1 -#define MADERA_MICD_CLAMP_RISE_STS2 0x0010 -#define MADERA_MICD_CLAMP_RISE_STS2_MASK 0x0010 -#define MADERA_MICD_CLAMP_RISE_STS2_SHIFT 4 -#define MADERA_MICD_CLAMP_RISE_STS2_WIDTH 1 -#define MADERA_JD2_FALL_STS2 0x0008 -#define MADERA_JD2_FALL_STS2_MASK 0x0008 -#define MADERA_JD2_FALL_STS2_SHIFT 3 -#define MADERA_JD2_FALL_STS2_WIDTH 1 -#define MADERA_JD2_RISE_STS2 0x0004 -#define MADERA_JD2_RISE_STS2_MASK 0x0004 -#define MADERA_JD2_RISE_STS2_SHIFT 2 -#define MADERA_JD2_RISE_STS2_WIDTH 1 -#define MADERA_JD1_FALL_STS2 0x0002 -#define MADERA_JD1_FALL_STS2_MASK 0x0002 -#define MADERA_JD1_FALL_STS2_SHIFT 1 -#define MADERA_JD1_FALL_STS2_WIDTH 1 -#define MADERA_JD1_RISE_STS2 0x0001 -#define MADERA_JD1_RISE_STS2_MASK 0x0001 -#define MADERA_JD1_RISE_STS2_SHIFT 0 -#define MADERA_JD1_RISE_STS2_WIDTH 1 - -/* (0x1988) IRQ2_Raw_Status_9 */ -#define MADERA_ASRC2_IN2_LOCK_STS2 0x0800 -#define MADERA_ASRC2_IN2_LOCK_STS2_MASK 0x0800 -#define MADERA_ASRC2_IN2_LOCK_STS2_SHIFT 11 -#define MADERA_ASRC2_IN2_LOCK_STS2_WIDTH 1 -#define MADERA_ASRC2_IN1_LOCK_STS2 0x0400 -#define MADERA_ASRC2_IN1_LOCK_STS2_MASK 0x0400 -#define MADERA_ASRC2_IN1_LOCK_STS2_SHIFT 10 -#define MADERA_ASRC2_IN1_LOCK_STS2_WIDTH 1 -#define MADERA_ASRC1_IN2_LOCK_STS2 0x0200 -#define MADERA_ASRC1_IN2_LOCK_STS2_MASK 0x0200 -#define MADERA_ASRC1_IN2_LOCK_STS2_SHIFT 9 -#define MADERA_ASRC1_IN2_LOCK_STS2_WIDTH 1 -#define MADERA_ASRC1_IN1_LOCK_STS2 0x0100 -#define MADERA_ASRC1_IN1_LOCK_STS2_MASK 0x0100 -#define MADERA_ASRC1_IN1_LOCK_STS2_SHIFT 8 -#define MADERA_ASRC1_IN1_LOCK_STS2_WIDTH 1 -#define MADERA_DRC2_SIG_DET_STS2 0x0002 -#define MADERA_DRC2_SIG_DET_STS2_MASK 0x0002 -#define MADERA_DRC2_SIG_DET_STS2_SHIFT 1 -#define MADERA_DRC2_SIG_DET_STS2_WIDTH 1 -#define MADERA_DRC1_SIG_DET_STS2 0x0001 -#define MADERA_DRC1_SIG_DET_STS2_MASK 0x0001 -#define MADERA_DRC1_SIG_DET_STS2_SHIFT 0 -#define MADERA_DRC1_SIG_DET_STS2_WIDTH 1 - -/* (0x198A) - IRQ2 Raw Status 11 */ -#define MADERA_DSP_IRQ26_STS2 0x8000 -#define MADERA_DSP_IRQ26_STS2_MASK 0x8000 -#define MADERA_DSP_IRQ26_STS2_SHIFT 15 -#define MADERA_DSP_IRQ26_STS2_WIDTH 1 -#define MADERA_DSP_IRQ25_STS2 0x4000 -#define MADERA_DSP_IRQ25_STS2_MASK 0x4000 -#define MADERA_DSP_IRQ25_STS2_SHIFT 14 -#define MADERA_DSP_IRQ25_STS2_WIDTH 1 -#define MADERA_DSP_IRQ24_STS2 0x2000 -#define MADERA_DSP_IRQ24_STS2_MASK 0x2000 -#define MADERA_DSP_IRQ24_STS2_SHIFT 13 -#define MADERA_DSP_IRQ24_STS2_WIDTH 1 -#define MADERA_DSP_IRQ23_STS2 0x1000 -#define MADERA_DSP_IRQ23_STS2_MASK 0x1000 -#define MADERA_DSP_IRQ23_STS2_SHIFT 12 -#define MADERA_DSP_IRQ23_STS2_WIDTH 1 -#define MADERA_DSP_IRQ22_STS2 0x0800 -#define MADERA_DSP_IRQ22_STS2_MASK 0x0800 -#define MADERA_DSP_IRQ22_STS2_SHIFT 11 -#define MADERA_DSP_IRQ22_STS2_WIDTH 1 -#define MADERA_DSP_IRQ21_STS2 0x0400 -#define MADERA_DSP_IRQ21_STS2_MASK 0x0400 -#define MADERA_DSP_IRQ21_STS2_SHIFT 10 -#define MADERA_DSP_IRQ21_STS2_WIDTH 1 -#define MADERA_DSP_IRQ20_STS2 0x0200 -#define MADERA_DSP_IRQ20_STS2_MASK 0x0200 -#define MADERA_DSP_IRQ20_STS2_SHIFT 9 -#define MADERA_DSP_IRQ20_STS2_WIDTH 1 -#define MADERA_DSP_IRQ9_STS2 0x0100 -#define MADERA_DSP_IRQ9_STS2_MASK 0x0100 -#define MADERA_DSP_IRQ9_STS2_SHIFT 8 -#define MADERA_DSP_IRQ9_STS2_WIDTH 1 -#define MADERA_DSP_IRQ8_STS2 0x0080 -#define MADERA_DSP_IRQ8_STS2_MASK 0x0080 -#define MADERA_DSP_IRQ8_STS2_SHIFT 7 -#define MADERA_DSP_IRQ8_STS2_WIDTH 1 -#define MADERA_DSP_IRQ7_STS2 0x0040 -#define MADERA_DSP_IRQ7_STS2_MASK 0x0040 -#define MADERA_DSP_IRQ7_STS2_SHIFT 6 -#define MADERA_DSP_IRQ7_STS2_WIDTH 1 -#define MADERA_DSP_IRQ6_STS2 0x0020 -#define MADERA_DSP_IRQ6_STS2_MASK 0x0020 -#define MADERA_DSP_IRQ6_STS2_SHIFT 5 -#define MADERA_DSP_IRQ6_STS2_WIDTH 1 -#define MADERA_DSP_IRQ5_STS2 0x0010 -#define MADERA_DSP_IRQ5_STS2_MASK 0x0010 -#define MADERA_DSP_IRQ5_STS2_SHIFT 4 -#define MADERA_DSP_IRQ5_STS2_WIDTH 1 -#define MADERA_DSP_IRQ4_STS2 0x0008 -#define MADERA_DSP_IRQ4_STS2_MASK 0x0008 -#define MADERA_DSP_IRQ4_STS2_SHIFT 3 -#define MADERA_DSP_IRQ4_STS2_WIDTH 1 -#define MADERA_DSP_IRQ3_STS2 0x0004 -#define MADERA_DSP_IRQ3_STS2_MASK 0x0004 -#define MADERA_DSP_IRQ3_STS2_SHIFT 2 -#define MADERA_DSP_IRQ3_STS2_WIDTH 1 -#define MADERA_DSP_IRQ2_STS2 0x0002 -#define MADERA_DSP_IRQ2_STS2_MASK 0x0002 -#define MADERA_DSP_IRQ2_STS2_SHIFT 1 -#define MADERA_DSP_IRQ2_STS2_WIDTH 1 -#define MADERA_DSP_IRQ1_STS2 0x0001 -#define MADERA_DSP_IRQ1_STS2_MASK 0x0001 -#define MADERA_DSP_IRQ1_STS2_SHIFT 0 -#define MADERA_DSP_IRQ1_STS2_WIDTH 1 - -/* (0x198B) IRQ2_Raw_Status_12 */ -#define MADERA_SPKOUTR_SC_STS2 0x0080 -#define MADERA_SPKOUTR_SC_STS2_MASK 0x0080 -#define MADERA_SPKOUTR_SC_STS2_SHIFT 7 -#define MADERA_SPKOUTR_SC_STS2_WIDTH 1 -#define MADERA_SPKOUTL_SC_STS2 0x0040 -#define MADERA_SPKOUTL_SC_STS2_MASK 0x0040 -#define MADERA_SPKOUTL_SC_STS2_SHIFT 6 -#define MADERA_SPKOUTL_SC_STS2_WIDTH 1 -#define MADERA_HP3R_SC_STS2 0x0020 -#define MADERA_HP3R_SC_STS2_MASK 0x0020 -#define MADERA_HP3R_SC_STS2_SHIFT 5 -#define MADERA_HP3R_SC_STS2_WIDTH 1 -#define MADERA_HP3L_SC_STS2 0x0010 -#define MADERA_HP3L_SC_STS2_MASK 0x0010 -#define MADERA_HP3L_SC_STS2_SHIFT 4 -#define MADERA_HP3L_SC_STS2_WIDTH 1 -#define MADERA_HP2R_SC_STS2 0x0008 -#define MADERA_HP2R_SC_STS2_MASK 0x0008 -#define MADERA_HP2R_SC_STS2_SHIFT 3 -#define MADERA_HP2R_SC_STS2_WIDTH 1 -#define MADERA_HP2L_SC_STS2 0x0004 -#define MADERA_HP2L_SC_STS2_MASK 0x0004 -#define MADERA_HP2L_SC_STS2_SHIFT 2 -#define MADERA_HP2L_SC_STS2_WIDTH 1 -#define MADERA_HP1R_SC_STS2 0x0002 -#define MADERA_HP1R_SC_STS2_MASK 0x0002 -#define MADERA_HP1R_SC_STS2_SHIFT 1 -#define MADERA_HP1R_SC_STS2_WIDTH 1 -#define MADERA_HP1L_SC_STS2 0x0001 -#define MADERA_HP1L_SC_STS2_MASK 0x0001 -#define MADERA_HP1L_SC_STS2_SHIFT 0 -#define MADERA_HP1L_SC_STS2_WIDTH 1 - -/* (0x198C) IRQ2_Raw_Status_13 */ -#define MADERA_SPKOUTR_ENABLE_DONE_STS2 0x0080 -#define MADERA_SPKOUTR_ENABLE_DONE_STS2_MASK 0x0080 -#define MADERA_SPKOUTR_ENABLE_DONE_STS2_SHIFT 7 -#define MADERA_SPKOUTR_ENABLE_DONE_STS2_WIDTH 1 -#define MADERA_SPKOUTL_ENABLE_DONE_STS2 0x0040 -#define MADERA_SPKOUTL_ENABLE_DONE_STS2_MASK 0x0040 -#define MADERA_SPKOUTL_ENABLE_DONE_STS2_SHIFT 6 -#define MADERA_SPKOUTL_ENABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP3R_ENABLE_DONE_STS2 0x0020 -#define MADERA_HP3R_ENABLE_DONE_STS2_MASK 0x0020 -#define MADERA_HP3R_ENABLE_DONE_STS2_SHIFT 5 -#define MADERA_HP3R_ENABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP3L_ENABLE_DONE_STS2 0x0010 -#define MADERA_HP3L_ENABLE_DONE_STS2_MASK 0x0010 -#define MADERA_HP3L_ENABLE_DONE_STS2_SHIFT 4 -#define MADERA_HP3L_ENABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP2R_ENABLE_DONE_STS2 0x0008 -#define MADERA_HP2R_ENABLE_DONE_STS2_MASK 0x0008 -#define MADERA_HP2R_ENABLE_DONE_STS2_SHIFT 3 -#define MADERA_HP2R_ENABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP2L_ENABLE_DONE_STS2 0x0004 -#define MADERA_HP2L_ENABLE_DONE_STS2_MASK 0x0004 -#define MADERA_HP2L_ENABLE_DONE_STS2_SHIFT 2 -#define MADERA_HP2L_ENABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP1R_ENABLE_DONE_STS2 0x0002 -#define MADERA_HP1R_ENABLE_DONE_STS2_MASK 0x0002 -#define MADERA_HP1R_ENABLE_DONE_STS2_SHIFT 1 -#define MADERA_HP1R_ENABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP1L_ENABLE_DONE_STS2 0x0001 -#define MADERA_HP1L_ENABLE_DONE_STS2_MASK 0x0001 -#define MADERA_HP1L_ENABLE_DONE_STS2_SHIFT 0 -#define MADERA_HP1L_ENABLE_DONE_STS2_WIDTH 1 - -/* (0x198D) IRQ2_Raw_Status_14 */ -#define MADERA_SPKOUTR_DISABLE_DONE_STS2 0x0080 -#define MADERA_SPKOUTR_DISABLE_DONE_STS2_MASK 0x0080 -#define MADERA_SPKOUTR_DISABLE_DONE_STS2_SHIFT 7 -#define MADERA_SPKOUTR_DISABLE_DONE_STS2_WIDTH 1 -#define MADERA_SPKOUTL_DISABLE_DONE_STS2 0x0040 -#define MADERA_SPKOUTL_DISABLE_DONE_STS2_MASK 0x0040 -#define MADERA_SPKOUTL_DISABLE_DONE_STS2_SHIFT 6 -#define MADERA_SPKOUTL_DISABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP3R_DISABLE_DONE_STS2 0x0020 -#define MADERA_HP3R_DISABLE_DONE_STS2_MASK 0x0020 -#define MADERA_HP3R_DISABLE_DONE_STS2_SHIFT 5 -#define MADERA_HP3R_DISABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP3L_DISABLE_DONE_STS2 0x0010 -#define MADERA_HP3L_DISABLE_DONE_STS2_MASK 0x0010 -#define MADERA_HP3L_DISABLE_DONE_STS2_SHIFT 4 -#define MADERA_HP3L_DISABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP2R_DISABLE_DONE_STS2 0x0008 -#define MADERA_HP2R_DISABLE_DONE_STS2_MASK 0x0008 -#define MADERA_HP2R_DISABLE_DONE_STS2_SHIFT 3 -#define MADERA_HP2R_DISABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP2L_DISABLE_DONE_STS2 0x0004 -#define MADERA_HP2L_DISABLE_DONE_STS2_MASK 0x0004 -#define MADERA_HP2L_DISABLE_DONE_STS2_SHIFT 2 -#define MADERA_HP2L_DISABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP1R_DISABLE_DONE_STS2 0x0002 -#define MADERA_HP1R_DISABLE_DONE_STS2_MASK 0x0002 -#define MADERA_HP1R_DISABLE_DONE_STS2_SHIFT 1 -#define MADERA_HP1R_DISABLE_DONE_STS2_WIDTH 1 -#define MADERA_HP1L_DISABLE_DONE_STS2 0x0001 -#define MADERA_HP1L_DISABLE_DONE_STS2_MASK 0x0001 -#define MADERA_HP1L_DISABLE_DONE_STS2_SHIFT 0 -#define MADERA_HP1L_DISABLE_DONE_STS2_WIDTH 1 - -/* (0x198E) IRQ2_Raw_Status_15 */ -#define MADERA_SPK_OVERHEAT_WARN_STS2 0x0004 -#define MADERA_SPK_OVERHEAT_WARN_STS2_MASK 0x0004 -#define MADERA_SPK_OVERHEAT_WARN_STS2_SHIFT 2 -#define MADERA_SPK_OVERHEAT_WARN_STS2_WIDTH 1 -#define MADERA_SPK_OVERHEAT_STS2 0x0002 -#define MADERA_SPK_OVERHEAT_STS2_MASK 0x0002 -#define MADERA_SPK_OVERHEAT_STS2_SHIFT 1 -#define MADERA_SPK_OVERHEAT_STS2_WIDTH 1 -#define MADERA_SPK_SHUTDOWN_STS2 0x0001 -#define MADERA_SPK_SHUTDOWN_STS2_MASK 0x0001 -#define MADERA_SPK_SHUTDOWN_STS2_SHIFT 0 -#define MADERA_SPK_SHUTDOWN_STS2_WIDTH 1 - -/* (0x1A06) Interrupt_Debounce_7 */ -#define MADERA_MICD_CLAMP_DB 0x0010 -#define MADERA_MICD_CLAMP_DB_MASK 0x0010 -#define MADERA_MICD_CLAMP_DB_SHIFT 4 -#define MADERA_MICD_CLAMP_DB_WIDTH 1 -#define MADERA_JD2_DB 0x0004 -#define MADERA_JD2_DB_MASK 0x0004 -#define MADERA_JD2_DB_SHIFT 2 -#define MADERA_JD2_DB_WIDTH 1 -#define MADERA_JD1_DB 0x0001 -#define MADERA_JD1_DB_MASK 0x0001 -#define MADERA_JD1_DB_SHIFT 0 -#define MADERA_JD1_DB_WIDTH 1 - -/* (0x1A0E) Interrupt_Debounce_15 */ -#define MADERA_SPK_OVERHEAT_WARN_DB 0x0004 -#define MADERA_SPK_OVERHEAT_WARN_DB_MASK 0x0004 -#define MADERA_SPK_OVERHEAT_WARN_DB_SHIFT 2 -#define MADERA_SPK_OVERHEAT_WARN_DB_WIDTH 1 -#define MADERA_SPK_OVERHEAT_DB 0x0002 -#define MADERA_SPK_OVERHEAT_DB_MASK 0x0002 -#define MADERA_SPK_OVERHEAT_DB_SHIFT 1 -#define MADERA_SPK_OVERHEAT_DB_WIDTH 1 - -/* (0x1A80) IRQ1_CTRL */ -#define MADERA_IM_IRQ1 0x0800 -#define MADERA_IM_IRQ1_MASK 0x0800 -#define MADERA_IM_IRQ1_SHIFT 11 -#define MADERA_IM_IRQ1_WIDTH 1 -#define MADERA_IRQ_POL 0x0400 -#define MADERA_IRQ_POL_MASK 0x0400 -#define MADERA_IRQ_POL_SHIFT 10 -#define MADERA_IRQ_POL_WIDTH 1 - -/* (0x20004) OTP_HPDET_Cal_1 */ -#define MADERA_OTP_HPDET_CALIB_OFFSET_11 0xFF000000 -#define MADERA_OTP_HPDET_CALIB_OFFSET_11_MASK 0xFF000000 -#define MADERA_OTP_HPDET_CALIB_OFFSET_11_SHIFT 24 -#define MADERA_OTP_HPDET_CALIB_OFFSET_11_WIDTH 8 -#define MADERA_OTP_HPDET_CALIB_OFFSET_10 0x00FF0000 -#define MADERA_OTP_HPDET_CALIB_OFFSET_10_MASK 0x00FF0000 -#define MADERA_OTP_HPDET_CALIB_OFFSET_10_SHIFT 16 -#define MADERA_OTP_HPDET_CALIB_OFFSET_10_WIDTH 8 -#define MADERA_OTP_HPDET_CALIB_OFFSET_01 0x0000FF00 -#define MADERA_OTP_HPDET_CALIB_OFFSET_01_MASK 0x0000FF00 -#define MADERA_OTP_HPDET_CALIB_OFFSET_01_SHIFT 8 -#define MADERA_OTP_HPDET_CALIB_OFFSET_01_WIDTH 8 -#define MADERA_OTP_HPDET_CALIB_OFFSET_00 0x000000FF -#define MADERA_OTP_HPDET_CALIB_OFFSET_00_MASK 0x000000FF -#define MADERA_OTP_HPDET_CALIB_OFFSET_00_SHIFT 0 -#define MADERA_OTP_HPDET_CALIB_OFFSET_00_WIDTH 8 - -/* (0x20006) OTP_HPDET_Cal_2 */ -#define MADERA_OTP_HPDET_GRADIENT_1X 0x0000FF00 -#define MADERA_OTP_HPDET_GRADIENT_1X_MASK 0x0000FF00 -#define MADERA_OTP_HPDET_GRADIENT_1X_SHIFT 8 -#define MADERA_OTP_HPDET_GRADIENT_1X_WIDTH 8 -#define MADERA_OTP_HPDET_GRADIENT_0X 0x000000FF -#define MADERA_OTP_HPDET_GRADIENT_0X_MASK 0x000000FF -#define MADERA_OTP_HPDET_GRADIENT_0X_SHIFT 0 -#define MADERA_OTP_HPDET_GRADIENT_0X_WIDTH 8 - -#endif diff --git a/include/linux/regulator/madera-ldo1.h b/include/linux/regulator/madera-ldo1.h deleted file mode 100644 index ab3a515cb15f..000000000000 --- a/include/linux/regulator/madera-ldo1.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Platform data for Madera codecs LDO1 regulator - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _MADERA_LDO1_H_ -#define _MADERA_LDO1_H_ - -struct regulator_init_data; - -struct madera_ldo1_pdata { - /** GPIO controlling LODENA, if any */ - int ldoena; - - /** Regulator configuration for LDO1 */ - const struct regulator_init_data *init_data; -}; - -#endif diff --git a/include/linux/regulator/madera-micsupp.h b/include/linux/regulator/madera-micsupp.h deleted file mode 100644 index 121cc81e7d15..000000000000 --- a/include/linux/regulator/madera-micsupp.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Platform data for Madera codecs MICSUPP regulator - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _MADERA_MICSUPP_H_ -#define _MADERA_MICSUPP_H_ - -struct regulator_init_data; - -struct madera_micsupp_pdata { - /** Regulator configuration for MICSUPP */ - const struct regulator_init_data *init_data; -}; - -#endif diff --git a/include/sound/cs35l35.h b/include/sound/cs35l35.h deleted file mode 100644 index ee91af4bd3b0..000000000000 --- a/include/sound/cs35l35.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * linux/sound/cs35l35.h -- Platform data for CS35l35 - * - * Copyright (c) 2016 Cirrus Logic Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __CS35L35_H -#define __CS35L35_H - -struct classh_cfg { - /* - * Class H Algorithm Control Variables - * You can either have it done - * automatically or you can adjust - * these variables for tuning - * - * if you do not enable the internal algorithm - * you will get a set of mixer controls for - * Class H tuning - * - * Section 4.3 of the datasheet - */ - /* Internal ClassH Algorithm */ - bool classh_bst_override; - bool classh_algo_enable; - int classh_bst_max_limit; - int classh_mem_depth; - int classh_release_rate; - int classh_headroom; - int classh_wk_fet_disable; - int classh_wk_fet_delay; - int classh_wk_fet_thld; - int classh_vpch_auto; - int classh_vpch_rate; - int classh_vpch_man; -}; - -struct monitor_cfg { - /* - * Signal Monitor Data - * highly configurable signal monitoring - * data positioning and different types of - * monitoring data. - * - * Section 4.8.2 - 4.8.4 of the datasheet - */ - bool is_present; - bool imon_specs; - bool vmon_specs; - bool vpmon_specs; - bool vbstmon_specs; - bool vpbrstat_specs; - bool zerofill_specs; - u8 imon_dpth; - u8 imon_loc; - u8 imon_frm; - u8 vmon_dpth; - u8 vmon_loc; - u8 vmon_frm; - u8 vpmon_dpth; - u8 vpmon_loc; - u8 vpmon_frm; - u8 vbstmon_dpth; - u8 vbstmon_loc; - u8 vbstmon_frm; - u8 vpbrstat_dpth; - u8 vpbrstat_loc; - u8 vpbrstat_frm; - u8 zerofill_dpth; - u8 zerofill_loc; - u8 zerofill_frm; -}; - -struct cs35l35_platform_data { - - /* Stereo (2 Device) */ - bool stereo; - /* serial port drive strength */ - int sp_drv_str; - /* Boost Power Down with FET */ - bool bst_pdn_fet_on; - /* Boost Voltage : used if ClassH Algo Enabled */ - int bst_vctl; - /* Amp Gain Zero Cross */ - bool gain_zc; - /* Audio Input Location */ - int aud_channel; - /* Advisory Input Location */ - int adv_channel; - /* Shared Boost for stereo */ - bool shared_bst; - /* ClassH Algorithm */ - struct classh_cfg classh_algo; - /* Monitor Config */ - struct monitor_cfg mon_cfg; -}; - -#endif /* __CS35L35_H */ diff --git a/include/sound/cs35l36.h b/include/sound/cs35l36.h deleted file mode 100644 index acc2b7415205..000000000000 --- a/include/sound/cs35l36.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * linux/sound/cs35l36.h -- Platform data for CS35L36 - * - * Copyright (c) 2016 Cirrus Logic Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __CS35L36_H -#define __CS35L36_H - -/* INT/GPIO pin configuration */ -struct irq_cfg { - bool is_present; - int irq_drv_sel; - int irq_pol; - int irq_gpio_sel; - int irq_out_en; - int irq_src_sel; -}; - -struct cs35l36_platform_data { - bool sclk_frc; - bool lrclk_frc; - bool multi_amp_mode; - bool dcm_mode; - int ldm_mode_sel; - bool amp_gain_zc; - bool amp_pcm_inv; - bool pdm_ldm_exit; - bool pdm_ldm_enter; - bool imon_pol_inv; - bool vmon_pol_inv; - int boost_ind; - int bst_vctl; - int bst_vctl_sel; - int bst_ipk; - int vpr_en; - int vpr_thrld; - int vpr_atk_vol; - int vpr_atk_rate; - int vpr_wait; - int vpr_rel_rate; - bool extern_boost; - int temp_warn_thld; - struct irq_cfg irq_config; -}; - -#endif /* __CS35L36_H */ diff --git a/include/sound/cs35l41.h b/include/sound/cs35l41.h deleted file mode 100644 index e2e3316ef1c8..000000000000 --- a/include/sound/cs35l41.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * linux/sound/cs35l41.h -- Platform data for CS35L41 - * - * Copyright (c) 2018 Cirrus Logic Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __CS35L41_H -#define __CS35L41_H - -struct classh_cfg { - bool classh_bst_override; - bool classh_algo_enable; - int classh_bst_max_limit; - int classh_mem_depth; - int classh_release_rate; - int classh_headroom; - int classh_wk_fet_delay; - int classh_wk_fet_thld; -}; - -struct irq_cfg { - bool is_present; - bool irq_pol_inv; - bool irq_out_en; - int irq_src_sel; -}; - -struct cs35l41_platform_data { - bool sclk_frc; - bool lrclk_frc; - bool right_channel; - bool amp_gain_zc; - bool ng_enable; - int bst_ind; - int bst_vctrl; - int bst_ipk; - int bst_cap; - int temp_warn_thld; - int ng_pcm_thld; - int ng_delay; - int dout_hiz; - struct irq_cfg irq_config1; - struct irq_cfg irq_config2; - struct classh_cfg classh_config; -}; - -struct cs35l41_private { - struct wm_adsp dsp; /* needs to be first member */ - struct snd_soc_codec *codec; - struct cs35l41_platform_data pdata; - struct device *dev; - struct regmap *regmap; - struct regulator_bulk_data supplies[2]; - int num_supplies; - int irq; - int clksrc; - int extclk_freq; - int extclk_cfg; - int sclk; - unsigned int cspl_cmd; - unsigned int gpi_glob_en; - bool dspa_mode; - bool i2s_mode; - bool swire_mode; - bool halo_booted; - bool enabled; - bool bus_spi; - struct mutex rate_lock; - /* GPIO for /RST */ - struct gpio_desc *reset_gpio; - struct completion global_pup_done; - struct completion global_pdn_done; -}; - -int cs35l41_probe(struct cs35l41_private *cs35l41, - struct cs35l41_platform_data *pdata); - -#endif /* __CS35L41_H */ diff --git a/include/sound/madera-pdata.h b/include/sound/madera-pdata.h deleted file mode 100644 index 2ed1850823ba..000000000000 --- a/include/sound/madera-pdata.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Platform data for Madera codec driver - * - * Copyright 2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _MADERA_CODEC_PDATA_H -#define _MADERA_CODEC_PDATA_H - -#include -#include - -#define MADERA_MAX_INPUT 6 -#define MADERA_MAX_MUXED_CHANNELS 4 -#define MADERA_MAX_OUTPUT 6 -#define MADERA_MAX_AIF 4 -#define MADERA_MAX_PDM_SPK 2 -#define MADERA_MAX_DSP 7 - -struct madera_codec_pdata { - /** - * Maximum number of channels that clocks will be generated for, - * useful for systems where an I2S bus with multiple data - * lines is mastered. - */ - int max_channels_clocked[MADERA_MAX_AIF]; - - /** Reference voltage for DMIC inputs */ - int dmic_ref[MADERA_MAX_INPUT]; - - /** Clock Source for DMICs - * The meaning of the values here depends on the codec. See the - * datasheet for a list of valid values for the INn_DMIC_SUP fields - * [0] = IN1, [1]=IN2 [2]=IN3 - */ - int dmic_clksrc[MADERA_MAX_INPUT]; - - /** Mode of input structures - * One of the MADERA_INMODE_xxx values - * Two-dimensional array [input_number][channel number] - * Four slots per input in the order: - * [n][0]=INnAL [n][1]=INnAR [n][2]=INnBL [n][3]=INnBR - */ - int inmode[MADERA_MAX_INPUT][MADERA_MAX_MUXED_CHANNELS]; - - /** Output mono mode control - * For each output set the value to TRUE to indicate that - * the output is mono - * [0]=OUT1, [1]=OUT2, ... - */ - bool out_mono[MADERA_MAX_OUTPUT]; - - /** PDM mute control settings. - * See the PDM_SPKn_CTRL_1 register in the datasheet for the - * meaning of the values. - */ - unsigned int pdm_mute[MADERA_MAX_PDM_SPK]; - - /** PDM speaker format - * See the PDM_SPKn_FMT field in the datasheet for the - * meaning of the values - */ - unsigned int pdm_fmt[MADERA_MAX_PDM_SPK]; - - /** Override default list of firmwares */ - struct wm_adsp_fw_defs *fw_defs[MADERA_MAX_DSP]; - int num_fw_defs[MADERA_MAX_DSP]; -}; - -#endif diff --git a/sound/soc/codecs/Android.mk b/sound/soc/codecs/Android.mk index 5bea2772df7f..d70a812aef86 100644 --- a/sound/soc/codecs/Android.mk +++ b/sound/soc/codecs/Android.mk @@ -1,59 +1,6 @@ DLKM_DIR := motorola/kernel/modules LOCAL_PATH := $(call my-dir) -include $(CLEAR_VARS) -LOCAL_MODULE := cirrus_madera.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - -include $(CLEAR_VARS) -LOCAL_MODULE := cirrus_wm_adsp.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - -include $(CLEAR_VARS) -LOCAL_MODULE := cirrus_cs35l35.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - -include $(CLEAR_VARS) -LOCAL_MODULE := cirrus_cs35l36.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - -include $(CLEAR_VARS) -LOCAL_MODULE := cirrus_cs47l35.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - -include $(CLEAR_VARS) -LOCAL_MODULE := cirrus_cs47l90.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - -include $(CLEAR_VARS) -LOCAL_MODULE := aov_trigger.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - -include $(CLEAR_VARS) -ifeq ($(CIRRUS_AMP_CODEC),cs35l41_spi) -KERNEL_CFLAGS += CONFIG_SND_SOC_CS35L41_SPI=y -else ifeq ($(CIRRUS_AMP_CODEC),cs35l41_i2c) -KERNEL_CFLAGS += CONFIG_SND_SOC_CS35L41_I2C=y -endif -LOCAL_MODULE := cirrus_cs35l41.ko -LOCAL_MODULE_TAGS := optional -LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT) -include $(DLKM_DIR)/AndroidKernelModule.mk - include $(CLEAR_VARS) LOCAL_MODULE := cirrus_playback.ko LOCAL_MODULE_TAGS := optional diff --git a/sound/soc/codecs/Kbuild b/sound/soc/codecs/Kbuild index 2307f9e7ae43..7b3b515e1c85 100644 --- a/sound/soc/codecs/Kbuild +++ b/sound/soc/codecs/Kbuild @@ -14,7 +14,6 @@ EXTRA_CFLAGS += -I$(TOP)/kernel/techpack/audio/include EXTRA_CFLAGS += -I$(TOP)/kernel/techpack/audio/include/uapi endif -EXTRA_CFLAGS += -DCONFIG_SND_SOC_AOV_TRIGGER ifneq (,$(filter channel%, $(TARGET_PRODUCT))) EXTRA_CFLAGS += -DCONFIG_TAS2560_REGMAP -DCONFIG_TAS2560_CODEC -DCONFIG_TAS2560_MISC -DCONFIG_SND_SOC_TAS2560 @@ -31,34 +30,6 @@ EXTRA_CFLAGS += -DTFA98XX_GIT_VERSIONS=\"$(GIT_VERSION)\" EXTRA_CFLAGS += -DTFA9874_NONDSP_STEREO EXTRA_CFLAGS += -I$(TOP)/motorola/kernel/modules/sound/soc/codecs/inc EXTRA_CFLAGS += -Werror -cirrus_madera-objs = madera.o madera-slimbus.o -obj-m += cirrus_madera.o - -cirrus_wm_adsp-objs = wm_adsp.o -obj-m += cirrus_wm_adsp.o - -cirrus_cs35l35-objs = cs35l35.o -obj-m += cirrus_cs35l35.o - -cirrus_cs35l36-objs = cs35l36.o cs35l36-tables.o -obj-m += cirrus_cs35l36.o - -cirrus_cs47l35-objs = cs47l35.o -obj-m += cirrus_cs47l35.o - -cirrus_cs47l90-objs = cs47l90.o -obj-m += cirrus_cs47l90.o - -obj-m += aov_trigger.o - -cirrus_cs35l41-objs = cs35l41.o cs35l41-tables.o -obj-m += cirrus_cs35l41.o - -ifneq ($(filter m y,$(CONFIG_SND_SOC_CS35L41_SPI)),) - cirrus_cs35l41-objs += cs35l41-spi.o -else - cirrus_cs35l41-objs += cs35l41-i2c.o -endif cirrus_playback-objs = msm-cirrus-playback.o obj-m += cirrus_playback.o diff --git a/sound/soc/codecs/aov_trigger.c b/sound/soc/codecs/aov_trigger.c deleted file mode 100644 index 469a3545b62a..000000000000 --- a/sound/soc/codecs/aov_trigger.c +++ /dev/null @@ -1,313 +0,0 @@ -/* - * Copyright (c) 2014, Motorola Mobility, LLC. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -// #include -#include -#include "madera.h" - -#define MAX_DSP_TO_CHECK 4 -#define MAX_NUM_PANIC_CODE 4 - -struct dsp_event_info { - int panic; - int event; - u16 panic_code[MAX_NUM_PANIC_CODE]; -}; -static bool aov_trigger_active; -static struct kobject aov_trigger_kobj; -static struct snd_soc_codec *aov_codec; -static struct notifier_block aov_trigger_nb; -static struct wakeup_source aov_wake_src; - -static struct dsp_event_info dsp_info[MAX_DSP_TO_CHECK]; -static DEFINE_MUTEX(dsp_info_mutex); - -static struct attribute aov_sysfs_attr_trigger = { - .name = "trigger", - .mode = S_IRUSR | S_IRGRP -}; - -static struct attribute aov_sysfs_attr_register = { - .name = "register", - .mode = S_IWUSR | S_IWGRP -}; - -static struct attribute aov_sysfs_attr_event = { - .name = "event", - .mode = S_IRUSR | S_IRGRP -}; - -static const char *reg_cmd = "register"; -static const char *unreg_cmd = "unregister"; - -static int aov_trigger_notify(struct notifier_block *nb, - unsigned long event, void *data) -{ - struct madera_voice_trigger_info *trig_info = data; - int dsp; - - if (aov_codec == NULL) - return -EPERM; - /* - * Once a trigger is received, unregister from - * trigger notification. Client needs to re-arm - * the rigger. - */ - - dev_dbg(aov_codec->dev, "received madera notity event: 0x%lx", event); - if ((event == MADERA_NOTIFY_VOICE_TRIGGER) && - (trig_info->core_num >= 0) && - (trig_info->core_num < MAX_DSP_TO_CHECK)) { - - dsp = trig_info->core_num; - - switch (trig_info->code) { - case MADERA_TRIGGER_VOICE: - if (!aov_trigger_active) - return 0; - aov_trigger_active = false; - dev_info(aov_codec->dev, - "DSP%d: notify aov trigger.", dsp); - sysfs_notify(&aov_trigger_kobj, NULL, - aov_sysfs_attr_trigger.name); - __pm_wakeup_event(&aov_wake_src, 500); - break; - case MADERA_TRIGGER_TEXT: - mutex_lock(&dsp_info_mutex); - dsp_info[dsp].event = 1; - mutex_unlock(&dsp_info_mutex); - dev_info(aov_codec->dev, - "DSP%d: aov notify text event.", dsp); - sysfs_notify(&aov_trigger_kobj, NULL, - aov_sysfs_attr_event.name); - break; - case MADERA_TRIGGER_PANIC: - mutex_lock(&dsp_info_mutex); - dsp_info[dsp].panic = 1; - memcpy(dsp_info[dsp].panic_code, trig_info->err_msg, - sizeof(u16) * MAX_NUM_PANIC_CODE); - mutex_unlock(&dsp_info_mutex); - dev_info(aov_codec->dev, - "DSP%d: aov notify panic.", dsp); - sysfs_notify(&aov_trigger_kobj, NULL, - aov_sysfs_attr_event.name); - break; - } - } - - return 0; -} - -static void aov_register_trigger(void) -{ - if (aov_codec == NULL) - return; - aov_trigger_active = true; - dev_dbg(aov_codec->dev, "registered aov trigger."); -} - -static void aov_unregister_trigger(void) -{ - if (aov_codec == NULL) - return; - aov_trigger_active = false; - dev_dbg(aov_codec->dev, "unregistered aov trigger."); -} - -static void aov_sysfs_release(struct kobject *kobj) -{ - aov_codec = NULL; -} - -static ssize_t aov_sysfs_show(struct kobject *kobj, - struct attribute *attr, char *buf) -{ - int i, j; - int count; - char *ptr = buf; - - if (attr != &aov_sysfs_attr_event) - return 0; - - mutex_lock(&dsp_info_mutex); - for (i = 0; i < MAX_DSP_TO_CHECK; i++) { - count = scnprintf(ptr, PAGE_SIZE - (ptr - buf), - "dsp %d: panic:%d event:%d code:", - i, dsp_info[i].panic, dsp_info[i].event); - ptr += count; - for (j = 0; j < MAX_NUM_PANIC_CODE; j++) { - count = scnprintf(ptr, PAGE_SIZE - (ptr - buf), - "%04x", dsp_info[i].panic_code[j]); - ptr += count; - } - count = scnprintf(ptr, PAGE_SIZE - (ptr - buf), "\n"); - ptr += count; - } - memset(dsp_info, 0, sizeof(struct dsp_event_info) * MAX_DSP_TO_CHECK); - mutex_unlock(&dsp_info_mutex); - - return ptr - buf; -} - -static ssize_t aov_sysfs_store(struct kobject *kobj, - struct attribute *attr, - const char *buf, size_t count) -{ - ssize_t ret = -EIO; - - if (attr != &aov_sysfs_attr_register) - return ret; - - if (!strncmp(reg_cmd, buf, strlen(reg_cmd))) { - aov_register_trigger(); - ret = count; - } else if (!strncmp(unreg_cmd, buf, strlen(unreg_cmd))) { - aov_unregister_trigger(); - ret = count; - } - return ret; -} - -static const struct sysfs_ops aov_sysfs_ops = { - .show = aov_sysfs_show, - .store = aov_sysfs_store, -}; - -static struct kobj_type ktype_aov_trigger = { - .sysfs_ops = &aov_sysfs_ops, - .default_attrs = NULL, - .release = aov_sysfs_release, -}; - -void aov_trigger_register_notifier(struct snd_soc_codec *codec) -{ - if (!aov_codec) { - aov_trigger_nb.notifier_call = aov_trigger_notify; - aov_codec = codec; - madera_register_notifier(aov_codec, &aov_trigger_nb); - } -} -EXPORT_SYMBOL_GPL(aov_trigger_register_notifier); - -static int aov_trigger_probe(struct platform_device *pdev) -{ - int ret = 0; - static int aov_trigger_init_called; - - if (aov_trigger_init_called) - return ret; - aov_trigger_init_called = 1; - - ret = kobject_init_and_add(&aov_trigger_kobj, - &ktype_aov_trigger, - kernel_kobj, "aov"); - if (ret) - goto exit; - - sysfs_attr_init(&aov_sysfs_attr_trigger); - ret = sysfs_create_file(&aov_trigger_kobj, - &aov_sysfs_attr_trigger); - if (ret) { - dev_err(&pdev->dev, - "%s: trigger node creation failed, ret=%d\n", - __func__, ret); - goto exit_remove_kobj; - } - - sysfs_attr_init(&aov_sysfs_attr_register); - ret = sysfs_create_file(&aov_trigger_kobj, - &aov_sysfs_attr_register); - if (ret) { - dev_err(&pdev->dev, - "%s: register node creation failed, ret=%d\n", - __func__, ret); - goto exit_remove_trigger; - } - - sysfs_attr_init(&aov_sysfs_attr_event); - ret = sysfs_create_file(&aov_trigger_kobj, - &aov_sysfs_attr_event); - if (ret) { - dev_err(&pdev->dev, - "%s: event node creation failed, ret=%d\n", - __func__, ret); - goto exit_remove_register; - } - - wakeup_source_init(&aov_wake_src, "aov_wakelock"); - - goto exit; - -exit_remove_register: - sysfs_remove_file(&aov_trigger_kobj, - &aov_sysfs_attr_register); -exit_remove_trigger: - sysfs_remove_file(&aov_trigger_kobj, - &aov_sysfs_attr_trigger); -exit_remove_kobj: - kobject_put(&aov_trigger_kobj); -exit: - return ret; -} - -static int aov_trigger_remove(struct platform_device *pdev) -{ - sysfs_remove_file(&aov_trigger_kobj, &aov_sysfs_attr_event); - sysfs_remove_file(&aov_trigger_kobj, &aov_sysfs_attr_register); - sysfs_remove_file(&aov_trigger_kobj, &aov_sysfs_attr_trigger); - wakeup_source_trash(&aov_wake_src); - kobject_del(&aov_trigger_kobj); - return 0; -} - -static struct of_device_id aov_trigger_match_table[] = { - { .compatible = "mmi,aov-trigger", - }, - {} -}; - -static struct platform_driver aov_trigger_driver = { - .probe = aov_trigger_probe, - .remove = aov_trigger_remove, - .driver = { - .name = "aov-trigger", - .of_match_table = of_match_ptr(aov_trigger_match_table), - .owner = THIS_MODULE, - }, -}; - -static int __init aov_trigger_init(void) -{ - return platform_driver_register(&aov_trigger_driver); -} - -static void __exit aov_trigger_exit(void) -{ - platform_driver_unregister(&aov_trigger_driver); -} - -module_init(aov_trigger_init); -module_exit(aov_trigger_exit); - -MODULE_DESCRIPTION("Motorola AOV trigger driver"); -MODULE_LICENSE("GPL"); - diff --git a/sound/soc/codecs/aov_trigger.h b/sound/soc/codecs/aov_trigger.h deleted file mode 100644 index 5ee0212a1086..000000000000 --- a/sound/soc/codecs/aov_trigger.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (c) 2014, Motorola Mobility, LLC. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#ifndef __AOV_TRIGGER_H -#define __AOV_TRIGGER_H - -struct snd_soc_codec; - -void aov_trigger_register_notifier(struct snd_soc_codec *codec); -#endif /* __AOV_TRIGGER_H */ diff --git a/sound/soc/codecs/cs35l35.c b/sound/soc/codecs/cs35l35.c deleted file mode 100644 index de92c2b42bb8..000000000000 --- a/sound/soc/codecs/cs35l35.c +++ /dev/null @@ -1,1656 +0,0 @@ -/* - * cs35l35.c -- CS35L35 ALSA SoC audio driver - * - * Copyright 2016 Cirrus Logic, Inc. - * - * Author: Brian Austin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "cs35l35.h" - -static const struct reg_default cs35l35_reg[] = { - {CS35L35_PWRCTL1, 0x01}, - {CS35L35_PWRCTL2, 0x11}, - {CS35L35_PWRCTL3, 0x00}, - {CS35L35_CLK_CTL1, 0x04}, - {CS35L35_CLK_CTL2, 0x10}, - {CS35L35_CLK_CTL3, 0xCF}, - {CS35L35_SP_FMT_CTL1, 0x20}, - {CS35L35_SP_FMT_CTL2, 0x00}, - {CS35L35_SP_FMT_CTL3, 0x02}, - {CS35L35_MAG_COMP_CTL, 0x00}, - {CS35L35_AMP_INP_DRV_CTL, 0x01}, - {CS35L35_AMP_DIG_VOL_CTL, 0x12}, - {CS35L35_AMP_DIG_VOL, 0x00}, - {CS35L35_ADV_DIG_VOL, 0x00}, - {CS35L35_PROTECT_CTL, 0x06}, - {CS35L35_AMP_GAIN_AUD_CTL, 0x13}, - {CS35L35_AMP_GAIN_PDM_CTL, 0x00}, - {CS35L35_AMP_GAIN_ADV_CTL, 0x00}, - {CS35L35_GPI_CTL, 0x00}, - {CS35L35_BST_CVTR_V_CTL, 0x00}, - {CS35L35_BST_PEAK_I, 0x07}, - {CS35L35_BST_RAMP_CTL, 0x85}, - {CS35L35_BST_CONV_COEF_1, 0x20}, - {CS35L35_BST_CONV_COEF_2, 0x20}, - {CS35L35_BST_CONV_SLOPE_COMP, 0x47}, - {CS35L35_BST_CONV_SW_FREQ, 0x04}, - {CS35L35_CLASS_H_CTL, 0x0B}, - {CS35L35_CLASS_H_HEADRM_CTL, 0x0B}, - {CS35L35_CLASS_H_RELEASE_RATE, 0x08}, - {CS35L35_CLASS_H_FET_DRIVE_CTL, 0x41}, - {CS35L35_CLASS_H_VP_CTL, 0xC5}, - {CS35L35_VPBR_CTL, 0x0A}, - {CS35L35_VPBR_VOL_CTL, 0x09}, - {CS35L35_VPBR_TIMING_CTL, 0x6A}, - {CS35L35_VPBR_MODE_VOL_CTL, 0x00}, - {CS35L35_SPKR_MON_CTL, 0xC0}, - {CS35L35_IMON_SCALE_CTL, 0x30}, - {CS35L35_AUDIN_RXLOC_CTL, 0x00}, - {CS35L35_ADVIN_RXLOC_CTL, 0x80}, - {CS35L35_VMON_TXLOC_CTL, 0x00}, - {CS35L35_IMON_TXLOC_CTL, 0x80}, - {CS35L35_VPMON_TXLOC_CTL, 0x04}, - {CS35L35_VBSTMON_TXLOC_CTL, 0x84}, - {CS35L35_VPBR_STATUS_TXLOC_CTL, 0x04}, - {CS35L35_ZERO_FILL_LOC_CTL, 0x00}, - {CS35L35_AUDIN_DEPTH_CTL, 0x0F}, - {CS35L35_SPKMON_DEPTH_CTL, 0x0F}, - {CS35L35_SUPMON_DEPTH_CTL, 0x0F}, - {CS35L35_ZEROFILL_DEPTH_CTL, 0x00}, - {CS35L35_MULT_DEV_SYNCH1, 0x02}, - {CS35L35_MULT_DEV_SYNCH2, 0x80}, - {CS35L35_PROT_RELEASE_CTL, 0x00}, - {CS35L35_DIAG_MODE_REG_LOCK, 0x00}, - {CS35L35_DIAG_MODE_CTL_1, 0x40}, - {CS35L35_DIAG_MODE_CTL_2, 0x00}, - {CS35L35_INT_MASK_1, 0xFF}, - {CS35L35_INT_MASK_2, 0xFF}, - {CS35L35_INT_MASK_3, 0xFF}, - {CS35L35_INT_MASK_4, 0xFF}, - -}; - -static bool cs35l35_volatile_register(struct device *dev, unsigned int reg) -{ - switch (reg) { - case CS35L35_DEVID_AB ... CS35L35_REV_ID: - case CS35L35_INT_STATUS_1: - case CS35L35_INT_STATUS_2: - case CS35L35_INT_STATUS_3: - case CS35L35_INT_STATUS_4: - case CS35L35_PLL_STATUS: - case CS35L35_OTP_TRIM_STATUS: - return true; - default: - return false; - } -} - -static bool cs35l35_readable_register(struct device *dev, unsigned int reg) -{ - switch (reg) { - case CS35L35_DEVID_AB ... CS35L35_PWRCTL3: - case CS35L35_CLK_CTL1 ... CS35L35_SP_FMT_CTL3: - case CS35L35_MAG_COMP_CTL ... CS35L35_AMP_GAIN_AUD_CTL: - case CS35L35_AMP_GAIN_PDM_CTL ... CS35L35_BST_PEAK_I: - case CS35L35_BST_RAMP_CTL ... CS35L35_BST_CONV_SW_FREQ: - case CS35L35_CLASS_H_CTL ... CS35L35_CLASS_H_VP_CTL: - case CS35L35_CLASS_H_STATUS: - case CS35L35_VPBR_CTL ... CS35L35_VPBR_MODE_VOL_CTL: - case CS35L35_VPBR_ATTEN_STATUS: - case CS35L35_SPKR_MON_CTL: - case CS35L35_IMON_SCALE_CTL ... CS35L35_ZEROFILL_DEPTH_CTL: - case CS35L35_MULT_DEV_SYNCH1 ... CS35L35_PROT_RELEASE_CTL: - case CS35L35_DIAG_MODE_REG_LOCK ... CS35L35_DIAG_MODE_CTL_2: - case CS35L35_INT_MASK_1 ... CS35L35_PLL_STATUS: - case CS35L35_OTP_TRIM_STATUS: - return true; - default: - return false; - } -} - -static bool cs35l35_precious_register(struct device *dev, unsigned int reg) -{ - switch (reg) { - case CS35L35_INT_STATUS_1: - case CS35L35_INT_STATUS_2: - case CS35L35_INT_STATUS_3: - case CS35L35_INT_STATUS_4: - case CS35L35_PLL_STATUS: - case CS35L35_OTP_TRIM_STATUS: - return true; - default: - return false; - } -} - -static int cs35l35_main_amp_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - unsigned int reg[4]; - int i; - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - regmap_update_bits(cs35l35->regmap, CS35L35_BST_CVTR_V_CTL, - CS35L35_BST_CTL_MASK, 0x41); - break; - case SND_SOC_DAPM_POST_PMU: - usleep_range(5000, 5100); - /* If PDM mode we must use VP - * for Voltage control - */ - if (cs35l35->pdm_mode) - regmap_update_bits(cs35l35->regmap, - CS35L35_BST_CVTR_V_CTL, - CS35L35_BST_CTL_MASK, - 0 << CS35L35_BST_CTL_SHIFT); - for (i = 0; i < 2; i++) - regmap_bulk_read(cs35l35->regmap, CS35L35_INT_STATUS_1, - ®, ARRAY_SIZE(reg)); - - regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, - CS35L35_AMP_MUTE_MASK, - 0 << CS35L35_AMP_MUTE_SHIFT); - break; - case SND_SOC_DAPM_PRE_PMD: - regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, - CS35L35_AMP_MUTE_MASK, 1 << CS35L35_AMP_MUTE_SHIFT); - regmap_update_bits(cs35l35->regmap, CS35L35_BST_CVTR_V_CTL, - CS35L35_BST_CTL_MASK, 0x00); - break; - case SND_SOC_DAPM_POST_PMD: - usleep_range(5000, 5100); - /* If PDM mode we should switch back to pdata value - * for Voltage control when we go down - */ - if (cs35l35->pdm_mode) - regmap_update_bits(cs35l35->regmap, - CS35L35_BST_CVTR_V_CTL, - CS35L35_BST_CTL_MASK, - cs35l35->pdata.bst_vctl - << CS35L35_BST_CTL_SHIFT); - - break; - default: - pr_err("Invalid event = 0x%x\n", event); - } - return 0; -} - -static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 0, 1, 1); -static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10200, 50, 0); - -static const struct snd_kcontrol_new cs35l35_aud_controls[] = { - SOC_SINGLE_SX_TLV("Digital Audio Volume", CS35L35_AMP_DIG_VOL, - 0, 0x34, 0xE4, dig_vol_tlv), - SOC_SINGLE_TLV("AMP Audio Gain", CS35L35_AMP_GAIN_AUD_CTL, 0, 19, 0, - amp_gain_tlv), - SOC_SINGLE_TLV("AMP PDM Gain", CS35L35_AMP_GAIN_PDM_CTL, 0, 19, 0, - amp_gain_tlv), -}; - -static const struct snd_kcontrol_new cs35l35_adv_controls[] = { - SOC_SINGLE_SX_TLV("Digital Advisory Volume", CS35L35_ADV_DIG_VOL, - 0, 0x34, 0xE4, dig_vol_tlv), - SOC_SINGLE_TLV("AMP Advisory Gain", CS35L35_AMP_GAIN_ADV_CTL, 0, 19, 0, - amp_gain_tlv), -}; - -static const char * const cs35l35_clksel_text[] = { - "MCLK", - "PDM", -}; - -static SOC_ENUM_SINGLE_DECL(clksel_enum, SND_SOC_NOPM, 0, - cs35l35_clksel_text); - -static const struct snd_kcontrol_new cs35l35_clksel_mux[] = { - SOC_DAPM_ENUM("CLKSEL Mux", clksel_enum), -}; - -static const char * const cs35l35_pdm_en_text[] = { - "On", - "Off", -}; - -static SOC_ENUM_SINGLE_DECL(pdm_en_enum, SND_SOC_NOPM, 0, - cs35l35_pdm_en_text); - -static const struct snd_kcontrol_new cs35l35_pdm_en_mux[] = { - SOC_DAPM_ENUM("PDM MUX", pdm_en_enum), -}; - -static int cs35l35_reset_and_sync(struct cs35l35_private *priv, bool pdm) -{ - int ret = 0; - - if (!priv->reset_gpio) - return 0; - - gpiod_set_value_cansleep(priv->reset_gpio, 0); - usleep_range(2000, 2100); - regcache_cache_only(priv->regmap, true); - gpiod_set_value_cansleep(priv->reset_gpio, 1); - usleep_range(1000, 1100); - regcache_cache_only(priv->regmap, true); - regcache_mark_dirty(priv->regmap); - - if (pdm) { - regmap_update_bits(priv->regmap, CS35L35_AMP_INP_DRV_CTL, - CS35L35_PDM_MODE_MASK, CS35L35_PDM_MODE_MASK); - ret = regmap_update_bits(priv->regmap, - CS35L35_CLK_CTL1, - CS35L35_CLK_SOURCE_MASK, - CS35L35_CLK_SOURCE_PDM); - if (ret != 0) - pr_err("%s regmap write failed %d\n", - __func__, ret); - - ret = regmap_update_bits(priv->regmap, - CS35L35_CLK_CTL2, CS35L35_CLK_DIV_MASK, 0); - if (ret != 0) - pr_err("%s regmap write failed %d\n", - __func__, ret); - - } else { - regmap_update_bits(priv->regmap, CS35L35_AMP_INP_DRV_CTL, - CS35L35_PDM_MODE_MASK, 0); - ret = regmap_update_bits(priv->regmap, - CS35L35_CLK_CTL1, - CS35L35_CLK_SOURCE_MASK, - 0); - if (ret != 0) - pr_err("%s regmap write failed %d\n", - __func__, ret); - ret = regmap_update_bits(priv->regmap, - CS35L35_CLK_CTL2, CS35L35_CLK_DIV_MASK, 1); - if (ret != 0) - pr_err("%s regmap write failed %d\n", - __func__, ret); - } - regcache_cache_only(priv->regmap, false); - regcache_sync(priv->regmap); - - return ret; -} - -static int cs35l35_mclk_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - int ret = 0; - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, - CS35L35_DISCHG_FILT_MASK, 0); - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, - CS35L35_PDN_ALL_MASK, 0); - break; - case SND_SOC_DAPM_PRE_PMU: - cs35l35->i2s_enabled = true; - regmap_update_bits(cs35l35->regmap, CS35L35_AMP_DIG_VOL_CTL, - 2, 2); - if (cs35l35->pdm_mclk_switch) { - cs35l35->pdm_mclk_switch = false; - return cs35l35_reset_and_sync(cs35l35, false); - } - break; - case SND_SOC_DAPM_PRE_PMD: - cs35l35->i2s_enabled = false; - if (cs35l35->pdm_mode) { - cs35l35->pdm_mclk_switch = true; - return cs35l35_reset_and_sync(cs35l35, true); - } else { - regmap_update_bits(cs35l35->regmap, - CS35L35_AMP_DIG_VOL_CTL, 2, 0); - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, - CS35L35_PDN_ALL_MASK, 1); - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, - CS35L35_DISCHG_FILT_MASK, - 1 << CS35L35_DISCHG_FILT_SHIFT); - usleep_range(4000, 4010); - ret = wait_for_completion_timeout(&cs35l35->pdn_done, - msecs_to_jiffies(100)); - if (ret == 0) { - pr_err("TIMEOUT PDN_DONE did not complete\n"); - ret = -ETIMEDOUT; - } - } - break; - default: - pr_err("%s Invalid Event %d\n", __func__, event); - return -EINVAL; - } - return ret; -} - -static int cs35l35_pdm_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - int ret; - - if (cs35l35->i2s_enabled) - return 0; - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - regmap_update_bits(cs35l35->regmap, CS35L35_AMP_DIG_VOL_CTL, - 2, 2); - if (!cs35l35->pdm_mclk_switch) { - cs35l35->pdm_mclk_switch = true; - return cs35l35_reset_and_sync(cs35l35, true); - } - regmap_update_bits(cs35l35->regmap, - CS35L35_CLK_CTL2, CS35L35_CLK_DIV_MASK, 0); - break; - case SND_SOC_DAPM_POST_PMU: - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, - CS35L35_DISCHG_FILT_MASK, 0); - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, - CS35L35_PDN_ALL_MASK, 0); - break; - case SND_SOC_DAPM_PRE_PMD: - regmap_update_bits(cs35l35->regmap, CS35L35_AMP_DIG_VOL_CTL, - 2, 0); - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, - CS35L35_PDN_ALL_MASK, 1); - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, - CS35L35_DISCHG_FILT_MASK, - 1 << CS35L35_DISCHG_FILT_SHIFT); - usleep_range(4000, 4010); - ret = wait_for_completion_timeout(&cs35l35->pdn_done, - msecs_to_jiffies(100)); - if (ret == 0) { - pr_err("TIMEOUT PDN_DONE did not complete in 100ms\n"); - ret = -ETIMEDOUT; - } - break; - default: - pr_err("%s Invalid Event %d\n", __func__, event); - return -EINVAL; - } - return 0; -} - -static const struct snd_soc_dapm_widget cs35l35_dapm_widgets[] = { - SND_SOC_DAPM_AIF_IN("SDIN", NULL, 0, CS35L35_PWRCTL3, 1, 1), - SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L35_PWRCTL3, 2, 1), - - SND_SOC_DAPM_SUPPLY_S("EXTCLK", 1, SND_SOC_NOPM, 0, 0, - cs35l35_mclk_event, SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - - SND_SOC_DAPM_SUPPLY_S("PDMCLK", 2, SND_SOC_NOPM, 0, 0, - cs35l35_pdm_event, SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - - SND_SOC_DAPM_SUPPLY("MSTRCLK", CS35L35_CLK_CTL1, 2, 1, - NULL, 0), - - SND_SOC_DAPM_OUTPUT("SPK"), - - SND_SOC_DAPM_INPUT("VP"), - SND_SOC_DAPM_INPUT("VBST"), - SND_SOC_DAPM_INPUT("ISENSE"), - SND_SOC_DAPM_INPUT("VSENSE"), - - SND_SOC_DAPM_PGA("MCLK Select", SND_SOC_NOPM, 0, 0, NULL, 0), - SND_SOC_DAPM_PGA("PDM Select", SND_SOC_NOPM, 0, 0, NULL, 0), - SND_SOC_DAPM_MUX("CLKSEL MUX", SND_SOC_NOPM, 0, 0, cs35l35_clksel_mux), - SND_SOC_DAPM_MUX("PDM Mux", SND_SOC_NOPM, 0, 0, cs35l35_pdm_en_mux), - - SND_SOC_DAPM_ADC("VMON ADC", NULL, CS35L35_PWRCTL2, 7, 1), - SND_SOC_DAPM_ADC("IMON ADC", NULL, CS35L35_PWRCTL2, 6, 1), - SND_SOC_DAPM_ADC("VPMON ADC", NULL, CS35L35_PWRCTL3, 3, 1), - SND_SOC_DAPM_ADC("VBSTMON ADC", NULL, CS35L35_PWRCTL3, 4, 1), - SND_SOC_DAPM_ADC("CLASS H", NULL, CS35L35_PWRCTL2, 5, 1), - - SND_SOC_DAPM_OUT_DRV_E("Main AMP", CS35L35_PWRCTL2, 0, 1, NULL, 0, - cs35l35_main_amp_event, SND_SOC_DAPM_PRE_PMU | - SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU | - SND_SOC_DAPM_PRE_PMD), - - SND_SOC_DAPM_OUT_DRV("RECT FET", CS35L35_PWRCTL2, 1, 0, NULL, 0), - SND_SOC_DAPM_OUT_DRV("BOOST", CS35L35_PWRCTL2, 2, 1, NULL, 0), -}; - -static const struct snd_soc_dapm_route cs35l35_audio_map[] = { - {"VPMON ADC", NULL, "VP"}, - {"VBSTMON ADC", NULL, "VBST"}, - {"IMON ADC", NULL, "ISENSE"}, - {"VMON ADC", NULL, "VSENSE"}, - {"SDOUT", NULL, "IMON ADC"}, - {"SDOUT", NULL, "VMON ADC"}, - {"SDOUT", NULL, "VBSTMON ADC"}, - {"SDOUT", NULL, "VPMON ADC"}, - {"AMP Capture", NULL, "SDOUT"}, - - {"SDIN", NULL, "AMP Playback"}, - {"CLASS H", NULL, "SDIN"}, - {"BOOST", NULL, "CLASS H"}, - {"MCLK Select", NULL, "BOOST"}, - {"Main AMP", NULL, "MCLK Select"}, - - {"PDM Mux", "On", "PDM Playback"}, - {"RECT FET", NULL, "PDM Mux"}, - {"PDM Select", NULL, "RECT FET"}, - {"CLKSEL MUX", "PDM", "PDM Select"}, - {"Main AMP", NULL, "CLKSEL MUX"}, - - {"SPK", NULL, "Main AMP"}, - - {"MCLK Select", NULL, "EXTCLK"}, - {"PDM Select", NULL, "PDMCLK"}, - {"MCLK Select", NULL, "MSTRCLK"}, - {"PDM Select", NULL, "MSTRCLK"}, -}; - -static int cs35l35_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) -{ - struct snd_soc_codec *codec = codec_dai->codec; - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { - case SND_SOC_DAIFMT_CBM_CFM: - regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, - CS35L35_MS_MASK, 1 << CS35L35_MS_SHIFT); - cs35l35->slave_mode = false; - break; - case SND_SOC_DAIFMT_CBS_CFS: - regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, - CS35L35_MS_MASK, 0 << CS35L35_MS_SHIFT); - cs35l35->slave_mode = true; - break; - default: - return -EINVAL; - } - - switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { - case SND_SOC_DAIFMT_DSP_A: - cs35l35->tdm_mode = true; - break; - case SND_SOC_DAIFMT_I2S: - break; - default: - return -EINVAL; - } - - return 0; -} - -static int cs35l35_set_pdm_dai_fmt(struct snd_soc_dai *codec_dai, - unsigned int fmt) -{ - struct snd_soc_codec *codec = codec_dai->codec; - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { - case SND_SOC_DAIFMT_CBS_CFS: - cs35l35->slave_mode = true; - break; - default: - dev_err(codec->dev, "PDM format is slave mode only\n"); - return -EINVAL; - } - - switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { - case SND_SOC_DAIFMT_PDM: - break; - default: - dev_err(codec->dev, "Not set to PDM format\n"); - return -EINVAL; - } - return 0; -} - -struct cs35l35_sysclk_config { - int sysclk; - int srate; - u8 clk_cfg; -}; - -static struct cs35l35_sysclk_config cs35l35_clk_ctl[] = { - - /* SYSCLK, Sample Rate, Serial Port Cfg */ - {5644800, 44100, 0x00}, - {5644800, 88200, 0x40}, - {6144000, 48000, 0x10}, - {6144000, 96000, 0x50}, - {11289600, 44100, 0x01}, - {11289600, 88200, 0x41}, - {11289600, 176400, 0x81}, - {12000000, 44100, 0x03}, - {12000000, 48000, 0x13}, - {12000000, 88200, 0x43}, - {12000000, 96000, 0x53}, - {12000000, 176400, 0x83}, - {12000000, 192000, 0x93}, - {12288000, 48000, 0x11}, - {12288000, 96000, 0x51}, - {12288000, 192000, 0x91}, - {13000000, 44100, 0x07}, - {13000000, 48000, 0x17}, - {13000000, 88200, 0x47}, - {13000000, 96000, 0x57}, - {13000000, 176400, 0x87}, - {13000000, 192000, 0x97}, - {22579200, 44100, 0x02}, - {22579200, 88200, 0x42}, - {22579200, 176400, 0x82}, - {24000000, 44100, 0x0B}, - {24000000, 48000, 0x1B}, - {24000000, 88200, 0x4B}, - {24000000, 96000, 0x5B}, - {24000000, 176400, 0x8B}, - {24000000, 192000, 0x9B}, - {24576000, 48000, 0x12}, - {24576000, 96000, 0x52}, - {24576000, 192000, 0x92}, - {26000000, 44100, 0x0F}, - {26000000, 48000, 0x1F}, - {26000000, 88200, 0x4F}, - {26000000, 96000, 0x5F}, - {26000000, 176400, 0x8F}, - {26000000, 192000, 0x9F}, -}; - -static int cs35l35_get_clk_config(int sysclk, int srate) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(cs35l35_clk_ctl); i++) { - if (cs35l35_clk_ctl[i].sysclk == sysclk && - cs35l35_clk_ctl[i].srate == srate) - return cs35l35_clk_ctl[i].clk_cfg; - } - return -EINVAL; -} - -static int cs35l35_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai) -{ - struct snd_soc_codec *codec = dai->codec; - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - struct classh_cfg *classh = &cs35l35->pdata.classh_algo; - int srate = params_rate(params); - u8 sp_sclks; - int audin_format = CS35L35_SDIN_DEPTH_16; - int errata_chk; - - int clk_ctl = cs35l35_get_clk_config(cs35l35->sysclk, srate); - if (clk_ctl < 0) { - dev_err(codec->dev, "Invalid CLK:Rate %d:%d\n", - cs35l35->sysclk, srate); - return -EINVAL; - } - - regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL2, - CS35L35_CLK_CTL2_MASK, clk_ctl); - - /* Rev A0 Errata - * - * When configured for the weak-drive detection path (CH_WKFET_DIS = 0) - * the Class H algorithm does not enable weak-drive operation for - * nonzero values of CH_WKFET_DELAY if SP_RATE = 01 or 10 - * - */ - errata_chk = clk_ctl & CS35L35_SP_RATE_MASK; - - if (classh->classh_wk_fet_disable == 0x00 && - (errata_chk == 0x01 || errata_chk == 0x03)) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_FET_DRIVE_CTL, - CS35L35_CH_WKFET_DEL_MASK, - 0); - -/* - * You can pull more Monitor data from the SDOUT pin than going to SDIN - * Just make sure your SCLK is fast enough to fill the frame - */ - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - switch (params_width(params)) { - case 8: - case 16: - audin_format = CS35L35_SDIN_DEPTH_16; - break; - case 24: - audin_format = CS35L35_SDIN_DEPTH_24; - break; - default: - dev_err(codec->dev, "Unsupported Width %d\n", - params_width(params)); - } - regmap_update_bits(cs35l35->regmap, - CS35L35_AUDIN_DEPTH_CTL, - CS35L35_AUDIN_DEPTH_MASK, - audin_format << - CS35L35_AUDIN_DEPTH_SHIFT); - if (cs35l35->pdata.stereo) - regmap_update_bits(cs35l35->regmap, - CS35L35_AUDIN_DEPTH_CTL, - CS35L35_ADVIN_DEPTH_MASK, - audin_format << - CS35L35_ADVIN_DEPTH_SHIFT); - } - - if (cs35l35->pdm_mode) - return 0; - -/* We have to take the SCLK to derive num sclks - * to configure the CLOCK_CTL3 register correctly - */ - if ((cs35l35->sclk / srate) % 4) { - dev_err(codec->dev, "Unsupported sclk/fs ratio %d:%d\n", - cs35l35->sclk, srate); - return -EINVAL; - } - sp_sclks = ((cs35l35->sclk / srate) / 4) - 1; - - /* Only certain ratios are supported in I2S Slave Mode */ - if (cs35l35->slave_mode) { - switch (sp_sclks) { - case CS35L35_SP_SCLKS_32FS: - case CS35L35_SP_SCLKS_48FS: - case CS35L35_SP_SCLKS_64FS: - regmap_update_bits(cs35l35->regmap, - CS35L35_CLK_CTL3, - CS35L35_SP_SCLKS_MASK, sp_sclks << - CS35L35_SP_SCLKS_SHIFT); - break; - default: - dev_err(codec->dev, "ratio not supported\n"); - return -EINVAL; - }; - } else { - /* Only certain ratios supported in I2S MASTER Mode */ - switch (sp_sclks) { - case CS35L35_SP_SCLKS_32FS: - case CS35L35_SP_SCLKS_64FS: - regmap_update_bits(cs35l35->regmap, - CS35L35_CLK_CTL3, - CS35L35_SP_SCLKS_MASK, sp_sclks << - CS35L35_SP_SCLKS_SHIFT); - break; - default: - dev_err(codec->dev, "ratio not supported\n"); - return -EINVAL; - }; - } - return 0; -} - -static int cs35l35_pcm_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai) -{ - struct snd_soc_codec *codec = dai->codec; - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - - cs35l35->pdm_mode = false; - - return cs35l35_hw_params(substream, params, dai); -} - -static int cs35l35_pdm_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai) -{ - struct snd_soc_codec *codec = dai->codec; - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - - cs35l35->pdm_mode = true; - - return cs35l35_hw_params(substream, params, dai); -} - -static const unsigned int cs35l35_src_rates[] = { - 8000, 16000, 44100, 48000, 88200, 96000, 176400, 192000 -}; - -static const struct snd_pcm_hw_constraint_list cs35l35_constraints = { - .count = ARRAY_SIZE(cs35l35_src_rates), - .list = cs35l35_src_rates, -}; - -static int cs35l35_pcm_startup(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - if (substream->runtime) - snd_pcm_hw_constraint_list(substream->runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, &cs35l35_constraints); - - return 0; -} - -static const unsigned int cs35l35_pdm_rates[] = { - 44100, 48000, 88200, 96000 -}; - -static const struct snd_pcm_hw_constraint_list cs35l35_pdm_constraints = { - .count = ARRAY_SIZE(cs35l35_pdm_rates), - .list = cs35l35_pdm_rates, -}; - -static int cs35l35_pdm_startup(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - if (substream->runtime) - snd_pcm_hw_constraint_list(substream->runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &cs35l35_pdm_constraints); - - return 0; -} - -static int cs35l35_dai_set_sysclk(struct snd_soc_dai *dai, - int clk_id, unsigned int freq, int dir) -{ - struct snd_soc_codec *codec = dai->codec; - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - - /* Need the SCLK Frequency */ - cs35l35->sclk = freq; - - return 0; -} - -static const struct snd_soc_dai_ops cs35l35_ops = { - .startup = cs35l35_pcm_startup, - .set_fmt = cs35l35_set_dai_fmt, - .hw_params = cs35l35_pcm_hw_params, - .set_sysclk = cs35l35_dai_set_sysclk, -}; - -static const struct snd_soc_dai_ops cs35l35_pdm_ops = { - .startup = cs35l35_pdm_startup, - .set_fmt = cs35l35_set_pdm_dai_fmt, - .hw_params = cs35l35_pdm_hw_params, -}; - -static struct snd_soc_dai_driver cs35l35_dai[] = { - { - .name = "cs35l35-pcm", - .id = 0, - .playback = { - .stream_name = "AMP Playback", - .channels_min = 1, - .channels_max = 8, - .rates = SNDRV_PCM_RATE_KNOT, - .formats = CS35L35_FORMATS, - }, - .capture = { - .stream_name = "AMP Capture", - .channels_min = 1, - .channels_max = 8, - .rates = SNDRV_PCM_RATE_KNOT, - .formats = CS35L35_FORMATS, - }, - .ops = &cs35l35_ops, - .symmetric_rates = 1, - }, - { - .name = "cs35l35-pdm", - .id = 1, - .playback = { - .stream_name = "PDM Playback", - .channels_min = 1, - .channels_max = 2, - .rates = SNDRV_PCM_RATE_KNOT, - .formats = CS35L35_FORMATS, - }, - .ops = &cs35l35_pdm_ops, - }, -}; - -static int cs35l35_codec_set_sysclk(struct snd_soc_codec *codec, - int clk_id, int source, unsigned int freq, - int dir) -{ - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - int clksrc; - - switch (clk_id) { - case 0: - clksrc = CS35L35_CLK_SOURCE_MCLK; - break; - case 1: - clksrc = CS35L35_CLK_SOURCE_SCLK; - break; - case 2: - clksrc = CS35L35_CLK_SOURCE_PDM; - break; - default: - dev_err(codec->dev, "Invalid CLK Source\n"); - return -EINVAL; - }; - - switch (freq) { - case 5644800: - case 6144000: - case 11289600: - case 12000000: - case 12288000: - case 13000000: - case 22579200: - case 24000000: - case 24576000: - case 26000000: - cs35l35->sysclk = freq; - break; - default: - dev_err(codec->dev, "Invalid CLK Frequency\n"); - return -EINVAL; - } - - regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, - CS35L35_CLK_SOURCE_MASK, - clksrc << CS35L35_CLK_SOURCE_SHIFT); - - return 0; -} - -static int cs35l35_codec_probe(struct snd_soc_codec *codec) -{ - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - struct cs35l35_private *cs35l35 = snd_soc_codec_get_drvdata(codec); - struct classh_cfg *classh = &cs35l35->pdata.classh_algo; - struct monitor_cfg *monitor_config = &cs35l35->pdata.mon_cfg; - int ret; - - /* Set Platform Data */ - if (cs35l35->pdata.bst_vctl) - regmap_update_bits(cs35l35->regmap, CS35L35_BST_CVTR_V_CTL, - CS35L35_BST_CTL_MASK, - cs35l35->pdata.bst_vctl); - - if (cs35l35->pdata.gain_zc) - regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, - CS35L35_AMP_GAIN_ZC_MASK, - cs35l35->pdata.gain_zc << - CS35L35_AMP_GAIN_ZC_SHIFT); - - if (cs35l35->pdata.aud_channel) - regmap_update_bits(cs35l35->regmap, - CS35L35_AUDIN_RXLOC_CTL, - CS35L35_AUD_IN_LR_MASK, - cs35l35->pdata.aud_channel << - CS35L35_AUD_IN_LR_SHIFT); - - if (cs35l35->pdata.stereo) { - regmap_update_bits(cs35l35->regmap, - CS35L35_ADVIN_RXLOC_CTL, - CS35L35_ADV_IN_LR_MASK, - cs35l35->pdata.adv_channel << - CS35L35_ADV_IN_LR_SHIFT); - if (cs35l35->pdata.shared_bst) - regmap_update_bits(cs35l35->regmap, CS35L35_CLASS_H_CTL, - CS35L35_CH_STEREO_MASK, - 1 << CS35L35_CH_STEREO_SHIFT); - ret = snd_soc_add_codec_controls(codec, cs35l35_adv_controls, - ARRAY_SIZE(cs35l35_adv_controls)); - if (ret) - return ret; - } - - if (cs35l35->pdata.sp_drv_str) - regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, - CS35L35_SP_DRV_MASK, - cs35l35->pdata.sp_drv_str << - CS35L35_SP_DRV_SHIFT); - - if (classh->classh_algo_enable) { - if (classh->classh_bst_override) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_CTL, - CS35L35_CH_BST_OVR_MASK, - classh->classh_bst_override << - CS35L35_CH_BST_OVR_SHIFT); - if (classh->classh_bst_max_limit) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_CTL, - CS35L35_CH_BST_LIM_MASK, - classh->classh_bst_max_limit << - CS35L35_CH_BST_LIM_SHIFT); - if (classh->classh_mem_depth) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_CTL, - CS35L35_CH_MEM_DEPTH_MASK, - classh->classh_mem_depth << - CS35L35_CH_MEM_DEPTH_SHIFT); - if (classh->classh_headroom) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_HEADRM_CTL, - CS35L35_CH_HDRM_CTL_MASK, - classh->classh_headroom << - CS35L35_CH_HDRM_CTL_SHIFT); - if (classh->classh_release_rate) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_RELEASE_RATE, - CS35L35_CH_REL_RATE_MASK, - classh->classh_release_rate << - CS35L35_CH_REL_RATE_SHIFT); - if (classh->classh_wk_fet_disable) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_FET_DRIVE_CTL, - CS35L35_CH_WKFET_DIS_MASK, - classh->classh_wk_fet_disable << - CS35L35_CH_WKFET_DIS_SHIFT); - if (classh->classh_wk_fet_delay) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_FET_DRIVE_CTL, - CS35L35_CH_WKFET_DEL_MASK, - classh->classh_wk_fet_delay << - CS35L35_CH_WKFET_DEL_SHIFT); - if (classh->classh_wk_fet_thld) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_FET_DRIVE_CTL, - CS35L35_CH_WKFET_THLD_MASK, - classh->classh_wk_fet_thld << - CS35L35_CH_WKFET_THLD_SHIFT); - if (classh->classh_vpch_auto) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_VP_CTL, - CS35L35_CH_VP_AUTO_MASK, - classh->classh_vpch_auto << - CS35L35_CH_VP_AUTO_SHIFT); - if (classh->classh_vpch_rate) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_VP_CTL, - CS35L35_CH_VP_RATE_MASK, - classh->classh_vpch_rate << - CS35L35_CH_VP_RATE_SHIFT); - if (classh->classh_vpch_man) - regmap_update_bits(cs35l35->regmap, - CS35L35_CLASS_H_VP_CTL, - CS35L35_CH_VP_MAN_MASK, - classh->classh_vpch_man << - CS35L35_CH_VP_MAN_SHIFT); - } - - if (monitor_config->is_present) { - if (monitor_config->vmon_specs) { - regmap_update_bits(cs35l35->regmap, - CS35L35_SPKMON_DEPTH_CTL, - CS35L35_VMON_DEPTH_MASK, - monitor_config->vmon_dpth << - CS35L35_VMON_DEPTH_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_VMON_TXLOC_CTL, - CS35L35_MON_TXLOC_MASK, - monitor_config->vmon_loc << - CS35L35_MON_TXLOC_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_VMON_TXLOC_CTL, - CS35L35_MON_FRM_MASK, - monitor_config->vmon_frm << - CS35L35_MON_FRM_SHIFT); - } - if (monitor_config->imon_specs) { - regmap_update_bits(cs35l35->regmap, - CS35L35_SPKMON_DEPTH_CTL, - CS35L35_IMON_DEPTH_MASK, - monitor_config->imon_dpth << - CS35L35_IMON_DEPTH_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_IMON_TXLOC_CTL, - CS35L35_MON_TXLOC_MASK, - monitor_config->imon_loc << - CS35L35_MON_TXLOC_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_IMON_TXLOC_CTL, - CS35L35_MON_FRM_MASK, - monitor_config->imon_frm << - CS35L35_MON_FRM_SHIFT); - } - if (monitor_config->vpmon_specs) { - regmap_update_bits(cs35l35->regmap, - CS35L35_SUPMON_DEPTH_CTL, - CS35L35_VPMON_DEPTH_MASK, - monitor_config->vpmon_dpth << - CS35L35_VPMON_DEPTH_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_VPMON_TXLOC_CTL, - CS35L35_MON_TXLOC_MASK, - monitor_config->vpmon_loc << - CS35L35_MON_TXLOC_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_VPMON_TXLOC_CTL, - CS35L35_MON_FRM_MASK, - monitor_config->vpmon_frm << - CS35L35_MON_FRM_SHIFT); - } - if (monitor_config->vbstmon_specs) { - regmap_update_bits(cs35l35->regmap, - CS35L35_SUPMON_DEPTH_CTL, - CS35L35_VBSTMON_DEPTH_MASK, - monitor_config->vpmon_dpth << - CS35L35_VBSTMON_DEPTH_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_VBSTMON_TXLOC_CTL, - CS35L35_MON_TXLOC_MASK, - monitor_config->vbstmon_loc << - CS35L35_MON_TXLOC_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_VBSTMON_TXLOC_CTL, - CS35L35_MON_FRM_MASK, - monitor_config->vbstmon_frm << - CS35L35_MON_FRM_SHIFT); - } - if (monitor_config->vpbrstat_specs) { - regmap_update_bits(cs35l35->regmap, - CS35L35_SUPMON_DEPTH_CTL, - CS35L35_VPBRSTAT_DEPTH_MASK, - monitor_config->vpbrstat_dpth << - CS35L35_VPBRSTAT_DEPTH_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_VPBR_STATUS_TXLOC_CTL, - CS35L35_MON_TXLOC_MASK, - monitor_config->vpbrstat_loc << - CS35L35_MON_TXLOC_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_VPBR_STATUS_TXLOC_CTL, - CS35L35_MON_FRM_MASK, - monitor_config->vpbrstat_frm << - CS35L35_MON_FRM_SHIFT); - } - if (monitor_config->zerofill_specs) { - regmap_update_bits(cs35l35->regmap, - CS35L35_SUPMON_DEPTH_CTL, - CS35L35_ZEROFILL_DEPTH_MASK, - monitor_config->zerofill_dpth << - CS35L35_ZEROFILL_DEPTH_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_ZERO_FILL_LOC_CTL, - CS35L35_MON_TXLOC_MASK, - monitor_config->zerofill_loc << - CS35L35_MON_TXLOC_SHIFT); - regmap_update_bits(cs35l35->regmap, - CS35L35_ZERO_FILL_LOC_CTL, - CS35L35_MON_FRM_MASK, - monitor_config->zerofill_frm << - CS35L35_MON_FRM_SHIFT); - } - } - - snd_soc_dapm_ignore_suspend(dapm, "SDIN"); - snd_soc_dapm_ignore_suspend(dapm, "SDOUT"); - snd_soc_dapm_ignore_suspend(dapm, "SPK"); - snd_soc_dapm_ignore_suspend(dapm, "VP"); - snd_soc_dapm_ignore_suspend(dapm, "VBST"); - snd_soc_dapm_ignore_suspend(dapm, "ISENSE"); - snd_soc_dapm_ignore_suspend(dapm, "VSENSE"); - snd_soc_dapm_ignore_suspend(dapm, "Main AMP"); - - return ret; -} - -static struct snd_soc_codec_driver soc_codec_dev_cs35l35 = { - .probe = cs35l35_codec_probe, - .set_sysclk = cs35l35_codec_set_sysclk, - - .component_driver = { - .dapm_widgets = cs35l35_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(cs35l35_dapm_widgets), - - .dapm_routes = cs35l35_audio_map, - .num_dapm_routes = ARRAY_SIZE(cs35l35_audio_map), - - .controls = cs35l35_aud_controls, - .num_controls = ARRAY_SIZE(cs35l35_aud_controls), - } -}; - -static struct regmap_config cs35l35_regmap = { - .reg_bits = 8, - .val_bits = 8, - - .max_register = CS35L35_MAX_REGISTER, - .reg_defaults = cs35l35_reg, - .num_reg_defaults = ARRAY_SIZE(cs35l35_reg), - .volatile_reg = cs35l35_volatile_register, - .readable_reg = cs35l35_readable_register, - .precious_reg = cs35l35_precious_register, - .cache_type = REGCACHE_RBTREE, - .use_single_rw = true, -}; - -static irqreturn_t cs35l35_irq(int irq, void *data) -{ - struct cs35l35_private *cs35l35 = data; - struct i2c_client *i2c_client = cs35l35->i2c_client; - unsigned int sticky1, sticky2, sticky3, sticky4; - unsigned int mask1, mask2, mask3, mask4, current1; - - /* ack the irq by reading all status registers */ - regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_4, &sticky4); - regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_3, &sticky3); - regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_2, &sticky2); - regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_1, &sticky1); - - regmap_read(cs35l35->regmap, CS35L35_INT_MASK_4, &mask4); - regmap_read(cs35l35->regmap, CS35L35_INT_MASK_3, &mask3); - regmap_read(cs35l35->regmap, CS35L35_INT_MASK_2, &mask2); - regmap_read(cs35l35->regmap, CS35L35_INT_MASK_1, &mask1); - - /* Check to see if unmasked bits are active */ - if (!(sticky1 & ~mask1) && !(sticky2 & ~mask2) && !(sticky3 & ~mask3) - && !(sticky4 & ~mask4)) - return IRQ_NONE; - - if (sticky2 & CS35L35_PDN_DONE) - complete(&cs35l35->pdn_done); - - /* read the current values */ - regmap_read(cs35l35->regmap, CS35L35_INT_STATUS_1, ¤t1); - - /* handle the interrupts */ - if (sticky1 & CS35L35_CAL_ERR) { - dev_err(&i2c_client->dev, "Calibration Error\n"); - - /* error is no longer asserted; safe to reset */ - if (!(current1 & CS35L35_CAL_ERR)) { - dev_dbg(&i2c_client->dev, "Cal error release\n"); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_CAL_ERR_RLS, 0); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_CAL_ERR_RLS, - CS35L35_CAL_ERR_RLS); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_CAL_ERR_RLS, 0); - } - } - - if (sticky1 & CS35L35_AMP_SHORT) { - /* error is no longer asserted; safe to reset */ - if (!(current1 & CS35L35_AMP_SHORT)) { - dev_dbg(&i2c_client->dev, - "Amp short error release\n"); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_SHORT_RLS, 0); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_SHORT_RLS, - CS35L35_SHORT_RLS); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_SHORT_RLS, 0); - } - } - - if (sticky1 & CS35L35_OTW) { - dev_err(&i2c_client->dev, "Over temperature warning\n"); - - /* error is no longer asserted; safe to reset */ - if (!(current1 & CS35L35_OTW)) { - dev_dbg(&i2c_client->dev, - "Over temperature warning release\n"); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_OTW_RLS, 0); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_OTW_RLS, - CS35L35_OTW_RLS); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_OTW_RLS, 0); - } - } - - if (sticky1 & CS35L35_OTE) { - dev_crit(&i2c_client->dev, "Over temperature error\n"); - - /* error is no longer asserted; safe to reset */ - if (!(current1 & CS35L35_OTE)) { - dev_dbg(&i2c_client->dev, - "Over temperature error release\n"); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_OTE_RLS, 0); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_OTE_RLS, - CS35L35_OTE_RLS); - regmap_update_bits(cs35l35->regmap, - CS35L35_PROT_RELEASE_CTL, - CS35L35_OTE_RLS, 0); - } - } - - if (sticky3 & CS35L35_BST_HIGH) { - dev_crit(&i2c_client->dev, "VBST error: powering off!\n"); - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, - CS35L35_PDN_AMP, CS35L35_PDN_AMP); - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, - CS35L35_PDN_ALL, CS35L35_PDN_ALL); - } - - if (sticky3 & CS35L35_LBST_SHORT) { - dev_crit(&i2c_client->dev, "LBST error: powering off!\n"); - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, - CS35L35_PDN_AMP, CS35L35_PDN_AMP); - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, - CS35L35_PDN_ALL, CS35L35_PDN_ALL); - } - - if (sticky2 & CS35L35_VPBR_ERR) - dev_err(&i2c_client->dev, "Error: Reactive Brownout\n"); - - if (sticky4 & CS35L35_VMON_OVFL) - dev_err(&i2c_client->dev, "Error: VMON overflow\n"); - - if (sticky4 & CS35L35_IMON_OVFL) - dev_err(&i2c_client->dev, "Error: IMON overflow\n"); - - return IRQ_HANDLED; -} - - -static int cs35l35_handle_of_data(struct i2c_client *i2c_client, - struct cs35l35_platform_data *pdata) -{ - struct device_node *np = i2c_client->dev.of_node; - struct device_node *classh, *signal_format; - struct classh_cfg *classh_config = &pdata->classh_algo; - struct monitor_cfg *monitor_config = &pdata->mon_cfg; - unsigned int val32 = 0; - u8 monitor_array[3]; - int ret = 0; - - if (!np) - return 0; - - pdata->bst_pdn_fet_on = of_property_read_bool(np, "boost-pdn-fet-on"); - - if (of_property_read_u32(np, "boost-ctl-millivolt", &val32) >= 0) - pdata->bst_vctl = val32; - - if (of_property_read_u32(np, "sp-drv-strength", &val32) >= 0) - pdata->sp_drv_str = val32; - - if (of_property_read_u32(np, "audio-channel", &val32) >= 0) - pdata->aud_channel = val32; - - pdata->stereo = of_property_read_bool(np, "stereo-config"); - if (pdata->stereo) { - if (of_property_read_u32(np, "audio-channel", &val32) >= 0) - pdata->aud_channel = val32; - - if (of_property_read_u32(np, "advisory-channel", - &val32) >= 0) - pdata->adv_channel = val32; - - pdata->shared_bst = of_property_read_bool(np, "shared-boost"); - } - - pdata->gain_zc = of_property_read_bool(np, "amp-gain-zc"); - - classh = of_get_child_by_name(np, "classh-internal-algo"); - classh_config->classh_algo_enable = classh ? true : false; - - if (classh_config->classh_algo_enable) { - classh_config->classh_bst_override = of_property_read_bool(np, - "classh-bst-overide"); - - if (of_property_read_u32(classh, "classh-bst-max-limit", - &val32) >= 0) - classh_config->classh_bst_max_limit = val32; - if (of_property_read_u32(classh, "classh-mem-depth", - &val32) >= 0) - classh_config->classh_mem_depth = val32; - if (of_property_read_u32(classh, "classh-release-rate", - &val32) >= 0) - classh_config->classh_release_rate = val32; - if (of_property_read_u32(classh, "classh-headroom", - &val32) >= 0) - classh_config->classh_headroom = val32; - if (of_property_read_u32(classh, "classh-wk-fet-disable", - &val32) >= 0) - classh_config->classh_wk_fet_disable = val32; - if (of_property_read_u32(classh, "classh-wk-fet-delay", - &val32) >= 0) - classh_config->classh_wk_fet_delay = val32; - if (of_property_read_u32(classh, "classh-wk-fet-thld", - &val32) >= 0) - classh_config->classh_wk_fet_thld = val32; - if (of_property_read_u32(classh, "classh-vpch-auto", - &val32) >= 0) - classh_config->classh_vpch_auto = val32; - if (of_property_read_u32(classh, "classh-vpch-rate", - &val32) >= 0) - classh_config->classh_vpch_rate = val32; - if (of_property_read_u32(classh, "classh-vpch-man", - &val32) >= 0) - classh_config->classh_vpch_man = val32; - } - of_node_put(classh); - - /* frame depth location */ - signal_format = of_get_child_by_name(np, "monitor-signal-format"); - monitor_config->is_present = signal_format ? true : false; - if (monitor_config->is_present) { - ret = of_property_read_u8_array(signal_format, "imon", - monitor_array, ARRAY_SIZE(monitor_array)); - if (!ret) { - monitor_config->imon_specs = true; - monitor_config->imon_dpth = monitor_array[0]; - monitor_config->imon_loc = monitor_array[1]; - monitor_config->imon_frm = monitor_array[2]; - } - ret = of_property_read_u8_array(signal_format, "vmon", - monitor_array, ARRAY_SIZE(monitor_array)); - if (!ret) { - monitor_config->vmon_specs = true; - monitor_config->vmon_dpth = monitor_array[0]; - monitor_config->vmon_loc = monitor_array[1]; - monitor_config->vmon_frm = monitor_array[2]; - } - ret = of_property_read_u8_array(signal_format, "vpmon", - monitor_array, ARRAY_SIZE(monitor_array)); - if (!ret) { - monitor_config->vpmon_specs = true; - monitor_config->vpmon_dpth = monitor_array[0]; - monitor_config->vpmon_loc = monitor_array[1]; - monitor_config->vpmon_frm = monitor_array[2]; - } - ret = of_property_read_u8_array(signal_format, "vbstmon", - monitor_array, ARRAY_SIZE(monitor_array)); - if (!ret) { - monitor_config->vbstmon_specs = true; - monitor_config->vbstmon_dpth = monitor_array[0]; - monitor_config->vbstmon_loc = monitor_array[1]; - monitor_config->vbstmon_frm = monitor_array[2]; - } - ret = of_property_read_u8_array(signal_format, "vpbrstat", - monitor_array, ARRAY_SIZE(monitor_array)); - if (!ret) { - monitor_config->vpbrstat_specs = true; - monitor_config->vpbrstat_dpth = monitor_array[0]; - monitor_config->vpbrstat_loc = monitor_array[1]; - monitor_config->vpbrstat_frm = monitor_array[2]; - } - ret = of_property_read_u8_array(signal_format, "zerofill", - monitor_array, ARRAY_SIZE(monitor_array)); - if (!ret) { - monitor_config->zerofill_specs = true; - monitor_config->zerofill_dpth = monitor_array[0]; - monitor_config->zerofill_loc = monitor_array[1]; - monitor_config->zerofill_frm = monitor_array[2]; - } - } - of_node_put(signal_format); - - return 0; -} - -/* Errata Rev A0 */ -static const struct reg_sequence cs35l35_errata_patch[] = { - { 0x7F, 0x99 }, - { 0x00, 0x99 }, - { 0x52, 0x22 }, - { 0x04, 0x14 }, - { 0x6D, 0x44 }, - { 0x24, 0x10 }, - { 0x58, 0xC4 }, - { 0x00, 0x98 }, - { 0x18, 0x08 }, - { 0x00, 0x00 }, - { 0x7F, 0x00 }, -}; - -static int cs35l35_i2c_probe(struct i2c_client *i2c_client, - const struct i2c_device_id *id) -{ - struct cs35l35_private *cs35l35; - struct cs35l35_platform_data *pdata = - dev_get_platdata(&i2c_client->dev); - int i; - int ret; - unsigned int devid = 0; - unsigned int reg; - - cs35l35 = devm_kzalloc(&i2c_client->dev, - sizeof(struct cs35l35_private), - GFP_KERNEL); - if (!cs35l35) { - dev_err(&i2c_client->dev, "could not allocate codec\n"); - return -ENOMEM; - } - - i2c_set_clientdata(i2c_client, cs35l35); - cs35l35->i2c_client = i2c_client; - cs35l35->regmap = devm_regmap_init_i2c(i2c_client, &cs35l35_regmap); - if (IS_ERR(cs35l35->regmap)) { - ret = PTR_ERR(cs35l35->regmap); - dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); - goto err; - } - - for (i = 0; i < ARRAY_SIZE(cs35l35_supplies); i++) - cs35l35->supplies[i].supply = cs35l35_supplies[i]; - cs35l35->num_supplies = ARRAY_SIZE(cs35l35_supplies); - - ret = devm_regulator_bulk_get(&i2c_client->dev, - cs35l35->num_supplies, - cs35l35->supplies); - if (ret != 0) { - dev_err(&i2c_client->dev, - "Failed to request core supplies: %d\n", - ret); - return ret; - } - - if (pdata) { - cs35l35->pdata = *pdata; - } else { - pdata = devm_kzalloc(&i2c_client->dev, - sizeof(struct cs35l35_platform_data), - GFP_KERNEL); - if (!pdata) { - dev_err(&i2c_client->dev, - "could not allocate pdata\n"); - return -ENOMEM; - } - if (i2c_client->dev.of_node) { - ret = cs35l35_handle_of_data(i2c_client, pdata); - if (ret != 0) - return ret; - - } - cs35l35->pdata = *pdata; - } - - ret = regulator_bulk_enable(cs35l35->num_supplies, - cs35l35->supplies); - if (ret != 0) { - dev_err(&i2c_client->dev, - "Failed to enable core supplies: %d\n", - ret); - return ret; - } - - /* returning NULL can be an option if in stereo mode */ - cs35l35->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev, - "reset", GPIOD_OUT_LOW); - if (IS_ERR(cs35l35->reset_gpio)) - return PTR_ERR(cs35l35->reset_gpio); - - if (cs35l35->reset_gpio) - gpiod_set_value_cansleep(cs35l35->reset_gpio, 1); - - init_completion(&cs35l35->pdn_done); - - ret = regmap_register_patch(cs35l35->regmap, cs35l35_errata_patch, - ARRAY_SIZE(cs35l35_errata_patch)); - if (ret < 0) { - dev_err(&i2c_client->dev, "Failed to apply errata patch\n"); - return ret; - } - - cs35l35->irq_gpio = devm_gpiod_get_optional(&i2c_client->dev, - "irq", GPIOD_IN); - if (IS_ERR(cs35l35->irq_gpio)) - return PTR_ERR(cs35l35->irq_gpio); - - ret = devm_request_threaded_irq(&i2c_client->dev, - gpiod_to_irq(cs35l35->irq_gpio), - NULL, cs35l35_irq, - IRQF_ONESHOT | IRQF_TRIGGER_LOW, - "cs35l35", cs35l35); - /* CS35L35 needs INT for PDN_DONE */ - if (ret != 0) { - dev_err(&i2c_client->dev, "Failed to request IRQ: %d\n", ret); - goto err; - } - /* initialize codec */ - ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_AB, ®); - - devid = (reg & 0xFF) << 12; - ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_CD, ®); - devid |= (reg & 0xFF) << 4; - ret = regmap_read(cs35l35->regmap, CS35L35_DEVID_E, ®); - devid |= (reg & 0xF0) >> 4; - - if (devid != CS35L35_CHIP_ID) { - dev_err(&i2c_client->dev, - "CS35L35 Device ID (%X). Expected ID %X\n", - devid, CS35L35_CHIP_ID); - ret = -ENODEV; - goto err; - } - - ret = regmap_read(cs35l35->regmap, CS35L35_REV_ID, ®); - if (ret < 0) { - dev_err(&i2c_client->dev, "Get Revision ID failed\n"); - goto err; - } - - dev_info(&i2c_client->dev, - "Cirrus Logic CS35L35 (%x), Revision: %02X\n", devid, - ret & 0xFF); - - /* Set the INT Masks for critical errors */ - regmap_write(cs35l35->regmap, CS35L35_INT_MASK_1, - CS35L35_INT1_CRIT_MASK); - regmap_write(cs35l35->regmap, CS35L35_INT_MASK_2, - CS35L35_INT2_CRIT_MASK); - regmap_write(cs35l35->regmap, CS35L35_INT_MASK_3, - CS35L35_INT3_CRIT_MASK); - regmap_write(cs35l35->regmap, CS35L35_INT_MASK_4, - CS35L35_INT4_CRIT_MASK); - - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, - CS35L35_PWR2_PDN_MASK, - CS35L35_PWR2_PDN_MASK); - - if (cs35l35->pdata.bst_pdn_fet_on) - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, - CS35L35_PDN_BST_MASK, - 1 << CS35L35_PDN_BST_FETON_SHIFT); - else - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, - CS35L35_PDN_BST_MASK, - 1 << CS35L35_PDN_BST_FETOFF_SHIFT); - - regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL3, - CS35L35_PWR3_PDN_MASK, - CS35L35_PWR3_PDN_MASK); - - regmap_update_bits(cs35l35->regmap, CS35L35_PROTECT_CTL, - CS35L35_AMP_MUTE_MASK, 1 << CS35L35_AMP_MUTE_SHIFT); - - ret = snd_soc_register_codec(&i2c_client->dev, - &soc_codec_dev_cs35l35, cs35l35_dai, - ARRAY_SIZE(cs35l35_dai)); - if (ret < 0) { - dev_err(&i2c_client->dev, - "%s: Register codec failed\n", __func__); - goto err; - } - -err: - regulator_bulk_disable(cs35l35->num_supplies, - cs35l35->supplies); - return ret; -} - -static int cs35l35_i2c_remove(struct i2c_client *client) -{ - snd_soc_unregister_codec(&client->dev); - kfree(i2c_get_clientdata(client)); - return 0; -} - -static const struct of_device_id cs35l35_of_match[] = { - {.compatible = "cirrus,cs35l35"}, - {}, -}; -MODULE_DEVICE_TABLE(of, cs35l35_of_match); - -static const struct i2c_device_id cs35l35_id[] = { - {"cs35l35", 0}, - {} -}; - -MODULE_DEVICE_TABLE(i2c, cs35l35_id); - -static struct i2c_driver cs35l35_i2c_driver = { - .driver = { - .name = "cs35l35", - .of_match_table = cs35l35_of_match, - }, - .id_table = cs35l35_id, - .probe = cs35l35_i2c_probe, - .remove = cs35l35_i2c_remove, -}; -module_i2c_driver(cs35l35_i2c_driver); - -MODULE_DESCRIPTION("ASoC CS35L35 driver"); -MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, "); -MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs35l35.h b/sound/soc/codecs/cs35l35.h deleted file mode 100644 index 5707fc90c40b..000000000000 --- a/sound/soc/codecs/cs35l35.h +++ /dev/null @@ -1,291 +0,0 @@ -/* - * cs35l35.h -- CS35L35 ALSA SoC audio driver - * - * Copyright 2016 Cirrus Logic, Inc. - * - * Author: Brian Austin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __CS35L35_H__ -#define __CS35L35_H__ - -#define CS35L35_FIRSTREG 0x01 -#define CS35L35_LASTREG 0x7E -#define CS35L35_CHIP_ID 0x00035A35 -#define CS35L35_DEVID_AB 0x01 /* Device ID A & B [RO] */ -#define CS35L35_DEVID_CD 0x02 /* Device ID C & D [RO] */ -#define CS35L35_DEVID_E 0x03 /* Device ID E [RO] */ -#define CS35L35_FAB_ID 0x04 /* Fab ID [RO] */ -#define CS35L35_REV_ID 0x05 /* Revision ID [RO] */ -#define CS35L35_PWRCTL1 0x06 /* Power Ctl 1 */ -#define CS35L35_PWRCTL2 0x07 /* Power Ctl 2 */ -#define CS35L35_PWRCTL3 0x08 /* Power Ctl 3 */ -#define CS35L35_CLK_CTL1 0x0A /* Clocking Ctl 1 */ -#define CS35L35_CLK_CTL2 0x0B /* Clocking Ctl 2 */ -#define CS35L35_CLK_CTL3 0x0C /* Clocking Ctl 3 */ -#define CS35L35_SP_FMT_CTL1 0x0D /* Serial Port Format CTL1 */ -#define CS35L35_SP_FMT_CTL2 0x0E /* Serial Port Format CTL2 */ -#define CS35L35_SP_FMT_CTL3 0x0F /* Serial Port Format CTL3 */ -#define CS35L35_MAG_COMP_CTL 0x13 /* Magnitude Comp CTL */ -#define CS35L35_AMP_INP_DRV_CTL 0x14 /* Amp Input Drive Ctl */ -#define CS35L35_AMP_DIG_VOL_CTL 0x15 /* Amplifier Dig Volume Ctl */ -#define CS35L35_AMP_DIG_VOL 0x16 /* Amplifier Dig Volume */ -#define CS35L35_ADV_DIG_VOL 0x17 /* Advisory Digital Volume */ -#define CS35L35_PROTECT_CTL 0x18 /* Amp Gain - Prot Ctl Param */ -#define CS35L35_AMP_GAIN_AUD_CTL 0x19 /* Amp Serial Port Gain Ctl */ -#define CS35L35_AMP_GAIN_PDM_CTL 0x1A /* Amplifier Gain PDM Ctl */ -#define CS35L35_AMP_GAIN_ADV_CTL 0x1B /* Amplifier Gain Ctl */ -#define CS35L35_GPI_CTL 0x1C /* GPI Ctl */ -#define CS35L35_BST_CVTR_V_CTL 0x1D /* Boost Conv Voltage Ctl */ -#define CS35L35_BST_PEAK_I 0x1E /* Boost Conv Peak Current */ -#define CS35L35_BST_RAMP_CTL 0x20 /* Boost Conv Soft Ramp Ctl */ -#define CS35L35_BST_CONV_COEF_1 0x21 /* Boost Conv Coefficients 1 */ -#define CS35L35_BST_CONV_COEF_2 0x22 /* Boost Conv Coefficients 2 */ -#define CS35L35_BST_CONV_SLOPE_COMP 0x23 /* Boost Conv Slope Comp */ -#define CS35L35_BST_CONV_SW_FREQ 0x24 /* Boost Conv L BST SW Freq */ -#define CS35L35_CLASS_H_CTL 0x30 /* CLS H Control */ -#define CS35L35_CLASS_H_HEADRM_CTL 0x31 /* CLS H Headroom Ctl */ -#define CS35L35_CLASS_H_RELEASE_RATE 0x32 /* CLS H Release Rate */ -#define CS35L35_CLASS_H_FET_DRIVE_CTL 0x33 /* CLS H Weak FET Drive Ctl */ -#define CS35L35_CLASS_H_VP_CTL 0x34 /* CLS H VP Ctl */ -#define CS35L35_CLASS_H_STATUS 0x38 /* CLS H Status */ -#define CS35L35_VPBR_CTL 0x3A /* VPBR Ctl */ -#define CS35L35_VPBR_VOL_CTL 0x3B /* VPBR Volume Ctl */ -#define CS35L35_VPBR_TIMING_CTL 0x3C /* VPBR Timing Ctl */ -#define CS35L35_VPBR_MODE_VOL_CTL 0x3D /* VPBR Mode/Attack Vol Ctl */ -#define CS35L35_VPBR_ATTEN_STATUS 0x4B /* VPBR Attenuation Status */ -#define CS35L35_SPKR_MON_CTL 0x4E /* Speaker Monitoring Ctl */ -#define CS35L35_IMON_SCALE_CTL 0x51 /* IMON Scale Ctl */ -#define CS35L35_AUDIN_RXLOC_CTL 0x52 /* Audio Input RX Loc Ctl */ -#define CS35L35_ADVIN_RXLOC_CTL 0x53 /* Advisory Input RX Loc Ctl */ -#define CS35L35_VMON_TXLOC_CTL 0x54 /* VMON TX Loc Ctl */ -#define CS35L35_IMON_TXLOC_CTL 0x55 /* IMON TX Loc Ctl */ -#define CS35L35_VPMON_TXLOC_CTL 0x56 /* VPMON TX Loc Ctl */ -#define CS35L35_VBSTMON_TXLOC_CTL 0x57 /* VBSTMON TX Loc Ctl */ -#define CS35L35_VPBR_STATUS_TXLOC_CTL 0x58 /* VPBR Status TX Loc Ctl */ -#define CS35L35_ZERO_FILL_LOC_CTL 0x59 /* Zero Fill Loc Ctl */ -#define CS35L35_AUDIN_DEPTH_CTL 0x5A /* Audio Input Depth Ctl */ -#define CS35L35_SPKMON_DEPTH_CTL 0x5B /* SPK Mon Output Depth Ctl */ -#define CS35L35_SUPMON_DEPTH_CTL 0x5C /* Supply Mon Out Depth Ctl */ -#define CS35L35_ZEROFILL_DEPTH_CTL 0x5D /* Zero Fill Mon Output Ctl */ -#define CS35L35_MULT_DEV_SYNCH1 0x62 /* Multidevice Synch */ -#define CS35L35_MULT_DEV_SYNCH2 0x63 /* Multidevice Synch 2 */ -#define CS35L35_PROT_RELEASE_CTL 0x64 /* Protection Release Ctl */ -#define CS35L35_DIAG_MODE_REG_LOCK 0x68 /* Diagnostic Mode Reg Lock */ -#define CS35L35_DIAG_MODE_CTL_1 0x69 /* Diagnostic Mode Ctl 1 */ -#define CS35L35_DIAG_MODE_CTL_2 0x6A /* Diagnostic Mode Ctl 2 */ -#define CS35L35_INT_MASK_1 0x70 /* Interrupt Mask 1 */ -#define CS35L35_INT_MASK_2 0x71 /* Interrupt Mask 2 */ -#define CS35L35_INT_MASK_3 0x72 /* Interrupt Mask 3 */ -#define CS35L35_INT_MASK_4 0x73 /* Interrupt Mask 4 */ -#define CS35L35_INT_STATUS_1 0x74 /* Interrupt Status 1 */ -#define CS35L35_INT_STATUS_2 0x75 /* Interrupt Status 2 */ -#define CS35L35_INT_STATUS_3 0x76 /* Interrupt Status 3 */ -#define CS35L35_INT_STATUS_4 0x77 /* Interrupt Status 4 */ -#define CS35L35_PLL_STATUS 0x78 /* PLL Status */ -#define CS35L35_OTP_TRIM_STATUS 0x7E /* OTP Trim Status */ - -#define CS35L35_MAX_REGISTER 0x7F - -/* CS35L35_PWRCTL1 */ -#define CS35L35_SFT_RST 0x80 -#define CS35L35_DISCHG_FLT 0x02 -#define CS35L35_PDN_ALL 0x01 - -/* CS35L35_PWRCTL2 */ -#define CS35L35_PDN_VMON 0x80 -#define CS35L35_PDN_IMON 0x40 -#define CS35L35_PDN_CLASSH 0x20 -#define CS35L35_PDN_VPBR 0x10 -#define CS35L35_PDN_BST 0x04 -#define CS35L35_PDN_AMP 0x01 - -/* CS35L35_PWRCTL3 */ -#define CS35L35_PDN_VBSTMON_OUT 0x10 -#define CS35L35_PDN_VMON_OUT 0x08 - -#define CS35L35_AUDIN_DEPTH_MASK 0x03 -#define CS35L35_AUDIN_DEPTH_SHIFT 0 -#define CS35L35_ADVIN_DEPTH_MASK 0x12 -#define CS35L35_ADVIN_DEPTH_SHIFT 2 -#define CS35L35_SDIN_DEPTH_8 0x01 -#define CS35L35_SDIN_DEPTH_16 0x02 -#define CS35L35_SDIN_DEPTH_24 0x03 - -#define CS35L35_SDOUT_DEPTH_8 0x01 -#define CS35L35_SDOUT_DEPTH_12 0x02 -#define CS35L35_SDOUT_DEPTH_16 0x03 - -#define CS35L35_AUD_IN_LR_MASK 0x80 -#define CS35L35_AUD_IN_LR_SHIFT 7 -#define CS35L35_ADV_IN_LR_MASK 0x80 -#define CS35L35_ADV_IN_LR_SHIFT 7 -#define CS35L35_AUD_IN_LOC_MASK 0x0F -#define CS35L35_AUD_IN_LOC_SHIFT 0 -#define CS35L35_ADV_IN_LOC_MASK 0x0F -#define CS35L35_ADV_IN_LOC_SHIFT 0 - -#define CS35L35_IMON_DEPTH_MASK 0x03 -#define CS35L35_IMON_DEPTH_SHIFT 0 -#define CS35L35_VMON_DEPTH_MASK 0x0C -#define CS35L35_VMON_DEPTH_SHIFT 2 -#define CS35L35_VBSTMON_DEPTH_MASK 0x03 -#define CS35L35_VBSTMON_DEPTH_SHIFT 0 -#define CS35L35_VPMON_DEPTH_MASK 0x0C -#define CS35L35_VPMON_DEPTH_SHIFT 2 -#define CS35L35_VPBRSTAT_DEPTH_MASK 0x18 -#define CS35L35_VPBRSTAT_DEPTH_SHIFT 4 -#define CS35L35_ZEROFILL_DEPTH_MASK 0x03 -#define CS35L35_ZEROFILL_DEPTH_SHIFT 0x00 - -#define CS35L35_MON_TXLOC_MASK 0x3F -#define CS35L35_MON_TXLOC_SHIFT 0 -#define CS35L35_MON_FRM_MASK 0x80 -#define CS35L35_MON_FRM_SHIFT 7 - -#define CS35L35_MS_MASK 0x80 -#define CS35L35_MS_SHIFT 7 -#define CS35L35_SPMODE_MASK 0x40 -#define CS35L35_SP_DRV_MASK 0x10 -#define CS35L35_SP_DRV_SHIFT 4 -#define CS35L35_CLK_CTL2_MASK 0xFF -#define CS35L35_CLK_DIV_MASK 0x3 -#define CS35L35_PDM_MODE_MASK 0x40 -#define CS35L35_PDM_MODE_SHIFT 6 -#define CS35L35_CLK_SOURCE_MASK 0x03 -#define CS35L35_CLK_SOURCE_SHIFT 0 -#define CS35L35_CLK_SOURCE_MCLK 0 -#define CS35L35_CLK_SOURCE_SCLK 1 -#define CS35L35_CLK_SOURCE_PDM 2 - -#define CS35L35_SP_SCLKS_MASK 0x0F -#define CS35L35_SP_SCLKS_SHIFT 0x00 -#define CS35L35_SP_SCLKS_16FS 0x03 -#define CS35L35_SP_SCLKS_32FS 0x07 -#define CS35L35_SP_SCLKS_48FS 0x0B -#define CS35L35_SP_SCLKS_64FS 0x0F -#define CS35L35_SP_RATE_MASK 0xC0 - -#define CS35L35_PDN_BST_MASK 0x06 -#define CS35L35_PDN_BST_FETON_SHIFT 1 -#define CS35L35_PDN_BST_FETOFF_SHIFT 2 -#define CS35L35_PWR2_PDN_MASK 0xE0 -#define CS35L35_PWR3_PDN_MASK 0x1E -#define CS35L35_PDN_ALL_MASK 0x01 -#define CS35L35_DISCHG_FILT_MASK 0x02 -#define CS35L35_DISCHG_FILT_SHIFT 1 -#define CS35L35_MCLK_DIS_MASK 0x04 -#define CS35L35_MCLK_DIS_SHIFT 2 - -#define CS35L35_BST_CTL_MASK 0x7F -#define CS35L35_BST_CTL_SHIFT 0 -#define CS35L35_AMP_MUTE_MASK 0x20 -#define CS35L35_AMP_MUTE_SHIFT 5 -#define CS35L35_AMP_GAIN_ZC_MASK 0x10 -#define CS35L35_AMP_GAIN_ZC_SHIFT 4 - -/* Class H Algorithm Control */ -#define CS35L35_CH_STEREO_MASK 0x40 -#define CS35L35_CH_STEREO_SHIFT 6 -#define CS35L35_CH_BST_OVR_MASK 0x04 -#define CS35L35_CH_BST_OVR_SHIFT 2 -#define CS35L35_CH_BST_LIM_MASK 0x08 -#define CS35L35_CH_BST_LIM_SHIFT 3 -#define CS35L35_CH_MEM_DEPTH_MASK 0x01 -#define CS35L35_CH_MEM_DEPTH_SHIFT 0 -#define CS35L35_CH_HDRM_CTL_MASK 0x3F -#define CS35L35_CH_HDRM_CTL_SHIFT 0 -#define CS35L35_CH_REL_RATE_MASK 0xFF -#define CS35L35_CH_REL_RATE_SHIFT 0 -#define CS35L35_CH_WKFET_DIS_MASK 0x80 -#define CS35L35_CH_WKFET_DIS_SHIFT 7 -#define CS35L35_CH_WKFET_DEL_MASK 0x70 -#define CS35L35_CH_WKFET_DEL_SHIFT 4 -#define CS35L35_CH_WKFET_THLD_MASK 0x0F -#define CS35L35_CH_WKFET_THLD_SHIFT 0 -#define CS35L35_CH_VP_AUTO_MASK 0x80 -#define CS35L35_CH_VP_AUTO_SHIFT 7 -#define CS35L35_CH_VP_RATE_MASK 0x60 -#define CS35L35_CH_VP_RATE_SHIFT 5 -#define CS35L35_CH_VP_MAN_MASK 0x1F -#define CS35L35_CH_VP_MAN_SHIFT 0 - -/* CS35L35_PROT_RELEASE_CTL */ -#define CS35L35_CAL_ERR_RLS 0x80 -#define CS35L35_SHORT_RLS 0x04 -#define CS35L35_OTW_RLS 0x02 -#define CS35L35_OTE_RLS 0x01 - -/* INT Mask Registers */ -#define CS35L35_INT1_CRIT_MASK 0x38 -#define CS35L35_INT2_CRIT_MASK 0xEF -#define CS35L35_INT3_CRIT_MASK 0xEE -#define CS35L35_INT4_CRIT_MASK 0xFF - -/* PDN DONE Masks */ -#define CS35L35_M_PDN_DONE_SHIFT 4 -#define CS35L35_M_PDN_DONE_MASK 0x10 - -/* CS35L35_INT_1 */ -#define CS35L35_CAL_ERR 0x80 -#define CS35L35_OTP_ERR 0x40 -#define CS35L35_LRCLK_ERR 0x20 -#define CS35L35_SPCLK_ERR 0x10 -#define CS35L35_MCLK_ERR 0x08 -#define CS35L35_AMP_SHORT 0x04 -#define CS35L35_OTW 0x02 -#define CS35L35_OTE 0x01 - -/* CS35L35_INT_2 */ -#define CS35L35_PDN_DONE 0x10 -#define CS35L35_VPBR_ERR 0x02 -#define CS35L35_VPBR_CLR 0x01 - -/* CS35L35_INT_3 */ -#define CS35L35_BST_HIGH 0x10 -#define CS35L35_BST_HIGH_FLAG 0x08 -#define CS35L35_BST_IPK_FLAG 0x04 -#define CS35L35_LBST_SHORT 0x01 - -/* CS35L35_INT_4 */ -#define CS35L35_VMON_OVFL 0x08 -#define CS35L35_IMON_OVFL 0x04 - -#define CS35L35_FORMATS (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | \ - SNDRV_PCM_FMTBIT_S24_LE) - -struct cs35l35_private { - struct i2c_client *i2c_client; - struct snd_soc_codec *codec; - struct cs35l35_platform_data pdata; - struct regmap *regmap; - struct regulator_bulk_data supplies[2]; - int num_supplies; - int sysclk; - int sclk; - int mclk_pll; - int mclk_div; - int mclk_sp_base; - bool tdm_mode; - bool pdm_mode; - bool i2s_enabled; - bool slave_mode; - bool pdm_mclk_switch; - /* GPIO for /RST */ - struct gpio_desc *reset_gpio; - /* GPIO for INT */ - struct gpio_desc *irq_gpio; - struct completion pdn_done; -}; - -static const char * const cs35l35_supplies[] = { - "VA", - "VP", -}; - -#endif diff --git a/sound/soc/codecs/cs35l36-tables.c b/sound/soc/codecs/cs35l36-tables.c deleted file mode 100644 index e7bbd7ddda23..000000000000 --- a/sound/soc/codecs/cs35l36-tables.c +++ /dev/null @@ -1,367 +0,0 @@ -/* - * cs35l36-tables.c -- CS35L36 ALSA SoC audio driver - * - * Copyright 2016 Cirrus Logic, Inc. - * - * Author: Brian Austin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include "cs35l36.h" - -struct reg_default cs35l36_reg[CS35L36_MAX_CACHE_REG] = { - {CS35L36_TESTKEY_CTRL, 0x00000000}, - {CS35L36_USERKEY_CTL, 0x00000000}, - {CS35L36_OTP_CTRL1, 0x00002460}, - {CS35L36_OTP_CTRL2, 0x00000000}, - {CS35L36_OTP_CTRL3, 0x00000000}, - {CS35L36_OTP_CTRL4, 0x00000000}, - {CS35L36_OTP_CTRL5, 0x00000000}, - {CS35L36_PAC_CTL1, 0x00000004}, - {CS35L36_PAC_CTL2, 0x00000000}, - {CS35L36_PAC_CTL3, 0x00000000}, - {CS35L36_PWR_CTRL1, 0x00000000}, - {CS35L36_PWR_CTRL2, 0x00003321}, - {CS35L36_PWR_CTRL3, 0x01000010}, - {CS35L36_CTRL_OVRRIDE, 0x00000002}, - {CS35L36_AMP_OUT_MUTE, 0x00000000}, - {CS35L36_OTP_TRIM_STATUS, 0x00000000}, - {CS35L36_DISCH_FILT, 0x00000000}, - {CS35L36_PROTECT_REL_ERR, 0x00000000}, - {CS35L36_PAD_INTERFACE, 0x00000038}, - {CS35L36_PLL_CLK_CTRL, 0x00000010}, - {CS35L36_GLOBAL_CLK_CTRL, 0x00000003}, - {CS35L36_ADC_CLK_CTRL, 0x00000000}, - {CS35L36_SWIRE_CLK_CTRL, 0x00000000}, - {CS35L36_SP_SCLK_CLK_CTRL, 0x00000000}, - {CS35L36_MDSYNC_EN, 0x00000000}, - {CS35L36_MDSYNC_TX_ID, 0x00000000}, - {CS35L36_MDSYNC_PWR_CTRL, 0x00000000}, - {CS35L36_MDSYNC_DATA_TX, 0x00000000}, - {CS35L36_MDSYNC_TX_STATUS, 0x00000002}, - {CS35L36_MDSYNC_RX_STATUS, 0x00000000}, - {CS35L36_MDSYNC_ERR_STATUS, 0x00000000}, - {CS35L36_BSTCVRT_VCTRL1, 0x00000000}, - {CS35L36_BSTCVRT_VCTRL2, 0x00000001}, - {CS35L36_BSTCVRT_PEAK_CUR, 0x0000004A}, - {CS35L36_BSTCVRT_SFT_RAMP, 0x00000003}, - {CS35L36_BSTCVRT_COEFF, 0x00002424}, - {CS35L36_BSTCVRT_SLOPE_LBST, 0x00005800}, - {CS35L36_BSTCVRT_SW_FREQ, 0x00010000}, - {CS35L36_BSTCVRT_DCM_CTRL, 0x00002001}, - {CS35L36_BSTCVRT_DCM_MODE_FORCE, 0x00000000}, - {CS35L36_BSTCVRT_OVERVOLT_CTRL, 0x00000130}, - {CS35L36_VPI_LIMIT_MODE, 0x00000000}, - {CS35L36_VPI_LIMIT_MINMAX, 0x00003000}, - {CS35L36_VPI_VP_THLD, 0x00101010}, - {CS35L36_VPI_TRACK_CTRL, 0x00000000}, - {CS35L36_VPI_TRIG_MODE_CTRL, 0x00000000}, - {CS35L36_VPI_TRIG_STEPS, 0x00000000}, - {CS35L36_VI_SPKMON_FILT, 0x00000003}, - {CS35L36_VI_SPKMON_GAIN, 0x00000909}, - {CS35L36_VI_SPKMON_IP_SEL, 0x00000000}, - {CS35L36_DTEMP_WARN_THLD, 0x00000002}, - {CS35L36_DTEMP_STATUS, 0x00000000}, - {CS35L36_VPVBST_FS_SEL, 0x00000001}, - {CS35L36_VPVBST_VP_CTRL, 0x000001C0}, - {CS35L36_VPVBST_VBST_CTRL, 0x000001C0}, - {CS35L36_ASP_TX_PIN_CTRL, 0x00000028}, - {CS35L36_ASP_RATE_CTRL, 0x00090000}, - {CS35L36_ASP_FORMAT, 0x00000002}, - {CS35L36_ASP_FRAME_CTRL, 0x00180018}, - {CS35L36_ASP_TX1_TX2_SLOT, 0x00010000}, - {CS35L36_ASP_TX3_TX4_SLOT, 0x00030002}, - {CS35L36_ASP_TX5_TX6_SLOT, 0x00050004}, - {CS35L36_ASP_TX7_TX8_SLOT, 0x00070006}, - {CS35L36_ASP_RX1_SLOT, 0x00000000}, - {CS35L36_ASP_RX_TX_EN, 0x00000000}, - {CS35L36_ASP_RX1_SEL, 0x00000008}, - {CS35L36_ASP_TX1_SEL, 0x00000018}, - {CS35L36_ASP_TX2_SEL, 0x00000019}, - {CS35L36_ASP_TX3_SEL, 0x00000028}, - {CS35L36_ASP_TX4_SEL, 0x00000029}, - {CS35L36_ASP_TX5_SEL, 0x00000020}, - {CS35L36_ASP_TX6_SEL, 0x00000000}, - {CS35L36_SWIRE_P1_TX1_SEL, 0x00000018}, - {CS35L36_SWIRE_P1_TX2_SEL, 0x00000019}, - {CS35L36_SWIRE_P2_TX1_SEL, 0x00000028}, - {CS35L36_SWIRE_P2_TX2_SEL, 0x00000029}, - {CS35L36_SWIRE_P2_TX3_SEL, 0x00000020}, - {CS35L36_SWIRE_DP1_FIFO_CFG, 0x0000001B}, - {CS35L36_SWIRE_DP2_FIFO_CFG, 0x0000001B}, - {CS35L36_SWIRE_DP3_FIFO_CFG, 0x0000001B}, - {CS35L36_SWIRE_PCM_RX_DATA, 0x00000000}, - {CS35L36_SWIRE_FS_SEL, 0x00000001}, - {CS35L36_AMP_DIG_VOL_CTRL, 0x00008000}, - {CS35L36_VPBR_CFG, 0x02AA1905}, - {CS35L36_VBBR_CFG, 0x02AA1905}, - {CS35L36_VPBR_STATUS, 0x00000000}, - {CS35L36_VBBR_STATUS, 0x00000000}, - {CS35L36_OVERTEMP_CFG, 0x00000001}, - {CS35L36_AMP_ERR_VOL, 0x00000000}, - {CS35L36_CLASSH_CFG, 0x000B0405}, - {CS35L36_CLASSH_FET_DRV_CFG, 0x00000111}, - {CS35L36_NG_CFG, 0x00000033}, - {CS35L36_AMP_GAIN_CTRL, 0x00000273}, - {CS35L36_PWM_MOD_IO_CTRL, 0x00000000}, - {CS35L36_PWM_MOD_STATUS, 0x00000000}, - {CS35L36_DAC_MSM_CFG, 0x00000000}, - {CS35L36_AMP_SLOPE_CTRL, 0x00000B00}, - {CS35L36_AMP_PDM_VOLUME, 0x00000000}, - {CS35L36_AMP_PDM_RATE_CTRL, 0x00000000}, - {CS35L36_PDM_CH_SEL, 0x00000000}, - {CS35L36_AMP_NG_CTRL, 0x0000212F}, - {CS35L36_PDM_HIGHFILT_CTRL, 0x00000000}, - {CS35L36_PAC_INT0_CTRL, 0x00000001}, - {CS35L36_PAC_INT1_CTRL, 0x00000001}, - {CS35L36_PAC_INT2_CTRL, 0x00000001}, - {CS35L36_PAC_INT3_CTRL, 0x00000001}, - {CS35L36_PAC_INT4_CTRL, 0x00000001}, - {CS35L36_PAC_INT5_CTRL, 0x00000001}, - {CS35L36_PAC_INT6_CTRL, 0x00000001}, - {CS35L36_PAC_INT7_CTRL, 0x00000001}, -}; - -bool cs35l36_readable_reg(struct device *dev, unsigned int reg) -{ - switch (reg) { - case CS35L36_SW_RESET: - case CS35L36_SW_REV: - case CS35L36_HW_REV: - case CS35L36_TESTKEY_CTRL: - case CS35L36_USERKEY_CTL: - case CS35L36_OTP_MEM30: - case CS35L36_OTP_CTRL1: - case CS35L36_OTP_CTRL2: - case CS35L36_OTP_CTRL3: - case CS35L36_OTP_CTRL4: - case CS35L36_OTP_CTRL5: - case CS35L36_PAC_CTL1: - case CS35L36_PAC_CTL2: - case CS35L36_PAC_CTL3: - case CS35L36_DEVICE_ID: - case CS35L36_FAB_ID: - case CS35L36_REV_ID: - case CS35L36_PWR_CTRL1: - case CS35L36_PWR_CTRL2: - case CS35L36_PWR_CTRL3: - case CS35L36_CTRL_OVRRIDE: - case CS35L36_AMP_OUT_MUTE: - case CS35L36_OTP_TRIM_STATUS: - case CS35L36_DISCH_FILT: - case CS35L36_PROTECT_REL_ERR: - case CS35L36_PAD_INTERFACE: - case CS35L36_PLL_CLK_CTRL: - case CS35L36_GLOBAL_CLK_CTRL: - case CS35L36_ADC_CLK_CTRL: - case CS35L36_SWIRE_CLK_CTRL: - case CS35L36_SP_SCLK_CLK_CTRL: - case CS35L36_MDSYNC_EN: - case CS35L36_MDSYNC_TX_ID: - case CS35L36_MDSYNC_PWR_CTRL: - case CS35L36_MDSYNC_DATA_TX: - case CS35L36_MDSYNC_TX_STATUS: - case CS35L36_MDSYNC_RX_STATUS: - case CS35L36_MDSYNC_ERR_STATUS: - case CS35L36_BSTCVRT_VCTRL1: - case CS35L36_BSTCVRT_VCTRL2: - case CS35L36_BSTCVRT_PEAK_CUR: - case CS35L36_BSTCVRT_SFT_RAMP: - case CS35L36_BSTCVRT_COEFF: - case CS35L36_BSTCVRT_SLOPE_LBST: - case CS35L36_BSTCVRT_SW_FREQ: - case CS35L36_BSTCVRT_DCM_CTRL: - case CS35L36_BSTCVRT_DCM_MODE_FORCE: - case CS35L36_BSTCVRT_OVERVOLT_CTRL: - case CS35L36_BST_TST_MANUAL: - case CS35L36_BST_ANA2_TEST: - case CS35L36_VPI_LIMIT_MODE: - case CS35L36_VPI_LIMIT_MINMAX: - case CS35L36_VPI_VP_THLD: - case CS35L36_VPI_TRACK_CTRL: - case CS35L36_VPI_TRIG_MODE_CTRL: - case CS35L36_VPI_TRIG_STEPS: - case CS35L36_VI_SPKMON_FILT: - case CS35L36_VI_SPKMON_GAIN: - case CS35L36_VI_SPKMON_IP_SEL: - case CS35L36_DTEMP_WARN_THLD: - case CS35L36_DTEMP_STATUS: - case CS35L36_VPVBST_FS_SEL: - case CS35L36_VPVBST_VP_CTRL: - case CS35L36_VPVBST_VBST_CTRL: - case CS35L36_ASP_TX_PIN_CTRL: - case CS35L36_ASP_RATE_CTRL: - case CS35L36_ASP_FORMAT: - case CS35L36_ASP_FRAME_CTRL: - case CS35L36_ASP_TX1_TX2_SLOT: - case CS35L36_ASP_TX3_TX4_SLOT: - case CS35L36_ASP_TX5_TX6_SLOT: - case CS35L36_ASP_TX7_TX8_SLOT: - case CS35L36_ASP_RX1_SLOT: - case CS35L36_ASP_RX_TX_EN: - case CS35L36_ASP_RX1_SEL: - case CS35L36_ASP_TX1_SEL: - case CS35L36_ASP_TX2_SEL: - case CS35L36_ASP_TX3_SEL: - case CS35L36_ASP_TX4_SEL: - case CS35L36_ASP_TX5_SEL: - case CS35L36_ASP_TX6_SEL: - case CS35L36_SWIRE_P1_TX1_SEL: - case CS35L36_SWIRE_P1_TX2_SEL: - case CS35L36_SWIRE_P2_TX1_SEL: - case CS35L36_SWIRE_P2_TX2_SEL: - case CS35L36_SWIRE_P2_TX3_SEL: - case CS35L36_SWIRE_DP1_FIFO_CFG: - case CS35L36_SWIRE_DP2_FIFO_CFG: - case CS35L36_SWIRE_DP3_FIFO_CFG: - case CS35L36_SWIRE_PCM_RX_DATA: - case CS35L36_SWIRE_FS_SEL: - case CS35L36_AMP_DIG_VOL_CTRL: - case CS35L36_VPBR_CFG: - case CS35L36_VBBR_CFG: - case CS35L36_VPBR_STATUS: - case CS35L36_VBBR_STATUS: - case CS35L36_OVERTEMP_CFG: - case CS35L36_AMP_ERR_VOL: - case CS35L36_CLASSH_CFG: - case CS35L36_CLASSH_FET_DRV_CFG: - case CS35L36_NG_CFG: - case CS35L36_AMP_GAIN_CTRL: - case CS35L36_PWM_MOD_IO_CTRL: - case CS35L36_PWM_MOD_STATUS: - case CS35L36_DAC_MSM_CFG: - case CS35L36_AMP_SLOPE_CTRL: - case CS35L36_AMP_PDM_VOLUME: - case CS35L36_AMP_PDM_RATE_CTRL: - case CS35L36_PDM_CH_SEL: - case CS35L36_AMP_NG_CTRL: - case CS35L36_PDM_HIGHFILT_CTRL: - case CS35L36_INT1_STATUS: - case CS35L36_INT2_STATUS: - case CS35L36_INT3_STATUS: - case CS35L36_INT4_STATUS: - case CS35L36_INT1_RAW_STATUS: - case CS35L36_INT2_RAW_STATUS: - case CS35L36_INT3_RAW_STATUS: - case CS35L36_INT4_RAW_STATUS: - case CS35L36_INT1_MASK: - case CS35L36_INT2_MASK: - case CS35L36_INT3_MASK: - case CS35L36_INT4_MASK: - case CS35L36_INT1_EDGE_LVL_CTRL: - case CS35L36_INT3_EDGE_LVL_CTRL: - case CS35L36_PAC_INT_STATUS: - case CS35L36_PAC_INT_RAW_STATUS: - case CS35L36_PAC_INT_FLUSH_CTRL: - case CS35L36_PAC_INT0_CTRL: - case CS35L36_PAC_INT1_CTRL: - case CS35L36_PAC_INT2_CTRL: - case CS35L36_PAC_INT3_CTRL: - case CS35L36_PAC_INT4_CTRL: - case CS35L36_PAC_INT5_CTRL: - case CS35L36_PAC_INT6_CTRL: - case CS35L36_PAC_INT7_CTRL: - return true; - default: - if (reg >= CS35L36_PAC_PMEM_WORD0 && - reg <= CS35L36_PAC_PMEM_WORD1023) - return true; - else - return false; - } -} - -bool cs35l36_volatile_reg(struct device *dev, unsigned int reg) -{ - switch (reg) { - case CS35L36_SW_RESET: - case CS35L36_SW_REV: - case CS35L36_HW_REV: - case CS35L36_DEVICE_ID: - case CS35L36_FAB_ID: - case CS35L36_REV_ID: - case CS35L36_PWR_CTRL1: - case CS35L36_INT1_STATUS: - case CS35L36_INT2_STATUS: - case CS35L36_INT3_STATUS: - case CS35L36_INT4_STATUS: - case CS35L36_INT1_RAW_STATUS: - case CS35L36_INT2_RAW_STATUS: - case CS35L36_INT3_RAW_STATUS: - case CS35L36_INT4_RAW_STATUS: - case CS35L36_INT1_MASK: - case CS35L36_INT2_MASK: - case CS35L36_INT3_MASK: - case CS35L36_INT4_MASK: - case CS35L36_INT1_EDGE_LVL_CTRL: - case CS35L36_INT3_EDGE_LVL_CTRL: - case CS35L36_PAC_INT_STATUS: - case CS35L36_PAC_INT_RAW_STATUS: - case CS35L36_PAC_INT_FLUSH_CTRL: - return true; - default: - if (reg >= CS35L36_PAC_PMEM_WORD0 && - reg <= CS35L36_PAC_PMEM_WORD1023) - return true; - else - return false; - } -} - -const unsigned int cs35l36_aou_low_power_patch[] = { - 0x022f0902, 0x01080a08, 0xe0c00000, 0x80028775, - 0x020000fb, 0xe0c02c08, 0xd2200a12, 0x0c878501, - 0x53fdf453, 0xf875fbf4, 0x32e0d002, 0x0a12e0c0, - 0x8501d220, 0xf4530c87, 0xfbf453fd, 0xd004f875, - 0x81c132e0, 0x00000d01, 0x02000000, 0xf9751608, - 0xfaf5e482, 0xfcf5fbf5, 0x7520fd75, 0xff7555e8, - 0xf5d6f555, 0xaae875d7, 0xf5aaff75, 0x75d7f5d6, - 0xfaf580f9, 0xfc75fbf5, 0x4efd755c, 0x7501e875, - 0xfaf580f9, 0xfc75fbf5, 0x54fd755c, 0x750fe875, - 0xfaf580f9, 0xfc75fbf5, 0x5cfd755c, 0x530ee885, - 0x0e43700e, 0xe80e8504, 0xf580f975, 0x75fbf5fa, - 0xfd7520fc, 0x0de88530, 0x758f0d53, 0xfaf582f9, - 0xfcf5fbf5, 0x7520fd75, 0xff75cce8, 0xf5d6f5cc, - 0x33e875d7, 0xf533ff75, 0x7dd7f5d6, 0x12027f01, - 0xf975170b, 0xfaf5e480, 0x75d0fb75, 0xfd7502fc, - 0x01e87524, 0xf580f975, 0xd0fb75fa, 0x7502fc75, - 0xe87526fd, 0x047ffd4e, 0x75170b12, 0xf5e480f9, - 0xd0fb75fa, 0x7502fc75, 0xe87528fd, 0x80f97501, - 0xfb75faf5, 0x02fc75d0, 0x752afd75, 0x78224ee8, - 0xd8f6e47f, 0x208175fd, 0x02760902, 0x93e4db0a, - 0x93e4f8a3, 0xf60340a3, 0x08f20180, 0x2980f4df, - 0xf8a393e4, 0x0c240754, 0xc433c3c8, 0x20440f54, - 0x044083c8, 0x018056f4, 0xe4dff646, 0x02010b80, - 0x20100804, 0x08908040, 0x017ee442, 0xa3bc6093, - 0x303f54ff, 0x1f5409e5, 0xa393e4fe, 0xcf0e0160, - 0xe025c054, 0xb840a860, 0xfaa393e4, 0xf8a393e4, - 0xc8a393e4, 0xcac882c5, 0xf0ca83c5, 0x82c5c8a3, - 0x83c5cac8, 0xdee9dfca, 0x75be80e7, 0xf5e482f9, - 0xf5fbf5fa, 0x20fd75fc, 0x7555e875, 0xd6f555ff, - 0xe875d7f5, 0xaaff75aa, 0xd7f5d6f5, 0xf580f975, - 0x75fbf5fa, 0xfd7520fc, 0x0de88530, 0x7580e875, - 0xfaf580f9, 0xfc75fbf5, 0x30fd752d, 0x7504e843, - 0xfaf582f9, 0xfcf5fbf5, 0x7520fd75, 0xff75cce8, - 0xf5d6f5cc, 0x33e875d7, 0xf533ff75, 0x22d7f5d6, - 0xe482f975, 0xfbf5faf5, 0xfd75fcf5, 0x55e87520, - 0xf555ff75, 0x75d7f5d6, 0xff75aae8, 0xf5d6f5aa, - 0x80f975d7, 0xfbf5faf5, 0x7520fc75, 0x0d8530fd, - 0x80f975e8, 0xfbf5faf5, 0x752dfc75, 0xe85330fd, - 0x82f975fb, 0xfbf5faf5, 0xfd75fcf5, 0xcce87520, - 0xf5ccff75, 0x75d7f5d6, 0xff7533e8, 0xf5d6f533, - 0xf5e422d7, 0x750bf50a, 0xfaf580f9, 0xf5d0fb75, - 0x29fd75fc, 0x4054e8e5, 0x088508f5, 0x54e8e509, - 0x6508f540, 0x05047009, 0xe403800a, 0x0b050af5, - 0x94c30ae5, 0xe5075003, 0x1094c30b, 0xf975dc40, - 0xfaf5e480, 0xfc75fbf5, 0x14fd7520, 0x046008e5, - 0x2201e875, 0x12e8f5e4, 0xc222bb09, 0x8ef5e400, - 0x53fdf453, 0x0812fbf4, 0x02f8754e, 0x7502f443, - 0xf44304f8, 0x85a87504, 0x3002b875, 0x01c20b01, - 0x43820a12, 0xf44302f4, 0x4487e504, 0x200cf501, - 0x0c85e901, 0xefe48087, 0x60edf542, 0xf642ef05, - 0xf4ef0480, 0xf88ff652, 0x22f442ef, 0x0000521c -}; diff --git a/sound/soc/codecs/cs35l36.c b/sound/soc/codecs/cs35l36.c deleted file mode 100644 index 568abfd618b1..000000000000 --- a/sound/soc/codecs/cs35l36.c +++ /dev/null @@ -1,1787 +0,0 @@ -/* - * cs35l36.c -- CS35L36 ALSA SoC audio driver - * - * Copyright 2016 Cirrus Logic, Inc. - * - * Author: Brian Austin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "cs35l36.h" - -/* - * Some fields take zero as a valid value so use a high bit flag that won't - * get written to the device to mark those. - */ -#define CS35L36_VALID_PDATA 0x80000000 - - -static const char * const cs35l36_supplies[] = { - "VA", - "VP", -}; - -struct cs35l36_private { - struct device *dev; - struct cs35l36_platform_data pdata; - struct regmap *regmap; - struct regulator_bulk_data supplies[2]; - int num_supplies; - int clksrc; - int prev_clksrc; - int extclk_freq; - int extclk_cfg; - int fll_igain; - int sclk; - int chip_version; - int rev_id; - struct gpio_desc *reset_gpio; - struct completion global_pup_done; - struct completion global_pdn_done; -}; - -struct cs35l36_pll_sysclk_config { - int freq; - int clk_cfg; - int fll_igain; -}; - -static const struct cs35l36_pll_sysclk_config cs35l36_pll_sysclk[] = { - {32768, 0x00, 0x05}, - {8000, 0x01, 0x03}, - {11025, 0x02, 0x03}, - {12000, 0x03, 0x03}, - {16000, 0x04, 0x04}, - {22050, 0x05, 0x04}, - {24000, 0x06, 0x04}, - {32000, 0x07, 0x05}, - {44100, 0x08, 0x05}, - {48000, 0x09, 0x05}, - {88200, 0x0A, 0x06}, - {96000, 0x0B, 0x06}, - {128000, 0x0C, 0x07}, - {176400, 0x0D, 0x07}, - {192000, 0x0E, 0x07}, - {256000, 0x0F, 0x08}, - {352800, 0x10, 0x08}, - {384000, 0x11, 0x08}, - {512000, 0x12, 0x09}, - {705600, 0x13, 0x09}, - {750000, 0x14, 0x09}, - {768000, 0x15, 0x09}, - {1000000, 0x16, 0x0A}, - {1024000, 0x17, 0x0A}, - {1200000, 0x18, 0x0A}, - {1411200, 0x19, 0x0A}, - {1500000, 0x1A, 0x0A}, - {1536000, 0x1B, 0x0A}, - {2000000, 0x1C, 0x0A}, - {2048000, 0x1D, 0x0A}, - {2400000, 0x1E, 0x0A}, - {2822400, 0x1F, 0x0A}, - {3000000, 0x20, 0x0A}, - {3072000, 0x21, 0x0A}, - {3200000, 0x22, 0x0A}, - {4000000, 0x23, 0x0A}, - {4096000, 0x24, 0x0A}, - {4800000, 0x25, 0x0A}, - {5644800, 0x26, 0x0A}, - {6000000, 0x27, 0x0A}, - {6144000, 0x28, 0x0A}, - {6250000, 0x29, 0x08}, - {6400000, 0x2A, 0x0A}, - {6500000, 0x2B, 0x08}, - {6750000, 0x2C, 0x09}, - {7526400, 0x2D, 0x0A}, - {8000000, 0x2E, 0x0A}, - {8192000, 0x2F, 0x0A}, - {9600000, 0x30, 0x0A}, - {11289600, 0x31, 0x0A}, - {12000000, 0x32, 0x0A}, - {12288000, 0x33, 0x0A}, - {12500000, 0x34, 0x08}, - {12800000, 0x35, 0x0A}, - {13000000, 0x36, 0x0A}, - {13500000, 0x37, 0x0A}, - {19200000, 0x38, 0x0A}, - {22579200, 0x39, 0x0A}, - {24000000, 0x3A, 0x0A}, - {24576000, 0x3B, 0x0A}, - {25000000, 0x3C, 0x0A}, - {25600000, 0x3D, 0x0A}, - {26000000, 0x3E, 0x0A}, - {27000000, 0x3F, 0x0A}, -}; - -static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10200, 25, 0); -static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 0, 1, 1); - -static const char * const cs35l36_pcm_sftramp_text[] = { - "Off", ".5ms", "1ms", "2ms", "4ms", "8ms", "15ms", "30ms"}; - -static SOC_ENUM_SINGLE_DECL(pcm_sft_ramp, - CS35L36_AMP_DIG_VOL_CTRL, 0, - cs35l36_pcm_sftramp_text); - -static const struct snd_kcontrol_new cs35l36_aud_controls[] = { - SOC_SINGLE_SX_TLV("Digital PCM Volume", CS35L36_AMP_DIG_VOL_CTRL, - 3, 0x4D0, 0x390, dig_vol_tlv), - SOC_SINGLE_TLV("AMP PCM Gain", CS35L36_AMP_GAIN_CTRL, 5, 0x13, 0, - amp_gain_tlv), - SOC_ENUM("PCM Soft Ramp", pcm_sft_ramp), -}; - -static int cs35l36_main_amp_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct cs35l36_private *cs35l36 = snd_soc_codec_get_drvdata(codec); - u32 reg; - int ret = 0; - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - regmap_update_bits(cs35l36->regmap, CS35L36_PWR_CTRL1, - CS35L36_GLOBAL_EN_MASK, - 1 << CS35L36_GLOBAL_EN_SHIFT); - usleep_range(2000, 2100); - - regmap_read(cs35l36->regmap, CS35L36_INT4_RAW_STATUS, ®); - if (reg & CS35L36_PLL_UNLOCK_MASK) - dev_crit(cs35l36->dev, "PLL Unlocked\n"); - - regmap_update_bits(cs35l36->regmap, CS35L36_ASP_RX1_SEL, - CS35L36_PCM_RX_SEL_MASK, - CS35L36_PCM_RX_SEL_PCM); - regmap_update_bits(cs35l36->regmap, CS35L36_AMP_OUT_MUTE, - CS35L36_AMP_MUTE_MASK, - 0 << CS35L36_AMP_MUTE_SHIFT); - break; - case SND_SOC_DAPM_POST_PMD: - regmap_update_bits(cs35l36->regmap, CS35L36_ASP_RX1_SEL, - CS35L36_PCM_RX_SEL_MASK, - CS35L36_PCM_RX_SEL_ZERO); - regmap_update_bits(cs35l36->regmap, CS35L36_AMP_OUT_MUTE, - CS35L36_AMP_MUTE_MASK, - 1 << CS35L36_AMP_MUTE_SHIFT); - - regmap_update_bits(cs35l36->regmap, CS35L36_PWR_CTRL1, - CS35L36_GLOBAL_EN_MASK, - 0 << CS35L36_GLOBAL_EN_SHIFT); - usleep_range(2000, 2100); - break; - default: - dev_dbg(codec->dev, "Invalid event = 0x%x\n", event); - } - return ret; -} - -static int cs35l36_boost_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct cs35l36_private *cs35l36 = snd_soc_codec_get_drvdata(codec); - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - if (!cs35l36->pdata.extern_boost) - regmap_update_bits(cs35l36->regmap, CS35L36_PWR_CTRL2, - CS35L36_BST_EN_MASK, - CS35L36_BST_EN << - CS35L36_BST_EN_SHIFT); - break; - case SND_SOC_DAPM_POST_PMD: - if (!cs35l36->pdata.extern_boost) - regmap_update_bits(cs35l36->regmap, CS35L36_PWR_CTRL2, - CS35L36_BST_EN_MASK, - CS35L36_BST_DIS_VP << - CS35L36_BST_EN_SHIFT); - break; - default: - dev_dbg(codec->dev, "Invalid event = 0x%x\n", event); - } - return 0; -} -static const char * const cs35l36_chan_text[] = { - "RX1", - "RX2", -}; - -static SOC_ENUM_SINGLE_DECL(chansel_enum, CS35L36_ASP_RX1_SLOT, 0, - cs35l36_chan_text); - -static const struct snd_kcontrol_new cs35l36_chan_mux[] = { - SOC_DAPM_ENUM("Input Mux", chansel_enum), -}; - -static const char * const cs35l36_boost_text[] = { - "On", - "Off", -}; - -static SOC_ENUM_SINGLE_DECL(boost_enum, SND_SOC_NOPM, 0, - cs35l36_boost_text); - -static const struct snd_kcontrol_new cs35l36_boost_mux[] = { - SOC_DAPM_ENUM("Boost Enable", boost_enum), -}; - -static const struct snd_kcontrol_new amp_enable_ctrl = - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0); - -static const char * const asp_tx_src_text[] = { - "Zero Fill", "ASPRX1", "VMON", "IMON", - "ERRVOL", "VPMON", "VBSTMON" -}; - -static const unsigned int asp_tx_src_values[] = { - 0x00, 0x08, 0x18, 0x19, 0x20, 0x28, 0x29 -}; - -static SOC_VALUE_ENUM_SINGLE_DECL(asp_tx1_src_enum, - CS35L36_ASP_TX1_SEL, 0, - CS35L36_APS_TX_SEL_MASK, - asp_tx_src_text, - asp_tx_src_values); - -static const struct snd_kcontrol_new asp_tx1_src = - SOC_DAPM_ENUM("ASPTX1SRC", asp_tx1_src_enum); - -static SOC_VALUE_ENUM_SINGLE_DECL(asp_tx2_src_enum, - CS35L36_ASP_TX2_SEL, 0, - CS35L36_APS_TX_SEL_MASK, - asp_tx_src_text, - asp_tx_src_values); - -static const struct snd_kcontrol_new asp_tx2_src = - SOC_DAPM_ENUM("ASPTX2SRC", asp_tx2_src_enum); - -static SOC_VALUE_ENUM_SINGLE_DECL(asp_tx3_src_enum, - CS35L36_ASP_TX3_SEL, 0, - CS35L36_APS_TX_SEL_MASK, - asp_tx_src_text, - asp_tx_src_values); - -static const struct snd_kcontrol_new asp_tx3_src = - SOC_DAPM_ENUM("ASPTX3SRC", asp_tx3_src_enum); - -static SOC_VALUE_ENUM_SINGLE_DECL(asp_tx4_src_enum, - CS35L36_ASP_TX4_SEL, 0, - CS35L36_APS_TX_SEL_MASK, - asp_tx_src_text, - asp_tx_src_values); - -static const struct snd_kcontrol_new asp_tx4_src = - SOC_DAPM_ENUM("ASPTX4SRC", asp_tx4_src_enum); - -static SOC_VALUE_ENUM_SINGLE_DECL(asp_tx5_src_enum, - CS35L36_ASP_TX5_SEL, 0, - CS35L36_APS_TX_SEL_MASK, - asp_tx_src_text, - asp_tx_src_values); - -static const struct snd_kcontrol_new asp_tx5_src = - SOC_DAPM_ENUM("ASPTX5SRC", asp_tx5_src_enum); - -static SOC_VALUE_ENUM_SINGLE_DECL(asp_tx6_src_enum, - CS35L36_ASP_TX6_SEL, 0, - CS35L36_APS_TX_SEL_MASK, - asp_tx_src_text, - asp_tx_src_values); - -static const struct snd_kcontrol_new asp_tx6_src = - SOC_DAPM_ENUM("ASPTX6SRC", asp_tx6_src_enum); - -static const struct snd_soc_dapm_widget cs35l36_dapm_widgets[] = { - - SND_SOC_DAPM_MUX("Channel Mux", SND_SOC_NOPM, 0, 0, cs35l36_chan_mux), - SND_SOC_DAPM_AIF_IN("SDIN", NULL, 0, CS35L36_ASP_RX_TX_EN, 16, 0), - - SND_SOC_DAPM_OUT_DRV_E("Main AMP", CS35L36_PWR_CTRL2, 0, 0, NULL, 0, - cs35l36_main_amp_event, SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), - - SND_SOC_DAPM_OUTPUT("SPK"), - SND_SOC_DAPM_SWITCH("AMP Enable", SND_SOC_NOPM, 0, 1, &_enable_ctrl), - SND_SOC_DAPM_MIXER("CLASS H", CS35L36_PWR_CTRL3, 4, 0, NULL, 0), - SND_SOC_DAPM_MUX_E("BOOST Mux", SND_SOC_NOPM, 0, 0, cs35l36_boost_mux, - cs35l36_boost_event, SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_POST_PMU), - - SND_SOC_DAPM_AIF_OUT("ASPTX1", NULL, 0, CS35L36_ASP_RX_TX_EN, 0, 0), - SND_SOC_DAPM_AIF_OUT("ASPTX2", NULL, 1, CS35L36_ASP_RX_TX_EN, 1, 0), - SND_SOC_DAPM_AIF_OUT("ASPTX3", NULL, 2, CS35L36_ASP_RX_TX_EN, 2, 0), - SND_SOC_DAPM_AIF_OUT("ASPTX4", NULL, 3, CS35L36_ASP_RX_TX_EN, 3, 0), - SND_SOC_DAPM_AIF_OUT("ASPTX5", NULL, 4, CS35L36_ASP_RX_TX_EN, 4, 0), - SND_SOC_DAPM_AIF_OUT("ASPTX6", NULL, 5, CS35L36_ASP_RX_TX_EN, 5, 0), - - SND_SOC_DAPM_MUX("ASPTX1SRC", SND_SOC_NOPM, 0, 0, &asp_tx1_src), - SND_SOC_DAPM_MUX("ASPTX2SRC", SND_SOC_NOPM, 0, 0, &asp_tx2_src), - SND_SOC_DAPM_MUX("ASPTX3SRC", SND_SOC_NOPM, 0, 0, &asp_tx3_src), - SND_SOC_DAPM_MUX("ASPTX4SRC", SND_SOC_NOPM, 0, 0, &asp_tx4_src), - SND_SOC_DAPM_MUX("ASPTX5SRC", SND_SOC_NOPM, 0, 0, &asp_tx5_src), - SND_SOC_DAPM_MUX("ASPTX6SRC", SND_SOC_NOPM, 0, 0, &asp_tx6_src), - - SND_SOC_DAPM_ADC("VMON ADC", NULL, CS35L36_PWR_CTRL2, 12, 0), - SND_SOC_DAPM_ADC("IMON ADC", NULL, CS35L36_PWR_CTRL2, 13, 0), - SND_SOC_DAPM_ADC("VPMON ADC", NULL, CS35L36_PWR_CTRL2, 8, 0), - SND_SOC_DAPM_ADC("VBSTMON ADC", NULL, CS35L36_PWR_CTRL2, 9, 0), - - SND_SOC_DAPM_INPUT("VP"), - SND_SOC_DAPM_INPUT("VBST"), - SND_SOC_DAPM_INPUT("VSENSE"), -}; - -static const struct snd_soc_dapm_route cs35l36_audio_map[] = { - - {"VPMON ADC", NULL, "VP"}, - {"VBSTMON ADC", NULL, "VBST"}, - {"IMON ADC", NULL, "VSENSE"}, - {"VMON ADC", NULL, "VSENSE"}, - - {"ASPTX1SRC", "IMON", "IMON ADC"}, - {"ASPTX1SRC", "VMON", "VMON ADC"}, - {"ASPTX1SRC", "VBSTMON", "VBSTMON ADC"}, - {"ASPTX1SRC", "VPMON", "VPMON ADC"}, - - {"ASPTX2SRC", "IMON", "IMON ADC"}, - {"ASPTX2SRC", "VMON", "VMON ADC"}, - {"ASPTX2SRC", "VBSTMON", "VBSTMON ADC"}, - {"ASPTX2SRC", "VPMON", "VPMON ADC"}, - - {"ASPTX3SRC", "IMON", "IMON ADC"}, - {"ASPTX3SRC", "VMON", "VMON ADC"}, - {"ASPTX3SRC", "VBSTMON", "VBSTMON ADC"}, - {"ASPTX3SRC", "VPMON", "VPMON ADC"}, - - {"ASPTX4SRC", "IMON", "IMON ADC"}, - {"ASPTX4SRC", "VMON", "VMON ADC"}, - {"ASPTX4SRC", "VBSTMON", "VBSTMON ADC"}, - {"ASPTX4SRC", "VPMON", "VPMON ADC"}, - - {"ASPTX5SRC", "IMON", "IMON ADC"}, - {"ASPTX5SRC", "VMON", "VMON ADC"}, - {"ASPTX5SRC", "VBSTMON", "VBSTMON ADC"}, - {"ASPTX5SRC", "VPMON", "VPMON ADC"}, - - {"ASPTX6SRC", "IMON", "IMON ADC"}, - {"ASPTX6SRC", "VMON", "VMON ADC"}, - {"ASPTX6SRC", "VBSTMON", "VBSTMON ADC"}, - {"ASPTX6SRC", "VPMON", "VPMON ADC"}, - - {"ASPTX1", NULL, "ASPTX1SRC"}, - {"ASPTX2", NULL, "ASPTX2SRC"}, - {"ASPTX3", NULL, "ASPTX3SRC"}, - {"ASPTX4", NULL, "ASPTX4SRC"}, - {"ASPTX5", NULL, "ASPTX5SRC"}, - {"ASPTX6", NULL, "ASPTX6SRC"}, - - {"AMP Capture", NULL, "ASPTX1"}, - {"AMP Capture", NULL, "ASPTX2"}, - {"AMP Capture", NULL, "ASPTX3"}, - {"AMP Capture", NULL, "ASPTX4"}, - {"AMP Capture", NULL, "ASPTX5"}, - {"AMP Capture", NULL, "ASPTX6"}, - - {"AMP Enable", "Switch", "AMP Playback"}, - {"SDIN", NULL, "AMP Enable"}, - {"Channel Mux", "RX1", "SDIN"}, - {"Channel Mux", "RX2", "SDIN"}, - {"BOOST Mux", "On", "SDIN"}, - {"CLASS H", NULL, "BOOST Mux"}, - {"Main AMP", NULL, "SDIN"}, - {"Main AMP", NULL, "CLASS H"}, - {"SPK", NULL, "Main AMP"}, -}; - -static int cs35l36_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) -{ - struct cs35l36_private *cs35l36 = - snd_soc_codec_get_drvdata(codec_dai->codec); - unsigned int asp_fmt, lrclk_fmt, sclk_fmt, slave_mode; - - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { - case SND_SOC_DAIFMT_CBM_CFM: - slave_mode = 1; - break; - case SND_SOC_DAIFMT_CBS_CFS: - slave_mode = 0; - break; - default: - return -EINVAL; - } - regmap_update_bits(cs35l36->regmap, CS35L36_ASP_TX_PIN_CTRL, - CS35L36_SCLK_MSTR_MASK, - slave_mode << CS35L36_SCLK_MSTR_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_ASP_RATE_CTRL, - CS35L36_LRCLK_MSTR_MASK, - slave_mode << CS35L36_LRCLK_MSTR_SHIFT); - - switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { - case SND_SOC_DAIFMT_DSP_A: - asp_fmt = 0; - break; - case SND_SOC_DAIFMT_I2S: - asp_fmt = 2; - break; - default: - return -EINVAL; - } - - switch (fmt & SND_SOC_DAIFMT_INV_MASK) { - case SND_SOC_DAIFMT_NB_IF: - lrclk_fmt = 1; - sclk_fmt = 0; - break; - case SND_SOC_DAIFMT_IB_NF: - lrclk_fmt = 0; - sclk_fmt = 1; - break; - case SND_SOC_DAIFMT_IB_IF: - lrclk_fmt = 1; - sclk_fmt = 1; - break; - case SND_SOC_DAIFMT_NB_NF: - lrclk_fmt = 0; - sclk_fmt = 0; - break; - default: - return -EINVAL; - } - - regmap_update_bits(cs35l36->regmap, CS35L36_ASP_RATE_CTRL, - CS35L36_LRCLK_INV_MASK, - lrclk_fmt << CS35L36_LRCLK_INV_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_ASP_TX_PIN_CTRL, - CS35L36_SCLK_INV_MASK, - sclk_fmt << CS35L36_SCLK_INV_SHIFT); - - regmap_update_bits(cs35l36->regmap, CS35L36_ASP_FORMAT, - CS35L36_ASP_FMT_MASK, asp_fmt); - - return 0; -} - -static int cs35l36_get_clk_config(struct cs35l36_private *cs35l36, int freq) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(cs35l36_pll_sysclk); i++) { - if (cs35l36_pll_sysclk[i].freq == freq) { - cs35l36->extclk_cfg = cs35l36_pll_sysclk[i].clk_cfg; - cs35l36->fll_igain = cs35l36_pll_sysclk[i].fll_igain; - return i; - } - } - return -EINVAL; -} - -static int cs35l36_codec_set_sysclk(struct snd_soc_codec *codec, - int clk_id, int source, unsigned int freq, - int dir) -{ - struct cs35l36_private *cs35l36 = snd_soc_codec_get_drvdata(codec); - int ret; - cs35l36->extclk_freq = freq; - - cs35l36->prev_clksrc = cs35l36->clksrc; - - dev_dbg(cs35l36->dev, "Set CODEC sysclk to %d\n", freq); - - switch (clk_id) { - case 0: - cs35l36->clksrc = CS35L36_PLLSRC_SCLK; - break; - case 1: - cs35l36->clksrc = CS35L36_PLLSRC_LRCLK; - break; - case 2: - cs35l36->clksrc = CS35L36_PLLSRC_PDMCLK; - break; - case 3: - cs35l36->clksrc = CS35L36_PLLSRC_SELF; - break; - case 4: - cs35l36->clksrc = CS35L36_PLLSRC_MCLK; - break; - default: - return -EINVAL; - } - - ret = cs35l36_get_clk_config(cs35l36, freq); - - if (ret < 0) { - dev_err(codec->dev, - "Invalid CLK Config Freq: %d\n", freq); - return -EINVAL; - } - - regmap_update_bits(cs35l36->regmap, CS35L36_PLL_CLK_CTRL, - CS35L36_PLL_OPENLOOP_MASK, - 1 << CS35L36_PLL_OPENLOOP_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_PLL_CLK_CTRL, - CS35L36_REFCLK_FREQ_MASK, - cs35l36->extclk_cfg << CS35L36_REFCLK_FREQ_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_PLL_CLK_CTRL, - CS35L36_PLL_REFCLK_EN_MASK, - 0 << CS35L36_PLL_REFCLK_EN_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_PLL_CLK_CTRL, - CS35L36_PLL_CLK_SEL_MASK, cs35l36->clksrc); - regmap_update_bits(cs35l36->regmap, CS35L36_PLL_CLK_CTRL, - CS35L36_PLL_OPENLOOP_MASK, - 0 << CS35L36_PLL_OPENLOOP_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_PLL_CLK_CTRL, - CS35L36_PLL_REFCLK_EN_MASK, - 1 << CS35L36_PLL_REFCLK_EN_SHIFT); - - if (cs35l36->rev_id == CS35L36_REV_A0) { - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_UNLOCK1); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_UNLOCK2); - regmap_write(cs35l36->regmap, CS35L36_DCO_CTRL, 0x00036DA8); - regmap_write(cs35l36->regmap, CS35L36_MISC_CTRL, 0x0100EE0E); - regmap_update_bits(cs35l36->regmap, CS35L36_PLL_LOOP_PARAMS, - CS35L36_PLL_IGAIN_MASK, - CS35L36_PLL_IGAIN << - CS35L36_PLL_IGAIN_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_PLL_LOOP_PARAMS, - CS35L36_PLL_FFL_IGAIN_MASK, - cs35l36->fll_igain); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_LOCK1); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_LOCK2); - } - - if (cs35l36->clksrc == CS35L36_PLLSRC_PDMCLK) { - if (cs35l36->pdata.ldm_mode_sel) { - if (cs35l36->prev_clksrc != CS35L36_PLLSRC_PDMCLK) - regmap_update_bits(cs35l36->regmap, - CS35L36_NG_CFG, - CS35L36_NG_DELAY_MASK, - 0 << CS35L36_NG_DELAY_SHIFT); - } - regmap_update_bits(cs35l36->regmap, CS35L36_DAC_MSM_CFG, - CS35L36_PDM_MODE_MASK, - 1 << CS35L36_PDM_MODE_SHIFT); - if (cs35l36->pdata.ldm_mode_sel) { - if (cs35l36->prev_clksrc != CS35L36_PLLSRC_PDMCLK) { - regmap_update_bits(cs35l36->regmap, - CS35L36_NG_CFG, - CS35L36_NG_DELAY_MASK, - 3 << CS35L36_NG_DELAY_SHIFT); - } - } - } else { - if (cs35l36->pdata.ldm_mode_sel) { - if (cs35l36->prev_clksrc == CS35L36_PLLSRC_PDMCLK) - regmap_update_bits(cs35l36->regmap, - CS35L36_NG_CFG, - CS35L36_NG_DELAY_MASK, - 0 << CS35L36_NG_DELAY_SHIFT); - } - regmap_update_bits(cs35l36->regmap, CS35L36_DAC_MSM_CFG, - CS35L36_PDM_MODE_MASK, - 0 << CS35L36_PDM_MODE_SHIFT); - if (cs35l36->pdata.ldm_mode_sel) { - if (cs35l36->prev_clksrc == CS35L36_PLLSRC_PDMCLK) { - regmap_update_bits(cs35l36->regmap, - CS35L36_NG_CFG, - CS35L36_NG_DELAY_MASK, - 3 << CS35L36_NG_DELAY_SHIFT); - } - } - } - - return 0; -} - -static int cs35l36_dai_set_sysclk(struct snd_soc_dai *dai, - int clk_id, unsigned int freq, int dir) -{ - struct snd_soc_codec *codec = dai->codec; - struct cs35l36_private *cs35l36 = snd_soc_codec_get_drvdata(codec); - int fs1_val = 0; - int fs2_val = 0; - - /* Need the SCLK Frequency regardless of sysclk source */ - cs35l36->sclk = freq; - - dev_dbg(cs35l36->dev, "Set DAI sysclk %d\n", freq); - if (cs35l36->sclk > 6000000) { - fs1_val = 3 * 4 + 4; - fs2_val = 8 * 4 + 4; - } - - if (cs35l36->sclk <= 6000000) { - fs1_val = 3 * ((24000000 + cs35l36->sclk - 1) / cs35l36->sclk) + 4; - fs2_val = 5 * ((24000000 + cs35l36->sclk - 1) / cs35l36->sclk) + 4; - } - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_UNLOCK1); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_UNLOCK2); - regmap_update_bits(cs35l36->regmap, CS35L36_TST_FS_MON0, - CS35L36_FS1_WINDOW_MASK, fs1_val); - regmap_update_bits(cs35l36->regmap, CS35L36_TST_FS_MON0, - CS35L36_FS2_WINDOW_MASK, fs2_val << - CS35L36_FS2_WINDOW_SHIFT); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_LOCK1); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_LOCK2); - return 0; -} - -struct cs35l36_global_fs_config { - int rate; - int fs_cfg; -}; - -static const struct cs35l36_global_fs_config cs35l36_fs_rates[] = { - {12000, 0x01}, - {24000, 0x02}, - {48000, 0x03}, - {96000, 0x04}, - {192000, 0x05}, - {384000, 0x06}, - {11025, 0x09}, - {22050, 0x0A}, - {44100, 0x0B}, - {88200, 0x0C}, - {176400, 0x0D}, - {8000, 0x11}, - {16000, 0x12}, - {32000, 0x13}, -}; - -static int cs35l36_pcm_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai) -{ - struct snd_soc_codec *codec = dai->codec; - struct cs35l36_private *cs35l36 = snd_soc_codec_get_drvdata(codec); - int i, ret = 0; - unsigned int global_fs = params_rate(params); - unsigned int asp_width; - int sclk_rate = params_rate(params) * params_width(params) - * params_channels(params); - - if ((cs35l36->clksrc == CS35L36_PLLSRC_SCLK) && - (cs35l36->sclk != sclk_rate)) { - dev_dbg(cs35l36->dev, "Reset sclk rate to %d from %d\n", - sclk_rate, cs35l36->sclk); - dev_dbg(cs35l36->dev, "rate %d width %d channels %d\n", params_rate(params), - params_width(params), params_channels(params)); - ret = cs35l36_codec_set_sysclk(codec, CS35L36_PLLSRC_SCLK, 0, - sclk_rate, 0); - if (ret != 0) { - dev_err(cs35l36->dev, "Can't set codec sysclk %d\n", ret); - return ret; - } - ret = cs35l36_dai_set_sysclk(dai, - CS35L36_PLLSRC_SCLK, sclk_rate, 0); - if (ret != 0) { - dev_err(cs35l36->dev, "Can't set dai sysclk %d\n", ret); - return ret; - } - } - - for (i = 0; i < ARRAY_SIZE(cs35l36_fs_rates); i++) { - if (global_fs == cs35l36_fs_rates[i].rate) - regmap_update_bits(cs35l36->regmap, - CS35L36_GLOBAL_CLK_CTRL, - CS35L36_GLOBAL_FS_MASK, - cs35l36_fs_rates[i].fs_cfg << - CS35L36_GLOBAL_FS_SHIFT); - } - - switch (params_width(params)) { - case 16: - asp_width = CS35L36_ASP_WIDTH_16; - break; - case 24: - asp_width = CS35L36_ASP_WIDTH_24; - break; - case 32: - asp_width = CS35L36_ASP_WIDTH_32; - break; - default: - return -EINVAL; - } - - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - regmap_update_bits(cs35l36->regmap, CS35L36_ASP_FRAME_CTRL, - CS35L36_ASP_RX_WIDTH_MASK, - asp_width << CS35L36_ASP_RX_WIDTH_SHIFT); - } else { - regmap_update_bits(cs35l36->regmap, CS35L36_ASP_FRAME_CTRL, - CS35L36_ASP_TX_WIDTH_MASK, - asp_width << CS35L36_ASP_TX_WIDTH_SHIFT); - } - - return ret; -} - -static const unsigned int cs35l36_src_rates[] = { - 8000, 12000, 11025, 16000, 22050, 24000, 32000, - 44100, 48000, 88200, 96000, 176400, 192000, 384000 -}; - -static const struct snd_pcm_hw_constraint_list cs35l36_constraints = { - .count = ARRAY_SIZE(cs35l36_src_rates), - .list = cs35l36_src_rates, -}; - -static int cs35l36_pcm_startup(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - if (!substream->runtime) - return 0; - - snd_pcm_hw_constraint_list(substream->runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, &cs35l36_constraints); - return 0; -} - -static const struct snd_soc_dai_ops cs35l36_ops = { - .startup = cs35l36_pcm_startup, - .set_fmt = cs35l36_set_dai_fmt, - .hw_params = cs35l36_pcm_hw_params, - .set_sysclk = cs35l36_dai_set_sysclk, -}; - -static struct snd_soc_dai_driver cs35l36_dai[] = { - { - .name = "cs35l36-pcm", - .id = 0, - .playback = { - .stream_name = "AMP Playback", - .channels_min = 1, - .channels_max = 8, - .rates = SNDRV_PCM_RATE_KNOT, - .formats = CS35L36_RX_FORMATS, - }, - .capture = { - .stream_name = "AMP Capture", - .channels_min = 1, - .channels_max = 8, - .rates = SNDRV_PCM_RATE_KNOT, - .formats = CS35L36_TX_FORMATS, - }, - .ops = &cs35l36_ops, - .symmetric_rates = 1, - }, -}; - -static int cs35l36_boost_inductor(struct cs35l36_private *cs35l36, int inductor) -{ - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_COEFF, - CS35L36_BSTCVRT_K1_MASK, 0x3C); - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_COEFF, - CS35L36_BSTCVRT_K2_MASK, - 0x3C << CS35L36_BSTCVRT_K2_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_SW_FREQ, - CS35L36_BSTCVRT_CCMFREQ_MASK, 0x00); - - switch (inductor) { - case 1000: /* 1 uH */ - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_SLOPE_LBST, - CS35L36_BSTCVRT_SLOPE_MASK, - 0x75 << CS35L36_BSTCVRT_SLOPE_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_SLOPE_LBST, - CS35L36_BSTCVRT_LBSTVAL_MASK, 0x00); - break; - case 1200: /* 1.2 uH */ - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_SLOPE_LBST, - CS35L36_BSTCVRT_SLOPE_MASK, - 0x6B << CS35L36_BSTCVRT_SLOPE_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_SLOPE_LBST, - CS35L36_BSTCVRT_LBSTVAL_MASK, 0x01); - break; - default: - dev_err(cs35l36->dev, "%s Invalid Inductor Value %d uH\n", - __func__, inductor); - return -EINVAL; - } - return 0; -} - -static int cs35l36_codec_probe(struct snd_soc_codec *codec) -{ - struct cs35l36_private *cs35l36 = snd_soc_codec_get_drvdata(codec); - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - int ret = 0; - - if (cs35l36->pdata.sclk_frc) - regmap_update_bits(cs35l36->regmap, - CS35L36_ASP_TX_PIN_CTRL, - CS35L36_SCLK_FRC_MASK, - cs35l36->pdata.sclk_frc << - CS35L36_SCLK_FRC_SHIFT); - - if (cs35l36->pdata.lrclk_frc) - regmap_update_bits(cs35l36->regmap, - CS35L36_ASP_RATE_CTRL, - CS35L36_LRCLK_FRC_MASK, - cs35l36->pdata.lrclk_frc << - CS35L36_LRCLK_FRC_SHIFT); - - if (cs35l36->rev_id == CS35L36_REV_A0) { - if (cs35l36->pdata.dcm_mode) { - regmap_update_bits(cs35l36->regmap, - CS35L36_BSTCVRT_DCM_CTRL, - CS35L36_DCM_AUTO_MASK, - CS35L36_DCM_AUTO_MASK); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_UNLOCK1); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_UNLOCK2); - regmap_update_bits(cs35l36->regmap, - CS35L36_BST_TST_MANUAL, - CS35L36_BST_MAN_IPKCOMP_MASK, - 0 << CS35L36_BST_MAN_IPKCOMP_SHIFT); - regmap_update_bits(cs35l36->regmap, - CS35L36_BST_TST_MANUAL, - CS35L36_BST_MAN_IPKCOMP_EN_MASK, - CS35L36_BST_MAN_IPKCOMP_EN_MASK); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_LOCK1); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_LOCK2); - } - } - - if (cs35l36->pdata.amp_gain_zc) - regmap_update_bits(cs35l36->regmap, CS35L36_AMP_GAIN_CTRL, - CS35L36_AMP_ZC_MASK, - CS35L36_AMP_ZC_MASK); - - if (cs35l36->pdata.amp_pcm_inv) - regmap_update_bits(cs35l36->regmap, CS35L36_AMP_DIG_VOL_CTRL, - CS35L36_AMP_PCM_INV_MASK, - CS35L36_AMP_PCM_INV_MASK); - - if (cs35l36->pdata.ldm_mode_sel) - regmap_update_bits(cs35l36->regmap, CS35L36_NG_CFG, - CS35L36_NG_AMP_EN_MASK, - CS35L36_NG_AMP_EN_MASK); - - if (cs35l36->pdata.multi_amp_mode) - regmap_update_bits(cs35l36->regmap, CS35L36_ASP_TX_PIN_CTRL, - CS35L36_ASP_TX_HIZ_MASK, - CS35L36_ASP_TX_HIZ_MASK); - - if (cs35l36->pdata.pdm_ldm_enter) - regmap_update_bits(cs35l36->regmap, CS35L36_DAC_MSM_CFG, - CS35L36_PDM_LDM_ENTER_MASK, - CS35L36_PDM_LDM_ENTER_MASK); - - if (cs35l36->pdata.pdm_ldm_exit) - regmap_update_bits(cs35l36->regmap, CS35L36_DAC_MSM_CFG, - CS35L36_PDM_LDM_EXIT_MASK, - CS35L36_PDM_LDM_EXIT_MASK); - - if (cs35l36->pdata.imon_pol_inv) - regmap_update_bits(cs35l36->regmap, CS35L36_VI_SPKMON_FILT, - CS35L36_IMON_POL_MASK, 0); - - if (cs35l36->pdata.vmon_pol_inv) - regmap_update_bits(cs35l36->regmap, CS35L36_VI_SPKMON_FILT, - CS35L36_VMON_POL_MASK, 0); - - if (cs35l36->pdata.bst_vctl) - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_VCTRL1, - CS35L35_BSTCVRT_CTL_MASK, - cs35l36->pdata.bst_vctl); - - if (cs35l36->pdata.bst_vctl_sel) - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_VCTRL2, - CS35L35_BSTCVRT_CTL_SEL_MASK, - cs35l36->pdata.bst_vctl_sel); - - if (cs35l36->pdata.bst_ipk) - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_PEAK_CUR, - CS35L36_BST_IPK_MASK, - cs35l36->pdata.bst_ipk); - - if (cs35l36->pdata.boost_ind) - ret = cs35l36_boost_inductor(cs35l36, cs35l36->pdata.boost_ind); - - if (cs35l36->pdata.temp_warn_thld) - regmap_update_bits(cs35l36->regmap, CS35L36_DTEMP_WARN_THLD, - CS35L36_TEMP_THLD_MASK, - cs35l36->pdata.temp_warn_thld); - - if (cs35l36->pdata.vpr_en) - regmap_update_bits(cs35l36->regmap, CS35L36_PWR_CTRL3, - CS35L36_VPBR_EN_MASK, - cs35l36->pdata.vpr_en << CS35L36_VPBR_EN_SHIFT); - - if (0xFFFF != cs35l36->pdata.vpr_thrld) - regmap_update_bits(cs35l36->regmap, CS35L36_VPBR_CFG, - CS35L36_VPBR_THLD_MASK, - cs35l36->pdata.vpr_thrld << CS35L36_VPBR_THLD_SHIFT); - - if (0xFFFF != cs35l36->pdata.vpr_atk_vol) - regmap_update_bits(cs35l36->regmap, CS35L36_VPBR_CFG, - CS35L36_VPBR_ATK_VOL_MASK, - cs35l36->pdata.vpr_atk_vol - << CS35L36_VPBR_ATK_VOL_SHIFT); - - if (0xFFFF != cs35l36->pdata.vpr_atk_rate) - regmap_update_bits(cs35l36->regmap, CS35L36_VPBR_CFG, - CS35L36_VPBR_ATK_RATE_MASK, - cs35l36->pdata.vpr_atk_rate - << CS35L36_VPBR_ATK_RATE_SHIFT); - - if (0xFFFF != cs35l36->pdata.vpr_wait) - regmap_update_bits(cs35l36->regmap, CS35L36_VPBR_CFG, - CS35L36_VPBR_WAIT_MASK, - cs35l36->pdata.vpr_wait - << CS35L36_VPBR_WAIT_SHIFT); - - if (0xFFFF != cs35l36->pdata.vpr_rel_rate) - regmap_update_bits(cs35l36->regmap, CS35L36_VPBR_CFG, - CS35L36_VPBR_REL_RATE_MASK, - cs35l36->pdata.vpr_rel_rate - << CS35L36_VPBR_REL_RATE_SHIFT); - - /* - * Rev B0 has 2 versions - * L36 is 10V - * L37 is 12V - * If L36 we need to clamp some values for safety - * after probe has setup dt values. We want to make - * sure we dont miss any values set in probe - */ - if (cs35l36->chip_version == CS35L36_10V_L36) { - regmap_update_bits(cs35l36->regmap, - CS35L36_BSTCVRT_OVERVOLT_CTRL, - CS35L36_BST_OVP_THLD_MASK, - CS35L36_BST_OVP_THLD_11V); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_UNLOCK1); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_UNLOCK2); - regmap_update_bits(cs35l36->regmap, CS35L36_BST_ANA2_TEST, - CS35L36_BST_OVP_TRIM_MASK, - CS35L36_BST_OVP_TRIM_11V << - CS35L36_BST_OVP_TRIM_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_VCTRL2, - CS35L36_BST_CTRL_LIM_MASK, - 1 << CS35L36_BST_CTRL_LIM_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_VCTRL1, - CS35L35_BSTCVRT_CTL_MASK, - CS35L36_BST_CTRL_10V_CLAMP); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_LOCK1); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_LOCK2); - } - snd_soc_dapm_ignore_suspend(dapm, "SDIN"); - snd_soc_dapm_ignore_suspend(dapm, "SDOUT"); - snd_soc_dapm_ignore_suspend(dapm, "SPK"); - snd_soc_dapm_ignore_suspend(dapm, "VP"); - snd_soc_dapm_ignore_suspend(dapm, "VBST"); - snd_soc_dapm_ignore_suspend(dapm, "AMP Enable"); - snd_soc_dapm_ignore_suspend(dapm, "VSENSE"); - snd_soc_dapm_ignore_suspend(dapm, "Main AMP"); - - /* - * RevA and B require the disabling of - * SYNC_GLOBAL_OVR when GLOBAL_EN = 0. - * Just turn it off from default - */ - regmap_update_bits(cs35l36->regmap, CS35L36_CTRL_OVRRIDE, - CS35L36_SYNC_GLOBAL_OVR_MASK, - 0 << CS35L36_SYNC_GLOBAL_OVR_SHIFT); - - - return 0; -} - -static struct snd_soc_codec_driver soc_codec_dev_cs35l36 = { - .probe = &cs35l36_codec_probe, - .set_sysclk = cs35l36_codec_set_sysclk, - .component_driver = { - .dapm_widgets = cs35l36_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(cs35l36_dapm_widgets), - - .dapm_routes = cs35l36_audio_map, - .num_dapm_routes = ARRAY_SIZE(cs35l36_audio_map), - .controls = cs35l36_aud_controls, - .num_controls = ARRAY_SIZE(cs35l36_aud_controls), - }, - .ignore_pmdown_time = true, -}; - -static struct regmap_config cs35l36_regmap = { - .reg_bits = 32, - .val_bits = 32, - .reg_stride = 4, - .max_register = CS35L36_PAC_PMEM_WORD1023, - .reg_defaults = cs35l36_reg, - .num_reg_defaults = ARRAY_SIZE(cs35l36_reg), - .volatile_reg = cs35l36_volatile_reg, - .readable_reg = cs35l36_readable_reg, - .cache_type = REGCACHE_RBTREE, -}; - -static irqreturn_t cs35l36_irq(int irq, void *data) -{ - struct cs35l36_private *cs35l36 = data; - unsigned int status[4]; - unsigned int masks[4]; - int ret = 0; - - /* ack the irq by reading all status registers */ - ret = regmap_bulk_read(cs35l36->regmap, CS35L36_INT1_STATUS, - status, ARRAY_SIZE(status)); - if (ret < 0) { - dev_crit(cs35l36->dev, "IRQ status read error: %d\n", ret); - return IRQ_NONE; - } - - ret = regmap_bulk_read(cs35l36->regmap, CS35L36_INT1_MASK, - masks, ARRAY_SIZE(masks)); - if (ret < 0) { - dev_crit(cs35l36->dev, "IRQ masks read error: %d\n", ret); - return IRQ_NONE; - } - - /* Check to see if unmasked bits are active */ - if (!(status[0] & ~masks[0]) && !(status[1] & ~masks[1]) && - !(status[2] & ~masks[2]) && !(status[3] & ~masks[3])) { - return IRQ_NONE; - } - - /* - * The following interrupts require a - * protection release cycle to get the - * speaker out of Safe-Mode. - */ - if (status[2] & CS35L36_AMP_SHORT_ERR) { - dev_crit(cs35l36->dev, "Amp short error\n"); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_AMP_SHORT_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_AMP_SHORT_ERR_RLS, - CS35L36_AMP_SHORT_ERR_RLS); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_AMP_SHORT_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_INT3_STATUS, - CS35L36_AMP_SHORT_ERR, - CS35L36_AMP_SHORT_ERR); - } - - if (status[0] & CS35L36_TEMP_WARN) { - dev_crit(cs35l36->dev, "Over temperature warning\n"); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_TEMP_WARN_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_TEMP_WARN_ERR_RLS, - CS35L36_TEMP_WARN_ERR_RLS); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_TEMP_WARN_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_INT1_STATUS, - CS35L36_TEMP_WARN, - CS35L36_TEMP_WARN); - } - - if (status[0] & CS35L36_TEMP_ERR) { - dev_crit(cs35l36->dev, "Over temperature error\n"); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_TEMP_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_TEMP_ERR_RLS, - CS35L36_TEMP_ERR_RLS); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_TEMP_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_INT1_STATUS, - CS35L36_TEMP_ERR, - CS35L36_TEMP_ERR); - } - - if (status[0] & CS35L36_BST_OVP_ERR) { - dev_crit(cs35l36->dev, "VBST Over Voltage error\n"); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_TEMP_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_TEMP_ERR_RLS, - CS35L36_TEMP_ERR_RLS); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_TEMP_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_INT1_STATUS, - CS35L36_BST_OVP_ERR, - CS35L36_BST_OVP_ERR); - } - - if (status[0] & CS35L36_BST_DCM_UVP_ERR) { - dev_crit(cs35l36->dev, "DCM VBST Under Voltage Error\n"); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_BST_UVP_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_BST_UVP_ERR_RLS, - CS35L36_BST_UVP_ERR_RLS); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_BST_UVP_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_INT1_STATUS, - CS35L36_BST_DCM_UVP_ERR, - CS35L36_BST_DCM_UVP_ERR); - } - - if (status[0] & CS35L36_BST_SHORT_ERR) { - dev_crit(cs35l36->dev, "LBST SHORT error!\n"); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_BST_SHORT_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_BST_SHORT_ERR_RLS, - CS35L36_BST_SHORT_ERR_RLS); - regmap_update_bits(cs35l36->regmap, - CS35L36_PROTECT_REL_ERR, - CS35L36_BST_SHORT_ERR_RLS, 0); - regmap_update_bits(cs35l36->regmap, - CS35L36_INT1_STATUS, - CS35L36_BST_SHORT_ERR, - CS35L36_BST_SHORT_ERR); - } - - return IRQ_HANDLED; -} - -static int cs35l36_handle_of_data(struct i2c_client *i2c_client, - struct cs35l36_platform_data *pdata) -{ - struct device_node *np = i2c_client->dev.of_node; - struct irq_cfg *irq_gpio_config = &pdata->irq_config; - struct device_node *irq_gpio; - unsigned int val, ret; - - if (!np) - return 0; - - ret = of_property_read_u32(np, "cirrus,boost-ctl-millivolt", &val); - if (ret >= 0) { - if (val < 2550 || val > 12000) { - dev_err(&i2c_client->dev, - "Invalid Boost Voltage %d mV\n", val); - return -EINVAL; - } - pdata->bst_vctl = (((val - 2550) / 100) + 1) << 1; - } - - ret = of_property_read_u32(np, "cirrus,boost-ctl-select", &val); - if (!ret) - pdata->bst_vctl_sel = val | CS35L36_VALID_PDATA; - - ret = of_property_read_u32(np, "cirrus,boost-peak-milliamp", &val); - if (ret >= 0) { - if (val < 1600 || val > 4500) { - dev_err(&i2c_client->dev, - "Invalid Boost Peak Current %u mA\n", val); - return -EINVAL; - } - - pdata->bst_ipk = (val - 1600) / 50; - } - - pdata->multi_amp_mode = of_property_read_bool(np, - "cirrus,multi-amp-mode"); - - pdata->sclk_frc = of_property_read_bool(np, - "cirrus,sclk-force-output"); - - pdata->lrclk_frc = of_property_read_bool(np, - "cirrus,lrclk-force-output"); - - pdata->dcm_mode = of_property_read_bool(np, - "cirrus,dcm-mode-enable"); - - pdata->amp_gain_zc = of_property_read_bool(np, - "cirrus,amp-gain-zc"); - - pdata->amp_pcm_inv = of_property_read_bool(np, - "cirrus,amp-pcm-inv"); - - ret = of_property_read_u32(np, "cirrus,ldm-mode-select", &val); - if (!ret) - pdata->ldm_mode_sel = val; - - pdata->pdm_ldm_exit = of_property_read_bool(np, - "cirrus,pdm-ldm-exit"); - - pdata->pdm_ldm_enter = of_property_read_bool(np, - "cirrus,pdm-ldm-enter"); - - pdata->imon_pol_inv = of_property_read_bool(np, - "cirrus,imon-pol-inv"); - - pdata->vmon_pol_inv = of_property_read_bool(np, - "cirrus,vmon-pol-inv"); - - if (of_property_read_u32(np, "cirrus,temp-warn-threshold", &val) >= 0) - pdata->temp_warn_thld = val | CS35L36_VALID_PDATA; - - if (of_property_read_u32(np, "cirrus,boost-ind-nanohenry", &val) >= 0) { - pdata->boost_ind = val; - } else { - dev_err(&i2c_client->dev, "Inductor not specified.\n"); - return -EINVAL; - } - - /* INT/GPIO Pin Config */ - irq_gpio = of_get_child_by_name(np, "cirrus,irq-config"); - irq_gpio_config->is_present = irq_gpio ? true : false; - if (irq_gpio_config->is_present) { - if (of_property_read_u32(irq_gpio, "cirrus,irq-drive-select", - &val) >= 0) - irq_gpio_config->irq_drv_sel = val; - if (of_property_read_u32(irq_gpio, "cirrus,irq-polarity", - &val) >= 0) - irq_gpio_config->irq_pol = val; - if (of_property_read_u32(irq_gpio, "cirrus,irq-gpio-select", - &val) >= 0) - irq_gpio_config->irq_gpio_sel = val; - if (of_property_read_u32(irq_gpio, "cirrus,irq-output-enable", - &val) >= 0) - irq_gpio_config->irq_out_en = val; - if (of_property_read_u32(irq_gpio, "cirrus,irq-src-select", - &val) >= 0) - irq_gpio_config->irq_src_sel = val; - } - pdata->vpr_thrld = 0xFFFF; - pdata->vpr_atk_vol = 0xFFFF; - pdata->vpr_atk_rate = 0xFFFF; - pdata->vpr_wait = 0xFFFF; - pdata->vpr_rel_rate = 0xFFFF; - ret = of_property_read_u32(np, "cirrus,vpr-en", &val); - if (ret >= 0) { - pdata->vpr_en = val; - } - ret = of_property_read_u32(np, "cirrus,vpr-thrld", &val); - if (ret >= 0) { - if (val < 0x2 || val > 0x1f) { - dev_err(&i2c_client->dev, - "Invalid VP Threshold Voltage %d mV\n", val); - return -EINVAL; - } - pdata->vpr_thrld = val; - } - ret = of_property_read_u32(np, "cirrus,vpr-atk-vol", &val); - if (ret >= 0) { - if (val < 0 || val > 7) { - dev_err(&i2c_client->dev, - "Invalid Brownout Attack Volume\n"); - return -EINVAL; - } - pdata->vpr_atk_vol = val; - } - ret = of_property_read_u32(np, "cirrus,vpr-atk-rate", &val); - if (ret >= 0) { - if (val < 0 || val > 7) { - dev_err(&i2c_client->dev, - "Invalid Brownout Attack Rate\n"); - return -EINVAL; - } - pdata->vpr_atk_rate = val; - } - ret = of_property_read_u32(np, "cirrus,vpr-wait", &val); - if (ret >= 0) { - if (val < 0 || val > 3) { - dev_err(&i2c_client->dev, - "Invalid Brownout Wait Time\n"); - return -EINVAL; - } - pdata->vpr_wait = val; - } - ret = of_property_read_u32(np, "cirrus,vpr-rel-rate", &val); - if (ret >= 0) { - if (val < 0 || val > 7) { - dev_err(&i2c_client->dev, - "Invalid Brownout Release Rate\n"); - return -EINVAL; - } - pdata->vpr_rel_rate = val; - } - of_node_put(irq_gpio); - - return 0; -} - -static int cs35l36_pac(struct cs35l36_private *cs35l36) -{ - int ret, count; - unsigned int val; - if (cs35l36->rev_id == CS35L36_REV_B0) { - /* - * Magic code for internal PAC - */ - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_UNLOCK1); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_UNLOCK2); - - usleep_range(9500, 10500); - - regmap_write(cs35l36->regmap, CS35L36_INT4_MASK, - CS35L36_MCU_CONFIG_UNMASK); - - regmap_write(cs35l36->regmap, CS35L36_PAC_CTL1, - CS35L36_PAC_RESET); - regmap_write(cs35l36->regmap, CS35L36_PAC_CTL3, - CS35L36_PAC_MEM_ACCESS); - regmap_write(cs35l36->regmap, CS35L36_PAC_PMEM_WORD0, - CS35L36_B0_PAC_PATCH); - - regmap_write(cs35l36->regmap, CS35L36_PAC_CTL3, - CS35L36_PAC_MEM_ACCESS_CLR); - regmap_write(cs35l36->regmap, CS35L36_PAC_CTL1, - CS35L36_PAC_ENABLE_MASK); - - usleep_range(9500, 10500); - - ret = regmap_read(cs35l36->regmap, CS35L36_INT4_STATUS, &val); - if (ret < 0) { - dev_err(cs35l36->dev, "Failed to read int4_status %d\n", - ret); - return ret; - } - - count = 0; - while (!(val & CS35L36_MCU_CONFIG_CLR)) { - usleep_range(100, 200); - count++; - - ret = regmap_read(cs35l36->regmap, CS35L36_INT4_STATUS, - &val); - if (ret < 0) { - dev_err(cs35l36->dev, "Failed to read int4_status %d\n", - ret); - return ret; - } - - if (count >= 100) - return -EINVAL; - } - - regmap_write(cs35l36->regmap, CS35L36_INT4_MASK, - CS35L36_MCU_CONFIG_MASK); - - regmap_write(cs35l36->regmap, CS35L36_INT4_STATUS, - CS35L36_MCU_CONFIG_CLR); - regmap_update_bits(cs35l36->regmap, CS35L36_PAC_CTL1, - CS35L36_PAC_ENABLE_MASK, 0); - - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_LOCK1); - regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL, - CS35L36_TEST_LOCK2); - } - return 0; -} - -static int cs35l36_irq_gpio_config(struct cs35l36_private *cs35l36) -{ - struct cs35l36_platform_data *pdata = &cs35l36->pdata; - struct irq_cfg *irq_config = &pdata->irq_config; - int irq_polarity; - - /* setup the Interrupt Pin (INT | GPIO) */ - regmap_update_bits(cs35l36->regmap, CS35L36_PAD_INTERFACE, - CS35L36_INT_OUTPUT_EN_MASK, - irq_config->irq_out_en); - regmap_update_bits(cs35l36->regmap, CS35L36_PAD_INTERFACE, - CS35L36_INT_GPIO_SEL_MASK, - irq_config->irq_gpio_sel << - CS35L36_INT_GPIO_SEL_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_PAD_INTERFACE, - CS35L36_INT_POL_SEL_MASK, - irq_config->irq_pol << - CS35L36_INT_POL_SEL_SHIFT); - if (cs35l36->rev_id == CS35L36_REV_A0) - regmap_update_bits(cs35l36->regmap, - CS35L36_PAD_INTERFACE, - CS35L36_IRQ_SRC_MASK, - irq_config->irq_src_sel << - CS35L36_IRQ_SRC_SHIFT); - regmap_update_bits(cs35l36->regmap, CS35L36_PAD_INTERFACE, - CS35L36_INT_DRV_SEL_MASK, - irq_config->irq_drv_sel << - CS35L36_INT_DRV_SEL_SHIFT); - - if (irq_config->irq_pol) - irq_polarity = IRQF_TRIGGER_HIGH; - else - irq_polarity = IRQF_TRIGGER_LOW; - - return irq_polarity; -} - -static const struct reg_sequence cs35l36_pac_int_patch[] = { - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_UNLOCK1 }, - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_UNLOCK2 }, - { CS35L36_CTRL_OVRRIDE, 0x00000000 }, - { CS35L36_PAC_INT0_CTRL, 0x00860001 }, - { CS35L36_PAC_INT1_CTRL, 0x00860001 }, - { CS35L36_PAC_INT2_CTRL, 0x00860001 }, - { CS35L36_PAC_INT3_CTRL, 0x00860001 }, - { CS35L36_PAC_INT4_CTRL, 0x00860001 }, - { CS35L36_PAC_INT5_CTRL, 0x00860001 }, - { CS35L36_PAC_INT6_CTRL, 0x00860001 }, - { CS35L36_PAC_INT7_CTRL, 0x00860001 }, - { CS35L36_PAC_INT_FLUSH_CTRL, 0x000000FF }, - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_LOCK1 }, - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_LOCK2 }, -}; - -static const struct reg_sequence cs35l36_reva0_errata_patch[] = { - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_UNLOCK1 }, - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_UNLOCK2 }, - { CS35L36_OTP_CTRL1, 0x00002060 }, - { CS35L36_OTP_CTRL2, 0x00000001 }, - { CS35L36_OTP_CTRL1, 0x00002460 }, - { CS35L36_OTP_CTRL2, 0x00000001 }, - { 0x00002088, 0x012A1838 }, - { 0x00003014, 0x0100EE0E }, - { 0x00003008, 0x0008184A }, - { 0x00007418, 0x509001C8 }, - { 0x00007064, 0x0929A800 }, - { 0x00002D10, 0x0002C01C }, - { 0x0000410C, 0x00000A11 }, - { 0x00006E08, 0x8B19140C }, - { 0x00006454, 0x0300000A }, - { CS35L36_AMP_NG_CTRL, 0x000020EF }, - { 0x00007E34, 0x0000000E }, - { 0x0000410C, 0x00000A11 }, - { 0x00007410, 0x20514B00 }, - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_LOCK1 }, - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_LOCK2 }, -}; - -static const struct reg_sequence cs35l36_revb0_errata_patch[] = { - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_UNLOCK1 }, - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_UNLOCK2 }, - { 0x00007064, 0x0929A800 }, - { 0x00007850, 0x00002FA9 }, - { 0x00007854, 0x0003F1D5 }, - { 0x00007858, 0x0003F5E3 }, - { 0x0000785C, 0x00001137 }, - { 0x00007860, 0x0001A7A5 }, - { 0x00007864, 0x0002F16A }, - { 0x00007868, 0x00003E21 }, - { 0x00007848, 0x00000001 }, - { 0x00003854, 0x05180240 }, - { 0x00007418, 0x509001C8 }, - { 0x0000394C, 0x028764BD }, - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_LOCK1 }, - { CS35L36_TESTKEY_CTRL, CS35L36_TEST_LOCK2 }, -}; - -static void cs35l36_aou_low_power(struct cs35l36_private *cs35l36) -{ - /* Reset PAC */ - regmap_write(cs35l36->regmap, CS35L36_PAC_CTL1, CS35L36_PAC_RESET_MASK); - usleep_range(200, 250); - regmap_write(cs35l36->regmap, CS35L36_PAC_CTL1, 0); - - regmap_write(cs35l36->regmap, CS35L36_PAC_CTL3, CS35L36_PAC_MEM_ACCESS); - - regmap_bulk_write(cs35l36->regmap, CS35L36_PAC_PMEM_WORD0, - cs35l36_aou_low_power_patch, - ARRAY_SIZE(cs35l36_aou_low_power_patch)); - - regmap_write(cs35l36->regmap, CS35L36_PAC_CTL3, 0); - regmap_write(cs35l36->regmap, CS35L36_PAC_CTL1, - CS35L36_PAC_ENABLE_MASK); -} - -static int cs35l36_i2c_probe(struct i2c_client *i2c_client, - const struct i2c_device_id *id) -{ - struct cs35l36_private *cs35l36; - struct device *dev = &i2c_client->dev; - struct cs35l36_platform_data *pdata = dev_get_platdata(dev); - - int i; - int ret; - u32 reg_id, reg_revid, l37_id_reg; - int irq_pol = IRQF_TRIGGER_HIGH; - - cs35l36 = devm_kzalloc(dev, sizeof(struct cs35l36_private), GFP_KERNEL); - if (!cs35l36) - return -ENOMEM; - - cs35l36->dev = dev; - - i2c_set_clientdata(i2c_client, cs35l36); - cs35l36->regmap = devm_regmap_init_i2c(i2c_client, &cs35l36_regmap); - if (IS_ERR(cs35l36->regmap)) { - ret = PTR_ERR(cs35l36->regmap); - dev_err(dev, "regmap_init() failed: %d\n", ret); - goto err; - } - - for (i = 0; i < ARRAY_SIZE(cs35l36_supplies); i++) - cs35l36->supplies[i].supply = cs35l36_supplies[i]; - cs35l36->num_supplies = ARRAY_SIZE(cs35l36_supplies); - - ret = devm_regulator_bulk_get(dev, cs35l36->num_supplies, - cs35l36->supplies); - if (ret != 0) { - dev_err(dev, "Failed to request core supplies: %d\n", ret); - return ret; - } - - if (pdata) { - cs35l36->pdata = *pdata; - } else { - pdata = devm_kzalloc(dev, sizeof(struct cs35l36_platform_data), - GFP_KERNEL); - if (!pdata) { - return -ENOMEM; - } - if (i2c_client->dev.of_node) { - ret = cs35l36_handle_of_data(i2c_client, pdata); - if (ret != 0) - return ret; - - } - cs35l36->pdata = *pdata; - } - - ret = regulator_bulk_enable(cs35l36->num_supplies, - cs35l36->supplies); - if (ret != 0) { - dev_err(dev, "Failed to enable core supplies: %d\n", ret); - return ret; - } - - /* returning NULL can be an option if in stereo mode */ - cs35l36->reset_gpio = devm_gpiod_get_optional(dev, "reset", - GPIOD_OUT_LOW); - if (IS_ERR(cs35l36->reset_gpio)) { - ret = PTR_ERR(cs35l36->reset_gpio); - cs35l36->reset_gpio = NULL; - if (ret == -EBUSY) { - dev_info(dev, "Reset line busy, assuming shared reset\n"); - } else { - dev_err(dev, "Failed to get reset GPIO: %d\n", ret); - goto err; - } - } - if (cs35l36->reset_gpio) - gpiod_set_value_cansleep(cs35l36->reset_gpio, 1); - - msleep(300); - - /* initialize codec */ - ret = regmap_read(cs35l36->regmap, CS35L36_SW_RESET, ®_id); - if (ret < 0) { - dev_err(dev, "Get Device ID failed %d\n", ret); - goto err; - } - - if (reg_id != CS35L36_CHIP_ID) { - dev_err(dev, "Device ID (%X). Expected ID %X\n", - reg_id, CS35L36_CHIP_ID); - ret = -ENODEV; - goto err; - } - - ret = regmap_read(cs35l36->regmap, CS35L36_REV_ID, ®_revid); - if (ret < 0) { - dev_err(&i2c_client->dev, "Get Revision ID failed %d\n", ret); - goto err; - } - - cs35l36->rev_id = reg_revid >> 8; - - ret = regmap_read(cs35l36->regmap, CS35L36_OTP_MEM30, &l37_id_reg); - if (ret < 0) { - dev_err(&i2c_client->dev, "Failed to read otp_id Register %d\n", - ret); - return ret; - } - - if ((l37_id_reg & CS35L36_OTP_REV_MASK) == CS35L36_OTP_REV_L37) - cs35l36->chip_version = CS35L36_12V_L37; - else - cs35l36->chip_version = CS35L36_10V_L36; - - if (pdata->irq_config.is_present) - irq_pol = cs35l36_irq_gpio_config(cs35l36); - - switch (cs35l36->rev_id) { - case CS35L36_REV_A0: - ret = regmap_register_patch(cs35l36->regmap, - cs35l36_reva0_errata_patch, - ARRAY_SIZE(cs35l36_reva0_errata_patch)); - if (ret < 0) { - dev_err(dev, "Failed to apply A0 errata patch %d\n", - ret); - goto err; - } - ret = regmap_register_patch(cs35l36->regmap, - cs35l36_pac_int_patch, - ARRAY_SIZE(cs35l36_pac_int_patch)); - if (ret < 0) { - dev_err(dev, "Failed to apply A0PAC errata patch %d\n", - ret); - goto err; - } - break; - case CS35L36_REV_B0: - ret = cs35l36_pac(cs35l36); - if (ret < 0) { - dev_err(dev, "Failed to Trim OTP %d\n", ret); - goto err; - } - - ret = regmap_register_patch(cs35l36->regmap, - cs35l36_revb0_errata_patch, - ARRAY_SIZE(cs35l36_revb0_errata_patch)); - if (ret < 0) { - dev_err(dev, "Failed to apply B0 errata patch %d\n", - ret); - goto err; - } - cs35l36_aou_low_power(cs35l36); - break; - } - - ret = devm_request_threaded_irq(dev, i2c_client->irq, NULL, cs35l36_irq, - IRQF_ONESHOT | - irq_pol, - "cs35l36", cs35l36); - - if (ret != 0) { - dev_err(dev, "Failed to request IRQ: %d\n", ret); - goto err; - } - - /* Set interrupt masks for critical errors */ - regmap_write(cs35l36->regmap, CS35L36_INT1_MASK, - CS35L36_INT1_MASK_DEFAULT); - regmap_write(cs35l36->regmap, CS35L36_INT3_MASK, - CS35L36_INT3_MASK_DEFAULT); - - dev_info(&i2c_client->dev, - "Cirrus Logic CS35L%d, Revision: %02X\n", - cs35l36->chip_version, reg_revid >> 8); - - ret = snd_soc_register_codec(dev, &soc_codec_dev_cs35l36, cs35l36_dai, - ARRAY_SIZE(cs35l36_dai)); - if (ret < 0) { - dev_err(dev, "%s: Register codec failed %d\n", __func__, ret); - goto err; - } - - return 0; - -err: - regulator_bulk_disable(cs35l36->num_supplies, cs35l36->supplies); - gpiod_set_value_cansleep(cs35l36->reset_gpio, 0); - return ret; -} - -static int cs35l36_i2c_remove(struct i2c_client *client) -{ - struct cs35l36_private *cs35l36 = i2c_get_clientdata(client); - - /* Reset interrupt masks for device removal */ - regmap_write(cs35l36->regmap, CS35L36_INT1_MASK, - CS35L36_INT1_MASK_RESET); - regmap_write(cs35l36->regmap, CS35L36_INT3_MASK, - CS35L36_INT3_MASK_RESET); - - if (cs35l36->reset_gpio) - gpiod_set_value_cansleep(cs35l36->reset_gpio, 0); - - regulator_bulk_disable(cs35l36->num_supplies, cs35l36->supplies); - - snd_soc_unregister_codec(&client->dev); - - return 0; -} -static const struct of_device_id cs35l36_of_match[] = { - {.compatible = "cirrus,cs35l36"}, - {}, -}; -MODULE_DEVICE_TABLE(of, cs35l36_of_match); - -static const struct i2c_device_id cs35l36_id[] = { - {"cs35l36", 0}, - {} -}; - -MODULE_DEVICE_TABLE(i2c, cs35l36_id); - -static struct i2c_driver cs35l36_i2c_driver = { - .driver = { - .name = "cs35l36", - .of_match_table = cs35l36_of_match, - }, - .id_table = cs35l36_id, - .probe = cs35l36_i2c_probe, - .remove = cs35l36_i2c_remove, -}; -module_i2c_driver(cs35l36_i2c_driver); - -MODULE_DESCRIPTION("ASoC CS35L36 driver"); -MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, "); -MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs35l36.h b/sound/soc/codecs/cs35l36.h deleted file mode 100644 index 52a759bf4139..000000000000 --- a/sound/soc/codecs/cs35l36.h +++ /dev/null @@ -1,448 +0,0 @@ -/* - * cs35l36.h -- CS35L36 ALSA SoC audio driver - * - * Copyright 2016 Cirrus Logic, Inc. - * - * Author: Brian Austin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __CS35L36_H__ -#define __CS35L36_H__ - -#include - -#define CS35L36_FIRSTREG 0x00000000 -#define CS35L36_LASTREG 0x00E037FC -#define CS35L36_SW_RESET 0x00000000 -#define CS35L36_SW_REV 0x00000004 -#define CS35L36_HW_REV 0x00000008 -#define CS35L36_TESTKEY_CTRL 0x00000020 -#define CS35L36_USERKEY_CTL 0x00000024 -#define CS35L36_OTP_MEM30 0x00000478 -#define CS35L36_OTP_CTRL1 0x00000500 -#define CS35L36_OTP_CTRL2 0x00000504 -#define CS35L36_OTP_CTRL3 0x00000508 -#define CS35L36_OTP_CTRL4 0x0000050C -#define CS35L36_OTP_CTRL5 0x00000510 -#define CS35L36_PAC_CTL1 0x00000C00 -#define CS35L36_PAC_CTL2 0x00000C04 -#define CS35L36_PAC_CTL3 0x00000C08 -#define CS35L36_DEVICE_ID 0x00002004 -#define CS35L36_FAB_ID 0x00002008 -#define CS35L36_REV_ID 0x0000200C -#define CS35L36_PWR_CTRL1 0x00002014 -#define CS35L36_PWR_CTRL2 0x00002018 -#define CS35L36_PWR_CTRL3 0x0000201C -#define CS35L36_CTRL_OVRRIDE 0x00002020 -#define CS35L36_AMP_OUT_MUTE 0x00002024 -#define CS35L36_OTP_TRIM_STATUS 0x00002028 -#define CS35L36_DISCH_FILT 0x0000202C -#define CS35L36_OSC_TRIM 0x00002030 -#define CS35L36_PROTECT_REL_ERR 0x00002034 -#define CS35L36_PAD_INTERFACE 0x00002400 -#define CS35L36_PLL_CLK_CTRL 0x00002C04 -#define CS35L36_GLOBAL_CLK_CTRL 0x00002C0C -#define CS35L36_ADC_CLK_CTRL 0x00002C10 -#define CS35L36_SWIRE_CLK_CTRL 0x00002C14 -#define CS35L36_SP_SCLK_CLK_CTRL 0x00002D00 -#define CS35L36_TST_FS_MON0 0x00002D10 -#define CS35L36_PLL_LOOP_PARAMS 0x00003008 -#define CS35L36_DCO_CTRL 0x00003010 -#define CS35L36_MISC_CTRL 0x00003014 -#define CS35L36_MDSYNC_EN 0x00003404 -#define CS35L36_MDSYNC_TX_ID 0x00003408 -#define CS35L36_MDSYNC_PWR_CTRL 0x0000340C -#define CS35L36_MDSYNC_DATA_TX 0x00003410 -#define CS35L36_MDSYNC_TX_STATUS 0x0000341C -#define CS35L36_MDSYNC_RX_STATUS 0x00003420 -#define CS35L36_MDSYNC_ERR_STATUS 0x00003424 -#define CS35L36_BSTCVRT_VCTRL1 0x00003800 -#define CS35L36_BSTCVRT_VCTRL2 0x00003804 -#define CS35L36_BSTCVRT_PEAK_CUR 0x00003808 -#define CS35L36_BSTCVRT_SFT_RAMP 0x0000380C -#define CS35L36_BSTCVRT_COEFF 0x00003810 -#define CS35L36_BSTCVRT_SLOPE_LBST 0x00003814 -#define CS35L36_BSTCVRT_SW_FREQ 0x00003818 -#define CS35L36_BSTCVRT_DCM_CTRL 0x0000381C -#define CS35L36_BSTCVRT_DCM_MODE_FORCE 0x00003820 -#define CS35L36_BSTCVRT_OVERVOLT_CTRL 0x00003830 -#define CS35L36_BST_TST_MANUAL 0x0000393C -#define CS35L36_BST_ANA2_TEST 0x0000394C -#define CS35L36_VPI_LIMIT_MODE 0x00003C04 -#define CS35L36_VPI_LIMIT_MINMAX 0x00003C08 -#define CS35L36_VPI_VP_THLD 0x00003C0C -#define CS35L36_VPI_TRACK_CTRL 0x00003C10 -#define CS35L36_VPI_TRIG_MODE_CTRL 0x00003C14 -#define CS35L36_VPI_TRIG_STEPS 0x00003C18 -#define CS35L36_VI_SPKMON_FILT 0x00004004 -#define CS35L36_VI_SPKMON_GAIN 0x00004008 -#define CS35L36_VI_SPKMON_IP_SEL 0x00004100 -#define CS35L36_DTEMP_WARN_THLD 0x00004220 -#define CS35L36_DTEMP_STATUS 0x00004300 -#define CS35L36_VPVBST_FS_SEL 0x00004400 -#define CS35L36_VPVBST_VP_CTRL 0x00004440 -#define CS35L36_VPVBST_VBST_CTRL 0x00004444 -#define CS35L36_ASP_TX_PIN_CTRL 0x00004800 -#define CS35L36_ASP_RATE_CTRL 0x00004804 -#define CS35L36_ASP_FORMAT 0x00004808 -#define CS35L36_ASP_FRAME_CTRL 0x00004818 -#define CS35L36_ASP_TX1_TX2_SLOT 0x0000481C -#define CS35L36_ASP_TX3_TX4_SLOT 0x00004820 -#define CS35L36_ASP_TX5_TX6_SLOT 0x00004824 -#define CS35L36_ASP_TX7_TX8_SLOT 0x00004828 -#define CS35L36_ASP_RX1_SLOT 0x0000482C -#define CS35L36_ASP_RX_TX_EN 0x0000483C -#define CS35L36_ASP_RX1_SEL 0x00004C00 -#define CS35L36_ASP_TX1_SEL 0x00004C20 -#define CS35L36_ASP_TX2_SEL 0x00004C24 -#define CS35L36_ASP_TX3_SEL 0x00004C28 -#define CS35L36_ASP_TX4_SEL 0x00004C2C -#define CS35L36_ASP_TX5_SEL 0x00004C30 -#define CS35L36_ASP_TX6_SEL 0x00004C34 -#define CS35L36_SWIRE_P1_TX1_SEL 0x00004C40 -#define CS35L36_SWIRE_P1_TX2_SEL 0x00004C44 -#define CS35L36_SWIRE_P2_TX1_SEL 0x00004C60 -#define CS35L36_SWIRE_P2_TX2_SEL 0x00004C64 -#define CS35L36_SWIRE_P2_TX3_SEL 0x00004C68 -#define CS35L36_SWIRE_DP1_FIFO_CFG 0x00005000 -#define CS35L36_SWIRE_DP2_FIFO_CFG 0x00005004 -#define CS35L36_SWIRE_DP3_FIFO_CFG 0x00005008 -#define CS35L36_SWIRE_PCM_RX_DATA 0x0000500C -#define CS35L36_SWIRE_FS_SEL 0x00005010 -#define CS35L36_SPARE_CP_BITS 0x00005C00 -#define CS35L36_AMP_DIG_VOL_CTRL 0x00006000 -#define CS35L36_VPBR_CFG 0x00006404 -#define CS35L36_VBBR_CFG 0x00006408 -#define CS35L36_VPBR_STATUS 0x0000640C -#define CS35L36_VBBR_STATUS 0x00006410 -#define CS35L36_OVERTEMP_CFG 0x00006414 -#define CS35L36_AMP_ERR_VOL 0x00006418 -#define CS35L36_CLASSH_CFG 0x00006800 -#define CS35L36_CLASSH_FET_DRV_CFG 0x00006804 -#define CS35L36_NG_CFG 0x00006808 -#define CS35L36_AMP_GAIN_CTRL 0x00006C04 -#define CS35L36_PWM_MOD_IO_CTRL 0x0000706C -#define CS35L36_PWM_MOD_STATUS 0x00007070 -#define CS35L36_DAC_MSM_CFG 0x00007400 -#define CS35L36_AMP_SLOPE_CTRL 0x00007410 -#define CS35L36_AMP_PDM_VOLUME 0x00007E04 -#define CS35L36_AMP_PDM_RATE_CTRL 0x00007E08 -#define CS35L36_PDM_CH_SEL 0x00007E10 -#define CS35L36_AMP_NG_CTRL 0x00007E14 -#define CS35L36_PDM_HIGHFILT_CTRL 0x00007E3C -#define CS35L36_INT1_STATUS 0x00D00000 -#define CS35L36_INT2_STATUS 0x00D00004 -#define CS35L36_INT3_STATUS 0x00D00008 -#define CS35L36_INT4_STATUS 0x00D0000C -#define CS35L36_INT1_RAW_STATUS 0x00D00020 -#define CS35L36_INT2_RAW_STATUS 0x00D00024 -#define CS35L36_INT3_RAW_STATUS 0x00D00028 -#define CS35L36_INT4_RAW_STATUS 0x00D0002C -#define CS35L36_INT1_MASK 0x00D00040 -#define CS35L36_INT2_MASK 0x00D00044 -#define CS35L36_INT3_MASK 0x00D00048 -#define CS35L36_INT4_MASK 0x00D0004C -#define CS35L36_INT1_EDGE_LVL_CTRL 0x00D00060 -#define CS35L36_INT3_EDGE_LVL_CTRL 0x00D00068 -#define CS35L36_PAC_INT_STATUS 0x00D00200 -#define CS35L36_PAC_INT_RAW_STATUS 0x00D00210 -#define CS35L36_PAC_INT_FLUSH_CTRL 0x00D00218 -#define CS35L36_PAC_INT0_CTRL 0x00D00220 -#define CS35L36_PAC_INT1_CTRL 0x00D00224 -#define CS35L36_PAC_INT2_CTRL 0x00D00228 -#define CS35L36_PAC_INT3_CTRL 0x00D0022C -#define CS35L36_PAC_INT4_CTRL 0x00D00230 -#define CS35L36_PAC_INT5_CTRL 0x00D00234 -#define CS35L36_PAC_INT6_CTRL 0x00D00238 -#define CS35L36_PAC_INT7_CTRL 0x00D0023C -#define CS35L36_PAC_PMEM_WORD0 0x00E02800 -#define CS35L36_PAC_PMEM_WORD1 0x00E02804 -#define CS35L36_PAC_PMEM_WORD1023 0x00E037FC - -#define CS35L36_MAX_CACHE_REG 0x00007E44 -#define CS35L36_INTPAC_REG_COUNT 25 -#define CS35L36_CHIP_ID 0x00035A36 - -#define CS35L36_INT_OUTPUT_EN_MASK 0x01 -#define CS35L36_INT_GPIO_SEL_MASK 0x02 -#define CS35L36_INT_GPIO_SEL_SHIFT 1 -#define CS35L36_INT_POL_SEL_MASK 0x04 -#define CS35L36_INT_POL_SEL_SHIFT 2 -#define CS35L36_INT_DRV_SEL_MASK 0x10 -#define CS35L36_INT_DRV_SEL_SHIFT 5 -#define CS35L36_IRQ_SRC_MASK 0x08 -#define CS35L36_IRQ_SRC_SHIFT 3 - -#define CS35L36_SCLK_MSTR_MASK 0x40 -#define CS35L36_SCLK_MSTR_SHIFT 6 -#define CS35L36_LRCLK_MSTR_MASK 0x01 -#define CS35L36_LRCLK_MSTR_SHIFT 0 -#define CS35L36_SCLK_INV_MASK 0x100 -#define CS35L36_SCLK_INV_SHIFT 8 -#define CS35L36_LRCLK_INV_MASK 0x04 -#define CS35L36_LRCLK_INV_SHIFT 2 -#define CS35L36_SCLK_FRC_MASK 0x80 -#define CS35L36_SCLK_FRC_SHIFT 7 -#define CS35L36_LRCLK_FRC_MASK 0x02 -#define CS35L36_LRCLK_FRC_SHIFT 1 - -#define CS35L36_PDM_MODE_MASK 0x01 -#define CS35L36_PDM_MODE_SHIFT 0 - -#define CS35L36_ASP_FMT_MASK 0x07 -#define CS35L36_ASP_FMT_SHIFT 0 - -#define CS35L36_ASP_RX_WIDTH_MASK 0xFF0000 -#define CS35L36_ASP_RX_WIDTH_SHIFT 16 -#define CS35L36_ASP_TX_WIDTH_MASK 0xFF -#define CS35L36_ASP_TX_WIDTH_SHIFT 0 -#define CS35L36_ASP_WIDTH_16 0x10 -#define CS35L36_ASP_WIDTH_24 0x18 -#define CS35L36_ASP_WIDTH_32 0x20 - -#define CS35L36_ASP_RX1_SLOT_MASK 0x3F -#define CS35L36_ASP_RX1_EN_MASK 0x00010000 -#define CS35L36_ASP_RX1_EN_SHIFT 16 - -#define CS35L36_ASP_TX1_SLOT_MASK 0x3F -#define CS35L36_ASP_TX2_SLOT_MASK 0x3F0000 -#define CS35L36_ASP_TX2_SLOT_SHIFT 16 -#define CS35L36_ASP_TX3_SLOT_MASK 0x3F -#define CS35L36_ASP_TX4_SLOT_MASK 0x3F0000 -#define CS35L36_ASP_TX4_SLOT_SHIFT 16 -#define CS35L36_ASP_TX5_SLOT_MASK 0x3F -#define CS35L36_ASP_TX6_SLOT_MASK 0x3F0000 -#define CS35L36_ASP_TX6_SLOT_SHIFT 16 -#define CS35L36_ASP_TX7_SLOT_MASK 0x3F -#define CS35L36_ASP_TX8_SLOT_MASK 0x3F0000 -#define CS35L36_ASP_TX8_SLOT_SHIFT 16 -#define CS35L36_ASP_TX_HIZ_MASK 0x200000 - -#define CS35L36_APS_TX_SEL_MASK 0x7F - -#define CS35L36_ASP_TX1_EN_MASK 0x01 -#define CS35L36_ASP_TX2_EN_MASK 0x02 -#define CS35L36_ASP_TX2_EN_SHIFT 1 -#define CS35L36_ASP_TX3_EN_MASK 0x04 -#define CS35L36_ASP_TX3_EN_SHIFT 2 -#define CS35L36_ASP_TX4_EN_MASK 0x08 -#define CS35L36_ASP_TX4_EN_SHIFT 3 -#define CS35L36_ASP_TX5_EN_MASK 0x10 -#define CS35L36_ASP_TX5_EN_SHIFT 4 -#define CS35L36_ASP_TX6_EN_MASK 0x20 -#define CS35L36_ASP_TX6_EN_SHIFT 5 -#define CS35L36_ASP_TX7_EN_MASK 0x40 -#define CS35L36_ASP_TX7_EN_SHIFT 6 -#define CS35L36_ASP_TX8_EN_MASK 0x80 -#define CS35L36_ASP_TX8_EN_SHIFT 7 - - -#define CS35L36_PLL_CLK_SEL_MASK 0x07 -#define CS35L36_PLL_CLK_SEL_SHIFT 0 -#define CS35L36_PLLSRC_SCLK 0 -#define CS35L36_PLLSRC_LRCLK 1 -#define CS35L36_PLLSRC_SELF 3 -#define CS35L36_PLLSRC_PDMCLK 4 -#define CS35L36_PLLSRC_MCLK 5 -#define CS35L36_PLLSRC_SWIRE 7 -#define CS35L36_REFCLK_FREQ_MASK 0x7E0 -#define CS35L36_REFCLK_FREQ_SHIFT 5 -#define CS35L36_PLL_OPENLOOP_MASK 0x800 -#define CS35L36_PLL_OPENLOOP_SHIFT 11 -#define CS35L36_PLL_REFCLK_EN_MASK 0x10 -#define CS35L36_PLL_REFCLK_EN_SHIFT 4 - - -#define CS35L36_GLOBAL_FS_MASK 0x1F -#define CS35L36_GLOBAL_FS_SHIFT 0 - -#define CS35L36_HPF_PCM_EN_MASK 0x800 -#define CS35L36_HPF_PCM_EN_SHIFT 15 -#define CS35L36_PCM_RX_SEL_MASK 0x7F -#define CS35L36_PCM_RX_SEL_SHIFT 0 - -#define CS35L36_PCM_RX_SEL_ZERO 0x00 -#define CS35L36_PCM_RX_SEL_PCM 0x08 -#define CS35L36_PCM_RX_SEL_SWIRE 0x10 -#define CS35L36_PCM_RX_SEL_DIAG 0x04 - -#define CS35L36_GLOBAL_EN_MASK 0x01 -#define CS35L36_GLOBAL_EN_SHIFT 0x00 - -#define CS35L36_AMP_PCM_INV_MASK 0x4000 -#define CS35L36_AMP_PCM_INV_SHIFT 14 - -#define CS35L36_AMP_VOL_PCM_MASK 0x3FF8 -#define CS35L36_AMP_VOL_PCM_SHIFT 3 -#define CS35L36_DIGITAL_MUTE 0x04CF - -#define CS35L36_AMP_RAMP_MASK 0x0007 -#define CS35L36_AMP_RAMP_SHIFT 0 - -#define CS35L36_AMP_MUTE_MASK 0x0010 -#define CS35L36_AMP_MUTE_SHIFT 4 - -#define CS35L36_GLOBAL_RESYNC_FS1_MASK 0x00000200 -#define CS35L36_GLOBAL_RESYNC_FS2_MASK 0x00000400 -#define CS35L36_SYNC_GLOBAL_OVR_MASK 0x00000002 -#define CS35L36_SYNC_GLOBAL_OVR_SHIFT 1 - -#define CS35L36_REFCLK_IN_MASK 0x00100000 -#define CS35L36_PLL_UNLOCK_MASK 0x00002000 - -#define CS35L36_ASP_RX_UDF_MASK 0x00000040 -#define CS35L36_ASP_RX_OVF_MASK 0x00000080 - -#define CS35L36_IMON_POL_MASK 0x02 -#define CS35L36_IMON_POL_SHIFT 1 - -#define CS35L36_VMON_POL_MASK 0x01 -#define CS35L36_VMON_POL_SHIFT 0 - -#define CS35L36_PDN_DONE 0x40 -#define CS35L36_PDN_DONE_SHIFT 6 -#define CS35L36_PUP_DONE 0x80 -#define CS35L36_PUP_DONE_SHIFT 7 -#define CS35L36_GLOBAL_EN_ASSRT 0x20 -#define CS35L36_PUP_DONE_IRQ_UNMASK 0x7F -#define CS35L36_PUP_DONE_IRQ_MASK 0xBF - -#define CS35L36_FS1_WINDOW_MASK 0x000007FF -#define CS35L36_FS2_WINDOW_MASK 0x00FFF800 -#define CS35L36_FS2_WINDOW_SHIFT 12 - -#define CS35L36_PLL_FFL_IGAIN_MASK 0x0F -#define CS35L36_PLL_IGAIN_MASK 0x3F0 -#define CS35L36_PLL_IGAIN_SHIFT 4 -#define CS35L36_PLL_IGAIN 0x04 - -#define CS35L36_BST_EN_MASK 0x30 -#define CS35L36_BST_EN 0x02 -#define CS35L36_BST_DIS_VP 0x01 -#define CS35L36_BST_DIS_EXTN 0x00 -#define CS35L36_BST_EN_SHIFT 4 -#define CS35L36_BST_MAN_IPKCOMP_MASK 0x200 -#define CS35L36_BST_MAN_IPKCOMP_SHIFT 9 - -#define CS35L36_VPBR_EN_SHIFT 12 -#define CS35L36_VPBR_EN_MASK 0x1000 - -#define CS35L36_BST_MAN_IPKCOMP_EN_MASK 0x100 -#define CS35L36_BST_MAN_IPKCOMP_EN_SHIFT 8 - -#define CS35L36_VPBR_REL_RATE_SHIFT 21 -#define CS35L36_VPBR_REL_RATE_MASK 0xE00000 -#define CS35L36_VPBR_THLD_SHIFT 0 -#define CS35L36_VPBR_THLD_MASK 0x1F -#define CS35L36_VPBR_ATK_VOL_SHIFT 12 -#define CS35L36_VPBR_ATK_VOL_MASK 0xF000 -#define CS35L36_VPBR_WAIT_SHIFT 19 -#define CS35L36_VPBR_WAIT_MASK 0x180000 -#define CS35L36_VPBR_ATK_RATE_SHIFT 16 -#define CS35L36_VPBR_ATK_RATE_MASK 0x70000 - -#define CS35L36_BST_IPK_MASK 0x7F -#define CS35L36_BST_OVP_THLD_MASK 0x3F -#define CS35L36_BST_OVP_THLD_11V 0x10 -#define CS35L36_BST_OVP_TRIM_MASK 0x00078000 -#define CS35L36_BST_OVP_TRIM_SHIFT 15 -#define CS35L36_BST_OVP_TRIM_11V 0x0C -#define CS35L36_BST_CTRL_LIM_MASK 0x04 -#define CS35L36_BST_CTRL_LIM_SHIFT 2 -#define CS35L36_BST_CTRL_10V_CLAMP 0x96 - -#define CS35L36_NG_AMP_EN_MASK 0x3F00 -#define CS35L36_NG_AMP_EN_SHIFT 8 -#define CS35L36_NG_DELAY_MASK 0x70 -#define CS35L36_NG_DELAY_SHIFT 4 -#define CS35L36_AMP_ZC_MASK 0x400 -#define CS35L36_PDM_LDM_ENTER_MASK 0x08 -#define CS35L36_PDM_LDM_EXIT_MASK 0x10 - -#define CS35L36_BSTCVRT_K1_MASK 0xFF -#define CS35L36_BSTCVRT_K2_MASK 0xFF00 -#define CS35L36_BSTCVRT_K2_SHIFT 8 -#define CS35L36_BSTCVRT_SLOPE_MASK 0xFF00 -#define CS35L36_BSTCVRT_SLOPE_SHIFT 8 -#define CS35L36_BSTCVRT_CCMFREQ_MASK 0x0F -#define CS35L36_BSTCVRT_LBSTVAL_MASK 0x03 -#define CS35L35_BSTCVRT_CTL_MASK 0xFF -#define CS35L35_BSTCVRT_CTL_SEL_MASK 0x03 -#define CS35L36_DCM_AUTO_MASK 0x01 - -#define CS35L36_INT1_MASK_DEFAULT 0xF9BA7FFF -#define CS35L36_INT1_MASK_RESET 0xFFFFFFFF -#define CS35L36_INT3_MASK_DEFAULT 0xFFFFEFFF -#define CS35L36_INT3_MASK_RESET 0xFFFFFFFF - - -#define CS35L36_AMP_SHORT_ERR 0x1000 -#define CS35L36_BST_SHORT_ERR 0x40000 -#define CS35L36_TEMP_WARN 0x2000000 -#define CS35L36_TEMP_ERR 0x4000000 -#define CS35L36_BST_OVP_ERR 0x10000 -#define CS35L36_BST_DCM_UVP_ERR 0x20000 - -#define CS35L36_AMP_SHORT_ERR_RLS 0x02 -#define CS35L36_BST_SHORT_ERR_RLS 0x04 -#define CS35L36_BST_OVP_ERR_RLS 0x08 -#define CS35L36_BST_UVP_ERR_RLS 0x10 -#define CS35L36_TEMP_WARN_ERR_RLS 0x20 -#define CS35L36_TEMP_ERR_RLS 0x40 -#define CS35L36_TEMP_THLD_MASK 0x03 - -#define CS35L36_REV_B0 0xb0 -#define CS35L36_REV_A0 0xa0 -#define CS35L36_B0_PAC_PATCH 0x00DD0102 - -#define CS35L36_OTP_ECC_EN_MASK 0x400 -#define CS35L36_OTP_ECC_EN_SHIFT 10 -#define CS35L36_OTP_RUN_BOOT_MASK 0x01 -#define CS35L36_OTP_BOOT_DONE 0x2000000 -#define CS35L36_PAC_RESET_MASK 0x04 -#define CS35L36_PAC_RESET_SHIFT 2 -#define CS35L36_PAC_STALL_MASK 0x02 -#define CS35L36_PAC_STALL_SHIFT 1 -#define CS35L36_PAC_ENABLE_MASK 0x00000001 -#define CS35L36_PAC_MEM_ACCESS 0x01 -#define CS35L36_PAC_MEM_ACCESS_CLR 0 -#define CS35L36_SOFT_RESET 0x5AAA -#define CS35L36_MCU_BOOT_COMPLETE 0x02 -#define CS35L36_MCU_CONFIG_UNMASK 0x00FEFFFF -#define CS35L36_MCU_CONFIG_CLR 0x00010000 -#define CS35L36_MCU_CONFIG_MASK 0x00FFFFFF -#define CS35L36_GPIO_INT_SEL_MASK 0x0000003B -#define CS35L36_GPIO_INT_SEL_UNMASK 0x0000003A -#define CS35L36_PAC_RESET 0x00000000 -#define CS35L36_OTP_REV_MASK 0x00FF0000 -#define CS35L36_OTP_REV_L37 0x00CC0000 -#define CS35L36_12V_L37 37 -#define CS35L36_10V_L36 36 - - -#define CS35L36_OSC_FREQ_TRIM_MASK 0x070 -#define CS35L36_OSC_TRIM_DONE 0x08 - -#define CS35L36_TEST_UNLOCK1 0x00005555 -#define CS35L36_TEST_UNLOCK2 0x0000AAAA -#define CS35L36_TEST_LOCK1 0x0000CCCC -#define CS35L36_TEST_LOCK2 0x00003333 - -#define CS35L36_PAC_PROG_MEM 512 - -#define CS35L36_RX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE) -#define CS35L36_TX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE \ - | SNDRV_PCM_FMTBIT_S32_LE) - -bool cs35l36_readable_reg(struct device *dev, unsigned int reg); -bool cs35l36_volatile_reg(struct device *dev, unsigned int reg); - -extern struct reg_default cs35l36_reg[CS35L36_MAX_CACHE_REG]; -extern const unsigned int cs35l36_aou_low_power_patch[CS35L36_PAC_PROG_MEM]; - -#endif diff --git a/sound/soc/codecs/cs35l41-i2c.c b/sound/soc/codecs/cs35l41-i2c.c deleted file mode 100644 index cb1e13995315..000000000000 --- a/sound/soc/codecs/cs35l41-i2c.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * cs35l41-i2c.c -- CS35l41 I2C driver - * - * Copyright 2017 Cirrus Logic, Inc. - * - * Author: David Rhodes - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "wm_adsp.h" -#include "cs35l41.h" -#include - -static struct regmap_config cs35l41_regmap_i2c = { - .reg_bits = 32, - .val_bits = 32, - .reg_stride = 4, - .reg_format_endian = REGMAP_ENDIAN_BIG, - .val_format_endian = REGMAP_ENDIAN_BIG, - .max_register = CS35L41_LASTREG, - .reg_defaults = cs35l41_reg, - .num_reg_defaults = ARRAY_SIZE(cs35l41_reg), - .volatile_reg = cs35l41_volatile_reg, - .readable_reg = cs35l41_readable_reg, - .precious_reg = cs35l41_precious_reg, - .cache_type = REGCACHE_RBTREE, -}; - -static const struct i2c_device_id cs35l41_id_i2c[] = { - {"cs35l40", 0}, - {"cs35l41", 0}, - {} -}; - -MODULE_DEVICE_TABLE(i2c, cs35l41_id_i2c); - -static ssize_t gpio_status_show(struct device *dev, struct device_attribute *attr, char *buf) -{ - u32 int_status = 0; - struct cs35l41_private *cs35l41 = dev_get_drvdata(dev); - - if (cs35l41 != NULL) - { - regmap_read(cs35l41->regmap, CS35L41_GPIO_STATUS1, &int_status); - dev_err(cs35l41->dev, "gpio_status_show read regmap:%d\n", int_status); - } - else - { - dev_err(cs35l41->dev, "gpio_status_show cs35l41 not init\n"); - } - - return snprintf(buf, PAGE_SIZE, "%d\n", int_status); -} - -static DEVICE_ATTR(gpio_status, S_IRUGO, gpio_status_show, NULL); - -static struct attribute *gpio_status_attrs[] = { - &dev_attr_gpio_status.attr, - NULL, -}; - -static struct attribute_group gpio_status_attr_group = { - .attrs = gpio_status_attrs, -}; - -static int cs35l41_i2c_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - struct cs35l41_private *cs35l41; - struct device *dev = &client->dev; - struct cs35l41_platform_data *pdata = dev_get_platdata(dev); - const struct regmap_config *regmap_config = &cs35l41_regmap_i2c; - int ret; - - cs35l41 = devm_kzalloc(dev, sizeof(struct cs35l41_private), GFP_KERNEL); - - if (cs35l41 == NULL) - return -ENOMEM; - - cs35l41->dev = dev; - cs35l41->irq = client->irq; - cs35l41->bus_spi = false; - - i2c_set_clientdata(client, cs35l41); - cs35l41->regmap = devm_regmap_init_i2c(client, regmap_config); - if (IS_ERR(cs35l41->regmap)) { - ret = PTR_ERR(cs35l41->regmap); - dev_err(cs35l41->dev, "Failed to allocate register map: %d\n", - ret); - return ret; - } - - ret = sysfs_create_group(&cs35l41->dev->kobj, &gpio_status_attr_group); - if (ret < 0) - dev_err(cs35l41->dev, "sysfs group creation failed, ret = %d\n", ret); - - return cs35l41_probe(cs35l41, pdata); -} - -static int cs35l41_i2c_remove(struct i2c_client *client) -{ - struct cs35l41_private *cs35l41 = i2c_get_clientdata(client); - - regmap_write(cs35l41->regmap, CS35L41_IRQ1_MASK1, 0xFFFFFFFF); - wm_adsp2_remove(&cs35l41->dsp); - regulator_bulk_disable(cs35l41->num_supplies, cs35l41->supplies); - snd_soc_unregister_codec(cs35l41->dev); - return 0; -} - -static const struct of_device_id cs35l41_of_match[] = { - {.compatible = "cirrus,cs35l40"}, - {.compatible = "cirrus,cs35l41"}, - {}, -}; -MODULE_DEVICE_TABLE(of, cs35l41_of_match); - -static struct i2c_driver cs35l41_i2c_driver = { - .driver = { - .name = "cs35l41", - .of_match_table = cs35l41_of_match, - }, - .id_table = cs35l41_id_i2c, - .probe = cs35l41_i2c_probe, - .remove = cs35l41_i2c_remove, -}; - -module_i2c_driver(cs35l41_i2c_driver); - -MODULE_DESCRIPTION("I2C CS35L41 driver"); -MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, "); -MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs35l41-spi.c b/sound/soc/codecs/cs35l41-spi.c deleted file mode 100644 index 550e80a982cb..000000000000 --- a/sound/soc/codecs/cs35l41-spi.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * cs35l41-spi.c -- CS35l41 SPI driver - * - * Copyright 2017 Cirrus Logic, Inc. - * - * Author: David Rhodes - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "wm_adsp.h" -#include "cs35l41.h" -#include - -static struct regmap_config cs35l41_regmap_spi = { - .reg_bits = 32, - .val_bits = 32, - .pad_bits = 16, - .reg_stride = 4, - .reg_format_endian = REGMAP_ENDIAN_BIG, - .val_format_endian = REGMAP_ENDIAN_BIG, - .max_register = CS35L41_LASTREG, - .reg_defaults = cs35l41_reg, - .num_reg_defaults = ARRAY_SIZE(cs35l41_reg), - .volatile_reg = cs35l41_volatile_reg, - .readable_reg = cs35l41_readable_reg, - .precious_reg = cs35l41_precious_reg, - .cache_type = REGCACHE_RBTREE, -}; - -static const struct spi_device_id cs35l41_id_spi[] = { - {"cs35l40", 0}, - {"cs35l41", 0}, - {} -}; - -MODULE_DEVICE_TABLE(spi, cs35l41_id_spi); - -static int cs35l41_spi_probe(struct spi_device *spi) -{ - const struct regmap_config *regmap_config = &cs35l41_regmap_spi; - struct cs35l41_platform_data *pdata = - dev_get_platdata(&spi->dev); - struct cs35l41_private *cs35l41; - int ret; - - cs35l41 = devm_kzalloc(&spi->dev, - sizeof(struct cs35l41_private), - GFP_KERNEL); - if (cs35l41 == NULL) - return -ENOMEM; - - spi_set_drvdata(spi, cs35l41); - cs35l41->regmap = devm_regmap_init_spi(spi, regmap_config); - if (IS_ERR(cs35l41->regmap)) { - ret = PTR_ERR(cs35l41->regmap); - dev_err(&spi->dev, "Failed to allocate register map: %d\n", - ret); - return ret; - } - - cs35l41->dev = &spi->dev; - cs35l41->irq = spi->irq; - cs35l41->bus_spi = true; - - return cs35l41_probe(cs35l41, pdata); -} - -static int cs35l41_spi_remove(struct spi_device *spi) -{ - struct cs35l41_private *cs35l41 = spi_get_drvdata(spi); - - regmap_write(cs35l41->regmap, CS35L41_IRQ1_MASK1, 0xFFFFFFFF); - wm_adsp2_remove(&cs35l41->dsp); - regulator_bulk_disable(cs35l41->num_supplies, cs35l41->supplies); - snd_soc_unregister_codec(cs35l41->dev); - return 0; -} - -static const struct of_device_id cs35l41_of_match[] = { - {.compatible = "cirrus,cs35l40"}, - {.compatible = "cirrus,cs35l41"}, - {}, -}; -MODULE_DEVICE_TABLE(of, cs35l41_of_match); - -static struct spi_driver cs35l41_spi_driver = { - .driver = { - .name = "cs35l41", - .of_match_table = cs35l41_of_match, - }, - .id_table = cs35l41_id_spi, - .probe = cs35l41_spi_probe, - .remove = cs35l41_spi_remove, -}; - -module_spi_driver(cs35l41_spi_driver); - -MODULE_DESCRIPTION("SPI CS35L41 driver"); -MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, "); -MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs35l41-tables.c b/sound/soc/codecs/cs35l41-tables.c deleted file mode 100644 index d7fa0634ac55..000000000000 --- a/sound/soc/codecs/cs35l41-tables.c +++ /dev/null @@ -1,953 +0,0 @@ -/* - * cs35l41-tables.c -- CS35L41 ALSA SoC audio driver - * - * Copyright 2018 Cirrus Logic, Inc. - * - * Author: Brian Austin - * David Rhodes - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include "cs35l41.h" - -const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG] = { - {CS35L41_TEST_KEY_CTL, 0x00000000}, - {CS35L41_USER_KEY_CTL, 0x00000000}, - {CS35L41_OTP_CTRL0, 0x00006418}, - {CS35L41_OTP_CTRL1, 0x00000000}, - {CS35L41_OTP_CTRL3, 0x00000000}, - {CS35L41_OTP_CTRL4, 0x00000000}, - {CS35L41_OTP_CTRL5, 0x00000030}, - {CS35L41_OTP_CTRL6, 0x00000000}, - {CS35L41_OTP_CTRL7, 0x00000000}, - {CS35L41_OTP_CTRL8, 0x00000000}, - {CS35L41_PWR_CTRL1, 0x00000000}, - {CS35L41_PWR_CTRL3, 0x01000010}, - {CS35L41_CTRL_OVRRIDE, 0x00000002}, - {CS35L41_AMP_OUT_MUTE, 0x00000000}, - {CS35L41_PROTECT_REL_ERR_IGN, 0x00000000}, - {CS35L41_GPIO_PAD_CONTROL, 0x00000000}, - {CS35L41_JTAG_CONTROL, 0x00000000}, - {CS35L41_PLL_CLK_CTRL, 0x00000010}, - {CS35L41_DSP_CLK_CTRL, 0x00000003}, - {CS35L41_GLOBAL_CLK_CTRL, 0x00000003}, - {CS35L41_DATA_FS_SEL, 0x00000000}, - {CS35L41_MDSYNC_EN, 0x00000200}, - {CS35L41_MDSYNC_TX_ID, 0x00000000}, - {CS35L41_MDSYNC_PWR_CTRL, 0x00000002}, - {CS35L41_MDSYNC_DATA_TX, 0x00000000}, - {CS35L41_MDSYNC_TX_STATUS, 0x00000002}, - {CS35L41_MDSYNC_DATA_RX, 0x00000000}, - {CS35L41_MDSYNC_RX_STATUS, 0x00000002}, - {CS35L41_MDSYNC_ERR_STATUS, 0x00000000}, - {CS35L41_MDSYNC_SYNC_PTE2, 0x00000000}, - {CS35L41_MDSYNC_SYNC_PTE3, 0x00000000}, - {CS35L41_MDSYNC_SYNC_MSM_STATUS, 0x00000000}, - {CS35L41_BSTCVRT_VCTRL1, 0x00000000}, - {CS35L41_BSTCVRT_VCTRL2, 0x00000001}, - {CS35L41_BSTCVRT_PEAK_CUR, 0x0000004A}, - {CS35L41_BSTCVRT_SFT_RAMP, 0x00000003}, - {CS35L41_BSTCVRT_COEFF, 0x00002424}, - {CS35L41_BSTCVRT_SLOPE_LBST, 0x00007500}, - {CS35L41_BSTCVRT_SW_FREQ, 0x01008000}, - {CS35L41_BSTCVRT_DCM_CTRL, 0x00002001}, - {CS35L41_BSTCVRT_DCM_MODE_FORCE, 0x00000000}, - {CS35L41_BSTCVRT_OVERVOLT_CTRL, 0x00000130}, - {CS35L41_VI_VOL_POL, 0x08000800}, - {CS35L41_DTEMP_WARN_THLD, 0x00000002}, - {CS35L41_DTEMP_EN, 0x00000000}, - {CS35L41_VPVBST_FS_SEL, 0x00000001}, - {CS35L41_SP_ENABLES, 0x00000000}, - {CS35L41_SP_RATE_CTRL, 0x00000028}, - {CS35L41_SP_FORMAT, 0x18180200}, - {CS35L41_SP_HIZ_CTRL, 0x00000002}, - {CS35L41_SP_FRAME_TX_SLOT, 0x03020100}, - {CS35L41_SP_FRAME_RX_SLOT, 0x00000100}, - {CS35L41_SP_TX_WL, 0x00000018}, - {CS35L41_SP_RX_WL, 0x00000018}, - {CS35L41_DAC_PCM1_SRC, 0x00000008}, - {CS35L41_ASP_TX1_SRC, 0x00000018}, - {CS35L41_ASP_TX2_SRC, 0x00000019}, - {CS35L41_ASP_TX3_SRC, 0x00000020}, - {CS35L41_ASP_TX4_SRC, 0x00000021}, - {CS35L41_DSP1_RX1_SRC, 0x00000008}, - {CS35L41_DSP1_RX2_SRC, 0x00000009}, - {CS35L41_DSP1_RX3_SRC, 0x00000018}, - {CS35L41_DSP1_RX4_SRC, 0x00000019}, - {CS35L41_DSP1_RX5_SRC, 0x00000020}, - {CS35L41_DSP1_RX6_SRC, 0x00000021}, - {CS35L41_DSP1_RX7_SRC, 0x0000003A}, - {CS35L41_DSP1_RX8_SRC, 0x00000001}, - {CS35L41_NGATE1_SRC, 0x00000008}, - {CS35L41_NGATE2_SRC, 0x00000009}, - {CS35L41_AMP_DIG_VOL_CTRL, 0x00008000}, - {CS35L41_VPBR_CFG, 0x02AA1905}, - {CS35L41_VBBR_CFG, 0x02AA1905}, - {CS35L41_VPBR_STATUS, 0x00000000}, - {CS35L41_VBBR_STATUS, 0x00000000}, - {CS35L41_OVERTEMP_CFG, 0x00000001}, - {CS35L41_AMP_ERR_VOL, 0x00000000}, - {CS35L41_VOL_STATUS_TO_DSP, 0x00000000}, - {CS35L41_CLASSH_CFG, 0x000B0405}, - {CS35L41_WKFET_CFG, 0x00000111}, - {CS35L41_NG_CFG, 0x00000033}, - {CS35L41_AMP_GAIN_CTRL, 0x00000273}, - {CS35L41_DAC_MSM_CFG, 0x00580000}, - {CS35L41_GPIO1_CTRL1, 0xE1000001}, - {CS35L41_GPIO2_CTRL1, 0xE1000001}, - {CS35L41_MIXER_NGATE_CFG, 0x00000000}, - {CS35L41_MIXER_NGATE_CH1_CFG, 0x00000303}, - {CS35L41_MIXER_NGATE_CH2_CFG, 0x00000303}, - {CS35L41_CLOCK_DETECT_1, 0x00000000}, - {CS35L41_TIMER1_CONTROL, 0x00000000}, - {CS35L41_TIMER1_COUNT_PRESET, 0x00000000}, - {CS35L41_TIMER1_START_STOP, 0x00000000}, - {CS35L41_TIMER1_STATUS, 0x00000000}, - {CS35L41_TIMER1_COUNT_READBACK, 0x00000000}, - {CS35L41_TIMER1_DSP_CLK_CFG, 0x00000000}, - {CS35L41_TIMER1_DSP_CLK_STATUS, 0x00000000}, - {CS35L41_TIMER2_CONTROL, 0x00000000}, - {CS35L41_TIMER2_COUNT_PRESET, 0x00000000}, - {CS35L41_TIMER2_START_STOP, 0x00000000}, - {CS35L41_TIMER2_STATUS, 0x00000000}, - {CS35L41_TIMER2_COUNT_READBACK, 0x00000000}, - {CS35L41_TIMER2_DSP_CLK_CFG, 0x00000000}, - {CS35L41_TIMER2_DSP_CLK_STATUS, 0x00000000}, - {CS35L41_DFT_JTAG_CONTROL, 0x00000000}, - {CS35L41_DIE_STS1, 0x00000000}, - {CS35L41_DIE_STS2, 0x00000000}, - {CS35L41_TEMP_CAL1, 0x00000000}, - {CS35L41_TEMP_CAL2, 0x00000000}, -}; - -bool cs35l41_readable_reg(struct device *dev, unsigned int reg) -{ - switch (reg) { - case CS35L41_DEVID: - case CS35L41_REVID: - case CS35L41_FABID: - case CS35L41_RELID: - case CS35L41_OTPID: - case CS35L41_TEST_KEY_CTL: - case CS35L41_USER_KEY_CTL: - case CS35L41_OTP_CTRL0: - case CS35L41_OTP_CTRL3: - case CS35L41_OTP_CTRL4: - case CS35L41_OTP_CTRL5: - case CS35L41_OTP_CTRL6: - case CS35L41_OTP_CTRL7: - case CS35L41_OTP_CTRL8: - case CS35L41_PWR_CTRL1: - case CS35L41_PWR_CTRL2: - case CS35L41_PWR_CTRL3: - case CS35L41_CTRL_OVRRIDE: - case CS35L41_AMP_OUT_MUTE: - case CS35L41_PROTECT_REL_ERR_IGN: - case CS35L41_GPIO_PAD_CONTROL: - case CS35L41_JTAG_CONTROL: - case CS35L41_PLL_CLK_CTRL: - case CS35L41_DSP_CLK_CTRL: - case CS35L41_GLOBAL_CLK_CTRL: - case CS35L41_DATA_FS_SEL: - case CS35L41_MDSYNC_EN: - case CS35L41_MDSYNC_TX_ID: - case CS35L41_MDSYNC_PWR_CTRL: - case CS35L41_MDSYNC_DATA_TX: - case CS35L41_MDSYNC_TX_STATUS: - case CS35L41_MDSYNC_DATA_RX: - case CS35L41_MDSYNC_RX_STATUS: - case CS35L41_MDSYNC_ERR_STATUS: - case CS35L41_MDSYNC_SYNC_PTE2: - case CS35L41_MDSYNC_SYNC_PTE3: - case CS35L41_MDSYNC_SYNC_MSM_STATUS: - case CS35L41_BSTCVRT_VCTRL1: - case CS35L41_BSTCVRT_VCTRL2: - case CS35L41_BSTCVRT_PEAK_CUR: - case CS35L41_BSTCVRT_SFT_RAMP: - case CS35L41_BSTCVRT_COEFF: - case CS35L41_BSTCVRT_SLOPE_LBST: - case CS35L41_BSTCVRT_SW_FREQ: - case CS35L41_BSTCVRT_DCM_CTRL: - case CS35L41_BSTCVRT_DCM_MODE_FORCE: - case CS35L41_BSTCVRT_OVERVOLT_CTRL: - case CS35L41_VI_VOL_POL: - case CS35L41_DTEMP_WARN_THLD: - case CS35L41_DTEMP_CFG: - case CS35L41_DTEMP_EN: - case CS35L41_VPVBST_FS_SEL: - case CS35L41_SP_ENABLES: - case CS35L41_SP_RATE_CTRL: - case CS35L41_SP_FORMAT: - case CS35L41_SP_HIZ_CTRL: - case CS35L41_SP_FRAME_TX_SLOT: - case CS35L41_SP_FRAME_RX_SLOT: - case CS35L41_SP_TX_WL: - case CS35L41_SP_RX_WL: - case CS35L41_DAC_PCM1_SRC: - case CS35L41_ASP_TX1_SRC: - case CS35L41_ASP_TX2_SRC: - case CS35L41_ASP_TX3_SRC: - case CS35L41_ASP_TX4_SRC: - case CS35L41_DSP1_RX1_SRC: - case CS35L41_DSP1_RX2_SRC: - case CS35L41_DSP1_RX3_SRC: - case CS35L41_DSP1_RX4_SRC: - case CS35L41_DSP1_RX5_SRC: - case CS35L41_DSP1_RX6_SRC: - case CS35L41_DSP1_RX7_SRC: - case CS35L41_DSP1_RX8_SRC: - case CS35L41_NGATE1_SRC: - case CS35L41_NGATE2_SRC: - case CS35L41_AMP_DIG_VOL_CTRL: - case CS35L41_VPBR_CFG: - case CS35L41_VBBR_CFG: - case CS35L41_VPBR_STATUS: - case CS35L41_VBBR_STATUS: - case CS35L41_OVERTEMP_CFG: - case CS35L41_AMP_ERR_VOL: - case CS35L41_VOL_STATUS_TO_DSP: - case CS35L41_CLASSH_CFG: - case CS35L41_WKFET_CFG: - case CS35L41_NG_CFG: - case CS35L41_AMP_GAIN_CTRL: - case CS35L41_DAC_MSM_CFG: - case CS35L41_IRQ1_CFG: - case CS35L41_IRQ1_STATUS: - case CS35L41_IRQ1_STATUS1: - case CS35L41_IRQ1_STATUS2: - case CS35L41_IRQ1_STATUS3: - case CS35L41_IRQ1_STATUS4: - case CS35L41_IRQ1_RAW_STATUS1: - case CS35L41_IRQ1_RAW_STATUS2: - case CS35L41_IRQ1_RAW_STATUS3: - case CS35L41_IRQ1_RAW_STATUS4: - case CS35L41_IRQ1_MASK1: - case CS35L41_IRQ1_MASK2: - case CS35L41_IRQ1_MASK3: - case CS35L41_IRQ1_MASK4: - case CS35L41_IRQ1_FRC1: - case CS35L41_IRQ1_FRC2: - case CS35L41_IRQ1_FRC3: - case CS35L41_IRQ1_FRC4: - case CS35L41_IRQ1_EDGE1: - case CS35L41_IRQ1_EDGE4: - case CS35L41_IRQ1_POL1: - case CS35L41_IRQ1_POL2: - case CS35L41_IRQ1_POL3: - case CS35L41_IRQ1_POL4: - case CS35L41_IRQ1_DB3: - case CS35L41_IRQ2_CFG: - case CS35L41_IRQ2_STATUS: - case CS35L41_IRQ2_STATUS1: - case CS35L41_IRQ2_STATUS2: - case CS35L41_IRQ2_STATUS3: - case CS35L41_IRQ2_STATUS4: - case CS35L41_IRQ2_RAW_STATUS1: - case CS35L41_IRQ2_RAW_STATUS2: - case CS35L41_IRQ2_RAW_STATUS3: - case CS35L41_IRQ2_RAW_STATUS4: - case CS35L41_IRQ2_MASK1: - case CS35L41_IRQ2_MASK2: - case CS35L41_IRQ2_MASK3: - case CS35L41_IRQ2_MASK4: - case CS35L41_IRQ2_FRC1: - case CS35L41_IRQ2_FRC2: - case CS35L41_IRQ2_FRC3: - case CS35L41_IRQ2_FRC4: - case CS35L41_IRQ2_EDGE1: - case CS35L41_IRQ2_EDGE4: - case CS35L41_IRQ2_POL1: - case CS35L41_IRQ2_POL2: - case CS35L41_IRQ2_POL3: - case CS35L41_IRQ2_POL4: - case CS35L41_IRQ2_DB3: - case CS35L41_GPIO_STATUS1: - case CS35L41_GPIO1_CTRL1: - case CS35L41_GPIO2_CTRL1: - case CS35L41_MIXER_NGATE_CFG: - case CS35L41_MIXER_NGATE_CH1_CFG: - case CS35L41_MIXER_NGATE_CH2_CFG: - case CS35L41_DSP_MBOX_1 ... CS35L41_DSP_VIRT2_MBOX_8: - case CS35L41_CLOCK_DETECT_1: - case CS35L41_TIMER1_CONTROL: - case CS35L41_TIMER1_COUNT_PRESET: - case CS35L41_TIMER1_STATUS: - case CS35L41_TIMER1_COUNT_READBACK: - case CS35L41_TIMER1_DSP_CLK_CFG: - case CS35L41_TIMER1_DSP_CLK_STATUS: - case CS35L41_TIMER2_CONTROL: - case CS35L41_TIMER2_COUNT_PRESET: - case CS35L41_TIMER2_STATUS: - case CS35L41_TIMER2_COUNT_READBACK: - case CS35L41_TIMER2_DSP_CLK_CFG: - case CS35L41_TIMER2_DSP_CLK_STATUS: - case CS35L41_DFT_JTAG_CONTROL: - case CS35L41_DIE_STS1: - case CS35L41_DIE_STS2: - case CS35L41_TEMP_CAL1: - case CS35L41_TEMP_CAL2: - case CS35L41_DSP1_TIMESTAMP_COUNT: - case CS35L41_DSP1_SYS_ID: - case CS35L41_DSP1_SYS_VERSION: - case CS35L41_DSP1_SYS_CORE_ID: - case CS35L41_DSP1_SYS_AHB_ADDR: - case CS35L41_DSP1_SYS_XSRAM_SIZE: - case CS35L41_DSP1_SYS_YSRAM_SIZE: - case CS35L41_DSP1_SYS_PSRAM_SIZE: - case CS35L41_DSP1_SYS_PM_BOOT_SIZE: - case CS35L41_DSP1_SYS_FEATURES: - case CS35L41_DSP1_SYS_FIR_FILTERS: - case CS35L41_DSP1_SYS_LMS_FILTERS: - case CS35L41_DSP1_SYS_XM_BANK_SIZE: - case CS35L41_DSP1_SYS_YM_BANK_SIZE: - case CS35L41_DSP1_SYS_PM_BANK_SIZE: - case CS35L41_DSP1_AHBM_WIN0_CTRL0: - case CS35L41_DSP1_AHBM_WIN0_CTRL1: - case CS35L41_DSP1_AHBM_WIN1_CTRL0: - case CS35L41_DSP1_AHBM_WIN1_CTRL1: - case CS35L41_DSP1_AHBM_WIN2_CTRL0: - case CS35L41_DSP1_AHBM_WIN2_CTRL1: - case CS35L41_DSP1_AHBM_WIN3_CTRL0: - case CS35L41_DSP1_AHBM_WIN3_CTRL1: - case CS35L41_DSP1_AHBM_WIN4_CTRL0: - case CS35L41_DSP1_AHBM_WIN4_CTRL1: - case CS35L41_DSP1_AHBM_WIN5_CTRL0: - case CS35L41_DSP1_AHBM_WIN5_CTRL1: - case CS35L41_DSP1_AHBM_WIN6_CTRL0: - case CS35L41_DSP1_AHBM_WIN6_CTRL1: - case CS35L41_DSP1_AHBM_WIN7_CTRL0: - case CS35L41_DSP1_AHBM_WIN7_CTRL1: - case CS35L41_DSP1_AHBM_WIN_DBG_CTRL0: - case CS35L41_DSP1_AHBM_WIN_DBG_CTRL1: - case CS35L41_DSP1_DEBUG: - case CS35L41_DSP1_TIMER_CTRL: - case CS35L41_DSP1_RX1_RATE: - case CS35L41_DSP1_RX2_RATE: - case CS35L41_DSP1_RX3_RATE: - case CS35L41_DSP1_RX4_RATE: - case CS35L41_DSP1_RX5_RATE: - case CS35L41_DSP1_RX6_RATE: - case CS35L41_DSP1_RX7_RATE: - case CS35L41_DSP1_RX8_RATE: - case CS35L41_DSP1_TX1_RATE: - case CS35L41_DSP1_TX2_RATE: - case CS35L41_DSP1_TX3_RATE: - case CS35L41_DSP1_TX4_RATE: - case CS35L41_DSP1_TX5_RATE: - case CS35L41_DSP1_TX6_RATE: - case CS35L41_DSP1_TX7_RATE: - case CS35L41_DSP1_TX8_RATE: - case CS35L41_DSP1_NMI_CTRL1: - case CS35L41_DSP1_NMI_CTRL2: - case CS35L41_DSP1_NMI_CTRL3: - case CS35L41_DSP1_NMI_CTRL4: - case CS35L41_DSP1_NMI_CTRL5: - case CS35L41_DSP1_NMI_CTRL6: - case CS35L41_DSP1_NMI_CTRL7: - case CS35L41_DSP1_NMI_CTRL8: - case CS35L41_DSP1_RESUME_CTRL: - case CS35L41_DSP1_IRQ1_CTRL: - case CS35L41_DSP1_IRQ2_CTRL: - case CS35L41_DSP1_IRQ3_CTRL: - case CS35L41_DSP1_IRQ4_CTRL: - case CS35L41_DSP1_IRQ5_CTRL: - case CS35L41_DSP1_IRQ6_CTRL: - case CS35L41_DSP1_IRQ7_CTRL: - case CS35L41_DSP1_IRQ8_CTRL: - case CS35L41_DSP1_IRQ9_CTRL: - case CS35L41_DSP1_IRQ10_CTRL: - case CS35L41_DSP1_IRQ11_CTRL: - case CS35L41_DSP1_IRQ12_CTRL: - case CS35L41_DSP1_IRQ13_CTRL: - case CS35L41_DSP1_IRQ14_CTRL: - case CS35L41_DSP1_IRQ15_CTRL: - case CS35L41_DSP1_IRQ16_CTRL: - case CS35L41_DSP1_IRQ17_CTRL: - case CS35L41_DSP1_IRQ18_CTRL: - case CS35L41_DSP1_IRQ19_CTRL: - case CS35L41_DSP1_IRQ20_CTRL: - case CS35L41_DSP1_IRQ21_CTRL: - case CS35L41_DSP1_IRQ22_CTRL: - case CS35L41_DSP1_IRQ23_CTRL: - case CS35L41_DSP1_SCRATCH1: - case CS35L41_DSP1_SCRATCH2: - case CS35L41_DSP1_SCRATCH3: - case CS35L41_DSP1_SCRATCH4: - case CS35L41_DSP1_CCM_CORE_CTRL: - case CS35L41_DSP1_CCM_CLK_OVERRIDE: - case CS35L41_DSP1_XM_MSTR_EN: - case CS35L41_DSP1_XM_CORE_PRI: - case CS35L41_DSP1_XM_AHB_PACK_PL_PRI: - case CS35L41_DSP1_XM_AHB_UP_PL_PRI: - case CS35L41_DSP1_XM_ACCEL_PL0_PRI: - case CS35L41_DSP1_XM_NPL0_PRI: - case CS35L41_DSP1_YM_MSTR_EN: - case CS35L41_DSP1_YM_CORE_PRI: - case CS35L41_DSP1_YM_AHB_PACK_PL_PRI: - case CS35L41_DSP1_YM_AHB_UP_PL_PRI: - case CS35L41_DSP1_YM_ACCEL_PL0_PRI: - case CS35L41_DSP1_YM_NPL0_PRI: - case CS35L41_DSP1_PM_MSTR_EN: - case CS35L41_DSP1_PM_PATCH0_ADDR: - case CS35L41_DSP1_PM_PATCH0_EN: - case CS35L41_DSP1_PM_PATCH0_DATA_LO: - case CS35L41_DSP1_PM_PATCH0_DATA_HI: - case CS35L41_DSP1_PM_PATCH1_ADDR: - case CS35L41_DSP1_PM_PATCH1_EN: - case CS35L41_DSP1_PM_PATCH1_DATA_LO: - case CS35L41_DSP1_PM_PATCH1_DATA_HI: - case CS35L41_DSP1_PM_PATCH2_ADDR: - case CS35L41_DSP1_PM_PATCH2_EN: - case CS35L41_DSP1_PM_PATCH2_DATA_LO: - case CS35L41_DSP1_PM_PATCH2_DATA_HI: - case CS35L41_DSP1_PM_PATCH3_ADDR: - case CS35L41_DSP1_PM_PATCH3_EN: - case CS35L41_DSP1_PM_PATCH3_DATA_LO: - case CS35L41_DSP1_PM_PATCH3_DATA_HI: - case CS35L41_DSP1_PM_PATCH4_ADDR: - case CS35L41_DSP1_PM_PATCH4_EN: - case CS35L41_DSP1_PM_PATCH4_DATA_LO: - case CS35L41_DSP1_PM_PATCH4_DATA_HI: - case CS35L41_DSP1_PM_PATCH5_ADDR: - case CS35L41_DSP1_PM_PATCH5_EN: - case CS35L41_DSP1_PM_PATCH5_DATA_LO: - case CS35L41_DSP1_PM_PATCH5_DATA_HI: - case CS35L41_DSP1_PM_PATCH6_ADDR: - case CS35L41_DSP1_PM_PATCH6_EN: - case CS35L41_DSP1_PM_PATCH6_DATA_LO: - case CS35L41_DSP1_PM_PATCH6_DATA_HI: - case CS35L41_DSP1_PM_PATCH7_ADDR: - case CS35L41_DSP1_PM_PATCH7_EN: - case CS35L41_DSP1_PM_PATCH7_DATA_LO: - case CS35L41_DSP1_PM_PATCH7_DATA_HI: - case CS35L41_DSP1_MPU_XM_ACCESS0: - case CS35L41_DSP1_MPU_YM_ACCESS0: - case CS35L41_DSP1_MPU_WNDW_ACCESS0: - case CS35L41_DSP1_MPU_XREG_ACCESS0: - case CS35L41_DSP1_MPU_YREG_ACCESS0: - case CS35L41_DSP1_MPU_XM_ACCESS1: - case CS35L41_DSP1_MPU_YM_ACCESS1: - case CS35L41_DSP1_MPU_WNDW_ACCESS1: - case CS35L41_DSP1_MPU_XREG_ACCESS1: - case CS35L41_DSP1_MPU_YREG_ACCESS1: - case CS35L41_DSP1_MPU_XM_ACCESS2: - case CS35L41_DSP1_MPU_YM_ACCESS2: - case CS35L41_DSP1_MPU_WNDW_ACCESS2: - case CS35L41_DSP1_MPU_XREG_ACCESS2: - case CS35L41_DSP1_MPU_YREG_ACCESS2: - case CS35L41_DSP1_MPU_XM_ACCESS3: - case CS35L41_DSP1_MPU_YM_ACCESS3: - case CS35L41_DSP1_MPU_WNDW_ACCESS3: - case CS35L41_DSP1_MPU_XREG_ACCESS3: - case CS35L41_DSP1_MPU_YREG_ACCESS3: - case CS35L41_DSP1_MPU_XM_VIO_ADDR: - case CS35L41_DSP1_MPU_XM_VIO_STATUS: - case CS35L41_DSP1_MPU_YM_VIO_ADDR: - case CS35L41_DSP1_MPU_YM_VIO_STATUS: - case CS35L41_DSP1_MPU_PM_VIO_ADDR: - case CS35L41_DSP1_MPU_PM_VIO_STATUS: - case CS35L41_DSP1_MPU_LOCK_CONFIG: - case CS35L41_DSP1_MPU_WDT_RST_CTRL: - case CS35L41_DSP1_STRMARB_MSTR0_CFG0: - case CS35L41_DSP1_STRMARB_MSTR0_CFG1: - case CS35L41_DSP1_STRMARB_MSTR0_CFG2: - case CS35L41_DSP1_STRMARB_MSTR1_CFG0: - case CS35L41_DSP1_STRMARB_MSTR1_CFG1: - case CS35L41_DSP1_STRMARB_MSTR1_CFG2: - case CS35L41_DSP1_STRMARB_MSTR2_CFG0: - case CS35L41_DSP1_STRMARB_MSTR2_CFG1: - case CS35L41_DSP1_STRMARB_MSTR2_CFG2: - case CS35L41_DSP1_STRMARB_MSTR3_CFG0: - case CS35L41_DSP1_STRMARB_MSTR3_CFG1: - case CS35L41_DSP1_STRMARB_MSTR3_CFG2: - case CS35L41_DSP1_STRMARB_MSTR4_CFG0: - case CS35L41_DSP1_STRMARB_MSTR4_CFG1: - case CS35L41_DSP1_STRMARB_MSTR4_CFG2: - case CS35L41_DSP1_STRMARB_MSTR5_CFG0: - case CS35L41_DSP1_STRMARB_MSTR5_CFG1: - case CS35L41_DSP1_STRMARB_MSTR5_CFG2: - case CS35L41_DSP1_STRMARB_MSTR6_CFG0: - case CS35L41_DSP1_STRMARB_MSTR6_CFG1: - case CS35L41_DSP1_STRMARB_MSTR6_CFG2: - case CS35L41_DSP1_STRMARB_MSTR7_CFG0: - case CS35L41_DSP1_STRMARB_MSTR7_CFG1: - case CS35L41_DSP1_STRMARB_MSTR7_CFG2: - case CS35L41_DSP1_STRMARB_TX0_CFG0: - case CS35L41_DSP1_STRMARB_TX0_CFG1: - case CS35L41_DSP1_STRMARB_TX1_CFG0: - case CS35L41_DSP1_STRMARB_TX1_CFG1: - case CS35L41_DSP1_STRMARB_TX2_CFG0: - case CS35L41_DSP1_STRMARB_TX2_CFG1: - case CS35L41_DSP1_STRMARB_TX3_CFG0: - case CS35L41_DSP1_STRMARB_TX3_CFG1: - case CS35L41_DSP1_STRMARB_TX4_CFG0: - case CS35L41_DSP1_STRMARB_TX4_CFG1: - case CS35L41_DSP1_STRMARB_TX5_CFG0: - case CS35L41_DSP1_STRMARB_TX5_CFG1: - case CS35L41_DSP1_STRMARB_TX6_CFG0: - case CS35L41_DSP1_STRMARB_TX6_CFG1: - case CS35L41_DSP1_STRMARB_TX7_CFG0: - case CS35L41_DSP1_STRMARB_TX7_CFG1: - case CS35L41_DSP1_STRMARB_RX0_CFG0: - case CS35L41_DSP1_STRMARB_RX0_CFG1: - case CS35L41_DSP1_STRMARB_RX1_CFG0: - case CS35L41_DSP1_STRMARB_RX1_CFG1: - case CS35L41_DSP1_STRMARB_RX2_CFG0: - case CS35L41_DSP1_STRMARB_RX2_CFG1: - case CS35L41_DSP1_STRMARB_RX3_CFG0: - case CS35L41_DSP1_STRMARB_RX3_CFG1: - case CS35L41_DSP1_STRMARB_RX4_CFG0: - case CS35L41_DSP1_STRMARB_RX4_CFG1: - case CS35L41_DSP1_STRMARB_RX5_CFG0: - case CS35L41_DSP1_STRMARB_RX5_CFG1: - case CS35L41_DSP1_STRMARB_RX6_CFG0: - case CS35L41_DSP1_STRMARB_RX6_CFG1: - case CS35L41_DSP1_STRMARB_RX7_CFG0: - case CS35L41_DSP1_STRMARB_RX7_CFG1: - case CS35L41_DSP1_STRMARB_IRQ0_CFG0: - case CS35L41_DSP1_STRMARB_IRQ0_CFG1: - case CS35L41_DSP1_STRMARB_IRQ0_CFG2: - case CS35L41_DSP1_STRMARB_IRQ1_CFG0: - case CS35L41_DSP1_STRMARB_IRQ1_CFG1: - case CS35L41_DSP1_STRMARB_IRQ1_CFG2: - case CS35L41_DSP1_STRMARB_IRQ2_CFG0: - case CS35L41_DSP1_STRMARB_IRQ2_CFG1: - case CS35L41_DSP1_STRMARB_IRQ2_CFG2: - case CS35L41_DSP1_STRMARB_IRQ3_CFG0: - case CS35L41_DSP1_STRMARB_IRQ3_CFG1: - case CS35L41_DSP1_STRMARB_IRQ3_CFG2: - case CS35L41_DSP1_STRMARB_IRQ4_CFG0: - case CS35L41_DSP1_STRMARB_IRQ4_CFG1: - case CS35L41_DSP1_STRMARB_IRQ4_CFG2: - case CS35L41_DSP1_STRMARB_IRQ5_CFG0: - case CS35L41_DSP1_STRMARB_IRQ5_CFG1: - case CS35L41_DSP1_STRMARB_IRQ5_CFG2: - case CS35L41_DSP1_STRMARB_IRQ6_CFG0: - case CS35L41_DSP1_STRMARB_IRQ6_CFG1: - case CS35L41_DSP1_STRMARB_IRQ6_CFG2: - case CS35L41_DSP1_STRMARB_IRQ7_CFG0: - case CS35L41_DSP1_STRMARB_IRQ7_CFG1: - case CS35L41_DSP1_STRMARB_IRQ7_CFG2: - case CS35L41_DSP1_STRMARB_RESYNC_MSK: - case CS35L41_DSP1_STRMARB_ERR_STATUS: - case CS35L41_DSP1_INTPCTL_RES_STATIC: - case CS35L41_DSP1_INTPCTL_RES_DYN: - case CS35L41_DSP1_INTPCTL_NMI_CTRL: - case CS35L41_DSP1_INTPCTL_IRQ_INV: - case CS35L41_DSP1_INTPCTL_IRQ_MODE: - case CS35L41_DSP1_INTPCTL_IRQ_EN: - case CS35L41_DSP1_INTPCTL_IRQ_MSK: - case CS35L41_DSP1_INTPCTL_IRQ_ERR: - case CS35L41_DSP1_INTPCTL_IRQ_PEND: - case CS35L41_DSP1_INTPCTL_TESTBITS: - case CS35L41_DSP1_WDT_CONTROL: - case CS35L41_DSP1_WDT_STATUS: - case CS35L41_OTP_TRIM_1: - case CS35L41_OTP_TRIM_2: - case CS35L41_OTP_TRIM_3: - case CS35L41_OTP_TRIM_4: - case CS35L41_OTP_TRIM_5: - case CS35L41_OTP_TRIM_6: - case CS35L41_OTP_TRIM_7: - case CS35L41_OTP_TRIM_8: - case CS35L41_OTP_TRIM_9: - case CS35L41_OTP_TRIM_10: - case CS35L41_OTP_TRIM_11: - case CS35L41_OTP_TRIM_12: - case CS35L41_OTP_TRIM_13: - case CS35L41_OTP_TRIM_14: - case CS35L41_OTP_TRIM_15: - case CS35L41_OTP_TRIM_16: - case CS35L41_OTP_TRIM_17: - case CS35L41_OTP_TRIM_18: - case CS35L41_OTP_TRIM_19: - case CS35L41_OTP_TRIM_20: - case CS35L41_OTP_TRIM_21: - case CS35L41_OTP_TRIM_22: - case CS35L41_OTP_TRIM_23: - case CS35L41_OTP_TRIM_24: - case CS35L41_OTP_TRIM_25: - case CS35L41_OTP_TRIM_26: - case CS35L41_OTP_TRIM_27: - case CS35L41_OTP_TRIM_28: - case CS35L41_OTP_TRIM_29: - case CS35L41_OTP_TRIM_30: - case CS35L41_OTP_TRIM_31: - case CS35L41_OTP_TRIM_32: - case CS35L41_OTP_TRIM_33: - case CS35L41_OTP_TRIM_34: - case CS35L41_OTP_TRIM_35: - case CS35L41_OTP_TRIM_36: - case CS35L41_OTP_MEM0 ... CS35L41_OTP_MEM31: - case CS35L41_DSP1_XMEM_PACK_0 ... CS35L41_DSP1_XMEM_PACK_3068: - case CS35L41_DSP1_XMEM_UNPACK32_0 ... CS35L41_DSP1_XMEM_UNPACK32_2046: - case CS35L41_DSP1_XMEM_UNPACK24_0 ... CS35L41_DSP1_XMEM_UNPACK24_4093: - case CS35L41_DSP1_YMEM_PACK_0 ... CS35L41_DSP1_YMEM_PACK_1532: - case CS35L41_DSP1_YMEM_UNPACK32_0 ... CS35L41_DSP1_YMEM_UNPACK32_1022: - case CS35L41_DSP1_YMEM_UNPACK24_0 ... CS35L41_DSP1_YMEM_UNPACK24_2045: - case CS35L41_DSP1_PMEM_0 ... CS35L41_DSP1_PMEM_5114: - /*test regs*/ - case CS35L41_PLL_OVR: - case CS35L41_BST_TEST_DUTY: - case CS35L41_DIGPWM_IOCTRL: - return true; - default: - return false; - } -} - -bool cs35l41_precious_reg(struct device *dev, unsigned int reg) -{ - switch (reg) { - case CS35L41_OTP_MEM0 ... CS35L41_OTP_MEM31: - return true; - default: - return false; - } -} - -bool cs35l41_volatile_reg(struct device *dev, unsigned int reg) -{ - switch (reg) { - case CS35L41_DEVID: - case CS35L41_SFT_RESET: - case CS35L41_FABID: - case CS35L41_REVID: - case CS35L41_PWR_CTRL1: - case CS35L41_DTEMP_EN: - case CS35L41_IRQ1_STATUS: - case CS35L41_IRQ1_STATUS1: - case CS35L41_IRQ1_STATUS2: - case CS35L41_IRQ1_STATUS3: - case CS35L41_IRQ1_STATUS4: - case CS35L41_IRQ1_RAW_STATUS1: - case CS35L41_IRQ1_RAW_STATUS2: - case CS35L41_IRQ1_RAW_STATUS3: - case CS35L41_IRQ1_RAW_STATUS4: - case CS35L41_IRQ1_FRC1: - case CS35L41_IRQ1_FRC2: - case CS35L41_IRQ1_FRC3: - case CS35L41_IRQ1_FRC4: - case CS35L41_IRQ1_EDGE1: - case CS35L41_IRQ1_EDGE4: - case CS35L41_IRQ1_POL1: - case CS35L41_IRQ1_POL2: - case CS35L41_IRQ1_POL3: - case CS35L41_IRQ1_POL4: - case CS35L41_IRQ1_DB3: - case CS35L41_IRQ2_STATUS: - case CS35L41_IRQ2_STATUS1: - case CS35L41_IRQ2_STATUS2: - case CS35L41_IRQ2_STATUS3: - case CS35L41_IRQ2_STATUS4: - case CS35L41_IRQ2_RAW_STATUS1: - case CS35L41_IRQ2_RAW_STATUS2: - case CS35L41_IRQ2_RAW_STATUS3: - case CS35L41_IRQ2_RAW_STATUS4: - case CS35L41_IRQ2_FRC1: - case CS35L41_IRQ2_FRC2: - case CS35L41_IRQ2_FRC3: - case CS35L41_IRQ2_FRC4: - case CS35L41_IRQ2_EDGE1: - case CS35L41_IRQ2_EDGE4: - case CS35L41_IRQ2_POL1: - case CS35L41_IRQ2_POL2: - case CS35L41_IRQ2_POL3: - case CS35L41_IRQ2_POL4: - case CS35L41_IRQ2_DB3: - case CS35L41_GPIO_STATUS1: - case CS35L41_OTP_TRIM_1: - case CS35L41_OTP_TRIM_2: - case CS35L41_OTP_TRIM_3: - case CS35L41_OTP_TRIM_4: - case CS35L41_OTP_TRIM_5: - case CS35L41_OTP_TRIM_6: - case CS35L41_OTP_TRIM_7: - case CS35L41_OTP_TRIM_8: - case CS35L41_OTP_TRIM_9: - case CS35L41_OTP_TRIM_10: - case CS35L41_OTP_TRIM_11: - case CS35L41_OTP_TRIM_12: - case CS35L41_OTP_TRIM_13: - case CS35L41_OTP_TRIM_14: - case CS35L41_OTP_TRIM_15: - case CS35L41_OTP_TRIM_16: - case CS35L41_OTP_TRIM_17: - case CS35L41_OTP_TRIM_18: - case CS35L41_OTP_TRIM_19: - case CS35L41_OTP_TRIM_20: - case CS35L41_OTP_TRIM_21: - case CS35L41_OTP_TRIM_22: - case CS35L41_OTP_TRIM_23: - case CS35L41_OTP_TRIM_24: - case CS35L41_OTP_TRIM_25: - case CS35L41_OTP_TRIM_26: - case CS35L41_OTP_TRIM_27: - case CS35L41_OTP_TRIM_28: - case CS35L41_OTP_TRIM_29: - case CS35L41_OTP_TRIM_30: - case CS35L41_OTP_TRIM_31: - case CS35L41_OTP_TRIM_32: - case CS35L41_OTP_TRIM_33: - case CS35L41_OTP_TRIM_34: - case CS35L41_OTP_TRIM_35: - case CS35L41_OTP_TRIM_36: - case CS35L41_DSP_MBOX_1 ... CS35L41_DSP_VIRT2_MBOX_8: - case CS35L41_DSP1_XMEM_PACK_0 ... CS35L41_DSP1_XMEM_PACK_3068: - case CS35L41_DSP1_XMEM_UNPACK32_0 ... CS35L41_DSP1_XMEM_UNPACK32_2046: - case CS35L41_DSP1_XMEM_UNPACK24_0 ... CS35L41_DSP1_XMEM_UNPACK24_4093: - case CS35L41_DSP1_YMEM_PACK_0 ... CS35L41_DSP1_YMEM_PACK_1532: - case CS35L41_DSP1_YMEM_UNPACK32_0 ... CS35L41_DSP1_YMEM_UNPACK32_1022: - case CS35L41_DSP1_YMEM_UNPACK24_0 ... CS35L41_DSP1_YMEM_UNPACK24_2045: - case CS35L41_DSP1_PMEM_0 ... CS35L41_DSP1_PMEM_5114: - case CS35L41_DSP1_CCM_CORE_CTRL ... CS35L41_DSP1_WDT_STATUS: - case CS35L41_OTP_MEM0 ... CS35L41_OTP_MEM31: - return true; - default: - return false; - } -} - -static const struct cs35l41_otp_packed_element_t - otp_map_1[CS35L41_NUM_OTP_ELEM] = { - /* addr shift size */ - {0x00002030, 0, 4}, /*TRIM_OSC_FREQ_TRIM*/ - {0x00002030, 7, 1}, /*TRIM_OSC_TRIM_DONE*/ - {0x0000208c, 24, 6}, /*TST_DIGREG_VREF_TRIM*/ - {0x00002090, 14, 4}, /*TST_REF_TRIM*/ - {0x00002090, 10, 4}, /*TST_REF_TEMPCO_TRIM*/ - {0x0000300C, 11, 4}, /*PLL_LDOA_TST_VREF_TRIM*/ - {0x0000394C, 23, 2}, /*BST_ATEST_CM_VOFF*/ - {0x00003950, 0, 7}, /*BST_ATRIM_IADC_OFFSET*/ - {0x00003950, 8, 7}, /*BST_ATRIM_IADC_GAIN1*/ - {0x00003950, 16, 8}, /*BST_ATRIM_IPKCOMP_OFFSET1*/ - {0x00003950, 24, 8}, /*BST_ATRIM_IPKCOMP_GAIN1*/ - {0x00003954, 0, 7}, /*BST_ATRIM_IADC_OFFSET2*/ - {0x00003954, 8, 7}, /*BST_ATRIM_IADC_GAIN2*/ - {0x00003954, 16, 8}, /*BST_ATRIM_IPKCOMP_OFFSET2*/ - {0x00003954, 24, 8}, /*BST_ATRIM_IPKCOMP_GAIN2*/ - {0x00003958, 0, 7}, /*BST_ATRIM_IADC_OFFSET3*/ - {0x00003958, 8, 7}, /*BST_ATRIM_IADC_GAIN3*/ - {0x00003958, 16, 8}, /*BST_ATRIM_IPKCOMP_OFFSET3*/ - {0x00003958, 24, 8}, /*BST_ATRIM_IPKCOMP_GAIN3*/ - {0x0000395C, 0, 7}, /*BST_ATRIM_IADC_OFFSET4*/ - {0x0000395C, 8, 7}, /*BST_ATRIM_IADC_GAIN4*/ - {0x0000395C, 16, 8}, /*BST_ATRIM_IPKCOMP_OFFSET4*/ - {0x0000395C, 24, 8}, /*BST_ATRIM_IPKCOMP_GAIN4*/ - {0x0000416C, 0, 8}, /*VMON_GAIN_OTP_VAL*/ - {0x00004160, 0, 7}, /*VMON_OFFSET_OTP_VAL*/ - {0x0000416C, 8, 8}, /*IMON_GAIN_OTP_VAL*/ - {0x00004160, 16, 10}, /*IMON_OFFSET_OTP_VAL*/ - {0x0000416C, 16, 12}, /*VMON_CM_GAIN_OTP_VAL*/ - {0x0000416C, 28, 1}, /*VMON_CM_GAIN_SIGN_OTP_VAL*/ - {0x00004170, 0, 6}, /*IMON_CAL_TEMPCO_OTP_VAL*/ - {0x00004170, 6, 1}, /*IMON_CAL_TEMPCO_SIGN_OTP*/ - {0x00004170, 8, 6}, /*IMON_CAL_TEMPCO2_OTP_VAL*/ - {0x00004170, 14, 1}, /*IMON_CAL_TEMPCO2_DN_UPB_OTP_VAL*/ - {0x00004170, 16, 9}, /*IMON_CAL_TEMPCO_TBASE_OTP_VAL*/ - {0x00004360, 0, 5}, /*TEMP_GAIN_OTP_VAL*/ - {0x00004360, 6, 9}, /*TEMP_OFFSET_OTP_VAL*/ - {0x00004448, 0, 8}, /*VP_SARADC_OFFSET*/ - {0x00004448, 8, 8}, /*VP_GAIN_INDEX*/ - {0x00004448, 16, 8}, /*VBST_SARADC_OFFSET*/ - {0x00004448, 24, 8}, /*VBST_GAIN_INDEX*/ - {0x0000444C, 0, 3}, /*ANA_SELINVREF*/ - {0x00006E30, 0, 5}, /*GAIN_ERR_COEFF_0*/ - {0x00006E30, 8, 5}, /*GAIN_ERR_COEFF_1*/ - {0x00006E30, 16, 5}, /*GAIN_ERR_COEFF_2*/ - {0x00006E30, 24, 5}, /*GAIN_ERR_COEFF_3*/ - {0x00006E34, 0, 5}, /*GAIN_ERR_COEFF_4*/ - {0x00006E34, 8, 5}, /*GAIN_ERR_COEFF_5*/ - {0x00006E34, 16, 5}, /*GAIN_ERR_COEFF_6*/ - {0x00006E34, 24, 5}, /*GAIN_ERR_COEFF_7*/ - {0x00006E38, 0, 5}, /*GAIN_ERR_COEFF_8*/ - {0x00006E38, 8, 5}, /*GAIN_ERR_COEFF_9*/ - {0x00006E38, 16, 5}, /*GAIN_ERR_COEFF_10*/ - {0x00006E38, 24, 5}, /*GAIN_ERR_COEFF_11*/ - {0x00006E3C, 0, 5}, /*GAIN_ERR_COEFF_12*/ - {0x00006E3C, 8, 5}, /*GAIN_ERR_COEFF_13*/ - {0x00006E3C, 16, 5}, /*GAIN_ERR_COEFF_14*/ - {0x00006E3C, 24, 5}, /*GAIN_ERR_COEFF_15*/ - {0x00006E40, 0, 5}, /*GAIN_ERR_COEFF_16*/ - {0x00006E40, 8, 5}, /*GAIN_ERR_COEFF_17*/ - {0x00006E40, 16, 5}, /*GAIN_ERR_COEFF_18*/ - {0x00006E40, 24, 5}, /*GAIN_ERR_COEFF_19*/ - {0x00006E44, 0, 5}, /*GAIN_ERR_COEFF_20*/ - {0x00006E48, 0, 10}, /*VOFF_GAIN_0*/ - {0x00006E48, 10, 10}, /*VOFF_GAIN_1*/ - {0x00006E48, 20, 10}, /*VOFF_GAIN_2*/ - {0x00006E4C, 0, 10}, /*VOFF_GAIN_3*/ - {0x00006E4C, 10, 10}, /*VOFF_GAIN_4*/ - {0x00006E4C, 20, 10}, /*VOFF_GAIN_5*/ - {0x00006E50, 0, 10}, /*VOFF_GAIN_6*/ - {0x00006E50, 10, 10}, /*VOFF_GAIN_7*/ - {0x00006E50, 20, 10}, /*VOFF_GAIN_8*/ - {0x00006E54, 0, 10}, /*VOFF_GAIN_9*/ - {0x00006E54, 10, 10}, /*VOFF_GAIN_10*/ - {0x00006E54, 20, 10}, /*VOFF_GAIN_11*/ - {0x00006E58, 0, 10}, /*VOFF_GAIN_12*/ - {0x00006E58, 10, 10}, /*VOFF_GAIN_13*/ - {0x00006E58, 20, 10}, /*VOFF_GAIN_14*/ - {0x00006E5C, 0, 10}, /*VOFF_GAIN_15*/ - {0x00006E5C, 10, 10}, /*VOFF_GAIN_16*/ - {0x00006E5C, 20, 10}, /*VOFF_GAIN_17*/ - {0x00006E60, 0, 10}, /*VOFF_GAIN_18*/ - {0x00006E60, 10, 10}, /*VOFF_GAIN_19*/ - {0x00006E60, 20, 10}, /*VOFF_GAIN_20*/ - {0x00006E64, 0, 10}, /*VOFF_INT1*/ - {0x00007418, 7, 5}, /*DS_SPK_INT1_CAP_TRIM*/ - {0x0000741C, 0, 5}, /*DS_SPK_INT2_CAP_TRIM*/ - {0x0000741C, 11, 4}, /*DS_SPK_LPF_CAP_TRIM*/ - {0x0000741C, 19, 4}, /*DS_SPK_QUAN_CAP_TRIM*/ - {0x00007434, 17, 1}, /*FORCE_CAL*/ - {0x00007434, 18, 7}, /*CAL_OVERRIDE*/ - {0x00007068, 0, 9}, /*MODIX*/ - {0x0000410C, 7, 1}, /*VIMON_DLY_NOT_COMB*/ - {0x0000400C, 0, 7}, /*VIMON_DLY*/ - {0x00000000, 0, 1}, /*extra bit*/ - {0x00017040, 0, 8}, /*X_COORDINATE*/ - {0x00017040, 8, 8}, /*Y_COORDINATE*/ - {0x00017040, 16, 8}, /*WAFER_ID*/ - {0x00017040, 24, 8}, /*DVS*/ - {0x00017044, 0, 24}, /*LOT_NUMBER*/ -}; - -static const struct cs35l41_otp_packed_element_t - otp_map_2[CS35L41_NUM_OTP_ELEM] = { - /* addr shift size */ - {0x00002030, 0, 4}, /*TRIM_OSC_FREQ_TRIM*/ - {0x00002030, 7, 1}, /*TRIM_OSC_TRIM_DONE*/ - {0x0000208c, 24, 6}, /*TST_DIGREG_VREF_TRIM*/ - {0x00002090, 14, 4}, /*TST_REF_TRIM*/ - {0x00002090, 10, 4}, /*TST_REF_TEMPCO_TRIM*/ - {0x0000300C, 11, 4}, /*PLL_LDOA_TST_VREF_TRIM*/ - {0x0000394C, 23, 2}, /*BST_ATEST_CM_VOFF*/ - {0x00003950, 0, 7}, /*BST_ATRIM_IADC_OFFSET*/ - {0x00003950, 8, 7}, /*BST_ATRIM_IADC_GAIN1*/ - {0x00003950, 16, 8}, /*BST_ATRIM_IPKCOMP_OFFSET1*/ - {0x00003950, 24, 8}, /*BST_ATRIM_IPKCOMP_GAIN1*/ - {0x00003954, 0, 7}, /*BST_ATRIM_IADC_OFFSET2*/ - {0x00003954, 8, 7}, /*BST_ATRIM_IADC_GAIN2*/ - {0x00003954, 16, 8}, /*BST_ATRIM_IPKCOMP_OFFSET2*/ - {0x00003954, 24, 8}, /*BST_ATRIM_IPKCOMP_GAIN2*/ - {0x00003958, 0, 7}, /*BST_ATRIM_IADC_OFFSET3*/ - {0x00003958, 8, 7}, /*BST_ATRIM_IADC_GAIN3*/ - {0x00003958, 16, 8}, /*BST_ATRIM_IPKCOMP_OFFSET3*/ - {0x00003958, 24, 8}, /*BST_ATRIM_IPKCOMP_GAIN3*/ - {0x0000395C, 0, 7}, /*BST_ATRIM_IADC_OFFSET4*/ - {0x0000395C, 8, 7}, /*BST_ATRIM_IADC_GAIN4*/ - {0x0000395C, 16, 8}, /*BST_ATRIM_IPKCOMP_OFFSET4*/ - {0x0000395C, 24, 8}, /*BST_ATRIM_IPKCOMP_GAIN4*/ - {0x0000416C, 0, 8}, /*VMON_GAIN_OTP_VAL*/ - {0x00004160, 0, 7}, /*VMON_OFFSET_OTP_VAL*/ - {0x0000416C, 8, 8}, /*IMON_GAIN_OTP_VAL*/ - {0x00004160, 16, 10}, /*IMON_OFFSET_OTP_VAL*/ - {0x0000416C, 16, 12}, /*VMON_CM_GAIN_OTP_VAL*/ - {0x0000416C, 28, 1}, /*VMON_CM_GAIN_SIGN_OTP_VAL*/ - {0x00004170, 0, 6}, /*IMON_CAL_TEMPCO_OTP_VAL*/ - {0x00004170, 6, 1}, /*IMON_CAL_TEMPCO_SIGN_OTP*/ - {0x00004170, 8, 6}, /*IMON_CAL_TEMPCO2_OTP_VAL*/ - {0x00004170, 14, 1}, /*IMON_CAL_TEMPCO2_DN_UPB_OTP_VAL*/ - {0x00004170, 16, 9}, /*IMON_CAL_TEMPCO_TBASE_OTP_VAL*/ - {0x00004360, 0, 5}, /*TEMP_GAIN_OTP_VAL*/ - {0x00004360, 6, 9}, /*TEMP_OFFSET_OTP_VAL*/ - {0x00004448, 0, 8}, /*VP_SARADC_OFFSET*/ - {0x00004448, 8, 8}, /*VP_GAIN_INDEX*/ - {0x00004448, 16, 8}, /*VBST_SARADC_OFFSET*/ - {0x00004448, 24, 8}, /*VBST_GAIN_INDEX*/ - {0x0000444C, 0, 3}, /*ANA_SELINVREF*/ - {0x00006E30, 0, 5}, /*GAIN_ERR_COEFF_0*/ - {0x00006E30, 8, 5}, /*GAIN_ERR_COEFF_1*/ - {0x00006E30, 16, 5}, /*GAIN_ERR_COEFF_2*/ - {0x00006E30, 24, 5}, /*GAIN_ERR_COEFF_3*/ - {0x00006E34, 0, 5}, /*GAIN_ERR_COEFF_4*/ - {0x00006E34, 8, 5}, /*GAIN_ERR_COEFF_5*/ - {0x00006E34, 16, 5}, /*GAIN_ERR_COEFF_6*/ - {0x00006E34, 24, 5}, /*GAIN_ERR_COEFF_7*/ - {0x00006E38, 0, 5}, /*GAIN_ERR_COEFF_8*/ - {0x00006E38, 8, 5}, /*GAIN_ERR_COEFF_9*/ - {0x00006E38, 16, 5}, /*GAIN_ERR_COEFF_10*/ - {0x00006E38, 24, 5}, /*GAIN_ERR_COEFF_11*/ - {0x00006E3C, 0, 5}, /*GAIN_ERR_COEFF_12*/ - {0x00006E3C, 8, 5}, /*GAIN_ERR_COEFF_13*/ - {0x00006E3C, 16, 5}, /*GAIN_ERR_COEFF_14*/ - {0x00006E3C, 24, 5}, /*GAIN_ERR_COEFF_15*/ - {0x00006E40, 0, 5}, /*GAIN_ERR_COEFF_16*/ - {0x00006E40, 8, 5}, /*GAIN_ERR_COEFF_17*/ - {0x00006E40, 16, 5}, /*GAIN_ERR_COEFF_18*/ - {0x00006E40, 24, 5}, /*GAIN_ERR_COEFF_19*/ - {0x00006E44, 0, 5}, /*GAIN_ERR_COEFF_20*/ - {0x00006E48, 0, 10}, /*VOFF_GAIN_0*/ - {0x00006E48, 10, 10}, /*VOFF_GAIN_1*/ - {0x00006E48, 20, 10}, /*VOFF_GAIN_2*/ - {0x00006E4C, 0, 10}, /*VOFF_GAIN_3*/ - {0x00006E4C, 10, 10}, /*VOFF_GAIN_4*/ - {0x00006E4C, 20, 10}, /*VOFF_GAIN_5*/ - {0x00006E50, 0, 10}, /*VOFF_GAIN_6*/ - {0x00006E50, 10, 10}, /*VOFF_GAIN_7*/ - {0x00006E50, 20, 10}, /*VOFF_GAIN_8*/ - {0x00006E54, 0, 10}, /*VOFF_GAIN_9*/ - {0x00006E54, 10, 10}, /*VOFF_GAIN_10*/ - {0x00006E54, 20, 10}, /*VOFF_GAIN_11*/ - {0x00006E58, 0, 10}, /*VOFF_GAIN_12*/ - {0x00006E58, 10, 10}, /*VOFF_GAIN_13*/ - {0x00006E58, 20, 10}, /*VOFF_GAIN_14*/ - {0x00006E5C, 0, 10}, /*VOFF_GAIN_15*/ - {0x00006E5C, 10, 10}, /*VOFF_GAIN_16*/ - {0x00006E5C, 20, 10}, /*VOFF_GAIN_17*/ - {0x00006E60, 0, 10}, /*VOFF_GAIN_18*/ - {0x00006E60, 10, 10}, /*VOFF_GAIN_19*/ - {0x00006E60, 20, 10}, /*VOFF_GAIN_20*/ - {0x00006E64, 0, 10}, /*VOFF_INT1*/ - {0x00007418, 7, 5}, /*DS_SPK_INT1_CAP_TRIM*/ - {0x0000741C, 0, 5}, /*DS_SPK_INT2_CAP_TRIM*/ - {0x0000741C, 11, 4}, /*DS_SPK_LPF_CAP_TRIM*/ - {0x0000741C, 19, 4}, /*DS_SPK_QUAN_CAP_TRIM*/ - {0x00007434, 17, 1}, /*FORCE_CAL*/ - {0x00007434, 18, 7}, /*CAL_OVERRIDE*/ - {0x00007068, 0, 9}, /*MODIX*/ - {0x0000410C, 7, 1}, /*VIMON_DLY_NOT_COMB*/ - {0x0000400C, 0, 7}, /*VIMON_DLY*/ - {0x00004000, 11, 1}, /*VMON_POL*/ - {0x00017040, 0, 8}, /*X_COORDINATE*/ - {0x00017040, 8, 8}, /*Y_COORDINATE*/ - {0x00017040, 16, 8}, /*WAFER_ID*/ - {0x00017040, 24, 8}, /*DVS*/ - {0x00017044, 0, 24}, /*LOT_NUMBER*/ -}; - -const struct cs35l41_otp_map_element_t - cs35l41_otp_map_map[CS35L41_NUM_OTP_MAPS] = { - { - .id = 0x01, - .map = otp_map_1, - .num_elements = CS35L41_NUM_OTP_ELEM, - .bit_offset = 16, - .word_offset = 2, - }, - { - .id = 0x02, - .map = otp_map_2, - .num_elements = CS35L41_NUM_OTP_ELEM, - .bit_offset = 16, - .word_offset = 2, - }, - { - .id = 0x03, - .map = otp_map_2, - .num_elements = CS35L41_NUM_OTP_ELEM, - .bit_offset = 16, - .word_offset = 2, - }, - { - .id = 0x06, - .map = otp_map_2, - .num_elements = CS35L41_NUM_OTP_ELEM, - .bit_offset = 16, - .word_offset = 2, - }, -}; diff --git a/sound/soc/codecs/cs35l41.c b/sound/soc/codecs/cs35l41.c deleted file mode 100644 index ce6f6a3571f6..000000000000 --- a/sound/soc/codecs/cs35l41.c +++ /dev/null @@ -1,2072 +0,0 @@ -/* - * cs35l41.c -- CS35l41 ALSA SoC audio driver - * - * Copyright 2018 Cirrus Logic, Inc. - * - * Author: David Rhodes - * Brian Austin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "wm_adsp.h" -#include "cs35l41.h" -#include - -static const char * const cs35l41_supplies[] = { - "VA", - "VP", -}; - -struct cs35l41_pll_sysclk_config { - int freq; - int clk_cfg; -}; - -static const struct cs35l41_pll_sysclk_config cs35l41_pll_sysclk[] = { - { 32768, 0x00 }, - { 8000, 0x01 }, - { 11025, 0x02 }, - { 12000, 0x03 }, - { 16000, 0x04 }, - { 22050, 0x05 }, - { 24000, 0x06 }, - { 32000, 0x07 }, - { 44100, 0x08 }, - { 48000, 0x09 }, - { 88200, 0x0A }, - { 96000, 0x0B }, - { 128000, 0x0C }, - { 176400, 0x0D }, - { 192000, 0x0E }, - { 256000, 0x0F }, - { 352800, 0x10 }, - { 384000, 0x11 }, - { 512000, 0x12 }, - { 705600, 0x13 }, - { 750000, 0x14 }, - { 768000, 0x15 }, - { 1000000, 0x16 }, - { 1024000, 0x17 }, - { 1200000, 0x18 }, - { 1411200, 0x19 }, - { 1500000, 0x1A }, - { 1536000, 0x1B }, - { 2000000, 0x1C }, - { 2048000, 0x1D }, - { 2400000, 0x1E }, - { 2822400, 0x1F }, - { 3000000, 0x20 }, - { 3072000, 0x21 }, - { 3200000, 0x22 }, - { 4000000, 0x23 }, - { 4096000, 0x24 }, - { 4800000, 0x25 }, - { 5644800, 0x26 }, - { 6000000, 0x27 }, - { 6144000, 0x28 }, - { 6250000, 0x29 }, - { 6400000, 0x2A }, - { 6500000, 0x2B }, - { 6750000, 0x2C }, - { 7526400, 0x2D }, - { 8000000, 0x2E }, - { 8192000, 0x2F }, - { 9600000, 0x30 }, - { 11289600, 0x31 }, - { 12000000, 0x32 }, - { 12288000, 0x33 }, - { 12500000, 0x34 }, - { 12800000, 0x35 }, - { 13000000, 0x36 }, - { 13500000, 0x37 }, - { 19200000, 0x38 }, - { 22579200, 0x39 }, - { 24000000, 0x3A }, - { 24576000, 0x3B }, - { 25000000, 0x3C }, - { 25600000, 0x3D }, - { 26000000, 0x3E }, - { 27000000, 0x3F }, -}; - -static const unsigned char cs35l41_bst_k1_table[4][5] = { - {0x24, 0x32, 0x32, 0x4F, 0x57}, - {0x24, 0x32, 0x32, 0x4F, 0x57}, - {0x40, 0x32, 0x32, 0x4F, 0x57}, - {0x40, 0x32, 0x32, 0x4F, 0x57} -}; - -static const unsigned char cs35l41_bst_k2_table[4][5] = { - {0x24, 0x49, 0x66, 0xA3, 0xEA}, - {0x24, 0x49, 0x66, 0xA3, 0xEA}, - {0x48, 0x49, 0x66, 0xA3, 0xEA}, - {0x48, 0x49, 0x66, 0xA3, 0xEA} -}; - -static const unsigned char cs35l41_bst_slope_table[4] = { - 0x75, 0x6B, 0x3B, 0x28}; - -static int cs35l41_dsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - if (cs35l41->halo_booted == false) - wm_halo_early_event(w, kcontrol, event); - else - cs35l41->dsp.booted = true; - - return 0; - case SND_SOC_DAPM_PRE_PMD: - if (cs35l41->halo_booted == false) { - wm_halo_early_event(w, kcontrol, event); - wm_halo_event(w, kcontrol, event); - } - default: - return 0; - } -} - -static int cs35l41_dsp_load_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - if (cs35l41->halo_booted == false) { - wm_halo_event(w, kcontrol, event); - cs35l41->halo_booted = true; - } - default: - return 0; - } -} - -static int cs35l41_halo_booted_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - - ucontrol->value.integer.value[0] = cs35l41->halo_booted; - - return 0; -} - -static int cs35l41_halo_booted_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - - cs35l41->halo_booted = ucontrol->value.integer.value[0]; - - return 0; -} - -static int cs35l41_gpi_glob_en_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - - ucontrol->value.integer.value[0] = cs35l41->gpi_glob_en; - - return 0; -} - -static int cs35l41_gpi_glob_en_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - - cs35l41->gpi_glob_en = ucontrol->value.integer.value[0]; - - if (cs35l41->halo_booted && cs35l41->enabled) - regmap_write(cs35l41->regmap, CS35L41_DSP_VIRT1_MBOX_8, - cs35l41->gpi_glob_en); - - return 0; -} - -static const DECLARE_TLV_DB_RANGE(dig_vol_tlv, - 0, 0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), - 1, 913, TLV_DB_SCALE_ITEM(-10200, 25, 0)); -static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 0, 1, 1); - -static const struct snd_kcontrol_new dre_ctrl = - SOC_DAPM_SINGLE("DRE Switch", CS35L41_PWR_CTRL3, 20, 1, 0); - -static const char * const cs35l41_pcm_sftramp_text[] = { - "Off", ".5ms", "1ms", "2ms", "4ms", "8ms", "15ms", "30ms"}; - -static SOC_ENUM_SINGLE_DECL(pcm_sft_ramp, - CS35L41_AMP_DIG_VOL_CTRL, 0, - cs35l41_pcm_sftramp_text); - -static const char * const cs35l41_cspl_cmd_text[] = { - "CSPL_MBOX_CMD_RESUME", - "CSPL_MBOX_CMD_REINIT", - "CSPL_MBOX_CMD_STOP_PRE_REINIT", -}; - -static const unsigned int cs35l41_cspl_cmd_val[] = { - (unsigned int)CSPL_MBOX_CMD_RESUME, - (unsigned int)CSPL_MBOX_CMD_REINIT, - (unsigned int)CSPL_MBOX_CMD_STOP_PRE_REINIT, -}; - -static SOC_VALUE_ENUM_SINGLE_DECL(cs35l41_cspl_cmd, SND_SOC_NOPM, 0, 0, - cs35l41_cspl_cmd_text, cs35l41_cspl_cmd_val); - -static bool cs35l41_is_csplmboxsts_correct(enum cs35l41_cspl_mboxcmd cmd, - enum cs35l41_cspl_mboxstate sts) -{ - switch (cmd) { - case CSPL_MBOX_CMD_NONE: - case CSPL_MBOX_CMD_UNKNOWN_CMD: - return true; - case CSPL_MBOX_CMD_PAUSE: - return (sts == CSPL_MBOX_STS_PAUSED); - case CSPL_MBOX_CMD_RESUME: - return (sts == CSPL_MBOX_STS_RUNNING); - case CSPL_MBOX_CMD_REINIT: - return (sts == CSPL_MBOX_STS_RUNNING); - case CSPL_MBOX_CMD_STOP_PRE_REINIT: - return (sts == CSPL_MBOX_STS_RDY_FOR_REINIT); - default: - return false; - } -} - -static int cs35l41_set_csplmboxcmd(struct cs35l41_private *cs35l41, - enum cs35l41_cspl_mboxcmd cmd) -{ - int ret = 0; - unsigned int sts, i; - bool ack = false; - - /* Reset DSP sticky bit */ - regmap_write(cs35l41->regmap, CS35L41_IRQ2_STATUS2, - 1 << CS35L41_CSPL_MBOX_CMD_DRV_SHIFT); - - /* Reset AP sticky bit */ - regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS2, - 1 << CS35L41_CSPL_MBOX_CMD_FW_SHIFT); - - /* - * Set mailbox cmd - */ - - /* Unmask DSP INT */ - regmap_update_bits(cs35l41->regmap, CS35L41_IRQ2_MASK2, - 1 << CS35L41_CSPL_MBOX_CMD_DRV_SHIFT, 0); - regmap_write(cs35l41->regmap, CS35L41_CSPL_MBOX_CMD_DRV, cmd); - - /* Poll for DSP ACK */ - for (i = 0; i < 5; i++) { - usleep_range(1000, 1010); - regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS2, &sts); - if (sts & (1 << CS35L41_CSPL_MBOX_CMD_FW_SHIFT)) { - dev_dbg(cs35l41->dev, - "%u: Received ACK in EINT for mbox cmd (%d)\n", - i, cmd); - regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS2, - 1 << CS35L41_CSPL_MBOX_CMD_FW_SHIFT); - ack = true; - break; - } - } - - if (!ack) { - dev_err(cs35l41->dev, - "Timout waiting for DSP to set mbox cmd\n"); - ret = -ETIMEDOUT; - } - - /* Mask DSP INT */ - regmap_update_bits(cs35l41->regmap, CS35L41_IRQ2_MASK2, - 1 << CS35L41_CSPL_MBOX_CMD_DRV_SHIFT, - 1 << CS35L41_CSPL_MBOX_CMD_DRV_SHIFT); - - if (regmap_read(cs35l41->regmap, - CS35L41_CSPL_MBOX_STS, &sts) < 0) { - dev_err(cs35l41->dev, "Failed to read %u\n", - CS35L41_CSPL_MBOX_STS); - ret = -EACCES; - } - - if (!cs35l41_is_csplmboxsts_correct(cmd, - (enum cs35l41_cspl_mboxstate)sts)) { - dev_err(cs35l41->dev, - "Failed to set mailbox(cmd: %u, sts: %u)\n", cmd, sts); - ret = -ENOMSG; - } - - return ret; -} - -static int cs35l41_cspl_cmd_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - struct soc_enum *soc_enum; - unsigned int i = ucontrol->value.enumerated.item[0]; - - soc_enum = (struct soc_enum *)kcontrol->private_value; - - if (i >= soc_enum->items) { - dev_err(codec->dev, "Invalid mixer input (%u)\n", i); - return -EINVAL; - } - - cs35l41->cspl_cmd = soc_enum->values[i]; - - return 0; -} - -static int cs35l41_cspl_cmd_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - struct soc_enum *soc_enum; - unsigned int i; - int ret = 0; - - soc_enum = (struct soc_enum *)kcontrol->private_value; - - for (i = 0; i < soc_enum->items; i++) { - if (cs35l41->cspl_cmd == soc_enum->values[i]) - break; - } - - if (i >= soc_enum->items) { - /* Cannot find value */ - dev_err(cs35l41->dev, "Cannot find cspl cmd\n"); - i = 0; - ret = -EINVAL; - } - - ucontrol->value.enumerated.item[0] = i; - - return ret; -} - -static const char * const cs35l41_pcm_source_texts[] = {"ASP", "DSP"}; -static const unsigned int cs35l41_pcm_source_values[] = {0x08, 0x32}; -static SOC_VALUE_ENUM_SINGLE_DECL(cs35l41_pcm_source_enum, - CS35L41_DAC_PCM1_SRC, - 0, CS35L41_ASP_SOURCE_MASK, - cs35l41_pcm_source_texts, - cs35l41_pcm_source_values); - -static const struct snd_kcontrol_new pcm_source_mux = - SOC_DAPM_ENUM("PCM Source", cs35l41_pcm_source_enum); - -static const struct snd_kcontrol_new amp_enable_ctrl = - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0); - -static const char * const cs35l41_tx_input_texts[] = {"Zero", "ASPRX1", - "ASPRX2", "VMON", - "IMON", "VPMON", - "DSPTX1", "DSPTX2"}; -static const unsigned int cs35l41_tx_input_values[] = {0x00, - CS35L41_INPUT_SRC_ASPRX1, - CS35L41_INPUT_SRC_ASPRX2, - CS35L41_INPUT_SRC_VMON, - CS35L41_INPUT_SRC_IMON, - CS35L41_INPUT_SRC_VPMON, - CS35L41_INPUT_DSP_TX1, - CS35L41_INPUT_DSP_TX2}; - -static SOC_VALUE_ENUM_SINGLE_DECL(cs35l41_asptx1_enum, - CS35L41_ASP_TX1_SRC, - 0, CS35L41_ASP_SOURCE_MASK, - cs35l41_tx_input_texts, - cs35l41_tx_input_values); - -static const struct snd_kcontrol_new asp_tx1_mux = - SOC_DAPM_ENUM("ASPTX1 SRC", cs35l41_asptx1_enum); - -static SOC_VALUE_ENUM_SINGLE_DECL(cs35l41_asptx2_enum, - CS35L41_ASP_TX2_SRC, - 0, CS35L41_ASP_SOURCE_MASK, - cs35l41_tx_input_texts, - cs35l41_tx_input_values); - -static const struct snd_kcontrol_new asp_tx2_mux = - SOC_DAPM_ENUM("ASPTX2 SRC", cs35l41_asptx2_enum); - - -static SOC_VALUE_ENUM_SINGLE_DECL(cs35l41_asptx3_enum, - CS35L41_ASP_TX3_SRC, - 0, CS35L41_ASP_SOURCE_MASK, - cs35l41_tx_input_texts, - cs35l41_tx_input_values); - -static const struct snd_kcontrol_new asp_tx3_mux = - SOC_DAPM_ENUM("ASPTX3 SRC", cs35l41_asptx3_enum); - -static SOC_VALUE_ENUM_SINGLE_DECL(cs35l41_asptx4_enum, - CS35L41_ASP_TX4_SRC, - 0, CS35L41_ASP_SOURCE_MASK, - cs35l41_tx_input_texts, - cs35l41_tx_input_values); - -static const struct snd_kcontrol_new asp_tx4_mux = - SOC_DAPM_ENUM("ASPTX4 SRC", cs35l41_asptx4_enum); - -static const char * const cs35l41_DSP1_input_texts[] = {"Zero", "ASPRX1", - "ASPRX2", "VMON", - "IMON", "VPMON", - "DSPTX1", "DSPTX2"}; - -static const unsigned int cs35l41_DSP1_input_values[] = {0x00, - CS35L41_INPUT_SRC_ASPRX1, - CS35L41_INPUT_SRC_ASPRX2, - CS35L41_INPUT_SRC_VMON, - CS35L41_INPUT_SRC_IMON, - CS35L41_INPUT_SRC_VPMON, - CS35L41_INPUT_DSP_TX1, - CS35L41_INPUT_DSP_TX2}; - -static SOC_VALUE_ENUM_SINGLE_DECL(cs35l41_dsp1_input1_enum, - CS35L41_DSP1_RX1_SRC, - 0, CS35L41_ASP_SOURCE_MASK, - cs35l41_DSP1_input_texts, - cs35l41_DSP1_input_values); - -static SOC_VALUE_ENUM_SINGLE_DECL(cs35l41_dsp1_input2_enum, - CS35L41_DSP1_RX2_SRC, - 0, CS35L41_ASP_SOURCE_MASK, - cs35l41_DSP1_input_texts, - cs35l41_DSP1_input_values); - -static const struct snd_kcontrol_new dsp_intput1_mux = - SOC_DAPM_ENUM("DSP1 Input1 SRC", cs35l41_dsp1_input1_enum); - -static const struct snd_kcontrol_new dsp_intput2_mux = - SOC_DAPM_ENUM("DSP1 Input2 SRC", cs35l41_dsp1_input2_enum); - -static const char * const cs35l41_bst_en_text[] = {"On", "Bypass"}; -static const unsigned int cs35l41_bst_en_values[] = {CS35L41_BST_EN_DEFAULT, - CS35L41_BST_EN_BYPASS}; - -static SOC_VALUE_ENUM_SINGLE_DECL(bst_en_ctl, - CS35L41_PWR_CTRL2, - CS35L41_BST_EN_SHIFT, - CS35L41_BST_EN_MASK>>CS35L41_BST_EN_SHIFT, - cs35l41_bst_en_text, - cs35l41_bst_en_values); - -static const struct snd_kcontrol_new cs35l41_aud_controls[] = { - SOC_SINGLE_SX_TLV("Digital PCM Volume", CS35L41_AMP_DIG_VOL_CTRL, - 3, 0x4CF, 0x391, dig_vol_tlv), - SOC_SINGLE_TLV("AMP PCM Gain", CS35L41_AMP_GAIN_CTRL, 5, 0x14, 0, - amp_gain_tlv), - SOC_SINGLE_RANGE("ASPTX1 Slot Position", CS35L41_SP_FRAME_TX_SLOT, 0, - 0, 7, 0), - SOC_SINGLE_RANGE("ASPTX2 Slot Position", CS35L41_SP_FRAME_TX_SLOT, 8, - 0, 7, 0), - SOC_SINGLE_RANGE("ASPTX3 Slot Position", CS35L41_SP_FRAME_TX_SLOT, 16, - 0, 7, 0), - SOC_SINGLE_RANGE("ASPTX4 Slot Position", CS35L41_SP_FRAME_TX_SLOT, 24, - 0, 7, 0), - SOC_SINGLE_RANGE("ASPRX1 Slot Position", CS35L41_SP_FRAME_RX_SLOT, 0, - 0, 7, 0), - SOC_SINGLE_RANGE("ASPRX2 Slot Position", CS35L41_SP_FRAME_RX_SLOT, 8, - 0, 7, 0), - SOC_ENUM("PCM Soft Ramp", pcm_sft_ramp), - SOC_ENUM("Boost Enable", bst_en_ctl), - SOC_VALUE_ENUM_EXT("CSPL Command", cs35l41_cspl_cmd, - cs35l41_cspl_cmd_get, cs35l41_cspl_cmd_put), - SOC_SINGLE_EXT("DSP Booted", SND_SOC_NOPM, 0, 1, 0, - cs35l41_halo_booted_get, cs35l41_halo_booted_put), - SOC_SINGLE_EXT("GLOBAL_EN from GPIO", SND_SOC_NOPM, 0, 1, 0, - cs35l41_gpi_glob_en_get, cs35l41_gpi_glob_en_put), - WM_ADSP2_PRELOAD_SWITCH("DSP1", 1), -}; - -static const struct cs35l41_otp_map_element_t *cs35l41_find_otp_map(u32 otp_id) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(cs35l41_otp_map_map); i++) { - if (cs35l41_otp_map_map[i].id == otp_id) - return &cs35l41_otp_map_map[i]; - } - - return NULL; -} - -static int cs35l41_otp_unpack(void *data) -{ - struct cs35l41_private *cs35l41 = data; - u32 otp_mem[32]; - int i; - int bit_offset, word_offset; - unsigned int bit_sum = 8; - u32 otp_val, otp_id_reg; - const struct cs35l41_otp_map_element_t *otp_map_match; - const struct cs35l41_otp_packed_element_t *otp_map; - int ret; - struct spi_device *spi = NULL; - u32 orig_spi_freq = 0; - - ret = regmap_read(cs35l41->regmap, CS35L41_OTPID, &otp_id_reg); - if (ret < 0) { - dev_err(cs35l41->dev, "Read OTP ID failed\n"); - return -EINVAL; - } - - otp_map_match = cs35l41_find_otp_map(otp_id_reg); - - if (otp_map_match == NULL) { - dev_err(cs35l41->dev, "OTP Map matching ID %d not found\n", - otp_id_reg); - return -EINVAL; - } - - if (cs35l41->bus_spi) { - spi = to_spi_device(cs35l41->dev); - orig_spi_freq = spi->max_speed_hz; - spi->max_speed_hz = CS35L41_SPI_MAX_FREQ_OTP; - spi_setup(spi); - } - - ret = regmap_bulk_read(cs35l41->regmap, CS35L41_OTP_MEM0, otp_mem, - CS35L41_OTP_SIZE_WORDS); - if (ret < 0) { - dev_err(cs35l41->dev, "Read OTP Mem failed\n"); - return -EINVAL; - } - - if (cs35l41->bus_spi) { - spi->max_speed_hz = orig_spi_freq; - spi_setup(spi); - } - - otp_map = otp_map_match->map; - - bit_offset = otp_map_match->bit_offset; - word_offset = otp_map_match->word_offset; - - ret = regmap_write(cs35l41->regmap, CS35L41_TEST_KEY_CTL, 0x00000055); - if (ret < 0) { - dev_err(cs35l41->dev, "Write Unlock key failed 1/2\n"); - return -EINVAL; - } - ret = regmap_write(cs35l41->regmap, CS35L41_TEST_KEY_CTL, 0x000000AA); - if (ret < 0) { - dev_err(cs35l41->dev, "Write Unlock key failed 2/2\n"); - return -EINVAL; - } - - for (i = 0; i < otp_map_match->num_elements; i++) { - dev_dbg(cs35l41->dev, "bitoffset= %d, word_offset=%d, bit_sum mod 32=%d\n", - bit_offset, word_offset, bit_sum % 32); - if (bit_offset + otp_map[i].size - 1 >= 32) { - otp_val = (otp_mem[word_offset] & - GENMASK(31, bit_offset)) >> - bit_offset; - otp_val |= (otp_mem[++word_offset] & - GENMASK(bit_offset + - otp_map[i].size - 33, 0)) << - (32 - bit_offset); - bit_offset += otp_map[i].size - 32; - } else { - - otp_val = (otp_mem[word_offset] & - GENMASK(bit_offset + otp_map[i].size - 1, - bit_offset)) >> bit_offset; - bit_offset += otp_map[i].size; - } - bit_sum += otp_map[i].size; - - if (bit_offset == 32) { - bit_offset = 0; - word_offset++; - } - - if (otp_map[i].reg != 0) { - ret = regmap_update_bits(cs35l41->regmap, - otp_map[i].reg, - GENMASK(otp_map[i].shift + - otp_map[i].size - 1, - otp_map[i].shift), - otp_val << otp_map[i].shift); - if (ret < 0) { - dev_err(cs35l41->dev, "Write OTP val failed\n"); - return -EINVAL; - } - } - } - - ret = regmap_write(cs35l41->regmap, CS35L41_TEST_KEY_CTL, 0x000000CC); - if (ret < 0) { - dev_err(cs35l41->dev, "Write Lock key failed 1/2\n"); - return -EINVAL; - } - ret = regmap_write(cs35l41->regmap, CS35L41_TEST_KEY_CTL, 0x00000033); - if (ret < 0) { - dev_err(cs35l41->dev, "Write Lock key failed 2/2\n"); - return -EINVAL; - } - - return 0; -} - -static irqreturn_t cs35l41_irq(int irq, void *data) -{ - struct cs35l41_private *cs35l41 = data; - unsigned int status[4]; - unsigned int masks[4]; - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(status); i++) { - regmap_read(cs35l41->regmap, - CS35L41_IRQ1_STATUS1 + (i * CS35L41_REGSTRIDE), - &status[i]); - regmap_read(cs35l41->regmap, - CS35L41_IRQ1_MASK1 + (i * CS35L41_REGSTRIDE), - &masks[i]); - } - - /* Check to see if unmasked bits are active */ - if (!(status[0] & ~masks[0]) && !(status[1] & ~masks[1]) && - !(status[2] & ~masks[2]) && !(status[3] & ~masks[3])) - return IRQ_NONE; - - if (status[0] & CS35L41_PUP_DONE_MASK) { - regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS1, - CS35L41_PUP_DONE_MASK); - complete(&cs35l41->global_pup_done); - } - - if (status[0] & CS35L41_PDN_DONE_MASK) { - regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS1, - CS35L41_PDN_DONE_MASK); - complete(&cs35l41->global_pdn_done); - } - - /* - * The following interrupts require a - * protection release cycle to get the - * speaker out of Safe-Mode. - */ - if (status[0] & CS35L41_AMP_SHORT_ERR) { - dev_crit(cs35l41->dev, "Amp short error\n"); - regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS1, - CS35L41_AMP_SHORT_ERR); - regmap_write(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, 0); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_AMP_SHORT_ERR_RLS, - CS35L41_AMP_SHORT_ERR_RLS); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_AMP_SHORT_ERR_RLS, 0); - } - - if (status[0] & CS35L41_TEMP_WARN) { - dev_crit(cs35l41->dev, "Over temperature warning\n"); - regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS1, - CS35L41_TEMP_WARN); - regmap_write(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, 0); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_TEMP_WARN_ERR_RLS, - CS35L41_TEMP_WARN_ERR_RLS); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_TEMP_WARN_ERR_RLS, 0); - } - - if (status[0] & CS35L41_TEMP_ERR) { - dev_crit(cs35l41->dev, "Over temperature error\n"); - regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS1, - CS35L41_TEMP_ERR); - regmap_write(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, 0); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_TEMP_ERR_RLS, - CS35L41_TEMP_ERR_RLS); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_TEMP_ERR_RLS, 0); - } - - if (status[0] & CS35L41_BST_OVP_ERR) { - dev_crit(cs35l41->dev, "VBST Over Voltage error\n"); - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, - CS35L41_BST_EN_MASK, 0); - regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS1, - CS35L41_BST_OVP_ERR); - regmap_write(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, 0); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_BST_OVP_ERR_RLS, - CS35L41_BST_OVP_ERR_RLS); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_BST_OVP_ERR_RLS, 0); - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, - CS35L41_BST_EN_MASK, - CS35L41_BST_EN_DEFAULT << - CS35L41_BST_EN_SHIFT); - } - - if (status[0] & CS35L41_BST_DCM_UVP_ERR) { - dev_crit(cs35l41->dev, "DCM VBST Under Voltage Error\n"); - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, - CS35L41_BST_EN_MASK, 0); - regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS1, - CS35L41_BST_DCM_UVP_ERR); - regmap_write(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, 0); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_BST_UVP_ERR_RLS, - CS35L41_BST_UVP_ERR_RLS); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_BST_UVP_ERR_RLS, 0); - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, - CS35L41_BST_EN_MASK, - CS35L41_BST_EN_DEFAULT << - CS35L41_BST_EN_SHIFT); - } - - if (status[0] & CS35L41_BST_SHORT_ERR) { - dev_crit(cs35l41->dev, "LBST error: powering off!\n"); - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, - CS35L41_BST_EN_MASK, 0); - regmap_write(cs35l41->regmap, CS35L41_IRQ1_STATUS1, - CS35L41_BST_SHORT_ERR); - regmap_write(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, 0); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_BST_SHORT_ERR_RLS, - CS35L41_BST_SHORT_ERR_RLS); - regmap_update_bits(cs35l41->regmap, CS35L41_PROTECT_REL_ERR_IGN, - CS35L41_BST_SHORT_ERR_RLS, 0); - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, - CS35L41_BST_EN_MASK, - CS35L41_BST_EN_DEFAULT << - CS35L41_BST_EN_SHIFT); - } - - if (status[3] & CS35L41_OTP_BOOT_DONE) { - regmap_update_bits(cs35l41->regmap, CS35L41_IRQ1_MASK4, - CS35L41_OTP_BOOT_DONE, CS35L41_OTP_BOOT_DONE); - } - - return IRQ_HANDLED; -} - -static const struct reg_sequence cs35l41_pup_patch[] = { - {0x00000040, 0x00000055}, - {0x00000040, 0x000000AA}, - {0x00002084, 0x002F1AA0}, - {0x00000040, 0x000000CC}, - {0x00000040, 0x00000033}, -}; - -static const struct reg_sequence cs35l41_pdn_patch[] = { - {0x00000040, 0x00000055}, - {0x00000040, 0x000000AA}, - {0x00002084, 0x002F1AA3}, - {0x00000040, 0x000000CC}, - {0x00000040, 0x00000033}, -}; - -static int cs35l41_main_amp_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - int ret = 0; - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - regmap_multi_reg_write_bypassed(cs35l41->regmap, - cs35l41_pup_patch, - ARRAY_SIZE(cs35l41_pup_patch)); - - if (cs35l41->halo_booted) - /* - * Set GPIO-controlled GLOBAL_EN by firmware - * according to mixer setting - */ - regmap_write(cs35l41->regmap, CS35L41_DSP_VIRT1_MBOX_8, - cs35l41->gpi_glob_en); - - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL1, - CS35L41_GLOBAL_EN_MASK, - 1 << CS35L41_GLOBAL_EN_SHIFT); - - usleep_range(1000, 1100); - - if (cs35l41->halo_booted) { - if (cs35l41->cspl_cmd == CSPL_MBOX_CMD_STOP_PRE_REINIT) - /* Send this command on power down event */ - ret = cs35l41_set_csplmboxcmd(cs35l41, - CSPL_MBOX_CMD_RESUME); - else - ret = cs35l41_set_csplmboxcmd(cs35l41, - cs35l41->cspl_cmd); - } - regmap_update_bits(cs35l41->regmap, CS35L41_AMP_OUT_MUTE, - CS35L41_AMP_MUTE_MASK, 0); - cs35l41->enabled = true; - break; - case SND_SOC_DAPM_PRE_PMD: - regmap_update_bits(cs35l41->regmap, CS35L41_AMP_OUT_MUTE, - CS35L41_AMP_MUTE_MASK, CS35L41_AMP_MUTE_MASK); - break; - case SND_SOC_DAPM_POST_PMD: - if (cs35l41->halo_booted) { - if (cs35l41->cspl_cmd == CSPL_MBOX_CMD_STOP_PRE_REINIT) - ret = cs35l41_set_csplmboxcmd(cs35l41, - cs35l41->cspl_cmd); - else - ret = cs35l41_set_csplmboxcmd(cs35l41, - CSPL_MBOX_CMD_PAUSE); - - /* Disable GPIO-controlled GLOBAL_EN by firmware */ - regmap_write(cs35l41->regmap, - CS35L41_DSP_VIRT1_MBOX_8, 0); - } - - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL1, - CS35L41_GLOBAL_EN_MASK, 0); - - usleep_range(1000, 1100); - - regmap_multi_reg_write_bypassed(cs35l41->regmap, - cs35l41_pdn_patch, - ARRAY_SIZE(cs35l41_pdn_patch)); - cs35l41->enabled = false; - break; - default: - dev_err(codec->dev, "Invalid event = 0x%x\n", event); - ret = -EINVAL; - } - return ret; -} - -static const struct snd_soc_dapm_widget cs35l41_dapm_widgets[] = { - - SND_SOC_DAPM_SPK("DSP1 Preload", NULL), - SND_SOC_DAPM_SUPPLY_S("DSP1 Preloader", 100, - SND_SOC_NOPM, 0, 0, cs35l41_dsp_power_ev, - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), - SND_SOC_DAPM_OUT_DRV_E("DSP1", SND_SOC_NOPM, 0, 0, NULL, 0, - cs35l41_dsp_load_ev, SND_SOC_DAPM_POST_PMU), - SND_SOC_DAPM_OUTPUT("SPK"), - - SND_SOC_DAPM_SWITCH("AMP Enable", SND_SOC_NOPM, 0, 1, &_enable_ctrl), - SND_SOC_DAPM_AIF_IN("ASPRX1", NULL, 0, CS35L41_SP_ENABLES, 16, 0), - SND_SOC_DAPM_AIF_IN("ASPRX2", NULL, 0, CS35L41_SP_ENABLES, 17, 0), - SND_SOC_DAPM_AIF_OUT("ASPTX1", NULL, 0, CS35L41_SP_ENABLES, 0, 0), - SND_SOC_DAPM_AIF_OUT("ASPTX2", NULL, 0, CS35L41_SP_ENABLES, 1, 0), - SND_SOC_DAPM_AIF_OUT("ASPTX3", NULL, 0, CS35L41_SP_ENABLES, 2, 0), - SND_SOC_DAPM_AIF_OUT("ASPTX4", NULL, 0, CS35L41_SP_ENABLES, 3, 0), - - SND_SOC_DAPM_ADC("VMON ADC", NULL, CS35L41_PWR_CTRL2, 12, 0), - SND_SOC_DAPM_ADC("IMON ADC", NULL, CS35L41_PWR_CTRL2, 13, 0), - SND_SOC_DAPM_ADC("VPMON ADC", NULL, CS35L41_PWR_CTRL2, 8, 0), - SND_SOC_DAPM_ADC("VBSTMON ADC", NULL, CS35L41_PWR_CTRL2, 9, 0), - SND_SOC_DAPM_ADC("TEMPMON ADC", NULL, CS35L41_PWR_CTRL2, 10, 0), - SND_SOC_DAPM_ADC("CLASS H", NULL, CS35L41_PWR_CTRL3, 4, 0), - - SND_SOC_DAPM_OUT_DRV_E("Main AMP", CS35L41_PWR_CTRL2, 0, 0, NULL, 0, - cs35l41_main_amp_event, - SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU - | SND_SOC_DAPM_PRE_PMD), - - SND_SOC_DAPM_INPUT("VP"), - SND_SOC_DAPM_INPUT("VBST"), - SND_SOC_DAPM_INPUT("ISENSE"), - SND_SOC_DAPM_INPUT("VSENSE"), - SND_SOC_DAPM_INPUT("TEMP"), - - SND_SOC_DAPM_MUX("ASP TX1 Source", SND_SOC_NOPM, 0, 0, &asp_tx1_mux), - SND_SOC_DAPM_MUX("ASP TX2 Source", SND_SOC_NOPM, 0, 0, &asp_tx2_mux), - SND_SOC_DAPM_MUX("ASP TX3 Source", SND_SOC_NOPM, 0, 0, &asp_tx3_mux), - SND_SOC_DAPM_MUX("ASP TX4 Source", SND_SOC_NOPM, 0, 0, &asp_tx4_mux), - SND_SOC_DAPM_MUX("PCM Source", SND_SOC_NOPM, 0, 0, &pcm_source_mux), - SND_SOC_DAPM_SWITCH("DRE", SND_SOC_NOPM, 0, 0, &dre_ctrl), - SND_SOC_DAPM_MUX("DSP1 Input1 Source", SND_SOC_NOPM, 0, 0, &dsp_intput1_mux), - SND_SOC_DAPM_MUX("DSP1 Input2 Source", SND_SOC_NOPM, 0, 0, &dsp_intput2_mux), -}; - -static const struct snd_soc_dapm_route cs35l41_audio_map[] = { - - {"DSP1 Input1 Source", "ASPRX1", "ASPRX1"}, - {"DSP1 Input1 Source", "ASPRX2", "ASPRX2"}, - {"DSP1 Input2 Source", "ASPRX1", "ASPRX1"}, - {"DSP1 Input2 Source", "ASPRX2", "ASPRX2"}, - { "DSP1", NULL, "DSP1 Input1 Source" }, - { "DSP1", NULL, "DSP1 Input2 Source" }, - { "DSP1", NULL, "DSP1 Preloader" }, - { "DSP1 Preload", NULL, "DSP1 Preloader" }, - - {"ASP TX1 Source", "VMON", "VMON ADC"}, - {"ASP TX1 Source", "IMON", "IMON ADC"}, - {"ASP TX1 Source", "VPMON", "VPMON ADC"}, - {"ASP TX1 Source", "DSPTX1", "DSP1"}, - {"ASP TX1 Source", "DSPTX2", "DSP1"}, - {"ASP TX1 Source", "ASPRX1", "ASPRX1" }, - {"ASP TX1 Source", "ASPRX2", "ASPRX2" }, - {"ASP TX2 Source", "VMON", "VMON ADC"}, - {"ASP TX2 Source", "IMON", "IMON ADC"}, - {"ASP TX2 Source", "VPMON", "VPMON ADC"}, - {"ASP TX2 Source", "DSPTX1", "DSP1"}, - {"ASP TX2 Source", "DSPTX2", "DSP1"}, - {"ASP TX2 Source", "ASPRX1", "ASPRX1" }, - {"ASP TX2 Source", "ASPRX2", "ASPRX2" }, - {"ASP TX3 Source", "VMON", "VMON ADC"}, - {"ASP TX3 Source", "IMON", "IMON ADC"}, - {"ASP TX3 Source", "VPMON", "VPMON ADC"}, - {"ASP TX3 Source", "DSPTX1", "DSP1"}, - {"ASP TX3 Source", "DSPTX2", "DSP1"}, - {"ASP TX3 Source", "ASPRX1", "ASPRX1" }, - {"ASP TX3 Source", "ASPRX2", "ASPRX2" }, - {"ASP TX4 Source", "VMON", "VMON ADC"}, - {"ASP TX4 Source", "IMON", "IMON ADC"}, - {"ASP TX4 Source", "VPMON", "VPMON ADC"}, - {"ASP TX4 Source", "DSPTX1", "DSP1"}, - {"ASP TX4 Source", "DSPTX2", "DSP1"}, - {"ASP TX4 Source", "ASPRX1", "ASPRX1" }, - {"ASP TX4 Source", "ASPRX2", "ASPRX2" }, - {"ASPTX1", NULL, "ASP TX1 Source"}, - {"ASPTX2", NULL, "ASP TX2 Source"}, - {"ASPTX3", NULL, "ASP TX3 Source"}, - {"ASPTX4", NULL, "ASP TX4 Source"}, - {"AMP Capture", NULL, "ASPTX1"}, - {"AMP Capture", NULL, "ASPTX2"}, - {"AMP Capture", NULL, "ASPTX3"}, - {"AMP Capture", NULL, "ASPTX4"}, - - {"VMON ADC", NULL, "ASPRX1"}, - {"IMON ADC", NULL, "ASPRX1"}, - {"VPMON ADC", NULL, "ASPRX1"}, - {"TEMPMON ADC", NULL, "ASPRX1"}, - {"VBSTMON ADC", NULL, "ASPRX1"}, - - {"DSP1", NULL, "IMON ADC"}, - {"DSP1", NULL, "VMON ADC"}, - {"DSP1", NULL, "VBSTMON ADC"}, - {"DSP1", NULL, "VPMON ADC"}, - {"DSP1", NULL, "TEMPMON ADC"}, - - {"AMP Enable", "Switch", "AMP Playback"}, - {"ASPRX1", NULL, "AMP Enable"}, - {"ASPRX2", NULL, "AMP Enable"}, - {"DRE", "DRE Switch", "CLASS H"}, - {"Main AMP", NULL, "CLASS H"}, - {"Main AMP", NULL, "DRE"}, - {"SPK", NULL, "Main AMP"}, - - {"PCM Source", "ASP", "ASPRX1"}, - {"PCM Source", "DSP", "DSP1"}, - {"CLASS H", NULL, "PCM Source"}, - -}; - -static const struct wm_adsp_region cs35l41_dsp1_regions[] = { - { .type = WMFW_HALO_PM_PACKED, .base = CS35L41_DSP1_PMEM_0 }, - { .type = WMFW_HALO_XM_PACKED, .base = CS35L41_DSP1_XMEM_PACK_0 }, - { .type = WMFW_HALO_YM_PACKED, .base = CS35L41_DSP1_YMEM_PACK_0 }, - {. type = WMFW_ADSP2_XM, .base = CS35L41_DSP1_XMEM_UNPACK24_0}, - {. type = WMFW_ADSP2_YM, .base = CS35L41_DSP1_YMEM_UNPACK24_0}, -}; - -static int cs35l41_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) -{ - struct cs35l41_private *cs35l41 = - snd_soc_codec_get_drvdata(codec_dai->codec); - unsigned int asp_fmt, lrclk_fmt, sclk_fmt, slave_mode; - - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { - case SND_SOC_DAIFMT_CBM_CFM: - slave_mode = 1; - break; - case SND_SOC_DAIFMT_CBS_CFS: - slave_mode = 0; - break; - default: - dev_warn(cs35l41->dev, "cs35l41_set_dai_fmt: Mixed master mode unsupported\n"); - return -EINVAL; - } - - regmap_update_bits(cs35l41->regmap, CS35L41_SP_FORMAT, - CS35L41_SCLK_MSTR_MASK, - slave_mode << CS35L41_SCLK_MSTR_SHIFT); - regmap_update_bits(cs35l41->regmap, CS35L41_SP_FORMAT, - CS35L41_LRCLK_MSTR_MASK, - slave_mode << CS35L41_LRCLK_MSTR_SHIFT); - - switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { - case SND_SOC_DAIFMT_DSP_A: - asp_fmt = 0; - cs35l41->i2s_mode = false; - cs35l41->dspa_mode = true; - break; - case SND_SOC_DAIFMT_I2S: - asp_fmt = 2; - cs35l41->i2s_mode = true; - cs35l41->dspa_mode = false; - break; - default: - dev_warn(cs35l41->dev, "cs35l41_set_dai_fmt: Invalid or unsupported DAI format\n"); - return -EINVAL; - } - - regmap_update_bits(cs35l41->regmap, CS35L41_SP_FORMAT, - CS35L41_ASP_FMT_MASK, - asp_fmt << CS35L41_ASP_FMT_SHIFT); - - switch (fmt & SND_SOC_DAIFMT_INV_MASK) { - case SND_SOC_DAIFMT_NB_IF: - lrclk_fmt = 1; - sclk_fmt = 0; - break; - case SND_SOC_DAIFMT_IB_NF: - lrclk_fmt = 0; - sclk_fmt = 1; - break; - case SND_SOC_DAIFMT_IB_IF: - lrclk_fmt = 1; - sclk_fmt = 1; - break; - case SND_SOC_DAIFMT_NB_NF: - lrclk_fmt = 0; - sclk_fmt = 0; - break; - default: - dev_warn(cs35l41->dev, "cs35l41_set_dai_fmt: Invalid DAI clock INV\n"); - return -EINVAL; - } - - regmap_update_bits(cs35l41->regmap, CS35L41_SP_FORMAT, - CS35L41_LRCLK_INV_MASK, - lrclk_fmt << CS35L41_LRCLK_INV_SHIFT); - regmap_update_bits(cs35l41->regmap, CS35L41_SP_FORMAT, - CS35L41_SCLK_INV_MASK, - sclk_fmt << CS35L41_SCLK_INV_SHIFT); - - return 0; -} - -struct cs35l41_global_fs_config { - int rate; - int fs_cfg; -}; - -static const struct cs35l41_global_fs_config cs35l41_fs_rates[] = { - { 12000, 0x01 }, - { 24000, 0x02 }, - { 48000, 0x03 }, - { 96000, 0x04 }, - { 192000, 0x05 }, - { 11025, 0x09 }, - { 22050, 0x0A }, - { 44100, 0x0B }, - { 88200, 0x0C }, - { 176400, 0x0D }, - { 8000, 0x11 }, - { 16000, 0x12 }, - { 32000, 0x13 }, -}; - -static int cs35l41_get_clk_config(int freq) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(cs35l41_pll_sysclk); i++) { - if (cs35l41_pll_sysclk[i].freq == freq) - return cs35l41_pll_sysclk[i].clk_cfg; - } - - return -EINVAL; -} - -static const unsigned int cs35l41_src_rates[] = { - 8000, 12000, 11025, 16000, 22050, 24000, 32000, - 44100, 48000, 88200, 96000, 176400, 192000 -}; - -static const struct snd_pcm_hw_constraint_list cs35l41_constraints = { - .count = ARRAY_SIZE(cs35l41_src_rates), - .list = cs35l41_src_rates, -}; - -static int cs35l41_pcm_startup(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - if (substream->runtime) - return snd_pcm_hw_constraint_list(substream->runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, &cs35l41_constraints); - return 0; -} - -static int cs35l41_codec_set_sysclk(struct snd_soc_codec *codec, - int clk_id, int source, unsigned int freq, - int dir) -{ - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - - cs35l41->extclk_freq = freq; - - dev_dbg(cs35l41->dev, "Set CODEC sysclk to %d\n", freq); - - switch (clk_id) { - case 0: - cs35l41->clksrc = CS35L41_PLLSRC_SCLK; - break; - case 1: - cs35l41->clksrc = CS35L41_PLLSRC_LRCLK; - break; - case 2: - cs35l41->clksrc = CS35L41_PLLSRC_PDMCLK; - break; - case 3: - cs35l41->clksrc = CS35L41_PLLSRC_SELF; - break; - case 4: - cs35l41->clksrc = CS35L41_PLLSRC_MCLK; - break; - default: - dev_err(codec->dev, "Invalid CLK Config\n"); - return -EINVAL; - } - - cs35l41->extclk_cfg = cs35l41_get_clk_config(freq); - - if (cs35l41->extclk_cfg < 0) { - dev_err(codec->dev, "Invalid CLK Config: %d, freq: %u\n", - cs35l41->extclk_cfg, freq); - return -EINVAL; - } - - regmap_update_bits(cs35l41->regmap, CS35L41_PLL_CLK_CTRL, - CS35L41_PLL_OPENLOOP_MASK, - 1 << CS35L41_PLL_OPENLOOP_SHIFT); - regmap_update_bits(cs35l41->regmap, CS35L41_PLL_CLK_CTRL, - CS35L41_REFCLK_FREQ_MASK, - cs35l41->extclk_cfg << CS35L41_REFCLK_FREQ_SHIFT); - regmap_update_bits(cs35l41->regmap, CS35L41_PLL_CLK_CTRL, - CS35L41_PLL_CLK_EN_MASK, - 0 << CS35L41_PLL_CLK_EN_SHIFT); - regmap_update_bits(cs35l41->regmap, CS35L41_PLL_CLK_CTRL, - CS35L41_PLL_CLK_SEL_MASK, cs35l41->clksrc); - regmap_update_bits(cs35l41->regmap, CS35L41_PLL_CLK_CTRL, - CS35L41_PLL_OPENLOOP_MASK, - 0 << CS35L41_PLL_OPENLOOP_SHIFT); - regmap_update_bits(cs35l41->regmap, CS35L41_PLL_CLK_CTRL, - CS35L41_PLL_CLK_EN_MASK, - 1 << CS35L41_PLL_CLK_EN_SHIFT); - - return 0; -} - -static int cs35l41_dai_set_sysclk(struct snd_soc_dai *dai, - int clk_id, unsigned int freq, int dir) -{ - struct snd_soc_codec *codec = dai->codec; - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - - if (cs35l41_get_clk_config(freq) < 0) { - dev_err(codec->dev, "Invalid CLK Config freq: %u\n", freq); - return -EINVAL; - } - - if (clk_id == CS35L41_PLLSRC_SCLK) - cs35l41->sclk = freq; - - dev_dbg(cs35l41->dev, "Set DAI sysclk %d\n", freq); - - return 0; -} - -static int cs35l41_pcm_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai) -{ - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(dai->codec); - struct snd_soc_codec *codec = dai->codec; - int i, ret; - unsigned int rate = params_rate(params); - u8 asp_width, asp_wl; - int sclk_rate = params_rate(params) * params_width(params) - * params_channels(params); - - if ((cs35l41->clksrc == CS35L41_PLLSRC_SCLK) && - (cs35l41->sclk != sclk_rate)) { - dev_dbg(cs35l41->dev, "Reset sclk rate to %d from %d\n", - sclk_rate, cs35l41->sclk); - dev_dbg(cs35l41->dev, "rate %d width %d channels %d\n", - params_rate(params), params_width(params), - params_channels(params)); - ret = cs35l41_codec_set_sysclk(codec, CS35L41_PLLSRC_SCLK, 0, - sclk_rate, 0); - if (ret != 0) { - dev_err(cs35l41->dev, "Can't set codec sysclk %d\n", - ret); - return ret; - } - ret = cs35l41_dai_set_sysclk(dai, - CS35L41_PLLSRC_SCLK, sclk_rate, 0); - if (ret != 0) { - dev_err(cs35l41->dev, "Can't set dai sysclk %d\n", ret); - return ret; - } - } - - for (i = 0; i < ARRAY_SIZE(cs35l41_fs_rates); i++) { - if (rate == cs35l41_fs_rates[i].rate) - break; - } - regmap_update_bits(cs35l41->regmap, CS35L41_GLOBAL_CLK_CTRL, - CS35L41_GLOBAL_FS_MASK, - cs35l41_fs_rates[i].fs_cfg << CS35L41_GLOBAL_FS_SHIFT); - - asp_wl = params_width(params); - asp_width = params_physical_width(params); - - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - regmap_update_bits(cs35l41->regmap, CS35L41_SP_FORMAT, - CS35L41_ASP_WIDTH_RX_MASK, - asp_width << CS35L41_ASP_WIDTH_RX_SHIFT); - regmap_update_bits(cs35l41->regmap, CS35L41_SP_RX_WL, - CS35L41_ASP_RX_WL_MASK, - asp_wl << CS35L41_ASP_RX_WL_SHIFT); - if (cs35l41->i2s_mode) { - regmap_update_bits(cs35l41->regmap, - CS35L41_SP_FRAME_RX_SLOT, - CS35L41_ASP_RX1_SLOT_MASK, - ((cs35l41->pdata.right_channel) ? 1 : 0) - << CS35L41_ASP_RX1_SLOT_SHIFT); - regmap_update_bits(cs35l41->regmap, - CS35L41_SP_FRAME_RX_SLOT, - CS35L41_ASP_RX2_SLOT_MASK, - ((cs35l41->pdata.right_channel) ? 0 : 1) - << CS35L41_ASP_RX2_SLOT_SHIFT); - } - } else { - regmap_update_bits(cs35l41->regmap, CS35L41_SP_FORMAT, - CS35L41_ASP_WIDTH_TX_MASK, - asp_width << CS35L41_ASP_WIDTH_TX_SHIFT); - regmap_update_bits(cs35l41->regmap, CS35L41_SP_TX_WL, - CS35L41_ASP_TX_WL_MASK, - asp_wl << CS35L41_ASP_TX_WL_SHIFT); - } - - return ret; -} - -static int cs35l41_boost_config(struct cs35l41_private *cs35l41, - int boost_ind, int boost_cap, int boost_ipk) -{ - int ret; - unsigned char bst_lbst_val, bst_cbst_range, bst_ipk_scaled; - struct regmap *regmap = cs35l41->regmap; - struct device *dev = cs35l41->dev; - - switch (boost_ind) { - case 1000: /* 1.0 uH */ - bst_lbst_val = 0; - break; - case 1200: /* 1.2 uH */ - bst_lbst_val = 1; - break; - case 1500: /* 1.5 uH */ - bst_lbst_val = 2; - break; - case 2200: /* 2.2 uH */ - bst_lbst_val = 3; - break; - default: - dev_err(dev, "Invalid boost inductor value: %d nH\n", - boost_ind); - return -EINVAL; - } - - switch (boost_cap) { - case 0 ... 19: - bst_cbst_range = 0; - break; - case 20 ... 50: - bst_cbst_range = 1; - break; - case 51 ... 100: - bst_cbst_range = 2; - break; - case 101 ... 200: - bst_cbst_range = 3; - break; - default: /* 201 uF and greater */ - bst_cbst_range = 4; - } - - ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_COEFF, - CS35L41_BST_K1_MASK, - cs35l41_bst_k1_table[bst_lbst_val][bst_cbst_range] - << CS35L41_BST_K1_SHIFT); - if (ret) { - dev_err(dev, "Failed to write boost K1 coefficient\n"); - return ret; - } - - ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_COEFF, - CS35L41_BST_K2_MASK, - cs35l41_bst_k2_table[bst_lbst_val][bst_cbst_range] - << CS35L41_BST_K2_SHIFT); - if (ret) { - dev_err(dev, "Failed to write boost K2 coefficient\n"); - return ret; - } - - ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_SLOPE_LBST, - CS35L41_BST_SLOPE_MASK, - cs35l41_bst_slope_table[bst_lbst_val] - << CS35L41_BST_SLOPE_SHIFT); - if (ret) { - dev_err(dev, "Failed to write boost slope coefficient\n"); - return ret; - } - - ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_SLOPE_LBST, - CS35L41_BST_LBST_VAL_MASK, - bst_lbst_val << CS35L41_BST_LBST_VAL_SHIFT); - if (ret) { - dev_err(dev, "Failed to write boost inductor value\n"); - return ret; - } - - if ((boost_ipk < 1600) || (boost_ipk > 4500)) { - dev_err(dev, "Invalid boost inductor peak current: %d mA\n", - boost_ipk); - return -EINVAL; - } - bst_ipk_scaled = ((boost_ipk - 1600) / 50) + 0x10; - - ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_PEAK_CUR, - CS35L41_BST_IPK_MASK, - bst_ipk_scaled << CS35L41_BST_IPK_SHIFT); - if (ret) { - dev_err(dev, "Failed to write boost inductor peak current\n"); - return ret; - } - - return 0; -} - -static int cs35l41_codec_probe(struct snd_soc_codec *codec) -{ - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - struct classh_cfg *classh = &cs35l41->pdata.classh_config; - int ret; - - /* Set Platform Data */ - /* Required */ - if (cs35l41->pdata.bst_ipk && - cs35l41->pdata.bst_ind && cs35l41->pdata.bst_cap) { - ret = cs35l41_boost_config(cs35l41, cs35l41->pdata.bst_ind, - cs35l41->pdata.bst_cap, - cs35l41->pdata.bst_ipk); - if (ret) { - dev_err(cs35l41->dev, "Error in Boost DT config\n"); - return ret; - } - } else { - dev_err(cs35l41->dev, "Incomplete Boost component DT config\n"); - return -EINVAL; - } - - /* Optional */ - if (cs35l41->pdata.sclk_frc) - regmap_update_bits(cs35l41->regmap, CS35L41_SP_FORMAT, - CS35L41_SCLK_FRC_MASK, - cs35l41->pdata.sclk_frc << - CS35L41_SCLK_FRC_SHIFT); - - if (cs35l41->pdata.lrclk_frc) - regmap_update_bits(cs35l41->regmap, CS35L41_SP_FORMAT, - CS35L41_LRCLK_FRC_MASK, - cs35l41->pdata.lrclk_frc << - CS35L41_LRCLK_FRC_SHIFT); - - if (cs35l41->pdata.amp_gain_zc) - regmap_update_bits(cs35l41->regmap, CS35L41_AMP_GAIN_CTRL, - CS35L41_AMP_GAIN_ZC_MASK, - cs35l41->pdata.amp_gain_zc << - CS35L41_AMP_GAIN_ZC_SHIFT); - - if (cs35l41->pdata.bst_vctrl) - regmap_update_bits(cs35l41->regmap, CS35L41_BSTCVRT_VCTRL1, - CS35L41_BST_CTL_MASK, cs35l41->pdata.bst_vctrl); - - if (cs35l41->pdata.temp_warn_thld) - regmap_update_bits(cs35l41->regmap, CS35L41_DTEMP_WARN_THLD, - CS35L41_TEMP_THLD_MASK, - cs35l41->pdata.temp_warn_thld); - - if (cs35l41->pdata.dout_hiz <= CS35L41_ASP_DOUT_HIZ_MASK && - cs35l41->pdata.dout_hiz >= 0) - regmap_update_bits(cs35l41->regmap, CS35L41_SP_HIZ_CTRL, - CS35L41_ASP_DOUT_HIZ_MASK, - cs35l41->pdata.dout_hiz); - - if (cs35l41->pdata.ng_enable) { - regmap_update_bits(cs35l41->regmap, - CS35L41_MIXER_NGATE_CH1_CFG, - CS35L41_NG_ENABLE_MASK, - CS35L41_NG_ENABLE_MASK); - regmap_update_bits(cs35l41->regmap, - CS35L41_MIXER_NGATE_CH2_CFG, - CS35L41_NG_ENABLE_MASK, - CS35L41_NG_ENABLE_MASK); - - if (cs35l41->pdata.ng_pcm_thld) { - regmap_update_bits(cs35l41->regmap, - CS35L41_MIXER_NGATE_CH1_CFG, - CS35L41_NG_THLD_MASK, - cs35l41->pdata.ng_pcm_thld); - regmap_update_bits(cs35l41->regmap, - CS35L41_MIXER_NGATE_CH2_CFG, - CS35L41_NG_THLD_MASK, - cs35l41->pdata.ng_pcm_thld); - } - - if (cs35l41->pdata.ng_delay) { - regmap_update_bits(cs35l41->regmap, - CS35L41_MIXER_NGATE_CH1_CFG, - CS35L41_NG_DELAY_MASK, - cs35l41->pdata.ng_delay << - CS35L41_NG_DELAY_SHIFT); - regmap_update_bits(cs35l41->regmap, - CS35L41_MIXER_NGATE_CH2_CFG, - CS35L41_NG_DELAY_MASK, - cs35l41->pdata.ng_delay << - CS35L41_NG_DELAY_SHIFT); - } - } - - if (classh->classh_algo_enable) { - if (classh->classh_bst_override) - regmap_update_bits(cs35l41->regmap, - CS35L41_BSTCVRT_VCTRL2, - CS35L41_BST_CTL_SEL_MASK, - CS35L41_BST_CTL_SEL_REG); - if (classh->classh_bst_max_limit) - regmap_update_bits(cs35l41->regmap, - CS35L41_BSTCVRT_VCTRL2, - CS35L41_BST_LIM_MASK, - classh->classh_bst_max_limit << - CS35L41_BST_LIM_SHIFT); - if (classh->classh_mem_depth) - regmap_update_bits(cs35l41->regmap, - CS35L41_CLASSH_CFG, - CS35L41_CH_MEM_DEPTH_MASK, - classh->classh_mem_depth << - CS35L41_CH_MEM_DEPTH_SHIFT); - if (classh->classh_headroom) - regmap_update_bits(cs35l41->regmap, - CS35L41_CLASSH_CFG, - CS35L41_CH_HDRM_CTL_MASK, - classh->classh_headroom << - CS35L41_CH_HDRM_CTL_SHIFT); - if (classh->classh_release_rate) - regmap_update_bits(cs35l41->regmap, - CS35L41_CLASSH_CFG, - CS35L41_CH_REL_RATE_MASK, - classh->classh_release_rate << - CS35L41_CH_REL_RATE_SHIFT); - if (classh->classh_wk_fet_delay) - regmap_update_bits(cs35l41->regmap, - CS35L41_WKFET_CFG, - CS35L41_CH_WKFET_DLY_MASK, - classh->classh_wk_fet_delay << - CS35L41_CH_WKFET_DLY_SHIFT); - if (classh->classh_wk_fet_thld) - regmap_update_bits(cs35l41->regmap, - CS35L41_WKFET_CFG, - CS35L41_CH_WKFET_THLD_MASK, - classh->classh_wk_fet_thld << - CS35L41_CH_WKFET_THLD_SHIFT); - } - - wm_adsp2_codec_probe(&cs35l41->dsp, codec); - - return 0; -} - -static int cs35l41_irq_gpio_config(struct cs35l41_private *cs35l41) -{ - struct irq_cfg *irq_gpio_cfg1 = &cs35l41->pdata.irq_config1; - struct irq_cfg *irq_gpio_cfg2 = &cs35l41->pdata.irq_config2; - int irq_pol = IRQF_TRIGGER_NONE; - - if (irq_gpio_cfg1->is_present) { - if (irq_gpio_cfg1->irq_pol_inv) - regmap_update_bits(cs35l41->regmap, - CS35L41_GPIO1_CTRL1, - CS35L41_GPIO_POL_MASK, - CS35L41_GPIO_POL_MASK); - if (irq_gpio_cfg1->irq_out_en) - regmap_update_bits(cs35l41->regmap, - CS35L41_GPIO1_CTRL1, - CS35L41_GPIO_DIR_MASK, - 0); - if (irq_gpio_cfg1->irq_src_sel) - regmap_update_bits(cs35l41->regmap, - CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO1_CTRL_MASK, - irq_gpio_cfg1->irq_src_sel << - CS35L41_GPIO1_CTRL_SHIFT); - } - - if (irq_gpio_cfg2->is_present) { - if (irq_gpio_cfg2->irq_pol_inv) - regmap_update_bits(cs35l41->regmap, - CS35L41_GPIO2_CTRL1, - CS35L41_GPIO_POL_MASK, - CS35L41_GPIO_POL_MASK); - if (irq_gpio_cfg2->irq_out_en) - regmap_update_bits(cs35l41->regmap, - CS35L41_GPIO2_CTRL1, - CS35L41_GPIO_DIR_MASK, - 0); - if (irq_gpio_cfg2->irq_src_sel) - regmap_update_bits(cs35l41->regmap, - CS35L41_GPIO_PAD_CONTROL, - CS35L41_GPIO2_CTRL_MASK, - irq_gpio_cfg2->irq_src_sel << - CS35L41_GPIO2_CTRL_SHIFT); - } - - if (irq_gpio_cfg2->irq_src_sel == - (CS35L41_GPIO_CTRL_ACTV_LO | CS35L41_VALID_PDATA)) - irq_pol = IRQF_TRIGGER_LOW; - else if (irq_gpio_cfg2->irq_src_sel == - (CS35L41_GPIO_CTRL_ACTV_HI | CS35L41_VALID_PDATA)) - irq_pol = IRQF_TRIGGER_HIGH; - - return irq_pol; -} - -static int cs35l41_codec_remove(struct snd_soc_codec *codec) -{ - struct cs35l41_private *cs35l41 = snd_soc_codec_get_drvdata(codec); - - wm_adsp2_codec_remove(&cs35l41->dsp, codec); - return 0; -} - -static const struct snd_soc_dai_ops cs35l41_ops = { - .startup = cs35l41_pcm_startup, - .set_fmt = cs35l41_set_dai_fmt, - .hw_params = cs35l41_pcm_hw_params, - .set_sysclk = cs35l41_dai_set_sysclk, -}; - -static struct snd_soc_dai_driver cs35l41_dai[] = { - { - .name = "cs35l41-pcm", - .id = 0, - .playback = { - .stream_name = "AMP Playback", - .channels_min = 1, - .channels_max = 2, - .rates = SNDRV_PCM_RATE_KNOT, - .formats = CS35L41_RX_FORMATS, - }, - .capture = { - .stream_name = "AMP Capture", - .channels_min = 1, - .channels_max = 8, - .rates = SNDRV_PCM_RATE_KNOT, - .formats = CS35L41_TX_FORMATS, - }, - .ops = &cs35l41_ops, - .symmetric_rates = 1, - }, -}; - -static struct snd_soc_codec_driver soc_codec_dev_cs35l41 = { - .probe = cs35l41_codec_probe, - .remove = cs35l41_codec_remove, - .component_driver = { - .dapm_widgets = cs35l41_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(cs35l41_dapm_widgets), - .dapm_routes = cs35l41_audio_map, - .num_dapm_routes = ARRAY_SIZE(cs35l41_audio_map), - - .controls = cs35l41_aud_controls, - .num_controls = ARRAY_SIZE(cs35l41_aud_controls), - }, - .set_sysclk = cs35l41_codec_set_sysclk, - .ignore_pmdown_time = true, -}; - -static int cs35l41_handle_of_data(struct device *dev, - struct cs35l41_platform_data *pdata) -{ - struct device_node *np = dev->of_node; - unsigned int val; - int ret; - struct device_node *sub_node; - struct classh_cfg *classh_config = &pdata->classh_config; - struct irq_cfg *irq_gpio1_config = &pdata->irq_config1; - struct irq_cfg *irq_gpio2_config = &pdata->irq_config2; - - if (!np) - return 0; - - pdata->right_channel = of_property_read_bool(np, - "cirrus,right-channel-amp"); - pdata->sclk_frc = of_property_read_bool(np, - "cirrus,sclk-force-output"); - pdata->lrclk_frc = of_property_read_bool(np, - "cirrus,lrclk-force-output"); - pdata->amp_gain_zc = of_property_read_bool(np, - "cirrus,amp-gain-zc"); - - if (of_property_read_u32(np, "cirrus,temp-warn_threshold", &val) >= 0) - pdata->temp_warn_thld = val | CS35L41_VALID_PDATA; - - ret = of_property_read_u32(np, "cirrus,boost-ctl-millivolt", &val); - if (ret >= 0) { - if (val < 2550 || val > 11000) { - dev_err(dev, - "Invalid Boost Voltage %u mV\n", val); - return -EINVAL; - } - pdata->bst_vctrl = ((val - 2550) / 100) + 1; - } - - ret = of_property_read_u32(np, "cirrus,boost-peak-milliamp", &val); - if (ret >= 0) - pdata->bst_ipk = val; - - ret = of_property_read_u32(np, "cirrus,boost-ind-nanohenry", &val); - if (ret >= 0) - pdata->bst_ind = val; - - ret = of_property_read_u32(np, "cirrus,boost-cap-microfarad", &val); - if (ret >= 0) - pdata->bst_cap = val; - - ret = of_property_read_u32(np, "cirrus,asp-sdout-hiz", &val); - if (ret >= 0) - pdata->dout_hiz = val; - else - pdata->dout_hiz = -1; - - pdata->ng_enable = of_property_read_bool(np, - "cirrus,noise-gate-enable"); - if (of_property_read_u32(np, "cirrus,noise-gate-threshold", &val) >= 0) - pdata->ng_pcm_thld = val | CS35L41_VALID_PDATA; - if (of_property_read_u32(np, "cirrus,noise-gate-delay", &val) >= 0) - pdata->ng_delay = val | CS35L41_VALID_PDATA; - - sub_node = of_get_child_by_name(np, "cirrus,classh-internal-algo"); - classh_config->classh_algo_enable = sub_node ? true : false; - - if (classh_config->classh_algo_enable) { - classh_config->classh_bst_override = - of_property_read_bool(sub_node, - "cirrus,classh-bst-overide"); - - ret = of_property_read_u32(sub_node, - "cirrus,classh-bst-max-limit", - &val); - if (ret >= 0) { - val |= CS35L41_VALID_PDATA; - classh_config->classh_bst_max_limit = val; - } - - ret = of_property_read_u32(sub_node, "cirrus,classh-mem-depth", - &val); - if (ret >= 0) { - val |= CS35L41_VALID_PDATA; - classh_config->classh_mem_depth = val; - } - - ret = of_property_read_u32(sub_node, - "cirrus,classh-release-rate", &val); - if (ret >= 0) - classh_config->classh_release_rate = val; - - ret = of_property_read_u32(sub_node, "cirrus,classh-headroom", - &val); - if (ret >= 0) { - val |= CS35L41_VALID_PDATA; - classh_config->classh_headroom = val; - } - - ret = of_property_read_u32(sub_node, - "cirrus,classh-wk-fet-delay", &val); - if (ret >= 0) { - val |= CS35L41_VALID_PDATA; - classh_config->classh_wk_fet_delay = val; - } - - ret = of_property_read_u32(sub_node, - "cirrus,classh-wk-fet-thld", &val); - if (ret >= 0) - classh_config->classh_wk_fet_thld = val; - } - of_node_put(sub_node); - - /* GPIO1 Pin Config */ - sub_node = of_get_child_by_name(np, "cirrus,gpio-config1"); - irq_gpio1_config->is_present = sub_node ? true : false; - if (irq_gpio1_config->is_present) { - irq_gpio1_config->irq_pol_inv = of_property_read_bool(sub_node, - "cirrus,gpio-polarity-invert"); - irq_gpio1_config->irq_out_en = of_property_read_bool(sub_node, - "cirrus,gpio-output-enable"); - ret = of_property_read_u32(sub_node, "cirrus,gpio-src-select", - &val); - if (ret >= 0) { - val |= CS35L41_VALID_PDATA; - irq_gpio1_config->irq_src_sel = val; - } - } - of_node_put(sub_node); - - /* GPIO2 Pin Config */ - sub_node = of_get_child_by_name(np, "cirrus,gpio-config2"); - irq_gpio2_config->is_present = sub_node ? true : false; - if (irq_gpio2_config->is_present) { - irq_gpio2_config->irq_pol_inv = of_property_read_bool(sub_node, - "cirrus,gpio-polarity-invert"); - irq_gpio2_config->irq_out_en = of_property_read_bool(sub_node, - "cirrus,gpio-output-enable"); - ret = of_property_read_u32(sub_node, "cirrus,gpio-src-select", - &val); - if (ret >= 0) { - val |= CS35L41_VALID_PDATA; - irq_gpio2_config->irq_src_sel = val; - } - } - of_node_put(sub_node); - - return 0; -} - -static const struct reg_sequence cs35l41_reva0_errata_patch[] = { - {0x00000040, 0x00005555}, - {0x00000040, 0x0000AAAA}, - {0x00003854, 0x05180240}, - {CS35L41_VIMON_SPKMON_RESYNC, 0x00000000}, - {CS35L41_OTP_TRIM_30, 0x9091A1C8}, - {0x00003014, 0x0200EE0E}, - {CS35L41_BSTCVRT_DCM_CTRL, 0x00000051}, - {0x00000054, 0x00000004}, - {CS35L41_IRQ1_DB3, 0x00000000}, - {CS35L41_IRQ2_DB3, 0x00000000}, - {CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000}, - {CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000}, - {CS35L41_ASP_CONTROL4, 0x01010000}, - {0x00000040, 0x0000CCCC}, - {0x00000040, 0x00003333}, -}; - -static const struct reg_sequence cs35l41_revb0_errata_patch[] = { - {0x00000040, 0x00005555}, - {0x00000040, 0x0000AAAA}, - {CS35L41_VIMON_SPKMON_RESYNC, 0x00000000}, - {CS35L41_BSTCVRT_DCM_CTRL, 0x00000051}, - {CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000}, - {CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000}, - {CS35L41_ASP_CONTROL4, 0x01010000}, - {0x00000040, 0x0000CCCC}, - {0x00000040, 0x00003333}, -}; - -static const struct reg_sequence cs35l41_set_dsp_to_fs2_patch[] = { - /* Set DSPRX to FS2 */ - {0x02B80080, 0x00000001}, - {0x02B80088, 0x00000001}, - {0x02B80090, 0x00000001}, - {0x02B80098, 0x00000001}, - {0x02B800A0, 0x00000001}, - {0x02B800A8, 0x00000001}, - {0x02B800B0, 0x00000001}, - {0x02B800B8, 0x00000001}, - /* Set DSPRX to FS2 */ - {0x02B80280, 0x00000001}, - {0x02B80288, 0x00000001}, - {0x02B80290, 0x00000001}, - {0x02B80298, 0x00000001}, - {0x02B802A0, 0x00000001}, - {0x02B802A8, 0x00000001}, - {0x02B802B0, 0x00000001}, - {0x02B802B8, 0x00000001}, - /* Set FS2 start window to allow BCLK as expected. */ - {0x00002D10, 0x000A3016} -}; - -static int cs35l41_dsp_init(struct cs35l41_private *cs35l41) -{ - struct wm_adsp *dsp; - int ret; - - dsp = &cs35l41->dsp; - dsp->part = "cs35l41"; - dsp->num = 1; - dsp->type = WMFW_HALO; - dsp->rev = 0; - dsp->dev = cs35l41->dev; - dsp->regmap = cs35l41->regmap; - dsp->suffix = ""; - - dsp->base = CS35L41_DSP1_CTRL_BASE; - dsp->base_sysinfo = CS35L41_DSP1_SYS_ID; - dsp->mem = cs35l41_dsp1_regions; - dsp->num_mems = ARRAY_SIZE(cs35l41_dsp1_regions); - dsp->unlock_all = true; - - dsp->n_rx_channels = CS35L41_DSP_N_RX_RATES; - dsp->n_tx_channels = CS35L41_DSP_N_TX_RATES; - ret = wm_halo_init(dsp, &cs35l41->rate_lock); - if (ret <0) { - dev_err(cs35l41->dev, - "DSP init error %d.\n", ret); - } - cs35l41->halo_booted = false; - - regmap_write(cs35l41->regmap, CS35L41_DSP1_RX5_SRC, - CS35L41_INPUT_SRC_VPMON); - regmap_write(cs35l41->regmap, CS35L41_DSP1_RX6_SRC, - CS35L41_INPUT_SRC_CLASSH); - regmap_write(cs35l41->regmap, CS35L41_DSP1_RX7_SRC, - CS35L41_INPUT_SRC_TEMPMON); - regmap_write(cs35l41->regmap, CS35L41_DSP1_RX8_SRC, - CS35L41_INPUT_SRC_RSVD); - ret = regmap_multi_reg_write(cs35l41->regmap, - cs35l41_set_dsp_to_fs2_patch, - ARRAY_SIZE(cs35l41_set_dsp_to_fs2_patch)); - if (ret < 0) { - dev_err(cs35l41->dev, - "Failed to apply FS2 patch %d.\n", ret); - } - - return ret; -} - -int cs35l41_probe(struct cs35l41_private *cs35l41, - struct cs35l41_platform_data *pdata) -{ - int ret; - u32 regid, reg_revid, i, mtl_revid, int_status, chipid_match; - int timeout = 100; - int irq_pol = 0; - - /* Default to RESUME cmd */ - cs35l41->cspl_cmd = (unsigned int)CSPL_MBOX_CMD_RESUME; - cs35l41->gpi_glob_en = 0; - cs35l41->enabled = false; - - for (i = 0; i < ARRAY_SIZE(cs35l41_supplies); i++) - cs35l41->supplies[i].supply = cs35l41_supplies[i]; - - cs35l41->num_supplies = ARRAY_SIZE(cs35l41_supplies); - - ret = devm_regulator_bulk_get(cs35l41->dev, cs35l41->num_supplies, - cs35l41->supplies); - if (ret != 0) { - dev_err(cs35l41->dev, - "Failed to request core supplies: %d\n", - ret); - return ret; - } - - if (pdata) { - cs35l41->pdata = *pdata; - } else if (cs35l41->dev->of_node) { - ret = cs35l41_handle_of_data(cs35l41->dev, &cs35l41->pdata); - if (ret != 0) - return ret; - } else { - ret = -EINVAL; - goto err; - } - - ret = regulator_bulk_enable(cs35l41->num_supplies, cs35l41->supplies); - if (ret != 0) { - dev_err(cs35l41->dev, - "Failed to enable core supplies: %d\n", ret); - return ret; - } - - /* returning NULL can be an option if in stereo mode */ - cs35l41->reset_gpio = devm_gpiod_get_optional(cs35l41->dev, "reset", - GPIOD_OUT_LOW); - if (IS_ERR(cs35l41->reset_gpio)) { - ret = PTR_ERR(cs35l41->reset_gpio); - cs35l41->reset_gpio = NULL; - if (ret == -EBUSY) { - dev_info(cs35l41->dev, - "Reset line busy, assuming shared reset\n"); - } else { - dev_err(cs35l41->dev, - "Failed to get reset GPIO: %d\n", ret); - goto err; - } - } - if (cs35l41->reset_gpio) { - /* satisfy minimum reset pulse width spec */ - usleep_range(2000, 2100); - gpiod_set_value_cansleep(cs35l41->reset_gpio, 1); - } - - usleep_range(2000, 2100); - - do { - if (timeout == 0) { - dev_err(cs35l41->dev, - "Timeout waiting for OTP_BOOT_DONE\n"); - ret = -EBUSY; - goto err; - } - usleep_range(1000, 1100); - regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS4, &int_status); - timeout--; - } while (!(int_status & CS35L41_OTP_BOOT_DONE)); - - regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_status); - if (int_status & CS35L41_OTP_BOOT_ERR) { - dev_err(cs35l41->dev, "OTP Boot error\n"); - ret = -EINVAL; - goto err; - } - - ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, ®id); - if (ret < 0) { - dev_err(cs35l41->dev, "Get Device ID failed\n"); - goto err; - } - - ret = regmap_read(cs35l41->regmap, CS35L41_REVID, ®_revid); - if (ret < 0) { - dev_err(cs35l41->dev, "Get Revision ID failed\n"); - goto err; - } - - mtl_revid = reg_revid & CS35L41_MTLREVID_MASK; - - /* CS35L41 will have even MTLREVID - * CS35L41R will have odd MTLREVID - */ - chipid_match = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID; - if (regid != chipid_match) { - dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", - regid, chipid_match); - ret = -ENODEV; - goto err; - } - - irq_pol = cs35l41_irq_gpio_config(cs35l41); - - init_completion(&cs35l41->global_pdn_done); - init_completion(&cs35l41->global_pup_done); - - ret = devm_request_threaded_irq(cs35l41->dev, cs35l41->irq, NULL, - cs35l41_irq, IRQF_ONESHOT | irq_pol, - "cs35l41", cs35l41); - - /* CS35L41 needs INT for PDN_DONE */ - if (ret != 0) { - dev_err(cs35l41->dev, "Failed to request IRQ: %d\n", ret); - goto err; - } - - /* Set interrupt masks for critical errors */ - regmap_write(cs35l41->regmap, CS35L41_IRQ1_MASK1, - CS35L41_INT1_MASK_DEFAULT); - - switch (reg_revid) { - case CS35L41_REVID_A0: - ret = regmap_multi_reg_write(cs35l41->regmap, - cs35l41_reva0_errata_patch, - ARRAY_SIZE(cs35l41_reva0_errata_patch)); - if (ret < 0) { - dev_err(cs35l41->dev, - "Failed to apply A0 errata patch %d\n", ret); - goto err; - } - break; - case CS35L41_REVID_B0: - ret = regmap_multi_reg_write(cs35l41->regmap, - cs35l41_revb0_errata_patch, - ARRAY_SIZE(cs35l41_revb0_errata_patch)); - if (ret < 0) { - dev_err(cs35l41->dev, - "Failed to apply B0 errata patch %d\n", ret); - goto err; - } - break; - } - - ret = cs35l41_otp_unpack(cs35l41); - if (ret < 0) { - dev_err(cs35l41->dev, "OTP Unpack failed\n"); - goto err; - } - - mutex_init(&cs35l41->rate_lock); - - cs35l41_dsp_init(cs35l41); - - ret = snd_soc_register_codec(cs35l41->dev, &soc_codec_dev_cs35l41, - cs35l41_dai, ARRAY_SIZE(cs35l41_dai)); - if (ret < 0) { - dev_err(cs35l41->dev, "%s: Register codec failed\n", __func__); - goto err; - } - - dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", - regid, reg_revid); - -err: - regulator_bulk_disable(cs35l41->num_supplies, cs35l41->supplies); - return ret; -} - -MODULE_DESCRIPTION("ASoC CS35L41 driver"); -MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, "); -MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/cs35l41.h b/sound/soc/codecs/cs35l41.h deleted file mode 100644 index d285f802d168..000000000000 --- a/sound/soc/codecs/cs35l41.h +++ /dev/null @@ -1,766 +0,0 @@ -/* - * cs35l41.h -- CS35L41 ALSA SoC audio driver - * - * Copyright 2018 Cirrus Logic, Inc. - * - * Author: Brian Austin - * David Rhodes - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __CS35L41_H__ -#define __CS35L41_H__ - -#include - -#define CS35L41_FIRSTREG 0x00000000 -#define CS35L41_LASTREG 0x03804FE8 -#define CS35L41_DEVID 0x00000000 -#define CS35L41_REVID 0x00000004 -#define CS35L41_FABID 0x00000008 -#define CS35L41_RELID 0x0000000C -#define CS35L41_OTPID 0x00000010 -#define CS35L41_SFT_RESET 0x00000020 -#define CS35L41_TEST_KEY_CTL 0x00000040 -#define CS35L41_USER_KEY_CTL 0x00000044 -#define CS35L41_OTP_MEM0 0x00000400 -#define CS35L41_OTP_MEM31 0x0000047C -#define CS35L41_OTP_CTRL0 0x00000500 -#define CS35L41_OTP_CTRL1 0x00000504 -#define CS35L41_OTP_CTRL3 0x00000508 -#define CS35L41_OTP_CTRL4 0x0000050C -#define CS35L41_OTP_CTRL5 0x00000510 -#define CS35L41_OTP_CTRL6 0x00000514 -#define CS35L41_OTP_CTRL7 0x00000518 -#define CS35L41_OTP_CTRL8 0x0000051C -#define CS35L41_PWR_CTRL1 0x00002014 -#define CS35L41_PWR_CTRL2 0x00002018 -#define CS35L41_PWR_CTRL3 0x0000201C -#define CS35L41_CTRL_OVRRIDE 0x00002020 -#define CS35L41_AMP_OUT_MUTE 0x00002024 -#define CS35L41_PROTECT_REL_ERR_IGN 0x00002034 -#define CS35L41_GPIO_PAD_CONTROL 0x0000242C -#define CS35L41_JTAG_CONTROL 0x00002438 -#define CS35L41_PLL_CLK_CTRL 0x00002C04 -#define CS35L41_DSP_CLK_CTRL 0x00002C08 -#define CS35L41_GLOBAL_CLK_CTRL 0x00002C0C -#define CS35L41_DATA_FS_SEL 0x00002C10 -#define CS35L41_MDSYNC_EN 0x00003400 -#define CS35L41_MDSYNC_TX_ID 0x00003408 -#define CS35L41_MDSYNC_PWR_CTRL 0x0000340C -#define CS35L41_MDSYNC_DATA_TX 0x00003410 -#define CS35L41_MDSYNC_TX_STATUS 0x00003414 -#define CS35L41_MDSYNC_DATA_RX 0x0000341C -#define CS35L41_MDSYNC_RX_STATUS 0x00003420 -#define CS35L41_MDSYNC_ERR_STATUS 0x00003424 -#define CS35L41_MDSYNC_SYNC_PTE2 0x00003528 -#define CS35L41_MDSYNC_SYNC_PTE3 0x0000352C -#define CS35L41_MDSYNC_SYNC_MSM_STATUS 0x0000353C -#define CS35L41_BSTCVRT_VCTRL1 0x00003800 -#define CS35L41_BSTCVRT_VCTRL2 0x00003804 -#define CS35L41_BSTCVRT_PEAK_CUR 0x00003808 -#define CS35L41_BSTCVRT_SFT_RAMP 0x0000380C -#define CS35L41_BSTCVRT_COEFF 0x00003810 -#define CS35L41_BSTCVRT_SLOPE_LBST 0x00003814 -#define CS35L41_BSTCVRT_SW_FREQ 0x00003818 -#define CS35L41_BSTCVRT_DCM_CTRL 0x0000381C -#define CS35L41_BSTCVRT_DCM_MODE_FORCE 0x00003820 -#define CS35L41_BSTCVRT_OVERVOLT_CTRL 0x00003830 -#define CS35L41_VI_VOL_POL 0x00004000 -#define CS35L41_VIMON_SPKMON_RESYNC 0x00004100 -#define CS35L41_DTEMP_WARN_THLD 0x00004220 -#define CS35L41_DTEMP_CFG 0x00004224 -#define CS35L41_DTEMP_EN 0x00004308 -#define CS35L41_VPVBST_FS_SEL 0x00004400 -#define CS35L41_SP_ENABLES 0x00004800 -#define CS35L41_SP_RATE_CTRL 0x00004804 -#define CS35L41_SP_FORMAT 0x00004808 -#define CS35L41_SP_HIZ_CTRL 0x0000480C -#define CS35L41_SP_FRAME_TX_SLOT 0x00004810 -#define CS35L41_SP_FRAME_RX_SLOT 0x00004820 -#define CS35L41_SP_TX_WL 0x00004830 -#define CS35L41_SP_RX_WL 0x00004840 -#define CS35L41_ASP_CONTROL4 0x00004854 -#define CS35L41_DAC_PCM1_SRC 0x00004C00 -#define CS35L41_ASP_TX1_SRC 0x00004C20 -#define CS35L41_ASP_TX2_SRC 0x00004C24 -#define CS35L41_ASP_TX3_SRC 0x00004C28 -#define CS35L41_ASP_TX4_SRC 0x00004C2C -#define CS35L41_DSP1_RX1_SRC 0x00004C40 -#define CS35L41_DSP1_RX2_SRC 0x00004C44 -#define CS35L41_DSP1_RX3_SRC 0x00004C48 -#define CS35L41_DSP1_RX4_SRC 0x00004C4C -#define CS35L41_DSP1_RX5_SRC 0x00004C50 -#define CS35L41_DSP1_RX6_SRC 0x00004C54 -#define CS35L41_DSP1_RX7_SRC 0x00004C58 -#define CS35L41_DSP1_RX8_SRC 0x00004C5C -#define CS35L41_NGATE1_SRC 0x00004C60 -#define CS35L41_NGATE2_SRC 0x00004C64 -#define CS35L41_AMP_DIG_VOL_CTRL 0x00006000 -#define CS35L41_VPBR_CFG 0x00006404 -#define CS35L41_VBBR_CFG 0x00006408 -#define CS35L41_VPBR_STATUS 0x0000640C -#define CS35L41_VBBR_STATUS 0x00006410 -#define CS35L41_OVERTEMP_CFG 0x00006414 -#define CS35L41_AMP_ERR_VOL 0x00006418 -#define CS35L41_VOL_STATUS_TO_DSP 0x00006450 -#define CS35L41_CLASSH_CFG 0x00006800 -#define CS35L41_WKFET_CFG 0x00006804 -#define CS35L41_NG_CFG 0x00006808 -#define CS35L41_AMP_GAIN_CTRL 0x00006C04 -#define CS35L41_DAC_MSM_CFG 0x00007400 -#define CS35L41_IRQ1_CFG 0x00010000 -#define CS35L41_IRQ1_STATUS 0x00010004 -#define CS35L41_IRQ1_STATUS1 0x00010010 -#define CS35L41_IRQ1_STATUS2 0x00010014 -#define CS35L41_IRQ1_STATUS3 0x00010018 -#define CS35L41_IRQ1_STATUS4 0x0001001C -#define CS35L41_IRQ1_RAW_STATUS1 0x00010090 -#define CS35L41_IRQ1_RAW_STATUS2 0x00010094 -#define CS35L41_IRQ1_RAW_STATUS3 0x00010098 -#define CS35L41_IRQ1_RAW_STATUS4 0x0001009C -#define CS35L41_IRQ1_MASK1 0x00010110 -#define CS35L41_IRQ1_MASK2 0x00010114 -#define CS35L41_IRQ1_MASK3 0x00010118 -#define CS35L41_IRQ1_MASK4 0x0001011C -#define CS35L41_IRQ1_FRC1 0x00010190 -#define CS35L41_IRQ1_FRC2 0x00010194 -#define CS35L41_IRQ1_FRC3 0x00010198 -#define CS35L41_IRQ1_FRC4 0x0001019C -#define CS35L41_IRQ1_EDGE1 0x00010210 -#define CS35L41_IRQ1_EDGE4 0x0001021C -#define CS35L41_IRQ1_POL1 0x00010290 -#define CS35L41_IRQ1_POL2 0x00010294 -#define CS35L41_IRQ1_POL3 0x00010298 -#define CS35L41_IRQ1_POL4 0x0001029C -#define CS35L41_IRQ1_DB3 0x00010318 -#define CS35L41_IRQ2_CFG 0x00010800 -#define CS35L41_IRQ2_STATUS 0x00010804 -#define CS35L41_IRQ2_STATUS1 0x00010810 -#define CS35L41_IRQ2_STATUS2 0x00010814 -#define CS35L41_IRQ2_STATUS3 0x00010818 -#define CS35L41_IRQ2_STATUS4 0x0001081C -#define CS35L41_IRQ2_RAW_STATUS1 0x00010890 -#define CS35L41_IRQ2_RAW_STATUS2 0x00010894 -#define CS35L41_IRQ2_RAW_STATUS3 0x00010898 -#define CS35L41_IRQ2_RAW_STATUS4 0x0001089C -#define CS35L41_IRQ2_MASK1 0x00010910 -#define CS35L41_IRQ2_MASK2 0x00010914 -#define CS35L41_IRQ2_MASK3 0x00010918 -#define CS35L41_IRQ2_MASK4 0x0001091C -#define CS35L41_IRQ2_FRC1 0x00010990 -#define CS35L41_IRQ2_FRC2 0x00010994 -#define CS35L41_IRQ2_FRC3 0x00010998 -#define CS35L41_IRQ2_FRC4 0x0001099C -#define CS35L41_IRQ2_EDGE1 0x00010A10 -#define CS35L41_IRQ2_EDGE4 0x00010A1C -#define CS35L41_IRQ2_POL1 0x00010A90 -#define CS35L41_IRQ2_POL2 0x00010A94 -#define CS35L41_IRQ2_POL3 0x00010A98 -#define CS35L41_IRQ2_POL4 0x00010A9C -#define CS35L41_IRQ2_DB3 0x00010B18 -#define CS35L41_GPIO_STATUS1 0x00011000 -#define CS35L41_GPIO1_CTRL1 0x00011008 -#define CS35L41_GPIO2_CTRL1 0x0001100C -#define CS35L41_MIXER_NGATE_CFG 0x00012000 -#define CS35L41_MIXER_NGATE_CH1_CFG 0x00012004 -#define CS35L41_MIXER_NGATE_CH2_CFG 0x00012008 -#define CS35L41_DSP_MBOX_1 0x00013000 -#define CS35L41_DSP_MBOX_2 0x00013004 -#define CS35L41_DSP_MBOX_3 0x00013008 -#define CS35L41_DSP_MBOX_4 0x0001300C -#define CS35L41_DSP_MBOX_5 0x00013010 -#define CS35L41_DSP_MBOX_6 0x00013014 -#define CS35L41_DSP_MBOX_7 0x00013018 -#define CS35L41_DSP_MBOX_8 0x0001301C -#define CS35L41_DSP_VIRT1_MBOX_1 0x00013020 -#define CS35L41_DSP_VIRT1_MBOX_2 0x00013024 -#define CS35L41_DSP_VIRT1_MBOX_3 0x00013028 -#define CS35L41_DSP_VIRT1_MBOX_4 0x0001302C -#define CS35L41_DSP_VIRT1_MBOX_5 0x00013030 -#define CS35L41_DSP_VIRT1_MBOX_6 0x00013034 -#define CS35L41_DSP_VIRT1_MBOX_7 0x00013038 -#define CS35L41_DSP_VIRT1_MBOX_8 0x0001303C -#define CS35L41_DSP_VIRT2_MBOX_1 0x00013040 -#define CS35L41_DSP_VIRT2_MBOX_2 0x00013044 -#define CS35L41_DSP_VIRT2_MBOX_3 0x00013048 -#define CS35L41_DSP_VIRT2_MBOX_4 0x0001304C -#define CS35L41_DSP_VIRT2_MBOX_5 0x00013050 -#define CS35L41_DSP_VIRT2_MBOX_6 0x00013054 -#define CS35L41_DSP_VIRT2_MBOX_7 0x00013058 -#define CS35L41_DSP_VIRT2_MBOX_8 0x0001305C -#define CS35L41_CLOCK_DETECT_1 0x00014000 -#define CS35L41_TIMER1_CONTROL 0x00015000 -#define CS35L41_TIMER1_COUNT_PRESET 0x00015004 -#define CS35L41_TIMER1_START_STOP 0x0001500C -#define CS35L41_TIMER1_STATUS 0x00015010 -#define CS35L41_TIMER1_COUNT_READBACK 0x00015014 -#define CS35L41_TIMER1_DSP_CLK_CFG 0x00015018 -#define CS35L41_TIMER1_DSP_CLK_STATUS 0x0001501C -#define CS35L41_TIMER2_CONTROL 0x00015100 -#define CS35L41_TIMER2_COUNT_PRESET 0x00015104 -#define CS35L41_TIMER2_START_STOP 0x0001510C -#define CS35L41_TIMER2_STATUS 0x00015110 -#define CS35L41_TIMER2_COUNT_READBACK 0x00015114 -#define CS35L41_TIMER2_DSP_CLK_CFG 0x00015118 -#define CS35L41_TIMER2_DSP_CLK_STATUS 0x0001511C -#define CS35L41_DFT_JTAG_CONTROL 0x00016000 -#define CS35L41_DIE_STS1 0x00017040 -#define CS35L41_DIE_STS2 0x00017044 -#define CS35L41_TEMP_CAL1 0x00017048 -#define CS35L41_TEMP_CAL2 0x0001704C -#define CS35L41_DSP1_XMEM_PACK_0 0x02000000 -#define CS35L41_DSP1_XMEM_PACK_3068 0x02002FF0 -#define CS35L41_DSP1_XMEM_UNPACK32_0 0x02400000 -#define CS35L41_DSP1_XMEM_UNPACK32_2046 0x02401FF8 -#define CS35L41_DSP1_TIMESTAMP_COUNT 0x025C0800 -#define CS35L41_DSP1_SYS_ID 0x025E0000 -#define CS35L41_DSP1_SYS_VERSION 0x025E0004 -#define CS35L41_DSP1_SYS_CORE_ID 0x025E0008 -#define CS35L41_DSP1_SYS_AHB_ADDR 0x025E000C -#define CS35L41_DSP1_SYS_XSRAM_SIZE 0x025E0010 -#define CS35L41_DSP1_SYS_YSRAM_SIZE 0x025E0018 -#define CS35L41_DSP1_SYS_PSRAM_SIZE 0x025E0020 -#define CS35L41_DSP1_SYS_PM_BOOT_SIZE 0x025E0028 -#define CS35L41_DSP1_SYS_FEATURES 0x025E002C -#define CS35L41_DSP1_SYS_FIR_FILTERS 0x025E0030 -#define CS35L41_DSP1_SYS_LMS_FILTERS 0x025E0034 -#define CS35L41_DSP1_SYS_XM_BANK_SIZE 0x025E0038 -#define CS35L41_DSP1_SYS_YM_BANK_SIZE 0x025E003C -#define CS35L41_DSP1_SYS_PM_BANK_SIZE 0x025E0040 -#define CS35L41_DSP1_AHBM_WIN0_CTRL0 0x025E2000 -#define CS35L41_DSP1_AHBM_WIN0_CTRL1 0x025E2004 -#define CS35L41_DSP1_AHBM_WIN1_CTRL0 0x025E2008 -#define CS35L41_DSP1_AHBM_WIN1_CTRL1 0x025E200C -#define CS35L41_DSP1_AHBM_WIN2_CTRL0 0x025E2010 -#define CS35L41_DSP1_AHBM_WIN2_CTRL1 0x025E2014 -#define CS35L41_DSP1_AHBM_WIN3_CTRL0 0x025E2018 -#define CS35L41_DSP1_AHBM_WIN3_CTRL1 0x025E201C -#define CS35L41_DSP1_AHBM_WIN4_CTRL0 0x025E2020 -#define CS35L41_DSP1_AHBM_WIN4_CTRL1 0x025E2024 -#define CS35L41_DSP1_AHBM_WIN5_CTRL0 0x025E2028 -#define CS35L41_DSP1_AHBM_WIN5_CTRL1 0x025E202C -#define CS35L41_DSP1_AHBM_WIN6_CTRL0 0x025E2030 -#define CS35L41_DSP1_AHBM_WIN6_CTRL1 0x025E2034 -#define CS35L41_DSP1_AHBM_WIN7_CTRL0 0x025E2038 -#define CS35L41_DSP1_AHBM_WIN7_CTRL1 0x025E203C -#define CS35L41_DSP1_AHBM_WIN_DBG_CTRL0 0x025E2040 -#define CS35L41_DSP1_AHBM_WIN_DBG_CTRL1 0x025E2044 -#define CS35L41_DSP1_XMEM_UNPACK24_0 0x02800000 -#define CS35L41_DSP1_XMEM_UNPACK24_4093 0x02803FF4 -#define CS35L41_DSP1_CTRL_BASE 0x02B80000 -#define CS35L41_DSP1_CORE_SOFT_RESET 0x02B80010 -#define CS35L41_DSP1_DEBUG 0x02B80040 -#define CS35L41_DSP1_TIMER_CTRL 0x02B80048 -#define CS35L41_DSP1_STREAM_ARB_CTRL 0x02B80050 -#define CS35L41_DSP1_RX1_RATE 0x02B80080 -#define CS35L41_DSP1_RX2_RATE 0x02B80088 -#define CS35L41_DSP1_RX3_RATE 0x02B80090 -#define CS35L41_DSP1_RX4_RATE 0x02B80098 -#define CS35L41_DSP1_RX5_RATE 0x02B800A0 -#define CS35L41_DSP1_RX6_RATE 0x02B800A8 -#define CS35L41_DSP1_RX7_RATE 0x02B800B0 -#define CS35L41_DSP1_RX8_RATE 0x02B800B8 -#define CS35L41_DSP1_TX1_RATE 0x02B80280 -#define CS35L41_DSP1_TX2_RATE 0x02B80288 -#define CS35L41_DSP1_TX3_RATE 0x02B80290 -#define CS35L41_DSP1_TX4_RATE 0x02B80298 -#define CS35L41_DSP1_TX5_RATE 0x02B802A0 -#define CS35L41_DSP1_TX6_RATE 0x02B802A8 -#define CS35L41_DSP1_TX7_RATE 0x02B802B0 -#define CS35L41_DSP1_TX8_RATE 0x02B802B8 -#define CS35L41_DSP1_NMI_CTRL1 0x02B80480 -#define CS35L41_DSP1_NMI_CTRL2 0x02B80488 -#define CS35L41_DSP1_NMI_CTRL3 0x02B80490 -#define CS35L41_DSP1_NMI_CTRL4 0x02B80498 -#define CS35L41_DSP1_NMI_CTRL5 0x02B804A0 -#define CS35L41_DSP1_NMI_CTRL6 0x02B804A8 -#define CS35L41_DSP1_NMI_CTRL7 0x02B804B0 -#define CS35L41_DSP1_NMI_CTRL8 0x02B804B8 -#define CS35L41_DSP1_RESUME_CTRL 0x02B80500 -#define CS35L41_DSP1_IRQ1_CTRL 0x02B80508 -#define CS35L41_DSP1_IRQ2_CTRL 0x02B80510 -#define CS35L41_DSP1_IRQ3_CTRL 0x02B80518 -#define CS35L41_DSP1_IRQ4_CTRL 0x02B80520 -#define CS35L41_DSP1_IRQ5_CTRL 0x02B80528 -#define CS35L41_DSP1_IRQ6_CTRL 0x02B80530 -#define CS35L41_DSP1_IRQ7_CTRL 0x02B80538 -#define CS35L41_DSP1_IRQ8_CTRL 0x02B80540 -#define CS35L41_DSP1_IRQ9_CTRL 0x02B80548 -#define CS35L41_DSP1_IRQ10_CTRL 0x02B80550 -#define CS35L41_DSP1_IRQ11_CTRL 0x02B80558 -#define CS35L41_DSP1_IRQ12_CTRL 0x02B80560 -#define CS35L41_DSP1_IRQ13_CTRL 0x02B80568 -#define CS35L41_DSP1_IRQ14_CTRL 0x02B80570 -#define CS35L41_DSP1_IRQ15_CTRL 0x02B80578 -#define CS35L41_DSP1_IRQ16_CTRL 0x02B80580 -#define CS35L41_DSP1_IRQ17_CTRL 0x02B80588 -#define CS35L41_DSP1_IRQ18_CTRL 0x02B80590 -#define CS35L41_DSP1_IRQ19_CTRL 0x02B80598 -#define CS35L41_DSP1_IRQ20_CTRL 0x02B805A0 -#define CS35L41_DSP1_IRQ21_CTRL 0x02B805A8 -#define CS35L41_DSP1_IRQ22_CTRL 0x02B805B0 -#define CS35L41_DSP1_IRQ23_CTRL 0x02B805B8 -#define CS35L41_DSP1_SCRATCH1 0x02B805C0 -#define CS35L41_DSP1_SCRATCH2 0x02B805C8 -#define CS35L41_DSP1_SCRATCH3 0x02B805D0 -#define CS35L41_DSP1_SCRATCH4 0x02B805D8 -#define CS35L41_DSP1_CCM_CORE_CTRL 0x02BC1000 -#define CS35L41_DSP1_CCM_CLK_OVERRIDE 0x02BC1008 -#define CS35L41_DSP1_XM_MSTR_EN 0x02BC2000 -#define CS35L41_DSP1_XM_CORE_PRI 0x02BC2008 -#define CS35L41_DSP1_XM_AHB_PACK_PL_PRI 0x02BC2010 -#define CS35L41_DSP1_XM_AHB_UP_PL_PRI 0x02BC2018 -#define CS35L41_DSP1_XM_ACCEL_PL0_PRI 0x02BC2020 -#define CS35L41_DSP1_XM_NPL0_PRI 0x02BC2078 -#define CS35L41_DSP1_YM_MSTR_EN 0x02BC20C0 -#define CS35L41_DSP1_YM_CORE_PRI 0x02BC20C8 -#define CS35L41_DSP1_YM_AHB_PACK_PL_PRI 0x02BC20D0 -#define CS35L41_DSP1_YM_AHB_UP_PL_PRI 0x02BC20D8 -#define CS35L41_DSP1_YM_ACCEL_PL0_PRI 0x02BC20E0 -#define CS35L41_DSP1_YM_NPL0_PRI 0x02BC2138 -#define CS35L41_DSP1_PM_MSTR_EN 0x02BC2180 -#define CS35L41_DSP1_PM_PATCH0_ADDR 0x02BC2188 -#define CS35L41_DSP1_PM_PATCH0_EN 0x02BC218C -#define CS35L41_DSP1_PM_PATCH0_DATA_LO 0x02BC2190 -#define CS35L41_DSP1_PM_PATCH0_DATA_HI 0x02BC2194 -#define CS35L41_DSP1_PM_PATCH1_ADDR 0x02BC2198 -#define CS35L41_DSP1_PM_PATCH1_EN 0x02BC219C -#define CS35L41_DSP1_PM_PATCH1_DATA_LO 0x02BC21A0 -#define CS35L41_DSP1_PM_PATCH1_DATA_HI 0x02BC21A4 -#define CS35L41_DSP1_PM_PATCH2_ADDR 0x02BC21A8 -#define CS35L41_DSP1_PM_PATCH2_EN 0x02BC21AC -#define CS35L41_DSP1_PM_PATCH2_DATA_LO 0x02BC21B0 -#define CS35L41_DSP1_PM_PATCH2_DATA_HI 0x02BC21B4 -#define CS35L41_DSP1_PM_PATCH3_ADDR 0x02BC21B8 -#define CS35L41_DSP1_PM_PATCH3_EN 0x02BC21BC -#define CS35L41_DSP1_PM_PATCH3_DATA_LO 0x02BC21C0 -#define CS35L41_DSP1_PM_PATCH3_DATA_HI 0x02BC21C4 -#define CS35L41_DSP1_PM_PATCH4_ADDR 0x02BC21C8 -#define CS35L41_DSP1_PM_PATCH4_EN 0x02BC21CC -#define CS35L41_DSP1_PM_PATCH4_DATA_LO 0x02BC21D0 -#define CS35L41_DSP1_PM_PATCH4_DATA_HI 0x02BC21D4 -#define CS35L41_DSP1_PM_PATCH5_ADDR 0x02BC21D8 -#define CS35L41_DSP1_PM_PATCH5_EN 0x02BC21DC -#define CS35L41_DSP1_PM_PATCH5_DATA_LO 0x02BC21E0 -#define CS35L41_DSP1_PM_PATCH5_DATA_HI 0x02BC21E4 -#define CS35L41_DSP1_PM_PATCH6_ADDR 0x02BC21E8 -#define CS35L41_DSP1_PM_PATCH6_EN 0x02BC21EC -#define CS35L41_DSP1_PM_PATCH6_DATA_LO 0x02BC21F0 -#define CS35L41_DSP1_PM_PATCH6_DATA_HI 0x02BC21F4 -#define CS35L41_DSP1_PM_PATCH7_ADDR 0x02BC21F8 -#define CS35L41_DSP1_PM_PATCH7_EN 0x02BC21FC -#define CS35L41_DSP1_PM_PATCH7_DATA_LO 0x02BC2200 -#define CS35L41_DSP1_PM_PATCH7_DATA_HI 0x02BC2204 -#define CS35L41_DSP1_MPU_XM_ACCESS0 0x02BC3000 -#define CS35L41_DSP1_MPU_YM_ACCESS0 0x02BC3004 -#define CS35L41_DSP1_MPU_WNDW_ACCESS0 0x02BC3008 -#define CS35L41_DSP1_MPU_XREG_ACCESS0 0x02BC300C -#define CS35L41_DSP1_MPU_YREG_ACCESS0 0x02BC3014 -#define CS35L41_DSP1_MPU_XM_ACCESS1 0x02BC3018 -#define CS35L41_DSP1_MPU_YM_ACCESS1 0x02BC301C -#define CS35L41_DSP1_MPU_WNDW_ACCESS1 0x02BC3020 -#define CS35L41_DSP1_MPU_XREG_ACCESS1 0x02BC3024 -#define CS35L41_DSP1_MPU_YREG_ACCESS1 0x02BC302C -#define CS35L41_DSP1_MPU_XM_ACCESS2 0x02BC3030 -#define CS35L41_DSP1_MPU_YM_ACCESS2 0x02BC3034 -#define CS35L41_DSP1_MPU_WNDW_ACCESS2 0x02BC3038 -#define CS35L41_DSP1_MPU_XREG_ACCESS2 0x02BC303C -#define CS35L41_DSP1_MPU_YREG_ACCESS2 0x02BC3044 -#define CS35L41_DSP1_MPU_XM_ACCESS3 0x02BC3048 -#define CS35L41_DSP1_MPU_YM_ACCESS3 0x02BC304C -#define CS35L41_DSP1_MPU_WNDW_ACCESS3 0x02BC3050 -#define CS35L41_DSP1_MPU_XREG_ACCESS3 0x02BC3054 -#define CS35L41_DSP1_MPU_YREG_ACCESS3 0x02BC305C -#define CS35L41_DSP1_MPU_XM_VIO_ADDR 0x02BC3100 -#define CS35L41_DSP1_MPU_XM_VIO_STATUS 0x02BC3104 -#define CS35L41_DSP1_MPU_YM_VIO_ADDR 0x02BC3108 -#define CS35L41_DSP1_MPU_YM_VIO_STATUS 0x02BC310C -#define CS35L41_DSP1_MPU_PM_VIO_ADDR 0x02BC3110 -#define CS35L41_DSP1_MPU_PM_VIO_STATUS 0x02BC3114 -#define CS35L41_DSP1_MPU_LOCK_CONFIG 0x02BC3140 -#define CS35L41_DSP1_MPU_WDT_RST_CTRL 0x02BC3180 -#define CS35L41_DSP1_STRMARB_MSTR0_CFG0 0x02BC5000 -#define CS35L41_DSP1_STRMARB_MSTR0_CFG1 0x02BC5004 -#define CS35L41_DSP1_STRMARB_MSTR0_CFG2 0x02BC5008 -#define CS35L41_DSP1_STRMARB_MSTR1_CFG0 0x02BC5010 -#define CS35L41_DSP1_STRMARB_MSTR1_CFG1 0x02BC5014 -#define CS35L41_DSP1_STRMARB_MSTR1_CFG2 0x02BC5018 -#define CS35L41_DSP1_STRMARB_MSTR2_CFG0 0x02BC5020 -#define CS35L41_DSP1_STRMARB_MSTR2_CFG1 0x02BC5024 -#define CS35L41_DSP1_STRMARB_MSTR2_CFG2 0x02BC5028 -#define CS35L41_DSP1_STRMARB_MSTR3_CFG0 0x02BC5030 -#define CS35L41_DSP1_STRMARB_MSTR3_CFG1 0x02BC5034 -#define CS35L41_DSP1_STRMARB_MSTR3_CFG2 0x02BC5038 -#define CS35L41_DSP1_STRMARB_MSTR4_CFG0 0x02BC5040 -#define CS35L41_DSP1_STRMARB_MSTR4_CFG1 0x02BC5044 -#define CS35L41_DSP1_STRMARB_MSTR4_CFG2 0x02BC5048 -#define CS35L41_DSP1_STRMARB_MSTR5_CFG0 0x02BC5050 -#define CS35L41_DSP1_STRMARB_MSTR5_CFG1 0x02BC5054 -#define CS35L41_DSP1_STRMARB_MSTR5_CFG2 0x02BC5058 -#define CS35L41_DSP1_STRMARB_MSTR6_CFG0 0x02BC5060 -#define CS35L41_DSP1_STRMARB_MSTR6_CFG1 0x02BC5064 -#define CS35L41_DSP1_STRMARB_MSTR6_CFG2 0x02BC5068 -#define CS35L41_DSP1_STRMARB_MSTR7_CFG0 0x02BC5070 -#define CS35L41_DSP1_STRMARB_MSTR7_CFG1 0x02BC5074 -#define CS35L41_DSP1_STRMARB_MSTR7_CFG2 0x02BC5078 -#define CS35L41_DSP1_STRMARB_TX0_CFG0 0x02BC5200 -#define CS35L41_DSP1_STRMARB_TX0_CFG1 0x02BC5204 -#define CS35L41_DSP1_STRMARB_TX1_CFG0 0x02BC5208 -#define CS35L41_DSP1_STRMARB_TX1_CFG1 0x02BC520C -#define CS35L41_DSP1_STRMARB_TX2_CFG0 0x02BC5210 -#define CS35L41_DSP1_STRMARB_TX2_CFG1 0x02BC5214 -#define CS35L41_DSP1_STRMARB_TX3_CFG0 0x02BC5218 -#define CS35L41_DSP1_STRMARB_TX3_CFG1 0x02BC521C -#define CS35L41_DSP1_STRMARB_TX4_CFG0 0x02BC5220 -#define CS35L41_DSP1_STRMARB_TX4_CFG1 0x02BC5224 -#define CS35L41_DSP1_STRMARB_TX5_CFG0 0x02BC5228 -#define CS35L41_DSP1_STRMARB_TX5_CFG1 0x02BC522C -#define CS35L41_DSP1_STRMARB_TX6_CFG0 0x02BC5230 -#define CS35L41_DSP1_STRMARB_TX6_CFG1 0x02BC5234 -#define CS35L41_DSP1_STRMARB_TX7_CFG0 0x02BC5238 -#define CS35L41_DSP1_STRMARB_TX7_CFG1 0x02BC523C -#define CS35L41_DSP1_STRMARB_RX0_CFG0 0x02BC5400 -#define CS35L41_DSP1_STRMARB_RX0_CFG1 0x02BC5404 -#define CS35L41_DSP1_STRMARB_RX1_CFG0 0x02BC5408 -#define CS35L41_DSP1_STRMARB_RX1_CFG1 0x02BC540C -#define CS35L41_DSP1_STRMARB_RX2_CFG0 0x02BC5410 -#define CS35L41_DSP1_STRMARB_RX2_CFG1 0x02BC5414 -#define CS35L41_DSP1_STRMARB_RX3_CFG0 0x02BC5418 -#define CS35L41_DSP1_STRMARB_RX3_CFG1 0x02BC541C -#define CS35L41_DSP1_STRMARB_RX4_CFG0 0x02BC5420 -#define CS35L41_DSP1_STRMARB_RX4_CFG1 0x02BC5424 -#define CS35L41_DSP1_STRMARB_RX5_CFG0 0x02BC5428 -#define CS35L41_DSP1_STRMARB_RX5_CFG1 0x02BC542C -#define CS35L41_DSP1_STRMARB_RX6_CFG0 0x02BC5430 -#define CS35L41_DSP1_STRMARB_RX6_CFG1 0x02BC5434 -#define CS35L41_DSP1_STRMARB_RX7_CFG0 0x02BC5438 -#define CS35L41_DSP1_STRMARB_RX7_CFG1 0x02BC543C -#define CS35L41_DSP1_STRMARB_IRQ0_CFG0 0x02BC5600 -#define CS35L41_DSP1_STRMARB_IRQ0_CFG1 0x02BC5604 -#define CS35L41_DSP1_STRMARB_IRQ0_CFG2 0x02BC5608 -#define CS35L41_DSP1_STRMARB_IRQ1_CFG0 0x02BC5610 -#define CS35L41_DSP1_STRMARB_IRQ1_CFG1 0x02BC5614 -#define CS35L41_DSP1_STRMARB_IRQ1_CFG2 0x02BC5618 -#define CS35L41_DSP1_STRMARB_IRQ2_CFG0 0x02BC5620 -#define CS35L41_DSP1_STRMARB_IRQ2_CFG1 0x02BC5624 -#define CS35L41_DSP1_STRMARB_IRQ2_CFG2 0x02BC5628 -#define CS35L41_DSP1_STRMARB_IRQ3_CFG0 0x02BC5630 -#define CS35L41_DSP1_STRMARB_IRQ3_CFG1 0x02BC5634 -#define CS35L41_DSP1_STRMARB_IRQ3_CFG2 0x02BC5638 -#define CS35L41_DSP1_STRMARB_IRQ4_CFG0 0x02BC5640 -#define CS35L41_DSP1_STRMARB_IRQ4_CFG1 0x02BC5644 -#define CS35L41_DSP1_STRMARB_IRQ4_CFG2 0x02BC5648 -#define CS35L41_DSP1_STRMARB_IRQ5_CFG0 0x02BC5650 -#define CS35L41_DSP1_STRMARB_IRQ5_CFG1 0x02BC5654 -#define CS35L41_DSP1_STRMARB_IRQ5_CFG2 0x02BC5658 -#define CS35L41_DSP1_STRMARB_IRQ6_CFG0 0x02BC5660 -#define CS35L41_DSP1_STRMARB_IRQ6_CFG1 0x02BC5664 -#define CS35L41_DSP1_STRMARB_IRQ6_CFG2 0x02BC5668 -#define CS35L41_DSP1_STRMARB_IRQ7_CFG0 0x02BC5670 -#define CS35L41_DSP1_STRMARB_IRQ7_CFG1 0x02BC5674 -#define CS35L41_DSP1_STRMARB_IRQ7_CFG2 0x02BC5678 -#define CS35L41_DSP1_STRMARB_RESYNC_MSK 0x02BC5A00 -#define CS35L41_DSP1_STRMARB_ERR_STATUS 0x02BC5A08 -#define CS35L41_DSP1_INTPCTL_RES_STATIC 0x02BC6000 -#define CS35L41_DSP1_INTPCTL_RES_DYN 0x02BC6004 -#define CS35L41_DSP1_INTPCTL_NMI_CTRL 0x02BC6008 -#define CS35L41_DSP1_INTPCTL_IRQ_INV 0x02BC6010 -#define CS35L41_DSP1_INTPCTL_IRQ_MODE 0x02BC6014 -#define CS35L41_DSP1_INTPCTL_IRQ_EN 0x02BC6018 -#define CS35L41_DSP1_INTPCTL_IRQ_MSK 0x02BC601C -#define CS35L41_DSP1_INTPCTL_IRQ_FLUSH 0x02BC6020 -#define CS35L41_DSP1_INTPCTL_IRQ_MSKCLR 0x02BC6024 -#define CS35L41_DSP1_INTPCTL_IRQ_FRC 0x02BC6028 -#define CS35L41_DSP1_INTPCTL_IRQ_MSKSET 0x02BC602C -#define CS35L41_DSP1_INTPCTL_IRQ_ERR 0x02BC6030 -#define CS35L41_DSP1_INTPCTL_IRQ_PEND 0x02BC6034 -#define CS35L41_DSP1_INTPCTL_IRQ_GEN 0x02BC6038 -#define CS35L41_DSP1_INTPCTL_TESTBITS 0x02BC6040 -#define CS35L41_DSP1_WDT_CONTROL 0x02BC7000 -#define CS35L41_DSP1_WDT_STATUS 0x02BC7008 -#define CS35L41_DSP1_YMEM_PACK_0 0x02C00000 -#define CS35L41_DSP1_YMEM_PACK_1532 0x02C017F0 -#define CS35L41_DSP1_YMEM_UNPACK32_0 0x03000000 -#define CS35L41_DSP1_YMEM_UNPACK32_1022 0x03000FF8 -#define CS35L41_DSP1_YMEM_UNPACK24_0 0x03400000 -#define CS35L41_DSP1_YMEM_UNPACK24_2045 0x03401FF4 -#define CS35L41_DSP1_PMEM_0 0x03800000 -#define CS35L41_DSP1_PMEM_5114 0x03804FE8 - -/*test regs for emulation bringup*/ -#define CS35L41_PLL_OVR 0x00003018 -#define CS35L41_BST_TEST_DUTY 0x00003900 -#define CS35L41_DIGPWM_IOCTRL 0x0000706C - -/*registers populated by OTP*/ -#define CS35L41_OTP_TRIM_1 0x0000208c -#define CS35L41_OTP_TRIM_2 0x00002090 -#define CS35L41_OTP_TRIM_3 0x00003010 -#define CS35L41_OTP_TRIM_4 0x0000300C -#define CS35L41_OTP_TRIM_5 0x0000394C -#define CS35L41_OTP_TRIM_6 0x00003950 -#define CS35L41_OTP_TRIM_7 0x00003954 -#define CS35L41_OTP_TRIM_8 0x00003958 -#define CS35L41_OTP_TRIM_9 0x0000395C -#define CS35L41_OTP_TRIM_10 0x0000416C -#define CS35L41_OTP_TRIM_11 0x00004160 -#define CS35L41_OTP_TRIM_12 0x00004170 -#define CS35L41_OTP_TRIM_13 0x00004360 -#define CS35L41_OTP_TRIM_14 0x00004448 -#define CS35L41_OTP_TRIM_15 0x0000444C -#define CS35L41_OTP_TRIM_16 0x00006E30 -#define CS35L41_OTP_TRIM_17 0x00006E34 -#define CS35L41_OTP_TRIM_18 0x00006E38 -#define CS35L41_OTP_TRIM_19 0x00006E3C -#define CS35L41_OTP_TRIM_20 0x00006E40 -#define CS35L41_OTP_TRIM_21 0x00006E44 -#define CS35L41_OTP_TRIM_22 0x00006E48 -#define CS35L41_OTP_TRIM_23 0x00006E4C -#define CS35L41_OTP_TRIM_24 0x00006E50 -#define CS35L41_OTP_TRIM_25 0x00006E54 -#define CS35L41_OTP_TRIM_26 0x00006E58 -#define CS35L41_OTP_TRIM_27 0x00006E5C -#define CS35L41_OTP_TRIM_28 0x00006E60 -#define CS35L41_OTP_TRIM_29 0x00006E64 -#define CS35L41_OTP_TRIM_30 0x00007418 -#define CS35L41_OTP_TRIM_31 0x0000741C -#define CS35L41_OTP_TRIM_32 0x00007434 -#define CS35L41_OTP_TRIM_33 0x00007068 -#define CS35L41_OTP_TRIM_34 0x0000410C -#define CS35L41_OTP_TRIM_35 0x0000400C -#define CS35L41_OTP_TRIM_36 0x00002030 - -#define CS35L41_MAX_CACHE_REG 0x0000006B -#define CS35L41_OTP_SIZE_WORDS 32 -#define CS35L41_NUM_OTP_ELEM 100 -#define CS35L41_NUM_OTP_MAPS 4 - -#define CS35L41_VALID_PDATA 0x80000000 - -#define CS35L41_SCLK_MSTR_MASK 0x10 -#define CS35L41_SCLK_MSTR_SHIFT 4 -#define CS35L41_LRCLK_MSTR_MASK 0x01 -#define CS35L41_LRCLK_MSTR_SHIFT 0 -#define CS35L41_SCLK_INV_MASK 0x40 -#define CS35L41_SCLK_INV_SHIFT 6 -#define CS35L41_LRCLK_INV_MASK 0x04 -#define CS35L41_LRCLK_INV_SHIFT 2 -#define CS35L41_SCLK_FRC_MASK 0x20 -#define CS35L41_SCLK_FRC_SHIFT 5 -#define CS35L41_LRCLK_FRC_MASK 0x02 -#define CS35L41_LRCLK_FRC_SHIFT 1 - -#define CS35L41_AMP_GAIN_ZC_MASK 0x0400 -#define CS35L41_AMP_GAIN_ZC_SHIFT 10 - -#define CS35L41_BST_CTL_MASK 0xFF -#define CS35L41_BST_CTL_SEL_MASK 0x03 -#define CS35L41_BST_CTL_SEL_REG 0x00 -#define CS35L41_BST_CTL_SEL_CLASSH 0x01 -#define CS35L41_BST_IPK_MASK 0x7F -#define CS35L41_BST_IPK_SHIFT 0 -#define CS35L41_BST_LIM_MASK 0x4 -#define CS35L41_BST_LIM_SHIFT 2 -#define CS35L41_BST_K1_MASK 0x000000FF -#define CS35L41_BST_K1_SHIFT 0 -#define CS35L41_BST_K2_MASK 0x0000FF00 -#define CS35L41_BST_K2_SHIFT 8 -#define CS35L41_BST_SLOPE_MASK 0x0000FF00 -#define CS35L41_BST_SLOPE_SHIFT 8 -#define CS35L41_BST_LBST_VAL_MASK 0x00000003 -#define CS35L41_BST_LBST_VAL_SHIFT 0 - -#define CS35L41_TEMP_THLD_MASK 0x03 -#define CS35L41_VMON_IMON_VOL_MASK 0x07FF07FF -#define CS35L41_PDM_MODE_MASK 0x01 -#define CS35L41_PDM_MODE_SHIFT 0 - -#define CS35L41_CH_MEM_DEPTH_MASK 0x07 -#define CS35L41_CH_MEM_DEPTH_SHIFT 0 -#define CS35L41_CH_HDRM_CTL_MASK 0x007F0000 -#define CS35L41_CH_HDRM_CTL_SHIFT 16 -#define CS35L41_CH_REL_RATE_MASK 0xFF00 -#define CS35L41_CH_REL_RATE_SHIFT 8 -#define CS35L41_CH_WKFET_DLY_MASK 0x001C -#define CS35L41_CH_WKFET_DLY_SHIFT 2 -#define CS35L41_CH_WKFET_THLD_MASK 0x0F00 -#define CS35L41_CH_WKFET_THLD_SHIFT 8 - -#define CS35L41_NG_ENABLE_MASK 0x00010000 -#define CS35L41_NG_ENABLE_SHIFT 16 -#define CS35L41_NG_THLD_MASK 0x7 -#define CS35L41_NG_THLD_SHIFT 0 -#define CS35L41_NG_DELAY_MASK 0x0F00 -#define CS35L41_NG_DELAY_SHIFT 8 - -#define CS35L41_ASP_FMT_MASK 0x0700 -#define CS35L41_ASP_FMT_SHIFT 8 -#define CS35L41_ASP_DOUT_HIZ_MASK 0x03 -#define CS35L41_ASP_DOUT_HIZ_SHIFT 0 -#define CS35L41_ASP_WIDTH_16 0x10 -#define CS35L41_ASP_WIDTH_24 0x18 -#define CS35L41_ASP_WIDTH_32 0x20 -#define CS35L41_ASP_WIDTH_TX_MASK 0xFF0000 -#define CS35L41_ASP_WIDTH_TX_SHIFT 16 -#define CS35L41_ASP_WIDTH_RX_MASK 0xFF000000 -#define CS35L41_ASP_WIDTH_RX_SHIFT 24 -#define CS35L41_ASP_RX1_SLOT_MASK 0x3F -#define CS35L41_ASP_RX1_SLOT_SHIFT 0 -#define CS35L41_ASP_RX2_SLOT_MASK 0x3F00 -#define CS35L41_ASP_RX2_SLOT_SHIFT 8 -#define CS35L41_ASP_RX_WL_MASK 0x3F -#define CS35L41_ASP_TX_WL_MASK 0x3F -#define CS35L41_ASP_RX_WL_SHIFT 0 -#define CS35L41_ASP_TX_WL_SHIFT 0 -#define CS35L41_ASP_SOURCE_MASK 0x7F - -#define CS35L41_INPUT_SRC_ASPRX1 0x08 -#define CS35L41_INPUT_SRC_ASPRX2 0x09 -#define CS35L41_INPUT_SRC_VMON 0x18 -#define CS35L41_INPUT_SRC_IMON 0x19 -#define CS35L41_INPUT_SRC_CLASSH 0x21 -#define CS35L41_INPUT_SRC_VPMON 0x28 -#define CS35L41_INPUT_SRC_VBSTMON 0x29 -#define CS35L41_INPUT_SRC_TEMPMON 0x3A -#define CS35L41_INPUT_SRC_RSVD 0x3B -#define CS35L41_INPUT_DSP_TX1 0x32 -#define CS35L41_INPUT_DSP_TX2 0x33 - -#define CS35L41_PLL_CLK_SEL_MASK 0x07 -#define CS35L41_PLL_CLK_SEL_SHIFT 0 -#define CS35L41_PLL_CLK_EN_MASK 0x10 -#define CS35L41_PLL_CLK_EN_SHIFT 4 -#define CS35L41_PLL_OPENLOOP_MASK 0x0800 -#define CS35L41_PLL_OPENLOOP_SHIFT 11 -#define CS35L41_PLLSRC_SCLK 0 -#define CS35L41_PLLSRC_LRCLK 1 -#define CS35L41_PLLSRC_SELF 3 -#define CS35L41_PLLSRC_PDMCLK 4 -#define CS35L41_PLLSRC_MCLK 5 -#define CS35L41_PLLSRC_SWIRE 7 -#define CS35L41_REFCLK_FREQ_MASK 0x7E0 -#define CS35L41_REFCLK_FREQ_SHIFT 5 - -#define CS35L41_GLOBAL_FS_MASK 0x1F -#define CS35L41_GLOBAL_FS_SHIFT 0 - -#define CS35L41_GLOBAL_EN_MASK 0x01 -#define CS35L41_GLOBAL_EN_SHIFT 0 -#define CS35L41_BST_EN_MASK 0x0030 -#define CS35L41_BST_EN_SHIFT 4 -#define CS35L41_BST_EN_DEFAULT 0x2 -#define CS35L41_BST_EN_BYPASS 1 - -#define CS35L41_AMP_MUTE_MASK 0x10 - -#define CS35L41_PDN_DONE_MASK 0x00800000 -#define CS35L41_PDN_DONE_SHIFT 23 -#define CS35L41_PUP_DONE_MASK 0x01000000 -#define CS35L41_PUP_DONE_SHIFT 24 - -#define CS35L36_PUP_DONE_IRQ_UNMASK 0x5F -#define CS35L36_PUP_DONE_IRQ_MASK 0xBF - -#define CS35L41_AMP_SHORT_ERR 0x80000000 -#define CS35L41_BST_SHORT_ERR 0x0100 -#define CS35L41_TEMP_WARN 0x8000 -#define CS35L41_TEMP_ERR 0x00020000 -#define CS35L41_BST_OVP_ERR 0x40 -#define CS35L41_BST_DCM_UVP_ERR 0x80 -#define CS35L41_OTP_BOOT_DONE 0x02 -#define CS35L41_PLL_UNLOCK 0x10 -#define CS35L41_OTP_BOOT_ERR 0x80000000 - -#define CS35L41_AMP_SHORT_ERR_RLS 0x02 -#define CS35L41_BST_SHORT_ERR_RLS 0x04 -#define CS35L41_BST_OVP_ERR_RLS 0x08 -#define CS35L41_BST_UVP_ERR_RLS 0x10 -#define CS35L41_TEMP_WARN_ERR_RLS 0x20 -#define CS35L41_TEMP_ERR_RLS 0x40 - -#define CS35L41_INT1_MASK_DEFAULT 0x7FFCFE3F -#define CS35L41_INT1_UNMASK_PUP 0xFEFFFFFF -#define CS35L41_INT1_UNMASK_PDN 0xFF7FFFFF - -#define CS35L41_GPIO_DIR_MASK 0x80000000 -#define CS35L41_GPIO1_CTRL_MASK 0x00030000 -#define CS35L41_GPIO1_CTRL_SHIFT 16 -#define CS35L41_GPIO2_CTRL_MASK 0x07000000 -#define CS35L41_GPIO2_CTRL_SHIFT 24 -#define CS35L41_GPIO_CTRL_ACTV_LO 4 -#define CS35L41_GPIO_CTRL_ACTV_HI 5 -#define CS35L41_GPIO_POL_MASK 0x1000 -#define CS35L41_GPIO_POL_SHIFT 12 - -#define CS35L41_CHIP_ID 0x35a40 -#define CS35L41R_CHIP_ID 0x35b40 -#define CS35L41_MTLREVID_MASK 0x0F -#define CS35L41_REVID_A0 0xA0 -#define CS35L41_REVID_B0 0xB0 - -#define CS35L41_DSP_N_RX_RATES 8 -#define CS35L41_DSP_N_TX_RATES 8 -#define CS35L41_HALO_CORE_RESET 0x00000200 - -#define CS35L41_SPI_MAX_FREQ_OTP 4000000 - -#define CS35L41_RX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE) -#define CS35L41_TX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE \ - | SNDRV_PCM_FMTBIT_S32_LE) - -bool cs35l41_readable_reg(struct device *dev, unsigned int reg); -bool cs35l41_precious_reg(struct device *dev, unsigned int reg); -bool cs35l41_volatile_reg(struct device *dev, unsigned int reg); - -struct cs35l41_otp_packed_element_t { - u32 reg; - u8 shift; - u8 size; -}; - -struct cs35l41_otp_map_element_t { - u32 id; - u32 num_elements; - const struct cs35l41_otp_packed_element_t *map; - u32 bit_offset; - u32 word_offset; -}; - -extern const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG]; -extern const struct cs35l41_otp_map_element_t - cs35l41_otp_map_map[CS35L41_NUM_OTP_MAPS]; - -#define CS35L41_REGSTRIDE 4 - -#define CS35L41_DSP_VIRT1_MBOX_SHIFT 20 -#define CS35L41_DSP_VIRT2_MBOX_SHIFT 21 -#define CS35L41_CSPL_MBOX_STS CS35L41_DSP_MBOX_2 -/* Firmware update following reg */ -#define CS35L41_CSPL_MBOX_CMD_FW CS35L41_DSP_VIRT2_MBOX_1 -#define CS35L41_CSPL_MBOX_CMD_FW_SHIFT CS35L41_DSP_VIRT2_MBOX_SHIFT -/* Driver update following reg */ -#define CS35L41_CSPL_MBOX_CMD_DRV CS35L41_DSP_VIRT1_MBOX_1 -#define CS35L41_CSPL_MBOX_CMD_DRV_SHIFT CS35L41_DSP_VIRT1_MBOX_SHIFT - -enum cs35l41_cspl_mboxstate { - CSPL_MBOX_STS_RUNNING = 0, - CSPL_MBOX_STS_PAUSED = 1, - CSPL_MBOX_STS_RDY_FOR_REINIT = 2, -}; - -enum cs35l41_cspl_mboxcmd { - CSPL_MBOX_CMD_NONE = 0, - CSPL_MBOX_CMD_PAUSE = 1, - CSPL_MBOX_CMD_RESUME = 2, - CSPL_MBOX_CMD_REINIT = 3, - CSPL_MBOX_CMD_STOP_PRE_REINIT = 4, - CSPL_MBOX_CMD_UNKNOWN_CMD = -1, - CSPL_MBOX_CMD_INVALID_SEQUENCE = -2, -}; - -#endif /*__CS35L41_H__*/ diff --git a/sound/soc/codecs/cs47l35.c b/sound/soc/codecs/cs47l35.c deleted file mode 100644 index f56ca5b2ba24..000000000000 --- a/sound/soc/codecs/cs47l35.c +++ /dev/null @@ -1,2104 +0,0 @@ -/* - * cs47l35.c -- ALSA SoC Audio driver for CS47L35 codecs - * - * Copyright 2015-2016 Cirrus Logic Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "madera.h" -#include "wm_adsp.h" - -#if IS_ENABLED(CONFIG_SND_SOC_AOV_TRIGGER) -#include "aov_trigger.h" -#endif - -#define CS47L35_NUM_ADSP 3 -#define ADSP2_CONTROL 0x0 -#define ADSP2_CORE_ENA 0x0002 - -static const int cs47l35_fx_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_EQ1MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_EQ2MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_EQ3MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_EQ4MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_DRC1LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_DRC1RMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_DRC2LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_DRC2RMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_HPLP1MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_HPLP2MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_HPLP3MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_HPLP4MIX_INPUT_1_SOURCE, 2), -}; - -static const int cs47l35_isrc1_fsl_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_ISRC1INT1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l35_isrc1_fsh_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l35_isrc2_fsl_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_ISRC2INT1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l35_isrc2_fsh_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l35_out_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_OUT1LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT1RMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT4LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT5LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT5RMIX_INPUT_1_SOURCE, 2), -}; - -static const int cs47l35_spd1_inputs[] = { - MADERA_MIXER_INPUTS_2_N(MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l35_dsp1_inputs[] = { - MADERA_DSP_MIXER_INPUTS(MADERA_DSP1LMIX_INPUT_1_SOURCE), -}; - -static const int cs47l35_dsp2_inputs[] = { - MADERA_DSP_MIXER_INPUTS(MADERA_DSP2LMIX_INPUT_1_SOURCE), -}; - -static const int cs47l35_dsp3_inputs[] = { - MADERA_DSP_MIXER_INPUTS(MADERA_DSP3LMIX_INPUT_1_SOURCE), -}; - -static const struct wm_adsp_region cs47l35_dsp1_regions[] = { - { .type = WMFW_ADSP2_PM, .base = 0x080000 }, - { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, - { .type = WMFW_ADSP2_XM, .base = 0x0a0000 }, - { .type = WMFW_ADSP2_YM, .base = 0x0c0000 }, -}; - -static const struct wm_adsp_region cs47l35_dsp2_regions[] = { - { .type = WMFW_ADSP2_PM, .base = 0x100000 }, - { .type = WMFW_ADSP2_ZM, .base = 0x160000 }, - { .type = WMFW_ADSP2_XM, .base = 0x120000 }, - { .type = WMFW_ADSP2_YM, .base = 0x140000 }, -}; - -static const struct wm_adsp_region cs47l35_dsp3_regions[] = { - { .type = WMFW_ADSP2_PM, .base = 0x180000 }, - { .type = WMFW_ADSP2_ZM, .base = 0x1e0000 }, - { .type = WMFW_ADSP2_XM, .base = 0x1a0000 }, - { .type = WMFW_ADSP2_YM, .base = 0x1c0000 }, -}; - -static const struct wm_adsp_region *cs47l35_dsp_regions[] = { - cs47l35_dsp1_regions, - cs47l35_dsp2_regions, - cs47l35_dsp3_regions, -}; - -static const int wm_adsp2_control_bases[] = { - MADERA_DSP1_CONFIG_1, - MADERA_DSP2_CONFIG_1, - MADERA_DSP3_CONFIG_1, -}; - -static const char * const cs47l35_outdemux_texts[] = { - "HPOUT", - "EPOUT", -}; - -static SOC_ENUM_SINGLE_DECL(cs47l35_outdemux_enum, - MADERA_OUTPUT_ENABLES_1, - MADERA_EP_SEL_SHIFT, - cs47l35_outdemux_texts); - -static const struct snd_kcontrol_new cs47l35_outdemux = - SOC_DAPM_ENUM_EXT("HPOUT1 Demux", cs47l35_outdemux_enum, - snd_soc_dapm_get_enum_double, madera_out1_demux_put); - -static int cs47l35_get_sources(unsigned int reg, - const unsigned int **cur_sources, int *lim) -{ - int ret = 0; - - switch (reg) { - case MADERA_FX_CTRL1: - *cur_sources = cs47l35_fx_inputs; - *lim = ARRAY_SIZE(cs47l35_fx_inputs); - break; - case MADERA_ISRC_1_CTRL_1: - *cur_sources = cs47l35_isrc1_fsh_inputs; - *lim = ARRAY_SIZE(cs47l35_isrc1_fsh_inputs); - break; - case MADERA_ISRC_1_CTRL_2: - *cur_sources = cs47l35_isrc1_fsl_inputs; - *lim = ARRAY_SIZE(cs47l35_isrc1_fsl_inputs); - break; - case MADERA_ISRC_2_CTRL_1: - *cur_sources = cs47l35_isrc2_fsh_inputs; - *lim = ARRAY_SIZE(cs47l35_isrc2_fsh_inputs); - break; - case MADERA_ISRC_2_CTRL_2: - *cur_sources = cs47l35_isrc2_fsl_inputs; - *lim = ARRAY_SIZE(cs47l35_isrc2_fsl_inputs); - break; - case MADERA_OUTPUT_RATE_1: - *cur_sources = cs47l35_out_inputs; - *lim = ARRAY_SIZE(cs47l35_out_inputs); - break; - case MADERA_SPD1_TX_CONTROL: - *cur_sources = cs47l35_spd1_inputs; - *lim = ARRAY_SIZE(cs47l35_spd1_inputs); - break; - case MADERA_DSP1_CONFIG_1: - *cur_sources = cs47l35_dsp1_inputs; - *lim = ARRAY_SIZE(cs47l35_dsp1_inputs); - break; - case MADERA_DSP2_CONFIG_1: - *cur_sources = cs47l35_dsp2_inputs; - *lim = ARRAY_SIZE(cs47l35_dsp2_inputs); - break; - case MADERA_DSP3_CONFIG_1: - *cur_sources = cs47l35_dsp3_inputs; - *lim = ARRAY_SIZE(cs47l35_dsp3_inputs); - break; - default: - ret = -EINVAL; - } - - return ret; -} - -static int cs47l35_adsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct cs47l35 *cs47l35 = snd_soc_codec_get_drvdata(codec); - struct madera_priv *priv = &cs47l35->core; - struct madera *madera = priv->madera; - unsigned int freq; - int ret; - - ret = regmap_read(madera->regmap, MADERA_DSP_CLOCK_1, &freq); - if (ret != 0) { - dev_err(madera->dev, - "Failed to read MADERA_DSP_CLOCK_1: %d\n", ret); - return ret; - } - - freq &= MADERA_DSP_CLK_FREQ_LEGACY_MASK; - freq >>= MADERA_DSP_CLK_FREQ_LEGACY_SHIFT; - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - ret = madera_set_adsp_clk(&cs47l35->core.adsp[w->shift], freq); - if (ret) - return ret; - break; - default: - break; - } - - return wm_adsp2_early_event(w, kcontrol, event, freq); -} - -static int cs47l35_get_dsp_state(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); - struct soc_mixer_control *mc = (struct soc_mixer_control *) - kcontrol->private_value; - struct wm_adsp *dsp = &dsps[mc->shift]; - unsigned int val; - - regmap_read(dsp->regmap, dsp->base + ADSP2_CONTROL, &val); - if (val & ADSP2_CORE_ENA) - ucontrol->value.integer.value[0] = 1; - else - ucontrol->value.integer.value[0] = 0; - - return 0; -} - -static int cs47l35_put_dsp_state(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - return 0; -} - -static int cs47l35_get_trig_state(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct cs47l35 *cs47l35 = snd_soc_codec_get_drvdata(codec); - struct madera_priv *priv = &cs47l35->core; - /* DSP3, Channel 1 */ - struct wm_adsp_compr *compr = priv->adsp[2].compr[0]; - if (compr) - ucontrol->value.integer.value[0] = compr->freed; - return 0; -} - -static int cs47l35_put_trig_state(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct cs47l35 *cs47l35 = snd_soc_codec_get_drvdata(codec); - struct madera_priv *priv = &cs47l35->core; - /* DSP3, Channel 1 */ - struct wm_adsp_compr *compr = priv->adsp[2].compr[0]; - int value = ucontrol->value.integer.value[0]; - - if (compr) - compr->freed = value; - return 0; -} - -#define CS47L35_NG_SRC(name, base) \ - SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ - SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \ - SOC_SINGLE(name " NG SPKOUT Switch", base, 6, 1, 0), \ - SOC_SINGLE(name " NG SPKDATL Switch", base, 8, 1, 0), \ - SOC_SINGLE(name " NG SPKDATR Switch", base, 9, 1, 0) - -static void cs47l35_hp_post_enable(struct snd_soc_dapm_widget *w) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - unsigned int val; - - switch (w->shift) { - case MADERA_OUT1L_ENA_SHIFT: - case MADERA_OUT1R_ENA_SHIFT: - val = snd_soc_read(codec, MADERA_OUTPUT_ENABLES_1); - val &= (MADERA_OUT1L_ENA | MADERA_OUT1R_ENA); - - if (val == (MADERA_OUT1L_ENA | MADERA_OUT1R_ENA)) - snd_soc_update_bits(codec, - MADERA_EDRE_HP_STEREO_CONTROL, - MADERA_HP1_EDRE_STEREO_MASK, - MADERA_HP1_EDRE_STEREO); - break; - - default: - break; - } -} - -static void cs47l35_hp_post_disable(struct snd_soc_dapm_widget *w) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - switch (w->shift) { - case MADERA_OUT1L_ENA_SHIFT: - snd_soc_write(codec, MADERA_DCS_HP1L_CONTROL, 0x2006); - break; - case MADERA_OUT1R_ENA_SHIFT: - snd_soc_write(codec, MADERA_DCS_HP1R_CONTROL, 0x2006); - break; - default: - return; - } - - /* Only get to here for OUT1L and OUT1R */ - snd_soc_update_bits(codec, - MADERA_EDRE_HP_STEREO_CONTROL, - MADERA_HP1_EDRE_STEREO_MASK, - 0); -} - -static int cs47l35_hp_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - int ret; - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - case SND_SOC_DAPM_PRE_PMD: - return madera_hp_ev(w, kcontrol, event); - case SND_SOC_DAPM_POST_PMU: - ret = madera_hp_ev(w, kcontrol, event); - if (ret < 0) - return ret; - - cs47l35_hp_post_enable(w); - return 0; - case SND_SOC_DAPM_POST_PMD: - ret = madera_hp_ev(w, kcontrol, event); - cs47l35_hp_post_disable(w); - return ret; - default: - return -EINVAL; - } -} - -static const struct soc_enum cs47l35_input_rate = - SOC_VALUE_ENUM_SINGLE(MADERA_INPUT_RATE, - MADERA_IN_RATE_SHIFT, - 0x0f, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val); - -static const struct snd_kcontrol_new cs47l35_snd_controls[] = { -SOC_ENUM("IN1 OSR", madera_in_dmic_osr[0]), -SOC_ENUM("IN2 OSR", madera_in_dmic_osr[1]), - -SOC_SINGLE_RANGE_TLV("IN1L Volume", MADERA_IN1L_CONTROL, - MADERA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv), -SOC_SINGLE_RANGE_TLV("IN1R Volume", MADERA_IN1R_CONTROL, - MADERA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv), -SOC_SINGLE_RANGE_TLV("IN2L Volume", MADERA_IN2L_CONTROL, - MADERA_IN2L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv), -SOC_SINGLE_RANGE_TLV("IN2R Volume", MADERA_IN2R_CONTROL, - MADERA_IN2R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv), - -SOC_ENUM("IN HPF Cutoff Frequency", madera_in_hpf_cut_enum), - -SOC_SINGLE("IN1L HPF Switch", MADERA_IN1L_CONTROL, - MADERA_IN1L_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN1R HPF Switch", MADERA_IN1R_CONTROL, - MADERA_IN1R_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN2L HPF Switch", MADERA_IN2L_CONTROL, - MADERA_IN2L_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN2R HPF Switch", MADERA_IN2R_CONTROL, - MADERA_IN2R_HPF_SHIFT, 1, 0), - -SOC_SINGLE_EXT("Set Trigger State Switch", SND_SOC_NOPM, 0, 1, 0, - cs47l35_get_trig_state, - cs47l35_put_trig_state), -SOC_SINGLE_EXT("Get DSP1 State", SND_SOC_NOPM, 0, 1, 0, cs47l35_get_dsp_state, - cs47l35_put_dsp_state), -SOC_SINGLE_EXT("Get DSP2 State", SND_SOC_NOPM, 1, 1, 0, cs47l35_get_dsp_state, - cs47l35_put_dsp_state), -SOC_SINGLE_EXT("Get DSP3 State", SND_SOC_NOPM, 2, 1, 0, cs47l35_get_dsp_state, - cs47l35_put_dsp_state), - -SOC_SINGLE_TLV("IN1L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1L, - MADERA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN1R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1R, - MADERA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN2L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2L, - MADERA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN2R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2R, - MADERA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), - -SOC_ENUM("Input Ramp Up", madera_in_vi_ramp), -SOC_ENUM("Input Ramp Down", madera_in_vd_ramp), - -MADERA_FRF_BYTES("FRF COEFF 1L", MADERA_FRF_COEFFICIENT_1L_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 1R", MADERA_FRF_COEFFICIENT_1R_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 4L", CS47L35_FRF_COEFFICIENT_4L_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 5L", CS47L35_FRF_COEFFICIENT_5L_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 5R", CS47L35_FRF_COEFFICIENT_5R_1, - MADERA_FRF_COEFFICIENT_LEN), - -SND_SOC_BYTES("DAC COMP 1", MADERA_DAC_COMP_1, 1), -SND_SOC_BYTES("DAC COMP 2", MADERA_DAC_COMP_2, 1), - -MADERA_MIXER_CONTROLS("EQ1", MADERA_EQ1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("EQ2", MADERA_EQ2MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("EQ3", MADERA_EQ3MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("EQ4", MADERA_EQ4MIX_INPUT_1_SOURCE), - -MADERA_EQ_CONTROL("EQ1 Coefficients", MADERA_EQ1_2), -SOC_SINGLE_TLV("EQ1 B1 Volume", MADERA_EQ1_1, MADERA_EQ1_B1_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ1 B2 Volume", MADERA_EQ1_1, MADERA_EQ1_B2_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ1 B3 Volume", MADERA_EQ1_1, MADERA_EQ1_B3_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ1 B4 Volume", MADERA_EQ1_2, MADERA_EQ1_B4_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ1 B5 Volume", MADERA_EQ1_2, MADERA_EQ1_B5_GAIN_SHIFT, - 24, 0, madera_eq_tlv), - -MADERA_EQ_CONTROL("EQ2 Coefficients", MADERA_EQ2_2), -SOC_SINGLE_TLV("EQ2 B1 Volume", MADERA_EQ2_1, MADERA_EQ2_B1_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ2 B2 Volume", MADERA_EQ2_1, MADERA_EQ2_B2_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ2 B3 Volume", MADERA_EQ2_1, MADERA_EQ2_B3_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ2 B4 Volume", MADERA_EQ2_2, MADERA_EQ2_B4_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ2 B5 Volume", MADERA_EQ2_2, MADERA_EQ2_B5_GAIN_SHIFT, - 24, 0, madera_eq_tlv), - -MADERA_EQ_CONTROL("EQ3 Coefficients", MADERA_EQ3_2), -SOC_SINGLE_TLV("EQ3 B1 Volume", MADERA_EQ3_1, MADERA_EQ3_B1_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ3 B2 Volume", MADERA_EQ3_1, MADERA_EQ3_B2_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ3 B3 Volume", MADERA_EQ3_1, MADERA_EQ3_B3_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ3 B4 Volume", MADERA_EQ3_2, MADERA_EQ3_B4_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ3 B5 Volume", MADERA_EQ3_2, MADERA_EQ3_B5_GAIN_SHIFT, - 24, 0, madera_eq_tlv), - -MADERA_EQ_CONTROL("EQ4 Coefficients", MADERA_EQ4_2), -SOC_SINGLE_TLV("EQ4 B1 Volume", MADERA_EQ4_1, MADERA_EQ4_B1_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ4 B2 Volume", MADERA_EQ4_1, MADERA_EQ4_B2_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ4 B3 Volume", MADERA_EQ4_1, MADERA_EQ4_B3_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ4 B4 Volume", MADERA_EQ4_2, MADERA_EQ4_B4_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ4 B5 Volume", MADERA_EQ4_2, MADERA_EQ4_B5_GAIN_SHIFT, - 24, 0, madera_eq_tlv), - -MADERA_MIXER_CONTROLS("DRC1L", MADERA_DRC1LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DRC1R", MADERA_DRC1RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DRC2L", MADERA_DRC2LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DRC2R", MADERA_DRC2RMIX_INPUT_1_SOURCE), - -SND_SOC_BYTES_MASK("DRC1", MADERA_DRC1_CTRL1, 5, - MADERA_DRC1R_ENA | MADERA_DRC1L_ENA), -SND_SOC_BYTES_MASK("DRC2", MADERA_DRC2_CTRL1, 5, - MADERA_DRC2R_ENA | MADERA_DRC2L_ENA), - -MADERA_MIXER_CONTROLS("LHPF1", MADERA_HPLP1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("LHPF2", MADERA_HPLP2MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("LHPF3", MADERA_HPLP3MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("LHPF4", MADERA_HPLP4MIX_INPUT_1_SOURCE), - -MADERA_LHPF_CONTROL("LHPF1 Coefficients", MADERA_HPLPF1_2), -MADERA_LHPF_CONTROL("LHPF2 Coefficients", MADERA_HPLPF2_2), -MADERA_LHPF_CONTROL("LHPF3 Coefficients", MADERA_HPLPF3_2), -MADERA_LHPF_CONTROL("LHPF4 Coefficients", MADERA_HPLPF4_2), - -SOC_ENUM("LHPF1 Mode", madera_lhpf1_mode), -SOC_ENUM("LHPF2 Mode", madera_lhpf2_mode), -SOC_ENUM("LHPF3 Mode", madera_lhpf3_mode), -SOC_ENUM("LHPF4 Mode", madera_lhpf4_mode), - -SOC_ENUM("Sample Rate 2", madera_sample_rate[0]), -SOC_ENUM("Sample Rate 3", madera_sample_rate[1]), - -MADERA_RATE_ENUM("FX Rate", madera_fx_rate), - -MADERA_RATE_ENUM("ISRC1 FSL", madera_isrc_fsl[0]), -MADERA_RATE_ENUM("ISRC2 FSL", madera_isrc_fsl[1]), -MADERA_RATE_ENUM("ISRC1 FSH", madera_isrc_fsh[0]), -MADERA_RATE_ENUM("ISRC2 FSH", madera_isrc_fsh[1]), - -WM_ADSP2_PRELOAD_SWITCH("DSP1", 1), -WM_ADSP2_PRELOAD_SWITCH("DSP2", 2), -WM_ADSP2_PRELOAD_SWITCH("DSP3", 3), - -MADERA_MIXER_CONTROLS("DSP1L", MADERA_DSP1LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP1R", MADERA_DSP1RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP2L", MADERA_DSP2LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP2R", MADERA_DSP2RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP3L", MADERA_DSP3LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP3R", MADERA_DSP3RMIX_INPUT_1_SOURCE), - -SOC_SINGLE_TLV("Noise Generator Volume", MADERA_COMFORT_NOISE_GENERATOR, - MADERA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, madera_noise_tlv), - -MADERA_MIXER_CONTROLS("HPOUT1L", MADERA_OUT1LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("HPOUT1R", MADERA_OUT1RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SPKOUT", MADERA_OUT4LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SPKDATL", MADERA_OUT5LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SPKDATR", MADERA_OUT5RMIX_INPUT_1_SOURCE), - -SOC_SINGLE("HPOUT1 SC Protect Switch", MADERA_HP1_SHORT_CIRCUIT_CTRL, - MADERA_HP1_SC_ENA_SHIFT, 1, 0), - -SOC_SINGLE("HPOUT1L ONEFLT Switch", MADERA_HP_TEST_CTRL_5, - MADERA_HP1L_ONEFLT_SHIFT, 1, 0), -SOC_SINGLE("HPOUT1R ONEFLT Switch", MADERA_HP_TEST_CTRL_6, - MADERA_HP1R_ONEFLT_SHIFT, 1, 0), - -SOC_SINGLE("SPKDAT High Performance Switch", MADERA_OUTPUT_PATH_CONFIG_5L, - MADERA_OUT5_OSR_SHIFT, 1, 0), - -SOC_DOUBLE_R("HPOUT1 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_1L, - MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_MUTE_SHIFT, 1, 1), -SOC_SINGLE("Speaker Digital Switch", MADERA_DAC_DIGITAL_VOLUME_4L, - MADERA_OUT4L_MUTE_SHIFT, 1, 1), -SOC_DOUBLE_R("SPKDAT Digital Switch", MADERA_DAC_DIGITAL_VOLUME_5L, - MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_MUTE_SHIFT, 1, 1), - -SOC_DOUBLE_R_TLV("HPOUT1 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_1L, - MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_VOL_SHIFT, - 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("Speaker Digital Volume", MADERA_DAC_DIGITAL_VOLUME_4L, - MADERA_OUT4L_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_DOUBLE_R_TLV("SPKDAT Digital Volume", MADERA_DAC_DIGITAL_VOLUME_5L, - MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_VOL_SHIFT, - 0xbf, 0, madera_digital_tlv), - -SOC_DOUBLE("SPKDAT Switch", MADERA_PDM_SPK1_CTRL_1, MADERA_SPK1L_MUTE_SHIFT, - MADERA_SPK1R_MUTE_SHIFT, 1, 1), - -SOC_DOUBLE_EXT("HPOUT1 DRE Switch", MADERA_DRE_ENABLE, - MADERA_DRE1L_ENA_SHIFT, MADERA_DRE1R_ENA_SHIFT, 1, 0, - snd_soc_get_volsw, madera_put_dre), - -SOC_DOUBLE("HPOUT1 EDRE Switch", MADERA_EDRE_ENABLE, - MADERA_EDRE_OUT1L_THR1_ENA_SHIFT, - MADERA_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0), - -SOC_SINGLE("Speaker THR1 EDRE Switch", MADERA_EDRE_ENABLE, - MADERA_EDRE_OUT4L_THR1_ENA_SHIFT, 1, 0), - -SOC_ENUM("Output Ramp Up", madera_out_vi_ramp), -SOC_ENUM("Output Ramp Down", madera_out_vd_ramp), - -MADERA_RATE_ENUM("SPDIF1 Rate", madera_spdif_rate), - -SOC_SINGLE("Noise Gate Switch", MADERA_NOISE_GATE_CONTROL, - MADERA_NGATE_ENA_SHIFT, 1, 0), -SOC_SINGLE_TLV("Noise Gate Threshold Volume", MADERA_NOISE_GATE_CONTROL, - MADERA_NGATE_THR_SHIFT, 7, 1, madera_ng_tlv), -SOC_ENUM("Noise Gate Hold", madera_ng_hold), - -MADERA_RATE_ENUM("Output Rate 1", madera_output_rate), -SOC_ENUM("In Rate", cs47l35_input_rate), - -CS47L35_NG_SRC("HPOUT1L", MADERA_NOISE_GATE_SELECT_1L), -CS47L35_NG_SRC("HPOUT1R", MADERA_NOISE_GATE_SELECT_1R), -CS47L35_NG_SRC("SPKOUT", MADERA_NOISE_GATE_SELECT_4L), -CS47L35_NG_SRC("SPKDATL", MADERA_NOISE_GATE_SELECT_5L), -CS47L35_NG_SRC("SPKDATR", MADERA_NOISE_GATE_SELECT_5R), - -MADERA_MIXER_CONTROLS("AIF1TX1", MADERA_AIF1TX1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX2", MADERA_AIF1TX2MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX3", MADERA_AIF1TX3MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX4", MADERA_AIF1TX4MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX5", MADERA_AIF1TX5MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX6", MADERA_AIF1TX6MIX_INPUT_1_SOURCE), - -MADERA_MIXER_CONTROLS("AIF2TX1", MADERA_AIF2TX1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF2TX2", MADERA_AIF2TX2MIX_INPUT_1_SOURCE), - -MADERA_MIXER_CONTROLS("AIF3TX1", MADERA_AIF3TX1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF3TX2", MADERA_AIF3TX2MIX_INPUT_1_SOURCE), - -MADERA_MIXER_CONTROLS("SLIMTX1", MADERA_SLIMTX1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX2", MADERA_SLIMTX2MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX3", MADERA_SLIMTX3MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX4", MADERA_SLIMTX4MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX5", MADERA_SLIMTX5MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX6", MADERA_SLIMTX6MIX_INPUT_1_SOURCE), - -MADERA_GAINMUX_CONTROLS("SPDIF1TX1", MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE), -MADERA_GAINMUX_CONTROLS("SPDIF1TX2", MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE), -}; - -MADERA_MIXER_ENUMS(EQ1, MADERA_EQ1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(EQ2, MADERA_EQ2MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(EQ3, MADERA_EQ3MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(EQ4, MADERA_EQ4MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DRC1L, MADERA_DRC1LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DRC1R, MADERA_DRC1RMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DRC2L, MADERA_DRC2LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DRC2R, MADERA_DRC2RMIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(LHPF1, MADERA_HPLP1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(LHPF2, MADERA_HPLP2MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(LHPF3, MADERA_HPLP3MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(LHPF4, MADERA_HPLP4MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DSP1L, MADERA_DSP1LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DSP1R, MADERA_DSP1RMIX_INPUT_1_SOURCE); -MADERA_DSP_AUX_ENUMS(DSP1, MADERA_DSP1AUX1MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DSP2L, MADERA_DSP2LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DSP2R, MADERA_DSP2RMIX_INPUT_1_SOURCE); -MADERA_DSP_AUX_ENUMS(DSP2, MADERA_DSP2AUX1MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DSP3L, MADERA_DSP3LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DSP3R, MADERA_DSP3RMIX_INPUT_1_SOURCE); -MADERA_DSP_AUX_ENUMS(DSP3, MADERA_DSP3AUX1MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(PWM1, MADERA_PWM1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(PWM2, MADERA_PWM2MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(OUT1L, MADERA_OUT1LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(OUT1R, MADERA_OUT1RMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SPKOUT, MADERA_OUT4LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SPKDAT1L, MADERA_OUT5LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SPKDAT1R, MADERA_OUT5RMIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(AIF1TX1, MADERA_AIF1TX1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX2, MADERA_AIF1TX2MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX3, MADERA_AIF1TX3MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX4, MADERA_AIF1TX4MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX5, MADERA_AIF1TX5MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX6, MADERA_AIF1TX6MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(AIF2TX1, MADERA_AIF2TX1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF2TX2, MADERA_AIF2TX2MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(AIF3TX1, MADERA_AIF3TX1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF3TX2, MADERA_AIF3TX2MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(SLIMTX1, MADERA_SLIMTX1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX2, MADERA_SLIMTX2MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX3, MADERA_SLIMTX3MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX4, MADERA_SLIMTX4MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX5, MADERA_SLIMTX5MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX6, MADERA_SLIMTX6MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(SPD1TX1, MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(SPD1TX2, MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC1INT1, MADERA_ISRC1INT1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1INT2, MADERA_ISRC1INT2MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1INT3, MADERA_ISRC1INT3MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1INT4, MADERA_ISRC1INT4MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC1DEC1, MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1DEC2, MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1DEC3, MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1DEC4, MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC2INT1, MADERA_ISRC2INT1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2INT2, MADERA_ISRC2INT2MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2INT3, MADERA_ISRC2INT3MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2INT4, MADERA_ISRC2INT4MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC2DEC1, MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2DEC2, MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2DEC3, MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2DEC4, MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE); - -static const char * const cs47l35_memory_mux_texts[] = { - "None", - "Shared Memory", -}; - -static const struct soc_enum cs47l35_memory_enum = - SOC_ENUM_SINGLE(SND_SOC_NOPM, 0, ARRAY_SIZE(cs47l35_memory_mux_texts), - cs47l35_memory_mux_texts); - -static const struct snd_kcontrol_new cs47l35_memory_mux[] = { - SOC_DAPM_ENUM("DSP2 Virtual Input", cs47l35_memory_enum), - SOC_DAPM_ENUM("DSP3 Virtual Input", cs47l35_memory_enum), -}; - -static const char * const cs47l35_aec_loopback_texts[] = { - "HPOUT1L", "HPOUT1R", "SPKOUT", "SPKDATL", "SPKDATR", -}; - -static const unsigned int cs47l35_aec_loopback_values[] = { - 0, 1, 6, 8, 9, -}; - -static const struct soc_enum cs47l35_aec_loopback = - SOC_VALUE_ENUM_SINGLE(MADERA_DAC_AEC_CONTROL_1, - MADERA_AEC1_LOOPBACK_SRC_SHIFT, 0xf, - ARRAY_SIZE(cs47l35_aec_loopback_texts), - cs47l35_aec_loopback_texts, - cs47l35_aec_loopback_values); - -static const struct snd_kcontrol_new cs47l35_aec_loopback_mux = - SOC_DAPM_ENUM("AEC1 Loopback", cs47l35_aec_loopback); - -static const struct snd_soc_dapm_widget cs47l35_dapm_widgets[] = { -SND_SOC_DAPM_SUPPLY("SYSCLK", MADERA_SYSTEM_CLOCK_1, MADERA_SYSCLK_ENA_SHIFT, - 0, madera_sysclk_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK, - MADERA_OPCLK_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("DSPCLK", MADERA_DSP_CLOCK_1, 6, - 0, NULL, 0), - -SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD2", 0, 0), -SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD1", 20, 0), -SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD2", 20, 0), -SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS), -SND_SOC_DAPM_REGULATOR_SUPPLY("SPKVDD", 0, 0), - -SND_SOC_DAPM_SUPPLY("MICBIAS1", MADERA_MIC_BIAS_CTRL_1, - MADERA_MICB1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS2", MADERA_MIC_BIAS_CTRL_2, - MADERA_MICB1_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_SUPPLY("MICBIAS1A", MADERA_MIC_BIAS_CTRL_5, - MADERA_MICB1A_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS1B", MADERA_MIC_BIAS_CTRL_5, - MADERA_MICB1B_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS2A", MADERA_MIC_BIAS_CTRL_6, - MADERA_MICB2A_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS2B", MADERA_MIC_BIAS_CTRL_6, - MADERA_MICB2B_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_SUPPLY("GPSW", MADERA_GP_SWITCH_1, - 0, 0, NULL, 0), - -SND_SOC_DAPM_SIGGEN("TONE"), -SND_SOC_DAPM_SIGGEN("NOISE"), - -SND_SOC_DAPM_INPUT("IN1AL"), -SND_SOC_DAPM_INPUT("IN1AR"), -SND_SOC_DAPM_INPUT("IN1BL"), -SND_SOC_DAPM_INPUT("IN1BR"), -SND_SOC_DAPM_INPUT("IN2L"), -SND_SOC_DAPM_INPUT("IN2R"), -SND_SOC_DAPM_INPUT("DSP Virtual Input"), - -SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), -SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), - -SND_SOC_DAPM_OUTPUT("DSP1 Trigger Out"), -SND_SOC_DAPM_OUTPUT("DSP2 Trigger Out"), -SND_SOC_DAPM_OUTPUT("DSP3 Trigger Out"), - -SND_SOC_DAPM_OUTPUT("DSP1 Virtual Output"), -SND_SOC_DAPM_OUTPUT("DSP2 Virtual Output"), -SND_SOC_DAPM_OUTPUT("DSP3 Virtual Output"), - -SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[0]), -SND_SOC_DAPM_MUX("IN1R Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[1]), - -SND_SOC_DAPM_DEMUX("HPOUT1 Demux", SND_SOC_NOPM, 0, 0, &cs47l35_outdemux), - -SND_SOC_DAPM_PGA("PWM1 Driver", MADERA_PWM_DRIVE_1, MADERA_PWM1_ENA_SHIFT, - 0, NULL, 0), -SND_SOC_DAPM_PGA("PWM2 Driver", MADERA_PWM_DRIVE_1, MADERA_PWM2_ENA_SHIFT, - 0, NULL, 0), - -SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX3_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX4_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX5_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX6_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, - MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, - MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX2_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0, - MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 0, - MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX2_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_OUT_E("SLIMTX1", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX1_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX2", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX2_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX3", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX3_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX4", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX4_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX5", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX5_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX6", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX6_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - -SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, - MADERA_OUT1L_ENA_SHIFT, 0, NULL, 0, cs47l35_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, - MADERA_OUT1R_ENA_SHIFT, 0, NULL, 0, cs47l35_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("OUT5L", MADERA_OUTPUT_ENABLES_1, - MADERA_OUT5L_ENA_SHIFT, 0, NULL, 0, madera_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("OUT5R", MADERA_OUTPUT_ENABLES_1, - MADERA_OUT5R_ENA_SHIFT, 0, NULL, 0, madera_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), - -SND_SOC_DAPM_PGA("SPD1TX1", MADERA_SPD1_TX_CONTROL, - MADERA_SPD1_VAL1_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("SPD1TX2", MADERA_SPD1_TX_CONTROL, - MADERA_SPD1_VAL2_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_OUT_DRV("SPD1", MADERA_SPD1_TX_CONTROL, - MADERA_SPD1_ENA_SHIFT, 0, NULL, 0), - -/* Input mux widgets arranged in order of sources in MADERA_MIXER_INPUT_ROUTES - * to take advantage of cache lookup in DAPM - */ -SND_SOC_DAPM_PGA("Noise Generator", MADERA_COMFORT_NOISE_GENERATOR, - MADERA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("Tone Generator 1", MADERA_TONE_GENERATOR_1, - MADERA_TONE1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("Tone Generator 2", MADERA_TONE_GENERATOR_1, - MADERA_TONE2_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_MIC("HAPTICS", NULL), - -SND_SOC_DAPM_MUX("AEC1 Loopback", MADERA_DAC_AEC_CONTROL_1, - MADERA_AEC1_LOOPBACK_ENA_SHIFT, 0, - &cs47l35_aec_loopback_mux), - -SND_SOC_DAPM_PGA_E("IN1L PGA", MADERA_INPUT_ENABLES, MADERA_IN1L_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN1R PGA", MADERA_INPUT_ENABLES, MADERA_IN1R_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN2L PGA", MADERA_INPUT_ENABLES, MADERA_IN2L_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN2R PGA", MADERA_INPUT_ENABLES, MADERA_IN2R_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), - -SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX3_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX4_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX5_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX6_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, - MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, - MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX2_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, - MADERA_AIF3_RX_ENABLES, MADERA_AIF3RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, - MADERA_AIF3_RX_ENABLES, MADERA_AIF3RX2_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_IN_E("SLIMRX1", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX1_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX2", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX2_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX3", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX3_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX4", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX4_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX5", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX5_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX6", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX6_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - -SND_SOC_DAPM_PGA("EQ1", MADERA_EQ1_1, MADERA_EQ1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("EQ2", MADERA_EQ2_1, MADERA_EQ2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("EQ3", MADERA_EQ3_1, MADERA_EQ3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("EQ4", MADERA_EQ4_1, MADERA_EQ4_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("DRC1L", MADERA_DRC1_CTRL1, MADERA_DRC1L_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("DRC1R", MADERA_DRC1_CTRL1, MADERA_DRC1R_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("DRC2L", MADERA_DRC2_CTRL1, MADERA_DRC2L_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("DRC2R", MADERA_DRC2_CTRL1, MADERA_DRC2R_ENA_SHIFT, 0, - NULL, 0), - -SND_SOC_DAPM_PGA("LHPF1", MADERA_HPLPF1_1, MADERA_LHPF1_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("LHPF2", MADERA_HPLPF2_1, MADERA_LHPF2_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("LHPF3", MADERA_HPLPF3_1, MADERA_LHPF3_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("LHPF4", MADERA_HPLPF4_1, MADERA_LHPF4_ENA_SHIFT, 0, - NULL, 0), - -SND_SOC_DAPM_PGA("ISRC1DEC1", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1DEC2", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1DEC3", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1DEC4", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_DEC4_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC1INT1", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1INT2", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1INT3", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1INT4", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_INT4_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC2DEC1", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2DEC2", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2DEC3", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2DEC4", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_DEC4_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC2INT1", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2INT2", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2INT3", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2INT4", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_INT4_ENA_SHIFT, 0, NULL, 0), - -WM_ADSP2("DSP1", 0, cs47l35_adsp_power_ev), -WM_ADSP2("DSP2", 1, cs47l35_adsp_power_ev), -WM_ADSP2("DSP3", 2, cs47l35_adsp_power_ev), - -/* End of ordered input mux widgets */ - -MADERA_MIXER_WIDGETS(EQ1, "EQ1"), -MADERA_MIXER_WIDGETS(EQ2, "EQ2"), -MADERA_MIXER_WIDGETS(EQ3, "EQ3"), -MADERA_MIXER_WIDGETS(EQ4, "EQ4"), - -MADERA_MIXER_WIDGETS(DRC1L, "DRC1L"), -MADERA_MIXER_WIDGETS(DRC1R, "DRC1R"), -MADERA_MIXER_WIDGETS(DRC2L, "DRC2L"), -MADERA_MIXER_WIDGETS(DRC2R, "DRC2R"), - -SND_SOC_DAPM_SWITCH("DRC1 Activity Output", SND_SOC_NOPM, 0, 0, - &madera_drc_activity_output_mux[0]), -SND_SOC_DAPM_SWITCH("DRC2 Activity Output", SND_SOC_NOPM, 0, 0, - &madera_drc_activity_output_mux[1]), - -MADERA_MIXER_WIDGETS(LHPF1, "LHPF1"), -MADERA_MIXER_WIDGETS(LHPF2, "LHPF2"), -MADERA_MIXER_WIDGETS(LHPF3, "LHPF3"), -MADERA_MIXER_WIDGETS(LHPF4, "LHPF4"), - -MADERA_MIXER_WIDGETS(PWM1, "PWM1"), -MADERA_MIXER_WIDGETS(PWM2, "PWM2"), - -MADERA_MIXER_WIDGETS(OUT1L, "HPOUT1L"), -MADERA_MIXER_WIDGETS(OUT1R, "HPOUT1R"), -MADERA_MIXER_WIDGETS(SPKOUT, "SPKOUT"), -MADERA_MIXER_WIDGETS(SPKDAT1L, "SPKDATL"), -MADERA_MIXER_WIDGETS(SPKDAT1R, "SPKDATR"), - -MADERA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"), -MADERA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"), -MADERA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"), -MADERA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"), -MADERA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"), -MADERA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"), - -MADERA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), -MADERA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), - -MADERA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), -MADERA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), - -MADERA_MIXER_WIDGETS(SLIMTX1, "SLIMTX1"), -MADERA_MIXER_WIDGETS(SLIMTX2, "SLIMTX2"), -MADERA_MIXER_WIDGETS(SLIMTX3, "SLIMTX3"), -MADERA_MIXER_WIDGETS(SLIMTX4, "SLIMTX4"), -MADERA_MIXER_WIDGETS(SLIMTX5, "SLIMTX5"), -MADERA_MIXER_WIDGETS(SLIMTX6, "SLIMTX6"), - -MADERA_MUX_WIDGETS(SPD1TX1, "SPDIF1TX1"), -MADERA_MUX_WIDGETS(SPD1TX2, "SPDIF1TX2"), - -MADERA_DSP_WIDGETS(DSP1, "DSP1"), -MADERA_DSP_WIDGETS(DSP2, "DSP2"), -MADERA_DSP_WIDGETS(DSP3, "DSP3"), - -SND_SOC_DAPM_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, - &cs47l35_memory_mux[0]), -SND_SOC_DAPM_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, - &cs47l35_memory_mux[1]), - -SND_SOC_DAPM_SWITCH("DSP1 Trigger Output", SND_SOC_NOPM, 0, 0, - &madera_dsp_trigger_output_mux[0]), -SND_SOC_DAPM_SWITCH("DSP2 Trigger Output", SND_SOC_NOPM, 0, 0, - &madera_dsp_trigger_output_mux[1]), -SND_SOC_DAPM_SWITCH("DSP3 Trigger Output", SND_SOC_NOPM, 0, 0, - &madera_dsp_trigger_output_mux[2]), - -MADERA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), -MADERA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), -MADERA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), -MADERA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"), - -MADERA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), -MADERA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), -MADERA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"), -MADERA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"), - -MADERA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), -MADERA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), -MADERA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"), -MADERA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"), - -MADERA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), -MADERA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), -MADERA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"), -MADERA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"), - -SND_SOC_DAPM_OUTPUT("HPOUTL"), -SND_SOC_DAPM_OUTPUT("HPOUTR"), -SND_SOC_DAPM_OUTPUT("EPOUTP"), -SND_SOC_DAPM_OUTPUT("EPOUTN"), -SND_SOC_DAPM_OUTPUT("SPKOUTN"), -SND_SOC_DAPM_OUTPUT("SPKOUTP"), -SND_SOC_DAPM_OUTPUT("SPKDATL"), -SND_SOC_DAPM_OUTPUT("SPKDATR"), -SND_SOC_DAPM_OUTPUT("SPDIF1"), - -SND_SOC_DAPM_OUTPUT("MICSUPP"), -}; - -#define MADERA_MIXER_INPUT_ROUTES(name) \ - { name, "Noise Generator", "Noise Generator" }, \ - { name, "Tone Generator 1", "Tone Generator 1" }, \ - { name, "Tone Generator 2", "Tone Generator 2" }, \ - { name, "Haptics", "HAPTICS" }, \ - { name, "AEC1", "AEC1 Loopback" }, \ - { name, "IN1L", "IN1L PGA" }, \ - { name, "IN1R", "IN1R PGA" }, \ - { name, "IN2L", "IN2L PGA" }, \ - { name, "IN2R", "IN2R PGA" }, \ - { name, "AIF1RX1", "AIF1RX1" }, \ - { name, "AIF1RX2", "AIF1RX2" }, \ - { name, "AIF1RX3", "AIF1RX3" }, \ - { name, "AIF1RX4", "AIF1RX4" }, \ - { name, "AIF1RX5", "AIF1RX5" }, \ - { name, "AIF1RX6", "AIF1RX6" }, \ - { name, "AIF2RX1", "AIF2RX1" }, \ - { name, "AIF2RX2", "AIF2RX2" }, \ - { name, "AIF3RX1", "AIF3RX1" }, \ - { name, "AIF3RX2", "AIF3RX2" }, \ - { name, "SLIMRX1", "SLIMRX1" }, \ - { name, "SLIMRX2", "SLIMRX2" }, \ - { name, "SLIMRX3", "SLIMRX3" }, \ - { name, "SLIMRX4", "SLIMRX4" }, \ - { name, "SLIMRX5", "SLIMRX5" }, \ - { name, "SLIMRX6", "SLIMRX6" }, \ - { name, "EQ1", "EQ1" }, \ - { name, "EQ2", "EQ2" }, \ - { name, "EQ3", "EQ3" }, \ - { name, "EQ4", "EQ4" }, \ - { name, "DRC1L", "DRC1L" }, \ - { name, "DRC1R", "DRC1R" }, \ - { name, "DRC2L", "DRC2L" }, \ - { name, "DRC2R", "DRC2R" }, \ - { name, "LHPF1", "LHPF1" }, \ - { name, "LHPF2", "LHPF2" }, \ - { name, "LHPF3", "LHPF3" }, \ - { name, "LHPF4", "LHPF4" }, \ - { name, "ISRC1DEC1", "ISRC1DEC1" }, \ - { name, "ISRC1DEC2", "ISRC1DEC2" }, \ - { name, "ISRC1DEC3", "ISRC1DEC3" }, \ - { name, "ISRC1DEC4", "ISRC1DEC4" }, \ - { name, "ISRC1INT1", "ISRC1INT1" }, \ - { name, "ISRC1INT2", "ISRC1INT2" }, \ - { name, "ISRC1INT3", "ISRC1INT3" }, \ - { name, "ISRC1INT4", "ISRC1INT4" }, \ - { name, "ISRC2DEC1", "ISRC2DEC1" }, \ - { name, "ISRC2DEC2", "ISRC2DEC2" }, \ - { name, "ISRC2DEC3", "ISRC2DEC3" }, \ - { name, "ISRC2DEC4", "ISRC2DEC4" }, \ - { name, "ISRC2INT1", "ISRC2INT1" }, \ - { name, "ISRC2INT2", "ISRC2INT2" }, \ - { name, "ISRC2INT3", "ISRC2INT3" }, \ - { name, "ISRC2INT4", "ISRC2INT4" }, \ - { name, "DSP1.1", "DSP1" }, \ - { name, "DSP1.2", "DSP1" }, \ - { name, "DSP1.3", "DSP1" }, \ - { name, "DSP1.4", "DSP1" }, \ - { name, "DSP1.5", "DSP1" }, \ - { name, "DSP1.6", "DSP1" }, \ - { name, "DSP2.1", "DSP2" }, \ - { name, "DSP2.2", "DSP2" }, \ - { name, "DSP2.3", "DSP2" }, \ - { name, "DSP2.4", "DSP2" }, \ - { name, "DSP2.5", "DSP2" }, \ - { name, "DSP2.6", "DSP2" }, \ - { name, "DSP3.1", "DSP3" }, \ - { name, "DSP3.2", "DSP3" }, \ - { name, "DSP3.3", "DSP3" }, \ - { name, "DSP3.4", "DSP3" }, \ - { name, "DSP3.5", "DSP3" }, \ - { name, "DSP3.6", "DSP3" } - -static const struct snd_soc_dapm_route cs47l35_dapm_routes[] = { - { "AIF2 Capture", NULL, "DBVDD2" }, - { "AIF2 Playback", NULL, "DBVDD2" }, - - { "AIF3 Capture", NULL, "DBVDD2" }, - { "AIF3 Playback", NULL, "DBVDD2" }, - - { "OUT1L", NULL, "CPVDD1" }, - { "OUT1R", NULL, "CPVDD1" }, - { "OUT1L", NULL, "CPVDD2" }, - { "OUT1R", NULL, "CPVDD2" }, - - { "OUT4L", NULL, "SPKVDD" }, - - { "OUT1L", NULL, "SYSCLK" }, - { "OUT1R", NULL, "SYSCLK" }, - { "OUT4L", NULL, "SYSCLK" }, - { "OUT5L", NULL, "SYSCLK" }, - { "OUT5R", NULL, "SYSCLK" }, - - { "SPD1", NULL, "SYSCLK" }, - { "SPD1", NULL, "SPD1TX1" }, - { "SPD1", NULL, "SPD1TX2" }, - - { "IN1AL", NULL, "SYSCLK" }, - { "IN1AR", NULL, "SYSCLK" }, - { "IN1BL", NULL, "SYSCLK" }, - { "IN1BR", NULL, "SYSCLK" }, - { "IN2L", NULL, "SYSCLK" }, - { "IN2R", NULL, "SYSCLK" }, - - { "DSP1", NULL, "DSPCLK"}, - { "DSP2", NULL, "DSPCLK"}, - { "DSP3", NULL, "DSPCLK"}, - - { "MICBIAS1", NULL, "MICVDD" }, - { "MICBIAS2", NULL, "MICVDD" }, - - { "MICBIAS1A", NULL, "MICBIAS1" }, - { "MICBIAS1B", NULL, "MICBIAS1" }, - { "MICBIAS2A", NULL, "MICBIAS2" }, - { "MICBIAS2B", NULL, "MICBIAS2" }, - - { "Noise Generator", NULL, "SYSCLK" }, - { "Tone Generator 1", NULL, "SYSCLK" }, - { "Tone Generator 2", NULL, "SYSCLK" }, - - { "Noise Generator", NULL, "NOISE" }, - { "Tone Generator 1", NULL, "TONE" }, - { "Tone Generator 2", NULL, "TONE" }, - - { "AIF1 Capture", NULL, "AIF1TX1" }, - { "AIF1 Capture", NULL, "AIF1TX2" }, - { "AIF1 Capture", NULL, "AIF1TX3" }, - { "AIF1 Capture", NULL, "AIF1TX4" }, - { "AIF1 Capture", NULL, "AIF1TX5" }, - { "AIF1 Capture", NULL, "AIF1TX6" }, - - { "AIF1RX1", NULL, "AIF1 Playback" }, - { "AIF1RX2", NULL, "AIF1 Playback" }, - { "AIF1RX3", NULL, "AIF1 Playback" }, - { "AIF1RX4", NULL, "AIF1 Playback" }, - { "AIF1RX5", NULL, "AIF1 Playback" }, - { "AIF1RX6", NULL, "AIF1 Playback" }, - - { "AIF2 Capture", NULL, "AIF2TX1" }, - { "AIF2 Capture", NULL, "AIF2TX2" }, - - { "AIF2RX1", NULL, "AIF2 Playback" }, - { "AIF2RX2", NULL, "AIF2 Playback" }, - - { "AIF3 Capture", NULL, "AIF3TX1" }, - { "AIF3 Capture", NULL, "AIF3TX2" }, - - { "AIF3RX1", NULL, "AIF3 Playback" }, - { "AIF3RX2", NULL, "AIF3 Playback" }, - - { "Slim1 Capture", NULL, "SLIMTX1" }, - { "Slim1 Capture", NULL, "SLIMTX2" }, - { "Slim1 Capture", NULL, "SLIMTX3" }, - { "Slim1 Capture", NULL, "SLIMTX4" }, - - { "SLIMRX1", NULL, "Slim1 Playback" }, - { "SLIMRX2", NULL, "Slim1 Playback" }, - { "SLIMRX3", NULL, "Slim1 Playback" }, - { "SLIMRX4", NULL, "Slim1 Playback" }, - - { "Slim2 Capture", NULL, "SLIMTX5" }, - { "Slim2 Capture", NULL, "SLIMTX6" }, - - { "SLIMRX5", NULL, "Slim2 Playback" }, - { "SLIMRX6", NULL, "Slim2 Playback" }, - - { "AIF1 Playback", NULL, "SYSCLK" }, - { "AIF2 Playback", NULL, "SYSCLK" }, - { "AIF3 Playback", NULL, "SYSCLK" }, - { "Slim1 Playback", NULL, "SYSCLK" }, - { "Slim2 Playback", NULL, "SYSCLK" }, - - { "AIF1 Capture", NULL, "SYSCLK" }, - { "AIF2 Capture", NULL, "SYSCLK" }, - { "AIF3 Capture", NULL, "SYSCLK" }, - { "Slim1 Capture", NULL, "SYSCLK" }, - { "Slim2 Capture", NULL, "SYSCLK" }, - - { "Voice Control CPU", NULL, "Voice Control DSP" }, - { "Voice Control DSP", NULL, "DSP3" }, - { "Voice Control CPU", NULL, "SYSCLK" }, - { "Voice Control DSP", NULL, "SYSCLK" }, - - - { "Audio Trace DSP", NULL, "DSP1" }, - { "Audio Trace DSP", NULL, "SYSCLK" }, - - { "IN1L Mux", "A", "IN1AL" }, - { "IN1L Mux", "B", "IN1BL" }, - { "IN1R Mux", "A", "IN1AR" }, - { "IN1R Mux", "B", "IN1BR" }, - - { "IN1L PGA", NULL, "IN1L Mux" }, - { "IN1R PGA", NULL, "IN1R Mux" }, - - { "IN2L PGA", NULL, "IN2L" }, - { "IN2R PGA", NULL, "IN2R" }, - - MADERA_MIXER_ROUTES("OUT1L", "HPOUT1L"), - MADERA_MIXER_ROUTES("OUT1R", "HPOUT1R"), - - MADERA_MIXER_ROUTES("OUT4L", "SPKOUT"), - - MADERA_MIXER_ROUTES("OUT5L", "SPKDATL"), - MADERA_MIXER_ROUTES("OUT5R", "SPKDATR"), - - MADERA_MIXER_ROUTES("PWM1 Driver", "PWM1"), - MADERA_MIXER_ROUTES("PWM2 Driver", "PWM2"), - - MADERA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"), - MADERA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"), - MADERA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"), - MADERA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"), - MADERA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"), - MADERA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"), - - MADERA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), - MADERA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), - - MADERA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), - MADERA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), - - MADERA_MIXER_ROUTES("SLIMTX1", "SLIMTX1"), - MADERA_MIXER_ROUTES("SLIMTX2", "SLIMTX2"), - MADERA_MIXER_ROUTES("SLIMTX3", "SLIMTX3"), - MADERA_MIXER_ROUTES("SLIMTX4", "SLIMTX4"), - MADERA_MIXER_ROUTES("SLIMTX5", "SLIMTX5"), - MADERA_MIXER_ROUTES("SLIMTX6", "SLIMTX6"), - - MADERA_MUX_ROUTES("SPD1TX1", "SPDIF1TX1"), - MADERA_MUX_ROUTES("SPD1TX2", "SPDIF1TX2"), - - MADERA_MIXER_ROUTES("EQ1", "EQ1"), - MADERA_MIXER_ROUTES("EQ2", "EQ2"), - MADERA_MIXER_ROUTES("EQ3", "EQ3"), - MADERA_MIXER_ROUTES("EQ4", "EQ4"), - - MADERA_MIXER_ROUTES("DRC1L", "DRC1L"), - MADERA_MIXER_ROUTES("DRC1R", "DRC1R"), - MADERA_MIXER_ROUTES("DRC2L", "DRC2L"), - MADERA_MIXER_ROUTES("DRC2R", "DRC2R"), - - MADERA_MIXER_ROUTES("LHPF1", "LHPF1"), - MADERA_MIXER_ROUTES("LHPF2", "LHPF2"), - MADERA_MIXER_ROUTES("LHPF3", "LHPF3"), - MADERA_MIXER_ROUTES("LHPF4", "LHPF4"), - - MADERA_DSP_ROUTES("DSP1"), - MADERA_DSP_ROUTES("DSP2"), - MADERA_DSP_ROUTES("DSP3"), - - { "DSP2 Preloader", NULL, "DSP2 Virtual Input" }, - { "DSP2 Virtual Input", "Shared Memory", "DSP3" }, - { "DSP3 Preloader", NULL, "DSP3 Virtual Input" }, - { "DSP3 Virtual Input", "Shared Memory", "DSP2" }, - - { "DSP1 Trigger Out", NULL, "SYSCLK" }, - { "DSP1 Trigger Out", NULL, "DSP1 Trigger Output" }, - { "DSP2 Trigger Out", NULL, "DSP2 Trigger Output" }, - { "DSP3 Trigger Out", NULL, "DSP3 Trigger Output" }, - - { "DSP1 Trigger Output", "Switch", "DSP1" }, - { "DSP2 Trigger Output", "Switch", "DSP2" }, - { "DSP3 Trigger Output", "Switch", "DSP3" }, - - { "DSP1 Preloader", NULL, "DSP Virtual Input" }, - { "DSP1 Trigger Out", NULL, "DSP1 Virtual Output" }, - { "DSP1 Virtual Output", NULL, "SYSCLK" }, - - { "DSP2 Preloader", NULL, "DSP Virtual Input" }, - { "DSP2 Trigger Out", NULL, "DSP2 Virtual Output" }, - { "DSP2 Virtual Output", NULL, "SYSCLK" }, - - { "DSP3 Preloader", NULL, "DSP Virtual Input" }, - { "DSP3 Trigger Out", NULL, "DSP3 Virtual Output" }, - { "DSP3 Virtual Output", NULL, "SYSCLK" }, - - {"LHPF1 Input 1", NULL, "DSP Virtual Input"}, - {"LHPF2 Input 1", NULL, "DSP Virtual Input"}, - {"LHPF3 Input 1", NULL, "DSP Virtual Input"}, - - MADERA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), - MADERA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), - MADERA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), - MADERA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"), - - MADERA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), - MADERA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), - MADERA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"), - MADERA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"), - - MADERA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), - MADERA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), - MADERA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"), - MADERA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"), - - MADERA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), - MADERA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), - MADERA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"), - MADERA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"), - - { "AEC1 Loopback", "HPOUT1L", "OUT1L" }, - { "AEC1 Loopback", "HPOUT1R", "OUT1R" }, - { "HPOUT1 Demux", NULL, "OUT1L" }, - { "HPOUT1 Demux", NULL, "OUT1R" }, - - { "AEC1 Loopback", "SPKOUT", "OUT4L" }, - { "SPKOUTN", NULL, "OUT4L" }, - { "SPKOUTP", NULL, "OUT4L" }, - - { "HPOUTL", "HPOUT", "HPOUT1 Demux" }, - { "HPOUTR", "HPOUT", "HPOUT1 Demux" }, - { "EPOUTP", "EPOUT", "HPOUT1 Demux" }, - { "EPOUTN", "EPOUT", "HPOUT1 Demux" }, - - { "AEC1 Loopback", "SPKDATL", "OUT5L" }, - { "AEC1 Loopback", "SPKDATR", "OUT5R" }, - { "SPKDATL", NULL, "OUT5L" }, - { "SPKDATR", NULL, "OUT5R" }, - { "SPKDAT Capture", NULL, "SPKDATL" }, - { "SPKDAT Capture", NULL, "SPKDATR" }, - - { "SPDIF1", NULL, "SPD1" }, - - { "MICSUPP", NULL, "SYSCLK" }, - - { "DRC1 Signal Activity", NULL, "DRC1 Activity Output" }, - { "DRC2 Signal Activity", NULL, "DRC2 Activity Output" }, - { "DRC1 Activity Output", "Switch", "DRC1L" }, - { "DRC1 Activity Output", "Switch", "DRC1R" }, - { "DRC2 Activity Output", "Switch", "DRC2L" }, - { "DRC2 Activity Output", "Switch", "DRC2R" }, -}; - -static int cs47l35_set_fll(struct snd_soc_codec *codec, int fll_id, int source, - unsigned int fref, unsigned int fout) -{ - struct cs47l35 *cs47l35 = snd_soc_codec_get_drvdata(codec); - - switch (fll_id) { - case MADERA_FLL1_REFCLK: - return madera_set_fll_refclk(&cs47l35->fll, source, fref, - fout); - case MADERA_FLL1_SYNCCLK: - return madera_set_fll_syncclk(&cs47l35->fll, source, fref, - fout); - default: - return -EINVAL; - } -} - -static struct snd_soc_dai_driver cs47l35_dai[] = { - { - .name = "cs47l35-aif1", - .id = 1, - .base = MADERA_AIF1_BCLK_CTRL, - .playback = { - .stream_name = "AIF1 Playback", - .channels_min = 1, - .channels_max = 6, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "AIF1 Capture", - .channels_min = 1, - .channels_max = 6, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_dai_ops, - .symmetric_rates = 1, - }, - { - .name = "cs47l35-aif2", - .id = 2, - .base = MADERA_AIF2_BCLK_CTRL, - .playback = { - .stream_name = "AIF2 Playback", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "AIF2 Capture", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_dai_ops, - .symmetric_rates = 1, - }, - { - .name = "cs47l35-aif3", - .id = 3, - .base = MADERA_AIF3_BCLK_CTRL, - .playback = { - .stream_name = "AIF3 Playback", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "AIF3 Capture", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_dai_ops, - .symmetric_rates = 1, - }, - { - .name = "cs47l35-slim1", - .id = 4, - .playback = { - .stream_name = "Slim1 Playback", - .channels_min = 1, - .channels_max = 4, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "Slim1 Capture", - .channels_min = 1, - .channels_max = 4, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_slim_dai_ops, - }, - { - .name = "cs47l35-slim2", - .id = 5, - .playback = { - .stream_name = "Slim2 Playback", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "Slim2 Capture", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_slim_dai_ops, - }, - { - .name = "cs47l35-pdm", - .id = 6, - .capture = { - .stream_name = "SPKDAT Capture", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, - { - .name = "cs47l35-cpu-voicectrl", - .capture = { - .stream_name = "Voice Control CPU", - .channels_min = 1, - .channels_max = 1, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .compress_new = snd_soc_new_compress, - }, - { - .name = "cs47l35-dsp-voicectrl", - .capture = { - .stream_name = "Voice Control DSP", - .channels_min = 1, - .channels_max = 1, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, - { - .name = "cs47l35-cpu-trace", - .capture = { - .stream_name = "Audio Trace CPU", - .channels_min = 1, - .channels_max = 6, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .compress_new = snd_soc_new_compress, - }, - { - .name = "cs47l35-dsp-trace", - .capture = { - .stream_name = "Audio Trace DSP", - .channels_min = 1, - .channels_max = 6, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, - { - .name = "cs47l35-dsp1-cpu-txt", - .capture = { - .stream_name = "Text DSP1 CPU", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .compress_new = snd_soc_new_compress, - }, - { - .name = "cs47l35-dsp1-txt", - .capture = { - .stream_name = "Text DSP1", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, - { - .name = "cs47l35-dsp2-cpu-txt", - .capture = { - .stream_name = "Text DSP2 CPU", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .compress_new = snd_soc_new_compress, - }, - { - .name = "cs47l35-dsp2-txt", - .capture = { - .stream_name = "Text DSP2", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, - { - .name = "cs47l35-dsp3-cpu-txt", - .capture = { - .stream_name = "Text DSP3 CPU", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .compress_new = snd_soc_new_compress, - }, - { - .name = "cs47l35-dsp3-txt", - .capture = { - .stream_name = "Text DSP3", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, -}; - - -static int cs47l35_open(struct snd_compr_stream *stream) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct cs47l35 *cs47l35 = snd_soc_codec_get_drvdata(rtd->codec); - struct madera_priv *priv = &cs47l35->core; - struct madera *madera = priv->madera; - int n_adsp, channel; - - dev_dbg(madera->dev, - "Open compr stream '%s' for DAI %d '%s'\n", - stream->name, rtd->codec_dai->id, rtd->codec_dai->name); - - if (strcmp(rtd->codec_dai->name, "cs47l35-dsp-voicectrl") == 0) { - /* DSP 3 channel 1 */ - n_adsp = 2; - channel = 0; - } else if (strcmp(rtd->codec_dai->name, "cs47l35-dsp-trace") == 0) { - /* DSP 1 channel 1 */ - n_adsp = 0; - channel = 0; - } else if (strcmp(rtd->codec_dai->name, "cs47l35-dsp1-txt") == 0) { - /* DSP 1 channel 2 */ - n_adsp = 0; - channel = 1; - } else if (strcmp(rtd->codec_dai->name, "cs47l35-dsp3-txt") == 0) { - /* DSP 3 channel 2 */ - n_adsp = 2; - channel = 1; - } else if (strcmp(rtd->codec_dai->name, "cs47l35-dsp2-txt") == 0) { - /* DSP 2 channel 1 */ - n_adsp = 1; - channel = 0; - } else { - dev_err(madera->dev, - "No suitable compressed stream for DAI '%s'\n", - rtd->codec_dai->name); - return -EINVAL; - } - - return wm_adsp_compr_open(&priv->adsp[n_adsp], stream, channel); -} - -static int cs47l35_panic_check(struct cs47l35 *cs47l35, int dev, int *reg) -{ - struct madera_priv *priv = &cs47l35->core; - struct madera *madera = priv->madera; - unsigned int val, scratch1; - struct madera_voice_trigger_info trig_info; - - *reg = MADERA_DSP1_SCRATCH_1 + (0x80000 * dev); - regmap_read(madera->regmap_32bit, *reg, &val); - - val = val >> 16; - if ((val & 0x3fff) == 0) - return val; - - dev_err(madera->dev, "DSP%d Panic %x\n", dev, val); - - scratch1 = val; - memset(trig_info.err_msg, 0, sizeof(trig_info.err_msg)); - - regmap_read(madera->regmap_32bit, *reg, &val); - trig_info.err_msg[1] = (u16)val; - trig_info.err_msg[0] = (u16)(val >> 16); - - regmap_read(madera->regmap_32bit, *reg+2, &val); - trig_info.err_msg[2] = (u16)val; - trig_info.err_msg[3] = (u16)(val >> 16); - - - /* Panic callback */ - trig_info.core_num = dev; - trig_info.code = MADERA_TRIGGER_PANIC; - madera_call_notifiers(madera, - MADERA_NOTIFY_VOICE_TRIGGER, - &trig_info); - - /* Clean panic field */ - scratch1 &= 0xc000; - regmap_write(madera->regmap_32bit, *reg, (scratch1<<16)); - - return scratch1; -} - -static int cs47l35_text_event(struct cs47l35 *cs47l35, int dev) -{ - struct madera_priv *priv = &cs47l35->core; - struct madera *madera = priv->madera; - - dev_dbg(madera->dev, "DSP%d Text event\n", dev); - return 0; -} - -static irqreturn_t cs47l35_adsp2_irq(int irq, void *data) -{ - struct cs47l35 *cs47l35 = data; - struct madera_priv *priv = &cs47l35->core; - struct madera *madera = priv->madera; - struct madera_voice_trigger_info trig_info; - int i, scratch_reg, reg, ret; - int serviced = 0, channel = 0; - - for (i = 0; i < CS47L35_NUM_ADSP; i++) { - - scratch_reg = cs47l35_panic_check(cs47l35, i, ®); - dev_dbg(madera->dev, "dsp %d, scratch_reg %x\n", i, scratch_reg); - if ((scratch_reg & 0x3fff) == 0) { - if (scratch_reg & 0x4000) { - /* Clear code bit */ - scratch_reg &= 0xbfff; - scratch_reg = scratch_reg << 16; - regmap_write(madera->regmap_32bit, reg, - scratch_reg); - trig_info.core_num = i; - trig_info.code = MADERA_TRIGGER_VOICE; - madera_call_notifiers(madera, - MADERA_NOTIFY_VOICE_TRIGGER, - &trig_info); - channel = 0; - dev_dbg(madera->dev, "Call AOV voice trigger notifier\n"); - } - - /* Text interrupt */ - if (scratch_reg & 0x8000) { - /* Clear event bit */ - scratch_reg &= 0x7fff; - scratch_reg = scratch_reg << 16; - regmap_write(madera->regmap_32bit, reg, - scratch_reg); - dev_dbg(madera->dev, "Calling Text Callback\n"); - cs47l35_text_event(cs47l35, i); - channel = 1; - } - } - ret = wm_adsp_compr_handle_irq(&priv->adsp[i], channel); - if (ret != -ENODEV) - serviced++; - } - - if (!serviced) { - dev_err(madera->dev, "Spurious compressed data IRQ\n"); - return IRQ_NONE; - } - - return IRQ_HANDLED; -} - -static const char * const cs47l35_dmic_refs[] = { - "MICVDD", - "MICBIAS1B", - "MICBIAS2A", - "MICBIAS2B", -}; - -static const char * const cs47l35_dmic_inputs[] = { - "IN1L Mux", - "IN1R Mux", - "IN2L", - "IN2R", -}; - -static int cs47l35_codec_probe(struct snd_soc_codec *codec) -{ - struct cs47l35 *cs47l35 = snd_soc_codec_get_drvdata(codec); - struct madera *madera = cs47l35->core.madera; - int i, ret; - - madera->dapm = snd_soc_codec_get_dapm(codec); - - ret = madera_init_inputs(codec, - cs47l35_dmic_inputs, - ARRAY_SIZE(cs47l35_dmic_inputs), - cs47l35_dmic_refs, - ARRAY_SIZE(cs47l35_dmic_refs)); - if (ret) - return ret; - - ret = madera_init_outputs(codec); - if (ret) - return ret; - - ret = madera_init_spk(codec, 1); - if (ret) - return ret; - - ret = madera_init_drc(codec); - if (ret) - return ret; - - snd_soc_dapm_disable_pin(madera->dapm, "HAPTICS"); - - ret = snd_soc_add_codec_controls(codec, madera_adsp_rate_controls, - CS47L35_NUM_ADSP); - if (ret) - return ret; - - ret = madera_request_irq(madera, MADERA_IRQ_DSP_IRQ1, - "ADSP2 Compressed IRQ", cs47l35_adsp2_irq, - cs47l35); - if (ret != 0) { - dev_err(codec->dev, "Failed to request DSP IRQ: %d\n", ret); - return ret; - } - - for (i = 0; i < CS47L35_NUM_ADSP; i++) - wm_adsp2_codec_probe(&cs47l35->core.adsp[i], codec); -#if IS_ENABLED(CONFIG_SND_SOC_AOV_TRIGGER) - aov_trigger_register_notifier(codec); -#endif - return 0; -} - -static int cs47l35_codec_remove(struct snd_soc_codec *codec) -{ - struct cs47l35 *cs47l35 = snd_soc_codec_get_drvdata(codec); - struct madera *madera = cs47l35->core.madera; - int i; - - for (i = 0; i < CS47L35_NUM_ADSP; i++) - wm_adsp2_codec_remove(&cs47l35->core.adsp[i], codec); - - madera_free_irq(madera, MADERA_IRQ_DSP_IRQ1, cs47l35); - - madera_free_spk(codec); - - cs47l35->core.madera->dapm = NULL; - - return 0; -} - -#define CS47L35_DIG_VU 0x0200 - -static unsigned int cs47l35_digital_vu[] = { - MADERA_DAC_DIGITAL_VOLUME_1L, - MADERA_DAC_DIGITAL_VOLUME_1R, - MADERA_DAC_DIGITAL_VOLUME_4L, - MADERA_DAC_DIGITAL_VOLUME_5L, - MADERA_DAC_DIGITAL_VOLUME_5R, -}; - -static struct regmap *cs47l35_get_regmap(struct device *dev) -{ - struct cs47l35 *priv = dev_get_drvdata(dev); - - return priv->core.madera->regmap; -} - -static struct snd_soc_codec_driver soc_codec_dev_cs47l35 = { - .probe = cs47l35_codec_probe, - .remove = cs47l35_codec_remove, - .get_regmap = cs47l35_get_regmap, - - .idle_bias_off = true, - - .set_sysclk = madera_set_sysclk, - .set_pll = cs47l35_set_fll, - .component_driver = { - .controls = cs47l35_snd_controls, - .num_controls = ARRAY_SIZE(cs47l35_snd_controls), - .dapm_widgets = cs47l35_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(cs47l35_dapm_widgets), - .dapm_routes = cs47l35_dapm_routes, - .num_dapm_routes = ARRAY_SIZE(cs47l35_dapm_routes), - }, -}; - -static struct snd_compr_ops cs47l35_compr_ops = { - .open = cs47l35_open, - .free = wm_adsp_compr_free, - .set_params = wm_adsp_compr_set_params, - .get_caps = wm_adsp_compr_get_caps, - .trigger = wm_adsp_compr_trigger, - .pointer = wm_adsp_compr_pointer, - .copy = wm_adsp_compr_copy, -}; - -static struct snd_soc_platform_driver cs47l35_compr_platform = { - .compr_ops = &cs47l35_compr_ops, -}; - -static int cs47l35_probe(struct platform_device *pdev) -{ - struct madera *madera = dev_get_drvdata(pdev->dev.parent); - struct cs47l35 *cs47l35; - int i, ret; - - BUILD_BUG_ON(ARRAY_SIZE(cs47l35_dai) > MADERA_MAX_DAI); - - /* FX Rate has the largest number of sources */ - BUILD_BUG_ON(ARRAY_SIZE(cs47l35->core.mixer_sources_cache) < - ARRAY_SIZE(cs47l35_fx_inputs)); - - /* quick exit if Madera irqchip driver hasn't completed probe */ - if (!madera->irq_dev) { - dev_dbg(&pdev->dev, "irqchip driver not ready\n"); - return -EPROBE_DEFER; - } - - cs47l35 = devm_kzalloc(&pdev->dev, sizeof(struct cs47l35), GFP_KERNEL); - if (!cs47l35) - return -ENOMEM; - platform_set_drvdata(pdev, cs47l35); - - /* Set of_node to parent from the SPI device to allow DAPM to - * locate regulator supplies - */ - pdev->dev.of_node = madera->dev->of_node; - - cs47l35->core.madera = madera; - cs47l35->core.num_inputs = 4; - cs47l35->core.get_sources = cs47l35_get_sources; - - ret = madera_core_init(&cs47l35->core); - if (ret) - return ret; - - for (i = 0; i < CS47L35_NUM_ADSP; i++) { - cs47l35->core.adsp[i].part = "cs47l35"; - cs47l35->core.adsp[i].num = i + 1; - cs47l35->core.adsp[i].type = WMFW_ADSP2; - cs47l35->core.adsp[i].rev = 1; - cs47l35->core.adsp[i].dev = madera->dev; - cs47l35->core.adsp[i].regmap = madera->regmap_32bit; - - cs47l35->core.adsp[i].base = wm_adsp2_control_bases[i]; - cs47l35->core.adsp[i].mem = cs47l35_dsp_regions[i]; - cs47l35->core.adsp[i].num_mems - = ARRAY_SIZE(cs47l35_dsp1_regions); - - ret = wm_adsp2_init(&cs47l35->core.adsp[i]); - if (ret != 0) { - for (--i; i >= 0; --i) - wm_adsp2_remove(&cs47l35->core.adsp[i]); - goto error_core; - } - } - - madera_init_fll(madera, 1, MADERA_FLL1_CONTROL_1 - 1, &cs47l35->fll); - - for (i = 0; i < ARRAY_SIZE(cs47l35_dai); i++) - madera_init_dai(&cs47l35->core, i); - - /* Latch volume update bits */ - for (i = 0; i < ARRAY_SIZE(cs47l35_digital_vu); i++) - regmap_update_bits(madera->regmap, cs47l35_digital_vu[i], - CS47L35_DIG_VU, CS47L35_DIG_VU); - - pm_runtime_enable(&pdev->dev); - pm_runtime_idle(&pdev->dev); - - ret = snd_soc_register_platform(&pdev->dev, &cs47l35_compr_platform); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to register platform: %d\n", ret); - goto error; - } - - ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_cs47l35, - cs47l35_dai, ARRAY_SIZE(cs47l35_dai)); - if (ret < 0) { - dev_err(&pdev->dev, - "Failed to register codec: %d\n", - ret); - snd_soc_unregister_platform(&pdev->dev); - goto error; - } - - return ret; - -error: - for (i = 0; i < CS47L35_NUM_ADSP; i++) - wm_adsp2_remove(&cs47l35->core.adsp[i]); -error_core: - madera_core_destroy(&cs47l35->core); - - return ret; -} - -static int cs47l35_remove(struct platform_device *pdev) -{ - struct cs47l35 *cs47l35 = platform_get_drvdata(pdev); - int i; - - snd_soc_unregister_platform(&pdev->dev); - snd_soc_unregister_codec(&pdev->dev); - pm_runtime_disable(&pdev->dev); - - for (i = 0; i < CS47L35_NUM_ADSP; i++) - wm_adsp2_remove(&cs47l35->core.adsp[i]); - - madera_core_destroy(&cs47l35->core); - - return 0; -} - -static struct platform_driver cs47l35_codec_driver = { - .driver = { - .name = "cs47l35-codec", - }, - .probe = cs47l35_probe, - .remove = cs47l35_remove, -}; - -module_platform_driver(cs47l35_codec_driver); - -MODULE_DESCRIPTION("ASoC CS47L35 driver"); -MODULE_AUTHOR("Piotr Stankiewicz "); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:cs47l35-codec"); diff --git a/sound/soc/codecs/cs47l90.c b/sound/soc/codecs/cs47l90.c deleted file mode 100644 index f68a5f8610c5..000000000000 --- a/sound/soc/codecs/cs47l90.c +++ /dev/null @@ -1,3054 +0,0 @@ -/* - * cs47l90.c -- ALSA SoC Audio driver for CS47L90 codecs - * - * Copyright 2015-2016 Cirrus Logic - * - * Author: Nikesh Oswal - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "madera.h" -#include "wm_adsp.h" - -#if IS_ENABLED(CONFIG_SND_SOC_AOV_TRIGGER) -#include "aov_trigger.h" -#endif - -#define CS47L90_NUM_ADSP 7 -#define ADSP2_CONTROL 0x0 -#define ADSP2_CORE_ENA 0x0002 - -struct cs47l90 { - struct madera_priv core; - struct madera_fll fll[3]; -}; - -static const int cs47l90_fx_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_EQ1MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_EQ2MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_EQ3MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_EQ4MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_DRC1LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_DRC1RMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_DRC2LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_DRC2RMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_HPLP1MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_HPLP2MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_HPLP3MIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_HPLP4MIX_INPUT_1_SOURCE, 2), -}; - -static const int cs47l90_asrc1_1_inputs[] = { - MADERA_MIXER_INPUTS_2_N(MADERA_ASRC1_1LMIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_asrc1_2_inputs[] = { - MADERA_MIXER_INPUTS_2_N(MADERA_ASRC1_2LMIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_asrc2_1_inputs[] = { - MADERA_MIXER_INPUTS_2_N(MADERA_ASRC2_1LMIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_asrc2_2_inputs[] = { - MADERA_MIXER_INPUTS_2_N(MADERA_ASRC2_2LMIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_isrc1_fsl_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_ISRC1INT1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_isrc1_fsh_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_isrc2_fsl_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_ISRC2INT1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_isrc2_fsh_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_isrc3_fsl_inputs[] = { - MADERA_MIXER_INPUTS_2_N(MADERA_ISRC3INT1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_isrc3_fsh_inputs[] = { - MADERA_MIXER_INPUTS_2_N(MADERA_ISRC3DEC1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_isrc4_fsl_inputs[] = { - MADERA_MIXER_INPUTS_2_N(MADERA_ISRC4INT1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_isrc4_fsh_inputs[] = { - MADERA_MIXER_INPUTS_2_N(MADERA_ISRC4DEC1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_out_inputs[] = { - MADERA_MIXER_INPUTS_4_N(MADERA_OUT1LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT1RMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT2LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT2RMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT3LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT3RMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT5LMIX_INPUT_1_SOURCE, 2), - MADERA_MIXER_INPUTS_4_N(MADERA_OUT5RMIX_INPUT_1_SOURCE, 2), -}; - -static const int cs47l90_spd1_inputs[] = { - MADERA_MIXER_INPUTS_2_N(MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE, 8), -}; - -static const int cs47l90_dsp1_inputs[] = { - MADERA_DSP_MIXER_INPUTS(MADERA_DSP1LMIX_INPUT_1_SOURCE), -}; - -static const int cs47l90_dsp2_inputs[] = { - MADERA_DSP_MIXER_INPUTS(MADERA_DSP2LMIX_INPUT_1_SOURCE), -}; - -static const int cs47l90_dsp3_inputs[] = { - MADERA_DSP_MIXER_INPUTS(MADERA_DSP3LMIX_INPUT_1_SOURCE), -}; - -static const int cs47l90_dsp4_inputs[] = { - MADERA_DSP_MIXER_INPUTS(MADERA_DSP4LMIX_INPUT_1_SOURCE), -}; - -static const int cs47l90_dsp5_inputs[] = { - MADERA_DSP_MIXER_INPUTS(MADERA_DSP5LMIX_INPUT_1_SOURCE), -}; - -static const int cs47l90_dsp6_inputs[] = { - MADERA_DSP_MIXER_INPUTS(MADERA_DSP6LMIX_INPUT_1_SOURCE), -}; - -static const int cs47l90_dsp7_inputs[] = { - MADERA_DSP_MIXER_INPUTS(MADERA_DSP7LMIX_INPUT_1_SOURCE), -}; - -static const struct wm_adsp_region cs47l90_dsp1_regions[] = { - { .type = WMFW_ADSP2_PM, .base = 0x080000 }, - { .type = WMFW_ADSP2_ZM, .base = 0x0e0000 }, - { .type = WMFW_ADSP2_XM, .base = 0x0a0000 }, - { .type = WMFW_ADSP2_YM, .base = 0x0c0000 }, -}; - -static const struct wm_adsp_region cs47l90_dsp2_regions[] = { - { .type = WMFW_ADSP2_PM, .base = 0x100000 }, - { .type = WMFW_ADSP2_ZM, .base = 0x160000 }, - { .type = WMFW_ADSP2_XM, .base = 0x120000 }, - { .type = WMFW_ADSP2_YM, .base = 0x140000 }, -}; - -static const struct wm_adsp_region cs47l90_dsp3_regions[] = { - { .type = WMFW_ADSP2_PM, .base = 0x180000 }, - { .type = WMFW_ADSP2_ZM, .base = 0x1e0000 }, - { .type = WMFW_ADSP2_XM, .base = 0x1a0000 }, - { .type = WMFW_ADSP2_YM, .base = 0x1c0000 }, -}; - -static const struct wm_adsp_region cs47l90_dsp4_regions[] = { - { .type = WMFW_ADSP2_PM, .base = 0x200000 }, - { .type = WMFW_ADSP2_ZM, .base = 0x260000 }, - { .type = WMFW_ADSP2_XM, .base = 0x220000 }, - { .type = WMFW_ADSP2_YM, .base = 0x240000 }, -}; - -static const struct wm_adsp_region cs47l90_dsp5_regions[] = { - { .type = WMFW_ADSP2_PM, .base = 0x280000 }, - { .type = WMFW_ADSP2_ZM, .base = 0x2e0000 }, - { .type = WMFW_ADSP2_XM, .base = 0x2a0000 }, - { .type = WMFW_ADSP2_YM, .base = 0x2c0000 }, -}; - -static const struct wm_adsp_region cs47l90_dsp6_regions[] = { - { .type = WMFW_ADSP2_PM, .base = 0x300000 }, - { .type = WMFW_ADSP2_ZM, .base = 0x360000 }, - { .type = WMFW_ADSP2_XM, .base = 0x320000 }, - { .type = WMFW_ADSP2_YM, .base = 0x340000 }, -}; - -static const struct wm_adsp_region cs47l90_dsp7_regions[] = { - { .type = WMFW_ADSP2_PM, .base = 0x380000 }, - { .type = WMFW_ADSP2_ZM, .base = 0x3e0000 }, - { .type = WMFW_ADSP2_XM, .base = 0x3a0000 }, - { .type = WMFW_ADSP2_YM, .base = 0x3c0000 }, -}; - -static const struct wm_adsp_region *cs47l90_dsp_regions[] = { - cs47l90_dsp1_regions, - cs47l90_dsp2_regions, - cs47l90_dsp3_regions, - cs47l90_dsp4_regions, - cs47l90_dsp5_regions, - cs47l90_dsp6_regions, - cs47l90_dsp7_regions, -}; - -static const int cs47l90_dsp_control_bases[] = { - MADERA_DSP1_CONFIG_1, - MADERA_DSP2_CONFIG_1, - MADERA_DSP3_CONFIG_1, - MADERA_DSP4_CONFIG_1, - MADERA_DSP5_CONFIG_1, - MADERA_DSP6_CONFIG_1, - MADERA_DSP7_CONFIG_1, -}; - -static int cs47l90_get_sources(unsigned int reg, - const unsigned int **cur_sources, int *lim) -{ - int ret = 0; - - switch (reg) { - case MADERA_FX_CTRL1: - *cur_sources = cs47l90_fx_inputs; - *lim = ARRAY_SIZE(cs47l90_fx_inputs); - break; - case MADERA_ASRC1_RATE1: - *cur_sources = cs47l90_asrc1_1_inputs; - *lim = ARRAY_SIZE(cs47l90_asrc1_1_inputs); - break; - case MADERA_ASRC1_RATE2: - *cur_sources = cs47l90_asrc1_2_inputs; - *lim = ARRAY_SIZE(cs47l90_asrc1_2_inputs); - break; - case MADERA_ASRC2_RATE1: - *cur_sources = cs47l90_asrc2_1_inputs; - *lim = ARRAY_SIZE(cs47l90_asrc2_1_inputs); - break; - case MADERA_ASRC2_RATE2: - *cur_sources = cs47l90_asrc2_2_inputs; - *lim = ARRAY_SIZE(cs47l90_asrc2_2_inputs); - break; - case MADERA_ISRC_1_CTRL_1: - *cur_sources = cs47l90_isrc1_fsh_inputs; - *lim = ARRAY_SIZE(cs47l90_isrc1_fsh_inputs); - break; - case MADERA_ISRC_1_CTRL_2: - *cur_sources = cs47l90_isrc1_fsl_inputs; - *lim = ARRAY_SIZE(cs47l90_isrc1_fsl_inputs); - break; - case MADERA_ISRC_2_CTRL_1: - *cur_sources = cs47l90_isrc2_fsh_inputs; - *lim = ARRAY_SIZE(cs47l90_isrc2_fsh_inputs); - break; - case MADERA_ISRC_2_CTRL_2: - *cur_sources = cs47l90_isrc2_fsl_inputs; - *lim = ARRAY_SIZE(cs47l90_isrc2_fsl_inputs); - break; - case MADERA_ISRC_3_CTRL_1: - *cur_sources = cs47l90_isrc3_fsh_inputs; - *lim = ARRAY_SIZE(cs47l90_isrc3_fsh_inputs); - break; - case MADERA_ISRC_3_CTRL_2: - *cur_sources = cs47l90_isrc3_fsl_inputs; - *lim = ARRAY_SIZE(cs47l90_isrc3_fsl_inputs); - break; - case MADERA_ISRC_4_CTRL_1: - *cur_sources = cs47l90_isrc4_fsh_inputs; - *lim = ARRAY_SIZE(cs47l90_isrc4_fsh_inputs); - break; - case MADERA_ISRC_4_CTRL_2: - *cur_sources = cs47l90_isrc4_fsl_inputs; - *lim = ARRAY_SIZE(cs47l90_isrc4_fsl_inputs); - break; - case MADERA_OUTPUT_RATE_1: - *cur_sources = cs47l90_out_inputs; - *lim = ARRAY_SIZE(cs47l90_out_inputs); - break; - case MADERA_SPD1_TX_CONTROL: - *cur_sources = cs47l90_spd1_inputs; - *lim = ARRAY_SIZE(cs47l90_spd1_inputs); - break; - case MADERA_DSP1_CONFIG_1: - *cur_sources = cs47l90_dsp1_inputs; - *lim = ARRAY_SIZE(cs47l90_dsp1_inputs); - break; - case MADERA_DSP2_CONFIG_1: - *cur_sources = cs47l90_dsp2_inputs; - *lim = ARRAY_SIZE(cs47l90_dsp2_inputs); - break; - case MADERA_DSP3_CONFIG_1: - *cur_sources = cs47l90_dsp3_inputs; - *lim = ARRAY_SIZE(cs47l90_dsp3_inputs); - break; - case MADERA_DSP4_CONFIG_1: - *cur_sources = cs47l90_dsp4_inputs; - *lim = ARRAY_SIZE(cs47l90_dsp4_inputs); - break; - case MADERA_DSP5_CONFIG_1: - *cur_sources = cs47l90_dsp5_inputs; - *lim = ARRAY_SIZE(cs47l90_dsp5_inputs); - break; - case MADERA_DSP6_CONFIG_1: - *cur_sources = cs47l90_dsp6_inputs; - *lim = ARRAY_SIZE(cs47l90_dsp6_inputs); - break; - case MADERA_DSP7_CONFIG_1: - *cur_sources = cs47l90_dsp7_inputs; - *lim = ARRAY_SIZE(cs47l90_dsp7_inputs); - break; - default: - ret = -EINVAL; - } - - return ret; -} - -static int cs47l90_adsp_power_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(codec); - struct madera_priv *priv = &cs47l90->core; - struct madera *madera = priv->madera; - unsigned int freq; - int ret; - - ret = regmap_read(madera->regmap, MADERA_DSP_CLOCK_2, &freq); - if (ret != 0) { - dev_err(madera->dev, - "Failed to read MADERA_DSP_CLOCK_2: %d\n", ret); - return ret; - } - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - ret = madera_set_adsp_clk(&cs47l90->core.adsp[w->shift], freq); - if (ret) - return ret; - break; - default: - break; - } - - return wm_adsp2_early_event(w, kcontrol, event, freq); -} - -static int cs47l90_get_dsp_state(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); - struct soc_mixer_control *mc = (struct soc_mixer_control *) - kcontrol->private_value; - struct wm_adsp *dsp = &dsps[mc->shift]; - unsigned int val; - - regmap_read(dsp->regmap, dsp->base + ADSP2_CONTROL, &val); - if (val & ADSP2_CORE_ENA) - ucontrol->value.integer.value[0] = 1; - else - ucontrol->value.integer.value[0] = 0; - - return 0; -} - -static int cs47l90_put_dsp_state(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - return 0; -} - -static int cs47l90_get_trig_state(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(codec); - struct madera_priv *priv = &cs47l90->core; - /* DSP3, Channel 1 */ - struct wm_adsp_compr *compr = priv->adsp[2].compr[0]; - if (compr) - ucontrol->value.integer.value[0] = compr->freed; - return 0; -} - -static int cs47l90_put_trig_state(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(codec); - struct madera_priv *priv = &cs47l90->core; - /* DSP3, Channel 1 */ - struct wm_adsp_compr *compr = priv->adsp[2].compr[0]; - int value = ucontrol->value.integer.value[0]; - - if (compr) - compr->freed = value; - return 0; -} - -#define CS47L90_NG_SRC(name, base) \ - SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \ - SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \ - SOC_SINGLE(name " NG HPOUT2L Switch", base, 2, 1, 0), \ - SOC_SINGLE(name " NG HPOUT2R Switch", base, 3, 1, 0), \ - SOC_SINGLE(name " NG HPOUT3L Switch", base, 4, 1, 0), \ - SOC_SINGLE(name " NG HPOUT3R Switch", base, 5, 1, 0), \ - SOC_SINGLE(name " NG SPKDAT1L Switch", base, 8, 1, 0), \ - SOC_SINGLE(name " NG SPKDAT1R Switch", base, 9, 1, 0) - -#define CS47L90_RXANC_INPUT_ROUTES(widget, name) \ - { widget, NULL, name " NG Mux" }, \ - { name " NG Internal", NULL, "RXANC NG Clock" }, \ - { name " NG Internal", NULL, name " Channel" }, \ - { name " NG External", NULL, "RXANC NG External Clock" }, \ - { name " NG External", NULL, name " Channel" }, \ - { name " NG Mux", "None", name " Channel" }, \ - { name " NG Mux", "Internal", name " NG Internal" }, \ - { name " NG Mux", "External", name " NG External" }, \ - { name " Channel", "Left", name " Left Input" }, \ - { name " Channel", "Combine", name " Left Input" }, \ - { name " Channel", "Right", name " Right Input" }, \ - { name " Channel", "Combine", name " Right Input" }, \ - { name " Left Input", "IN1", "IN1L PGA" }, \ - { name " Right Input", "IN1", "IN1R PGA" }, \ - { name " Left Input", "IN2", "IN2L PGA" }, \ - { name " Right Input", "IN2", "IN2R PGA" }, \ - { name " Left Input", "IN3", "IN3L PGA" }, \ - { name " Right Input", "IN3", "IN3R PGA" }, \ - { name " Left Input", "IN4", "IN4L PGA" }, \ - { name " Right Input", "IN4", "IN4R PGA" }, \ - { name " Left Input", "IN5", "IN5L PGA" }, \ - { name " Right Input", "IN5", "IN5R PGA" } - -#define CS47L90_RXANC_OUTPUT_ROUTES(widget, name) \ - { widget, NULL, name " ANC Source" }, \ - { name " ANC Source", "RXANCL", "RXANCL" }, \ - { name " ANC Source", "RXANCR", "RXANCR" } - -static const struct snd_kcontrol_new cs47l90_snd_controls[] = { -SOC_ENUM("IN1 OSR", madera_in_dmic_osr[0]), -SOC_ENUM("IN2 OSR", madera_in_dmic_osr[1]), -SOC_ENUM("IN3 OSR", madera_in_dmic_osr[2]), -SOC_ENUM("IN4 OSR", madera_in_dmic_osr[3]), -SOC_ENUM("IN5 OSR", madera_in_dmic_osr[4]), - -SOC_SINGLE_RANGE_TLV("IN1L Volume", MADERA_IN1L_CONTROL, - MADERA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv), -SOC_SINGLE_RANGE_TLV("IN1R Volume", MADERA_IN1R_CONTROL, - MADERA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv), -SOC_SINGLE_RANGE_TLV("IN2L Volume", MADERA_IN2L_CONTROL, - MADERA_IN2L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv), -SOC_SINGLE_RANGE_TLV("IN2R Volume", MADERA_IN2R_CONTROL, - MADERA_IN2R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv), - -SOC_ENUM("IN HPF Cutoff Frequency", madera_in_hpf_cut_enum), - -SOC_SINGLE_EXT("IN1L LP Switch", MADERA_ADC_DIGITAL_VOLUME_1L, - MADERA_IN1L_LP_MODE_SHIFT, 1, 0, - snd_soc_get_volsw, madera_lp_mode_put), -SOC_SINGLE_EXT("IN1R LP Switch", MADERA_ADC_DIGITAL_VOLUME_1R, - MADERA_IN1R_LP_MODE_SHIFT, 1, 0, - snd_soc_get_volsw, madera_lp_mode_put), -SOC_SINGLE_EXT("IN2L LP Switch", MADERA_ADC_DIGITAL_VOLUME_2L, - MADERA_IN2L_LP_MODE_SHIFT, 1, 0, - snd_soc_get_volsw, madera_lp_mode_put), -SOC_SINGLE_EXT("IN2R LP Switch", MADERA_ADC_DIGITAL_VOLUME_2R, - MADERA_IN2R_LP_MODE_SHIFT, 1, 0, - snd_soc_get_volsw, madera_lp_mode_put), - -SOC_SINGLE("IN1L HPF Switch", MADERA_IN1L_CONTROL, - MADERA_IN1L_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN1R HPF Switch", MADERA_IN1R_CONTROL, - MADERA_IN1R_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN2L HPF Switch", MADERA_IN2L_CONTROL, - MADERA_IN2L_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN2R HPF Switch", MADERA_IN2R_CONTROL, - MADERA_IN2R_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN3L HPF Switch", MADERA_IN3L_CONTROL, - MADERA_IN3L_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN3R HPF Switch", MADERA_IN3R_CONTROL, - MADERA_IN3R_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN4L HPF Switch", MADERA_IN4L_CONTROL, - MADERA_IN4L_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN4R HPF Switch", MADERA_IN4R_CONTROL, - MADERA_IN4R_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN5L HPF Switch", MADERA_IN5L_CONTROL, - MADERA_IN5L_HPF_SHIFT, 1, 0), -SOC_SINGLE("IN5R HPF Switch", MADERA_IN5R_CONTROL, - MADERA_IN5R_HPF_SHIFT, 1, 0), - -SOC_SINGLE_EXT("Set Trigger State Switch", SND_SOC_NOPM, 0, 1, 0, - cs47l90_get_trig_state, - cs47l90_put_trig_state), -SOC_SINGLE_EXT("Get DSP1 State", SND_SOC_NOPM, 0, 1, 0, cs47l90_get_dsp_state, - cs47l90_put_dsp_state), -SOC_SINGLE_EXT("Get DSP2 State", SND_SOC_NOPM, 1, 1, 0, cs47l90_get_dsp_state, - cs47l90_put_dsp_state), -SOC_SINGLE_EXT("Get DSP3 State", SND_SOC_NOPM, 2, 1, 0, cs47l90_get_dsp_state, - cs47l90_put_dsp_state), - -SOC_SINGLE_TLV("IN1L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1L, - MADERA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN1R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1R, - MADERA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN2L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2L, - MADERA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN2R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2R, - MADERA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN3L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_3L, - MADERA_IN3L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN3R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_3R, - MADERA_IN3R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN4L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_4L, - MADERA_IN4L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN4R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_4R, - MADERA_IN4R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN5L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_5L, - MADERA_IN5L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), -SOC_SINGLE_TLV("IN5R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_5R, - MADERA_IN5R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv), - -SOC_ENUM("Input Ramp Up", madera_in_vi_ramp), -SOC_ENUM("Input Ramp Down", madera_in_vd_ramp), - -SND_SOC_BYTES("RXANC Coefficients", MADERA_ANC_COEFF_START, - MADERA_ANC_COEFF_END - MADERA_ANC_COEFF_START + 1), -SND_SOC_BYTES("RXANCL Config", MADERA_FCL_FILTER_CONTROL, 1), -SND_SOC_BYTES("RXANCL Coefficients", MADERA_FCL_COEFF_START, - MADERA_FCL_COEFF_END - MADERA_FCL_COEFF_START + 1), -SND_SOC_BYTES("RXANCR Config", MADERA_FCR_FILTER_CONTROL, 1), -SND_SOC_BYTES("RXANCR Coefficients", MADERA_FCR_COEFF_START, - MADERA_FCR_COEFF_END - MADERA_FCR_COEFF_START + 1), - -MADERA_FRF_BYTES("FRF COEFF 1L", MADERA_FRF_COEFFICIENT_1L_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 1R", MADERA_FRF_COEFFICIENT_1R_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 2L", MADERA_FRF_COEFFICIENT_2L_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 2R", MADERA_FRF_COEFFICIENT_2R_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 3L", MADERA_FRF_COEFFICIENT_3L_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 3R", MADERA_FRF_COEFFICIENT_3R_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 5L", MADERA_FRF_COEFFICIENT_5L_1, - MADERA_FRF_COEFFICIENT_LEN), -MADERA_FRF_BYTES("FRF COEFF 5R", MADERA_FRF_COEFFICIENT_5R_1, - MADERA_FRF_COEFFICIENT_LEN), - -SND_SOC_BYTES("DAC COMP 1", MADERA_DAC_COMP_1, 1), -SND_SOC_BYTES("DAC COMP 2", MADERA_DAC_COMP_2, 1), - -MADERA_MIXER_CONTROLS("EQ1", MADERA_EQ1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("EQ2", MADERA_EQ2MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("EQ3", MADERA_EQ3MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("EQ4", MADERA_EQ4MIX_INPUT_1_SOURCE), - -MADERA_EQ_CONTROL("EQ1 Coefficients", MADERA_EQ1_2), -SOC_SINGLE_TLV("EQ1 B1 Volume", MADERA_EQ1_1, MADERA_EQ1_B1_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ1 B2 Volume", MADERA_EQ1_1, MADERA_EQ1_B2_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ1 B3 Volume", MADERA_EQ1_1, MADERA_EQ1_B3_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ1 B4 Volume", MADERA_EQ1_2, MADERA_EQ1_B4_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ1 B5 Volume", MADERA_EQ1_2, MADERA_EQ1_B5_GAIN_SHIFT, - 24, 0, madera_eq_tlv), - -MADERA_EQ_CONTROL("EQ2 Coefficients", MADERA_EQ2_2), -SOC_SINGLE_TLV("EQ2 B1 Volume", MADERA_EQ2_1, MADERA_EQ2_B1_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ2 B2 Volume", MADERA_EQ2_1, MADERA_EQ2_B2_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ2 B3 Volume", MADERA_EQ2_1, MADERA_EQ2_B3_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ2 B4 Volume", MADERA_EQ2_2, MADERA_EQ2_B4_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ2 B5 Volume", MADERA_EQ2_2, MADERA_EQ2_B5_GAIN_SHIFT, - 24, 0, madera_eq_tlv), - -MADERA_EQ_CONTROL("EQ3 Coefficients", MADERA_EQ3_2), -SOC_SINGLE_TLV("EQ3 B1 Volume", MADERA_EQ3_1, MADERA_EQ3_B1_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ3 B2 Volume", MADERA_EQ3_1, MADERA_EQ3_B2_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ3 B3 Volume", MADERA_EQ3_1, MADERA_EQ3_B3_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ3 B4 Volume", MADERA_EQ3_2, MADERA_EQ3_B4_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ3 B5 Volume", MADERA_EQ3_2, MADERA_EQ3_B5_GAIN_SHIFT, - 24, 0, madera_eq_tlv), - -MADERA_EQ_CONTROL("EQ4 Coefficients", MADERA_EQ4_2), -SOC_SINGLE_TLV("EQ4 B1 Volume", MADERA_EQ4_1, MADERA_EQ4_B1_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ4 B2 Volume", MADERA_EQ4_1, MADERA_EQ4_B2_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ4 B3 Volume", MADERA_EQ4_1, MADERA_EQ4_B3_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ4 B4 Volume", MADERA_EQ4_2, MADERA_EQ4_B4_GAIN_SHIFT, - 24, 0, madera_eq_tlv), -SOC_SINGLE_TLV("EQ4 B5 Volume", MADERA_EQ4_2, MADERA_EQ4_B5_GAIN_SHIFT, - 24, 0, madera_eq_tlv), - -MADERA_MIXER_CONTROLS("DRC1L", MADERA_DRC1LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DRC1R", MADERA_DRC1RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DRC2L", MADERA_DRC2LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DRC2R", MADERA_DRC2RMIX_INPUT_1_SOURCE), - -SND_SOC_BYTES_MASK("DRC1", MADERA_DRC1_CTRL1, 5, - MADERA_DRC1R_ENA | MADERA_DRC1L_ENA), -SND_SOC_BYTES_MASK("DRC2", MADERA_DRC2_CTRL1, 5, - MADERA_DRC2R_ENA | MADERA_DRC2L_ENA), - -MADERA_MIXER_CONTROLS("LHPF1", MADERA_HPLP1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("LHPF2", MADERA_HPLP2MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("LHPF3", MADERA_HPLP3MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("LHPF4", MADERA_HPLP4MIX_INPUT_1_SOURCE), - -MADERA_LHPF_CONTROL("LHPF1 Coefficients", MADERA_HPLPF1_2), -MADERA_LHPF_CONTROL("LHPF2 Coefficients", MADERA_HPLPF2_2), -MADERA_LHPF_CONTROL("LHPF3 Coefficients", MADERA_HPLPF3_2), -MADERA_LHPF_CONTROL("LHPF4 Coefficients", MADERA_HPLPF4_2), - -SOC_ENUM("LHPF1 Mode", madera_lhpf1_mode), -SOC_ENUM("LHPF2 Mode", madera_lhpf2_mode), -SOC_ENUM("LHPF3 Mode", madera_lhpf3_mode), -SOC_ENUM("LHPF4 Mode", madera_lhpf4_mode), - -SOC_ENUM("Sample Rate 2", madera_sample_rate[0]), -SOC_ENUM("Sample Rate 3", madera_sample_rate[1]), -SOC_ENUM("ASYNC Sample Rate 2", madera_sample_rate[2]), - -MADERA_RATE_ENUM("FX Rate", madera_fx_rate), -MADERA_RATE_ENUM("Noise Generator Rate", madera_noise_gen_rate), - -MADERA_RATE_ENUM("ISRC1 FSL", madera_isrc_fsl[0]), -MADERA_RATE_ENUM("ISRC2 FSL", madera_isrc_fsl[1]), -MADERA_RATE_ENUM("ISRC3 FSL", madera_isrc_fsl[2]), -MADERA_RATE_ENUM("ISRC4 FSL", madera_isrc_fsl[3]), -MADERA_RATE_ENUM("ISRC1 FSH", madera_isrc_fsh[0]), -MADERA_RATE_ENUM("ISRC2 FSH", madera_isrc_fsh[1]), -MADERA_RATE_ENUM("ISRC3 FSH", madera_isrc_fsh[2]), -MADERA_RATE_ENUM("ISRC4 FSH", madera_isrc_fsh[3]), -MADERA_RATE_ENUM("ASRC1 Rate 1", madera_asrc1_rate[0]), -MADERA_RATE_ENUM("ASRC1 Rate 2", madera_asrc1_rate[1]), -MADERA_RATE_ENUM("ASRC2 Rate 1", madera_asrc2_rate[0]), -MADERA_RATE_ENUM("ASRC2 Rate 2", madera_asrc2_rate[1]), - -WM_ADSP2_PRELOAD_SWITCH("DSP1", 1), -WM_ADSP2_PRELOAD_SWITCH("DSP2", 2), -WM_ADSP2_PRELOAD_SWITCH("DSP3", 3), -WM_ADSP2_PRELOAD_SWITCH("DSP4", 4), -WM_ADSP2_PRELOAD_SWITCH("DSP5", 5), -WM_ADSP2_PRELOAD_SWITCH("DSP6", 6), -WM_ADSP2_PRELOAD_SWITCH("DSP7", 7), - -MADERA_MIXER_CONTROLS("DSP1L", MADERA_DSP1LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP1R", MADERA_DSP1RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP2L", MADERA_DSP2LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP2R", MADERA_DSP2RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP3L", MADERA_DSP3LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP3R", MADERA_DSP3RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP4L", MADERA_DSP4LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP4R", MADERA_DSP4RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP5L", MADERA_DSP5LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP5R", MADERA_DSP5RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP6L", MADERA_DSP6LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP6R", MADERA_DSP6RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP7L", MADERA_DSP7LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("DSP7R", MADERA_DSP7RMIX_INPUT_1_SOURCE), - -SOC_SINGLE_TLV("Noise Generator Volume", MADERA_COMFORT_NOISE_GENERATOR, - MADERA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, madera_noise_tlv), - -MADERA_MIXER_CONTROLS("HPOUT1L", MADERA_OUT1LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("HPOUT1R", MADERA_OUT1RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("HPOUT2L", MADERA_OUT2LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("HPOUT2R", MADERA_OUT2RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("HPOUT3L", MADERA_OUT3LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("HPOUT3R", MADERA_OUT3RMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SPKDAT1L", MADERA_OUT5LMIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SPKDAT1R", MADERA_OUT5RMIX_INPUT_1_SOURCE), - -SOC_SINGLE("HPOUT1 SC Protect Switch", MADERA_HP1_SHORT_CIRCUIT_CTRL, - MADERA_HP1_SC_ENA_SHIFT, 1, 0), -SOC_SINGLE("HPOUT2 SC Protect Switch", MADERA_HP2_SHORT_CIRCUIT_CTRL, - MADERA_HP2_SC_ENA_SHIFT, 1, 0), -SOC_SINGLE("HPOUT3 SC Protect Switch", MADERA_HP3_SHORT_CIRCUIT_CTRL, - MADERA_HP3_SC_ENA_SHIFT, 1, 0), - -SOC_SINGLE("SPKDAT1 High Performance Switch", MADERA_OUTPUT_PATH_CONFIG_5L, - MADERA_OUT5_OSR_SHIFT, 1, 0), - -SOC_DOUBLE_R("HPOUT1 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_1L, - MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_MUTE_SHIFT, 1, 1), -SOC_DOUBLE_R("HPOUT2 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_2L, - MADERA_DAC_DIGITAL_VOLUME_2R, MADERA_OUT2L_MUTE_SHIFT, 1, 1), -SOC_DOUBLE_R("HPOUT3 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_3L, - MADERA_DAC_DIGITAL_VOLUME_3R, MADERA_OUT3L_MUTE_SHIFT, 1, 1), -SOC_DOUBLE_R("SPKDAT1 Digital Switch", MADERA_DAC_DIGITAL_VOLUME_5L, - MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_MUTE_SHIFT, 1, 1), - -SOC_DOUBLE_R_TLV("HPOUT1 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_1L, - MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_VOL_SHIFT, - 0xbf, 0, madera_digital_tlv), -SOC_DOUBLE_R_TLV("HPOUT2 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_2L, - MADERA_DAC_DIGITAL_VOLUME_2R, MADERA_OUT2L_VOL_SHIFT, - 0xbf, 0, madera_digital_tlv), -SOC_DOUBLE_R_TLV("HPOUT3 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_3L, - MADERA_DAC_DIGITAL_VOLUME_3R, MADERA_OUT3L_VOL_SHIFT, - 0xbf, 0, madera_digital_tlv), -SOC_DOUBLE_R_TLV("SPKDAT1 Digital Volume", MADERA_DAC_DIGITAL_VOLUME_5L, - MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_VOL_SHIFT, - 0xbf, 0, madera_digital_tlv), - -SOC_DOUBLE("SPKDAT1 Switch", MADERA_PDM_SPK1_CTRL_1, MADERA_SPK1L_MUTE_SHIFT, - MADERA_SPK1R_MUTE_SHIFT, 1, 1), - -SOC_DOUBLE_EXT("HPOUT1 DRE Switch", MADERA_DRE_ENABLE, - MADERA_DRE1L_ENA_SHIFT, MADERA_DRE1R_ENA_SHIFT, 1, 0, - snd_soc_get_volsw, madera_put_dre), -SOC_DOUBLE_EXT("HPOUT2 DRE Switch", MADERA_DRE_ENABLE, - MADERA_DRE2L_ENA_SHIFT, MADERA_DRE2R_ENA_SHIFT, 1, 0, - snd_soc_get_volsw, madera_put_dre), -SOC_DOUBLE_EXT("HPOUT3 DRE Switch", MADERA_DRE_ENABLE, - MADERA_DRE3L_ENA_SHIFT, MADERA_DRE3R_ENA_SHIFT, 1, 0, - snd_soc_get_volsw, madera_put_dre), - -SOC_DOUBLE("HPOUT1 EDRE Switch", MADERA_EDRE_ENABLE, - MADERA_EDRE_OUT1L_THR1_ENA_SHIFT, - MADERA_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0), -SOC_DOUBLE("HPOUT2 EDRE Switch", MADERA_EDRE_ENABLE, - MADERA_EDRE_OUT2L_THR1_ENA_SHIFT, - MADERA_EDRE_OUT2R_THR1_ENA_SHIFT, 1, 0), -SOC_DOUBLE("HPOUT3 EDRE Switch", MADERA_EDRE_ENABLE, - MADERA_EDRE_OUT3L_THR1_ENA_SHIFT, - MADERA_EDRE_OUT3R_THR1_ENA_SHIFT, 1, 0), - -SOC_ENUM("Output Ramp Up", madera_out_vi_ramp), -SOC_ENUM("Output Ramp Down", madera_out_vd_ramp), - -MADERA_RATE_ENUM("SPDIF1 Rate", madera_spdif_rate), - -SOC_SINGLE("Noise Gate Switch", MADERA_NOISE_GATE_CONTROL, - MADERA_NGATE_ENA_SHIFT, 1, 0), -SOC_SINGLE_TLV("Noise Gate Threshold Volume", MADERA_NOISE_GATE_CONTROL, - MADERA_NGATE_THR_SHIFT, 7, 1, madera_ng_tlv), -SOC_ENUM("Noise Gate Hold", madera_ng_hold), - -MADERA_RATE_ENUM("Output Rate 1", madera_output_rate), - -SOC_ENUM_EXT("IN1L Rate", madera_input_rate[0], - snd_soc_get_enum_double, madera_in_rate_put), -SOC_ENUM_EXT("IN1R Rate", madera_input_rate[1], - snd_soc_get_enum_double, madera_in_rate_put), -SOC_ENUM_EXT("IN2L Rate", madera_input_rate[2], - snd_soc_get_enum_double, madera_in_rate_put), -SOC_ENUM_EXT("IN2R Rate", madera_input_rate[3], - snd_soc_get_enum_double, madera_in_rate_put), -SOC_ENUM_EXT("IN3L Rate", madera_input_rate[4], - snd_soc_get_enum_double, madera_in_rate_put), -SOC_ENUM_EXT("IN3R Rate", madera_input_rate[5], - snd_soc_get_enum_double, madera_in_rate_put), -SOC_ENUM_EXT("IN4L Rate", madera_input_rate[6], - snd_soc_get_enum_double, madera_in_rate_put), -SOC_ENUM_EXT("IN4R Rate", madera_input_rate[7], - snd_soc_get_enum_double, madera_in_rate_put), -SOC_ENUM_EXT("IN5L Rate", madera_input_rate[8], - snd_soc_get_enum_double, madera_in_rate_put), -SOC_ENUM_EXT("IN5R Rate", madera_input_rate[9], - snd_soc_get_enum_double, madera_in_rate_put), - -SOC_ENUM_EXT("DFC1RX Width", madera_dfc_width[0], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC1RX Type", madera_dfc_type[0], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC1TX Width", madera_dfc_width[1], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC1TX Type", madera_dfc_type[1], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC2RX Width", madera_dfc_width[2], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC2RX Type", madera_dfc_type[2], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC2TX Width", madera_dfc_width[3], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC2TX Type", madera_dfc_type[3], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC3RX Width", madera_dfc_width[4], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC3RX Type", madera_dfc_type[4], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC3TX Width", madera_dfc_width[5], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC3TX Type", madera_dfc_type[5], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC4RX Width", madera_dfc_width[6], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC4RX Type", madera_dfc_type[6], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC4TX Width", madera_dfc_width[7], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC4TX Type", madera_dfc_type[7], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC5RX Width", madera_dfc_width[8], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC5RX Type", madera_dfc_type[8], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC5TX Width", madera_dfc_width[9], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC5TX Type", madera_dfc_type[9], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC6RX Width", madera_dfc_width[10], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC6RX Type", madera_dfc_type[10], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC6TX Width", madera_dfc_width[11], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC6TX Type", madera_dfc_type[11], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC7RX Width", madera_dfc_width[12], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC7RX Type", madera_dfc_type[12], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC7TX Width", madera_dfc_width[13], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC7TX Type", madera_dfc_type[13], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC8RX Width", madera_dfc_width[14], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC8RX Type", madera_dfc_type[14], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC8TX Width", madera_dfc_width[15], - snd_soc_get_enum_double, madera_dfc_put), -SOC_ENUM_EXT("DFC8TX Type", madera_dfc_type[15], - snd_soc_get_enum_double, madera_dfc_put), - -CS47L90_NG_SRC("HPOUT1L", MADERA_NOISE_GATE_SELECT_1L), -CS47L90_NG_SRC("HPOUT1R", MADERA_NOISE_GATE_SELECT_1R), -CS47L90_NG_SRC("HPOUT2L", MADERA_NOISE_GATE_SELECT_2L), -CS47L90_NG_SRC("HPOUT2R", MADERA_NOISE_GATE_SELECT_2R), -CS47L90_NG_SRC("HPOUT3L", MADERA_NOISE_GATE_SELECT_3L), -CS47L90_NG_SRC("HPOUT3R", MADERA_NOISE_GATE_SELECT_3R), -CS47L90_NG_SRC("SPKDAT1L", MADERA_NOISE_GATE_SELECT_5L), -CS47L90_NG_SRC("SPKDAT1R", MADERA_NOISE_GATE_SELECT_5R), - -MADERA_MIXER_CONTROLS("AIF1TX1", MADERA_AIF1TX1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX2", MADERA_AIF1TX2MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX3", MADERA_AIF1TX3MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX4", MADERA_AIF1TX4MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX5", MADERA_AIF1TX5MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX6", MADERA_AIF1TX6MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX7", MADERA_AIF1TX7MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF1TX8", MADERA_AIF1TX8MIX_INPUT_1_SOURCE), - -MADERA_MIXER_CONTROLS("AIF2TX1", MADERA_AIF2TX1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF2TX2", MADERA_AIF2TX2MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF2TX3", MADERA_AIF2TX3MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF2TX4", MADERA_AIF2TX4MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF2TX5", MADERA_AIF2TX5MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF2TX6", MADERA_AIF2TX6MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF2TX7", MADERA_AIF2TX7MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF2TX8", MADERA_AIF2TX8MIX_INPUT_1_SOURCE), - -MADERA_MIXER_CONTROLS("AIF3TX1", MADERA_AIF3TX1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF3TX2", MADERA_AIF3TX2MIX_INPUT_1_SOURCE), - -MADERA_MIXER_CONTROLS("AIF4TX1", MADERA_AIF4TX1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("AIF4TX2", MADERA_AIF4TX2MIX_INPUT_1_SOURCE), - -MADERA_MIXER_CONTROLS("SLIMTX1", MADERA_SLIMTX1MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX2", MADERA_SLIMTX2MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX3", MADERA_SLIMTX3MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX4", MADERA_SLIMTX4MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX5", MADERA_SLIMTX5MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX6", MADERA_SLIMTX6MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX7", MADERA_SLIMTX7MIX_INPUT_1_SOURCE), -MADERA_MIXER_CONTROLS("SLIMTX8", MADERA_SLIMTX8MIX_INPUT_1_SOURCE), - -MADERA_GAINMUX_CONTROLS("SPDIF1TX1", MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE), -MADERA_GAINMUX_CONTROLS("SPDIF1TX2", MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE), -}; - -MADERA_MIXER_ENUMS(EQ1, MADERA_EQ1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(EQ2, MADERA_EQ2MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(EQ3, MADERA_EQ3MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(EQ4, MADERA_EQ4MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DRC1L, MADERA_DRC1LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DRC1R, MADERA_DRC1RMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DRC2L, MADERA_DRC2LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DRC2R, MADERA_DRC2RMIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(LHPF1, MADERA_HPLP1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(LHPF2, MADERA_HPLP2MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(LHPF3, MADERA_HPLP3MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(LHPF4, MADERA_HPLP4MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DSP1L, MADERA_DSP1LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DSP1R, MADERA_DSP1RMIX_INPUT_1_SOURCE); -MADERA_DSP_AUX_ENUMS(DSP1, MADERA_DSP1AUX1MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DSP2L, MADERA_DSP2LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DSP2R, MADERA_DSP2RMIX_INPUT_1_SOURCE); -MADERA_DSP_AUX_ENUMS(DSP2, MADERA_DSP2AUX1MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DSP3L, MADERA_DSP3LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DSP3R, MADERA_DSP3RMIX_INPUT_1_SOURCE); -MADERA_DSP_AUX_ENUMS(DSP3, MADERA_DSP3AUX1MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DSP4L, MADERA_DSP4LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DSP4R, MADERA_DSP4RMIX_INPUT_1_SOURCE); -MADERA_DSP_AUX_ENUMS(DSP4, MADERA_DSP4AUX1MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DSP5L, MADERA_DSP5LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DSP5R, MADERA_DSP5RMIX_INPUT_1_SOURCE); -MADERA_DSP_AUX_ENUMS(DSP5, MADERA_DSP5AUX1MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DSP6L, MADERA_DSP6LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DSP6R, MADERA_DSP6RMIX_INPUT_1_SOURCE); -MADERA_DSP_AUX_ENUMS(DSP6, MADERA_DSP6AUX1MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(DSP7L, MADERA_DSP7LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(DSP7R, MADERA_DSP7RMIX_INPUT_1_SOURCE); -MADERA_DSP_AUX_ENUMS(DSP7, MADERA_DSP7AUX1MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(PWM1, MADERA_PWM1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(PWM2, MADERA_PWM2MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(OUT1L, MADERA_OUT1LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(OUT1R, MADERA_OUT1RMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(OUT2L, MADERA_OUT2LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(OUT2R, MADERA_OUT2RMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(OUT3L, MADERA_OUT3LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(OUT3R, MADERA_OUT3RMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SPKDAT1L, MADERA_OUT5LMIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SPKDAT1R, MADERA_OUT5RMIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(AIF1TX1, MADERA_AIF1TX1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX2, MADERA_AIF1TX2MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX3, MADERA_AIF1TX3MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX4, MADERA_AIF1TX4MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX5, MADERA_AIF1TX5MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX6, MADERA_AIF1TX6MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX7, MADERA_AIF1TX7MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF1TX8, MADERA_AIF1TX8MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(AIF2TX1, MADERA_AIF2TX1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF2TX2, MADERA_AIF2TX2MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF2TX3, MADERA_AIF2TX3MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF2TX4, MADERA_AIF2TX4MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF2TX5, MADERA_AIF2TX5MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF2TX6, MADERA_AIF2TX6MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF2TX7, MADERA_AIF2TX7MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF2TX8, MADERA_AIF2TX8MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(AIF3TX1, MADERA_AIF3TX1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF3TX2, MADERA_AIF3TX2MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(AIF4TX1, MADERA_AIF4TX1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(AIF4TX2, MADERA_AIF4TX2MIX_INPUT_1_SOURCE); - -MADERA_MIXER_ENUMS(SLIMTX1, MADERA_SLIMTX1MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX2, MADERA_SLIMTX2MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX3, MADERA_SLIMTX3MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX4, MADERA_SLIMTX4MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX5, MADERA_SLIMTX5MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX6, MADERA_SLIMTX6MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX7, MADERA_SLIMTX7MIX_INPUT_1_SOURCE); -MADERA_MIXER_ENUMS(SLIMTX8, MADERA_SLIMTX8MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(SPD1TX1, MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(SPD1TX2, MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ASRC1IN1L, MADERA_ASRC1_1LMIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ASRC1IN1R, MADERA_ASRC1_1RMIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ASRC1IN2L, MADERA_ASRC1_2LMIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ASRC1IN2R, MADERA_ASRC1_2RMIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ASRC2IN1L, MADERA_ASRC2_1LMIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ASRC2IN1R, MADERA_ASRC2_1RMIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ASRC2IN2L, MADERA_ASRC2_2LMIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ASRC2IN2R, MADERA_ASRC2_2RMIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC1INT1, MADERA_ISRC1INT1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1INT2, MADERA_ISRC1INT2MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1INT3, MADERA_ISRC1INT3MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1INT4, MADERA_ISRC1INT4MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC1DEC1, MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1DEC2, MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1DEC3, MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC1DEC4, MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC2INT1, MADERA_ISRC2INT1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2INT2, MADERA_ISRC2INT2MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2INT3, MADERA_ISRC2INT3MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2INT4, MADERA_ISRC2INT4MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC2DEC1, MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2DEC2, MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2DEC3, MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC2DEC4, MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC3INT1, MADERA_ISRC3INT1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC3INT2, MADERA_ISRC3INT2MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC3DEC1, MADERA_ISRC3DEC1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC3DEC2, MADERA_ISRC3DEC2MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC4INT1, MADERA_ISRC4INT1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC4INT2, MADERA_ISRC4INT2MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(ISRC4DEC1, MADERA_ISRC4DEC1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(ISRC4DEC2, MADERA_ISRC4DEC2MIX_INPUT_1_SOURCE); - -MADERA_MUX_ENUMS(DFC1, MADERA_DFC1MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(DFC2, MADERA_DFC2MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(DFC3, MADERA_DFC3MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(DFC4, MADERA_DFC4MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(DFC5, MADERA_DFC5MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(DFC6, MADERA_DFC6MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(DFC7, MADERA_DFC7MIX_INPUT_1_SOURCE); -MADERA_MUX_ENUMS(DFC8, MADERA_DFC8MIX_INPUT_1_SOURCE); - -static const char * const cs47l90_memory_mux_texts[] = { - "None", - "Shared Memory", -}; - -static const struct soc_enum cs47l90_memory_enum = - SOC_ENUM_SINGLE(SND_SOC_NOPM, 0, ARRAY_SIZE(cs47l90_memory_mux_texts), - cs47l90_memory_mux_texts); - -static const struct snd_kcontrol_new cs47l90_memory_mux[] = { - SOC_DAPM_ENUM("DSP2 Virtual Input", cs47l90_memory_enum), - SOC_DAPM_ENUM("DSP3 Virtual Input", cs47l90_memory_enum), -}; - -static const char * const cs47l90_aec_loopback_texts[] = { - "HPOUT1L", "HPOUT1R", "HPOUT2L", "HPOUT2R", "HPOUT3L", "HPOUT3R", - "SPKDAT1L", "SPKDAT1R", -}; - -static const unsigned int cs47l90_aec_loopback_values[] = { - 0, 1, 2, 3, 4, 5, 8, 9, -}; - -static const struct soc_enum cs47l90_aec_loopback = - SOC_VALUE_ENUM_SINGLE(MADERA_DAC_AEC_CONTROL_1, - MADERA_AEC1_LOOPBACK_SRC_SHIFT, 0xf, - ARRAY_SIZE(cs47l90_aec_loopback_texts), - cs47l90_aec_loopback_texts, - cs47l90_aec_loopback_values); - -static const struct snd_kcontrol_new cs47l90_aec_loopback_mux = - SOC_DAPM_ENUM("AEC1 Loopback", cs47l90_aec_loopback); - -static const struct snd_kcontrol_new cs47l90_anc_input_mux[] = { - SOC_DAPM_ENUM("RXANCL Input", madera_anc_input_src[0]), - SOC_DAPM_ENUM("RXANCL Channel", madera_anc_input_src[1]), - SOC_DAPM_ENUM("RXANCR Input", madera_anc_input_src[2]), - SOC_DAPM_ENUM("RXANCR Channel", madera_anc_input_src[3]), -}; - -static const struct snd_kcontrol_new cs47l90_anc_ng_mux = - SOC_DAPM_ENUM("RXANC NG Source", madera_anc_ng_enum); - -static const struct snd_kcontrol_new cs47l90_output_anc_src[] = { - SOC_DAPM_ENUM("HPOUT1L ANC Source", madera_output_anc_src[0]), - SOC_DAPM_ENUM("HPOUT1R ANC Source", madera_output_anc_src[1]), - SOC_DAPM_ENUM("HPOUT2L ANC Source", madera_output_anc_src[2]), - SOC_DAPM_ENUM("HPOUT2R ANC Source", madera_output_anc_src[3]), - SOC_DAPM_ENUM("HPOUT3L ANC Source", madera_output_anc_src[4]), - SOC_DAPM_ENUM("HPOUT3R ANC Source", madera_output_anc_src[0]), - SOC_DAPM_ENUM("SPKDAT1L ANC Source", madera_output_anc_src[8]), - SOC_DAPM_ENUM("SPKDAT1R ANC Source", madera_output_anc_src[9]), -}; - -static const struct snd_soc_dapm_widget cs47l90_dapm_widgets[] = { -SND_SOC_DAPM_SUPPLY("SYSCLK", MADERA_SYSTEM_CLOCK_1, MADERA_SYSCLK_ENA_SHIFT, - 0, madera_sysclk_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_SUPPLY("ASYNCCLK", MADERA_ASYNC_CLOCK_1, - MADERA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK, - MADERA_OPCLK_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("ASYNCOPCLK", MADERA_OUTPUT_ASYNC_CLOCK, - MADERA_OPCLK_ASYNC_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("DSPCLK", MADERA_DSP_CLOCK_1, - MADERA_DSP_CLK_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD2", 0, 0), -SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD3", 0, 0), -SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD4", 0, 0), -SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD1", 20, 0), -SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD2", 20, 0), -SND_SOC_DAPM_REGULATOR_SUPPLY("MICVDD", 0, SND_SOC_DAPM_REGULATOR_BYPASS), - -SND_SOC_DAPM_SUPPLY("MICBIAS1", MADERA_MIC_BIAS_CTRL_1, - MADERA_MICB1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS2", MADERA_MIC_BIAS_CTRL_2, - MADERA_MICB1_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_SUPPLY("MICBIAS1A", MADERA_MIC_BIAS_CTRL_5, - MADERA_MICB1A_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS1B", MADERA_MIC_BIAS_CTRL_5, - MADERA_MICB1B_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS1C", MADERA_MIC_BIAS_CTRL_5, - MADERA_MICB1C_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS1D", MADERA_MIC_BIAS_CTRL_5, - MADERA_MICB1D_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_SUPPLY("MICBIAS2A", MADERA_MIC_BIAS_CTRL_6, - MADERA_MICB2A_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS2B", MADERA_MIC_BIAS_CTRL_6, - MADERA_MICB2B_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS2C", MADERA_MIC_BIAS_CTRL_6, - MADERA_MICB2C_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("MICBIAS2D", MADERA_MIC_BIAS_CTRL_6, - MADERA_MICB2D_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_SUPPLY("GPSW", MADERA_GP_SWITCH_1, - 0, 0, NULL, 0), - -SND_SOC_DAPM_SIGGEN("TONE"), -SND_SOC_DAPM_SIGGEN("NOISE"), - -SND_SOC_DAPM_INPUT("IN1AL"), -SND_SOC_DAPM_INPUT("IN1BL"), -SND_SOC_DAPM_INPUT("IN1AR"), -SND_SOC_DAPM_INPUT("IN1BR"), -SND_SOC_DAPM_INPUT("IN2AL"), -SND_SOC_DAPM_INPUT("IN2BL"), -SND_SOC_DAPM_INPUT("IN2R"), -SND_SOC_DAPM_INPUT("IN3L"), -SND_SOC_DAPM_INPUT("IN3R"), -SND_SOC_DAPM_INPUT("IN4L"), -SND_SOC_DAPM_INPUT("IN4R"), -SND_SOC_DAPM_INPUT("IN5L"), -SND_SOC_DAPM_INPUT("IN5R"), -SND_SOC_DAPM_INPUT("DSP Virtual Input"), - -SND_SOC_DAPM_OUTPUT("DRC1 Signal Activity"), -SND_SOC_DAPM_OUTPUT("DRC2 Signal Activity"), - -SND_SOC_DAPM_OUTPUT("DSP1 Trigger Out"), -SND_SOC_DAPM_OUTPUT("DSP2 Trigger Out"), -SND_SOC_DAPM_OUTPUT("DSP3 Trigger Out"), -SND_SOC_DAPM_OUTPUT("DSP4 Trigger Out"), -SND_SOC_DAPM_OUTPUT("DSP5 Trigger Out"), -SND_SOC_DAPM_OUTPUT("DSP6 Trigger Out"), -SND_SOC_DAPM_OUTPUT("DSP7 Trigger Out"), - -SND_SOC_DAPM_OUTPUT("DSP1 Virtual Output"), -SND_SOC_DAPM_OUTPUT("DSP2 Virtual Output"), -SND_SOC_DAPM_OUTPUT("DSP3 Virtual Output"), -SND_SOC_DAPM_OUTPUT("DSP4 Virtual Output"), -SND_SOC_DAPM_OUTPUT("DSP5 Virtual Output"), -SND_SOC_DAPM_OUTPUT("DSP6 Virtual Output"), -SND_SOC_DAPM_OUTPUT("DSP7 Virtual Output"), - -SND_SOC_DAPM_MUX("IN1L Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[0]), -SND_SOC_DAPM_MUX("IN1R Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[1]), -SND_SOC_DAPM_MUX("IN2L Mux", SND_SOC_NOPM, 0, 0, &madera_inmux[2]), - -SND_SOC_DAPM_PGA("PWM1 Driver", MADERA_PWM_DRIVE_1, MADERA_PWM1_ENA_SHIFT, - 0, NULL, 0), -SND_SOC_DAPM_PGA("PWM2 Driver", MADERA_PWM_DRIVE_1, MADERA_PWM2_ENA_SHIFT, - 0, NULL, 0), - -SND_SOC_DAPM_SUPPLY("RXANC NG External Clock", SND_SOC_NOPM, - MADERA_EXT_NG_SEL_SET_SHIFT, 0, madera_anc_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_PGA("RXANCL NG External", SND_SOC_NOPM, 0, 0, NULL, 0), -SND_SOC_DAPM_PGA("RXANCR NG External", SND_SOC_NOPM, 0, 0, NULL, 0), - -SND_SOC_DAPM_SUPPLY("RXANC NG Clock", SND_SOC_NOPM, - MADERA_CLK_NG_ENA_SET_SHIFT, 0, madera_anc_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_PGA("RXANCL NG Internal", SND_SOC_NOPM, 0, 0, NULL, 0), -SND_SOC_DAPM_PGA("RXANCR NG Internal", SND_SOC_NOPM, 0, 0, NULL, 0), - -SND_SOC_DAPM_MUX("RXANCL Left Input", SND_SOC_NOPM, 0, 0, - &cs47l90_anc_input_mux[0]), -SND_SOC_DAPM_MUX("RXANCL Right Input", SND_SOC_NOPM, 0, 0, - &cs47l90_anc_input_mux[0]), -SND_SOC_DAPM_MUX("RXANCL Channel", SND_SOC_NOPM, 0, 0, - &cs47l90_anc_input_mux[1]), -SND_SOC_DAPM_MUX("RXANCL NG Mux", SND_SOC_NOPM, 0, 0, &cs47l90_anc_ng_mux), -SND_SOC_DAPM_MUX("RXANCR Left Input", SND_SOC_NOPM, 0, 0, - &cs47l90_anc_input_mux[2]), -SND_SOC_DAPM_MUX("RXANCR Right Input", SND_SOC_NOPM, 0, 0, - &cs47l90_anc_input_mux[2]), -SND_SOC_DAPM_MUX("RXANCR Channel", SND_SOC_NOPM, 0, 0, - &cs47l90_anc_input_mux[3]), -SND_SOC_DAPM_MUX("RXANCR NG Mux", SND_SOC_NOPM, 0, 0, &cs47l90_anc_ng_mux), - -SND_SOC_DAPM_PGA_E("RXANCL", SND_SOC_NOPM, MADERA_CLK_L_ENA_SET_SHIFT, - 0, NULL, 0, madera_anc_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_PGA_E("RXANCR", SND_SOC_NOPM, MADERA_CLK_R_ENA_SET_SHIFT, - 0, NULL, 0, madera_anc_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - -SND_SOC_DAPM_MUX("HPOUT1L ANC Source", SND_SOC_NOPM, 0, 0, - &cs47l90_output_anc_src[0]), -SND_SOC_DAPM_MUX("HPOUT1R ANC Source", SND_SOC_NOPM, 0, 0, - &cs47l90_output_anc_src[1]), -SND_SOC_DAPM_MUX("HPOUT2L ANC Source", SND_SOC_NOPM, 0, 0, - &cs47l90_output_anc_src[2]), -SND_SOC_DAPM_MUX("HPOUT2R ANC Source", SND_SOC_NOPM, 0, 0, - &cs47l90_output_anc_src[3]), -SND_SOC_DAPM_MUX("HPOUT3L ANC Source", SND_SOC_NOPM, 0, 0, - &cs47l90_output_anc_src[4]), -SND_SOC_DAPM_MUX("HPOUT3R ANC Source", SND_SOC_NOPM, 0, 0, - &cs47l90_output_anc_src[5]), -SND_SOC_DAPM_MUX("SPKDAT1L ANC Source", SND_SOC_NOPM, 0, 0, - &cs47l90_output_anc_src[6]), -SND_SOC_DAPM_MUX("SPKDAT1R ANC Source", SND_SOC_NOPM, 0, 0, - &cs47l90_output_anc_src[7]), - -SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX3_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX4_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX5_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX6", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX6_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX7", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX7_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF1TX8", NULL, 0, - MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX8_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, - MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF2TX2", NULL, 0, - MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF2TX3", NULL, 0, - MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX3_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF2TX4", NULL, 0, - MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX4_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF2TX5", NULL, 0, - MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX5_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF2TX6", NULL, 0, - MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX6_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF2TX7", NULL, 0, - MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX7_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF2TX8", NULL, 0, - MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX8_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_OUT_E("SLIMTX1", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX1_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX2", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX2_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX3", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX3_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX4", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX4_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX5", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX5_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX6", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX6_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX7", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX7_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_OUT_E("SLIMTX8", NULL, 0, - MADERA_SLIMBUS_TX_CHANNEL_ENABLE, - MADERA_SLIMTX8_ENA_SHIFT, 0, - madera_slim_tx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - -SND_SOC_DAPM_AIF_OUT("AIF3TX1", NULL, 0, - MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF3TX2", NULL, 0, - MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX2_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_OUT("AIF4TX1", NULL, 0, - MADERA_AIF4_TX_ENABLES, MADERA_AIF4TX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_OUT("AIF4TX2", NULL, 0, - MADERA_AIF4_TX_ENABLES, MADERA_AIF4TX2_ENA_SHIFT, 0), - -SND_SOC_DAPM_PGA_E("OUT1L", SND_SOC_NOPM, - MADERA_OUT1L_ENA_SHIFT, 0, NULL, 0, madera_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("OUT1R", SND_SOC_NOPM, - MADERA_OUT1R_ENA_SHIFT, 0, NULL, 0, madera_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("OUT2L", MADERA_OUTPUT_ENABLES_1, - MADERA_OUT2L_ENA_SHIFT, 0, NULL, 0, madera_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("OUT2R", MADERA_OUTPUT_ENABLES_1, - MADERA_OUT2R_ENA_SHIFT, 0, NULL, 0, madera_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("OUT3L", MADERA_OUTPUT_ENABLES_1, - MADERA_OUT3L_ENA_SHIFT, 0, NULL, 0, madera_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("OUT3R", MADERA_OUTPUT_ENABLES_1, - MADERA_OUT3R_ENA_SHIFT, 0, NULL, 0, madera_hp_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("OUT5L", MADERA_OUTPUT_ENABLES_1, - MADERA_OUT5L_ENA_SHIFT, 0, NULL, 0, madera_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("OUT5R", MADERA_OUTPUT_ENABLES_1, - MADERA_OUT5R_ENA_SHIFT, 0, NULL, 0, madera_out_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), - -SND_SOC_DAPM_PGA("SPD1TX1", MADERA_SPD1_TX_CONTROL, - MADERA_SPD1_VAL1_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("SPD1TX2", MADERA_SPD1_TX_CONTROL, - MADERA_SPD1_VAL2_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_OUT_DRV("SPD1", MADERA_SPD1_TX_CONTROL, - MADERA_SPD1_ENA_SHIFT, 0, NULL, 0), - -/* mux_in widgets : arranged in the order of sources - specified in MADERA_MIXER_INPUT_ROUTES */ - -SND_SOC_DAPM_PGA("Noise Generator", MADERA_COMFORT_NOISE_GENERATOR, - MADERA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("Tone Generator 1", MADERA_TONE_GENERATOR_1, - MADERA_TONE1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("Tone Generator 2", MADERA_TONE_GENERATOR_1, - MADERA_TONE2_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_MIC("HAPTICS", NULL), - -SND_SOC_DAPM_MUX("AEC1 Loopback", MADERA_DAC_AEC_CONTROL_1, - MADERA_AEC1_LOOPBACK_ENA_SHIFT, 0, - &cs47l90_aec_loopback_mux), - -SND_SOC_DAPM_PGA_E("IN1L PGA", MADERA_INPUT_ENABLES, MADERA_IN1L_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN1R PGA", MADERA_INPUT_ENABLES, MADERA_IN1R_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN2L PGA", MADERA_INPUT_ENABLES, MADERA_IN2L_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN2R PGA", MADERA_INPUT_ENABLES, MADERA_IN2R_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN3L PGA", MADERA_INPUT_ENABLES, MADERA_IN3L_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN3R PGA", MADERA_INPUT_ENABLES, MADERA_IN3R_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN4L PGA", MADERA_INPUT_ENABLES, MADERA_IN4L_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN4R PGA", MADERA_INPUT_ENABLES, MADERA_IN4R_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN5L PGA", MADERA_INPUT_ENABLES, MADERA_IN5L_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), -SND_SOC_DAPM_PGA_E("IN5R PGA", MADERA_INPUT_ENABLES, MADERA_IN5R_ENA_SHIFT, - 0, NULL, 0, madera_in_ev, - SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD | - SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU), - -SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX3_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX4_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX5_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX6", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX6_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX7", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX7_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF1RX8", NULL, 0, - MADERA_AIF1_RX_ENABLES, MADERA_AIF1RX8_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, - MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX2", NULL, 0, - MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX2_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX3", NULL, 0, - MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX3_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX4", NULL, 0, - MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX4_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX5", NULL, 0, - MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX5_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX6", NULL, 0, - MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX6_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX7", NULL, 0, - MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX7_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF2RX8", NULL, 0, - MADERA_AIF2_RX_ENABLES, MADERA_AIF2RX8_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_IN("AIF3RX1", NULL, 0, - MADERA_AIF3_RX_ENABLES, MADERA_AIF3RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF3RX2", NULL, 0, - MADERA_AIF3_RX_ENABLES, MADERA_AIF3RX2_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_IN("AIF4RX1", NULL, 0, - MADERA_AIF4_RX_ENABLES, MADERA_AIF4RX1_ENA_SHIFT, 0), -SND_SOC_DAPM_AIF_IN("AIF4RX2", NULL, 0, - MADERA_AIF4_RX_ENABLES, MADERA_AIF4RX2_ENA_SHIFT, 0), - -SND_SOC_DAPM_AIF_IN_E("SLIMRX1", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX1_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX2", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX2_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX3", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX3_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX4", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX4_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX5", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX5_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX6", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX6_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX7", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX7_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -SND_SOC_DAPM_AIF_IN_E("SLIMRX8", NULL, 0, - MADERA_SLIMBUS_RX_CHANNEL_ENABLE, - MADERA_SLIMRX8_ENA_SHIFT, 0, - madera_slim_rx_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - -SND_SOC_DAPM_PGA("EQ1", MADERA_EQ1_1, MADERA_EQ1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("EQ2", MADERA_EQ2_1, MADERA_EQ2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("EQ3", MADERA_EQ3_1, MADERA_EQ3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("EQ4", MADERA_EQ4_1, MADERA_EQ4_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("DRC1L", MADERA_DRC1_CTRL1, MADERA_DRC1L_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("DRC1R", MADERA_DRC1_CTRL1, MADERA_DRC1R_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("DRC2L", MADERA_DRC2_CTRL1, MADERA_DRC2L_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("DRC2R", MADERA_DRC2_CTRL1, MADERA_DRC2R_ENA_SHIFT, 0, - NULL, 0), - -SND_SOC_DAPM_PGA("LHPF1", MADERA_HPLPF1_1, MADERA_LHPF1_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("LHPF2", MADERA_HPLPF2_1, MADERA_LHPF2_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("LHPF3", MADERA_HPLPF3_1, MADERA_LHPF3_ENA_SHIFT, 0, - NULL, 0), -SND_SOC_DAPM_PGA("LHPF4", MADERA_HPLPF4_1, MADERA_LHPF4_ENA_SHIFT, 0, - NULL, 0), - -SND_SOC_DAPM_PGA("ASRC1IN1L", MADERA_ASRC1_ENABLE, - MADERA_ASRC1_IN1L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN1R", MADERA_ASRC1_ENABLE, - MADERA_ASRC1_IN1R_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN2L", MADERA_ASRC1_ENABLE, - MADERA_ASRC1_IN2L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC1IN2R", MADERA_ASRC1_ENABLE, - MADERA_ASRC1_IN2R_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ASRC2IN1L", MADERA_ASRC2_ENABLE, - MADERA_ASRC2_IN1L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC2IN1R", MADERA_ASRC2_ENABLE, - MADERA_ASRC2_IN1R_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC2IN2L", MADERA_ASRC2_ENABLE, - MADERA_ASRC2_IN2L_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ASRC2IN2R", MADERA_ASRC2_ENABLE, - MADERA_ASRC2_IN2R_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC1DEC1", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1DEC2", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1DEC3", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1DEC4", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_DEC4_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC1INT1", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1INT2", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1INT3", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC1INT4", MADERA_ISRC_1_CTRL_3, - MADERA_ISRC1_INT4_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC2DEC1", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2DEC2", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2DEC3", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2DEC4", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_DEC4_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC2INT1", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2INT2", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2INT3", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC2INT4", MADERA_ISRC_2_CTRL_3, - MADERA_ISRC2_INT4_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC3DEC1", MADERA_ISRC_3_CTRL_3, - MADERA_ISRC3_DEC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC3DEC2", MADERA_ISRC_3_CTRL_3, - MADERA_ISRC3_DEC2_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC3INT1", MADERA_ISRC_3_CTRL_3, - MADERA_ISRC3_INT1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC3INT2", MADERA_ISRC_3_CTRL_3, - MADERA_ISRC3_INT2_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC4DEC1", MADERA_ISRC_4_CTRL_3, - MADERA_ISRC4_DEC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC4DEC2", MADERA_ISRC_4_CTRL_3, - MADERA_ISRC4_DEC2_ENA_SHIFT, 0, NULL, 0), - -SND_SOC_DAPM_PGA("ISRC4INT1", MADERA_ISRC_4_CTRL_3, - MADERA_ISRC4_INT1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("ISRC4INT2", MADERA_ISRC_4_CTRL_3, - MADERA_ISRC4_INT2_ENA_SHIFT, 0, NULL, 0), - -WM_ADSP2("DSP1", 0, cs47l90_adsp_power_ev), -WM_ADSP2("DSP2", 1, cs47l90_adsp_power_ev), -WM_ADSP2("DSP3", 2, cs47l90_adsp_power_ev), -WM_ADSP2("DSP4", 3, cs47l90_adsp_power_ev), -WM_ADSP2("DSP5", 4, cs47l90_adsp_power_ev), -WM_ADSP2("DSP6", 5, cs47l90_adsp_power_ev), -WM_ADSP2("DSP7", 6, cs47l90_adsp_power_ev), - -/* end of ordered widget list */ - -SND_SOC_DAPM_PGA("DFC1", MADERA_DFC1_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("DFC2", MADERA_DFC2_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("DFC3", MADERA_DFC3_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("DFC4", MADERA_DFC4_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("DFC5", MADERA_DFC5_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("DFC6", MADERA_DFC6_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("DFC7", MADERA_DFC7_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_PGA("DFC8", MADERA_DFC8_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0), - -MADERA_MIXER_WIDGETS(EQ1, "EQ1"), -MADERA_MIXER_WIDGETS(EQ2, "EQ2"), -MADERA_MIXER_WIDGETS(EQ3, "EQ3"), -MADERA_MIXER_WIDGETS(EQ4, "EQ4"), - -MADERA_MIXER_WIDGETS(DRC1L, "DRC1L"), -MADERA_MIXER_WIDGETS(DRC1R, "DRC1R"), -MADERA_MIXER_WIDGETS(DRC2L, "DRC2L"), -MADERA_MIXER_WIDGETS(DRC2R, "DRC2R"), - -SND_SOC_DAPM_SWITCH("DRC1 Activity Output", SND_SOC_NOPM, 0, 0, - &madera_drc_activity_output_mux[0]), -SND_SOC_DAPM_SWITCH("DRC2 Activity Output", SND_SOC_NOPM, 0, 0, - &madera_drc_activity_output_mux[1]), - -MADERA_MIXER_WIDGETS(LHPF1, "LHPF1"), -MADERA_MIXER_WIDGETS(LHPF2, "LHPF2"), -MADERA_MIXER_WIDGETS(LHPF3, "LHPF3"), -MADERA_MIXER_WIDGETS(LHPF4, "LHPF4"), - -MADERA_MIXER_WIDGETS(PWM1, "PWM1"), -MADERA_MIXER_WIDGETS(PWM2, "PWM2"), - -MADERA_MIXER_WIDGETS(OUT1L, "HPOUT1L"), -MADERA_MIXER_WIDGETS(OUT1R, "HPOUT1R"), -MADERA_MIXER_WIDGETS(OUT2L, "HPOUT2L"), -MADERA_MIXER_WIDGETS(OUT2R, "HPOUT2R"), -MADERA_MIXER_WIDGETS(OUT3L, "HPOUT3L"), -MADERA_MIXER_WIDGETS(OUT3R, "HPOUT3R"), -MADERA_MIXER_WIDGETS(SPKDAT1L, "SPKDAT1L"), -MADERA_MIXER_WIDGETS(SPKDAT1R, "SPKDAT1R"), - -MADERA_MIXER_WIDGETS(AIF1TX1, "AIF1TX1"), -MADERA_MIXER_WIDGETS(AIF1TX2, "AIF1TX2"), -MADERA_MIXER_WIDGETS(AIF1TX3, "AIF1TX3"), -MADERA_MIXER_WIDGETS(AIF1TX4, "AIF1TX4"), -MADERA_MIXER_WIDGETS(AIF1TX5, "AIF1TX5"), -MADERA_MIXER_WIDGETS(AIF1TX6, "AIF1TX6"), -MADERA_MIXER_WIDGETS(AIF1TX7, "AIF1TX7"), -MADERA_MIXER_WIDGETS(AIF1TX8, "AIF1TX8"), - -MADERA_MIXER_WIDGETS(AIF2TX1, "AIF2TX1"), -MADERA_MIXER_WIDGETS(AIF2TX2, "AIF2TX2"), -MADERA_MIXER_WIDGETS(AIF2TX3, "AIF2TX3"), -MADERA_MIXER_WIDGETS(AIF2TX4, "AIF2TX4"), -MADERA_MIXER_WIDGETS(AIF2TX5, "AIF2TX5"), -MADERA_MIXER_WIDGETS(AIF2TX6, "AIF2TX6"), -MADERA_MIXER_WIDGETS(AIF2TX7, "AIF2TX7"), -MADERA_MIXER_WIDGETS(AIF2TX8, "AIF2TX8"), - -MADERA_MIXER_WIDGETS(AIF3TX1, "AIF3TX1"), -MADERA_MIXER_WIDGETS(AIF3TX2, "AIF3TX2"), - -MADERA_MIXER_WIDGETS(AIF4TX1, "AIF4TX1"), -MADERA_MIXER_WIDGETS(AIF4TX2, "AIF4TX2"), - -MADERA_MIXER_WIDGETS(SLIMTX1, "SLIMTX1"), -MADERA_MIXER_WIDGETS(SLIMTX2, "SLIMTX2"), -MADERA_MIXER_WIDGETS(SLIMTX3, "SLIMTX3"), -MADERA_MIXER_WIDGETS(SLIMTX4, "SLIMTX4"), -MADERA_MIXER_WIDGETS(SLIMTX5, "SLIMTX5"), -MADERA_MIXER_WIDGETS(SLIMTX6, "SLIMTX6"), -MADERA_MIXER_WIDGETS(SLIMTX7, "SLIMTX7"), -MADERA_MIXER_WIDGETS(SLIMTX8, "SLIMTX8"), - -MADERA_MUX_WIDGETS(SPD1TX1, "SPDIF1TX1"), -MADERA_MUX_WIDGETS(SPD1TX2, "SPDIF1TX2"), - -MADERA_MUX_WIDGETS(ASRC1IN1L, "ASRC1IN1L"), -MADERA_MUX_WIDGETS(ASRC1IN1R, "ASRC1IN1R"), -MADERA_MUX_WIDGETS(ASRC1IN2L, "ASRC1IN2L"), -MADERA_MUX_WIDGETS(ASRC1IN2R, "ASRC1IN2R"), -MADERA_MUX_WIDGETS(ASRC2IN1L, "ASRC2IN1L"), -MADERA_MUX_WIDGETS(ASRC2IN1R, "ASRC2IN1R"), -MADERA_MUX_WIDGETS(ASRC2IN2L, "ASRC2IN2L"), -MADERA_MUX_WIDGETS(ASRC2IN2R, "ASRC2IN2R"), - -MADERA_DSP_WIDGETS(DSP1, "DSP1"), -MADERA_DSP_WIDGETS(DSP2, "DSP2"), -MADERA_DSP_WIDGETS(DSP3, "DSP3"), -MADERA_DSP_WIDGETS(DSP4, "DSP4"), -MADERA_DSP_WIDGETS(DSP5, "DSP5"), -MADERA_DSP_WIDGETS(DSP6, "DSP6"), -MADERA_DSP_WIDGETS(DSP7, "DSP7"), - -SND_SOC_DAPM_MUX("DSP2 Virtual Input", SND_SOC_NOPM, 0, 0, - &cs47l90_memory_mux[0]), -SND_SOC_DAPM_MUX("DSP3 Virtual Input", SND_SOC_NOPM, 0, 0, - &cs47l90_memory_mux[1]), - -SND_SOC_DAPM_SWITCH("DSP1 Trigger Output", SND_SOC_NOPM, 0, 0, - &madera_dsp_trigger_output_mux[0]), -SND_SOC_DAPM_SWITCH("DSP2 Trigger Output", SND_SOC_NOPM, 0, 0, - &madera_dsp_trigger_output_mux[1]), -SND_SOC_DAPM_SWITCH("DSP3 Trigger Output", SND_SOC_NOPM, 0, 0, - &madera_dsp_trigger_output_mux[2]), -SND_SOC_DAPM_SWITCH("DSP4 Trigger Output", SND_SOC_NOPM, 0, 0, - &madera_dsp_trigger_output_mux[3]), -SND_SOC_DAPM_SWITCH("DSP5 Trigger Output", SND_SOC_NOPM, 0, 0, - &madera_dsp_trigger_output_mux[4]), -SND_SOC_DAPM_SWITCH("DSP6 Trigger Output", SND_SOC_NOPM, 0, 0, - &madera_dsp_trigger_output_mux[5]), -SND_SOC_DAPM_SWITCH("DSP7 Trigger Output", SND_SOC_NOPM, 0, 0, - &madera_dsp_trigger_output_mux[6]), - -MADERA_MUX_WIDGETS(ISRC1DEC1, "ISRC1DEC1"), -MADERA_MUX_WIDGETS(ISRC1DEC2, "ISRC1DEC2"), -MADERA_MUX_WIDGETS(ISRC1DEC3, "ISRC1DEC3"), -MADERA_MUX_WIDGETS(ISRC1DEC4, "ISRC1DEC4"), - -MADERA_MUX_WIDGETS(ISRC1INT1, "ISRC1INT1"), -MADERA_MUX_WIDGETS(ISRC1INT2, "ISRC1INT2"), -MADERA_MUX_WIDGETS(ISRC1INT3, "ISRC1INT3"), -MADERA_MUX_WIDGETS(ISRC1INT4, "ISRC1INT4"), - -MADERA_MUX_WIDGETS(ISRC2DEC1, "ISRC2DEC1"), -MADERA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), -MADERA_MUX_WIDGETS(ISRC2DEC3, "ISRC2DEC3"), -MADERA_MUX_WIDGETS(ISRC2DEC4, "ISRC2DEC4"), - -MADERA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), -MADERA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), -MADERA_MUX_WIDGETS(ISRC2INT3, "ISRC2INT3"), -MADERA_MUX_WIDGETS(ISRC2INT4, "ISRC2INT4"), - -MADERA_MUX_WIDGETS(ISRC3DEC1, "ISRC3DEC1"), -MADERA_MUX_WIDGETS(ISRC3DEC2, "ISRC3DEC2"), - -MADERA_MUX_WIDGETS(ISRC3INT1, "ISRC3INT1"), -MADERA_MUX_WIDGETS(ISRC3INT2, "ISRC3INT2"), - -MADERA_MUX_WIDGETS(ISRC4DEC1, "ISRC4DEC1"), -MADERA_MUX_WIDGETS(ISRC4DEC2, "ISRC4DEC2"), - -MADERA_MUX_WIDGETS(ISRC4INT1, "ISRC4INT1"), -MADERA_MUX_WIDGETS(ISRC4INT2, "ISRC4INT2"), - -MADERA_MUX_WIDGETS(DFC1, "DFC1"), -MADERA_MUX_WIDGETS(DFC2, "DFC2"), -MADERA_MUX_WIDGETS(DFC3, "DFC3"), -MADERA_MUX_WIDGETS(DFC4, "DFC4"), -MADERA_MUX_WIDGETS(DFC5, "DFC5"), -MADERA_MUX_WIDGETS(DFC6, "DFC6"), -MADERA_MUX_WIDGETS(DFC7, "DFC7"), -MADERA_MUX_WIDGETS(DFC8, "DFC8"), - -SND_SOC_DAPM_OUTPUT("HPOUT1L"), -SND_SOC_DAPM_OUTPUT("HPOUT1R"), -SND_SOC_DAPM_OUTPUT("HPOUT2L"), -SND_SOC_DAPM_OUTPUT("HPOUT2R"), -SND_SOC_DAPM_OUTPUT("HPOUT3L"), -SND_SOC_DAPM_OUTPUT("HPOUT3R"), -SND_SOC_DAPM_OUTPUT("SPKDAT1L"), -SND_SOC_DAPM_OUTPUT("SPKDAT1R"), -SND_SOC_DAPM_OUTPUT("SPDIF1"), - -SND_SOC_DAPM_OUTPUT("MICSUPP"), -}; - -#define MADERA_MIXER_INPUT_ROUTES(name) \ - { name, "Noise Generator", "Noise Generator" }, \ - { name, "Tone Generator 1", "Tone Generator 1" }, \ - { name, "Tone Generator 2", "Tone Generator 2" }, \ - { name, "Haptics", "HAPTICS" }, \ - { name, "AEC1", "AEC1 Loopback" }, \ - { name, "IN1L", "IN1L PGA" }, \ - { name, "IN1R", "IN1R PGA" }, \ - { name, "IN2L", "IN2L PGA" }, \ - { name, "IN2R", "IN2R PGA" }, \ - { name, "IN3L", "IN3L PGA" }, \ - { name, "IN3R", "IN3R PGA" }, \ - { name, "IN4L", "IN4L PGA" }, \ - { name, "IN4R", "IN4R PGA" }, \ - { name, "IN5L", "IN5L PGA" }, \ - { name, "IN5R", "IN5R PGA" }, \ - { name, "AIF1RX1", "AIF1RX1" }, \ - { name, "AIF1RX2", "AIF1RX2" }, \ - { name, "AIF1RX3", "AIF1RX3" }, \ - { name, "AIF1RX4", "AIF1RX4" }, \ - { name, "AIF1RX5", "AIF1RX5" }, \ - { name, "AIF1RX6", "AIF1RX6" }, \ - { name, "AIF1RX7", "AIF1RX7" }, \ - { name, "AIF1RX8", "AIF1RX8" }, \ - { name, "AIF2RX1", "AIF2RX1" }, \ - { name, "AIF2RX2", "AIF2RX2" }, \ - { name, "AIF2RX3", "AIF2RX3" }, \ - { name, "AIF2RX4", "AIF2RX4" }, \ - { name, "AIF2RX5", "AIF2RX5" }, \ - { name, "AIF2RX6", "AIF2RX6" }, \ - { name, "AIF2RX7", "AIF2RX7" }, \ - { name, "AIF2RX8", "AIF2RX8" }, \ - { name, "AIF3RX1", "AIF3RX1" }, \ - { name, "AIF3RX2", "AIF3RX2" }, \ - { name, "AIF4RX1", "AIF4RX1" }, \ - { name, "AIF4RX2", "AIF4RX2" }, \ - { name, "SLIMRX1", "SLIMRX1" }, \ - { name, "SLIMRX2", "SLIMRX2" }, \ - { name, "SLIMRX3", "SLIMRX3" }, \ - { name, "SLIMRX4", "SLIMRX4" }, \ - { name, "SLIMRX5", "SLIMRX5" }, \ - { name, "SLIMRX6", "SLIMRX6" }, \ - { name, "SLIMRX7", "SLIMRX7" }, \ - { name, "SLIMRX8", "SLIMRX8" }, \ - { name, "EQ1", "EQ1" }, \ - { name, "EQ2", "EQ2" }, \ - { name, "EQ3", "EQ3" }, \ - { name, "EQ4", "EQ4" }, \ - { name, "DRC1L", "DRC1L" }, \ - { name, "DRC1R", "DRC1R" }, \ - { name, "DRC2L", "DRC2L" }, \ - { name, "DRC2R", "DRC2R" }, \ - { name, "LHPF1", "LHPF1" }, \ - { name, "LHPF2", "LHPF2" }, \ - { name, "LHPF3", "LHPF3" }, \ - { name, "LHPF4", "LHPF4" }, \ - { name, "ASRC1IN1L", "ASRC1IN1L" }, \ - { name, "ASRC1IN1R", "ASRC1IN1R" }, \ - { name, "ASRC1IN2L", "ASRC1IN2L" }, \ - { name, "ASRC1IN2R", "ASRC1IN2R" }, \ - { name, "ASRC2IN1L", "ASRC2IN1L" }, \ - { name, "ASRC2IN1R", "ASRC2IN1R" }, \ - { name, "ASRC2IN2L", "ASRC2IN2L" }, \ - { name, "ASRC2IN2R", "ASRC2IN2R" }, \ - { name, "ISRC1DEC1", "ISRC1DEC1" }, \ - { name, "ISRC1DEC2", "ISRC1DEC2" }, \ - { name, "ISRC1DEC3", "ISRC1DEC3" }, \ - { name, "ISRC1DEC4", "ISRC1DEC4" }, \ - { name, "ISRC1INT1", "ISRC1INT1" }, \ - { name, "ISRC1INT2", "ISRC1INT2" }, \ - { name, "ISRC1INT3", "ISRC1INT3" }, \ - { name, "ISRC1INT4", "ISRC1INT4" }, \ - { name, "ISRC2DEC1", "ISRC2DEC1" }, \ - { name, "ISRC2DEC2", "ISRC2DEC2" }, \ - { name, "ISRC2DEC3", "ISRC2DEC3" }, \ - { name, "ISRC2DEC4", "ISRC2DEC4" }, \ - { name, "ISRC2INT1", "ISRC2INT1" }, \ - { name, "ISRC2INT2", "ISRC2INT2" }, \ - { name, "ISRC2INT3", "ISRC2INT3" }, \ - { name, "ISRC2INT4", "ISRC2INT4" }, \ - { name, "ISRC3DEC1", "ISRC3DEC1" }, \ - { name, "ISRC3DEC2", "ISRC3DEC2" }, \ - { name, "ISRC3INT1", "ISRC3INT1" }, \ - { name, "ISRC3INT2", "ISRC3INT2" }, \ - { name, "ISRC4DEC1", "ISRC4DEC1" }, \ - { name, "ISRC4DEC2", "ISRC4DEC2" }, \ - { name, "ISRC4INT1", "ISRC4INT1" }, \ - { name, "ISRC4INT2", "ISRC4INT2" }, \ - { name, "DSP1.1", "DSP1" }, \ - { name, "DSP1.2", "DSP1" }, \ - { name, "DSP1.3", "DSP1" }, \ - { name, "DSP1.4", "DSP1" }, \ - { name, "DSP1.5", "DSP1" }, \ - { name, "DSP1.6", "DSP1" }, \ - { name, "DSP2.1", "DSP2" }, \ - { name, "DSP2.2", "DSP2" }, \ - { name, "DSP2.3", "DSP2" }, \ - { name, "DSP2.4", "DSP2" }, \ - { name, "DSP2.5", "DSP2" }, \ - { name, "DSP2.6", "DSP2" }, \ - { name, "DSP3.1", "DSP3" }, \ - { name, "DSP3.2", "DSP3" }, \ - { name, "DSP3.3", "DSP3" }, \ - { name, "DSP3.4", "DSP3" }, \ - { name, "DSP3.5", "DSP3" }, \ - { name, "DSP3.6", "DSP3" }, \ - { name, "DSP4.1", "DSP4" }, \ - { name, "DSP4.2", "DSP4" }, \ - { name, "DSP4.3", "DSP4" }, \ - { name, "DSP4.4", "DSP4" }, \ - { name, "DSP4.5", "DSP4" }, \ - { name, "DSP4.6", "DSP4" }, \ - { name, "DSP5.1", "DSP5" }, \ - { name, "DSP5.2", "DSP5" }, \ - { name, "DSP5.3", "DSP5" }, \ - { name, "DSP5.4", "DSP5" }, \ - { name, "DSP5.5", "DSP5" }, \ - { name, "DSP5.6", "DSP5" }, \ - { name, "DSP6.1", "DSP6" }, \ - { name, "DSP6.2", "DSP6" }, \ - { name, "DSP6.3", "DSP6" }, \ - { name, "DSP6.4", "DSP6" }, \ - { name, "DSP6.5", "DSP6" }, \ - { name, "DSP6.6", "DSP6" }, \ - { name, "DSP7.1", "DSP7" }, \ - { name, "DSP7.2", "DSP7" }, \ - { name, "DSP7.3", "DSP7" }, \ - { name, "DSP7.4", "DSP7" }, \ - { name, "DSP7.5", "DSP7" }, \ - { name, "DSP7.6", "DSP7" }, \ - { name, "DFC1", "DFC1" }, \ - { name, "DFC2", "DFC2" }, \ - { name, "DFC3", "DFC3" }, \ - { name, "DFC4", "DFC4" }, \ - { name, "DFC5", "DFC5" }, \ - { name, "DFC6", "DFC6" }, \ - { name, "DFC7", "DFC7" }, \ - { name, "DFC8", "DFC8" } - -static const struct snd_soc_dapm_route cs47l90_dapm_routes[] = { - { "AIF2 Capture", NULL, "DBVDD2" }, - { "AIF2 Playback", NULL, "DBVDD2" }, - - { "AIF3 Capture", NULL, "DBVDD3" }, - { "AIF3 Playback", NULL, "DBVDD3" }, - - { "AIF4 Capture", NULL, "DBVDD3" }, - { "AIF4 Playback", NULL, "DBVDD3" }, - - { "OUT1L", NULL, "CPVDD1" }, - { "OUT1L", NULL, "CPVDD2" }, - { "OUT1R", NULL, "CPVDD1" }, - { "OUT1R", NULL, "CPVDD2" }, - { "OUT2L", NULL, "CPVDD1" }, - { "OUT2L", NULL, "CPVDD2" }, - { "OUT2R", NULL, "CPVDD1" }, - { "OUT2R", NULL, "CPVDD2" }, - { "OUT3L", NULL, "CPVDD1" }, - { "OUT3L", NULL, "CPVDD2" }, - { "OUT3R", NULL, "CPVDD1" }, - { "OUT3R", NULL, "CPVDD2" }, - - { "OUT1L", NULL, "SYSCLK" }, - { "OUT1R", NULL, "SYSCLK" }, - { "OUT2L", NULL, "SYSCLK" }, - { "OUT2R", NULL, "SYSCLK" }, - { "OUT3L", NULL, "SYSCLK" }, - { "OUT3R", NULL, "SYSCLK" }, - { "OUT5L", NULL, "SYSCLK" }, - { "OUT5R", NULL, "SYSCLK" }, - - { "SPD1", NULL, "SYSCLK" }, - { "SPD1", NULL, "SPD1TX1" }, - { "SPD1", NULL, "SPD1TX2" }, - - { "IN1AL", NULL, "SYSCLK" }, - { "IN1BL", NULL, "SYSCLK" }, - { "IN1AR", NULL, "SYSCLK" }, - { "IN1BR", NULL, "SYSCLK" }, - { "IN2AL", NULL, "SYSCLK" }, - { "IN2BL", NULL, "SYSCLK" }, - { "IN2R", NULL, "SYSCLK" }, - { "IN3L", NULL, "SYSCLK" }, - { "IN3R", NULL, "SYSCLK" }, - { "IN4L", NULL, "SYSCLK" }, - { "IN4R", NULL, "SYSCLK" }, - { "IN5L", NULL, "SYSCLK" }, - { "IN5R", NULL, "SYSCLK" }, - - { "IN3L", NULL, "DBVDD4" }, - { "IN3R", NULL, "DBVDD4" }, - { "IN4L", NULL, "DBVDD4" }, - { "IN4R", NULL, "DBVDD4" }, - { "IN5L", NULL, "DBVDD4" }, - { "IN5R", NULL, "DBVDD4" }, - - { "ASRC1IN1L", NULL, "SYSCLK" }, - { "ASRC1IN1R", NULL, "SYSCLK" }, - { "ASRC1IN2L", NULL, "SYSCLK" }, - { "ASRC1IN2R", NULL, "SYSCLK" }, - { "ASRC2IN1L", NULL, "SYSCLK" }, - { "ASRC2IN1R", NULL, "SYSCLK" }, - { "ASRC2IN2L", NULL, "SYSCLK" }, - { "ASRC2IN2R", NULL, "SYSCLK" }, - - { "ASRC1IN1L", NULL, "ASYNCCLK" }, - { "ASRC1IN1R", NULL, "ASYNCCLK" }, - { "ASRC1IN2L", NULL, "ASYNCCLK" }, - { "ASRC1IN2R", NULL, "ASYNCCLK" }, - { "ASRC2IN1L", NULL, "ASYNCCLK" }, - { "ASRC2IN1R", NULL, "ASYNCCLK" }, - { "ASRC2IN2L", NULL, "ASYNCCLK" }, - { "ASRC2IN2R", NULL, "ASYNCCLK" }, - - { "DSP1", NULL, "DSPCLK"}, - { "DSP2", NULL, "DSPCLK"}, - { "DSP3", NULL, "DSPCLK"}, - { "DSP4", NULL, "DSPCLK"}, - { "DSP5", NULL, "DSPCLK"}, - { "DSP6", NULL, "DSPCLK"}, - { "DSP7", NULL, "DSPCLK"}, - - { "MICBIAS1", NULL, "MICVDD" }, - { "MICBIAS2", NULL, "MICVDD" }, - - { "MICBIAS1A", NULL, "MICBIAS1" }, - { "MICBIAS1B", NULL, "MICBIAS1" }, - { "MICBIAS1C", NULL, "MICBIAS1" }, - { "MICBIAS1D", NULL, "MICBIAS1" }, - - { "MICBIAS2A", NULL, "MICBIAS2" }, - { "MICBIAS2B", NULL, "MICBIAS2" }, - { "MICBIAS2C", NULL, "MICBIAS2" }, - { "MICBIAS2D", NULL, "MICBIAS2" }, - - { "Noise Generator", NULL, "SYSCLK" }, - { "Tone Generator 1", NULL, "SYSCLK" }, - { "Tone Generator 2", NULL, "SYSCLK" }, - - { "Noise Generator", NULL, "NOISE" }, - { "Tone Generator 1", NULL, "TONE" }, - { "Tone Generator 2", NULL, "TONE" }, - - { "AIF1 Capture", NULL, "AIF1TX1" }, - { "AIF1 Capture", NULL, "AIF1TX2" }, - { "AIF1 Capture", NULL, "AIF1TX3" }, - { "AIF1 Capture", NULL, "AIF1TX4" }, - { "AIF1 Capture", NULL, "AIF1TX5" }, - { "AIF1 Capture", NULL, "AIF1TX6" }, - { "AIF1 Capture", NULL, "AIF1TX7" }, - { "AIF1 Capture", NULL, "AIF1TX8" }, - - { "AIF1RX1", NULL, "AIF1 Playback" }, - { "AIF1RX2", NULL, "AIF1 Playback" }, - { "AIF1RX3", NULL, "AIF1 Playback" }, - { "AIF1RX4", NULL, "AIF1 Playback" }, - { "AIF1RX5", NULL, "AIF1 Playback" }, - { "AIF1RX6", NULL, "AIF1 Playback" }, - { "AIF1RX7", NULL, "AIF1 Playback" }, - { "AIF1RX8", NULL, "AIF1 Playback" }, - - { "AIF2 Capture", NULL, "AIF2TX1" }, - { "AIF2 Capture", NULL, "AIF2TX2" }, - { "AIF2 Capture", NULL, "AIF2TX3" }, - { "AIF2 Capture", NULL, "AIF2TX4" }, - { "AIF2 Capture", NULL, "AIF2TX5" }, - { "AIF2 Capture", NULL, "AIF2TX6" }, - { "AIF2 Capture", NULL, "AIF2TX7" }, - { "AIF2 Capture", NULL, "AIF2TX8" }, - - { "AIF2RX1", NULL, "AIF2 Playback" }, - { "AIF2RX2", NULL, "AIF2 Playback" }, - { "AIF2RX3", NULL, "AIF2 Playback" }, - { "AIF2RX4", NULL, "AIF2 Playback" }, - { "AIF2RX5", NULL, "AIF2 Playback" }, - { "AIF2RX6", NULL, "AIF2 Playback" }, - { "AIF2RX7", NULL, "AIF2 Playback" }, - { "AIF2RX8", NULL, "AIF2 Playback" }, - - { "AIF3 Capture", NULL, "AIF3TX1" }, - { "AIF3 Capture", NULL, "AIF3TX2" }, - - { "AIF3RX1", NULL, "AIF3 Playback" }, - { "AIF3RX2", NULL, "AIF3 Playback" }, - - { "AIF4 Capture", NULL, "AIF4TX1" }, - { "AIF4 Capture", NULL, "AIF4TX2" }, - - { "AIF4RX1", NULL, "AIF4 Playback" }, - { "AIF4RX2", NULL, "AIF4 Playback" }, - - { "Slim1 Capture", NULL, "SLIMTX1" }, - { "Slim1 Capture", NULL, "SLIMTX2" }, - { "Slim1 Capture", NULL, "SLIMTX3" }, - { "Slim1 Capture", NULL, "SLIMTX4" }, - - { "SLIMRX1", NULL, "Slim1 Playback" }, - { "SLIMRX2", NULL, "Slim1 Playback" }, - { "SLIMRX3", NULL, "Slim1 Playback" }, - { "SLIMRX4", NULL, "Slim1 Playback" }, - - { "Slim2 Capture", NULL, "SLIMTX5" }, - { "Slim2 Capture", NULL, "SLIMTX6" }, - - { "SLIMRX5", NULL, "Slim2 Playback" }, - { "SLIMRX6", NULL, "Slim2 Playback" }, - - { "Slim3 Capture", NULL, "SLIMTX7" }, - { "Slim3 Capture", NULL, "SLIMTX8" }, - - { "SLIMRX7", NULL, "Slim3 Playback" }, - { "SLIMRX8", NULL, "Slim3 Playback" }, - - { "AIF1 Playback", NULL, "SYSCLK" }, - { "AIF2 Playback", NULL, "SYSCLK" }, - { "AIF3 Playback", NULL, "SYSCLK" }, - { "AIF4 Playback", NULL, "SYSCLK" }, - { "Slim1 Playback", NULL, "SYSCLK" }, - { "Slim2 Playback", NULL, "SYSCLK" }, - { "Slim3 Playback", NULL, "SYSCLK" }, - - { "AIF1 Capture", NULL, "SYSCLK" }, - { "AIF2 Capture", NULL, "SYSCLK" }, - { "AIF3 Capture", NULL, "SYSCLK" }, - { "AIF4 Capture", NULL, "SYSCLK" }, - { "Slim1 Capture", NULL, "SYSCLK" }, - { "Slim2 Capture", NULL, "SYSCLK" }, - { "Slim3 Capture", NULL, "SYSCLK" }, - - { "Voice Control CPU", NULL, "Voice Control DSP" }, - { "Voice Control DSP", NULL, "DSP3" }, - { "Voice Control CPU", NULL, "SYSCLK" }, - { "Voice Control DSP", NULL, "SYSCLK" }, - - { "Audio Trace DSP", NULL, "DSP1" }, - { "Audio Trace DSP", NULL, "SYSCLK" }, - - { "IN1L Mux", "A", "IN1AL" }, - { "IN1L Mux", "B", "IN1BL" }, - { "IN1R Mux", "A", "IN1AR" }, - { "IN1R Mux", "B", "IN1BR" }, - - { "IN2L Mux", "A", "IN2AL" }, - { "IN2L Mux", "B", "IN2BL" }, - - { "IN1L PGA", NULL, "IN1L Mux" }, - { "IN1R PGA", NULL, "IN1R Mux" }, - - { "IN2L PGA", NULL, "IN2L Mux" }, - { "IN2R PGA", NULL, "IN2R" }, - - { "IN3L PGA", NULL, "IN3L" }, - { "IN3R PGA", NULL, "IN3R" }, - - { "IN4L PGA", NULL, "IN4L" }, - { "IN4R PGA", NULL, "IN4R" }, - - { "IN5L PGA", NULL, "IN5L" }, - { "IN5R PGA", NULL, "IN5R" }, - - MADERA_MIXER_ROUTES("OUT1L", "HPOUT1L"), - MADERA_MIXER_ROUTES("OUT1R", "HPOUT1R"), - MADERA_MIXER_ROUTES("OUT2L", "HPOUT2L"), - MADERA_MIXER_ROUTES("OUT2R", "HPOUT2R"), - MADERA_MIXER_ROUTES("OUT3L", "HPOUT3L"), - MADERA_MIXER_ROUTES("OUT3R", "HPOUT3R"), - - MADERA_MIXER_ROUTES("OUT5L", "SPKDAT1L"), - MADERA_MIXER_ROUTES("OUT5R", "SPKDAT1R"), - - MADERA_MIXER_ROUTES("PWM1 Driver", "PWM1"), - MADERA_MIXER_ROUTES("PWM2 Driver", "PWM2"), - - MADERA_MIXER_ROUTES("AIF1TX1", "AIF1TX1"), - MADERA_MIXER_ROUTES("AIF1TX2", "AIF1TX2"), - MADERA_MIXER_ROUTES("AIF1TX3", "AIF1TX3"), - MADERA_MIXER_ROUTES("AIF1TX4", "AIF1TX4"), - MADERA_MIXER_ROUTES("AIF1TX5", "AIF1TX5"), - MADERA_MIXER_ROUTES("AIF1TX6", "AIF1TX6"), - MADERA_MIXER_ROUTES("AIF1TX7", "AIF1TX7"), - MADERA_MIXER_ROUTES("AIF1TX8", "AIF1TX8"), - - MADERA_MIXER_ROUTES("AIF2TX1", "AIF2TX1"), - MADERA_MIXER_ROUTES("AIF2TX2", "AIF2TX2"), - MADERA_MIXER_ROUTES("AIF2TX3", "AIF2TX3"), - MADERA_MIXER_ROUTES("AIF2TX4", "AIF2TX4"), - MADERA_MIXER_ROUTES("AIF2TX5", "AIF2TX5"), - MADERA_MIXER_ROUTES("AIF2TX6", "AIF2TX6"), - MADERA_MIXER_ROUTES("AIF2TX7", "AIF2TX7"), - MADERA_MIXER_ROUTES("AIF2TX8", "AIF2TX8"), - - MADERA_MIXER_ROUTES("AIF3TX1", "AIF3TX1"), - MADERA_MIXER_ROUTES("AIF3TX2", "AIF3TX2"), - - MADERA_MIXER_ROUTES("AIF4TX1", "AIF4TX1"), - MADERA_MIXER_ROUTES("AIF4TX2", "AIF4TX2"), - - MADERA_MIXER_ROUTES("SLIMTX1", "SLIMTX1"), - MADERA_MIXER_ROUTES("SLIMTX2", "SLIMTX2"), - MADERA_MIXER_ROUTES("SLIMTX3", "SLIMTX3"), - MADERA_MIXER_ROUTES("SLIMTX4", "SLIMTX4"), - MADERA_MIXER_ROUTES("SLIMTX5", "SLIMTX5"), - MADERA_MIXER_ROUTES("SLIMTX6", "SLIMTX6"), - MADERA_MIXER_ROUTES("SLIMTX7", "SLIMTX7"), - MADERA_MIXER_ROUTES("SLIMTX8", "SLIMTX8"), - - MADERA_MUX_ROUTES("SPD1TX1", "SPDIF1TX1"), - MADERA_MUX_ROUTES("SPD1TX2", "SPDIF1TX2"), - - MADERA_MIXER_ROUTES("EQ1", "EQ1"), - MADERA_MIXER_ROUTES("EQ2", "EQ2"), - MADERA_MIXER_ROUTES("EQ3", "EQ3"), - MADERA_MIXER_ROUTES("EQ4", "EQ4"), - - MADERA_MIXER_ROUTES("DRC1L", "DRC1L"), - MADERA_MIXER_ROUTES("DRC1R", "DRC1R"), - MADERA_MIXER_ROUTES("DRC2L", "DRC2L"), - MADERA_MIXER_ROUTES("DRC2R", "DRC2R"), - - MADERA_MIXER_ROUTES("LHPF1", "LHPF1"), - MADERA_MIXER_ROUTES("LHPF2", "LHPF2"), - MADERA_MIXER_ROUTES("LHPF3", "LHPF3"), - MADERA_MIXER_ROUTES("LHPF4", "LHPF4"), - - MADERA_MUX_ROUTES("ASRC1IN1L", "ASRC1IN1L"), - MADERA_MUX_ROUTES("ASRC1IN1R", "ASRC1IN1R"), - MADERA_MUX_ROUTES("ASRC1IN2L", "ASRC1IN2L"), - MADERA_MUX_ROUTES("ASRC1IN2R", "ASRC1IN2R"), - MADERA_MUX_ROUTES("ASRC2IN1L", "ASRC2IN1L"), - MADERA_MUX_ROUTES("ASRC2IN1R", "ASRC2IN1R"), - MADERA_MUX_ROUTES("ASRC2IN2L", "ASRC2IN2L"), - MADERA_MUX_ROUTES("ASRC2IN2R", "ASRC2IN2R"), - - MADERA_DSP_ROUTES("DSP1"), - MADERA_DSP_ROUTES("DSP2"), - MADERA_DSP_ROUTES("DSP3"), - MADERA_DSP_ROUTES("DSP4"), - MADERA_DSP_ROUTES("DSP5"), - MADERA_DSP_ROUTES("DSP6"), - MADERA_DSP_ROUTES("DSP7"), - - { "DSP2 Preloader", NULL, "DSP2 Virtual Input" }, - { "DSP2 Virtual Input", "Shared Memory", "DSP3" }, - { "DSP3 Preloader", NULL, "DSP3 Virtual Input" }, - { "DSP3 Virtual Input", "Shared Memory", "DSP2" }, - - { "DSP1 Trigger Out", NULL, "SYSCLK" }, - { "DSP1 Trigger Out", NULL, "DSP1 Trigger Output" }, - { "DSP2 Trigger Out", NULL, "DSP2 Trigger Output" }, - { "DSP3 Trigger Out", NULL, "DSP3 Trigger Output" }, - { "DSP4 Trigger Out", NULL, "DSP4 Trigger Output" }, - { "DSP5 Trigger Out", NULL, "DSP5 Trigger Output" }, - { "DSP6 Trigger Out", NULL, "DSP6 Trigger Output" }, - { "DSP7 Trigger Out", NULL, "DSP7 Trigger Output" }, - - { "DSP1 Trigger Output", "Switch", "DSP1" }, - { "DSP2 Trigger Output", "Switch", "DSP2" }, - { "DSP3 Trigger Output", "Switch", "DSP3" }, - { "DSP4 Trigger Output", "Switch", "DSP4" }, - { "DSP5 Trigger Output", "Switch", "DSP5" }, - { "DSP6 Trigger Output", "Switch", "DSP6" }, - { "DSP7 Trigger Output", "Switch", "DSP7" }, - - { "DSP1 Preloader", NULL, "DSP Virtual Input" }, - { "DSP1 Trigger Out", NULL, "DSP1 Virtual Output" }, - { "DSP1 Virtual Output", NULL, "SYSCLK" }, - - { "DSP2 Preloader", NULL, "DSP Virtual Input" }, - { "DSP2 Trigger Out", NULL, "DSP2 Virtual Output" }, - { "DSP2 Virtual Output", NULL, "SYSCLK" }, - - { "DSP3 Preloader", NULL, "DSP Virtual Input" }, - { "DSP3 Trigger Out", NULL, "DSP3 Virtual Output" }, - { "DSP3 Virtual Output", NULL, "SYSCLK" }, - - {"LHPF1 Input 1", NULL, "DSP Virtual Input"}, - {"LHPF2 Input 1", NULL, "DSP Virtual Input"}, - {"LHPF3 Input 1", NULL, "DSP Virtual Input"}, - - MADERA_MUX_ROUTES("ISRC1INT1", "ISRC1INT1"), - MADERA_MUX_ROUTES("ISRC1INT2", "ISRC1INT2"), - MADERA_MUX_ROUTES("ISRC1INT3", "ISRC1INT3"), - MADERA_MUX_ROUTES("ISRC1INT4", "ISRC1INT4"), - - MADERA_MUX_ROUTES("ISRC1DEC1", "ISRC1DEC1"), - MADERA_MUX_ROUTES("ISRC1DEC2", "ISRC1DEC2"), - MADERA_MUX_ROUTES("ISRC1DEC3", "ISRC1DEC3"), - MADERA_MUX_ROUTES("ISRC1DEC4", "ISRC1DEC4"), - - MADERA_MUX_ROUTES("ISRC2INT1", "ISRC2INT1"), - MADERA_MUX_ROUTES("ISRC2INT2", "ISRC2INT2"), - MADERA_MUX_ROUTES("ISRC2INT3", "ISRC2INT3"), - MADERA_MUX_ROUTES("ISRC2INT4", "ISRC2INT4"), - - MADERA_MUX_ROUTES("ISRC2DEC1", "ISRC2DEC1"), - MADERA_MUX_ROUTES("ISRC2DEC2", "ISRC2DEC2"), - MADERA_MUX_ROUTES("ISRC2DEC3", "ISRC2DEC3"), - MADERA_MUX_ROUTES("ISRC2DEC4", "ISRC2DEC4"), - - MADERA_MUX_ROUTES("ISRC3INT1", "ISRC3INT1"), - MADERA_MUX_ROUTES("ISRC3INT2", "ISRC3INT2"), - - MADERA_MUX_ROUTES("ISRC3DEC1", "ISRC3DEC1"), - MADERA_MUX_ROUTES("ISRC3DEC2", "ISRC3DEC2"), - - MADERA_MUX_ROUTES("ISRC4INT1", "ISRC4INT1"), - MADERA_MUX_ROUTES("ISRC4INT2", "ISRC4INT2"), - - MADERA_MUX_ROUTES("ISRC4DEC1", "ISRC4DEC1"), - MADERA_MUX_ROUTES("ISRC4DEC2", "ISRC4DEC2"), - - { "AEC1 Loopback", "HPOUT1L", "OUT1L" }, - { "AEC1 Loopback", "HPOUT1R", "OUT1R" }, - { "HPOUT1L", NULL, "OUT1L" }, - { "HPOUT1R", NULL, "OUT1R" }, - - { "AEC1 Loopback", "HPOUT2L", "OUT2L" }, - { "AEC1 Loopback", "HPOUT2R", "OUT2R" }, - { "HPOUT2L", NULL, "OUT2L" }, - { "HPOUT2R", NULL, "OUT2R" }, - - { "AEC1 Loopback", "HPOUT3L", "OUT3L" }, - { "AEC1 Loopback", "HPOUT3R", "OUT3R" }, - { "HPOUT3L", NULL, "OUT3L" }, - { "HPOUT3R", NULL, "OUT3R" }, - - { "AEC1 Loopback", "SPKDAT1L", "OUT5L" }, - { "AEC1 Loopback", "SPKDAT1R", "OUT5R" }, - { "SPKDAT1L", NULL, "OUT5L" }, - { "SPKDAT1R", NULL, "OUT5R" }, - { "SPKDAT Capture", NULL, "SPKDAT1L" }, - { "SPKDAT Capture", NULL, "SPKDAT1R" }, - - CS47L90_RXANC_INPUT_ROUTES("RXANCL", "RXANCL"), - CS47L90_RXANC_INPUT_ROUTES("RXANCR", "RXANCR"), - - CS47L90_RXANC_OUTPUT_ROUTES("OUT1L", "HPOUT1L"), - CS47L90_RXANC_OUTPUT_ROUTES("OUT1R", "HPOUT1R"), - CS47L90_RXANC_OUTPUT_ROUTES("OUT2L", "HPOUT2L"), - CS47L90_RXANC_OUTPUT_ROUTES("OUT2R", "HPOUT2R"), - CS47L90_RXANC_OUTPUT_ROUTES("OUT3L", "HPOUT3L"), - CS47L90_RXANC_OUTPUT_ROUTES("OUT3R", "HPOUT3R"), - CS47L90_RXANC_OUTPUT_ROUTES("OUT5L", "SPKDAT1L"), - CS47L90_RXANC_OUTPUT_ROUTES("OUT5R", "SPKDAT1R"), - - { "SPDIF1", NULL, "SPD1" }, - - { "MICSUPP", NULL, "SYSCLK" }, - - { "DRC1 Signal Activity", NULL, "DRC1 Activity Output" }, - { "DRC2 Signal Activity", NULL, "DRC2 Activity Output" }, - { "DRC1 Activity Output", "Switch", "DRC1L" }, - { "DRC1 Activity Output", "Switch", "DRC1R" }, - { "DRC2 Activity Output", "Switch", "DRC2L" }, - { "DRC2 Activity Output", "Switch", "DRC2R" }, - - MADERA_MUX_ROUTES("DFC1", "DFC1"), - MADERA_MUX_ROUTES("DFC2", "DFC2"), - MADERA_MUX_ROUTES("DFC3", "DFC3"), - MADERA_MUX_ROUTES("DFC4", "DFC4"), - MADERA_MUX_ROUTES("DFC5", "DFC5"), - MADERA_MUX_ROUTES("DFC6", "DFC6"), - MADERA_MUX_ROUTES("DFC7", "DFC7"), - MADERA_MUX_ROUTES("DFC8", "DFC8"), -}; - -static int cs47l90_set_fll(struct snd_soc_codec *codec, int fll_id, int source, - unsigned int Fref, unsigned int Fout) -{ - struct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(codec); - - switch (fll_id) { - case MADERA_FLL1_REFCLK: - return madera_set_fll_refclk(&cs47l90->fll[0], source, Fref, - Fout); - case MADERA_FLL2_REFCLK: - return madera_set_fll_refclk(&cs47l90->fll[1], source, Fref, - Fout); - case MADERA_FLLAO_REFCLK: - return madera_set_fll_ao_refclk(&cs47l90->fll[2], source, Fref, - Fout); - case MADERA_FLL1_SYNCCLK: - return madera_set_fll_syncclk(&cs47l90->fll[0], source, Fref, - Fout); - case MADERA_FLL2_SYNCCLK: - return madera_set_fll_syncclk(&cs47l90->fll[1], source, Fref, - Fout); - default: - return -EINVAL; - } -} - -static struct snd_soc_dai_driver cs47l90_dai[] = { - { - .name = "cs47l90-aif1", - .id = 1, - .base = MADERA_AIF1_BCLK_CTRL, - .playback = { - .stream_name = "AIF1 Playback", - .channels_min = 1, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "AIF1 Capture", - .channels_min = 1, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_dai_ops, - .symmetric_rates = 1, - .symmetric_samplebits = 1, - }, - { - .name = "cs47l90-aif2", - .id = 2, - .base = MADERA_AIF2_BCLK_CTRL, - .playback = { - .stream_name = "AIF2 Playback", - .channels_min = 1, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "AIF2 Capture", - .channels_min = 1, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_dai_ops, - .symmetric_rates = 1, - .symmetric_samplebits = 1, - }, - { - .name = "cs47l90-aif3", - .id = 3, - .base = MADERA_AIF3_BCLK_CTRL, - .playback = { - .stream_name = "AIF3 Playback", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "AIF3 Capture", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_dai_ops, - .symmetric_rates = 1, - .symmetric_samplebits = 1, - }, -/* slim1 id should be 4 - { - .name = "cs47l90-aif4", - .id = 4, - .base = MADERA_AIF4_BCLK_CTRL, - .playback = { - .stream_name = "AIF4 Playback", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "AIF4 Capture", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_dai_ops, - .symmetric_rates = 1, - .symmetric_samplebits = 1, - }, -*/ - { - .name = "cs47l90-slim1", - .id = 4, - .playback = { - .stream_name = "Slim1 Playback", - .channels_min = 1, - .channels_max = 4, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "Slim1 Capture", - .channels_min = 1, - .channels_max = 4, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_slim_dai_ops, - }, - { - .name = "cs47l90-slim2", - .id = 5, - .playback = { - .stream_name = "Slim2 Playback", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .capture = { - .stream_name = "Slim2 Capture", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .ops = &madera_slim_dai_ops, - }, - { - .name = "cs47l90-pdm", - .id = 8, - .capture = { - .stream_name = "SPKDAT Capture", - .channels_min = 1, - .channels_max = 2, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, - { - .name = "cs47l90-cpu-voicectrl", - .capture = { - .stream_name = "Voice Control CPU", - .channels_min = 1, - .channels_max = 1, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .compress_new = snd_soc_new_compress, - }, - { - .name = "cs47l90-dsp-voicectrl", - .capture = { - .stream_name = "Voice Control DSP", - .channels_min = 1, - .channels_max = 1, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, - { - .name = "cs47l90-cpu-trace", - .capture = { - .stream_name = "Audio Trace CPU", - .channels_min = 1, - .channels_max = 6, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .compress_new = snd_soc_new_compress, - }, - { - .name = "cs47l90-dsp-trace", - .capture = { - .stream_name = "Audio Trace DSP", - .channels_min = 1, - .channels_max = 6, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, - { - .name = "cs47l90-dsp1-cpu-txt", - .capture = { - .stream_name = "Text DSP1 CPU", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .compress_new = snd_soc_new_compress, - }, - { - .name = "cs47l90-dsp1-txt", - .capture = { - .stream_name = "Text DSP1", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, - { - .name = "cs47l90-dsp2-cpu-txt", - .capture = { - .stream_name = "Text DSP2 CPU", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .compress_new = snd_soc_new_compress, - }, - { - .name = "cs47l90-dsp2-txt", - .capture = { - .stream_name = "Text DSP2", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, - { - .name = "cs47l90-dsp3-cpu-txt", - .capture = { - .stream_name = "Text DSP3 CPU", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - .compress_new = snd_soc_new_compress, - }, - { - .name = "cs47l90-dsp3-txt", - .capture = { - .stream_name = "Text DSP3", - .channels_min = 2, - .channels_max = 8, - .rates = MADERA_RATES, - .formats = MADERA_FORMATS, - }, - }, -}; - -static int cs47l90_open(struct snd_compr_stream *stream) -{ - struct snd_soc_pcm_runtime *rtd = stream->private_data; - struct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(rtd->codec); - struct madera_priv *priv = &cs47l90->core; - struct madera *madera = priv->madera; - int n_adsp, channel; - - dev_dbg(madera->dev, - "Open compr stream '%s' for DAI %d '%s'\n", - stream->name, rtd->codec_dai->id, rtd->codec_dai->name); - - if (strcmp(rtd->codec_dai->name, "cs47l90-dsp-voicectrl") == 0) { - /* DSP 3 channel 1 */ - n_adsp = 2; - channel = 0; - } else if (strcmp(rtd->codec_dai->name, "cs47l90-dsp-trace") == 0) { - /* DSP 1 channel 1 */ - n_adsp = 0; - channel = 0; - } else if (strcmp(rtd->codec_dai->name, "cs47l90-dsp1-txt") == 0) { - /* DSP 1 channel 2 */ - n_adsp = 0; - channel = 1; - } else if (strcmp(rtd->codec_dai->name, "cs47l90-dsp3-txt") == 0) { - /* DSP 3 channel 2 */ - n_adsp = 2; - channel = 1; - } else if (strcmp(rtd->codec_dai->name, "cs47l90-dsp2-txt") == 0) { - /* DSP 2 channel 1 */ - n_adsp = 1; - channel = 0; - } else { - dev_err(madera->dev, - "No suitable compressed stream for DAI '%s'\n", - rtd->codec_dai->name); - return -EINVAL; - } - - return wm_adsp_compr_open(&priv->adsp[n_adsp], stream, channel); -} - -static int cs47l90_panic_check(struct cs47l90 *cs47l90, int dev, int *reg) -{ - struct madera_priv *priv = &cs47l90->core; - struct madera *madera = priv->madera; - unsigned int val, scratch1; - struct madera_voice_trigger_info trig_info; - - *reg = MADERA_DSP1_SCRATCH_1 + (0x80000 * dev); - regmap_read(madera->regmap_32bit, *reg, &val); - - val = val >> 16; - if ((val & 0x3fff) == 0) - return val; - - dev_err(madera->dev, "DSP%d Panic %x\n", dev, val); - - scratch1 = val; - memset(trig_info.err_msg, 0, sizeof(trig_info.err_msg)); - - regmap_read(madera->regmap_32bit, *reg, &val); - trig_info.err_msg[1] = (u16)val; - trig_info.err_msg[0] = (u16)(val >> 16); - - regmap_read(madera->regmap_32bit, *reg+2, &val); - trig_info.err_msg[2] = (u16)val; - trig_info.err_msg[3] = (u16)(val >> 16); - - - /* Panic callback */ - trig_info.core_num = dev; - trig_info.code = MADERA_TRIGGER_PANIC; - madera_call_notifiers(madera, - MADERA_NOTIFY_VOICE_TRIGGER, - &trig_info); - - /* Clean panic field */ - scratch1 &= 0xc000; - regmap_write(madera->regmap_32bit, *reg, (scratch1<<16)); - - return scratch1; -} - -static int cs47l90_text_event(struct cs47l90 *cs47l90, int dev) -{ - struct madera_priv *priv = &cs47l90->core; - struct madera *madera = priv->madera; - - dev_dbg(madera->dev, "DSP%d Text event\n", dev); - return 0; -} - -static irqreturn_t cs47l90_adsp2_irq(int irq, void *data) -{ - struct cs47l90 *cs47l90 = data; - struct madera_priv *priv = &cs47l90->core; - struct madera *madera = priv->madera; - struct madera_voice_trigger_info trig_info; - int i, scratch_reg, reg, ret = 0; - int serviced = 0, channel = 0; - - for (i = 0; i < CS47L90_NUM_ADSP; ++i) { - scratch_reg = cs47l90_panic_check(cs47l90, i, ®); - dev_dbg(madera->dev, "dsp %d, scratch_reg %x\n", i, scratch_reg); - if ((scratch_reg & 0x3fff) == 0) { - if (scratch_reg & 0x4000) { - /* Clear code bit */ - scratch_reg &= 0xbfff; - scratch_reg = scratch_reg << 16; - regmap_write(madera->regmap_32bit, reg, - scratch_reg); - trig_info.core_num = i; - trig_info.code = MADERA_TRIGGER_VOICE; - madera_call_notifiers(madera, - MADERA_NOTIFY_VOICE_TRIGGER, - &trig_info); - channel = 0; - dev_dbg(madera->dev, "Call AOV voice trigger notifier\n"); - } - - /* Text interrupt */ - if (scratch_reg & 0x8000) { - /* Clear event bit */ - scratch_reg &= 0x7fff; - scratch_reg = scratch_reg << 16; - regmap_write(madera->regmap_32bit, reg, - scratch_reg); - dev_dbg(madera->dev, "Calling Text Callback\n"); - cs47l90_text_event(cs47l90, i); - channel = 1; - } - } - ret = wm_adsp_compr_handle_irq(&priv->adsp[i], channel); - if (ret != -ENODEV) - serviced++; - } - - if (!serviced) { - dev_err(madera->dev, "Spurious compressed data IRQ\n"); - return IRQ_NONE; - } - - return IRQ_HANDLED; -} - -static irqreturn_t cs47l90_dsp_bus_error(int irq, void *data) -{ - struct wm_adsp *dsp = (struct wm_adsp *)data; - - return wm_adsp2_bus_error(dsp); -} - -static const char * const cs47l90_dmic_refs[] = { - "MICVDD", - "MICBIAS1", - "MICBIAS2", - "MICBIAS3", -}; - -static const char * const cs47l90_dmic_inputs[] = { - "IN1L Mux", - "IN1R Mux", - "IN2L Mux", - "IN2R", - "IN3L", - "IN3R", - "IN4L", - "IN4R", - "IN5L", - "IN5R", -}; - -static int cs47l90_codec_probe(struct snd_soc_codec *codec) -{ - struct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(codec); - struct madera *madera = cs47l90->core.madera; - int ret, i; - - cs47l90->core.madera->dapm = snd_soc_codec_get_dapm(codec); - - ret = madera_init_inputs(codec, - cs47l90_dmic_inputs, - ARRAY_SIZE(cs47l90_dmic_inputs), - cs47l90_dmic_refs, - ARRAY_SIZE(cs47l90_dmic_refs)); - if (ret) - return ret; - - ret = madera_init_outputs(codec); - if (ret) - return ret; - - ret = madera_init_drc(codec); - if (ret) - return ret; - - snd_soc_dapm_disable_pin(madera->dapm, "HAPTICS"); - - ret = snd_soc_add_codec_controls(codec, madera_adsp_rate_controls, - CS47L90_NUM_ADSP); - if (ret) - return ret; - - ret = madera_request_irq(madera, MADERA_IRQ_DSP_IRQ1, - "ADSP2 Compressed IRQ", cs47l90_adsp2_irq, - cs47l90); - if (ret != 0) { - dev_err(codec->dev, "Failed to request DSP IRQ: %d\n", ret); - return ret; - } - - for (i = 0; i < CS47L90_NUM_ADSP; i++) { - wm_adsp2_codec_probe(&cs47l90->core.adsp[i], codec); - - ret = madera_init_bus_error_irq(codec, i, - cs47l90_dsp_bus_error); - if (ret) { - madera_free_irq(madera, MADERA_IRQ_DSP_IRQ1, cs47l90); - wm_adsp2_codec_remove(&cs47l90->core.adsp[i], codec); - - for (--i; i >= 0; --i) { - wm_adsp2_codec_remove(&cs47l90->core.adsp[i], - codec); - madera_destroy_bus_error_irq(codec, i); - } - - return ret; - } - } -#if IS_ENABLED(CONFIG_SND_SOC_AOV_TRIGGER) - aov_trigger_register_notifier(codec); -#endif - return 0; -} - -static int cs47l90_codec_remove(struct snd_soc_codec *codec) -{ - int i; - struct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(codec); - struct madera *madera = cs47l90->core.madera; - - for (i = 0; i < CS47L90_NUM_ADSP; i++) { - wm_adsp2_codec_remove(&cs47l90->core.adsp[i], codec); - madera_destroy_bus_error_irq(codec, i); - } - - madera_free_irq(madera, MADERA_IRQ_DSP_IRQ1, cs47l90); - - cs47l90->core.madera->dapm = NULL; - - return 0; -} - -#define CS47L90_DIG_VU 0x0200 - -static unsigned int cs47l90_digital_vu[] = { - MADERA_DAC_DIGITAL_VOLUME_1L, - MADERA_DAC_DIGITAL_VOLUME_1R, - MADERA_DAC_DIGITAL_VOLUME_2L, - MADERA_DAC_DIGITAL_VOLUME_2R, - MADERA_DAC_DIGITAL_VOLUME_3L, - MADERA_DAC_DIGITAL_VOLUME_3R, - MADERA_DAC_DIGITAL_VOLUME_5L, - MADERA_DAC_DIGITAL_VOLUME_5R, -}; - -static struct regmap *cs47l90_get_regmap(struct device *dev) -{ - struct cs47l90 *cs47l90 = dev_get_drvdata(dev); - - return cs47l90->core.madera->regmap; -} - -static struct snd_soc_codec_driver soc_codec_dev_cs47l90 = { - .probe = cs47l90_codec_probe, - .remove = cs47l90_codec_remove, - .get_regmap = cs47l90_get_regmap, - - .idle_bias_off = true, - - .set_sysclk = madera_set_sysclk, - .set_pll = cs47l90_set_fll, - .component_driver = { - .controls = cs47l90_snd_controls, - .num_controls = ARRAY_SIZE(cs47l90_snd_controls), - .dapm_widgets = cs47l90_dapm_widgets, - .num_dapm_widgets = ARRAY_SIZE(cs47l90_dapm_widgets), - .dapm_routes = cs47l90_dapm_routes, - .num_dapm_routes = ARRAY_SIZE(cs47l90_dapm_routes), - }, -}; - -static struct snd_compr_ops cs47l90_compr_ops = { - .open = cs47l90_open, - .free = wm_adsp_compr_free, - .set_params = wm_adsp_compr_set_params, - .get_caps = wm_adsp_compr_get_caps, - .trigger = wm_adsp_compr_trigger, - .pointer = wm_adsp_compr_pointer, - .copy = wm_adsp_compr_copy, -}; - -static struct snd_soc_platform_driver cs47l90_compr_platform = { - .compr_ops = &cs47l90_compr_ops, -}; - -static int cs47l90_probe(struct platform_device *pdev) -{ - struct madera *madera = dev_get_drvdata(pdev->dev.parent); - struct cs47l90 *cs47l90; - int i, ret; - - BUILD_BUG_ON(ARRAY_SIZE(cs47l90_dai) > MADERA_MAX_DAI); - - /* FX Rate has the largest number of sources */ - BUILD_BUG_ON(ARRAY_SIZE(cs47l90->core.mixer_sources_cache) < - ARRAY_SIZE(cs47l90_fx_inputs)); - - /* quick exit if Madera irqchip driver hasn't completed probe */ - if (!madera->irq_dev) { - dev_dbg(&pdev->dev, "irqchip driver not ready\n"); - return -EPROBE_DEFER; - } - - cs47l90 = devm_kzalloc(&pdev->dev, sizeof(struct cs47l90), - GFP_KERNEL); - if (!cs47l90) - return -ENOMEM; - - platform_set_drvdata(pdev, cs47l90); - - /* Set of_node to parent from the SPI device to allow DAPM to - * locate regulator supplies */ - pdev->dev.of_node = madera->dev->of_node; - - cs47l90->core.madera = madera; - cs47l90->core.num_inputs = 10; - cs47l90->core.get_sources = cs47l90_get_sources; - - ret = madera_core_init(&cs47l90->core); - if (ret) - return ret; - - for (i = 0; i < CS47L90_NUM_ADSP; i++) { - cs47l90->core.adsp[i].part = "cs47l90"; - cs47l90->core.adsp[i].num = i + 1; - cs47l90->core.adsp[i].type = WMFW_ADSP2; - cs47l90->core.adsp[i].rev = 2; - cs47l90->core.adsp[i].dev = madera->dev; - cs47l90->core.adsp[i].regmap = madera->regmap_32bit; - - cs47l90->core.adsp[i].base = cs47l90_dsp_control_bases[i]; - cs47l90->core.adsp[i].mem = cs47l90_dsp_regions[i]; - cs47l90->core.adsp[i].num_mems - = ARRAY_SIZE(cs47l90_dsp1_regions); - - cs47l90->core.adsp[i].lock_regions = WM_ADSP2_REGION_1_9; - - ret = wm_adsp2_init(&cs47l90->core.adsp[i]); - if (ret != 0) { - for (--i; i >= 0; --i) - wm_adsp2_remove(&cs47l90->core.adsp[i]); - goto error_core; - } - } - - madera_init_fll(madera, 1, MADERA_FLL1_CONTROL_1 - 1, - &cs47l90->fll[0]); - madera_init_fll(madera, 2, MADERA_FLL2_CONTROL_1 - 1, - &cs47l90->fll[1]); - madera_init_fll(madera, 4, MADERA_FLLAO_CONTROL_1 - 1, - &cs47l90->fll[2]); - - for (i = 0; i < ARRAY_SIZE(cs47l90_dai); i++) - madera_init_dai(&cs47l90->core, i); - - /* Latch volume update bits */ - for (i = 0; i < ARRAY_SIZE(cs47l90_digital_vu); i++) - regmap_update_bits(madera->regmap, cs47l90_digital_vu[i], - CS47L90_DIG_VU, CS47L90_DIG_VU); - - pm_runtime_enable(&pdev->dev); - pm_runtime_idle(&pdev->dev); - - ret = snd_soc_register_platform(&pdev->dev, &cs47l90_compr_platform); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to register platform: %d\n", ret); - goto error; - } - - ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_cs47l90, - cs47l90_dai, ARRAY_SIZE(cs47l90_dai)); - if (ret < 0) { - dev_err(&pdev->dev, - "Failed to register codec: %d\n", ret); - snd_soc_unregister_platform(&pdev->dev); - goto error; - } - - return ret; - -error: - for (i = 0; i < CS47L90_NUM_ADSP; i++) - wm_adsp2_remove(&cs47l90->core.adsp[i]); -error_core: - madera_core_destroy(&cs47l90->core); - - return ret; -} - -static int cs47l90_remove(struct platform_device *pdev) -{ - struct cs47l90 *cs47l90 = platform_get_drvdata(pdev); - int i; - - snd_soc_unregister_platform(&pdev->dev); - snd_soc_unregister_codec(&pdev->dev); - pm_runtime_disable(&pdev->dev); - - for (i = 0; i < CS47L90_NUM_ADSP; i++) - wm_adsp2_remove(&cs47l90->core.adsp[i]); - - madera_core_destroy(&cs47l90->core); - - return 0; -} - -static struct platform_driver cs47l90_codec_driver = { - .driver = { - .name = "cs47l90-codec", - }, - .probe = cs47l90_probe, - .remove = cs47l90_remove, -}; - -module_platform_driver(cs47l90_codec_driver); - -MODULE_DESCRIPTION("ASoC CS47L90 driver"); -MODULE_AUTHOR("Nikesh Oswal "); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:cs47l90-codec"); diff --git a/sound/soc/codecs/madera-slimbus.c b/sound/soc/codecs/madera-slimbus.c deleted file mode 100644 index 10cf8fe2ae89..000000000000 --- a/sound/soc/codecs/madera-slimbus.c +++ /dev/null @@ -1,534 +0,0 @@ -#include -#include - -#include -#include -#include - -#include "madera-slimbus.h" -#include "madera.h" - -/* As there is no sane way to recover an entry point to the slimbus core - * from anything other than a slim_device probe, simply use this as a bridge - * between ASoC and the slimbus core to get our slimbus generic device - * associated with our ASoC specific slimbus code - */ -static struct slim_device *stashed_slim_dev; - -static struct mutex slim_tx_lock; -static struct mutex slim_rx_lock; - -static int madera_slim_get_la(struct slim_device *slim, u8 *la) -{ - int ret; - const unsigned long timeout = jiffies + msecs_to_jiffies(100); - - if (slim == NULL) - return -EINVAL; - - do { - ret = slim_get_logical_addr(slim, slim->e_addr, 6, la); - if (!ret) - break; - /* Give SLIMBUS time to report present and be ready. */ - usleep_range(1000, 1100); - dev_info(&slim->dev, "retrying get logical addr\n"); - } while time_before(jiffies, timeout); - - dev_info(&slim->dev, "LA %d\n", *la); - return 0; -} - -static void madera_slim_fixup_prop(struct slim_ch *prop, - u32 samplerate, u32 sampleszbits) -{ - prop->prot = SLIM_AUTO_ISO; - prop->baser = SLIM_RATE_4000HZ; - prop->dataf = SLIM_CH_DATAF_NOT_DEFINED; - prop->auxf = SLIM_CH_AUXF_NOT_APPLICABLE; - prop->ratem = samplerate / 4000; - prop->sampleszbits = sampleszbits; -} - -#define TX_STREAM_1 128 -#define TX_STREAM_2 132 -#define TX_STREAM_3 134 - -#define RX_STREAM_1 144 -#define RX_STREAM_2 146 -#define RX_STREAM_3 148 - -static u32 rx_porth1[2], rx_porth2[2], rx_porth3[2]; -static u32 tx_porth1[4], tx_porth2[2], tx_porth3[1]; -static u16 rx_handles1[] = { RX_STREAM_1, RX_STREAM_1 + 1 }; -static u16 rx_handles2[] = { RX_STREAM_2, RX_STREAM_2 + 1 }; -static u16 rx_handles3[] = { RX_STREAM_3, RX_STREAM_3 + 1 }; -static u16 tx_handles1[] = { TX_STREAM_1, TX_STREAM_1 + 1, - TX_STREAM_1 + 2, TX_STREAM_1 + 3 }; -static u16 tx_handles2[] = { TX_STREAM_2, TX_STREAM_2 + 1 }; -static u16 tx_handles3[] = { TX_STREAM_3 }; -static u16 rx_group1, rx_group2, rx_group3; -static u16 tx_group1, tx_group2, tx_group3; - -int madera_slim_tx_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - struct slim_ch prop; - int ret = 0, i; - u32 *porth; - u16 *handles, *group; - int chcnt; - - if (stashed_slim_dev == NULL) { - dev_err(madera->dev, "slim device undefined.\n"); - return -EINVAL; - } - mutex_lock(&slim_tx_lock); - switch (w->shift) { - case MADERA_SLIMTX1_ENA_SHIFT: - dev_dbg(madera->dev, "TX1\n"); - chcnt = priv->tx_chan_map_num[0]; - if (chcnt > ARRAY_SIZE(tx_porth1)) { - dev_err(madera->dev, "ERROR: Too many TX channels\n"); - ret = -EINVAL; - goto exit; - } - porth = tx_porth1; - handles = tx_handles1; - group = &tx_group1; - break; - case MADERA_SLIMTX5_ENA_SHIFT: - dev_dbg(madera->dev, "TX2\n"); - chcnt = priv->tx_chan_map_num[1]; - if (chcnt > ARRAY_SIZE(tx_porth2)) { - dev_err(madera->dev, "ERROR: Too many TX channels\n"); - ret = -EINVAL; - goto exit; - } - porth = tx_porth2; - handles = tx_handles2; - group = &tx_group2; - break; - case MADERA_SLIMTX4_ENA_SHIFT: - dev_dbg(codec->dev, "TX3\n"); - chcnt = priv->tx_chan_map_num[2]; - if (chcnt > ARRAY_SIZE(tx_porth3)) { - dev_err(madera->dev, "ERROR: Too many TX channels\n"); - ret = -EINVAL; - goto exit; - } - porth = tx_porth3; - handles = tx_handles3; - group = &tx_group3; - break; - default: - goto exit; - } - madera_slim_fixup_prop(&prop, 48000, 16); - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - case SND_SOC_DAPM_POST_PMU: - dev_dbg(madera->dev, "Start slimbus TX\n"); - ret = slim_define_ch(stashed_slim_dev, &prop, - handles, chcnt, true, group); - if (ret != 0) { - dev_err(madera->dev, "slim_define_ch() failed: %d\n", - ret); - goto exit; - } - - for (i = 0; i < chcnt; i++) { - ret = slim_connect_src(stashed_slim_dev, - porth[i], handles[i]); - if (ret != 0) { - dev_err(madera->dev, "src connect fail %d:%d\n", - i, ret); - goto exit; - } - } - - ret = slim_control_ch(stashed_slim_dev, *group, - SLIM_CH_ACTIVATE, true); - if (ret != 0) { - dev_err(madera->dev, "Failed to activate: %d\n", ret); - goto exit; - } - break; - - case SND_SOC_DAPM_POST_PMD: - case SND_SOC_DAPM_PRE_PMD: - dev_dbg(madera->dev, "Stop slimbus Tx\n"); - ret = slim_control_ch(stashed_slim_dev, *group, - SLIM_CH_REMOVE, true); - if (ret != 0) - dev_err(madera->dev, "Failed to remove tx: %d\n", ret); - - break; - default: - break; - } - -exit: - mutex_unlock(&slim_tx_lock); - return ret; -} -EXPORT_SYMBOL_GPL(madera_slim_tx_ev); - -int madera_slim_rx_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - struct slim_ch prop; - int ret = 0, i; - u32 *porth; - u16 *handles, *group; - int chcnt; - u32 rx_sampleszbits = 16, rx_samplerate = 48000; - - if (stashed_slim_dev == NULL) { - dev_err(madera->dev, "slim device undefined.\n"); - return -EINVAL; - } - mutex_lock(&slim_rx_lock); - switch (w->shift) { - case MADERA_SLIMRX1_ENA_SHIFT: - dev_dbg(madera->dev, "RX1\n"); - chcnt = priv->rx_chan_map_num[0]; - if (chcnt > ARRAY_SIZE(rx_porth1)) { - dev_err(madera->dev, "ERROR: Too many RX channels\n"); - ret = -EINVAL; - goto exit; - } - porth = rx_porth1; - handles = rx_handles1; - group = &rx_group1; - rx_sampleszbits = priv->rx1_sampleszbits; - rx_samplerate = priv->rx1_samplerate; - break; - case MADERA_SLIMRX5_ENA_SHIFT: - dev_dbg(madera->dev, "RX2\n"); - chcnt = priv->rx_chan_map_num[1]; - if (chcnt > ARRAY_SIZE(rx_porth2)) { - dev_err(madera->dev, "ERROR: Too many RX channels\n"); - ret = -EINVAL; - goto exit; - } - porth = rx_porth2; - handles = rx_handles2; - group = &rx_group2; - rx_sampleszbits = priv->rx2_sampleszbits; - rx_samplerate = priv->rx2_samplerate; - break; - case MADERA_SLIMRX3_ENA_SHIFT: - dev_dbg(codec->dev, "RX3\n"); - chcnt = priv->rx_chan_map_num[2]; - if (chcnt > ARRAY_SIZE(rx_porth3)) { - dev_err(madera->dev, "ERROR: Too many RX channels\n"); - ret = -EINVAL; - goto exit; - } - porth = rx_porth3; - handles = rx_handles3; - group = &rx_group3; - break; - default: - goto exit; - } - madera_slim_fixup_prop(&prop, rx_samplerate, rx_sampleszbits); - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - case SND_SOC_DAPM_POST_PMU: - dev_dbg(madera->dev, "Start slimbus RX, rate=%d, bit=%d\n", - rx_samplerate, rx_sampleszbits); - ret = slim_define_ch(stashed_slim_dev, &prop, - handles, chcnt, true, group); - if (ret != 0) { - dev_err(madera->dev, "slim_define_ch() failed: %d\n", - ret); - return ret; - } - - for (i = 0; i < chcnt; i++) { - ret = slim_connect_sink(stashed_slim_dev, &porth[i], 1, - handles[i]); - if (ret != 0) { - dev_err(madera->dev, "snk connect fail %d:%d\n", - i, ret); - goto exit; - } - } - - ret = slim_control_ch(stashed_slim_dev, *group, - SLIM_CH_ACTIVATE, true); - if (ret != 0) { - dev_err(madera->dev, "Failed to activate: %d\n", ret); - goto exit; - } - break; - - case SND_SOC_DAPM_POST_PMD: - case SND_SOC_DAPM_PRE_PMD: - dev_dbg(madera->dev, "Stop slimbus Rx\n"); - ret = slim_control_ch(stashed_slim_dev, *group, - SLIM_CH_REMOVE, true); - if (ret != 0) - dev_err(madera->dev, "Failed to remove rx: %d\n", ret); - - break; - default: - break; - } - -exit: - mutex_unlock(&slim_rx_lock); - return ret; -} -EXPORT_SYMBOL_GPL(madera_slim_rx_ev); - -int madera_set_channel_map(struct snd_soc_dai *dai, - unsigned int tx_num, unsigned int *tx_slot, - unsigned int rx_num, unsigned int *rx_slot) -{ - struct madera_priv *priv = snd_soc_codec_get_drvdata(dai->codec); - struct madera *madera = priv->madera; - - u8 laddr; - int i, ret; - u32 *tx_porth, *rx_porth; - u16 *tx_handles, *rx_handles; - int tx_chcnt, rx_chcnt, tx_idx_step, rx_idx_step; - int tx_stream_idx, rx_stream_idx; - int *tx_priv_counter, *rx_priv_counter; - u16 *tx_chan_map_slot, *rx_chan_map_slot; - - if (stashed_slim_dev == NULL) { - dev_err(madera->dev, "%s No slim device available\n", - __func__); - return -EINVAL; - } - - /* - * same reason with stashed_slim_dev, there is no clever way to link - * codec and slimbus driver on madera based platform. whenever codec - * calls slimbus driver, it will keep its client codec pointer and use - * it as a bridge to call codec related functions. - */ - if (dai->codec != NULL) - slim_set_clientdata(stashed_slim_dev, dai->codec); - - if (!priv->slim_logic_addr) { - madera_slim_get_la(stashed_slim_dev, &laddr); - priv->slim_logic_addr = laddr; - } else { - laddr = priv->slim_logic_addr; - } - - switch (dai->id) { - case 4: /* cs47l35-slim1 */ - tx_porth = tx_porth1; - tx_handles = tx_handles1; - tx_chcnt = ARRAY_SIZE(tx_porth1); - tx_idx_step = 8; - tx_stream_idx = TX_STREAM_1; - tx_priv_counter = &priv->tx_chan_map_num[0]; - tx_chan_map_slot = priv->tx_chan_map_slot[0]; - - rx_porth = rx_porth1; - rx_handles = rx_handles1; - rx_chcnt = ARRAY_SIZE(rx_porth1); - rx_idx_step = 0; - rx_stream_idx = RX_STREAM_1; - rx_priv_counter = &priv->rx_chan_map_num[0]; - rx_chan_map_slot = priv->rx_chan_map_slot[0]; - break; - case 5: /* cs47l35-slim2 */ - tx_porth = tx_porth2; - tx_handles = tx_handles2; - tx_chcnt = ARRAY_SIZE(tx_porth2); - tx_idx_step = 12; - tx_stream_idx = TX_STREAM_2; - tx_priv_counter = &priv->tx_chan_map_num[1]; - tx_chan_map_slot = priv->tx_chan_map_slot[1]; - - rx_porth = rx_porth2; - rx_handles = rx_handles2; - rx_chcnt = ARRAY_SIZE(rx_porth2); - rx_idx_step = 4; - rx_stream_idx = RX_STREAM_2; - rx_priv_counter = &priv->rx_chan_map_num[1]; - rx_chan_map_slot = priv->rx_chan_map_slot[1]; - break; - default: - dev_err(madera->dev, "set_channel_map unknown dai->id %d\n", - dai->id); - return -EINVAL; - } - - if (rx_num > rx_chcnt) - rx_num = rx_chcnt; - if (rx_num > 0) - *rx_priv_counter = rx_num; - - if (tx_num > tx_chcnt) - tx_num = tx_chcnt; - if (tx_num > 0) - *tx_priv_counter = tx_num; - - /* This actually allocates the channel or refcounts it if there... */ - for (i = 0; i < rx_num; i++) { - slim_get_slaveport(laddr, i + rx_idx_step, &rx_porth[i], - SLIM_SINK); - - ret = slim_query_ch(stashed_slim_dev, rx_stream_idx + i, - &rx_handles[i]); - if (ret != 0) { - dev_err(madera->dev, "slim_alloc_ch() failed: %d\n", - ret); - return ret; - } - - rx_chan_map_slot[i] = rx_slot[i] = rx_stream_idx + i; - } - - for (i = 0; i < tx_num; i++) { - slim_get_slaveport(laddr, i + tx_idx_step, &tx_porth[i], - SLIM_SRC); - - ret = slim_query_ch(stashed_slim_dev, tx_stream_idx + i, - &tx_handles[i]); - if (ret != 0) { - dev_err(madera->dev, "slim_alloc_ch() failed: %d\n", - ret); - return ret; - } - - tx_chan_map_slot[i] = tx_slot[i] = tx_stream_idx + i; - } - - return 0; -} -EXPORT_SYMBOL_GPL(madera_set_channel_map); - -int madera_get_channel_map(struct snd_soc_dai *dai, - unsigned int *tx_num, unsigned int *tx_slot, - unsigned int *rx_num, unsigned int *rx_slot) -{ - struct madera_priv *priv = snd_soc_codec_get_drvdata(dai->codec); - struct madera *madera = priv->madera; - int i; - int tx_chan_map_num, rx_chan_map_num; - u16 *tx_chan_map_slot, *rx_chan_map_slot; - - switch (dai->id) { - case 4: /* cs47l35-slim1 */ - tx_chan_map_num = priv->tx_chan_map_num[0]; - rx_chan_map_num = priv->rx_chan_map_num[0]; - tx_chan_map_slot = priv->tx_chan_map_slot[0]; - rx_chan_map_slot = priv->rx_chan_map_slot[0]; - break; - case 5: /* cs47l35-slim2 */ - tx_chan_map_num = priv->tx_chan_map_num[1]; - rx_chan_map_num = priv->rx_chan_map_num[1]; - tx_chan_map_slot = priv->tx_chan_map_slot[1]; - rx_chan_map_slot = priv->rx_chan_map_slot[1]; - break; - default: - dev_err(madera->dev, "get_channel_map unknown dai->id %d\n", - dai->id); - return -EINVAL; - } - - if (!rx_chan_map_num || !tx_chan_map_num) - return -EINVAL; - - *rx_num = rx_chan_map_num; - *tx_num = tx_chan_map_num; - - for (i = 0; i < rx_chan_map_num; i++) - rx_slot[i] = rx_chan_map_slot[i]; - - for (i = 0; i < tx_chan_map_num; i++) - tx_slot[i] = tx_chan_map_slot[i]; - - return 0; -} -EXPORT_SYMBOL_GPL(madera_get_channel_map); - -static const struct slim_device_id madera_slim_id[] = { - { "madera-slim-audio", 0 }, - { }, -}; - -static int madera_slim_audio_probe(struct slim_device *slim) -{ - stashed_slim_dev = slim; - dev_info(&slim->dev, "%s SLIM PROBE\n", __func__); - mutex_init(&slim_tx_lock); - mutex_init(&slim_rx_lock); - - return 0; -} - -static int madera_slim_device_reset(struct slim_device *slim) -{ - struct snd_soc_codec *codec; - - if (slim == NULL) - return -EINVAL; - - codec = slim_get_devicedata(slim); - if (codec != NULL) { - dev_info(&slim->dev, "%s handle SLIM RESET\n", __func__); - snd_soc_card_change_online_state(codec->component.card, 1); - } - - return 0; -} - -static int madera_slim_device_down(struct slim_device *slim) -{ - struct snd_soc_codec *codec; - - if (slim == NULL) - return -EINVAL; - - codec = slim_get_devicedata(slim); - if (codec != NULL) { - dev_info(&slim->dev, "%s handle SLIM DOWN\n", __func__); - snd_soc_card_change_online_state(codec->component.card, 0); - } - - return 0; -} - -static struct slim_driver madera_slim_audio = { - .driver = { - .name = "madera-slim-audio", - .owner = THIS_MODULE, - }, - .probe = madera_slim_audio_probe, - .id_table = madera_slim_id, - .reset_device = madera_slim_device_reset, - .device_down = madera_slim_device_down, -}; - -static int __init madera_slim_audio_init(void) -{ - return slim_driver_register(&madera_slim_audio); -} -module_init(madera_slim_audio_init); - -static void __exit madera_slim_audio_exit(void) -{ - slim_driver_unregister(&madera_slim_audio); -} -module_exit(madera_slim_audio_exit); diff --git a/sound/soc/codecs/madera-slimbus.h b/sound/soc/codecs/madera-slimbus.h deleted file mode 100644 index 7d8f9800c082..000000000000 --- a/sound/soc/codecs/madera-slimbus.h +++ /dev/null @@ -1,57 +0,0 @@ -#ifndef MADERA_SLIMBUS_H -#define MADERA_SLIMBUS_H - -#include - -#define MADERA_SLIMBUS_MAX_CHANNELS 8 -#define CONFIG_SND_SOC_MADERA_SLIMBUS 1 -#ifdef CONFIG_SND_SOC_MADERA_SLIMBUS -#include - -int madera_slim_tx_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); -int madera_slim_rx_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); -int madera_set_channel_map(struct snd_soc_dai *dai, - unsigned int tx_num, unsigned int *tx_slot, - unsigned int rx_num, unsigned int *rx_slot); -int madera_get_channel_map(struct snd_soc_dai *dai, - unsigned int *tx_num, unsigned int *tx_slot, - unsigned int *rx_num, unsigned int *rx_slot); -#else -static inline int madera_slim_tx_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event, int dai_id) -{ - return 0; -} - -static inline int madera_slim_rx_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event, int dai_id) -{ - return 0; -} - -static inline int madera_set_channel_map(struct snd_soc_dai *dai, - unsigned int tx_num, - unsigned int *tx_slot, - unsigned int rx_num, - unsigned int *rx_slot) -{ - return 0; -} - -static inline int madera_get_channel_map(struct snd_soc_dai *dai, - unsigned int *tx_num, - unsigned int *tx_slot, - unsigned int *rx_num, - unsigned int *rx_slot) -{ - return 0; -} -#endif - -#endif diff --git a/sound/soc/codecs/madera.c b/sound/soc/codecs/madera.c deleted file mode 100644 index 9f58f3e29d47..000000000000 --- a/sound/soc/codecs/madera.c +++ /dev/null @@ -1,4847 +0,0 @@ -/* - * madera.c - Cirrus Logic Madera class codecs common support - * - * Copyright 2015-2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include "madera.h" - -#define MADERA_AIF_BCLK_CTRL 0x00 -#define MADERA_AIF_TX_PIN_CTRL 0x01 -#define MADERA_AIF_RX_PIN_CTRL 0x02 -#define MADERA_AIF_RATE_CTRL 0x03 -#define MADERA_AIF_FORMAT 0x04 -#define MADERA_AIF_TX_BCLK_RATE 0x05 -#define MADERA_AIF_RX_BCLK_RATE 0x06 -#define MADERA_AIF_FRAME_CTRL_1 0x07 -#define MADERA_AIF_FRAME_CTRL_2 0x08 -#define MADERA_AIF_FRAME_CTRL_3 0x09 -#define MADERA_AIF_FRAME_CTRL_4 0x0A -#define MADERA_AIF_FRAME_CTRL_5 0x0B -#define MADERA_AIF_FRAME_CTRL_6 0x0C -#define MADERA_AIF_FRAME_CTRL_7 0x0D -#define MADERA_AIF_FRAME_CTRL_8 0x0E -#define MADERA_AIF_FRAME_CTRL_9 0x0F -#define MADERA_AIF_FRAME_CTRL_10 0x10 -#define MADERA_AIF_FRAME_CTRL_11 0x11 -#define MADERA_AIF_FRAME_CTRL_12 0x12 -#define MADERA_AIF_FRAME_CTRL_13 0x13 -#define MADERA_AIF_FRAME_CTRL_14 0x14 -#define MADERA_AIF_FRAME_CTRL_15 0x15 -#define MADERA_AIF_FRAME_CTRL_16 0x16 -#define MADERA_AIF_FRAME_CTRL_17 0x17 -#define MADERA_AIF_FRAME_CTRL_18 0x18 -#define MADERA_AIF_TX_ENABLES 0x19 -#define MADERA_AIF_RX_ENABLES 0x1A -#define MADERA_AIF_FORCE_WRITE 0x1B - -#define MADERA_DSP_CONFIG_1_OFFS 0x00 -#define MADERA_DSP_CONFIG_2_OFFS 0x02 - -#define MADERA_DSP_CLK_SEL_MASK 0x70000 -#define MADERA_DSP_CLK_SEL_SHIFT 16 - -#define MADERA_DSP_RATE_MASK 0x7800 -#define MADERA_DSP_RATE_SHIFT 11 - -#define MADERA_FLL_VCO_CORNER 141900000 -#define MADERA_FLL_MAX_FREF 13500000 -#define MADERA_FLL_MAX_N 1023 -#define MADERA_FLL_MIN_FOUT 90000000 -#define MADERA_FLL_MAX_FOUT 100000000 -#define MADERA_FLL_MAX_FRATIO 16 -#define MADERA_FLL_MAX_REFDIV 8 -#define MADERA_FLL_OUTDIV 3 -#define MADERA_FLL_VCO_MULT 3 -#define MADERA_FLLAO_MAX_FREF 12288000 -#define MADERA_FLLAO_MIN_N 4 -#define MADERA_FLLAO_MAX_N 1023 -#define MADERA_FLLAO_MAX_FBDIV 254 - -#define MADERA_FLL_SYNCHRONISER_OFFS 0x10 -#define CS47L35_FLL_SYNCHRONISER_OFFS 0xE - -#define MADERA_FLL_CONTROL_1_OFFS 0x1 -#define MADERA_FLL_CONTROL_2_OFFS 0x2 -#define MADERA_FLL_CONTROL_3_OFFS 0x3 -#define MADERA_FLL_CONTROL_4_OFFS 0x4 -#define MADERA_FLL_CONTROL_5_OFFS 0x5 -#define MADERA_FLL_CONTROL_6_OFFS 0x6 -#define MADERA_FLL_LOOP_FILTER_TEST_1_OFFS 0x7 -#define MADERA_FLL_NCO_TEST_0_OFFS 0x8 -#define MADERA_FLL_CONTROL_7_OFFS 0x9 -#define MADERA_FLL_EFS_2_OFFS 0xA -#define MADERA_FLL_SYNCHRONISER_1_OFFS 0x1 -#define MADERA_FLL_SYNCHRONISER_2_OFFS 0x2 -#define MADERA_FLL_SYNCHRONISER_3_OFFS 0x3 -#define MADERA_FLL_SYNCHRONISER_4_OFFS 0x4 -#define MADERA_FLL_SYNCHRONISER_5_OFFS 0x5 -#define MADERA_FLL_SYNCHRONISER_6_OFFS 0x6 -#define MADERA_FLL_SYNCHRONISER_7_OFFS 0x7 -#define MADERA_FLL_SPREAD_SPECTRUM_OFFS 0x9 -#define MADERA_FLL_GPIO_CLOCK_OFFS 0xA - -#define MADERA_FLLAO_CONTROL_1_OFFS 0x1 -#define MADERA_FLLAO_CONTROL_2_OFFS 0x2 -#define MADERA_FLLAO_CONTROL_3_OFFS 0x3 -#define MADERA_FLLAO_CONTROL_4_OFFS 0x4 -#define MADERA_FLLAO_CONTROL_5_OFFS 0x5 -#define MADERA_FLLAO_CONTROL_6_OFFS 0x6 -#define MADERA_FLLAO_CONTROL_7_OFFS 0x8 -#define MADERA_FLLAO_CONTROL_8_OFFS 0xA -#define MADERA_FLLAO_CONTROL_9_OFFS 0xB -#define MADERA_FLLAO_CONTROL_10_OFFS 0xC -#define MADERA_FLLAO_CONTROL_11_OFFS 0xD - -#define MADERA_FMT_DSP_MODE_A 0 -#define MADERA_FMT_DSP_MODE_B 1 -#define MADERA_FMT_I2S_MODE 2 -#define MADERA_FMT_LEFT_JUSTIFIED_MODE 3 - -#define madera_fll_err(_fll, fmt, ...) \ - dev_err(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) -#define madera_fll_warn(_fll, fmt, ...) \ - dev_warn(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) -#define madera_fll_dbg(_fll, fmt, ...) \ - dev_dbg(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) - -#define madera_aif_err(_dai, fmt, ...) \ - dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) -#define madera_aif_warn(_dai, fmt, ...) \ - dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) -#define madera_aif_dbg(_dai, fmt, ...) \ - dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) - -static const int madera_dsp_bus_error_irqs[MADERA_MAX_ADSP] = { - MADERA_IRQ_DSP1_BUS_ERROR, - MADERA_IRQ_DSP2_BUS_ERROR, - MADERA_IRQ_DSP3_BUS_ERROR, - MADERA_IRQ_DSP4_BUS_ERROR, - MADERA_IRQ_DSP5_BUS_ERROR, - MADERA_IRQ_DSP6_BUS_ERROR, - MADERA_IRQ_DSP7_BUS_ERROR, -}; - -static const unsigned int madera_aif1_inputs[32] = { - MADERA_AIF1TX1MIX_INPUT_1_SOURCE, - MADERA_AIF1TX1MIX_INPUT_2_SOURCE, - MADERA_AIF1TX1MIX_INPUT_3_SOURCE, - MADERA_AIF1TX1MIX_INPUT_4_SOURCE, - MADERA_AIF1TX2MIX_INPUT_1_SOURCE, - MADERA_AIF1TX2MIX_INPUT_2_SOURCE, - MADERA_AIF1TX2MIX_INPUT_3_SOURCE, - MADERA_AIF1TX2MIX_INPUT_4_SOURCE, - MADERA_AIF1TX3MIX_INPUT_1_SOURCE, - MADERA_AIF1TX3MIX_INPUT_2_SOURCE, - MADERA_AIF1TX3MIX_INPUT_3_SOURCE, - MADERA_AIF1TX3MIX_INPUT_4_SOURCE, - MADERA_AIF1TX4MIX_INPUT_1_SOURCE, - MADERA_AIF1TX4MIX_INPUT_2_SOURCE, - MADERA_AIF1TX4MIX_INPUT_3_SOURCE, - MADERA_AIF1TX4MIX_INPUT_4_SOURCE, - MADERA_AIF1TX5MIX_INPUT_1_SOURCE, - MADERA_AIF1TX5MIX_INPUT_2_SOURCE, - MADERA_AIF1TX5MIX_INPUT_3_SOURCE, - MADERA_AIF1TX5MIX_INPUT_4_SOURCE, - MADERA_AIF1TX6MIX_INPUT_1_SOURCE, - MADERA_AIF1TX6MIX_INPUT_2_SOURCE, - MADERA_AIF1TX6MIX_INPUT_3_SOURCE, - MADERA_AIF1TX6MIX_INPUT_4_SOURCE, - MADERA_AIF1TX7MIX_INPUT_1_SOURCE, - MADERA_AIF1TX7MIX_INPUT_2_SOURCE, - MADERA_AIF1TX7MIX_INPUT_3_SOURCE, - MADERA_AIF1TX7MIX_INPUT_4_SOURCE, - MADERA_AIF1TX8MIX_INPUT_1_SOURCE, - MADERA_AIF1TX8MIX_INPUT_2_SOURCE, - MADERA_AIF1TX8MIX_INPUT_3_SOURCE, - MADERA_AIF1TX8MIX_INPUT_4_SOURCE, -}; - -static const unsigned int madera_aif2_inputs[32] = { - MADERA_AIF2TX1MIX_INPUT_1_SOURCE, - MADERA_AIF2TX1MIX_INPUT_2_SOURCE, - MADERA_AIF2TX1MIX_INPUT_3_SOURCE, - MADERA_AIF2TX1MIX_INPUT_4_SOURCE, - MADERA_AIF2TX2MIX_INPUT_1_SOURCE, - MADERA_AIF2TX2MIX_INPUT_2_SOURCE, - MADERA_AIF2TX2MIX_INPUT_3_SOURCE, - MADERA_AIF2TX2MIX_INPUT_4_SOURCE, - MADERA_AIF2TX3MIX_INPUT_1_SOURCE, - MADERA_AIF2TX3MIX_INPUT_2_SOURCE, - MADERA_AIF2TX3MIX_INPUT_3_SOURCE, - MADERA_AIF2TX3MIX_INPUT_4_SOURCE, - MADERA_AIF2TX4MIX_INPUT_1_SOURCE, - MADERA_AIF2TX4MIX_INPUT_2_SOURCE, - MADERA_AIF2TX4MIX_INPUT_3_SOURCE, - MADERA_AIF2TX4MIX_INPUT_4_SOURCE, - MADERA_AIF2TX5MIX_INPUT_1_SOURCE, - MADERA_AIF2TX5MIX_INPUT_2_SOURCE, - MADERA_AIF2TX5MIX_INPUT_3_SOURCE, - MADERA_AIF2TX5MIX_INPUT_4_SOURCE, - MADERA_AIF2TX6MIX_INPUT_1_SOURCE, - MADERA_AIF2TX6MIX_INPUT_2_SOURCE, - MADERA_AIF2TX6MIX_INPUT_3_SOURCE, - MADERA_AIF2TX6MIX_INPUT_4_SOURCE, - MADERA_AIF2TX7MIX_INPUT_1_SOURCE, - MADERA_AIF2TX7MIX_INPUT_2_SOURCE, - MADERA_AIF2TX7MIX_INPUT_3_SOURCE, - MADERA_AIF2TX7MIX_INPUT_4_SOURCE, - MADERA_AIF2TX8MIX_INPUT_1_SOURCE, - MADERA_AIF2TX8MIX_INPUT_2_SOURCE, - MADERA_AIF2TX8MIX_INPUT_3_SOURCE, - MADERA_AIF2TX8MIX_INPUT_4_SOURCE, -}; - -static const unsigned int madera_aif3_inputs[8] = { - MADERA_AIF3TX1MIX_INPUT_1_SOURCE, - MADERA_AIF3TX1MIX_INPUT_2_SOURCE, - MADERA_AIF3TX1MIX_INPUT_3_SOURCE, - MADERA_AIF3TX1MIX_INPUT_4_SOURCE, - MADERA_AIF3TX2MIX_INPUT_1_SOURCE, - MADERA_AIF3TX2MIX_INPUT_2_SOURCE, - MADERA_AIF3TX2MIX_INPUT_3_SOURCE, - MADERA_AIF3TX2MIX_INPUT_4_SOURCE, -}; - -static const unsigned int madera_aif4_inputs[8] = { - MADERA_AIF4TX1MIX_INPUT_1_SOURCE, - MADERA_AIF4TX1MIX_INPUT_2_SOURCE, - MADERA_AIF4TX1MIX_INPUT_3_SOURCE, - MADERA_AIF4TX1MIX_INPUT_4_SOURCE, - MADERA_AIF4TX2MIX_INPUT_1_SOURCE, - MADERA_AIF4TX2MIX_INPUT_2_SOURCE, - MADERA_AIF4TX2MIX_INPUT_3_SOURCE, - MADERA_AIF4TX2MIX_INPUT_4_SOURCE, -}; - -static int madera_get_sources(struct snd_soc_dai *dai, - const unsigned int **sources, int *lim) -{ - int ret = 0; - - *lim = dai->driver->playback.channels_max * 4; - - switch (dai->driver->base) { - case MADERA_AIF1_BCLK_CTRL: - *sources = madera_aif1_inputs; - break; - case MADERA_AIF2_BCLK_CTRL: - *sources = madera_aif2_inputs; - break; - case MADERA_AIF3_BCLK_CTRL: - *sources = madera_aif3_inputs; - break; - case MADERA_AIF4_BCLK_CTRL: - *sources = madera_aif4_inputs; - break; - default: - ret = -EINVAL; - break; - } - - return ret; -} - -int madera_cache_and_clear_sources(struct madera_priv *priv, - const unsigned int *sources, - unsigned int *cache, int lim) -{ - struct madera *madera = priv->madera; - int ret = 0; - int i; - - memset(cache, 0, lim * sizeof(unsigned int)); - - for (i = 0; i < lim; i++) { - ret = regmap_read(madera->regmap, sources[i], &cache[i]); - - dev_dbg(madera->dev, - "%s addr: 0x%04x value: 0x%04x\n", - __func__, sources[i], cache[i]); - - if (ret) { - dev_err(madera->dev, - "%s Failed to cache AIF:0x%04x inputs: %d\n", - __func__, sources[i], ret); - break; - } - - ret = regmap_write(madera->regmap, sources[i], 0); - - if (ret) { - dev_err(madera->dev, - "%s Failed to clear AIF:0x%04x inputs: %d\n", - __func__, sources[i], ret); - break; - } - } - - return ret; -} -EXPORT_SYMBOL_GPL(madera_cache_and_clear_sources); - -void madera_spin_sysclk(struct madera_priv *priv) -{ - struct madera *madera = priv->madera; - unsigned int val; - int ret, i; - - /* Skip this if the chip is down */ - if (pm_runtime_suspended(madera->dev)) - return; - - /* - * Just read a register a few times to ensure the internal - * oscillator sends out a few clocks. - */ - for (i = 0; i < 4; i++) { - ret = regmap_read(madera->regmap, MADERA_SOFTWARE_RESET, &val); - if (ret) - dev_err(madera->dev, - "%s Failed to read register: %d (%d)\n", - __func__, ret, i); - } - - udelay(300); -} -EXPORT_SYMBOL_GPL(madera_spin_sysclk); - -int madera_restore_sources(struct madera_priv *priv, - const unsigned int *sources, - unsigned int *cache, int lim) -{ - struct madera *madera = priv->madera; - int i; - int ret = 0; - - for (i = 0; i < lim; i++) { - dev_dbg(madera->dev, - "%s addr: 0x%04x value: 0x%04x\n", - __func__, sources[i], cache[i]); - - ret = regmap_write(madera->regmap, sources[i], cache[i]); - - if (ret) { - dev_err(madera->dev, - "%s Failed to restore AIF:0x%04x inputs: %d\n", - __func__, sources[i], ret); - break; - } - } - - return ret; - -} -EXPORT_SYMBOL_GPL(madera_restore_sources); - -int madera_sysclk_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - - madera_spin_sysclk(priv); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_sysclk_ev); - -static int madera_check_speaker_overheat(struct madera *madera, - bool *warn, bool *shutdown) -{ - unsigned int val; - int ret; - - ret = regmap_read(madera->regmap, MADERA_IRQ1_RAW_STATUS_15, &val); - if (ret) { - dev_err(madera->dev, "Failed to read thermal status: %d\n", - ret); - return ret; - } - - *warn = val & MADERA_SPK_OVERHEAT_WARN_STS1 ? true : false; - *shutdown = val & MADERA_SPK_OVERHEAT_STS1 ? true : false; - return 0; -} - -static int madera_spk_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct madera *madera = dev_get_drvdata(codec->dev->parent); - bool warn, shutdown; - int ret; - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - ret = madera_check_speaker_overheat(madera, &warn, &shutdown); - if (ret) - return ret; - - if (shutdown) { - dev_crit(madera->dev, - "Speaker not enabled due to temperature\n"); - return -EBUSY; - } - - regmap_update_bits_async(madera->regmap, - MADERA_OUTPUT_ENABLES_1, - 1 << w->shift, 1 << w->shift); - break; - case SND_SOC_DAPM_PRE_PMD: - regmap_update_bits_async(madera->regmap, - MADERA_OUTPUT_ENABLES_1, - 1 << w->shift, 0); - break; - default: - break; - } - - return 0; -} - -static irqreturn_t madera_thermal_warn(int irq, void *data) -{ - struct madera *madera = data; - bool warn, shutdown; - int ret; - - ret = madera_check_speaker_overheat(madera, &warn, &shutdown); - if ((ret == 0) && warn) - dev_crit(madera->dev, "Thermal warning\n"); - - return IRQ_HANDLED; -} - -static irqreturn_t madera_thermal_shutdown(int irq, void *data) -{ - struct madera *madera = data; - bool warn, shutdown; - int ret; - - ret = madera_check_speaker_overheat(madera, &warn, &shutdown); - if ((ret == 0) && shutdown) { - dev_crit(madera->dev, "Thermal shutdown\n"); - ret = regmap_update_bits(madera->regmap, - MADERA_OUTPUT_ENABLES_1, - MADERA_OUT4L_ENA | - MADERA_OUT4R_ENA, 0); - if (ret != 0) - dev_crit(madera->dev, - "Failed to disable speaker outputs: %d\n", - ret); - } - - return IRQ_HANDLED; -} - -static const struct snd_soc_dapm_widget madera_spk[2] = { - SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM, - MADERA_OUT4L_ENA_SHIFT, 0, NULL, 0, madera_spk_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - SND_SOC_DAPM_PGA_E("OUT4R", SND_SOC_NOPM, - MADERA_OUT4R_ENA_SHIFT, 0, NULL, 0, madera_spk_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), -}; - -int madera_init_spk(struct snd_soc_codec *codec, int n_channels) -{ - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - int ret; - - ret = snd_soc_dapm_new_controls(dapm, madera_spk, n_channels); - if (ret) - return ret; - - ret = madera_request_irq(madera, MADERA_IRQ_SPK_OVERHEAT_WARN, - "Thermal warning", madera_thermal_warn, - madera); - if (ret) - dev_warn(madera->dev, - "Failed to get thermal warning IRQ: %d\n", ret); - - ret = madera_request_irq(madera, MADERA_IRQ_SPK_OVERHEAT, - "Thermal shutdown", madera_thermal_shutdown, - madera); - if (ret) - dev_warn(madera->dev, - "Failed to get thermal shutdown IRQ: %d\n", ret); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_init_spk); - -int madera_free_spk(struct snd_soc_codec *codec) -{ - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - - madera_free_irq(madera, MADERA_IRQ_SPK_OVERHEAT_WARN, madera); - madera_free_irq(madera, MADERA_IRQ_SPK_OVERHEAT, madera); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_free_spk); - -static void madera_get_inmode_from_of(struct madera *madera) -{ - struct device_node *np = madera->dev->of_node; - struct property *tempprop; - const __be32 *cur; - u32 val; - int in_n = 0, ch_n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(madera->pdata.codec.inmode) != - MADERA_MAX_INPUT); - BUILD_BUG_ON(ARRAY_SIZE(madera->pdata.codec.inmode[0]) != - MADERA_MAX_MUXED_CHANNELS); - - of_property_for_each_u32(np, "cirrus,inmode", tempprop, cur, val) { - madera->pdata.codec.inmode[in_n][ch_n] = val; - - if (++ch_n == MADERA_MAX_MUXED_CHANNELS) { - ch_n = 0; - if (++in_n == MADERA_MAX_INPUT) - break; - } - } - - if (ch_n != 0) - dev_warn(madera->dev, "%s not a multiple of %d entries\n", - "cirrus,inmode", MADERA_MAX_MUXED_CHANNELS); -} - -static void madera_get_pdata_from_of(struct madera *madera) -{ - struct madera_codec_pdata *pdata = &madera->pdata.codec; - unsigned int out_mono[ARRAY_SIZE(pdata->out_mono)]; - int i; - - memset(&out_mono, 0, sizeof(out_mono)); - - madera_of_read_uint_array(madera, "cirrus,max-channels-clocked", false, - pdata->max_channels_clocked, - 0, ARRAY_SIZE(pdata->max_channels_clocked)); - - madera_get_inmode_from_of(madera); - - madera_of_read_uint_array(madera, "cirrus,out-mono", false, - out_mono, - ARRAY_SIZE(out_mono), ARRAY_SIZE(out_mono)); - for (i = 0; i < ARRAY_SIZE(out_mono); ++i) - pdata->out_mono[i] = !!out_mono[i]; - - madera_of_read_uint_array(madera, "cirrus,pdm-fmt", false, - pdata->pdm_fmt, - ARRAY_SIZE(pdata->pdm_fmt), - ARRAY_SIZE(pdata->pdm_fmt)); - - madera_of_read_uint_array(madera, "cirrus,pdm-mute", false, - pdata->pdm_mute, - ARRAY_SIZE(pdata->pdm_mute), - ARRAY_SIZE(pdata->pdm_mute)); - - madera_of_read_uint_array(madera, "cirrus,dmic-ref", false, - pdata->dmic_ref, - 0, ARRAY_SIZE(pdata->dmic_ref)); - - madera_of_read_uint_array(madera, "cirrus,dmic-clksrc", false, - pdata->dmic_clksrc, - 0, ARRAY_SIZE(pdata->dmic_clksrc)); -} - -int madera_core_init(struct madera_priv *priv) -{ - BUILD_BUG_ON(ARRAY_SIZE(madera_mixer_texts) != MADERA_NUM_MIXER_INPUTS); - BUILD_BUG_ON(ARRAY_SIZE(madera_mixer_values) != - MADERA_NUM_MIXER_INPUTS); - BUILD_BUG_ON(ARRAY_SIZE(priv->aif_sources_cache) < - ARRAY_SIZE(madera_aif1_inputs)); - BUILD_BUG_ON(madera_sample_rate_text[MADERA_SAMPLE_RATE_ENUM_SIZE - 1] - == NULL); - BUILD_BUG_ON(madera_sample_rate_val[MADERA_SAMPLE_RATE_ENUM_SIZE - 1] - == 0); - - if (IS_ENABLED(CONFIG_OF)) - if (!dev_get_platdata(priv->madera->dev)) - madera_get_pdata_from_of(priv->madera); - - mutex_init(&priv->adsp_rate_lock); - mutex_init(&priv->rate_lock); - mutex_init(&priv->adsp_fw_lock); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_core_init); - -int madera_core_destroy(struct madera_priv *priv) -{ - mutex_destroy(&priv->adsp_rate_lock); - mutex_destroy(&priv->rate_lock); - mutex_destroy(&priv->adsp_fw_lock); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_core_destroy); - -static bool madera_is_hp_shorted(const struct madera *madera, - unsigned int index) -{ - if (index >= MADERA_MAX_ACCESSORY) - return false; - - return (madera->hp_impedance_x100[index] <= - madera->pdata.accdet[index].hpdet_short_circuit_imp * 100); -} - -int madera_out1_demux_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); - struct snd_soc_dapm_context *dapm = - snd_soc_dapm_kcontrol_dapm(kcontrol); - struct madera *madera = dev_get_drvdata(codec->dev->parent); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - unsigned int ep_sel, mux, change; - unsigned int mask; - int ret, demux_change_ret; - bool out_mono, restore_out = true; - - if (ucontrol->value.enumerated.item[0] > e->items - 1) - return -EINVAL; - - mux = ucontrol->value.enumerated.item[0]; - ep_sel = mux << e->shift_l; - mask = e->mask << e->shift_l; - - snd_soc_dapm_mutex_lock(dapm); - - change = snd_soc_test_bits(codec, e->reg, mask, ep_sel); - - /* if no change is required, skip */ - if (!change) - goto end; - - /* EP_SEL should not be modified while HP or EP driver is enabled */ - ret = regmap_update_bits(madera->regmap, - MADERA_OUTPUT_ENABLES_1, - MADERA_OUT1L_ENA | - MADERA_OUT1R_ENA, 0); - if (ret) - dev_warn(madera->dev, "Failed to disable outputs: %d\n", ret); - - usleep_range(2000, 3000); /* wait for wseq to complete */ - - /* if HP detection clamp is applied while switching to HPOUT - * OUT1 should remain disabled and EDRE should be set to manual - */ - if (!ep_sel && - (madera->hpdet_clamp[0] || madera_is_hp_shorted(madera, 0))) - restore_out = false; - - if (!ep_sel && madera->hpdet_clamp[0]) { - ret = regmap_write(madera->regmap, MADERA_EDRE_MANUAL, 0x3); - if (ret) - dev_warn(madera->dev, - "Failed to set EDRE Manual: %d\n", - ret); - } - - /* change demux setting */ - demux_change_ret = regmap_update_bits(madera->regmap, - MADERA_OUTPUT_ENABLES_1, - MADERA_EP_SEL, ep_sel); - if (demux_change_ret) { - dev_err(madera->dev, "Failed to set OUT1 demux: %d\n", - demux_change_ret); - } else { - /* apply correct setting for mono mode */ - if (!ep_sel && !madera->pdata.codec.out_mono[0]) - out_mono = false; /* stereo HP */ - else - out_mono = true; /* EP or mono HP */ - - ret = madera_set_output_mode(codec, 1, out_mono); - if (ret) - dev_warn(madera->dev, - "Failed to set output mode: %d\n", ret); - } - - /* restore output state if allowed */ - if (restore_out) { - ret = regmap_update_bits(madera->regmap, - MADERA_OUTPUT_ENABLES_1, - MADERA_OUT1L_ENA | - MADERA_OUT1R_ENA, - madera->hp_ena); - if (ret) - dev_warn(madera->dev, - "Failed to restore earpiece outputs: %d\n", - ret); - else if (madera->hp_ena) - msleep(34); /* wait for enable wseq */ - else - usleep_range(2000, 3000); /* wait for disable wseq */ - } - - /* if a switch to EPOUT occurred restore EDRE setting */ - if (ep_sel && !demux_change_ret) { - ret = regmap_write(madera->regmap, MADERA_EDRE_MANUAL, 0); - if (ret) - dev_warn(madera->dev, - "Failed to restore EDRE Manual: %d\n", - ret); - } - -end: - snd_soc_dapm_mutex_unlock(dapm); - - return snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL); -} -EXPORT_SYMBOL_GPL(madera_out1_demux_put); - - -static int madera_inmux_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); - struct snd_soc_dapm_context *dapm = - snd_soc_dapm_kcontrol_dapm(kcontrol); - struct madera *madera = dev_get_drvdata(codec->dev->parent); - struct soc_enum *e = (struct soc_enum *) kcontrol->private_value; - unsigned int mux, src_val, src_mask, gang_reg, dmode_reg, dmode_val; - unsigned int inmode_a, inmode_gang, inmode; - bool changed = false; - int ret; - - mux = ucontrol->value.enumerated.item[0]; - if (mux > 1) - return -EINVAL; - - src_val = mux << e->shift_l; - src_mask = e->mask << e->shift_l; - - switch (e->reg) { - case MADERA_ADC_DIGITAL_VOLUME_1L: - inmode_a = madera->pdata.codec.inmode[0][0]; - inmode = madera->pdata.codec.inmode[0][2 * mux]; - inmode_gang = madera->pdata.codec.inmode[0][1 + (2 * mux)]; - gang_reg = MADERA_ADC_DIGITAL_VOLUME_1R; - dmode_reg = MADERA_IN1L_CONTROL; - break; - case MADERA_ADC_DIGITAL_VOLUME_1R: - inmode_a = madera->pdata.codec.inmode[0][0]; - inmode = madera->pdata.codec.inmode[0][1 + (2 * mux)]; - inmode_gang = madera->pdata.codec.inmode[0][2 * mux]; - gang_reg = MADERA_ADC_DIGITAL_VOLUME_1L; - dmode_reg = MADERA_IN1L_CONTROL; - break; - case MADERA_ADC_DIGITAL_VOLUME_2L: - inmode_a = madera->pdata.codec.inmode[1][0]; - inmode = madera->pdata.codec.inmode[1][2 * mux]; - inmode_gang = madera->pdata.codec.inmode[1][1 + (2 * mux)]; - gang_reg = MADERA_ADC_DIGITAL_VOLUME_2R; - dmode_reg = MADERA_IN2L_CONTROL; - break; - case MADERA_ADC_DIGITAL_VOLUME_2R: - inmode_a = madera->pdata.codec.inmode[1][0]; - inmode = madera->pdata.codec.inmode[1][1 + (2 * mux)]; - inmode_gang = madera->pdata.codec.inmode[1][2 * mux]; - gang_reg = MADERA_ADC_DIGITAL_VOLUME_2L; - dmode_reg = MADERA_IN2L_CONTROL; - break; - default: - return -EINVAL; - } - - /* SE mask and shift is same for all channels */ - src_mask |= MADERA_IN1L_SRC_SE_MASK; - if (inmode & MADERA_INMODE_SE) - src_val |= 1 << MADERA_IN1L_SRC_SE_SHIFT; - - dev_dbg(madera->dev, - "mux=%u reg=0x%x inmode_a=0x%x inmode=0x%x mask=0x%x val=0x%x\n", - mux, e->reg, inmode_a, inmode, src_mask, src_val); - - ret = snd_soc_component_update_bits(dapm->component, - e->reg, - src_mask, - src_val); - if (ret < 0) - return ret; - else if (ret) - changed = true; - - /* if the A input is digital we must switch both channels together */ - if (inmode_a == MADERA_INMODE_DMIC) { - switch (madera->type) { - case CS47L85: - case WM1840: - if (e->reg == MADERA_ADC_DIGITAL_VOLUME_1L) - goto out; /* not ganged */ - break; - case CS47L90: - case CS47L91: - if (e->reg == MADERA_ADC_DIGITAL_VOLUME_2L) - goto out; /* not ganged */ - break; - default: - break; - } - - /* ganged channels can have different analogue modes */ - if (inmode_gang & MADERA_INMODE_SE) - src_val |= 1 << MADERA_IN1L_SRC_SE_SHIFT; - else - src_val &= ~(1 << MADERA_IN1L_SRC_SE_SHIFT); - - if (mux) - dmode_val = 0; /* B always analogue */ - else - dmode_val = 1 << MADERA_IN1_MODE_SHIFT; /* DMIC */ - - dev_dbg(madera->dev, - "gang_reg=0x%x inmode_gang=0x%x gang_val=0x%x dmode_val=0x%x\n", - gang_reg, inmode_gang, src_val, dmode_val); - - ret = snd_soc_component_update_bits(dapm->component, - gang_reg, - src_mask, - src_val); - if (ret < 0) - return ret; - else if (ret) - changed |= true; - - ret = snd_soc_component_update_bits(dapm->component, - dmode_reg, - MADERA_IN1_MODE_MASK, - dmode_val); - } - -out: - if (changed) - return snd_soc_dapm_mux_update_power(dapm, kcontrol, - mux, e, NULL); - else - return 0; -} - -static const char * const madera_inmux_texts[] = { - "A", - "B", -}; - -static SOC_ENUM_SINGLE_DECL(madera_in1muxl_enum, - MADERA_ADC_DIGITAL_VOLUME_1L, - MADERA_IN1L_SRC_SHIFT, - madera_inmux_texts); - -static SOC_ENUM_SINGLE_DECL(madera_in1muxr_enum, - MADERA_ADC_DIGITAL_VOLUME_1R, - MADERA_IN1R_SRC_SHIFT, - madera_inmux_texts); - -static SOC_ENUM_SINGLE_DECL(madera_in2muxl_enum, - MADERA_ADC_DIGITAL_VOLUME_2L, - MADERA_IN2L_SRC_SHIFT, - madera_inmux_texts); - -static SOC_ENUM_SINGLE_DECL(madera_in2muxr_enum, - MADERA_ADC_DIGITAL_VOLUME_2R, - MADERA_IN2R_SRC_SHIFT, - madera_inmux_texts); - -const struct snd_kcontrol_new madera_inmux[] = { - SOC_DAPM_ENUM_EXT("IN1L Mux", madera_in1muxl_enum, - snd_soc_dapm_get_enum_double, madera_inmux_put), - SOC_DAPM_ENUM_EXT("IN1R Mux", madera_in1muxr_enum, - snd_soc_dapm_get_enum_double, madera_inmux_put), - SOC_DAPM_ENUM_EXT("IN2L Mux", madera_in2muxl_enum, - snd_soc_dapm_get_enum_double, madera_inmux_put), - SOC_DAPM_ENUM_EXT("IN2R Mux", madera_in2muxr_enum, - snd_soc_dapm_get_enum_double, madera_inmux_put), -}; -EXPORT_SYMBOL_GPL(madera_inmux); - -int madera_adsp_rate_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - unsigned int cached_rate, item; - const int adsp_num = e->shift_l; - int ret = -EINVAL; - - mutex_lock(&priv->adsp_rate_lock); - - cached_rate = priv->adsp_rate_cache[adsp_num]; - - for (item = 0; item < e->items; item++) { - if (e->values[item] == cached_rate) { - ucontrol->value.enumerated.item[0] = item; - ret = 0; - break; - } - } - - mutex_unlock(&priv->adsp_rate_lock); - return ret; -} -EXPORT_SYMBOL_GPL(madera_adsp_rate_get); - -int madera_adsp_rate_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - const int adsp_num = e->shift_l; - const unsigned int item = ucontrol->value.enumerated.item[0]; - - if (item >= e->items) - return -EINVAL; - - mutex_lock(&priv->adsp_rate_lock); - - priv->adsp_rate_cache[adsp_num] = e->values[item]; - - mutex_unlock(&priv->adsp_rate_lock); - return 0; -} -EXPORT_SYMBOL_GPL(madera_adsp_rate_put); - -static const struct soc_enum madera_adsp_rate_enum[] = { - SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 0, 0xf, MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 1, 0xf, MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 2, 0xf, MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 3, 0xf, MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 4, 0xf, MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 5, 0xf, MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 6, 0xf, MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), -}; - -const struct snd_kcontrol_new madera_adsp_rate_controls[] = { - SOC_ENUM_EXT("DSP1 Rate", madera_adsp_rate_enum[0], - madera_adsp_rate_get, madera_adsp_rate_put), - SOC_ENUM_EXT("DSP2 Rate", madera_adsp_rate_enum[1], - madera_adsp_rate_get, madera_adsp_rate_put), - SOC_ENUM_EXT("DSP3 Rate", madera_adsp_rate_enum[2], - madera_adsp_rate_get, madera_adsp_rate_put), - SOC_ENUM_EXT("DSP4 Rate", madera_adsp_rate_enum[3], - madera_adsp_rate_get, madera_adsp_rate_put), - SOC_ENUM_EXT("DSP5 Rate", madera_adsp_rate_enum[4], - madera_adsp_rate_get, madera_adsp_rate_put), - SOC_ENUM_EXT("DSP6 Rate", madera_adsp_rate_enum[5], - madera_adsp_rate_get, madera_adsp_rate_put), - SOC_ENUM_EXT("DSP7 Rate", madera_adsp_rate_enum[6], - madera_adsp_rate_get, madera_adsp_rate_put), -}; -EXPORT_SYMBOL_GPL(madera_adsp_rate_controls); - -static int madera_write_adsp_clk_setting(struct wm_adsp *dsp, unsigned int freq) -{ - struct madera_priv *priv = snd_soc_codec_get_drvdata(dsp->codec); - unsigned int mask, val; - int ret; - - mask = MADERA_DSP_RATE_MASK; - val = priv->adsp_rate_cache[dsp->num - 1] << MADERA_DSP_RATE_SHIFT; - - switch (priv->madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - /* use legacy frequency registers */ - mask |= MADERA_DSP_CLK_SEL_MASK; - val |= (freq << MADERA_DSP_CLK_SEL_SHIFT); - break; - default: - /* Configure exact dsp frequency */ - dev_dbg(priv->madera->dev, "Set DSP frequency to 0x%x\n", freq); - - ret = regmap_write(dsp->regmap, - dsp->base + MADERA_DSP_CONFIG_2_OFFS, freq); - if (ret) - goto err; - break; - } - - ret = regmap_update_bits(dsp->regmap, - dsp->base + MADERA_DSP_CONFIG_1_OFFS, - mask, val); - dev_dbg(priv->madera->dev, "Set DSP clocking to 0x%x\n", val); - - return 0; - -err: - dev_err(dsp->dev, "Failed to set DSP%d clock: %d\n", dsp->num, ret); - - return ret; -} - -int madera_set_adsp_clk(struct wm_adsp *dsp, unsigned int freq) -{ - struct madera_priv *priv = snd_soc_codec_get_drvdata(dsp->codec); - struct madera *madera = priv->madera; - const unsigned int *cur_sources; - unsigned int cur, new; - int lim, ret, err; - - ret = regmap_read(dsp->regmap, dsp->base, &cur); - if (ret) { - dev_err(madera->dev, - "Failed to read current DSP rate: %d\n", ret); - return ret; - } - - cur &= MADERA_DSP_RATE_MASK; - new = priv->adsp_rate_cache[dsp->num - 1] << MADERA_DSP_RATE_SHIFT; - - if (new == cur) { - dev_dbg(madera->dev, "DSP rate not changed\n"); - return madera_write_adsp_clk_setting(dsp, freq); - } - - ret = priv->get_sources(dsp->base, &cur_sources, &lim); - if (ret) { - dev_err(madera->dev, - "Failed to get sources for DSP: %d\n", ret); - return ret; - } - - mutex_lock(&priv->rate_lock); - - ret = madera_cache_and_clear_sources(priv, cur_sources, - priv->mixer_sources_cache, lim); - if (ret) { - dev_err(madera->dev, - "failed to cache and clear DSP sources %d\n", ret); - goto out; - } - - madera_spin_sysclk(priv); - ret = madera_write_adsp_clk_setting(dsp, freq); - madera_spin_sysclk(priv); - -out: - err = madera_restore_sources(priv, cur_sources, - priv->mixer_sources_cache, lim); - - if (err) { - dev_err(madera->dev, - "failed to restore DSP sources %d\n", err); - } - - mutex_unlock(&priv->rate_lock); - return ret; -} -EXPORT_SYMBOL_GPL(madera_set_adsp_clk); - -int madera_rate_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - const unsigned int *cur_sources; - unsigned int mask, val, cur; - int lim, ret, err; - - if (ucontrol->value.enumerated.item[0] > e->items - 1) - return -EINVAL; - - val = e->values[ucontrol->value.enumerated.item[0]] << e->shift_l; - mask = e->mask << e->shift_l; - - ret = regmap_read(madera->regmap, e->reg, &cur); - if (ret) { - dev_err(madera->dev, "Failed to read current reg: %d\n", ret); - return ret; - } - - if ((cur & mask) == (val & mask)) - return 0; - - ret = priv->get_sources(e->reg, &cur_sources, &lim); - if (ret) { - dev_err(madera->dev, "Failed to get sources for 0x%08x: %d\n", - e->reg, ret); - return ret; - } - - mutex_lock(&priv->rate_lock); - - ret = madera_cache_and_clear_sources(priv, cur_sources, - priv->mixer_sources_cache, lim); - if (ret) { - dev_err(madera->dev, - "%s Failed to cache and clear sources %d\n", - __func__, ret); - goto out; - } - - /* Apply the rate through the original callback */ - madera_spin_sysclk(priv); - ret = snd_soc_update_bits(codec, e->reg, mask, val); - if (ret > 0) - ret = 0; /* snd_soc_update_bits returns 1 if bits changed ok */ - madera_spin_sysclk(priv); - -out: - err = madera_restore_sources(priv, cur_sources, - priv->mixer_sources_cache, lim); - if (err) { - dev_err(madera->dev, - "%s Failed to restore sources %d\n", - __func__, err); - } - - mutex_unlock(&priv->rate_lock); - return ret; -} -EXPORT_SYMBOL_GPL(madera_rate_put); - -static const struct snd_soc_dapm_route madera_mono_routes[] = { - { "OUT1R", NULL, "OUT1L" }, - { "OUT2R", NULL, "OUT2L" }, - { "OUT3R", NULL, "OUT3L" }, - { "OUT4R", NULL, "OUT4L" }, - { "OUT5R", NULL, "OUT5L" }, - { "OUT6R", NULL, "OUT6L" }, -}; - -static void madera_configure_input_mode(struct madera *madera) -{ - unsigned int val, dig_mode, ana_mode_l, ana_mode_r; - int max_analogue_inputs, num_dmic_clksrc, i; - - switch (madera->type) { - case CS47L35: - max_analogue_inputs = 2; - num_dmic_clksrc = 0; - break; - case CS47L85: - case WM1840: - max_analogue_inputs = 3; - num_dmic_clksrc = 0; - break; - default: - max_analogue_inputs = 2; - num_dmic_clksrc = 5; - break; - } - - for (i = 0; i < num_dmic_clksrc; i++) { - val = madera->pdata.codec.dmic_clksrc[i] << - MADERA_IN1_DMICCLK_SRC_SHIFT; - regmap_update_bits(madera->regmap, - MADERA_IN1R_CONTROL + (i * 8), - MADERA_IN1_DMICCLK_SRC_MASK, val); - dev_dbg(madera->dev, "IN%d DMICCLK_SRC=0x%x\n", i + 1, val); - } - - /* Initialize input modes from the A settings. For muxed inputs the - * B settings will be applied if the mux is changed - */ - for (i = 0; i < max_analogue_inputs; i++) { - dev_dbg(madera->dev, "IN%d mode %d:%d:%d:%d\n", i + 1, - madera->pdata.codec.inmode[i][0], - madera->pdata.codec.inmode[i][1], - madera->pdata.codec.inmode[i][2], - madera->pdata.codec.inmode[i][3]); - - dig_mode = madera->pdata.codec.dmic_ref[i] << - MADERA_IN1_DMIC_SUP_SHIFT; - - switch (madera->pdata.codec.inmode[i][0]) { - case MADERA_INMODE_DIFF: - ana_mode_l = 0; - break; - case MADERA_INMODE_SE: - ana_mode_l = 1 << MADERA_IN1L_SRC_SE_SHIFT; - break; - case MADERA_INMODE_DMIC: - ana_mode_l = 0; - dig_mode |= 1 << MADERA_IN1_MODE_SHIFT; - break; - default: - dev_warn(madera->dev, - "IN%dAL Illegal inmode %d ignored\n", - i + 1, madera->pdata.codec.inmode[i][0]); - continue; - } - - switch (madera->pdata.codec.inmode[i][1]) { - case MADERA_INMODE_DIFF: - case MADERA_INMODE_DMIC: - ana_mode_r = 0; - break; - case MADERA_INMODE_SE: - ana_mode_r = 1 << MADERA_IN1R_SRC_SE_SHIFT; - break; - default: - dev_warn(madera->dev, - "IN%dAR Illegal inmode %d ignored\n", - i + 1, madera->pdata.codec.inmode[i][1]); - continue; - } - - dev_dbg(madera->dev, - "IN%dA DMIC mode=0x%x Analogue mode=0x%x,0x%x\n", - i + 1, dig_mode, ana_mode_l, ana_mode_r); - - regmap_update_bits(madera->regmap, - MADERA_IN1L_CONTROL + (i * 8), - MADERA_IN1_DMIC_SUP_MASK | - MADERA_IN1_MODE_MASK, - dig_mode); - - regmap_update_bits(madera->regmap, - MADERA_ADC_DIGITAL_VOLUME_1L + (i * 8), - MADERA_IN1L_SRC_SE_MASK, ana_mode_l); - - regmap_update_bits(madera->regmap, - MADERA_ADC_DIGITAL_VOLUME_1R + (i * 8), - MADERA_IN1R_SRC_SE_MASK, ana_mode_r); - } -} - -int madera_init_inputs(struct snd_soc_codec *codec, - const char * const *dmic_inputs, int n_dmic_inputs, - const char * const *dmic_refs, int n_dmic_refs) -{ - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - unsigned int ref; - int i, ret; - struct snd_soc_dapm_route routes[2]; - - memset(&routes, 0, sizeof(routes)); - - madera_configure_input_mode(madera); - - for (i = 0; i < n_dmic_inputs / 2; ++i) { - ref = madera->pdata.codec.dmic_ref[i]; - if (ref >= n_dmic_refs) { - dev_err(madera->dev, - "Illegal DMIC ref %u for IN%d\n", ref, i); - return -EINVAL; - } - - routes[0].source = dmic_refs[ref]; - routes[1].source = dmic_refs[ref]; - routes[0].sink = dmic_inputs[i * 2]; - routes[1].sink = dmic_inputs[(i * 2) + 1]; - - ret = snd_soc_dapm_add_routes(dapm, routes, 2); - } - - return 0; -} -EXPORT_SYMBOL_GPL(madera_init_inputs); - -int madera_init_outputs(struct snd_soc_codec *codec) -{ - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - const struct madera_codec_pdata *pdata = &madera->pdata.codec; - unsigned int val; - int i; - - for (i = 0; i < ARRAY_SIZE(pdata->out_mono); i++) { - /* Default is 0 so noop with defaults */ - if (pdata->out_mono[i]) { - val = MADERA_OUT1_MONO; - snd_soc_dapm_add_routes(dapm, - &madera_mono_routes[i], 1); - } else { - val = 0; - } - - regmap_update_bits(madera->regmap, - MADERA_OUTPUT_PATH_CONFIG_1L + (i * 8), - MADERA_OUT1_MONO, val); - - dev_dbg(madera->dev, "OUT%d mono=0x%x\n", i + 1, val); - } - - for (i = 0; i < MADERA_MAX_PDM_SPK; i++) { - dev_dbg(madera->dev, "PDM%d fmt=0x%x mute=0x%x\n", i + 1, - pdata->pdm_fmt[i], pdata->pdm_mute[i]); - - if (pdata->pdm_mute[i]) - regmap_update_bits(madera->regmap, - MADERA_PDM_SPK1_CTRL_1 + (i * 2), - MADERA_SPK1_MUTE_ENDIAN_MASK | - MADERA_SPK1_MUTE_SEQ1_MASK, - pdata->pdm_mute[i]); - - if (pdata->pdm_fmt[i]) - regmap_update_bits(madera->regmap, - MADERA_PDM_SPK1_CTRL_2 + (i * 2), - MADERA_SPK1_FMT_MASK, - pdata->pdm_fmt[i]); - } - - return 0; -} -EXPORT_SYMBOL_GPL(madera_init_outputs); - -int madera_init_drc(struct snd_soc_codec *codec) -{ - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - bool enable_drc1 = false, enable_drc2 = false; - int i; - - for (i = 0; i < ARRAY_SIZE(madera->pdata.gpio_defaults); i++) { - switch (madera->pdata.gpio_defaults[i] & MADERA_GP1_FN_MASK) { - case MADERA_GP_FN_DRC1_SIGNAL_DETECT: - enable_drc1 = true; - break; - case MADERA_GP_FN_DRC2_SIGNAL_DETECT: - enable_drc2 = true; - break; - default: - break; - } - } - - if (enable_drc1) - snd_soc_dapm_enable_pin(dapm, "DRC1 Signal Activity"); - else - snd_soc_dapm_disable_pin(dapm, "DRC1 Signal Activity"); - - if (enable_drc2) - snd_soc_dapm_enable_pin(dapm, "DRC2 Signal Activity"); - else - snd_soc_dapm_disable_pin(dapm, "DRC2 Signal Activity"); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_init_drc); - -int madera_init_bus_error_irq(struct snd_soc_codec *codec, int dsp_num, - irq_handler_t handler) -{ - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - int ret; - - ret = madera_request_irq(madera, - madera_dsp_bus_error_irqs[dsp_num], - "ADSP2 bus error", - handler, - &priv->adsp[dsp_num]); - if (ret) - dev_err(madera->dev, - "Failed to request DSP Lock region IRQ: %d\n", ret); - - return ret; -} -EXPORT_SYMBOL_GPL(madera_init_bus_error_irq); - -void madera_destroy_bus_error_irq(struct snd_soc_codec *codec, int dsp_num) -{ - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - - madera_free_irq(madera, - madera_dsp_bus_error_irqs[dsp_num], - &priv->adsp[dsp_num]); -} -EXPORT_SYMBOL_GPL(madera_destroy_bus_error_irq); - -const char * const madera_mixer_texts[] = { - "None", - "Tone Generator 1", - "Tone Generator 2", - "Haptics", - "AEC1", - "AEC2", - "Mic Mute Mixer", - "Noise Generator", - "IN1L", - "IN1R", - "IN2L", - "IN2R", - "IN3L", - "IN3R", - "IN4L", - "IN4R", - "IN5L", - "IN5R", - "IN6L", - "IN6R", - "AIF1RX1", - "AIF1RX2", - "AIF1RX3", - "AIF1RX4", - "AIF1RX5", - "AIF1RX6", - "AIF1RX7", - "AIF1RX8", - "AIF2RX1", - "AIF2RX2", - "AIF2RX3", - "AIF2RX4", - "AIF2RX5", - "AIF2RX6", - "AIF2RX7", - "AIF2RX8", - "AIF3RX1", - "AIF3RX2", - "AIF4RX1", - "AIF4RX2", - "SLIMRX1", - "SLIMRX2", - "SLIMRX3", - "SLIMRX4", - "SLIMRX5", - "SLIMRX6", - "SLIMRX7", - "SLIMRX8", - "EQ1", - "EQ2", - "EQ3", - "EQ4", - "DRC1L", - "DRC1R", - "DRC2L", - "DRC2R", - "LHPF1", - "LHPF2", - "LHPF3", - "LHPF4", - "DSP1.1", - "DSP1.2", - "DSP1.3", - "DSP1.4", - "DSP1.5", - "DSP1.6", - "DSP2.1", - "DSP2.2", - "DSP2.3", - "DSP2.4", - "DSP2.5", - "DSP2.6", - "DSP3.1", - "DSP3.2", - "DSP3.3", - "DSP3.4", - "DSP3.5", - "DSP3.6", - "DSP4.1", - "DSP4.2", - "DSP4.3", - "DSP4.4", - "DSP4.5", - "DSP4.6", - "DSP5.1", - "DSP5.2", - "DSP5.3", - "DSP5.4", - "DSP5.5", - "DSP5.6", - "DSP6.1", - "DSP6.2", - "DSP6.3", - "DSP6.4", - "DSP6.5", - "DSP6.6", - "DSP7.1", - "DSP7.2", - "DSP7.3", - "DSP7.4", - "DSP7.5", - "DSP7.6", - "ASRC1IN1L", - "ASRC1IN1R", - "ASRC1IN2L", - "ASRC1IN2R", - "ASRC2IN1L", - "ASRC2IN1R", - "ASRC2IN2L", - "ASRC2IN2R", - "ISRC1INT1", - "ISRC1INT2", - "ISRC1INT3", - "ISRC1INT4", - "ISRC1DEC1", - "ISRC1DEC2", - "ISRC1DEC3", - "ISRC1DEC4", - "ISRC2INT1", - "ISRC2INT2", - "ISRC2INT3", - "ISRC2INT4", - "ISRC2DEC1", - "ISRC2DEC2", - "ISRC2DEC3", - "ISRC2DEC4", - "ISRC3INT1", - "ISRC3INT2", - "ISRC3INT3", - "ISRC3INT4", - "ISRC3DEC1", - "ISRC3DEC2", - "ISRC3DEC3", - "ISRC3DEC4", - "ISRC4INT1", - "ISRC4INT2", - "ISRC4DEC1", - "ISRC4DEC2", - "DFC1", - "DFC2", - "DFC3", - "DFC4", - "DFC5", - "DFC6", - "DFC7", - "DFC8", -}; -EXPORT_SYMBOL_GPL(madera_mixer_texts); - -unsigned int madera_mixer_values[] = { - 0x00, /* None */ - 0x04, /* Tone Generator 1 */ - 0x05, /* Tone Generator 2 */ - 0x06, /* Haptics */ - 0x08, /* AEC */ - 0x09, /* AEC2 */ - 0x0c, /* Noise mixer */ - 0x0d, /* Comfort noise */ - 0x10, /* IN1L */ - 0x11, - 0x12, - 0x13, - 0x14, - 0x15, - 0x16, - 0x17, - 0x18, - 0x19, - 0x1A, - 0x1B, - 0x20, /* AIF1RX1 */ - 0x21, - 0x22, - 0x23, - 0x24, - 0x25, - 0x26, - 0x27, - 0x28, /* AIF2RX1 */ - 0x29, - 0x2a, - 0x2b, - 0x2c, - 0x2d, - 0x2e, - 0x2f, - 0x30, /* AIF3RX1 */ - 0x31, - 0x34, /* AIF4RX1 */ - 0x35, - 0x38, /* SLIMRX1 */ - 0x39, - 0x3a, - 0x3b, - 0x3c, - 0x3d, - 0x3e, - 0x3f, - 0x50, /* EQ1 */ - 0x51, - 0x52, - 0x53, - 0x58, /* DRC1L */ - 0x59, - 0x5a, - 0x5b, - 0x60, /* LHPF1 */ - 0x61, - 0x62, - 0x63, - 0x68, /* DSP1.1 */ - 0x69, - 0x6a, - 0x6b, - 0x6c, - 0x6d, - 0x70, /* DSP2.1 */ - 0x71, - 0x72, - 0x73, - 0x74, - 0x75, - 0x78, /* DSP3.1 */ - 0x79, - 0x7a, - 0x7b, - 0x7c, - 0x7d, - 0x80, /* DSP4.1 */ - 0x81, - 0x82, - 0x83, - 0x84, - 0x85, - 0x88, /* DSP5.1 */ - 0x89, - 0x8a, - 0x8b, - 0x8c, - 0x8d, - 0xc0, /* DSP6.1 */ - 0xc1, - 0xc2, - 0xc3, - 0xc4, - 0xc5, - 0xc8, /* DSP7.1 */ - 0xc9, - 0xca, - 0xcb, - 0xcc, - 0xcd, - 0x90, /* ASRC1IN1L */ - 0x91, - 0x92, - 0x93, - 0x94, /* ASRC2IN1L */ - 0x95, - 0x96, - 0x97, - 0xa0, /* ISRC1INT1 */ - 0xa1, - 0xa2, - 0xa3, - 0xa4, /* ISRC1DEC1 */ - 0xa5, - 0xa6, - 0xa7, - 0xa8, /* ISRC2DEC1 */ - 0xa9, - 0xaa, - 0xab, - 0xac, /* ISRC2INT1 */ - 0xad, - 0xae, - 0xaf, - 0xb0, /* ISRC3DEC1 */ - 0xb1, - 0xb2, - 0xb3, - 0xb4, /* ISRC3INT1 */ - 0xb5, - 0xb6, - 0xb7, - 0xb8, /* ISRC4INT1 */ - 0xb9, - 0xbc, /* ISRC4DEC1 */ - 0xbd, - 0xf8, /* DFC1 */ - 0xf9, - 0xfa, - 0xfb, - 0xfc, - 0xfd, - 0xfe, - 0xff, /* DFC8 */ -}; -EXPORT_SYMBOL_GPL(madera_mixer_values); - -const DECLARE_TLV_DB_SCALE(madera_ana_tlv, 0, 100, 0); -EXPORT_SYMBOL_GPL(madera_ana_tlv); - -const DECLARE_TLV_DB_SCALE(madera_eq_tlv, -1200, 100, 0); -EXPORT_SYMBOL_GPL(madera_eq_tlv); - -const DECLARE_TLV_DB_SCALE(madera_digital_tlv, -6400, 50, 0); -EXPORT_SYMBOL_GPL(madera_digital_tlv); - -const DECLARE_TLV_DB_SCALE(madera_noise_tlv, -13200, 600, 0); -EXPORT_SYMBOL_GPL(madera_noise_tlv); - -const DECLARE_TLV_DB_SCALE(madera_ng_tlv, -12000, 600, 0); -EXPORT_SYMBOL_GPL(madera_ng_tlv); - -const DECLARE_TLV_DB_SCALE(madera_mixer_tlv, -3200, 100, 0); -EXPORT_SYMBOL_GPL(madera_mixer_tlv); - -const char * const madera_sample_rate_text[MADERA_SAMPLE_RATE_ENUM_SIZE] = { - "12kHz", "24kHz", "48kHz", "96kHz", "192kHz", "384kHz", - "11.025kHz", "22.05kHz", "44.1kHz", "88.2kHz", "176.4kHz", "352.8kHz", - "4kHz", "8kHz", "16kHz", "32kHz", -}; -EXPORT_SYMBOL_GPL(madera_sample_rate_text); - -const unsigned int madera_sample_rate_val[MADERA_SAMPLE_RATE_ENUM_SIZE] = { - 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, - 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, - 0x10, 0x11, 0x12, 0x13, -}; -EXPORT_SYMBOL_GPL(madera_sample_rate_val); - -const char *madera_sample_rate_val_to_name(unsigned int rate_val) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(madera_sample_rate_val); ++i) { - if (madera_sample_rate_val[i] == rate_val) - return madera_sample_rate_text[i]; - } - - return "Illegal"; -} -EXPORT_SYMBOL_GPL(madera_sample_rate_val_to_name); - -const struct soc_enum madera_sample_rate[] = { - SOC_VALUE_ENUM_SINGLE(MADERA_SAMPLE_RATE_2, - MADERA_SAMPLE_RATE_2_SHIFT, 0x1f, - MADERA_SAMPLE_RATE_ENUM_SIZE, - madera_sample_rate_text, - madera_sample_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_SAMPLE_RATE_3, - MADERA_SAMPLE_RATE_3_SHIFT, 0x1f, - MADERA_SAMPLE_RATE_ENUM_SIZE, - madera_sample_rate_text, - madera_sample_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_ASYNC_SAMPLE_RATE_2, - MADERA_ASYNC_SAMPLE_RATE_2_SHIFT, 0x1f, - MADERA_SAMPLE_RATE_ENUM_SIZE, - madera_sample_rate_text, - madera_sample_rate_val), - -}; -EXPORT_SYMBOL_GPL(madera_sample_rate); - -const char * const madera_rate_text[MADERA_RATE_ENUM_SIZE] = { - "SYNCCLK rate 1", "SYNCCLK rate 2", "SYNCCLK rate 3", - "ASYNCCLK rate 1", "ASYNCCLK rate 2", -}; -EXPORT_SYMBOL_GPL(madera_rate_text); - -const unsigned int madera_rate_val[MADERA_RATE_ENUM_SIZE] = { - 0x0, 0x1, 0x2, 0x8, 0x9, -}; -EXPORT_SYMBOL_GPL(madera_rate_val); - -const struct soc_enum madera_output_rate = - SOC_VALUE_ENUM_SINGLE(MADERA_OUTPUT_RATE_1, - MADERA_OUT_RATE_SHIFT, - 0x0f, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val); -EXPORT_SYMBOL_GPL(madera_output_rate); - -const struct soc_enum madera_input_rate[] = { - SOC_VALUE_ENUM_SINGLE(MADERA_IN1L_RATE_CONTROL, - MADERA_IN1L_RATE_SHIFT, - MADERA_IN1L_RATE_MASK >> MADERA_IN1L_RATE_SHIFT, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_IN1R_RATE_CONTROL, - MADERA_IN1R_RATE_SHIFT, - MADERA_IN1R_RATE_MASK >> MADERA_IN1R_RATE_SHIFT, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_IN2L_RATE_CONTROL, - MADERA_IN2L_RATE_SHIFT, - MADERA_IN2L_RATE_MASK >> MADERA_IN2L_RATE_SHIFT, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_IN2R_RATE_CONTROL, - MADERA_IN2R_RATE_SHIFT, - MADERA_IN2R_RATE_MASK >> MADERA_IN2R_RATE_SHIFT, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_IN3L_RATE_CONTROL, - MADERA_IN3L_RATE_SHIFT, - MADERA_IN3L_RATE_MASK >> MADERA_IN3L_RATE_SHIFT, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_IN3R_RATE_CONTROL, - MADERA_IN3R_RATE_SHIFT, - MADERA_IN3R_RATE_MASK >> MADERA_IN3R_RATE_SHIFT, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_IN4L_RATE_CONTROL, - MADERA_IN4L_RATE_SHIFT, - MADERA_IN4L_RATE_MASK >> MADERA_IN4L_RATE_SHIFT, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_IN4R_RATE_CONTROL, - MADERA_IN4R_RATE_SHIFT, - MADERA_IN4R_RATE_MASK >> MADERA_IN4R_RATE_SHIFT, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_IN5L_RATE_CONTROL, - MADERA_IN5L_RATE_SHIFT, - MADERA_IN5L_RATE_MASK >> MADERA_IN5L_RATE_SHIFT, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_IN5R_RATE_CONTROL, - MADERA_IN5R_RATE_SHIFT, - MADERA_IN5R_RATE_MASK >> MADERA_IN5R_RATE_SHIFT, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val), -}; -EXPORT_SYMBOL_GPL(madera_input_rate); - -const char * const madera_dfc_width_text[MADERA_DFC_WIDTH_ENUM_SIZE] = { - "8bit", "16bit", "20bit", "24bit", "32bit", -}; -EXPORT_SYMBOL_GPL(madera_dfc_width_text); - -const unsigned int madera_dfc_width_val[MADERA_DFC_WIDTH_ENUM_SIZE] = { - 7, 15, 19, 23, 31, -}; -EXPORT_SYMBOL_GPL(madera_dfc_width_val); - -const char * const madera_dfc_type_text[MADERA_DFC_TYPE_ENUM_SIZE] = { - "Fixed", "Unsigned Fixed", "Single Precision Floating", - "Half Precision Floating", "Arm Alternative Floating", -}; -EXPORT_SYMBOL_GPL(madera_dfc_type_text); - -const unsigned int madera_dfc_type_val[MADERA_DFC_TYPE_ENUM_SIZE] = { - 0, 1, 2, 4, 5, -}; -EXPORT_SYMBOL_GPL(madera_dfc_type_val); - -const struct soc_enum madera_dfc_width[] = { - SOC_VALUE_ENUM_SINGLE(MADERA_DFC1_RX, - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - MADERA_DFC1_RX_DATA_WIDTH_MASK >> - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC1_TX, - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - MADERA_DFC1_TX_DATA_WIDTH_MASK >> - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC2_RX, - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - MADERA_DFC1_RX_DATA_WIDTH_MASK >> - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC2_TX, - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - MADERA_DFC1_TX_DATA_WIDTH_MASK >> - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC3_RX, - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - MADERA_DFC1_RX_DATA_WIDTH_MASK >> - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC3_TX, - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - MADERA_DFC1_TX_DATA_WIDTH_MASK >> - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC4_RX, - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - MADERA_DFC1_RX_DATA_WIDTH_MASK >> - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC4_TX, - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - MADERA_DFC1_TX_DATA_WIDTH_MASK >> - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC5_RX, - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - MADERA_DFC1_RX_DATA_WIDTH_MASK >> - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC5_TX, - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - MADERA_DFC1_TX_DATA_WIDTH_MASK >> - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC6_RX, - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - MADERA_DFC1_RX_DATA_WIDTH_MASK >> - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC6_TX, - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - MADERA_DFC1_TX_DATA_WIDTH_MASK >> - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC7_RX, - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - MADERA_DFC1_RX_DATA_WIDTH_MASK >> - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC7_TX, - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - MADERA_DFC1_TX_DATA_WIDTH_MASK >> - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC8_RX, - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - MADERA_DFC1_RX_DATA_WIDTH_MASK >> - MADERA_DFC1_RX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC8_TX, - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - MADERA_DFC1_TX_DATA_WIDTH_MASK >> - MADERA_DFC1_TX_DATA_WIDTH_SHIFT, - ARRAY_SIZE(madera_dfc_width_text), - madera_dfc_width_text, - madera_dfc_width_val), -}; -EXPORT_SYMBOL_GPL(madera_dfc_width); - -const struct soc_enum madera_dfc_type[] = { - SOC_VALUE_ENUM_SINGLE(MADERA_DFC1_RX, - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - MADERA_DFC1_RX_DATA_TYPE_MASK >> - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC1_TX, - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - MADERA_DFC1_TX_DATA_TYPE_MASK >> - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC2_RX, - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - MADERA_DFC1_RX_DATA_TYPE_MASK >> - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC2_TX, - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - MADERA_DFC1_TX_DATA_TYPE_MASK >> - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC3_RX, - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - MADERA_DFC1_RX_DATA_TYPE_MASK >> - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC3_TX, - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - MADERA_DFC1_TX_DATA_TYPE_MASK >> - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC4_RX, - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - MADERA_DFC1_RX_DATA_TYPE_MASK >> - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC4_TX, - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - MADERA_DFC1_TX_DATA_TYPE_MASK >> - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC5_RX, - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - MADERA_DFC1_RX_DATA_TYPE_MASK >> - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC5_TX, - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - MADERA_DFC1_TX_DATA_TYPE_MASK >> - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC6_RX, - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - MADERA_DFC1_RX_DATA_TYPE_MASK >> - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC6_TX, - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - MADERA_DFC1_TX_DATA_TYPE_MASK >> - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC7_RX, - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - MADERA_DFC1_RX_DATA_TYPE_MASK >> - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC7_TX, - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - MADERA_DFC1_TX_DATA_TYPE_MASK >> - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC8_RX, - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - MADERA_DFC1_RX_DATA_TYPE_MASK >> - MADERA_DFC1_RX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DFC8_TX, - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - MADERA_DFC1_TX_DATA_TYPE_MASK >> - MADERA_DFC1_TX_DATA_TYPE_SHIFT, - ARRAY_SIZE(madera_dfc_type_text), - madera_dfc_type_text, - madera_dfc_type_val), -}; -EXPORT_SYMBOL_GPL(madera_dfc_type); - -const struct soc_enum madera_fx_rate = - SOC_VALUE_ENUM_SINGLE(MADERA_FX_CTRL1, - MADERA_FX_RATE_SHIFT, 0xf, - MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val); -EXPORT_SYMBOL_GPL(madera_fx_rate); - -const struct soc_enum madera_noise_gen_rate = - SOC_VALUE_ENUM_SINGLE(MADERA_COMFORT_NOISE_GENERATOR, - MADERA_NOISE_GEN_RATE_SHIFT, 0xf, - MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val); -EXPORT_SYMBOL_GPL(madera_noise_gen_rate); - -const struct soc_enum madera_spdif_rate = - SOC_VALUE_ENUM_SINGLE(MADERA_SPD1_TX_CONTROL, - MADERA_SPD1_RATE_SHIFT, - 0x0f, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, - madera_rate_val); -EXPORT_SYMBOL_GPL(madera_spdif_rate); - -const struct soc_enum madera_isrc_fsh[] = { - SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_1_CTRL_1, - MADERA_ISRC1_FSH_SHIFT, 0xf, - MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_2_CTRL_1, - MADERA_ISRC2_FSH_SHIFT, 0xf, - MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_3_CTRL_1, - MADERA_ISRC3_FSH_SHIFT, 0xf, - MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_4_CTRL_1, - MADERA_ISRC4_FSH_SHIFT, 0xf, - MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - -}; -EXPORT_SYMBOL_GPL(madera_isrc_fsh); - -const struct soc_enum madera_isrc_fsl[] = { - SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_1_CTRL_2, - MADERA_ISRC1_FSL_SHIFT, 0xf, - MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_2_CTRL_2, - MADERA_ISRC2_FSL_SHIFT, 0xf, - MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_3_CTRL_2, - MADERA_ISRC3_FSL_SHIFT, 0xf, - MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_4_CTRL_2, - MADERA_ISRC4_FSL_SHIFT, 0xf, - MADERA_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - -}; -EXPORT_SYMBOL_GPL(madera_isrc_fsl); - -const struct soc_enum madera_asrc1_rate[] = { - SOC_VALUE_ENUM_SINGLE(MADERA_ASRC1_RATE1, - MADERA_ASRC1_RATE1_SHIFT, 0xf, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_ASRC1_RATE2, - MADERA_ASRC1_RATE1_SHIFT, 0xf, - MADERA_ASYNC_RATE_ENUM_SIZE, - madera_rate_text + MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_val + MADERA_SYNC_RATE_ENUM_SIZE), - -}; -EXPORT_SYMBOL_GPL(madera_asrc1_rate); - -const struct soc_enum madera_asrc2_rate[] = { - SOC_VALUE_ENUM_SINGLE(MADERA_ASRC2_RATE1, - MADERA_ASRC2_RATE1_SHIFT, 0xf, - MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_text, madera_rate_val), - SOC_VALUE_ENUM_SINGLE(MADERA_ASRC2_RATE2, - MADERA_ASRC2_RATE2_SHIFT, 0xf, - MADERA_ASYNC_RATE_ENUM_SIZE, - madera_rate_text + MADERA_SYNC_RATE_ENUM_SIZE, - madera_rate_val + MADERA_SYNC_RATE_ENUM_SIZE), - -}; -EXPORT_SYMBOL_GPL(madera_asrc2_rate); - -static const char * const madera_vol_ramp_text[] = { - "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB", - "15ms/6dB", "30ms/6dB", -}; - -SOC_ENUM_SINGLE_DECL(madera_in_vd_ramp, - MADERA_INPUT_VOLUME_RAMP, - MADERA_IN_VD_RAMP_SHIFT, - madera_vol_ramp_text); -EXPORT_SYMBOL_GPL(madera_in_vd_ramp); - -SOC_ENUM_SINGLE_DECL(madera_in_vi_ramp, - MADERA_INPUT_VOLUME_RAMP, - MADERA_IN_VI_RAMP_SHIFT, - madera_vol_ramp_text); -EXPORT_SYMBOL_GPL(madera_in_vi_ramp); - -SOC_ENUM_SINGLE_DECL(madera_out_vd_ramp, - MADERA_OUTPUT_VOLUME_RAMP, - MADERA_OUT_VD_RAMP_SHIFT, - madera_vol_ramp_text); -EXPORT_SYMBOL_GPL(madera_out_vd_ramp); - -SOC_ENUM_SINGLE_DECL(madera_out_vi_ramp, - MADERA_OUTPUT_VOLUME_RAMP, - MADERA_OUT_VI_RAMP_SHIFT, - madera_vol_ramp_text); -EXPORT_SYMBOL_GPL(madera_out_vi_ramp); - -static const char * const madera_lhpf_mode_text[] = { - "Low-pass", "High-pass" -}; - -SOC_ENUM_SINGLE_DECL(madera_lhpf1_mode, - MADERA_HPLPF1_1, - MADERA_LHPF1_MODE_SHIFT, - madera_lhpf_mode_text); -EXPORT_SYMBOL_GPL(madera_lhpf1_mode); - -SOC_ENUM_SINGLE_DECL(madera_lhpf2_mode, - MADERA_HPLPF2_1, - MADERA_LHPF2_MODE_SHIFT, - madera_lhpf_mode_text); -EXPORT_SYMBOL_GPL(madera_lhpf2_mode); - -SOC_ENUM_SINGLE_DECL(madera_lhpf3_mode, - MADERA_HPLPF3_1, - MADERA_LHPF3_MODE_SHIFT, - madera_lhpf_mode_text); -EXPORT_SYMBOL_GPL(madera_lhpf3_mode); - -SOC_ENUM_SINGLE_DECL(madera_lhpf4_mode, - MADERA_HPLPF4_1, - MADERA_LHPF4_MODE_SHIFT, - madera_lhpf_mode_text); -EXPORT_SYMBOL_GPL(madera_lhpf4_mode); - -static const char * const madera_ng_hold_text[] = { - "30ms", "120ms", "250ms", "500ms", -}; - -SOC_ENUM_SINGLE_DECL(madera_ng_hold, - MADERA_NOISE_GATE_CONTROL, - MADERA_NGATE_HOLD_SHIFT, - madera_ng_hold_text); -EXPORT_SYMBOL_GPL(madera_ng_hold); - -static const char * const madera_in_hpf_cut_text[] = { - "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz" -}; - -SOC_ENUM_SINGLE_DECL(madera_in_hpf_cut_enum, - MADERA_HPF_CONTROL, - MADERA_IN_HPF_CUT_SHIFT, - madera_in_hpf_cut_text); -EXPORT_SYMBOL_GPL(madera_in_hpf_cut_enum); - -static const char * const madera_in_dmic_osr_text[MADERA_OSR_ENUM_SIZE] = { - "384kHz", "768kHz", "1.536MHz", "3.072MHz", "6.144MHz", -}; - -static const unsigned int madera_in_dmic_osr_val[MADERA_OSR_ENUM_SIZE] = { - 2, 3, 4, 5, 6, -}; - -const struct soc_enum madera_in_dmic_osr[] = { - SOC_VALUE_ENUM_SINGLE(MADERA_DMIC1L_CONTROL, MADERA_IN1_OSR_SHIFT, - 0x7, MADERA_OSR_ENUM_SIZE, - madera_in_dmic_osr_text, madera_in_dmic_osr_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DMIC2L_CONTROL, MADERA_IN2_OSR_SHIFT, - 0x7, MADERA_OSR_ENUM_SIZE, - madera_in_dmic_osr_text, madera_in_dmic_osr_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DMIC3L_CONTROL, MADERA_IN3_OSR_SHIFT, - 0x7, MADERA_OSR_ENUM_SIZE, - madera_in_dmic_osr_text, madera_in_dmic_osr_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DMIC4L_CONTROL, MADERA_IN4_OSR_SHIFT, - 0x7, MADERA_OSR_ENUM_SIZE, - madera_in_dmic_osr_text, madera_in_dmic_osr_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DMIC5L_CONTROL, MADERA_IN5_OSR_SHIFT, - 0x7, MADERA_OSR_ENUM_SIZE, - madera_in_dmic_osr_text, madera_in_dmic_osr_val), - SOC_VALUE_ENUM_SINGLE(MADERA_DMIC6L_CONTROL, MADERA_IN6_OSR_SHIFT, - 0x7, MADERA_OSR_ENUM_SIZE, - madera_in_dmic_osr_text, madera_in_dmic_osr_val), -}; -EXPORT_SYMBOL_GPL(madera_in_dmic_osr); - -static const char * const madera_anc_input_src_text[] = { - "None", "IN1", "IN2", "IN3", "IN4", "IN5", "IN6", -}; - -static const char * const madera_anc_channel_src_text[] = { - "None", "Left", "Right", "Combine", -}; - -const struct soc_enum madera_anc_input_src[] = { - SOC_ENUM_SINGLE(MADERA_ANC_SRC, - MADERA_IN_RXANCL_SEL_SHIFT, - ARRAY_SIZE(madera_anc_input_src_text), - madera_anc_input_src_text), - SOC_ENUM_SINGLE(MADERA_FCL_ADC_REFORMATTER_CONTROL, - MADERA_FCL_MIC_MODE_SEL, - ARRAY_SIZE(madera_anc_channel_src_text), - madera_anc_channel_src_text), - SOC_ENUM_SINGLE(MADERA_ANC_SRC, - MADERA_IN_RXANCR_SEL_SHIFT, - ARRAY_SIZE(madera_anc_input_src_text), - madera_anc_input_src_text), - SOC_ENUM_SINGLE(MADERA_FCR_ADC_REFORMATTER_CONTROL, - MADERA_FCR_MIC_MODE_SEL, - ARRAY_SIZE(madera_anc_channel_src_text), - madera_anc_channel_src_text), -}; -EXPORT_SYMBOL_GPL(madera_anc_input_src); - -static const char * const madera_anc_ng_texts[] = { - "None", "Internal", "External", -}; - -SOC_ENUM_SINGLE_DECL(madera_anc_ng_enum, SND_SOC_NOPM, 0, madera_anc_ng_texts); -EXPORT_SYMBOL_GPL(madera_anc_ng_enum); - -static const char * const madera_out_anc_src_text[] = { - "None", "RXANCL", "RXANCR", -}; - -const struct soc_enum madera_output_anc_src[] = { - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_1L, - MADERA_OUT1L_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_1R, - MADERA_OUT1R_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_2L, - MADERA_OUT2L_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_2R, - MADERA_OUT2R_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_3L, - MADERA_OUT3L_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_3R, - MADERA_OUT3R_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_4L, - MADERA_OUT4L_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_4R, - MADERA_OUT4R_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_5L, - MADERA_OUT5L_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_5R, - MADERA_OUT5R_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_6L, - MADERA_OUT6L_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), - SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_6R, - MADERA_OUT6R_ANC_SRC_SHIFT, - ARRAY_SIZE(madera_out_anc_src_text), - madera_out_anc_src_text), -}; -EXPORT_SYMBOL_GPL(madera_output_anc_src); - -static const char * const madera_ip_mode_text[2] = { - "Analog", "Digital", -}; - -const struct soc_enum madera_ip_mode[] = { - SOC_ENUM_SINGLE(MADERA_IN1L_CONTROL, MADERA_IN1_MODE_SHIFT, - ARRAY_SIZE(madera_ip_mode_text), madera_ip_mode_text), - SOC_ENUM_SINGLE(MADERA_IN2L_CONTROL, MADERA_IN2_MODE_SHIFT, - ARRAY_SIZE(madera_ip_mode_text), madera_ip_mode_text), - SOC_ENUM_SINGLE(MADERA_IN3L_CONTROL, MADERA_IN3_MODE_SHIFT, - ARRAY_SIZE(madera_ip_mode_text), madera_ip_mode_text), -}; -EXPORT_SYMBOL_GPL(madera_ip_mode); - -int madera_ip_mode_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - unsigned int reg, ret = 0; - - snd_soc_dapm_mutex_lock(dapm); - - /* Cannot change input mode on an active input*/ - reg = snd_soc_read(codec, MADERA_INPUT_ENABLES); - - switch (e->reg) { - case MADERA_IN1L_CONTROL: - if (reg & (MADERA_IN1L_ENA_MASK | MADERA_IN1R_ENA_MASK)) { - ret = -EBUSY; - goto exit; - } - break; - case MADERA_IN2L_CONTROL: - if (reg & (MADERA_IN2L_ENA_MASK | MADERA_IN2R_ENA_MASK)) { - ret = -EBUSY; - goto exit; - } - break; - case MADERA_IN3L_CONTROL: - if (reg & (MADERA_IN3L_ENA_MASK | MADERA_IN3R_ENA_MASK)) { - ret = -EBUSY; - goto exit; - } - break; - default: - ret = -EINVAL; - goto exit; - } - - ret = snd_soc_put_enum_double(kcontrol, ucontrol); -exit: - snd_soc_dapm_mutex_unlock(dapm); - return ret; -} -EXPORT_SYMBOL_GPL(madera_ip_mode_put); - -int madera_in_rate_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - unsigned int reg, mask; - int ret = 0; - - snd_soc_dapm_mutex_lock(dapm); - - /* Cannot change rate on an active input */ - reg = snd_soc_read(codec, MADERA_INPUT_ENABLES); - mask = (e->reg - MADERA_IN1L_CONTROL) / 4; - mask ^= 0x1; /* Flip bottom bit for channel order */ - - if ((reg) & (1 << mask)) { - ret = -EBUSY; - goto exit; - } - - ret = snd_soc_put_enum_double(kcontrol, ucontrol); -exit: - snd_soc_dapm_mutex_unlock(dapm); - return ret; -} -EXPORT_SYMBOL_GPL(madera_in_rate_put); - -int madera_dfc_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - unsigned int reg = e->reg; - unsigned int val; - int ret = 0; - - reg = ((reg / 6) * 6) - 2; - - snd_soc_dapm_mutex_lock(dapm); - - /* Cannot change dfc settings when its on */ - val = snd_soc_read(codec, reg); - if (val & MADERA_DFC1_ENA) { - ret = -EBUSY; - goto exit; - } - - ret = snd_soc_put_enum_double(kcontrol, ucontrol); -exit: - snd_soc_dapm_mutex_unlock(dapm); - return ret; -} -EXPORT_SYMBOL_GPL(madera_dfc_put); - -int madera_lp_mode_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct soc_mixer_control *mc = - (struct soc_mixer_control *)kcontrol->private_value; - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - unsigned int reg, mask; - int ret; - - snd_soc_dapm_mutex_lock(dapm); - - /* Cannot change lp mode on an active input */ - reg = snd_soc_read(codec, MADERA_INPUT_ENABLES); - mask = (mc->reg - MADERA_ADC_DIGITAL_VOLUME_1L) / 4; - mask ^= 0x1; /* Flip bottom bit for channel order */ - - if ((reg) & (1 << mask)) { - ret = -EBUSY; - dev_err(codec->dev, - "Can't change lp mode on an active input\n"); - goto exit; - } - - ret = snd_soc_put_volsw(kcontrol, ucontrol); - -exit: - snd_soc_dapm_mutex_unlock(dapm); - return ret; -} -EXPORT_SYMBOL_GPL(madera_lp_mode_put); - -const struct snd_kcontrol_new madera_dsp_trigger_output_mux[] = { - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0), - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0), - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0), - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0), - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0), - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0), - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0), -}; -EXPORT_SYMBOL_GPL(madera_dsp_trigger_output_mux); - -const struct snd_kcontrol_new madera_drc_activity_output_mux[] = { - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0), - SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0), -}; -EXPORT_SYMBOL_GPL(madera_drc_activity_output_mux); - -static void madera_in_set_vu(struct madera_priv *priv, bool enable) -{ - unsigned int val; - int i, ret; - - if (enable) - val = MADERA_IN_VU; - else - val = 0; - - for (i = 0; i < priv->num_inputs; i++) { - ret = regmap_update_bits(priv->madera->regmap, - MADERA_ADC_DIGITAL_VOLUME_1L + (i * 4), - MADERA_IN_VU, val); - if (ret) - dev_warn(priv->madera->dev, - "Failed to modify VU bits: %d\n", ret); - } -} - -int madera_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, - int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - unsigned int ctrl; - unsigned int reg; - - if (w->shift % 2) { - reg = MADERA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8); - ctrl = reg - 1; - } else { - reg = MADERA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8); - ctrl = reg - 5; - } - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - priv->in_pending++; - break; - case SND_SOC_DAPM_POST_PMU: - priv->in_pending--; - msleep(30); - snd_soc_update_bits(codec, reg, MADERA_IN1L_MUTE, 0); - - /* If this is the last input pending then allow VU */ - if (priv->in_pending == 0) { - usleep_range(1000, 1010); - madera_in_set_vu(priv, true); - } - break; - case SND_SOC_DAPM_PRE_PMD: - snd_soc_update_bits(codec, reg, - MADERA_IN1L_MUTE | MADERA_IN_VU, - MADERA_IN1L_MUTE | MADERA_IN_VU); - break; - case SND_SOC_DAPM_POST_PMD: - /* Disable volume updates if no inputs are enabled */ - reg = snd_soc_read(codec, MADERA_INPUT_ENABLES); - if (reg == 0) - madera_in_set_vu(priv, false); - break; - default: - break; - } - - return 0; -} -EXPORT_SYMBOL_GPL(madera_in_ev); - -int madera_put_dre(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - int ret; - - snd_soc_dapm_mutex_lock(dapm); - - ret = snd_soc_put_volsw(kcontrol, ucontrol); - - snd_soc_dapm_mutex_unlock(dapm); - - return ret; -} -EXPORT_SYMBOL_GPL(madera_put_dre); - -int madera_out_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - int out_up_delay; - - switch (madera->type) { - case CS47L90: - case CS47L91: - out_up_delay = 6; - break; - default: - out_up_delay = 17; - break; - } - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - switch (w->shift) { - case MADERA_OUT1L_ENA_SHIFT: - case MADERA_OUT1R_ENA_SHIFT: - case MADERA_OUT2L_ENA_SHIFT: - case MADERA_OUT2R_ENA_SHIFT: - case MADERA_OUT3L_ENA_SHIFT: - case MADERA_OUT3R_ENA_SHIFT: - priv->out_up_pending++; - priv->out_up_delay += out_up_delay; - break; - default: - break; - } - break; - - case SND_SOC_DAPM_POST_PMU: - switch (w->shift) { - case MADERA_OUT1L_ENA_SHIFT: - case MADERA_OUT1R_ENA_SHIFT: - case MADERA_OUT2L_ENA_SHIFT: - case MADERA_OUT2R_ENA_SHIFT: - case MADERA_OUT3L_ENA_SHIFT: - case MADERA_OUT3R_ENA_SHIFT: - priv->out_up_pending--; - if (!priv->out_up_pending) { - msleep(priv->out_up_delay); - priv->out_up_delay = 0; - } - break; - - default: - break; - } - break; - - case SND_SOC_DAPM_PRE_PMD: - switch (w->shift) { - case MADERA_OUT1L_ENA_SHIFT: - case MADERA_OUT1R_ENA_SHIFT: - case MADERA_OUT2L_ENA_SHIFT: - case MADERA_OUT2R_ENA_SHIFT: - case MADERA_OUT3L_ENA_SHIFT: - case MADERA_OUT3R_ENA_SHIFT: - priv->out_down_pending++; - priv->out_down_delay++; - break; - default: - break; - } - break; - - case SND_SOC_DAPM_POST_PMD: - switch (w->shift) { - case MADERA_OUT1L_ENA_SHIFT: - case MADERA_OUT1R_ENA_SHIFT: - case MADERA_OUT2L_ENA_SHIFT: - case MADERA_OUT2R_ENA_SHIFT: - case MADERA_OUT3L_ENA_SHIFT: - case MADERA_OUT3R_ENA_SHIFT: - priv->out_down_pending--; - if (!priv->out_down_pending) { - msleep(priv->out_down_delay); - priv->out_down_delay = 0; - } - break; - default: - break; - } - break; - default: - break; - } - - return 0; -} -EXPORT_SYMBOL_GPL(madera_out_ev); - -int madera_hp_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - unsigned int mask = 1 << w->shift; - unsigned int out_num = w->shift / 2; - unsigned int val; - unsigned int ep_sel = 0; - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - val = mask; - break; - case SND_SOC_DAPM_PRE_PMD: - val = 0; - break; - case SND_SOC_DAPM_PRE_PMU: - case SND_SOC_DAPM_POST_PMD: - return madera_out_ev(w, kcontrol, event); - default: - return 0; - } - - /* Store the desired state for the HP outputs */ - priv->madera->hp_ena &= ~mask; - priv->madera->hp_ena |= val; - - /* if OUT1 is routed to EPOUT, ignore HP clamp and impedance */ - regmap_read(priv->madera->regmap, MADERA_OUTPUT_ENABLES_1, &ep_sel); - ep_sel &= MADERA_EP_SEL_MASK; - - /* Force off if HPDET clamp is active for this output */ - if ((priv->madera->hpdet_clamp[out_num] || - madera_is_hp_shorted(madera, out_num)) && !ep_sel) - val = 0; - - regmap_update_bits_async(madera->regmap, MADERA_OUTPUT_ENABLES_1, - mask, val); - - return madera_out_ev(w, kcontrol, event); -} -EXPORT_SYMBOL_GPL(madera_hp_ev); - -int madera_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, - int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - unsigned int val; - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - val = 1 << w->shift; - break; - case SND_SOC_DAPM_PRE_PMD: - val = 1 << (w->shift + 1); - break; - default: - return 0; - } - - snd_soc_write(codec, MADERA_CLOCK_CONTROL, val); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_anc_ev); - -static const unsigned int madera_opclk_ref_48k_rates[] = { - 6144000, - 12288000, - 24576000, - 49152000, -}; - -static const unsigned int madera_opclk_ref_44k1_rates[] = { - 5644800, - 11289600, - 22579200, - 45158400, -}; - -static int madera_set_opclk(struct snd_soc_codec *codec, unsigned int clk, - unsigned int freq) -{ - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - unsigned int reg; - const unsigned int *rates; - int ref, div, refclk; - - BUILD_BUG_ON(ARRAY_SIZE(madera_opclk_ref_48k_rates) != - ARRAY_SIZE(madera_opclk_ref_44k1_rates)); - - switch (clk) { - case MADERA_CLK_OPCLK: - reg = MADERA_OUTPUT_SYSTEM_CLOCK; - refclk = priv->sysclk; - break; - case MADERA_CLK_ASYNC_OPCLK: - reg = MADERA_OUTPUT_ASYNC_CLOCK; - refclk = priv->asyncclk; - break; - default: - return -EINVAL; - } - - if (refclk % 4000) - rates = madera_opclk_ref_44k1_rates; - else - rates = madera_opclk_ref_48k_rates; - - for (ref = 0; ref < ARRAY_SIZE(madera_opclk_ref_48k_rates); ++ref) { - if (rates[ref] > refclk) - continue; - - div = 2; - while ((rates[ref] / div >= freq) && (div <= 30)) { - if (rates[ref] / div == freq) { - dev_dbg(codec->dev, "Configured %dHz OPCLK\n", - freq); - snd_soc_update_bits(codec, reg, - MADERA_OPCLK_DIV_MASK | - MADERA_OPCLK_SEL_MASK, - (div << - MADERA_OPCLK_DIV_SHIFT) | - ref); - return 0; - } - div += 2; - } - } - - dev_err(codec->dev, "Unable to generate %dHz OPCLK\n", freq); - return -EINVAL; -} - -static int madera_get_sysclk_setting(unsigned int freq) -{ - switch (freq) { - case 0: - case 5644800: - case 6144000: - return 0; - case 11289600: - case 12288000: - return MADERA_CLK_12MHZ << MADERA_SYSCLK_FREQ_SHIFT; - case 22579200: - case 24576000: - return MADERA_CLK_24MHZ << MADERA_SYSCLK_FREQ_SHIFT; - case 45158400: - case 49152000: - return MADERA_CLK_49MHZ << MADERA_SYSCLK_FREQ_SHIFT; - case 90316800: - case 98304000: - return MADERA_CLK_98MHZ << MADERA_SYSCLK_FREQ_SHIFT; - default: - return -EINVAL; - } -} - -int madera_get_legacy_dspclk_setting(struct madera *madera, unsigned int freq) -{ - switch (freq) { - case 0: - return 0; - case 45158400: - case 49152000: - switch (madera->type) { - case CS47L85: - case WM1840: - if (madera->rev < 3) - return -EINVAL; - else - return MADERA_CLK_49MHZ << - MADERA_SYSCLK_FREQ_SHIFT; - default: - return -EINVAL; - } - case 135475200: - case 147456000: - return MADERA_DSP_CLK_147MHZ << MADERA_SYSCLK_FREQ_SHIFT; - default: - return -EINVAL; - } -} -EXPORT_SYMBOL_GPL(madera_get_legacy_dspclk_setting); - -static int madera_get_dspclk_setting(struct madera *madera, - unsigned int freq, - unsigned int *clock_2_val) -{ - switch (madera->type) { - case CS47L35: - case CS47L85: - case WM1840: - *clock_2_val = 0; /* don't use MADERA_DSP_CLOCK_2 */ - return madera_get_legacy_dspclk_setting(madera, freq); - default: - if (freq > 150000000) - return -EINVAL; - - /* Use new exact frequency control */ - *clock_2_val = freq / 15625; /* freq * (2^6) / (10^6) */ - return 0; - } -} - -int madera_set_sysclk(struct snd_soc_codec *codec, int clk_id, - int source, unsigned int freq, int dir) -{ - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - char *name; - unsigned int reg, clock_2_val = 0; - unsigned int mask = MADERA_SYSCLK_FREQ_MASK | MADERA_SYSCLK_SRC_MASK; - unsigned int val = source << MADERA_SYSCLK_SRC_SHIFT; - int clk_freq_sel, *clk; - int ret = 0; - - switch (clk_id) { - case MADERA_CLK_SYSCLK: - name = "SYSCLK"; - reg = MADERA_SYSTEM_CLOCK_1; - clk = &priv->sysclk; - clk_freq_sel = madera_get_sysclk_setting(freq); - mask |= MADERA_SYSCLK_FRAC; - break; - case MADERA_CLK_ASYNCCLK: - name = "ASYNCCLK"; - reg = MADERA_ASYNC_CLOCK_1; - clk = &priv->asyncclk; - clk_freq_sel = madera_get_sysclk_setting(freq); - break; - case MADERA_CLK_OPCLK: - case MADERA_CLK_ASYNC_OPCLK: - return madera_set_opclk(codec, clk_id, freq); - case MADERA_CLK_DSPCLK: - name = "DSPCLK"; - reg = MADERA_DSP_CLOCK_1; - clk = &priv->dspclk; - clk_freq_sel = madera_get_dspclk_setting(madera, freq, - &clock_2_val); - break; - default: - return -EINVAL; - } - - if (clk_freq_sel < 0) { - dev_err(madera->dev, - "Failed to get clk setting for %dHZ\n", freq); - return ret; - } - - *clk = freq; - - if (freq == 0) { - dev_dbg(madera->dev, "%s cleared\n", name); - return 0; - } - - val |= clk_freq_sel; - - if (clock_2_val) { - ret = regmap_write(madera->regmap, MADERA_DSP_CLOCK_2, - clock_2_val); - if (ret) { - dev_err(madera->dev, - "Failed to write DSP_CONFIG2: %d\n", ret); - return ret; - } - - /* We're using the frequency setting in MADERA_DSP_CLOCK_2 so - * don't change the frequency select bits in MADERA_DSP_CLOCK_1 - */ - mask = MADERA_SYSCLK_SRC_MASK; - } - - if (freq % 6144000) - val |= MADERA_SYSCLK_FRAC; - - dev_dbg(madera->dev, "%s set to %uHz", name, freq); - - return regmap_update_bits(madera->regmap, reg, mask, val); -} -EXPORT_SYMBOL_GPL(madera_set_sysclk); - -static int madera_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) -{ - struct snd_soc_codec *codec = dai->codec; - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - int lrclk, bclk, mode, base; - - base = dai->driver->base; - - lrclk = 0; - bclk = 0; - - switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { - case SND_SOC_DAIFMT_DSP_A: - mode = MADERA_FMT_DSP_MODE_A; - break; - case SND_SOC_DAIFMT_DSP_B: - if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) - != SND_SOC_DAIFMT_CBM_CFM) { - madera_aif_err(dai, "DSP_B not valid in slave mode\n"); - return -EINVAL; - } - mode = MADERA_FMT_DSP_MODE_B; - break; - case SND_SOC_DAIFMT_I2S: - mode = MADERA_FMT_I2S_MODE; - break; - case SND_SOC_DAIFMT_LEFT_J: - if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) - != SND_SOC_DAIFMT_CBM_CFM) { - madera_aif_err(dai, "LEFT_J not valid in slave mode\n"); - return -EINVAL; - } - mode = MADERA_FMT_LEFT_JUSTIFIED_MODE; - break; - default: - madera_aif_err(dai, "Unsupported DAI format %d\n", - fmt & SND_SOC_DAIFMT_FORMAT_MASK); - return -EINVAL; - } - - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { - case SND_SOC_DAIFMT_CBS_CFS: - break; - case SND_SOC_DAIFMT_CBS_CFM: - lrclk |= MADERA_AIF1TX_LRCLK_MSTR; - break; - case SND_SOC_DAIFMT_CBM_CFS: - bclk |= MADERA_AIF1_BCLK_MSTR; - break; - case SND_SOC_DAIFMT_CBM_CFM: - bclk |= MADERA_AIF1_BCLK_MSTR; - lrclk |= MADERA_AIF1TX_LRCLK_MSTR; - break; - default: - madera_aif_err(dai, "Unsupported master mode %d\n", - fmt & SND_SOC_DAIFMT_MASTER_MASK); - return -EINVAL; - } - - switch (fmt & SND_SOC_DAIFMT_INV_MASK) { - case SND_SOC_DAIFMT_NB_NF: - break; - case SND_SOC_DAIFMT_IB_IF: - bclk |= MADERA_AIF1_BCLK_INV; - lrclk |= MADERA_AIF1TX_LRCLK_INV; - break; - case SND_SOC_DAIFMT_IB_NF: - bclk |= MADERA_AIF1_BCLK_INV; - break; - case SND_SOC_DAIFMT_NB_IF: - lrclk |= MADERA_AIF1TX_LRCLK_INV; - break; - default: - return -EINVAL; - } - - regmap_update_bits_async(madera->regmap, base + MADERA_AIF_BCLK_CTRL, - MADERA_AIF1_BCLK_INV | - MADERA_AIF1_BCLK_MSTR, - bclk); - regmap_update_bits_async(madera->regmap, base + MADERA_AIF_TX_PIN_CTRL, - MADERA_AIF1TX_LRCLK_INV | - MADERA_AIF1TX_LRCLK_MSTR, lrclk); - regmap_update_bits_async(madera->regmap, - base + MADERA_AIF_RX_PIN_CTRL, - MADERA_AIF1RX_LRCLK_INV | - MADERA_AIF1RX_LRCLK_MSTR, lrclk); - regmap_update_bits(madera->regmap, base + MADERA_AIF_FORMAT, - MADERA_AIF1_FMT_MASK, mode); - - return 0; -} - -static const int madera_48k_bclk_rates[] = { - -1, - 48000, - 64000, - 96000, - 128000, - 192000, - 256000, - 384000, - 512000, - 768000, - 1024000, - 1536000, - 2048000, - 3072000, - 4096000, - 6144000, - 8192000, - 12288000, - 24576000, -}; - -static const int madera_44k1_bclk_rates[] = { - -1, - 44100, - 58800, - 88200, - 117600, - 177640, - 235200, - 352800, - 470400, - 705600, - 940800, - 1411200, - 1881600, - 2822400, - 3763200, - 5644800, - 7526400, - 11289600, - 22579200, -}; - -static const unsigned int madera_sr_vals[] = { - 0, - 12000, - 24000, - 48000, - 96000, - 192000, - 384000, - 768000, - 0, - 11025, - 22050, - 44100, - 88200, - 176400, - 352800, - 705600, - 4000, - 8000, - 16000, - 32000, - 64000, - 128000, - 256000, - 512000, -}; - -#define MADERA_48K_RATE_MASK 0x0F003E -#define MADERA_44K1_RATE_MASK 0x003E00 -#define MADERA_RATE_MASK (MADERA_48K_RATE_MASK | MADERA_44K1_RATE_MASK) - -static const struct snd_pcm_hw_constraint_list madera_constraint = { - .count = ARRAY_SIZE(madera_sr_vals), - .list = madera_sr_vals, -}; - -static int madera_startup(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct snd_soc_codec *codec = dai->codec; - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera_dai_priv *dai_priv = &priv->dai[dai->id - 1]; - unsigned int base_rate; - - if (!substream->runtime) - return 0; - - switch (dai_priv->clk) { - case MADERA_CLK_SYSCLK: - case MADERA_CLK_SYSCLK_2: - case MADERA_CLK_SYSCLK_3: - base_rate = priv->sysclk; - break; - case MADERA_CLK_ASYNCCLK: - case MADERA_CLK_ASYNCCLK_2: - base_rate = priv->asyncclk; - break; - default: - return 0; - } - - if (base_rate == 0) - dai_priv->constraint.mask = MADERA_RATE_MASK; - else if (base_rate % 4000) - dai_priv->constraint.mask = MADERA_44K1_RATE_MASK; - else - dai_priv->constraint.mask = MADERA_48K_RATE_MASK; - - return snd_pcm_hw_constraint_list(substream->runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &dai_priv->constraint); -} - -static int madera_hw_params_rate(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai) -{ - struct snd_soc_codec *codec = dai->codec; - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera_dai_priv *dai_priv = &priv->dai[dai->id - 1]; - int base = dai->driver->base; - int ret = 0, err; - int i, sr_val, lim = 0; - const unsigned int *sources = NULL; - unsigned int cur, tar; - bool change_rate = false; - u32 rx_sampleszbits, rx_samplerate; - - rx_sampleszbits = snd_pcm_format_width(params_format(params)); - if (rx_sampleszbits < 16) - rx_sampleszbits = 16; - - /* currently we use a single sample rate for SYSCLK */ - for (i = 0; i < ARRAY_SIZE(madera_sr_vals); i++) - if (madera_sr_vals[i] == params_rate(params)) { - rx_samplerate = params_rate(params); - break; - } - - if (i == ARRAY_SIZE(madera_sr_vals)) { - madera_aif_err(dai, "Unsupported sample rate %dHz\n", - params_rate(params)); - return -EINVAL; - } - sr_val = i; - - switch (dai->id) { - case 4: /* cs47l35-slim1 */ - priv->rx1_sampleszbits = rx_sampleszbits; - priv->rx1_samplerate = rx_samplerate; - break; - case 5: /* cs47l35-slim2 */ - priv->rx2_sampleszbits = rx_sampleszbits; - priv->rx2_samplerate = rx_samplerate; - break; - case 6: - default: - break; - } - - if (base) { - switch (dai_priv->clk) { - case MADERA_CLK_SYSCLK: - tar = 0 << MADERA_AIF1_RATE_SHIFT; - break; - case MADERA_CLK_SYSCLK_2: - tar = 1 << MADERA_AIF1_RATE_SHIFT; - break; - case MADERA_CLK_SYSCLK_3: - tar = 2 << MADERA_AIF1_RATE_SHIFT; - break; - case MADERA_CLK_ASYNCCLK: - tar = 8 << MADERA_AIF1_RATE_SHIFT; - break; - case MADERA_CLK_ASYNCCLK_2: - tar = 9 << MADERA_AIF1_RATE_SHIFT; - break; - default: - return -EINVAL; - } - - ret = regmap_read(priv->madera->regmap, - base + MADERA_AIF_RATE_CTRL, &cur); - if (ret != 0) { - madera_aif_err(dai, "Failed to check rate: %d\n", ret); - return ret; - } - - if ((cur & MADERA_AIF1_RATE_MASK) != - (tar & MADERA_AIF1_RATE_MASK)) - change_rate = true; - - if (change_rate) { - unsigned int *cache = priv->aif_sources_cache; - - ret = madera_get_sources(dai, &sources, &lim); - if (ret != 0) { - madera_aif_err(dai, "Failed to get aif sources %d\n", - ret); - return ret; - } - - mutex_lock(&priv->rate_lock); - - ret = madera_cache_and_clear_sources(priv, sources, - cache, lim); - if (ret != 0) { - madera_aif_err(dai, "Failed to cache and clear aif sources: %d\n", - ret); - goto out; - } - - madera_spin_sysclk(priv); - } - } - - switch (dai_priv->clk) { - case MADERA_CLK_SYSCLK: - snd_soc_update_bits(codec, MADERA_SAMPLE_RATE_1, - MADERA_SAMPLE_RATE_1_MASK, sr_val); - if (base) - snd_soc_update_bits(codec, base + MADERA_AIF_RATE_CTRL, - MADERA_AIF1_RATE_MASK, - 0 << MADERA_AIF1_RATE_SHIFT); - break; - case MADERA_CLK_SYSCLK_2: - snd_soc_update_bits(codec, MADERA_SAMPLE_RATE_2, - MADERA_SAMPLE_RATE_2_MASK, sr_val); - if (base) - snd_soc_update_bits(codec, base + MADERA_AIF_RATE_CTRL, - MADERA_AIF1_RATE_MASK, - 1 << MADERA_AIF1_RATE_SHIFT); - break; - case MADERA_CLK_SYSCLK_3: - snd_soc_update_bits(codec, MADERA_SAMPLE_RATE_3, - MADERA_SAMPLE_RATE_3_MASK, sr_val); - if (base) - snd_soc_update_bits(codec, base + MADERA_AIF_RATE_CTRL, - MADERA_AIF1_RATE_MASK, - 2 << MADERA_AIF1_RATE_SHIFT); - break; - case MADERA_CLK_ASYNCCLK: - snd_soc_update_bits(codec, MADERA_ASYNC_SAMPLE_RATE_1, - MADERA_ASYNC_SAMPLE_RATE_1_MASK, sr_val); - if (base) - snd_soc_update_bits(codec, base + MADERA_AIF_RATE_CTRL, - MADERA_AIF1_RATE_MASK, - 8 << MADERA_AIF1_RATE_SHIFT); - break; - case MADERA_CLK_ASYNCCLK_2: - snd_soc_update_bits(codec, MADERA_ASYNC_SAMPLE_RATE_2, - MADERA_ASYNC_SAMPLE_RATE_2_MASK, sr_val); - if (base) - snd_soc_update_bits(codec, base + MADERA_AIF_RATE_CTRL, - MADERA_AIF1_RATE_MASK, - 9 << MADERA_AIF1_RATE_SHIFT); - break; - default: - madera_aif_err(dai, "Invalid clock %d\n", dai_priv->clk); - ret = -EINVAL; - } - - if (change_rate) - madera_spin_sysclk(priv); - -out: - if (change_rate) { - err = madera_restore_sources(priv, sources, - priv->aif_sources_cache, lim); - if (err != 0) { - madera_aif_err(dai, - "Failed to restore sources: %d\n", err); - } - - mutex_unlock(&priv->rate_lock); - } - return ret; -} - -static bool madera_aif_cfg_changed(struct snd_soc_codec *codec, - int base, int bclk, int lrclk, int frame) -{ - int val; - - val = snd_soc_read(codec, base + MADERA_AIF_BCLK_CTRL); - if (bclk != (val & MADERA_AIF1_BCLK_FREQ_MASK)) - return true; - - val = snd_soc_read(codec, base + MADERA_AIF_TX_BCLK_RATE); - if (lrclk != (val & MADERA_AIF1TX_BCPF_MASK)) - return true; - - val = snd_soc_read(codec, base + MADERA_AIF_FRAME_CTRL_1); - if (frame != (val & (MADERA_AIF1TX_WL_MASK | - MADERA_AIF1TX_SLOT_LEN_MASK))) - return true; - - return false; -} - -static int madera_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai) -{ - struct snd_soc_codec *codec = dai->codec; - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - int base = dai->driver->base; - const int *rates; - int i, ret, val; - int channels = params_channels(params); - int chan_limit = madera->pdata.codec.max_channels_clocked[dai->id - 1]; - int tdm_width = priv->tdm_width[dai->id - 1]; - int tdm_slots = priv->tdm_slots[dai->id - 1]; - int bclk, lrclk, wl, frame, bclk_target; - bool reconfig; - unsigned int aif_tx_state = 0, aif_rx_state = 0; - - if (params_rate(params) % 4000) - rates = &madera_44k1_bclk_rates[0]; - else - rates = &madera_48k_bclk_rates[0]; - - wl = snd_pcm_format_width(params_format(params)); - - if (tdm_slots) { - madera_aif_dbg(dai, "Configuring for %d %d bit TDM slots\n", - tdm_slots, tdm_width); - bclk_target = tdm_slots * tdm_width * params_rate(params); - channels = tdm_slots; - } else { - bclk_target = snd_soc_params_to_bclk(params); - tdm_width = wl; - } - - /* Force width to be 16 bit if params pass 8 bit */ - if (wl == 8) { - wl *= 2; - bclk_target *= 2; - tdm_width = wl; - } - - if (chan_limit && chan_limit < channels) { - madera_aif_dbg(dai, "Limiting to %d channels\n", chan_limit); - bclk_target /= channels; - bclk_target *= chan_limit; - } - - /* Force multiple of 2 channels for I2S mode */ - val = snd_soc_read(codec, base + MADERA_AIF_FORMAT); - val &= MADERA_AIF1_FMT_MASK; - if ((channels & 1) && (val == MADERA_FMT_I2S_MODE)) { - madera_aif_dbg(dai, "Forcing stereo mode\n"); - bclk_target /= channels; - bclk_target *= channels + 1; - } - - for (i = 0; i < ARRAY_SIZE(madera_44k1_bclk_rates); i++) { - if (rates[i] >= bclk_target && - rates[i] % params_rate(params) == 0) { - bclk = i; - break; - } - } - if (i == ARRAY_SIZE(madera_44k1_bclk_rates)) { - madera_aif_err(dai, "Unsupported sample rate %dHz\n", - params_rate(params)); - return -EINVAL; - } - - lrclk = rates[bclk] / params_rate(params); - - madera_aif_dbg(dai, "BCLK %dHz LRCLK %dHz\n", - rates[bclk], rates[bclk] / lrclk); - - frame = wl << MADERA_AIF1TX_WL_SHIFT | tdm_width; - - reconfig = madera_aif_cfg_changed(codec, base, bclk, lrclk, frame); - - if (reconfig) { - /* Save AIF TX/RX state */ - aif_tx_state = snd_soc_read(codec, - base + MADERA_AIF_TX_ENABLES); - aif_rx_state = snd_soc_read(codec, - base + MADERA_AIF_RX_ENABLES); - /* Disable AIF TX/RX before reconfiguring it */ - regmap_update_bits_async(madera->regmap, - base + MADERA_AIF_TX_ENABLES, 0xff, 0x0); - regmap_update_bits(madera->regmap, - base + MADERA_AIF_RX_ENABLES, 0xff, 0x0); - } - - ret = madera_hw_params_rate(substream, params, dai); - if (ret != 0) - goto restore_aif; - - if (reconfig) { - regmap_update_bits_async(madera->regmap, - base + MADERA_AIF_BCLK_CTRL, - MADERA_AIF1_BCLK_FREQ_MASK, bclk); - regmap_update_bits_async(madera->regmap, - base + MADERA_AIF_TX_BCLK_RATE, - MADERA_AIF1TX_BCPF_MASK, lrclk); - regmap_update_bits_async(madera->regmap, - base + MADERA_AIF_RX_BCLK_RATE, - MADERA_AIF1RX_BCPF_MASK, lrclk); - regmap_update_bits_async(madera->regmap, - base + MADERA_AIF_FRAME_CTRL_1, - MADERA_AIF1TX_WL_MASK | - MADERA_AIF1TX_SLOT_LEN_MASK, frame); - regmap_update_bits(madera->regmap, - base + MADERA_AIF_FRAME_CTRL_2, - MADERA_AIF1RX_WL_MASK | - MADERA_AIF1RX_SLOT_LEN_MASK, frame); - } - -restore_aif: - if (reconfig) { - /* Restore AIF TX/RX state */ - regmap_update_bits_async(madera->regmap, - base + MADERA_AIF_TX_ENABLES, - 0xff, aif_tx_state); - regmap_update_bits(madera->regmap, - base + MADERA_AIF_RX_ENABLES, - 0xff, aif_rx_state); - } - return ret; -} - -static const char * const madera_dai_clk_str(int clk_id) -{ - switch (clk_id) { - case MADERA_CLK_SYSCLK: - case MADERA_CLK_SYSCLK_2: - case MADERA_CLK_SYSCLK_3: - return "SYSCLK"; - case MADERA_CLK_ASYNCCLK: - case MADERA_CLK_ASYNCCLK_2: - return "ASYNCCLK"; - default: - return "Unknown clock"; - } -} - -static int madera_dai_set_sysclk(struct snd_soc_dai *dai, - int clk_id, unsigned int freq, int dir) -{ - struct snd_soc_codec *codec = dai->codec; - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera_dai_priv *dai_priv = &priv->dai[dai->id - 1]; - struct snd_soc_dapm_route routes[2]; - - switch (clk_id) { - case MADERA_CLK_SYSCLK: - case MADERA_CLK_SYSCLK_2: - case MADERA_CLK_SYSCLK_3: - case MADERA_CLK_ASYNCCLK: - case MADERA_CLK_ASYNCCLK_2: - break; - default: - return -EINVAL; - } - - if (clk_id == dai_priv->clk) - return 0; - - if (dai->active) { - dev_err(codec->dev, "Can't change clock on active DAI %d\n", - dai->id); - return -EBUSY; - } - - dev_dbg(codec->dev, "Setting AIF%d to %s\n", dai->id + 1, - madera_dai_clk_str(clk_id)); - - memset(&routes, 0, sizeof(routes)); - routes[0].sink = dai->driver->capture.stream_name; - routes[1].sink = dai->driver->playback.stream_name; - - switch (clk_id) { - case MADERA_CLK_SYSCLK: - case MADERA_CLK_SYSCLK_2: - case MADERA_CLK_SYSCLK_3: - routes[0].source = madera_dai_clk_str(dai_priv->clk); - routes[1].source = madera_dai_clk_str(dai_priv->clk); - snd_soc_dapm_del_routes(dapm, routes, ARRAY_SIZE(routes)); - break; - default: - break; - } - - switch (clk_id) { - case MADERA_CLK_ASYNCCLK: - case MADERA_CLK_ASYNCCLK_2: - routes[0].source = madera_dai_clk_str(clk_id); - routes[1].source = madera_dai_clk_str(clk_id); - snd_soc_dapm_add_routes(dapm, routes, ARRAY_SIZE(routes)); - break; - default: - break; - } - - dai_priv->clk = clk_id; - - return snd_soc_dapm_sync(dapm); -} - -static int madera_set_tristate(struct snd_soc_dai *dai, int tristate) -{ - struct snd_soc_codec *codec = dai->codec; - int base = dai->driver->base; - unsigned int reg; - int ret; - - if (tristate) - reg = MADERA_AIF1_TRI; - else - reg = 0; - - ret = snd_soc_update_bits(codec, base + MADERA_AIF_RATE_CTRL, - MADERA_AIF1_TRI, reg); - if (ret < 0) - return ret; - else - return 0; -} - -static void madera_set_channels_to_mask(struct snd_soc_dai *dai, - unsigned int base, - int channels, unsigned int mask) -{ - struct snd_soc_codec *codec = dai->codec; - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - int slot, i; - - for (i = 0; i < channels; ++i) { - slot = ffs(mask) - 1; - if (slot < 0) - return; - - regmap_write(madera->regmap, base + i, slot); - - mask &= ~(1 << slot); - } - - if (mask) - madera_aif_warn(dai, "Too many channels in TDM mask\n"); -} - -static int madera_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, - unsigned int rx_mask, int slots, int slot_width) -{ - struct snd_soc_codec *codec = dai->codec; - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - int base = dai->driver->base; - int rx_max_chan = dai->driver->playback.channels_max; - int tx_max_chan = dai->driver->capture.channels_max; - - /* Only support TDM for the physical AIFs */ - if (dai->id > MADERA_MAX_AIF) - return -ENOTSUPP; - - if (slots == 0) { - tx_mask = (1 << tx_max_chan) - 1; - rx_mask = (1 << rx_max_chan) - 1; - } - - madera_set_channels_to_mask(dai, base + MADERA_AIF_FRAME_CTRL_3, - tx_max_chan, tx_mask); - madera_set_channels_to_mask(dai, base + MADERA_AIF_FRAME_CTRL_11, - rx_max_chan, rx_mask); - - priv->tdm_width[dai->id - 1] = slot_width; - priv->tdm_slots[dai->id - 1] = slots; - - return 0; -} - -const struct snd_soc_dai_ops madera_dai_ops = { - .startup = madera_startup, - .set_fmt = madera_set_fmt, - .set_tdm_slot = madera_set_tdm_slot, - .hw_params = madera_hw_params, - .set_sysclk = madera_dai_set_sysclk, - .set_tristate = madera_set_tristate, -}; -EXPORT_SYMBOL_GPL(madera_dai_ops); - -const struct snd_soc_dai_ops madera_simple_dai_ops = { - .startup = madera_startup, - .hw_params = madera_hw_params_rate, - .set_sysclk = madera_dai_set_sysclk, - .set_channel_map = madera_set_channel_map, - .get_channel_map = madera_get_channel_map, -}; -EXPORT_SYMBOL_GPL(madera_simple_dai_ops); - -const struct snd_soc_dai_ops madera_slim_dai_ops = { - .hw_params = madera_hw_params_rate, - .set_sysclk = madera_dai_set_sysclk, - .set_channel_map = madera_set_channel_map, - .get_channel_map = madera_get_channel_map, -}; -EXPORT_SYMBOL_GPL(madera_slim_dai_ops); - -int madera_init_dai(struct madera_priv *priv, int id) -{ - struct madera_dai_priv *dai_priv = &priv->dai[id]; - - dai_priv->clk = MADERA_CLK_SYSCLK; - dai_priv->constraint = madera_constraint; - - return 0; -} -EXPORT_SYMBOL_GPL(madera_init_dai); - -static const struct { - unsigned int min; - unsigned int max; - u16 fratio; - int ratio; -} fll_sync_fratios[] = { - { 0, 64000, 4, 16 }, - { 64000, 128000, 3, 8 }, - { 128000, 256000, 2, 4 }, - { 256000, 1000000, 1, 2 }, - { 1000000, 13500000, 0, 1 }, -}; - -static const unsigned int pseudo_fref_max[MADERA_FLL_MAX_FRATIO] = { - 13500000, - 6144000, - 6144000, - 3072000, - 3072000, - 2822400, - 2822400, - 1536000, - 1536000, - 1536000, - 1536000, - 1536000, - 1536000, - 1536000, - 1536000, - 768000, -}; - -struct madera_fll_gains { - unsigned int min; - unsigned int max; - int gain; /* main gain */ - int alt_gain; /* alternate integer gain */ -}; - -static const struct madera_fll_gains madera_fll_sync_gains[] = { - { 0, 256000, 0, -1 }, - { 256000, 1000000, 2, -1 }, - { 1000000, 13500000, 4, -1 }, -}; - -static const struct madera_fll_gains madera_fll_main_gains[] = { - { 0, 100000, 0, 2 }, - { 100000, 375000, 2, 2 }, - { 375000, 768000, 3, 2 }, - { 768001, 1500000, 3, 3 }, - { 1500000, 6000000, 4, 3 }, - { 6000000, 13500000, 5, 3 }, -}; - -static int madera_validate_fll(struct madera_fll *fll, - unsigned int Fref, - unsigned int Fout) -{ - if (fll->fout && Fout != fll->fout) { - madera_fll_err(fll, "Can't change output on active FLL\n"); - return -EINVAL; - } - - if (Fref / MADERA_FLL_MAX_REFDIV > MADERA_FLL_MAX_FREF) { - madera_fll_err(fll, - "Can't scale %dMHz in to <=13.5MHz\n", Fref); - return -EINVAL; - } - - return 0; -} - -static int madera_find_sync_fratio(unsigned int fref, int *fratio) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(fll_sync_fratios); i++) { - if (fll_sync_fratios[i].min <= fref && - fref <= fll_sync_fratios[i].max) { - if (fratio) - *fratio = fll_sync_fratios[i].fratio; - - return fll_sync_fratios[i].ratio; - } - } - - return -EINVAL; -} - -static int madera_find_main_fratio(unsigned int fref, unsigned int fout, - int *fratio) -{ - int ratio = 1; - - while ((fout / (ratio * fref)) > MADERA_FLL_MAX_N) - ratio++; - - if (fratio) - *fratio = ratio - 1; - - return ratio; -} - -static int madera_find_fratio(struct madera_fll *fll, unsigned int fref, - bool sync, int *fratio) -{ - switch (fll->madera->type) { - case CS47L35: - switch(fll->madera->rev) { - case 0: - /* rev A0 uses sync calculation for both loops */ - return madera_find_sync_fratio(fref, fratio); - default: - if (sync) - return madera_find_sync_fratio(fref, fratio); - else - return madera_find_main_fratio(fref, - fll->fout, - fratio); - } - break; - case CS47L85: - case WM1840: - /* these use the same calculation for main and sync loops */ - return madera_find_sync_fratio(fref, fratio); - default: - if (sync) - return madera_find_sync_fratio(fref, fratio); - else - return madera_find_main_fratio(fref, fll->fout, fratio); - } -} - -static int madera_calc_fratio(struct madera_fll *fll, - struct madera_fll_cfg *cfg, - unsigned int Fref, bool sync) -{ - int init_ratio, ratio; - int refdiv, div; - - /* Fref must be <=13.5MHz, find initial refdiv */ - div = 1; - cfg->refdiv = 0; - while (Fref > MADERA_FLL_MAX_FREF) { - div *= 2; - Fref /= 2; - cfg->refdiv++; - - if (div > MADERA_FLL_MAX_REFDIV) - return -EINVAL; - } - - /* Find an appropriate FLL_FRATIO */ - init_ratio = madera_find_fratio(fll, Fref, sync, &cfg->fratio); - if (init_ratio < 0) { - madera_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n", - Fref); - return init_ratio; - } - - if (!sync) - cfg->fratio = init_ratio - 1; - - switch (fll->madera->type) { - case CS47L35: - switch (fll->madera->rev) { - case 0: - if (sync) - return init_ratio; - break; - default: - return init_ratio; - } - break; - case CS47L85: - case WM1840: - if (sync) - return init_ratio; - break; - default: - return init_ratio; - } - - /* For CS47L35 rev A0, CS47L85 and WM1840 adjust FRATIO/refdiv to avoid - * integer mode if possible - */ - refdiv = cfg->refdiv; - - while (div <= MADERA_FLL_MAX_REFDIV) { - /* start from init_ratio because this may already give a - * fractional N.K - */ - for (ratio = init_ratio; ratio > 0; ratio--) { - if (fll->fout % (ratio * Fref)) { - cfg->refdiv = refdiv; - cfg->fratio = ratio - 1; - return ratio; - } - } - - for (ratio = init_ratio + 1; ratio <= MADERA_FLL_MAX_FRATIO; - ratio++) { - if ((MADERA_FLL_VCO_CORNER / 2) / - (MADERA_FLL_VCO_MULT * ratio) < Fref) - break; - - if (Fref > pseudo_fref_max[ratio - 1]) - break; - - if (fll->fout % (ratio * Fref)) { - cfg->refdiv = refdiv; - cfg->fratio = ratio - 1; - return ratio; - } - } - - div *= 2; - Fref /= 2; - refdiv++; - init_ratio = madera_find_fratio(fll, Fref, sync, NULL); - } - - madera_fll_warn(fll, "Falling back to integer mode operation\n"); - return cfg->fratio + 1; -} - -static int madera_find_fll_gain(struct madera_fll *fll, - struct madera_fll_cfg *cfg, - unsigned int fref, - const struct madera_fll_gains *gains, - int n_gains) -{ - int i; - - for (i = 0; i < n_gains; i++) { - if (gains[i].min <= fref && fref <= gains[i].max) { - cfg->gain = gains[i].gain; - cfg->alt_gain = gains[i].alt_gain; - return 0; - } - } - - madera_fll_err(fll, "Unable to find gain for fref=%uHz\n", fref); - - return -EINVAL; -} - -static int madera_calc_fll(struct madera_fll *fll, - struct madera_fll_cfg *cfg, - unsigned int fref, bool sync) -{ - unsigned int gcd_fll; - const struct madera_fll_gains *gains; - int n_gains; - int ratio, ret; - - madera_fll_dbg(fll, "fref=%u Fout=%u fvco=%u\n", - fref, fll->fout, fll->fout * MADERA_FLL_VCO_MULT); - - /* Find an appropriate FLL_FRATIO and refdiv */ - ratio = madera_calc_fratio(fll, cfg, fref, sync); - if (ratio < 0) - return ratio; - - /* Apply the division for our remaining calculations */ - fref = fref / (1 << cfg->refdiv); - - cfg->n = fll->fout / (ratio * fref); - - if (fll->fout % (ratio * fref)) { - gcd_fll = gcd(fll->fout, ratio * fref); - madera_fll_dbg(fll, "GCD=%u\n", gcd_fll); - - cfg->theta = (fll->fout - (cfg->n * ratio * fref)) - / gcd_fll; - cfg->lambda = (ratio * fref) / gcd_fll; - } else { - cfg->theta = 0; - cfg->lambda = 0; - } - - /* Round down to 16bit range with cost of accuracy lost. - * Denominator must be bigger than numerator so we only - * take care of it. - */ - while (cfg->lambda >= (1 << 16)) { - cfg->theta >>= 1; - cfg->lambda >>= 1; - } - - switch (fll->madera->type) { - case CS47L35: - switch (fll->madera->rev) { - case 0: - /* Rev A0 uses the sync gains for both loops */ - gains = madera_fll_sync_gains, - n_gains = ARRAY_SIZE(madera_fll_sync_gains); - break; - default: - if (sync) { - gains = madera_fll_sync_gains, - n_gains = ARRAY_SIZE(madera_fll_sync_gains); - } else { - gains = madera_fll_main_gains; - n_gains = ARRAY_SIZE(madera_fll_main_gains); - } - break; - } - break; - case CS47L85: - case WM1840: - /* These use the sync gains for both loops */ - gains = madera_fll_sync_gains, - n_gains = ARRAY_SIZE(madera_fll_sync_gains); - break; - default: - if (sync) { - gains = madera_fll_sync_gains, - n_gains = ARRAY_SIZE(madera_fll_sync_gains); - } else { - gains = madera_fll_main_gains; - n_gains = ARRAY_SIZE(madera_fll_main_gains); - } - break; - } - - ret = madera_find_fll_gain(fll, cfg, fref, gains, n_gains); - if (ret) - return ret; - - madera_fll_dbg(fll, "N=%d THETA=%d LAMBDA=%d\n", - cfg->n, cfg->theta, cfg->lambda); - madera_fll_dbg(fll, "FRATIO=0x%x(%d) REFCLK_DIV=0x%x(%d)\n", - cfg->fratio, ratio, cfg->refdiv, 1 << cfg->refdiv); - madera_fll_dbg(fll, "GAIN=0x%x(%d)\n", cfg->gain, 1 << cfg->gain); - - return 0; - -} - -static bool madera_apply_fll(struct madera *madera, unsigned int base, - struct madera_fll_cfg *cfg, int source, - bool sync, int gain) -{ - bool change, fll_change; - - fll_change = false; - regmap_update_bits_check_async(madera->regmap, - base + MADERA_FLL_CONTROL_3_OFFS, - MADERA_FLL1_THETA_MASK, - cfg->theta, &change); - fll_change |= change; - regmap_update_bits_check_async(madera->regmap, - base + MADERA_FLL_CONTROL_4_OFFS, - MADERA_FLL1_LAMBDA_MASK, - cfg->lambda, &change); - fll_change |= change; - regmap_update_bits_check_async(madera->regmap, - base + MADERA_FLL_CONTROL_5_OFFS, - MADERA_FLL1_FRATIO_MASK, - cfg->fratio << MADERA_FLL1_FRATIO_SHIFT, - &change); - fll_change |= change; - regmap_update_bits_check_async(madera->regmap, - base + MADERA_FLL_CONTROL_6_OFFS, - MADERA_FLL1_REFCLK_DIV_MASK | - MADERA_FLL1_REFCLK_SRC_MASK, - cfg->refdiv << MADERA_FLL1_REFCLK_DIV_SHIFT | - source << MADERA_FLL1_REFCLK_SRC_SHIFT, - &change); - fll_change |= change; - - if (sync) { - regmap_update_bits_check_async(madera->regmap, - base + MADERA_FLL_SYNCHRONISER_7_OFFS, - MADERA_FLL1_GAIN_MASK, - gain << MADERA_FLL1_GAIN_SHIFT, &change); - fll_change |= change; - } else { - regmap_update_bits_check_async(madera->regmap, - base + MADERA_FLL_CONTROL_7_OFFS, - MADERA_FLL1_GAIN_MASK, - gain << MADERA_FLL1_GAIN_SHIFT, &change); - fll_change |= change; - } - - regmap_update_bits_check_async(madera->regmap, - base + MADERA_FLL_CONTROL_2_OFFS, - MADERA_FLL1_CTRL_UPD | MADERA_FLL1_N_MASK, - MADERA_FLL1_CTRL_UPD | cfg->n, &change); - fll_change |= change; - - return fll_change; -} - -static int madera_is_enabled_fll(struct madera_fll *fll) -{ - struct madera *madera = fll->madera; - unsigned int reg; - int ret; - - ret = regmap_read(madera->regmap, - fll->base + MADERA_FLL_CONTROL_1_OFFS, ®); - if (ret != 0) { - madera_fll_err(fll, "Failed to read current state: %d\n", ret); - return ret; - } - - return reg & MADERA_FLL1_ENA; -} - -static int madera_wait_for_fll(struct madera_fll *fll, bool requested) -{ - struct madera *madera = fll->madera; - unsigned int val = 0; - bool status; - int i; - - madera_fll_dbg(fll, "Waiting for FLL...\n"); - - for (i = 0; i < 25; i++) { - regmap_read(madera->regmap, MADERA_IRQ1_RAW_STATUS_2, &val); - status = val & (MADERA_FLL1_LOCK_STS1 << (fll->id - 1)); - if (status == requested) - return 0; - usleep_range(10000, 10001); - } - - madera_fll_warn(fll, "Timed out waiting for lock\n"); - - return -ETIMEDOUT; -} - -static bool madera_set_fll_phase_integrator(struct madera_fll *fll, - struct madera_fll_cfg *ref_cfg, - bool sync) -{ - unsigned int val; - bool reg_change; - - if (!sync && (ref_cfg->theta == 0)) - val = (1 << MADERA_FLL1_PHASE_ENA_SHIFT) | - (2 << MADERA_FLL1_PHASE_GAIN_SHIFT); - else - val = 2 << MADERA_FLL1_PHASE_GAIN_SHIFT; - - regmap_update_bits_check(fll->madera->regmap, - fll->base + MADERA_FLL_EFS_2_OFFS, - MADERA_FLL1_PHASE_ENA_MASK | - MADERA_FLL1_PHASE_GAIN_MASK, - val, - ®_change); - - return reg_change; -} - -static int madera_enable_fll(struct madera_fll *fll) -{ - struct madera *madera = fll->madera; - bool have_sync = false; - int already_enabled = madera_is_enabled_fll(fll); - struct madera_fll_cfg cfg; - unsigned int sync_reg_base; - int gain; - bool fll_change = false; - - if (already_enabled < 0) - return already_enabled; /* error getting current state */ - - if ((fll->ref_src < 0) || (fll->ref_freq == 0)) { - madera_fll_err(fll, "No REFCLK\n"); - return -EINVAL; - } - - madera_fll_dbg(fll, "Enabling FLL, initially %s\n", - already_enabled ? "enabled" : "disabled"); - - switch (madera->type) { - case CS47L35: - sync_reg_base = fll->base + CS47L35_FLL_SYNCHRONISER_OFFS; - break; - default: - sync_reg_base = fll->base + MADERA_FLL_SYNCHRONISER_OFFS; - break; - } - - if (already_enabled) { - /* Facilitate smooth refclk across the transition */ - regmap_update_bits_async(fll->madera->regmap, - fll->base + MADERA_FLL_CONTROL_7_OFFS, - MADERA_FLL1_GAIN_MASK, 0); - regmap_update_bits(fll->madera->regmap, - fll->base + MADERA_FLL_CONTROL_1_OFFS, - MADERA_FLL1_FREERUN, - MADERA_FLL1_FREERUN); - udelay(32); - } - - /* Apply SYNCCLK setting */ - if (fll->sync_src >= 0) { - madera_calc_fll(fll, &cfg, fll->sync_freq, true); - - fll_change |= madera_apply_fll(madera, sync_reg_base, - &cfg, fll->sync_src, - true, cfg.gain); - have_sync = true; - } - - /* Apply REFCLK setting */ - madera_calc_fll(fll, &cfg, fll->ref_freq, false); - - switch (fll->madera->type) { - case CS47L35: - switch (fll->madera->rev) { - case 0: - break; - default: - fll_change |= - madera_set_fll_phase_integrator(fll, &cfg, - have_sync); - break; - } - gain = cfg.gain; - break; - case CS47L85: - case WM1840: - gain = cfg.gain; - break; - default: - fll_change |= madera_set_fll_phase_integrator(fll, &cfg, - have_sync); - if (!have_sync && (cfg.theta == 0)) - gain = cfg.alt_gain; - else - gain = cfg.gain; - break; - } - - fll_change |= madera_apply_fll(madera, fll->base, - &cfg, fll->ref_src, - false, gain); - - /* - * Increase the bandwidth if we're not using a low frequency - * sync source. - */ - if (have_sync && fll->sync_freq > 100000) - regmap_update_bits_async(madera->regmap, - sync_reg_base + MADERA_FLL_SYNCHRONISER_7_OFFS, - MADERA_FLL1_SYNC_DFSAT_MASK, 0); - else - regmap_update_bits_async(madera->regmap, - sync_reg_base + MADERA_FLL_SYNCHRONISER_7_OFFS, - MADERA_FLL1_SYNC_DFSAT_MASK, - MADERA_FLL1_SYNC_DFSAT); - - if (!already_enabled) - pm_runtime_get_sync(madera->dev); - - /* Clear any pending completions */ - try_wait_for_completion(&fll->ok); - - regmap_update_bits_async(madera->regmap, - fll->base + MADERA_FLL_CONTROL_1_OFFS, - MADERA_FLL1_ENA, MADERA_FLL1_ENA); - if (have_sync) - regmap_update_bits_async(madera->regmap, - sync_reg_base + MADERA_FLL_SYNCHRONISER_1_OFFS, - MADERA_FLL1_SYNC_ENA, - MADERA_FLL1_SYNC_ENA); - - if (already_enabled) - regmap_update_bits_async(madera->regmap, - fll->base + MADERA_FLL_CONTROL_1_OFFS, - MADERA_FLL1_FREERUN, 0); - - if (fll_change || !already_enabled) - madera_wait_for_fll(fll, true); - - return 0; -} - -static void madera_disable_fll(struct madera_fll *fll) -{ - struct madera *madera = fll->madera; - unsigned int sync_reg_base; - bool change; - - switch (madera->type) { - case CS47L35: - sync_reg_base = fll->base + CS47L35_FLL_SYNCHRONISER_OFFS; - break; - default: - sync_reg_base = fll->base + MADERA_FLL_SYNCHRONISER_OFFS; - break; - } - - madera_fll_dbg(fll, "Disabling FLL\n"); - - regmap_update_bits_async(madera->regmap, - fll->base + MADERA_FLL_CONTROL_1_OFFS, - MADERA_FLL1_FREERUN, MADERA_FLL1_FREERUN); - regmap_update_bits_check(madera->regmap, - fll->base + MADERA_FLL_CONTROL_1_OFFS, - MADERA_FLL1_ENA, 0, &change); - regmap_update_bits(madera->regmap, - sync_reg_base + MADERA_FLL_SYNCHRONISER_1_OFFS, - MADERA_FLL1_SYNC_ENA, 0); - regmap_update_bits_async(madera->regmap, - fll->base + MADERA_FLL_CONTROL_1_OFFS, - MADERA_FLL1_FREERUN, 0); - - madera_wait_for_fll(fll, false); - - if (change) - pm_runtime_put_autosuspend(madera->dev); -} - -int madera_set_fll_syncclk(struct madera_fll *fll, int source, - unsigned int fref, unsigned int Fout) -{ - int ret = 0; - - if (fll->sync_src == source && fll->sync_freq == fref) - return 0; - - if (fll->fout && fref > 0) { - ret = madera_validate_fll(fll, fref, fll->fout); - if (ret != 0) - return ret; - } - - fll->sync_src = source; - fll->sync_freq = fref; - - if (fll->fout && fref > 0) - ret = madera_enable_fll(fll); - - return ret; -} -EXPORT_SYMBOL_GPL(madera_set_fll_syncclk); - -int madera_set_fll_refclk(struct madera_fll *fll, int source, - unsigned int fref, unsigned int fout) -{ - int ret = 0; - - if (fll->ref_src == source && - fll->ref_freq == fref && fll->fout == fout) - return 0; - - if (fout) { - if ((fout < MADERA_FLL_MIN_FOUT) || - (fout > MADERA_FLL_MAX_FOUT)) { - madera_fll_err(fll, "invalid fout %uHz\n", fout); - return -EINVAL; - } - - ret = madera_validate_fll(fll, fref, fout); - if (ret != 0) - return ret; - } - - fll->ref_src = source; - fll->ref_freq = fref; - fll->fout = fout; - - if (fout) - ret = madera_enable_fll(fll); - else - madera_disable_fll(fll); - - return ret; -} -EXPORT_SYMBOL_GPL(madera_set_fll_refclk); - -int madera_init_fll(struct madera *madera, int id, int base, - struct madera_fll *fll) -{ - init_completion(&fll->ok); - - fll->id = id; - fll->base = base; - fll->madera = madera; - fll->ref_src = MADERA_FLL_SRC_NONE; - fll->sync_src = MADERA_FLL_SRC_NONE; - - regmap_update_bits(madera->regmap, - fll->base + MADERA_FLL_CONTROL_1_OFFS, - MADERA_FLL1_FREERUN, 0); - - return 0; -} -EXPORT_SYMBOL_GPL(madera_init_fll); - -static const struct reg_sequence madera_fll_ao_32K_49M_patch[] = { - { MADERA_FLLAO_CONTROL_2, 0x02EE }, - { MADERA_FLLAO_CONTROL_3, 0x0000 }, - { MADERA_FLLAO_CONTROL_4, 0x0001 }, - { MADERA_FLLAO_CONTROL_5, 0x0002 }, - { MADERA_FLLAO_CONTROL_6, 0x8001 }, - { MADERA_FLLAO_CONTROL_7, 0x0004 }, - { MADERA_FLLAO_CONTROL_8, 0x0077 }, - { MADERA_FLLAO_CONTROL_10, 0x06D8 }, - { MADERA_FLLAO_CONTROL_11, 0x0085 }, - { MADERA_FLLAO_CONTROL_2, 0x82EE }, -}; - -static const struct reg_sequence madera_fll_ao_32K_45M_patch[] = { - { MADERA_FLLAO_CONTROL_2, 0x02B1 }, - { MADERA_FLLAO_CONTROL_3, 0x0001 }, - { MADERA_FLLAO_CONTROL_4, 0x0010 }, - { MADERA_FLLAO_CONTROL_5, 0x0002 }, - { MADERA_FLLAO_CONTROL_6, 0x8001 }, - { MADERA_FLLAO_CONTROL_7, 0x0004 }, - { MADERA_FLLAO_CONTROL_8, 0x0077 }, - { MADERA_FLLAO_CONTROL_10, 0x06D8 }, - { MADERA_FLLAO_CONTROL_11, 0x0005 }, - { MADERA_FLLAO_CONTROL_2, 0x82B1 }, -}; - -struct madera_fllao_patch { - unsigned int fin; - unsigned int fout; - const struct reg_sequence *patch; - unsigned int patch_size; -}; - -static const struct madera_fllao_patch madera_fllao_settings[] = { - { - .fin = 32768, - .fout = 49152000, - .patch = madera_fll_ao_32K_49M_patch, - .patch_size = ARRAY_SIZE(madera_fll_ao_32K_49M_patch), - - }, - { - .fin = 32768, - .fout = 45158400, - .patch = madera_fll_ao_32K_45M_patch, - .patch_size = ARRAY_SIZE(madera_fll_ao_32K_45M_patch), - }, -}; - -static int madera_enable_fll_ao(struct madera_fll *fll, - const struct reg_sequence *patch, - unsigned int patch_size) -{ - struct madera *madera = fll->madera; - int already_enabled = madera_is_enabled_fll(fll); - unsigned int val; - int i; - - if (already_enabled < 0) - return already_enabled; - - if (!already_enabled) - pm_runtime_get_sync(madera->dev); - - madera_fll_dbg(fll, "Enabling FLL_AO, initially %s\n", - already_enabled ? "enabled" : "disabled"); - - /* FLL_AO_HOLD must be set before configuring any registers */ - regmap_update_bits(fll->madera->regmap, - fll->base + MADERA_FLLAO_CONTROL_1_OFFS, - MADERA_FLL_AO_HOLD, MADERA_FLL_AO_HOLD); - - for (i = 0; i < patch_size; i++) { - val = patch[i].def; - - /* modify the patch to apply fll->ref_src is input clock */ - if (patch[i].reg == MADERA_FLLAO_CONTROL_6) { - val &= ~MADERA_FLL_AO_REFCLK_SRC_MASK; - val |= (fll->ref_src << MADERA_FLL_AO_REFCLK_SRC_SHIFT) - & MADERA_FLL_AO_REFCLK_SRC_MASK; - } - - regmap_write(madera->regmap, patch[i].reg, val); - } - - regmap_update_bits(madera->regmap, - fll->base + MADERA_FLLAO_CONTROL_1_OFFS, - MADERA_FLL_AO_ENA, MADERA_FLL_AO_ENA); - - /* Release the hold so that fll_ao locks to external frequency */ - regmap_update_bits(madera->regmap, - fll->base + MADERA_FLLAO_CONTROL_1_OFFS, - MADERA_FLL_AO_HOLD, 0); - - if (!already_enabled) - madera_wait_for_fll(fll, true); - - return 0; -} - -static int madera_disable_fll_ao(struct madera_fll *fll) -{ - struct madera *madera = fll->madera; - bool change; - - madera_fll_dbg(fll, "Disabling FLL_AO\n"); - - regmap_update_bits(madera->regmap, - fll->base + MADERA_FLLAO_CONTROL_1_OFFS, - MADERA_FLL_AO_HOLD, MADERA_FLL_AO_HOLD); - regmap_update_bits_check(madera->regmap, - fll->base + MADERA_FLLAO_CONTROL_1_OFFS, - MADERA_FLL_AO_ENA, 0, &change); - - madera_wait_for_fll(fll, false); - - /* ctrl_up gates the writes to all fll_ao register, setting it to 0 - * here ensures that after a runtime suspend/resume cycle when one - * enables the fllao then ctrl_up is the last bit that is configured - * by the fllao enable code rather than the cache sync operation which - * would have updated it much earlier before writing out all fllao - * registers - */ - regmap_update_bits(madera->regmap, - fll->base + MADERA_FLLAO_CONTROL_2_OFFS, - MADERA_FLL_AO_CTRL_UPD_MASK, 0); - - if (change) - pm_runtime_put_autosuspend(madera->dev); - - return 0; -} - -int madera_set_fll_ao_refclk(struct madera_fll *fll, int source, - unsigned int fin, unsigned int fout) -{ - int ret = 0; - const struct reg_sequence *patch = NULL; - int patch_size = 0; - unsigned int i; - - if (fll->ref_src == source && - fll->ref_freq == fin && fll->fout == fout) - return 0; - - madera_fll_dbg(fll, "Change FLL_AO refclk to fin=%u fout=%u source=%d\n", - fin, fout, source); - - if (fout && (fll->ref_freq != fin || fll->fout != fout)) { - for (i = 0; i < ARRAY_SIZE(madera_fllao_settings); i++) { - if (madera_fllao_settings[i].fin == fin && - madera_fllao_settings[i].fout == fout) - break; - } - - if (i == ARRAY_SIZE(madera_fllao_settings)) { - madera_fll_err(fll, - "No matching configuration for FLL_AO\n"); - return -EINVAL; - } - - patch = madera_fllao_settings[i].patch; - patch_size = madera_fllao_settings[i].patch_size; - } - - fll->ref_src = source; - fll->ref_freq = fin; - fll->fout = fout; - - if (fout) - ret = madera_enable_fll_ao(fll, patch, patch_size); - else - madera_disable_fll_ao(fll); - - return ret; -} -EXPORT_SYMBOL_GPL(madera_set_fll_ao_refclk); - -/** - * madera_set_output_mode - Set the mode of the specified output - * - * @codec: Device to configure - * @output: Output number - * @diff: True to set the output to differential mode - * - * Some systems use external analogue switches to connect more - * analogue devices to the CODEC than are supported by the device. In - * some systems this requires changing the switched output from single - * ended to differential mode dynamically at runtime, an operation - * supported using this function. - * - * Most systems have a single static configuration and should use - * platform data instead. - */ -int madera_set_output_mode(struct snd_soc_codec *codec, int output, bool diff) -{ - unsigned int reg, val; - int ret; - - if (output < 1 || output > MADERA_MAX_OUTPUT) - return -EINVAL; - - reg = MADERA_OUTPUT_PATH_CONFIG_1L + (output - 1) * 8; - - if (diff) - val = MADERA_OUT1_MONO; - else - val = 0; - - ret = snd_soc_update_bits(codec, reg, MADERA_OUT1_MONO, val); - if (ret < 0) - return ret; - else - return 0; -} -EXPORT_SYMBOL_GPL(madera_set_output_mode); - -int madera_set_custom_jd(struct snd_soc_codec *codec, - const struct madera_jd_state *custom_jd, - unsigned int index) -{ - struct madera *madera = dev_get_drvdata(codec->dev->parent); - - if (index >= MADERA_MAX_ACCESSORY) - return -EINVAL; - - madera->pdata.accdet[index].custom_jd = custom_jd; - - return 0; -} -EXPORT_SYMBOL_GPL(madera_set_custom_jd); - -struct madera_extcon_info * -madera_get_extcon_info(struct snd_soc_codec *codec) -{ - struct madera *madera = dev_get_drvdata(codec->dev->parent); - - return madera->extcon_info; -} -EXPORT_SYMBOL_GPL(madera_get_extcon_info); - -static int madera_set_force_bypass(struct snd_soc_codec *codec, bool set_bypass) -{ - struct madera *madera = dev_get_drvdata(codec->dev->parent); - struct madera_micbias *micbias = madera->pdata.micbias; - unsigned int i, cp_bypass = 0, micbias_bypass = 0; - unsigned int num_micbiases; - - if (set_bypass) { - cp_bypass = MADERA_CPMIC_BYPASS; - micbias_bypass = MADERA_MICB1_BYPASS; - } - - if (madera->micvdd_regulated) { - if (set_bypass) - snd_soc_dapm_disable_pin(madera->dapm, "MICSUPP"); - else - snd_soc_dapm_force_enable_pin(madera->dapm, "MICSUPP"); - - snd_soc_dapm_sync(madera->dapm); - - regmap_update_bits(madera->regmap, - MADERA_MIC_CHARGE_PUMP_1, - MADERA_CPMIC_BYPASS, cp_bypass); - } - - madera_get_num_micbias(madera, &num_micbiases, NULL); - - for (i = 0; i < num_micbiases; i++) { - if ((set_bypass) || - (!micbias[i].bypass && micbias[i].mV)) - regmap_update_bits(madera->regmap, - MADERA_MIC_BIAS_CTRL_1 + i, - MADERA_MICB1_BYPASS, - micbias_bypass); - } - - return 0; -} - -int madera_enable_force_bypass(struct snd_soc_codec *codec) -{ - return madera_set_force_bypass(codec, true); -} -EXPORT_SYMBOL_GPL(madera_enable_force_bypass); - -int madera_disable_force_bypass(struct snd_soc_codec *codec) -{ - return madera_set_force_bypass(codec, false); -} -EXPORT_SYMBOL_GPL(madera_disable_force_bypass); - -int madera_frf_bytes_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct soc_bytes *params = (void *)kcontrol->private_value; - struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct madera_priv *priv = snd_soc_codec_get_drvdata(codec); - struct madera *madera = priv->madera; - int ret, len; - void *data; - - len = params->num_regs * component->val_bytes; - - data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA); - if (!data) - return -ENOMEM; - - mutex_lock(&madera->reg_setting_lock); - regmap_write(madera->regmap, 0x80, 0x3); - - ret = regmap_raw_write(madera->regmap, params->base, data, len); - - regmap_write(madera->regmap, 0x80, 0x0); - mutex_unlock(&madera->reg_setting_lock); - - kfree(data); - return ret; -} -EXPORT_SYMBOL_GPL(madera_frf_bytes_put); - -static bool madera_eq_filter_unstable(bool mode, __be16 _a, __be16 _b) -{ - s16 a = be16_to_cpu(_a); - s16 b = be16_to_cpu(_b); - - if (!mode) { - return abs(a) >= 4096; - } else { - if (abs(b) >= 4096) - return true; - - return (abs((a << 16) / (4096 - b)) >= 4096 << 4); - } -} - -int madera_eq_coeff_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct madera *madera = dev_get_drvdata(codec->dev->parent); - struct soc_bytes *params = (void *)kcontrol->private_value; - unsigned int val; - __be16 *data; - int len; - int ret; - - len = params->num_regs * regmap_get_val_bytes(madera->regmap); - - data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA); - if (!data) - return -ENOMEM; - - data[0] &= cpu_to_be16(MADERA_EQ1_B1_MODE); - - if (madera_eq_filter_unstable(!!data[0], data[1], data[2]) || - madera_eq_filter_unstable(true, data[4], data[5]) || - madera_eq_filter_unstable(true, data[8], data[9]) || - madera_eq_filter_unstable(true, data[12], data[13]) || - madera_eq_filter_unstable(false, data[16], data[17])) { - dev_err(madera->dev, "Rejecting unstable EQ coefficients\n"); - ret = -EINVAL; - goto out; - } - - ret = regmap_read(madera->regmap, params->base, &val); - if (ret != 0) - goto out; - - val &= ~MADERA_EQ1_B1_MODE; - data[0] |= cpu_to_be16(val); - - ret = regmap_raw_write(madera->regmap, params->base, data, len); - -out: - kfree(data); - return ret; -} -EXPORT_SYMBOL_GPL(madera_eq_coeff_put); - -int madera_lhpf_coeff_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct madera *madera = dev_get_drvdata(codec->dev->parent); - __be16 *data = (__be16 *)ucontrol->value.bytes.data; - s16 val = be16_to_cpu(*data); - - if (abs(val) >= 4096) { - dev_err(madera->dev, "Rejecting unstable LHPF coefficients\n"); - return -EINVAL; - } - - return snd_soc_bytes_put(kcontrol, ucontrol); -} -EXPORT_SYMBOL_GPL(madera_lhpf_coeff_put); - -int madera_register_notifier(struct snd_soc_codec *codec, - struct notifier_block *nb) -{ - struct madera *madera = dev_get_drvdata(codec->dev->parent); - - return blocking_notifier_chain_register(&madera->notifier, nb); -} -EXPORT_SYMBOL_GPL(madera_register_notifier); - -int madera_unregister_notifier(struct snd_soc_codec *codec, - struct notifier_block *nb) -{ - struct madera *madera = dev_get_drvdata(codec->dev->parent); - - return blocking_notifier_chain_unregister(&madera->notifier, nb); -} -EXPORT_SYMBOL_GPL(madera_unregister_notifier); - -MODULE_DESCRIPTION("ASoC Cirrus Logic Madera codec support"); -MODULE_AUTHOR("Charles Keepax "); -MODULE_AUTHOR("Richard Fitzgerald "); -MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/madera.h b/sound/soc/codecs/madera.h deleted file mode 100644 index b1682b11c7a2..000000000000 --- a/sound/soc/codecs/madera.h +++ /dev/null @@ -1,544 +0,0 @@ -/* - * madera.h - Cirrus Logic Madera class codecs common support - * - * Copyright 2015-2016 Cirrus Logic - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _ASOC_MADERA_H -#define _ASOC_MADERA_H - -#include - -#include -#include - -#include "wm_adsp.h" - -#include "madera-slimbus.h" - -#define MADERA_FLL1_REFCLK 1 -#define MADERA_FLL2_REFCLK 2 -#define MADERA_FLL3_REFCLK 3 -#define MADERA_FLLAO_REFCLK 4 -#define MADERA_FLL1_SYNCCLK 5 -#define MADERA_FLL2_SYNCCLK 6 -#define MADERA_FLL3_SYNCCLK 7 -#define MADERA_FLLAO_SYNCCLK 8 - -#define MADERA_FLL_SRC_NONE -1 -#define MADERA_FLL_SRC_MCLK1 0 -#define MADERA_FLL_SRC_MCLK2 1 -#define MADERA_FLL_SRC_SLIMCLK 3 -#define MADERA_FLL_SRC_FLL1 4 -#define MADERA_FLL_SRC_FLL2 5 -#define MADERA_FLL_SRC_AIF1BCLK 8 -#define MADERA_FLL_SRC_AIF2BCLK 9 -#define MADERA_FLL_SRC_AIF3BCLK 10 -#define MADERA_FLL_SRC_AIF4BCLK 11 -#define MADERA_FLL_SRC_AIF1LRCLK 12 -#define MADERA_FLL_SRC_AIF2LRCLK 13 -#define MADERA_FLL_SRC_AIF3LRCLK 14 -#define MADERA_FLL_SRC_AIF4LRCLK 15 - -#define MADERA_CLK_SYSCLK 1 -#define MADERA_CLK_ASYNCCLK 2 -#define MADERA_CLK_OPCLK 3 -#define MADERA_CLK_ASYNC_OPCLK 4 -#define MADERA_CLK_SYSCLK_2 5 -#define MADERA_CLK_SYSCLK_3 6 -#define MADERA_CLK_ASYNCCLK_2 7 -#define MADERA_CLK_DSPCLK 8 - -#define MADERA_CLK_SRC_MCLK1 0x0 -#define MADERA_CLK_SRC_MCLK2 0x1 -#define MADERA_CLK_SRC_FLL1 0x4 -#define MADERA_CLK_SRC_FLL2 0x5 -#define MADERA_CLK_SRC_FLL3 0x6 -#define MADERA_CLK_SRC_FLLAO_HI 0x7 -#define MADERA_CLK_SRC_FLL1_DIV6 0x7 -#define MADERA_CLK_SRC_AIF1BCLK 0x8 -#define MADERA_CLK_SRC_AIF2BCLK 0x9 -#define MADERA_CLK_SRC_AIF3BCLK 0xA -#define MADERA_CLK_SRC_AIF4BCLK 0xB -#define MADERA_CLK_SRC_FLLAO 0xF - -#define MADERA_MIXER_VOL_MASK 0x00FE -#define MADERA_MIXER_VOL_SHIFT 1 -#define MADERA_MIXER_VOL_WIDTH 7 - -#define MADERA_CLK_6MHZ 0 -#define MADERA_CLK_12MHZ 1 -#define MADERA_CLK_24MHZ 2 -#define MADERA_CLK_49MHZ 3 -#define MADERA_CLK_98MHZ 4 - -#define MADERA_DSP_CLK_9MHZ 0 -#define MADERA_DSP_CLK_18MHZ 1 -#define MADERA_DSP_CLK_36MHZ 2 -#define MADERA_DSP_CLK_73MHZ 3 -#define MADERA_DSP_CLK_147MHZ 4 - -#define MADERA_MAX_DAI 17 -#define MADERA_MAX_ADSP 7 - -#define MADERA_MAX_AIF_SOURCES 32 -#define MADERA_MAX_MIXER_SOURCES 48 - -#define MADERA_NUM_MIXER_INPUTS 146 - -#define MADERA_FRF_COEFFICIENT_LEN 4 - -struct madera; -struct wm_adsp; -struct madera_jd_state; -/* Voice trigger event codes */ -enum { - MADERA_TRIGGER_VOICE, - MADERA_TRIGGER_TEXT, - MADERA_TRIGGER_PANIC -}; -struct madera_voice_trigger_info { - /** Which core triggered, 1-based (1 = DSP1, ...) */ - int core_num; - int code; - u16 err_msg[4]; -}; - -struct madera_dai_priv { - int clk; - struct snd_pcm_hw_constraint_list constraint; - - int sample_rate; - int bit_width; -}; - -struct madera_priv { - struct wm_adsp adsp[MADERA_MAX_ADSP]; - struct madera *madera; - int sysclk; - int asyncclk; - int dspclk; - struct madera_dai_priv dai[MADERA_MAX_DAI]; - - int num_inputs; - - unsigned int in_pending; - - unsigned int out_up_pending; - unsigned int out_up_delay; - unsigned int out_down_pending; - unsigned int out_down_delay; - - unsigned int adsp_rate_cache[MADERA_MAX_ADSP]; - struct mutex adsp_rate_lock; - - struct mutex rate_lock; - struct mutex adsp_fw_lock; - - int tdm_width[MADERA_MAX_AIF]; - int tdm_slots[MADERA_MAX_AIF]; - - unsigned int aif_sources_cache[MADERA_MAX_AIF_SOURCES]; - unsigned int mixer_sources_cache[MADERA_MAX_MIXER_SOURCES]; - - int (*get_sources)(unsigned int reg, const unsigned int **cur_sources, - int *lim); - - u32 rx_port_handle[MADERA_SLIMBUS_MAX_CHANNELS]; - u32 tx_port_handle[MADERA_SLIMBUS_MAX_CHANNELS]; - u16 rx_channel_handle[MADERA_SLIMBUS_MAX_CHANNELS]; - u16 tx_channel_handle[MADERA_SLIMBUS_MAX_CHANNELS]; - u16 rx_chan_map_slot[3][MADERA_SLIMBUS_MAX_CHANNELS]; - u16 tx_chan_map_slot[3][MADERA_SLIMBUS_MAX_CHANNELS]; - int rx_chan_map_num[3]; - int tx_chan_map_num[3]; - u32 rx1_samplerate; - u32 rx1_sampleszbits; - u32 rx2_samplerate; - u32 rx2_sampleszbits; - u8 slim_logic_addr; -}; - -struct madera_fll_cfg { - int n; - int theta; - int lambda; - int refdiv; - int fratio; - int gain; - int alt_gain; -}; - -struct madera_fll { - struct madera *madera; - int id; - unsigned int base; - struct completion ok; - - unsigned int fout; - - int sync_src; - unsigned int sync_freq; - - int ref_src; - unsigned int ref_freq; - struct madera_fll_cfg ref_cfg; -}; - -struct madera_enum { - struct soc_enum mixer_enum; - int val; -}; - -struct cs47l35 { - struct madera_priv core; - struct madera_fll fll; -}; - -extern const unsigned int madera_ana_tlv[]; -extern const unsigned int madera_eq_tlv[]; -extern const unsigned int madera_digital_tlv[]; -extern const unsigned int madera_noise_tlv[]; -extern const unsigned int madera_ng_tlv[]; - -extern const unsigned int madera_mixer_tlv[]; -extern const char * const madera_mixer_texts[MADERA_NUM_MIXER_INPUTS]; -extern unsigned int madera_mixer_values[MADERA_NUM_MIXER_INPUTS]; - -#define MADERA_GAINMUX_CONTROLS(name, base) \ - SOC_SINGLE_RANGE_TLV(name " Input Volume", base + 1, \ - MADERA_MIXER_VOL_SHIFT, 0x20, 0x50, 0, \ - madera_mixer_tlv) - -#define MADERA_MIXER_CONTROLS(name, base) \ - SOC_SINGLE_RANGE_TLV(name " Input 1 Volume", base + 1, \ - MADERA_MIXER_VOL_SHIFT, 0x20, 0x50, 0, \ - madera_mixer_tlv), \ - SOC_SINGLE_RANGE_TLV(name " Input 2 Volume", base + 3, \ - MADERA_MIXER_VOL_SHIFT, 0x20, 0x50, 0, \ - madera_mixer_tlv), \ - SOC_SINGLE_RANGE_TLV(name " Input 3 Volume", base + 5, \ - MADERA_MIXER_VOL_SHIFT, 0x20, 0x50, 0, \ - madera_mixer_tlv), \ - SOC_SINGLE_RANGE_TLV(name " Input 4 Volume", base + 7, \ - MADERA_MIXER_VOL_SHIFT, 0x20, 0x50, 0, \ - madera_mixer_tlv) - -#define MADERA_MUX_ENUM_DECL(name, reg) \ - SOC_VALUE_ENUM_SINGLE_AUTODISABLE_DECL( \ - name, reg, 0, 0xff, madera_mixer_texts, madera_mixer_values) - -#define MADERA_MUX_CTL_DECL(name) \ - const struct snd_kcontrol_new name##_mux = \ - SOC_DAPM_ENUM("Route", name##_enum) - -#define MADERA_MUX_ENUMS(name, base_reg) \ - static MADERA_MUX_ENUM_DECL(name##_enum, base_reg); \ - static MADERA_MUX_CTL_DECL(name) - -#define MADERA_MIXER_ENUMS(name, base_reg) \ - MADERA_MUX_ENUMS(name##_in1, base_reg); \ - MADERA_MUX_ENUMS(name##_in2, base_reg + 2); \ - MADERA_MUX_ENUMS(name##_in3, base_reg + 4); \ - MADERA_MUX_ENUMS(name##_in4, base_reg + 6) - -#define MADERA_DSP_AUX_ENUMS(name, base_reg) \ - MADERA_MUX_ENUMS(name##_aux1, base_reg); \ - MADERA_MUX_ENUMS(name##_aux2, base_reg + 8); \ - MADERA_MUX_ENUMS(name##_aux3, base_reg + 16); \ - MADERA_MUX_ENUMS(name##_aux4, base_reg + 24); \ - MADERA_MUX_ENUMS(name##_aux5, base_reg + 32); \ - MADERA_MUX_ENUMS(name##_aux6, base_reg + 40) - -#define MADERA_MUX(name, ctrl) \ - SND_SOC_DAPM_MUX(name, SND_SOC_NOPM, 0, 0, ctrl) - -#define MADERA_MUX_WIDGETS(name, name_str) \ - MADERA_MUX(name_str " Input 1", &name##_mux) - -#define MADERA_MIXER_WIDGETS(name, name_str) \ - MADERA_MUX(name_str " Input 1", &name##_in1_mux), \ - MADERA_MUX(name_str " Input 2", &name##_in2_mux), \ - MADERA_MUX(name_str " Input 3", &name##_in3_mux), \ - MADERA_MUX(name_str " Input 4", &name##_in4_mux), \ - SND_SOC_DAPM_MIXER(name_str " Mixer", SND_SOC_NOPM, 0, 0, NULL, 0) - -#define MADERA_DSP_WIDGETS(name, name_str) \ - MADERA_MIXER_WIDGETS(name##L, name_str "L"), \ - MADERA_MIXER_WIDGETS(name##R, name_str "R"), \ - MADERA_MUX(name_str " Aux 1", &name##_aux1_mux), \ - MADERA_MUX(name_str " Aux 2", &name##_aux2_mux), \ - MADERA_MUX(name_str " Aux 3", &name##_aux3_mux), \ - MADERA_MUX(name_str " Aux 4", &name##_aux4_mux), \ - MADERA_MUX(name_str " Aux 5", &name##_aux5_mux), \ - MADERA_MUX(name_str " Aux 6", &name##_aux6_mux) - -#define MADERA_MUX_ROUTES(widget, name) \ - { widget, NULL, name " Input 1" }, \ - MADERA_MIXER_INPUT_ROUTES(name " Input 1") - -#define MADERA_MIXER_ROUTES(widget, name) \ - { widget, NULL, name " Mixer" }, \ - { name " Mixer", NULL, name " Input 1" }, \ - { name " Mixer", NULL, name " Input 2" }, \ - { name " Mixer", NULL, name " Input 3" }, \ - { name " Mixer", NULL, name " Input 4" }, \ - MADERA_MIXER_INPUT_ROUTES(name " Input 1"), \ - MADERA_MIXER_INPUT_ROUTES(name " Input 2"), \ - MADERA_MIXER_INPUT_ROUTES(name " Input 3"), \ - MADERA_MIXER_INPUT_ROUTES(name " Input 4") - -#define MADERA_DSP_ROUTES(name) \ - { name, NULL, name " Preloader"}, \ - { name " Preload", NULL, name " Preloader"}, \ - { name, NULL, "SYSCLK"}, \ - { name, NULL, "DSPCLK"}, \ - { name, NULL, name " Aux 1" }, \ - { name, NULL, name " Aux 2" }, \ - { name, NULL, name " Aux 3" }, \ - { name, NULL, name " Aux 4" }, \ - { name, NULL, name " Aux 5" }, \ - { name, NULL, name " Aux 6" }, \ - MADERA_MIXER_INPUT_ROUTES(name " Aux 1"), \ - MADERA_MIXER_INPUT_ROUTES(name " Aux 2"), \ - MADERA_MIXER_INPUT_ROUTES(name " Aux 3"), \ - MADERA_MIXER_INPUT_ROUTES(name " Aux 4"), \ - MADERA_MIXER_INPUT_ROUTES(name " Aux 5"), \ - MADERA_MIXER_INPUT_ROUTES(name " Aux 6"), \ - MADERA_MIXER_ROUTES(name, name "L"), \ - MADERA_MIXER_ROUTES(name, name "R") - -#define MADERA_SAMPLE_RATE_CONTROL(name, domain) \ - SOC_ENUM(name, madera_sample_rate[(domain) - 2]) - -#define MADERA_RATE_ENUM(xname, xenum) \ -{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ - .info = snd_soc_info_enum_double, \ - .get = snd_soc_get_enum_double, .put = madera_rate_put, \ - .private_value = (unsigned long)&xenum } - -#define MADERA_EQ_CONTROL(xname, xbase) \ -{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ - .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ - .put = madera_eq_coeff_put, .private_value = \ - ((unsigned long)&(struct soc_bytes) { .base = xbase, \ - .num_regs = 20, .mask = ~MADERA_EQ1_B1_MODE }) } - -#define MADERA_LHPF_CONTROL(xname, xbase) \ -{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ - .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ - .put = madera_lhpf_coeff_put, .private_value = \ - ((unsigned long)&(struct soc_bytes) { .base = xbase, \ - .num_regs = 1 }) } - -#define MADERA_FRF_BYTES(xname, xbase, xregs) \ -{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ - .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ - .put = madera_frf_bytes_put, .private_value = \ - ((unsigned long)&(struct soc_bytes) {.base = xbase, \ - .num_regs = xregs }) } - -/* 2 mixer inputs with a stride of n in the register address */ -#define MADERA_MIXER_INPUTS_2_N(_reg, n) \ - (_reg), \ - (_reg) + (1 * (n)) - -/* 4 mixer inputs with a stride of n in the register address */ -#define MADERA_MIXER_INPUTS_4_N(_reg, n) \ - MADERA_MIXER_INPUTS_2_N(_reg, n), \ - MADERA_MIXER_INPUTS_2_N(_reg + (2 * n), n) - -#define MADERA_DSP_MIXER_INPUTS(_reg) \ - MADERA_MIXER_INPUTS_4_N(_reg, 2), \ - MADERA_MIXER_INPUTS_4_N(_reg + 8, 2), \ - MADERA_MIXER_INPUTS_4_N(_reg + 16, 8), \ - MADERA_MIXER_INPUTS_2_N(_reg + 48, 8) - -#define MADERA_RATES SNDRV_PCM_RATE_KNOT - -#define MADERA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ - SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) - -#define MADERA_OSR_ENUM_SIZE 5 -#define MADERA_SYNC_RATE_ENUM_SIZE 3 -#define MADERA_ASYNC_RATE_ENUM_SIZE 2 -#define MADERA_RATE_ENUM_SIZE \ - (MADERA_SYNC_RATE_ENUM_SIZE + MADERA_ASYNC_RATE_ENUM_SIZE) -#define MADERA_SAMPLE_RATE_ENUM_SIZE 16 -#define MADERA_DFC_TYPE_ENUM_SIZE 5 -#define MADERA_DFC_WIDTH_ENUM_SIZE 5 - -extern const struct snd_kcontrol_new madera_inmux[]; - -extern const char * const madera_rate_text[MADERA_RATE_ENUM_SIZE]; -extern const unsigned int madera_rate_val[MADERA_RATE_ENUM_SIZE]; -extern const char * const madera_sample_rate_text[MADERA_SAMPLE_RATE_ENUM_SIZE]; -extern const unsigned int madera_sample_rate_val[MADERA_SAMPLE_RATE_ENUM_SIZE]; -extern const char * const madera_dfc_width_text[MADERA_DFC_WIDTH_ENUM_SIZE]; -extern const unsigned int madera_dfc_width_val[MADERA_DFC_WIDTH_ENUM_SIZE]; -extern const char * const madera_dfc_type_text[MADERA_DFC_TYPE_ENUM_SIZE]; -extern const unsigned int madera_dfc_type_val[MADERA_DFC_TYPE_ENUM_SIZE]; - -extern const struct soc_enum madera_sample_rate[]; -extern const struct soc_enum madera_isrc_fsl[]; -extern const struct soc_enum madera_isrc_fsh[]; -extern const struct soc_enum madera_asrc1_rate[]; -extern const struct soc_enum madera_asrc2_rate[]; -extern const struct soc_enum madera_output_rate; -extern const struct soc_enum madera_input_rate[]; -extern const struct soc_enum madera_dfc_width[]; -extern const struct soc_enum madera_dfc_type[]; -extern const struct soc_enum madera_fx_rate; -extern const struct soc_enum madera_noise_gen_rate; -extern const struct soc_enum madera_spdif_rate; - -extern const struct soc_enum madera_in_vi_ramp; -extern const struct soc_enum madera_in_vd_ramp; - -extern const struct soc_enum madera_out_vi_ramp; -extern const struct soc_enum madera_out_vd_ramp; - -extern const struct soc_enum madera_lhpf1_mode; -extern const struct soc_enum madera_lhpf2_mode; -extern const struct soc_enum madera_lhpf3_mode; -extern const struct soc_enum madera_lhpf4_mode; - -extern const struct soc_enum madera_ng_hold; -extern const struct soc_enum madera_in_hpf_cut_enum; -extern const struct soc_enum madera_in_dmic_osr[]; - -extern const struct soc_enum madera_output_anc_src[]; -extern const struct soc_enum madera_anc_input_src[]; -extern const struct soc_enum madera_anc_ng_enum; -extern const struct soc_enum madera_ip_mode[]; - -extern const struct snd_kcontrol_new madera_dsp_trigger_output_mux[]; -extern const struct snd_kcontrol_new madera_drc_activity_output_mux[]; - -extern const struct snd_kcontrol_new madera_adsp_rate_controls[]; - -extern const char *madera_sample_rate_val_to_name(unsigned int rate_val); - -extern int madera_ip_mode_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - -extern int madera_in_rate_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - -extern int madera_dfc_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - -extern int madera_lp_mode_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - -extern int madera_sysclk_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event); - -extern int madera_in_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); -extern int madera_out_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); -extern int madera_hp_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); -extern int madera_anc_ev(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event); - -extern int madera_out1_demux_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - -extern int madera_put_dre(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - -extern int madera_adsp_rate_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo); -extern int madera_adsp_rate_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); -extern int madera_adsp_rate_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); -extern int madera_set_adsp_clk(struct wm_adsp *dsp, unsigned int freq); - -extern int madera_rate_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - -extern int madera_frf_bytes_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - -extern int madera_eq_coeff_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); -extern int madera_lhpf_coeff_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - -extern int madera_set_sysclk(struct snd_soc_codec *codec, int clk_id, - int source, unsigned int freq, int dir); -extern int madera_get_legacy_dspclk_setting(struct madera *madera, - unsigned int freq); - -extern int madera_cache_and_clear_sources(struct madera_priv *priv, - const unsigned int *sources, - unsigned int *cache, - int lim); - -extern int madera_restore_sources(struct madera_priv *priv, - const unsigned int *sources, - unsigned int *cache, - int lim); - -extern void madera_spin_sysclk(struct madera_priv *priv); - -extern const struct snd_soc_dai_ops madera_dai_ops; -extern const struct snd_soc_dai_ops madera_simple_dai_ops; -extern const struct snd_soc_dai_ops madera_slim_dai_ops; - -extern int madera_init_fll(struct madera *madera, int id, int base, - struct madera_fll *fll); -extern int madera_set_fll_refclk(struct madera_fll *fll, int source, - unsigned int Fref, unsigned int Fout); -extern int madera_set_fll_syncclk(struct madera_fll *fll, int source, - unsigned int Fref, unsigned int Fout); -extern int madera_set_fll_ao_refclk(struct madera_fll *fll, int source, - unsigned int fin, unsigned int fout); - -extern int madera_core_init(struct madera_priv *priv); -extern int madera_core_destroy(struct madera_priv *priv); -extern int madera_init_spk(struct snd_soc_codec *codec, int n_channels); -extern int madera_free_spk(struct snd_soc_codec *codec); -extern int madera_init_drc(struct snd_soc_codec *codec); -extern int madera_init_inputs(struct snd_soc_codec *codec, - const char * const *dmic_inputs, - int n_dmic_inputs, - const char * const *dmic_refs, - int n_dmic_refs); -extern int madera_init_outputs(struct snd_soc_codec *codec); -extern int madera_init_bus_error_irq(struct snd_soc_codec *codec, int dsp_num, - irq_handler_t handler); -extern void madera_destroy_bus_error_irq(struct snd_soc_codec *codec, - int dsp_num); - -extern int madera_init_dai(struct madera_priv *priv, int dai); - -extern int madera_set_output_mode(struct snd_soc_codec *codec, int output, - bool diff); - -/* Following functions are for use by machine drivers */ -extern int madera_set_custom_jd(struct snd_soc_codec *codec, - const struct madera_jd_state *custom_jd, - unsigned int index); - -extern int madera_enable_force_bypass(struct snd_soc_codec *codec); -extern int madera_disable_force_bypass(struct snd_soc_codec *codec); - -extern int madera_register_notifier(struct snd_soc_codec *codec, - struct notifier_block *nb); -extern int madera_unregister_notifier(struct snd_soc_codec *codec, - struct notifier_block *nb); - -extern const struct snd_soc_dai_ops madera_slim_dai_ops; -#endif diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c deleted file mode 100644 index 33093f535d5d..000000000000 --- a/sound/soc/codecs/wm_adsp.c +++ /dev/null @@ -1,5198 +0,0 @@ -/* - * wm_adsp.c -- Wolfson ADSP support - * - * Copyright 2012 Wolfson Microelectronics plc - * - * Author: Mark Brown - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "wm_adsp.h" - -/* - * Remove auto sync of RX and TX rate until implemented - */ -#define REMOVE_SYNC_SET_RATE - -#define adsp_crit(_dsp, fmt, ...) \ - dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) -#define adsp_err(_dsp, fmt, ...) \ - dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) -#define adsp_warn(_dsp, fmt, ...) \ - dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) -#define adsp_info(_dsp, fmt, ...) \ - dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) -#define adsp_dbg(_dsp, fmt, ...) \ - dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) - -/* - * Max I2C transfer size on Qcom platform, 3840 bytes (15 buffers * 256b) - */ - -#define MAX_I2C_TX_SIZE 0xf00 - -#define ADSP1_CONTROL_1 0x00 -#define ADSP1_CONTROL_2 0x02 -#define ADSP1_CONTROL_3 0x03 -#define ADSP1_CONTROL_4 0x04 -#define ADSP1_CONTROL_5 0x06 -#define ADSP1_CONTROL_6 0x07 -#define ADSP1_CONTROL_7 0x08 -#define ADSP1_CONTROL_8 0x09 -#define ADSP1_CONTROL_9 0x0A -#define ADSP1_CONTROL_10 0x0B -#define ADSP1_CONTROL_11 0x0C -#define ADSP1_CONTROL_12 0x0D -#define ADSP1_CONTROL_13 0x0F -#define ADSP1_CONTROL_14 0x10 -#define ADSP1_CONTROL_15 0x11 -#define ADSP1_CONTROL_16 0x12 -#define ADSP1_CONTROL_17 0x13 -#define ADSP1_CONTROL_18 0x14 -#define ADSP1_CONTROL_19 0x16 -#define ADSP1_CONTROL_20 0x17 -#define ADSP1_CONTROL_21 0x18 -#define ADSP1_CONTROL_22 0x1A -#define ADSP1_CONTROL_23 0x1B -#define ADSP1_CONTROL_24 0x1C -#define ADSP1_CONTROL_25 0x1E -#define ADSP1_CONTROL_26 0x20 -#define ADSP1_CONTROL_27 0x21 -#define ADSP1_CONTROL_28 0x22 -#define ADSP1_CONTROL_29 0x23 -#define ADSP1_CONTROL_30 0x24 -#define ADSP1_CONTROL_31 0x26 - -/* - * ADSP1 Control 19 - */ -#define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ -#define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ -#define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ - - -/* - * ADSP1 Control 30 - */ -#define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */ -#define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */ -#define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */ -#define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */ -#define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */ -#define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */ -#define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */ -#define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */ -#define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */ -#define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */ -#define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */ -#define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */ -#define ADSP1_START 0x0001 /* DSP1_START */ -#define ADSP1_START_MASK 0x0001 /* DSP1_START */ -#define ADSP1_START_SHIFT 0 /* DSP1_START */ -#define ADSP1_START_WIDTH 1 /* DSP1_START */ - -/* - * ADSP1 Control 31 - */ -#define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */ -#define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */ -#define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ - -#define ADSP2_CONTROL 0x0 -#define ADSP2_CLOCKING 0x1 -#define ADSP2V2_CLOCKING 0x2 -#define ADSP2_STATUS1 0x4 -#define ADSP2_WDMA_CONFIG_1 0x30 -#define ADSP2_WDMA_CONFIG_2 0x31 -#define ADSP2V2_WDMA_CONFIG_2 0x32 -#define ADSP2_RDMA_CONFIG_1 0x34 - -#define ADSP2_SCRATCH0 0x40 -#define ADSP2_SCRATCH1 0x41 -#define ADSP2_SCRATCH2 0x42 -#define ADSP2_SCRATCH3 0x43 - -#define ADSP2V2_SCRATCH0_1 0x40 -#define ADSP2V2_SCRATCH2_3 0x42 - -/* - * ADSP2 Control - */ - -#define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */ -#define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */ -#define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */ -#define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */ -#define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */ -#define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */ -#define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */ -#define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */ -#define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */ -#define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */ -#define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */ -#define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */ -#define ADSP2_START 0x0001 /* DSP1_START */ -#define ADSP2_START_MASK 0x0001 /* DSP1_START */ -#define ADSP2_START_SHIFT 0 /* DSP1_START */ -#define ADSP2_START_WIDTH 1 /* DSP1_START */ - -/* - * ADSP2 clocking - */ -#define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */ -#define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */ -#define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ - -/* - * ADSP2V2 clocking - */ -#define ADSP2V2_CLK_SEL_MASK 0x70000 /* CLK_SEL_ENA */ -#define ADSP2V2_CLK_SEL_SHIFT 16 /* CLK_SEL_ENA */ -#define ADSP2V2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ - -#define ADSP2V2_RATE_MASK 0x7800 /* DSP_RATE */ -#define ADSP2V2_RATE_SHIFT 11 /* DSP_RATE */ -#define ADSP2V2_RATE_WIDTH 4 /* DSP_RATE */ - -/* - * ADSP2 Status 1 - */ -#define ADSP2_RAM_RDY 0x0001 -#define ADSP2_RAM_RDY_MASK 0x0001 -#define ADSP2_RAM_RDY_SHIFT 0 -#define ADSP2_RAM_RDY_WIDTH 1 - -/* - * ADSP2 Lock support - */ -#define ADSP2_LOCK_CODE_0 0x5555 -#define ADSP2_LOCK_CODE_1 0xAAAA - -#define ADSP2_WATCHDOG 0x0A -#define ADSP2_BUS_ERR_ADDR 0x52 -#define ADSP2_REGION_LOCK_STATUS 0x64 -#define ADSP2_LOCK_REGION_1_LOCK_REGION_0 0x66 -#define ADSP2_LOCK_REGION_3_LOCK_REGION_2 0x68 -#define ADSP2_LOCK_REGION_5_LOCK_REGION_4 0x6A -#define ADSP2_LOCK_REGION_7_LOCK_REGION_6 0x6C -#define ADSP2_LOCK_REGION_9_LOCK_REGION_8 0x6E -#define ADSP2_LOCK_REGION_CTRL 0x7A -#define ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR 0x7C - -#define ADSP2_REGION_LOCK_ERR_MASK 0x8000 -#define ADSP2_SLAVE_ERR_MASK 0x4000 -#define ADSP2_WDT_TIMEOUT_STS_MASK 0x2000 -#define ADSP2_CTRL_ERR_PAUSE_ENA 0x0002 -#define ADSP2_CTRL_ERR_EINT 0x0001 - -#define ADSP2_BUS_ERR_ADDR_MASK 0x00FFFFFF -#define ADSP2_XMEM_ERR_ADDR_MASK 0x0000FFFF -#define ADSP2_PMEM_ERR_ADDR_MASK 0x7FFF0000 -#define ADSP2_PMEM_ERR_ADDR_SHIFT 16 -#define ADSP2_WDT_ENA_MASK 0xFFFFFFFD - -#define ADSP2_LOCK_REGION_SHIFT 16 - -#define ADSP_MAX_STD_CTRL_SIZE 512 - -#define WM_ADSP_ACKED_CTL_TIMEOUT_MS 100 -#define WM_ADSP_ACKED_CTL_N_QUICKPOLLS 10 -#define WM_ADSP_ACKED_CTL_MIN_VALUE 0 -#define WM_ADSP_ACKED_CTL_MAX_VALUE 0xFFFFFF - -/* - * Event control messages - */ -#define WM_ADSP_FW_EVENT_SHUTDOWN 0x000001 - -/* - * HALO system info - */ -#define HALO_SYS_INFO_XM_SRAM_SIZE 0x00010 -#define HALO_SYS_INFO_YM_SRAM_SIZE 0x00018 -#define HALO_SYS_INFO_XM_BANK_SIZE 0x00038 -#define HALO_SYS_INFO_YM_BANK_SIZE 0x0003c -#define HALO_AHBM_WINDOW_DEBUG_0 0x02040 -#define HALO_AHBM_WINDOW_DEBUG_1 0x02044 - -/* - * HALO core - */ -#define HALO_SAMPLE_RATE_RX1 0x00080 -#define HALO_SAMPLE_RATE_TX1 0x00280 -#define HALO_SCRATCH1 0x005c0 -#define HALO_CCM_CORE_CONTROL 0x41000 - -/* - * HALO Lock support - */ -#define HALO_MPU_UNLOCK_CODE_0 0x5555 -#define HALO_MPU_UNLOCK_CODE_1 0xaaaa - -/* - * HALO MPU banks - */ -#define HALO_MPU_XMEM_ACCESS_0 0x43000 -#define HALO_MPU_YMEM_ACCESS_0 0x43004 -#define HALO_MPU_WINDOW_ACCESS_0 0x43008 -#define HALO_MPU_XREG_ACCESS_0 0x4300C -#define HALO_MPU_YREG_ACCESS_0 0x43014 -#define HALO_MPU_XMEM_ACCESS_1 0x43018 -#define HALO_MPU_YMEM_ACCESS_1 0x4301C -#define HALO_MPU_WINDOW_ACCESS_1 0x43020 -#define HALO_MPU_XREG_ACCESS_1 0x43024 -#define HALO_MPU_YREG_ACCESS_1 0x4302C -#define HALO_MPU_XMEM_ACCESS_2 0x43030 -#define HALO_MPU_YMEM_ACCESS_2 0x43034 -#define HALO_MPU_WINDOW_ACCESS_2 0x43038 -#define HALO_MPU_XREG_ACCESS_2 0x4303C -#define HALO_MPU_YREG_ACCESS_2 0x43044 -#define HALO_MPU_XMEM_ACCESS_3 0x43048 -#define HALO_MPU_YMEM_ACCESS_3 0x4304C -#define HALO_MPU_WINDOW_ACCESS_3 0x43050 -#define HALO_MPU_XREG_ACCESS_3 0x43054 -#define HALO_MPU_YREG_ACCESS_3 0x4305C -#define HALO_MPU_XM_VIO_ADDR 0x43100 -#define HALO_MPU_XM_VIO_STATUS 0x43104 -#define HALO_MPU_YM_VIO_ADDR 0x43108 -#define HALO_MPU_YM_VIO_STATUS 0x4310C -#define HALO_MPU_PM_VIO_ADDR 0x43110 -#define HALO_MPU_PM_VIO_STATUS 0x43114 -#define HALO_MPU_LOCK_CONFIG 0x43140 - -/* - * HALO stream arb - */ -#define HALO_STREAM_ARB_MSTR0_CONFIG_0 0x45000 -#define HALO_STREAM_ARB_MSTR0_CONFIG_1 0x45004 -#define HALO_STREAM_ARB_MSTR0_CONFIG_2 0x45008 -#define HALO_STREAM_ARB_MSTR1_CONFIG_0 0x45010 -#define HALO_STREAM_ARB_MSTR1_CONFIG_1 0x45014 -#define HALO_STREAM_ARB_MSTR1_CONFIG_2 0x45018 -#define HALO_STREAM_ARB_MSTR2_CONFIG_0 0x45020 -#define HALO_STREAM_ARB_MSTR2_CONFIG_1 0x45024 -#define HALO_STREAM_ARB_MSTR2_CONFIG_2 0x45028 -#define HALO_STREAM_ARB_MSTR3_CONFIG_0 0x45030 -#define HALO_STREAM_ARB_MSTR3_CONFIG_1 0x45034 -#define HALO_STREAM_ARB_MSTR3_CONFIG_2 0x45038 -#define HALO_STREAM_ARB_MSTR4_CONFIG_0 0x45040 -#define HALO_STREAM_ARB_MSTR4_CONFIG_1 0x45044 -#define HALO_STREAM_ARB_MSTR4_CONFIG_2 0x45048 -#define HALO_STREAM_ARB_MSTR5_CONFIG_0 0x45050 -#define HALO_STREAM_ARB_MSTR5_CONFIG_1 0x45054 -#define HALO_STREAM_ARB_MSTR5_CONFIG_2 0x45058 - -#define HALO_STREAM_ARB_TX1_CONFIG_0 0x45200 -#define HALO_STREAM_ARB_TX1_CONFIG_1 0x45204 -#define HALO_STREAM_ARB_TX2_CONFIG_0 0x45208 -#define HALO_STREAM_ARB_TX2_CONFIG_1 0x4520C -#define HALO_STREAM_ARB_TX3_CONFIG_0 0x45210 -#define HALO_STREAM_ARB_TX3_CONFIG_1 0x45214 -#define HALO_STREAM_ARB_TX4_CONFIG_0 0x45218 -#define HALO_STREAM_ARB_TX4_CONFIG_1 0x4521C -#define HALO_STREAM_ARB_TX5_CONFIG_0 0x45220 -#define HALO_STREAM_ARB_TX5_CONFIG_1 0x45224 -#define HALO_STREAM_ARB_TX6_CONFIG_0 0x45228 -#define HALO_STREAM_ARB_TX6_CONFIG_1 0x4522C -#define HALO_STREAM_ARB_TX7_CONFIG_0 0x45230 -#define HALO_STREAM_ARB_TX7_CONFIG_1 0x45234 -#define HALO_STREAM_ARB_TX8_CONFIG_0 0x45238 -#define HALO_STREAM_ARB_TX8_CONFIG_1 0x4523C -#define HALO_STREAM_ARB_RX1_CONFIG_0 0x45400 -#define HALO_STREAM_ARB_RX1_CONFIG_1 0x45404 -#define HALO_STREAM_ARB_RX2_CONFIG_0 0x45408 -#define HALO_STREAM_ARB_RX2_CONFIG_1 0x4540C -#define HALO_STREAM_ARB_RX3_CONFIG_0 0x45410 -#define HALO_STREAM_ARB_RX3_CONFIG_1 0x45414 -#define HALO_STREAM_ARB_RX4_CONFIG_0 0x45418 -#define HALO_STREAM_ARB_RX4_CONFIG_1 0x4541C -#define HALO_STREAM_ARB_RX5_CONFIG_0 0x45420 -#define HALO_STREAM_ARB_RX5_CONFIG_1 0x45424 -#define HALO_STREAM_ARB_RX6_CONFIG_0 0x45428 -#define HALO_STREAM_ARB_RX6_CONFIG_1 0x4542C -#define HALO_STREAM_ARB_RX7_CONFIG_0 0x45430 -#define HALO_STREAM_ARB_RX7_CONFIG_1 0x45434 -#define HALO_STREAM_ARB_RX8_CONFIG_0 0x45438 -#define HALO_STREAM_ARB_RX8_CONFIG_1 0x4543C - -#define HALO_STREAM_ARB_IRQ0_CONFIG_0 0x45600 -#define HALO_STREAM_ARB_IRQ0_CONFIG_1 0x45604 -#define HALO_STREAM_ARB_IRQ0_CONFIG_2 0x45608 -#define HALO_STREAM_ARB_IRQ1_CONFIG_0 0x45610 -#define HALO_STREAM_ARB_IRQ1_CONFIG_1 0x45614 -#define HALO_STREAM_ARB_IRQ1_CONFIG_2 0x45618 -#define HALO_STREAM_ARB_IRQ2_CONFIG_0 0x45620 -#define HALO_STREAM_ARB_IRQ2_CONFIG_1 0x45624 -#define HALO_STREAM_ARB_IRQ2_CONFIG_2 0x45628 -#define HALO_STREAM_ARB_IRQ3_CONFIG_0 0x45630 -#define HALO_STREAM_ARB_IRQ3_CONFIG_1 0x45634 -#define HALO_STREAM_ARB_IRQ3_CONFIG_2 0x45638 -#define HALO_STREAM_ARB_IRQ4_CONFIG_0 0x45640 -#define HALO_STREAM_ARB_IRQ4_CONFIG_1 0x45644 -#define HALO_STREAM_ARB_IRQ4_CONFIG_2 0x45648 -#define HALO_STREAM_ARB_IRQ5_CONFIG_0 0x45650 -#define HALO_STREAM_ARB_IRQ5_CONFIG_1 0x45654 -#define HALO_STREAM_ARB_IRQ5_CONFIG_2 0x45658 -#define HALO_STREAM_ARB_IRQ6_CONFIG_0 0x45660 -#define HALO_STREAM_ARB_IRQ6_CONFIG_1 0x45664 -#define HALO_STREAM_ARB_IRQ6_CONFIG_2 0x45668 -#define HALO_STREAM_ARB_IRQ7_CONFIG_0 0x45670 -#define HALO_STREAM_ARB_IRQ7_CONFIG_1 0x45674 -#define HALO_STREAM_ARB_IRQ7_CONFIG_2 0x45678 - -#define HALO_INTP_CTL_NMI_CONTROL 0x46008 - -/* - * HALO_AHBM_WINDOW_DEBUG_1 - */ -#define HALO_AHBM_CORE_ERR_ADDR_MASK 0x0fffff00 -#define HALO_AHBM_CORE_ERR_ADDR_SHIFT 8 -#define HALO_AHBM_ADDR_ERR_MASK 0x00000080 -#define HALO_AHBM_LOCKED_ERR_MASK 0x00000040 -#define HALO_AHBM_SIZE_ERR_MASK 0x00000020 -#define HALO_AHBM_MODE_ERR_MASK 0x00000010 -#define HALO_AHBM_AHB_ERR_MASK 0x00000001 - -/* - * HALO_SAMPLE_RATE_[RX|TX]n - */ -#define HALO_DSP_RATE_SHIFT 0 -#define HALO_DSP_RATE_MASK 0x1f - -/* - * HALO_CCM_CORE_CONTROL - */ -#define HALO_CORE_EN 0x00000001 -#define HALO_CORE_EN_MASK 0x00000001 -#define HALO_CORE_EN_SHIFT 0 -#define HALO_CORE_EN_WIDTH 1 -#define HALO_CORE_RESET 0x00000200 - -/* - * HALO_MPU_?M_VIO_STATUS - */ -#define HALO_MPU_VIO_STS_MASK 0x007e0000 -#define HALO_MPU_VIO_STS_SHIFT 17 -#define HALO_MPU_VIO_ERR_MASK 0x00010000 -#define HALO_MPU_VIO_ERR_SHIFT 16 -#define HALO_MPU_VIO_ERR_WR_MASK 0x00008000 -#define HALO_MPU_VIO_ERR_WR_SHIFT 15 -#define HALO_MPU_VIO_ERR_SRC_MASK 0x00007fff -#define HALO_MPU_VIO_ERR_SRC_SHIFT 0 - -#define HALO_MPU_VIO_SRAM 0x01 -#define HALO_MPU_VIO_REG 0x02 -#define HALO_MPU_VIO_AHB 0x04 -#define HALO_MPU_VIO_EREG 0x08 -#define HALO_MPU_VIO_EXTERNAL_MEM 0x10 -#define HALO_MPU_VIO_NON_EXIST 0x20 - -/* - * HALO_STREAM_ARB_MSTRn_CONFIG_0 - */ -#define HALO_STREAM_ARB_MSTR_EN_MASK 0x1 - -/* - * HALO_STREAM_ARB_[TX|RX]n_CONFIG_0 - * HALO_STREAM_ARB_IRQn_CONFIG_0 - */ -#define HALO_STREAM_ARB_MSTR_SEL_DEFAULT 0xfc - -static const unsigned int halo_mpu_access[18] = { - HALO_MPU_WINDOW_ACCESS_0, - HALO_MPU_XREG_ACCESS_0, - HALO_MPU_YREG_ACCESS_0, - HALO_MPU_XMEM_ACCESS_1, - HALO_MPU_YMEM_ACCESS_1, - HALO_MPU_WINDOW_ACCESS_1, - HALO_MPU_XREG_ACCESS_1, - HALO_MPU_YREG_ACCESS_1, - HALO_MPU_XMEM_ACCESS_2, - HALO_MPU_YMEM_ACCESS_2, - HALO_MPU_WINDOW_ACCESS_2, - HALO_MPU_XREG_ACCESS_2, - HALO_MPU_YREG_ACCESS_2, - HALO_MPU_XMEM_ACCESS_3, - HALO_MPU_YMEM_ACCESS_3, - HALO_MPU_WINDOW_ACCESS_3, - HALO_MPU_XREG_ACCESS_3, - HALO_MPU_YREG_ACCESS_3, -}; - -struct wm_adsp_buf { - struct list_head list; - void *buf; - size_t len; -}; - -static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len, - struct list_head *list) -{ - struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL); - - if (buf == NULL) - return NULL; - if (src != NULL) - buf->buf = kmemdup(src, len, GFP_KERNEL | GFP_DMA); - else - buf->buf = kzalloc(len, GFP_KERNEL | GFP_DMA); - if (!buf->buf) { - kfree(buf); - return NULL; - } - buf->len = len; - if (list) - list_add_tail(&buf->list, list); - - return buf; -} - -static void wm_adsp_buf_free(struct list_head *list) -{ - while (!list_empty(list)) { - struct wm_adsp_buf *buf = list_first_entry(list, - struct wm_adsp_buf, - list); - list_del(&buf->list); - kfree(buf->buf); - kfree(buf); - } -} - -static void wm_adsp_buf_flash(struct list_head *list, void *dest) -{ - int offset = 0; - - while (!list_empty(list)) { - struct wm_adsp_buf *buf = list_first_entry(list, - struct wm_adsp_buf, - list); - memcpy(dest + offset, buf->buf, buf->len); - offset += buf->len; - list_del(&buf->list); - kfree(buf->buf); - kfree(buf); - } -} - -#define WM_ADSP_FW_MBC_VSS 0 -#define WM_ADSP_FW_HIFI 1 -#define WM_ADSP_FW_TX 2 -#define WM_ADSP_FW_TX_SPK 3 -#define WM_ADSP_FW_RX 4 -#define WM_ADSP_FW_RX_ANC 5 -#define WM_ADSP_FW_CTRL 6 -#define WM_ADSP_FW_ASR 7 -#define WM_ADSP_FW_TRACE 8 -#define WM_ADSP_FW_SPK_PROT 9 -#define WM_ADSP_FW_MISC 10 -#define WM_ADSP_FW_AOU 11 -#define WM_ADSP_FW_AOU_CONCURR 12 - -#define WM_ADSP_NUM_FW 13 - -static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { - [WM_ADSP_FW_MBC_VSS] = "MBC/VSS", - [WM_ADSP_FW_HIFI] = "MasterHiFi", - [WM_ADSP_FW_TX] = "Tx", - [WM_ADSP_FW_TX_SPK] = "Tx Speaker", - [WM_ADSP_FW_RX] = "Rx", - [WM_ADSP_FW_RX_ANC] = "Rx ANC", - [WM_ADSP_FW_CTRL] = "Voice Ctrl", - [WM_ADSP_FW_ASR] = "ASR Assist", - [WM_ADSP_FW_TRACE] = "Dbg Trace", - [WM_ADSP_FW_SPK_PROT] = "Protection", - [WM_ADSP_FW_MISC] = "Misc", - [WM_ADSP_FW_AOU] = "AOU Without Audio", - [WM_ADSP_FW_AOU_CONCURR] = "AOU With Audio", -}; - -struct wm_adsp_system_config_xm_hdr { - __be32 sys_enable; - __be32 fw_id; - __be32 fw_rev; - __be32 boot_status; - __be32 watchdog; - __be32 dma_buffer_size; - __be32 rdma[6]; - __be32 wdma[8]; - __be32 build_job_name[3]; - __be32 build_job_number; -}; - -struct wm_halo_system_config_xm_hdr { - __be32 halo_heartbeat; - __be32 build_job_name[3]; - __be32 build_job_number; -}; - -struct wm_adsp_alg_xm_struct { - __be32 magic; - __be32 smoothing; - __be32 threshold; - __be32 host_buf_ptr; - __be32 start_seq; - __be32 high_water_mark; - __be32 low_water_mark; - __be64 smoothed_power; -}; - -struct wm_adsp_buffer { - __be32 X_buf_base; /* XM base addr of first X area */ - __be32 X_buf_size; /* Size of 1st X area in words */ - __be32 X_buf_base2; /* XM base addr of 2nd X area */ - __be32 X_buf_brk; /* Total X size in words */ - __be32 Y_buf_base; /* YM base addr of Y area */ - __be32 wrap; /* Total size X and Y in words */ - __be32 high_water_mark; /* Point at which IRQ is asserted */ - __be32 irq_count; /* bits 1-31 count IRQ assertions */ - __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */ - __be32 next_write_index; /* word index of next write */ - __be32 next_read_index; /* word index of next read */ - __be32 error; /* error if any */ - __be32 oldest_block_index; /* word index of oldest surviving */ - __be32 requested_rewind; /* how many blocks rewind was done */ - __be32 reserved_space; /* internal */ - __be32 min_free; /* min free space since stream start */ - __be32 blocks_written[2]; /* total blocks written (64 bit) */ - __be32 words_written[2]; /* total words written (64 bit) */ -}; - -struct wm_adsp_compr; - -struct wm_adsp_compr_buf { - struct wm_adsp *dsp; - struct wm_adsp_compr *compr; - - struct wm_adsp_buffer_region *regions; - u32 host_buf_ptr; - - u32 error; - u32 irq_count; - int read_index; - int avail; - int num; -}; - -#define WM_ADSP_DATA_WORD_SIZE 3 - -#define WM_ADSP_MIN_FRAGMENTS 1 -#define WM_ADSP_MAX_FRAGMENTS 256 -#define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE) -#define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE) - -#define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7 -#define WM_ADSP_ALG_XM2_STRUCT_MAGIC 0x2e07b0 - -#define HOST_BUFFER_FIELD(field) \ - (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32)) - -#define ALG_XM_FIELD(field) \ - (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32)) - -static int wm_adsp_buffer_init(struct wm_adsp *dsp); -static int wm_adsp_buffer_free(struct wm_adsp *dsp); - -struct wm_adsp_buffer_region { - unsigned int offset; - unsigned int cumulative_size; - unsigned int mem_type; - unsigned int base_addr; -}; - -static struct wm_adsp_buffer_region_def default_regions[] = { - { - .mem_type = WMFW_ADSP2_XM, - .base_offset = HOST_BUFFER_FIELD(X_buf_base), - .size_offset = HOST_BUFFER_FIELD(X_buf_size), - }, - { - .mem_type = WMFW_ADSP2_XM, - .base_offset = HOST_BUFFER_FIELD(X_buf_base2), - .size_offset = HOST_BUFFER_FIELD(X_buf_brk), - }, - { - .mem_type = WMFW_ADSP2_YM, - .base_offset = HOST_BUFFER_FIELD(Y_buf_base), - .size_offset = HOST_BUFFER_FIELD(wrap), - }, -}; - -static struct wm_adsp_fw_caps ctrl_caps[] = { - { - .id = SND_AUDIOCODEC_BESPOKE, - .desc = { - .max_ch = 1, - .sample_rates = { 16000 }, - .num_sample_rates = 1, - .formats = SNDRV_PCM_FMTBIT_S16_LE, - }, - .num_regions = ARRAY_SIZE(default_regions), - .region_defs = default_regions, - }, -}; - -static struct wm_adsp_fw_caps trace_caps[] = { - { - .id = SND_AUDIOCODEC_BESPOKE, - .desc = { - .max_ch = 8, - .sample_rates = { - 4000, 8000, 11025, 12000, 16000, 22050, - 24000, 32000, 44100, 48000, 64000, 88200, - 96000, 176400, 192000 - }, - .num_sample_rates = 15, - .formats = SNDRV_PCM_FMTBIT_S16_LE, - }, - .num_regions = ARRAY_SIZE(default_regions), - .region_defs = default_regions, - }, -}; - -static struct wm_adsp_fw_defs wm_adsp_fw[WM_ADSP_NUM_FW] = { - [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" }, - [WM_ADSP_FW_HIFI] = { .file = "hifi" }, - [WM_ADSP_FW_TX] = { .file = "tx" }, - [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" }, - [WM_ADSP_FW_RX] = { .file = "rx" }, - [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" }, - [WM_ADSP_FW_CTRL] = { - .file = "ctrl", - .compr_direction = SND_COMPRESS_CAPTURE, - .num_caps = ARRAY_SIZE(ctrl_caps), - .caps = ctrl_caps, - .voice_trigger = true, - }, - [WM_ADSP_FW_ASR] = { .file = "asr" }, - [WM_ADSP_FW_TRACE] = { - .file = "trace", - .compr_direction = SND_COMPRESS_CAPTURE, - .num_caps = ARRAY_SIZE(trace_caps), - .caps = trace_caps, - }, - [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" }, - [WM_ADSP_FW_MISC] = { .file = "misc" }, - [WM_ADSP_FW_AOU] = { - .file = "ultrasound", - .compr_direction = SND_COMPRESS_CAPTURE, - .num_caps = ARRAY_SIZE(trace_caps), - .caps = trace_caps, - }, - [WM_ADSP_FW_AOU_CONCURR] = { - .file = "concurrent", - .compr_direction = SND_COMPRESS_CAPTURE, - .num_caps = ARRAY_SIZE(trace_caps), - .caps = trace_caps, - }, -}; - -struct wm_coeff_ctl_ops { - int (*xget)(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - int (*xput)(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); -}; - -struct wm_coeff_ctl { - const char *name; - const char *fw_name; - struct wm_adsp_alg_region alg_region; - struct wm_coeff_ctl_ops ops; - struct wm_adsp *dsp; - unsigned int enabled:1; - struct list_head list; - void *cache; - unsigned int offset; - size_t len; - unsigned int set:1; - struct soc_bytes_ext bytes_ext; - unsigned int flags; - unsigned int type; -}; - -static const char *wm_adsp_mem_region_name(unsigned int type) -{ - switch (type) { - case WMFW_ADSP1_PM: - return "PM"; - case WMFW_HALO_PM_PACKED: - return "PM_PACKED"; - case WMFW_ADSP1_DM: - return "DM"; - case WMFW_ADSP2_XM: - return "XM"; - case WMFW_HALO_XM_PACKED: - return "XM_PACKED"; - case WMFW_ADSP2_YM: - return "YM"; - case WMFW_HALO_YM_PACKED: - return "YM_PACKED"; - case WMFW_ADSP1_ZM: - return "ZM"; - default: - return NULL; - } -} - -#ifdef CONFIG_DEBUG_FS -static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s) -{ - char *tmp = kasprintf(GFP_KERNEL, "%s\n", s); - - kfree(dsp->wmfw_file_name); - dsp->wmfw_file_name = tmp; -} - -static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s) -{ - char *tmp = kasprintf(GFP_KERNEL, "%s\n", s); - - kfree(dsp->bin_file_name); - dsp->bin_file_name = tmp; -} - -static void wm_adsp_debugfs_clear(struct wm_adsp *dsp) -{ - kfree(dsp->wmfw_file_name); - kfree(dsp->bin_file_name); - dsp->wmfw_file_name = NULL; - dsp->bin_file_name = NULL; -} - -static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct wm_adsp *dsp = file->private_data; - ssize_t ret; - - mutex_lock(&dsp->pwr_lock); - - if (!dsp->wmfw_file_name || !dsp->booted) - ret = 0; - else - ret = simple_read_from_buffer(user_buf, count, ppos, - dsp->wmfw_file_name, - strlen(dsp->wmfw_file_name)); - - mutex_unlock(&dsp->pwr_lock); - return ret; -} - -static ssize_t wm_adsp_debugfs_bin_read(struct file *file, - char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct wm_adsp *dsp = file->private_data; - ssize_t ret; - - mutex_lock(&dsp->pwr_lock); - - if (!dsp->bin_file_name || !dsp->booted) - ret = 0; - else - ret = simple_read_from_buffer(user_buf, count, ppos, - dsp->bin_file_name, - strlen(dsp->bin_file_name)); - - mutex_unlock(&dsp->pwr_lock); - return ret; -} - -static const struct { - const char *name; - const struct file_operations fops; -} wm_adsp_debugfs_fops[] = { - { - .name = "wmfw_file_name", - .fops = { - .open = simple_open, - .read = wm_adsp_debugfs_wmfw_read, - }, - }, - { - .name = "bin_file_name", - .fops = { - .open = simple_open, - .read = wm_adsp_debugfs_bin_read, - }, - }, -}; - -static void wm_adsp2_init_debugfs(struct wm_adsp *dsp, - struct snd_soc_codec *codec) -{ - struct dentry *root = NULL; - char *root_name; - int i; - - if (!codec->component.debugfs_root) { - adsp_err(dsp, "No codec debugfs root\n"); - goto err; - } - - root_name = kmalloc(PAGE_SIZE, GFP_KERNEL); - if (!root_name) - goto err; - - snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num); - root = debugfs_create_dir(root_name, codec->component.debugfs_root); - kfree(root_name); - - if (!root) - goto err; - - if (!debugfs_create_bool("booted", S_IRUGO, root, &dsp->booted)) - goto err; - - if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running)) - goto err; - - if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id)) - goto err; - - if (!debugfs_create_x32("fw_version", S_IRUGO, root, - &dsp->fw_id_version)) - goto err; - - for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) { - if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name, - S_IRUGO, root, dsp, - &wm_adsp_debugfs_fops[i].fops)) - goto err; - } - - dsp->debugfs_root = root; - return; - -err: - debugfs_remove_recursive(root); - adsp_err(dsp, "Failed to create debugfs\n"); -} - -static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp) -{ - wm_adsp_debugfs_clear(dsp); - debugfs_remove_recursive(dsp->debugfs_root); -} -#else -static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp, - struct snd_soc_codec *codec) -{ -} - -static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp) -{ -} - -static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, - const char *s) -{ -} - -static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, - const char *s) -{ -} - -static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp) -{ -} -#endif - -static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec); - - ucontrol->value.enumerated.item[0] = dsp[e->shift_l].fw; - - return 0; -} - -static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; - struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec); - int ret = 0; - - if (ucontrol->value.enumerated.item[0] == dsp[e->shift_l].fw) - return 0; - - if (ucontrol->value.enumerated.item[0] >= WM_ADSP_NUM_FW) { - adsp_dbg(dsp, "Firmware error 1\n"); - return -EINVAL; - } - - mutex_lock(&dsp[e->shift_l].pwr_lock); - - if (dsp[e->shift_l].booted || dsp[e->shift_l].compr[0]) - ret = -EBUSY; - else - dsp[e->shift_l].fw = ucontrol->value.enumerated.item[0]; - - mutex_unlock(&dsp[e->shift_l].pwr_lock); - - return ret; -} - -static struct soc_enum wm_adsp_fw_enum[] = { - SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), - SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), - SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), - SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), - SOC_ENUM_SINGLE(0, 4, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), - SOC_ENUM_SINGLE(0, 5, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), - SOC_ENUM_SINGLE(0, 6, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), -}; - -const struct snd_kcontrol_new wm_adsp_fw_controls[] = { - SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP5 Firmware", wm_adsp_fw_enum[4], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP6 Firmware", wm_adsp_fw_enum[5], - wm_adsp_fw_get, wm_adsp_fw_put), - SOC_ENUM_EXT("DSP7 Firmware", wm_adsp_fw_enum[6], - wm_adsp_fw_get, wm_adsp_fw_put), -}; -EXPORT_SYMBOL_GPL(wm_adsp_fw_controls); - -static const struct snd_kcontrol_new wm_adsp_ao_fw_controls[] = { - SOC_ENUM_EXT("DSP1AO Firmware", wm_adsp_fw_enum[0], - wm_adsp_fw_get, wm_adsp_fw_put), -}; - -static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp, - int type) -{ - int i; - - for (i = 0; i < dsp->num_mems; i++) - if (dsp->mem[i].type == type) - return &dsp->mem[i]; - - return NULL; -} - -static unsigned int wm_adsp_region_to_reg(struct wm_adsp *dsp, - struct wm_adsp_region const *mem, - unsigned int offset) -{ - if (WARN_ON(!mem)) - return offset; - switch (dsp->type) { - case WMFW_ADSP1: - case WMFW_ADSP2: - switch (mem->type) { - case WMFW_ADSP1_PM: - return mem->base + (offset * 3); - case WMFW_ADSP1_DM: - return mem->base + (offset * 2); - case WMFW_ADSP2_XM: - return mem->base + (offset * 2); - case WMFW_ADSP2_YM: - return mem->base + (offset * 2); - case WMFW_ADSP1_ZM: - return mem->base + (offset * 2); - default: - WARN(1, "Unknown memory region type"); - return offset; - } - case WMFW_HALO: - switch (mem->type) { - case WMFW_ADSP2_XM: - return mem->base + (offset * 4); - case WMFW_ADSP2_YM: - return mem->base + (offset * 4); - case WMFW_HALO_XM_PACKED: - return (mem->base + (offset * 3)) & ~0x3; - case WMFW_HALO_YM_PACKED: - return (mem->base + (offset * 3)) & ~0x3; - case WMFW_HALO_PM_PACKED: - return mem->base + (offset * 5); - default: - WARN(1, "Unknown memory region type"); - return offset; - } - default: - WARN(1, "Unknown DSP type"); - return offset; - } -} - -static void wm_adsp2_show_fw_status(struct wm_adsp *dsp) -{ - u16 scratch[4]; - int ret; - - ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0, - scratch, sizeof(scratch)); - if (ret) { - adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret); - return; - } - - adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", - be16_to_cpu(scratch[0]), - be16_to_cpu(scratch[1]), - be16_to_cpu(scratch[2]), - be16_to_cpu(scratch[3])); -} - -static void wm_adsp2v2_show_fw_status(struct wm_adsp *dsp) -{ - u32 scratch[2]; - int ret; - - ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2V2_SCRATCH0_1, - scratch, sizeof(scratch)); - - if (ret) { - adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret); - return; - } - - scratch[0] = be32_to_cpu(scratch[0]); - scratch[1] = be32_to_cpu(scratch[1]); - - adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", - scratch[0] & 0xFFFF, - scratch[0] >> 16, - scratch[1] & 0xFFFF, - scratch[1] >> 16); -} - -static void wm_halo_show_fw_status(struct wm_adsp *dsp) -{ - u32 scratch[4]; - int ret; - - ret = regmap_raw_read(dsp->regmap, dsp->base + HALO_SCRATCH1, - scratch, sizeof(scratch)); - if (ret) { - adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret); - return; - } - - adsp_dbg(dsp, "FW SCRATCH 1:0x%x 2:0x%x 3:0x%x 4:0x%x\n", - be32_to_cpu(scratch[0]), - be32_to_cpu(scratch[1]), - be32_to_cpu(scratch[2]), - be32_to_cpu(scratch[3])); -} - -static inline struct wm_coeff_ctl *bytes_ext_to_ctl(struct soc_bytes_ext *ext) -{ - return container_of(ext, struct wm_coeff_ctl, bytes_ext); -} - -static int wm_coeff_base_reg(struct wm_coeff_ctl *ctl, unsigned int *reg) -{ - const struct wm_adsp_alg_region *alg_region = &ctl->alg_region; - struct wm_adsp *dsp = ctl->dsp; - const struct wm_adsp_region *mem; - - mem = wm_adsp_find_region(dsp, alg_region->type); - if (!mem) { - adsp_err(dsp, "No base for region %x\n", - alg_region->type); - return -EINVAL; - } - - *reg = wm_adsp_region_to_reg(dsp, mem, - ctl->alg_region.base + ctl->offset); - - return 0; -} - -static int wm_coeff_info(struct snd_kcontrol *kctl, - struct snd_ctl_elem_info *uinfo) -{ - struct soc_bytes_ext *bytes_ext = - (struct soc_bytes_ext *)kctl->private_value; - struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext); - - switch (ctl->type) { - case WMFW_CTL_TYPE_ACKED: - uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->value.integer.min = WM_ADSP_ACKED_CTL_MIN_VALUE; - uinfo->value.integer.max = WM_ADSP_ACKED_CTL_MAX_VALUE; - uinfo->value.integer.step = 1; - uinfo->count = 1; - break; - default: - uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; - uinfo->count = ctl->len; - break; - } - - return 0; -} - -static int wm_coeff_write_acked_control(struct wm_coeff_ctl *ctl, - unsigned int event_id) -{ - struct wm_adsp *dsp = ctl->dsp; - u32 val = cpu_to_be32(event_id); - unsigned int reg; - int i, ret; - - ret = wm_coeff_base_reg(ctl, ®); - if (ret) - return ret; - - adsp_dbg(dsp, "Sending 0x%x to acked control alg 0x%x %s:0x%x\n", - event_id, ctl->alg_region.alg, - wm_adsp_mem_region_name(ctl->alg_region.type), ctl->offset); - - ret = regmap_raw_write(dsp->regmap, reg, &val, sizeof(val)); - if (ret) { - adsp_err(dsp, "Failed to write %x: %d\n", reg, ret); - return ret; - } - - /* - * Poll for ack, we initially poll at ~1ms intervals for firmwares - * that respond quickly, then go to ~10ms polls. A firmware is unlikely - * to ack instantly so we do the first 1ms delay before reading the - * control to avoid a pointless bus transaction - */ - for (i = 0; i < WM_ADSP_ACKED_CTL_TIMEOUT_MS;) { - switch (i) { - case 0 ... WM_ADSP_ACKED_CTL_N_QUICKPOLLS - 1: - usleep_range(1000, 2000); - i++; - break; - default: - usleep_range(10000, 20000); - i += 10; - break; - } - - ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val)); - if (ret) { - adsp_err(dsp, "Failed to read %x: %d\n", reg, ret); - return ret; - } - - if (val == 0) { - adsp_dbg(dsp, "Acked control ACKED at poll %u\n", i); - return 0; - } - } - - adsp_warn(dsp, "Acked control @0x%x alg:0x%x %s:0x%x timed out\n", - reg, ctl->alg_region.alg, - wm_adsp_mem_region_name(ctl->alg_region.type), - ctl->offset); - - return -ETIMEDOUT; -} - -static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, - const void *buf, size_t len) -{ - struct wm_adsp *dsp = ctl->dsp; - void *scratch; - int ret; - unsigned int reg; - - ret = wm_coeff_base_reg(ctl, ®); - if (ret) - return ret; - - scratch = kmemdup(buf, len, GFP_KERNEL | GFP_DMA); - if (!scratch) - return -ENOMEM; - - ret = regmap_raw_write(dsp->regmap, reg, scratch, - len); - if (ret) { - adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n", - len, reg, ret); - kfree(scratch); - return ret; - } - adsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg); - - kfree(scratch); - - return 0; -} - -static int wm_coeff_put(struct snd_kcontrol *kctl, - struct snd_ctl_elem_value *ucontrol) -{ - struct soc_bytes_ext *bytes_ext = - (struct soc_bytes_ext *)kctl->private_value; - struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext); - char *p = ucontrol->value.bytes.data; - int ret = 0; - - mutex_lock(&ctl->dsp->pwr_lock); - - if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) - ret = -EPERM; - else - memcpy(ctl->cache, p, ctl->len); - - ctl->set = 1; - if (ctl->enabled && ctl->dsp->running) - ret = wm_coeff_write_control(ctl, p, ctl->len); - - mutex_unlock(&ctl->dsp->pwr_lock); - - return ret; -} - -static int wm_coeff_tlv_put(struct snd_kcontrol *kctl, - const unsigned int __user *bytes, unsigned int size) -{ - struct soc_bytes_ext *bytes_ext = - (struct soc_bytes_ext *)kctl->private_value; - struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext); - int ret = 0; - - mutex_lock(&ctl->dsp->pwr_lock); - - if (copy_from_user(ctl->cache, bytes, size)) { - ret = -EFAULT; - } else { - ctl->set = 1; - if (ctl->enabled && ctl->dsp->running) - ret = wm_coeff_write_control(ctl, ctl->cache, size); - else if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) - ret = -EPERM; - } - - mutex_unlock(&ctl->dsp->pwr_lock); - - return ret; -} - -static int wm_coeff_put_acked(struct snd_kcontrol *kctl, - struct snd_ctl_elem_value *ucontrol) -{ - struct soc_bytes_ext *bytes_ext = - (struct soc_bytes_ext *)kctl->private_value; - struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext); - unsigned int val = ucontrol->value.integer.value[0]; - int ret; - - if (val == 0) - return 0; /* 0 means no event */ - - mutex_lock(&ctl->dsp->pwr_lock); - - if (ctl->enabled && ctl->dsp->running) - ret = wm_coeff_write_acked_control(ctl, val); - else - ret = -EPERM; - - mutex_unlock(&ctl->dsp->pwr_lock); - - return ret; -} - -static int wm_coeff_read_control(struct wm_coeff_ctl *ctl, - void *buf, size_t len) -{ - LIST_HEAD(buf_list); - struct wm_adsp *dsp = ctl->dsp; - struct wm_adsp_buf *scratch; - int ret; - unsigned int reg; - int read_len = 0; - size_t toread_len; - unsigned int addr_div; - - switch (dsp->type) { - case WMFW_ADSP1: - case WMFW_ADSP2: - addr_div = 2; - break; - default: - addr_div = 1; - break; - } - - ret = wm_coeff_base_reg(ctl, ®); - if (ret) - return ret; - - while ((len - read_len) > 0) { - toread_len = (len - read_len) > MAX_I2C_TX_SIZE ? - MAX_I2C_TX_SIZE : (len - read_len); - - scratch = wm_adsp_buf_alloc(NULL, toread_len, &buf_list); - if (!scratch) { - adsp_err(dsp, "Out of memory\n"); - wm_adsp_buf_free(&buf_list); - return -ENOMEM; - } - - regmap_raw_read(dsp->regmap, reg + read_len / addr_div, - scratch->buf, toread_len); - if (ret) { - adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n", - toread_len, - reg + read_len / addr_div, ret); - wm_adsp_buf_free(&buf_list); - return ret; - } - adsp_dbg(dsp, "Read %zu bytes from %x\n", toread_len, - reg + read_len / addr_div); - read_len += toread_len; - } - - wm_adsp_buf_flash(&buf_list, buf); - return 0; -} - -static int wm_coeff_get(struct snd_kcontrol *kctl, - struct snd_ctl_elem_value *ucontrol) -{ - struct soc_bytes_ext *bytes_ext = - (struct soc_bytes_ext *)kctl->private_value; - struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext); - char *p = ucontrol->value.bytes.data; - int ret = 0; - - mutex_lock(&ctl->dsp->pwr_lock); - - if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) { - if (ctl->enabled && ctl->dsp->running) - ret = wm_coeff_read_control(ctl, p, ctl->len); - else - ret = -EPERM; - } else { - if (!ctl->flags && ctl->enabled && ctl->dsp->running) - ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len); - - memcpy(p, ctl->cache, ctl->len); - } - - mutex_unlock(&ctl->dsp->pwr_lock); - - return ret; -} - -static int wm_coeff_tlv_get(struct snd_kcontrol *kctl, - unsigned int __user *bytes, unsigned int size) -{ - struct soc_bytes_ext *bytes_ext = - (struct soc_bytes_ext *)kctl->private_value; - struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext); - int ret = 0; - - mutex_lock(&ctl->dsp->pwr_lock); - - if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) { - if (ctl->enabled && ctl->dsp->running) - ret = wm_coeff_read_control(ctl, ctl->cache, size); - else - ret = -EPERM; - } else { - if (!ctl->flags && ctl->enabled && ctl->dsp->running) - ret = wm_coeff_read_control(ctl, ctl->cache, size); - } - - if (!ret && copy_to_user(bytes, ctl->cache, size)) - ret = -EFAULT; - - mutex_unlock(&ctl->dsp->pwr_lock); - - return ret; -} - -static int wm_coeff_get_acked(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - /* - * Although it's not useful to read an acked control, we must satisfy - * user-side assumptions that all controls are readable and that a - * write of the same value should be filtered out (it's valid to send - * the same event number again to the firmware). We therefore return 0, - * meaning "no event" so valid event numbers will always be a change - */ - ucontrol->value.integer.value[0] = 0; - - return 0; -} - -struct wmfw_ctl_work { - struct wm_adsp *dsp; - struct wm_coeff_ctl *ctl; - struct work_struct work; -}; - -static unsigned int wmfw_convert_flags(unsigned int in, unsigned int len) -{ - unsigned int out, rd, wr, vol; - - if (len > ADSP_MAX_STD_CTRL_SIZE) { - rd = SNDRV_CTL_ELEM_ACCESS_TLV_READ; - wr = SNDRV_CTL_ELEM_ACCESS_TLV_WRITE; - vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE; - - out = SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK; - } else { - rd = SNDRV_CTL_ELEM_ACCESS_READ; - wr = SNDRV_CTL_ELEM_ACCESS_WRITE; - vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE; - - out = 0; - } - - if (in) { - if (in & WMFW_CTL_FLAG_READABLE) - out |= rd; - if (in & WMFW_CTL_FLAG_WRITEABLE) - out |= wr; - if (in & WMFW_CTL_FLAG_VOLATILE) - out |= vol; - } else { - out |= rd | wr | vol; - } - - return out; -} - -static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) -{ - struct snd_kcontrol_new *kcontrol; - int ret; - - if (!ctl || !ctl->name) - return -EINVAL; - - kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL); - if (!kcontrol) - return -ENOMEM; - - kcontrol->name = ctl->name; - kcontrol->info = wm_coeff_info; - kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER; - kcontrol->tlv.c = snd_soc_bytes_tlv_callback; - kcontrol->private_value = (unsigned long)&ctl->bytes_ext; - kcontrol->access = wmfw_convert_flags(ctl->flags, ctl->len); - - switch (ctl->type) { - case WMFW_CTL_TYPE_ACKED: - kcontrol->get = wm_coeff_get_acked; - kcontrol->put = wm_coeff_put_acked; - break; - default: - kcontrol->get = wm_coeff_get; - kcontrol->put = wm_coeff_put; - - ctl->bytes_ext.max = ctl->len; - ctl->bytes_ext.get = wm_coeff_tlv_get; - ctl->bytes_ext.put = wm_coeff_tlv_put; - break; - } - - ret = snd_soc_add_codec_controls(dsp->codec, kcontrol, 1); - if (ret < 0) - goto err_kcontrol; - - kfree(kcontrol); - - return 0; - -err_kcontrol: - kfree(kcontrol); - return ret; -} - -static int wm_coeff_init_control_caches(struct wm_adsp *dsp) -{ - struct wm_coeff_ctl *ctl; - int ret; - - list_for_each_entry(ctl, &dsp->ctl_list, list) { - if (!ctl->enabled || ctl->set) - continue; - if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) - continue; - - /* - * For readable controls populate the cache from the DSP memory. - * For non-readable controls the cache was zero-filled when - * created so we don't need to do anything. - */ - if (!ctl->flags || (ctl->flags & WMFW_CTL_FLAG_READABLE)) { - ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len); - if (ret < 0) - return ret; - } - } - - return 0; -} - -static int wm_coeff_sync_controls(struct wm_adsp *dsp) -{ - struct wm_coeff_ctl *ctl; - int ret; - - list_for_each_entry(ctl, &dsp->ctl_list, list) { - if (!ctl->enabled) - continue; - if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) { - ret = wm_coeff_write_control(ctl, ctl->cache, ctl->len); - if (ret < 0) - return ret; - } - } - - return 0; -} - -static void wm_adsp_signal_event_controls(struct wm_adsp *dsp, - unsigned int event) -{ - struct wm_coeff_ctl *ctl; - int ret; - - list_for_each_entry(ctl, &dsp->ctl_list, list) { - if (ctl->type != WMFW_CTL_TYPE_HOSTEVENT) - continue; - - if (!ctl->enabled) - continue; - - ret = wm_coeff_write_acked_control(ctl, event); - if (ret) - adsp_warn(dsp, - "Failed to send 0x%x event to alg 0x%x (%d)\n", - event, ctl->alg_region.alg, ret); - } -} - -static void wm_adsp_ctl_work(struct work_struct *work) -{ - struct wmfw_ctl_work *ctl_work = container_of(work, - struct wmfw_ctl_work, - work); - - wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl); - kfree(ctl_work); -} - -static void wm_adsp_free_ctl_blk(struct wm_coeff_ctl *ctl) -{ - kfree(ctl->cache); - kfree(ctl->name); - kfree(ctl); -} - -static int wm_adsp_create_control(struct wm_adsp *dsp, - const struct wm_adsp_alg_region *alg_region, - unsigned int offset, unsigned int len, - const char *subname, unsigned int subname_len, - unsigned int flags, unsigned int type) -{ - struct wm_coeff_ctl *ctl; - struct wmfw_ctl_work *ctl_work; - char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; - const char *region_name; - int ret; - - region_name = wm_adsp_mem_region_name(alg_region->type); - if (!region_name) { - adsp_err(dsp, "Unknown region type: %d\n", alg_region->type); - return -EINVAL; - } - - switch (dsp->fw_ver) { - case 0: - case 1: - snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x", - dsp->num, region_name, alg_region->alg); - break; - default: - ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, - "DSP%d%c %.12s %x", dsp->num, *region_name, - dsp->fw_enum.texts[dsp->fw], - alg_region->alg); - - /* Truncate the subname from the start if it is too long */ - if (subname) { - int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2; - int skip = 0; - - if (subname_len > avail) - skip = subname_len - avail; - - snprintf(name + ret, - SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s", - subname_len - skip, subname + skip); - } - break; - } - - list_for_each_entry(ctl, &dsp->ctl_list, list) { - if (!strcmp(ctl->name, name)) { - if (!ctl->enabled) - ctl->enabled = 1; - return 0; - } - } - - ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); - if (!ctl) - return -ENOMEM; - ctl->fw_name = dsp->fw_enum.texts[dsp->fw]; - ctl->alg_region = *alg_region; - ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL); - if (!ctl->name) { - ret = -ENOMEM; - goto err_ctl; - } - ctl->enabled = 1; - ctl->set = 0; - ctl->ops.xget = wm_coeff_get; - ctl->ops.xput = wm_coeff_put; - ctl->dsp = dsp; - - ctl->flags = flags; - ctl->type = type; - ctl->offset = offset; - ctl->len = len; - ctl->cache = kzalloc(ctl->len, GFP_KERNEL); - if (!ctl->cache) { - ret = -ENOMEM; - goto err_ctl_name; - } - - list_add(&ctl->list, &dsp->ctl_list); - - if (flags & WMFW_CTL_FLAG_SYS) - return 0; - - ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL); - if (!ctl_work) { - ret = -ENOMEM; - goto err_ctl_cache; - } - - ctl_work->dsp = dsp; - ctl_work->ctl = ctl; - INIT_WORK(&ctl_work->work, wm_adsp_ctl_work); - schedule_work(&ctl_work->work); - - return 0; - -err_ctl_cache: - kfree(ctl->cache); -err_ctl_name: - kfree(ctl->name); -err_ctl: - kfree(ctl); - - return ret; -} - -struct wm_coeff_parsed_alg { - int id; - const u8 *name; - int name_len; - int ncoeff; -}; - -int wm_adsp_handle_fw_event(struct wm_adsp *dsp) -{ - struct wm_coeff_ctl *ctl; - int ret = 0, serviced = 0; - u32 val = 0; - - list_for_each_entry(ctl, &dsp->ctl_list, list) { - if (ctl->type != WMFW_CTL_TYPE_FWEVENT) - continue; - if (!dsp->fwevent_cb) { - adsp_err(dsp, - "FW event callback not registered: %s\n", - ctl->name); - return -EINVAL; - } - - ret = wm_coeff_read_control(ctl, &val, ctl->len); - if (ret < 0) - return ret; - - val = be32_to_cpu(val); - if (val == 0xFFFFFFu) - continue; - - dsp->fwevent_cb(dsp, val); - - val = cpu_to_be32(0xFFFFFFu); - ret = wm_coeff_write_control(ctl, &val, ctl->len); - if (ret < 0) - return ret; - serviced++; - - } - - return serviced; -} -EXPORT_SYMBOL_GPL(wm_adsp_handle_fw_event); - -struct wm_coeff_parsed_coeff { - int offset; - int mem_type; - const u8 *name; - int name_len; - int ctl_type; - int flags; - int len; -}; - -static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str) -{ - int length; - - switch (bytes) { - case 1: - length = **pos; - break; - case 2: - length = le16_to_cpu(*((__le16 *)*pos)); - break; - default: - return 0; - } - - if (str) - *str = *pos + bytes; - - *pos += ((length + bytes) + 3) & ~0x03; - - return length; -} - -static int wm_coeff_parse_int(int bytes, const u8 **pos) -{ - int val = 0; - - switch (bytes) { - case 2: - val = le16_to_cpu(*((__le16 *)*pos)); - break; - case 4: - val = le32_to_cpu(*((__le32 *)*pos)); - break; - default: - break; - } - - *pos += bytes; - - return val; -} - -static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data, - struct wm_coeff_parsed_alg *blk) -{ - const struct wmfw_adsp_alg_data *raw; - - switch (dsp->fw_ver) { - case 0: - case 1: - raw = (const struct wmfw_adsp_alg_data *)*data; - *data = raw->data; - - blk->id = le32_to_cpu(raw->id); - blk->name = raw->name; - blk->name_len = strlen(raw->name); - blk->ncoeff = le32_to_cpu(raw->ncoeff); - break; - default: - blk->id = wm_coeff_parse_int(sizeof(raw->id), data); - blk->name_len = wm_coeff_parse_string(sizeof(u8), data, - &blk->name); - wm_coeff_parse_string(sizeof(u16), data, NULL); - blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data); - break; - } - - adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id); - adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name); - adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff); -} - -static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data, - struct wm_coeff_parsed_coeff *blk) -{ - const struct wmfw_adsp_coeff_data *raw; - const u8 *tmp; - int length; - - switch (dsp->fw_ver) { - case 0: - case 1: - raw = (const struct wmfw_adsp_coeff_data *)*data; - *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size); - - blk->offset = le16_to_cpu(raw->hdr.offset); - blk->mem_type = le16_to_cpu(raw->hdr.type); - blk->name = raw->name; - blk->name_len = strlen(raw->name); - blk->ctl_type = le16_to_cpu(raw->ctl_type); - blk->flags = le16_to_cpu(raw->flags); - blk->len = le32_to_cpu(raw->len); - break; - default: - tmp = *data; - blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp); - blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp); - length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp); - blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp, - &blk->name); - wm_coeff_parse_string(sizeof(u8), &tmp, NULL); - wm_coeff_parse_string(sizeof(u16), &tmp, NULL); - blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp); - blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp); - blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp); - - *data = *data + sizeof(raw->hdr) + length; - break; - } - - adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type); - adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset); - adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name); - adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags); - adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type); - adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len); -} - -static int wm_adsp_check_coeff_flags(struct wm_adsp *dsp, - const struct wm_coeff_parsed_coeff *coeff_blk, - unsigned int f_required, - unsigned int f_illegal) -{ - if ((coeff_blk->flags & f_illegal) || - ((coeff_blk->flags & f_required) != f_required)) { - adsp_err(dsp, "Illegal flags 0x%x for control type 0x%x\n", - coeff_blk->flags, coeff_blk->ctl_type); - return -EINVAL; - } - - return 0; -} - -static int wm_adsp_parse_coeff(struct wm_adsp *dsp, - const struct wmfw_region *region) -{ - struct wm_adsp_alg_region alg_region = {}; - struct wm_coeff_parsed_alg alg_blk; - struct wm_coeff_parsed_coeff coeff_blk; - const u8 *data = region->data; - int i, ret; - - wm_coeff_parse_alg(dsp, &data, &alg_blk); - for (i = 0; i < alg_blk.ncoeff; i++) { - wm_coeff_parse_coeff(dsp, &data, &coeff_blk); - - switch (coeff_blk.ctl_type) { - case SNDRV_CTL_ELEM_TYPE_BYTES: - break; - case WMFW_CTL_TYPE_ACKED: - if (coeff_blk.flags & WMFW_CTL_FLAG_SYS) - continue; /* ignore */ - - ret = wm_adsp_check_coeff_flags(dsp, &coeff_blk, - WMFW_CTL_FLAG_VOLATILE | - WMFW_CTL_FLAG_WRITEABLE | - WMFW_CTL_FLAG_READABLE, - 0); - if (ret) - return -EINVAL; - break; - case WMFW_CTL_TYPE_HOSTEVENT: - case WMFW_CTL_TYPE_FWEVENT: - ret = wm_adsp_check_coeff_flags(dsp, &coeff_blk, - WMFW_CTL_FLAG_SYS | - WMFW_CTL_FLAG_VOLATILE | - WMFW_CTL_FLAG_WRITEABLE | - WMFW_CTL_FLAG_READABLE, - 0); - if (ret) - return -EINVAL; - break; - default: - adsp_err(dsp, "Unknown control type: %d\n", - coeff_blk.ctl_type); - return -EINVAL; - } - - alg_region.type = coeff_blk.mem_type; - alg_region.alg = alg_blk.id; - - ret = wm_adsp_create_control(dsp, &alg_region, - coeff_blk.offset, - coeff_blk.len, - coeff_blk.name, - coeff_blk.name_len, - coeff_blk.flags, - coeff_blk.ctl_type); - if (ret < 0) - adsp_err(dsp, "Failed to create control: %.*s, %d\n", - coeff_blk.name_len, coeff_blk.name, ret); - } - - return 0; -} - -static int wm_adsp_write_blocks(struct wm_adsp *dsp, const u8 *data, size_t len, - unsigned int reg, struct list_head *list, - size_t burst_multiple) - -{ - size_t to_write = MAX_I2C_TX_SIZE - (MAX_I2C_TX_SIZE % burst_multiple); - size_t remain = len; - struct wm_adsp_buf *buf; - unsigned int addr_div; - int ret; - - switch (dsp->type) { - case WMFW_ADSP1: - case WMFW_ADSP2: - addr_div = 2; - break; - default: - addr_div = 1; - break; - } - - while (remain > 0) { - if (remain < to_write) - to_write = remain; - - buf = wm_adsp_buf_alloc(data, to_write, list); - if (!buf) { - adsp_err(dsp, "Out of memory\n"); - return -ENOMEM; - } - - ret = regmap_raw_write_async(dsp->regmap, reg, - buf->buf, to_write); - if (ret != 0) { - adsp_err(dsp, - "Failed to write %zd bytes at %d\n", - to_write, reg); - - return ret; - } - - data += to_write; - reg += to_write / addr_div; - remain -= to_write; - } - - return 0; -} - -struct wm_adsp_device_names { - char device_number[32]; - char device_name[32]; -}; - -static const struct wm_adsp_device_names wm_adsp_dev_list[] = { - {"cs47l35", "marley"}, - {"cs47l90", "moon"}, -}; - -static void wm_adsp_change_device_name(const char *dev_num, char *name) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(wm_adsp_dev_list); i++) { - if (!strncmp(dev_num, wm_adsp_dev_list[i].device_number, - strlen(dev_num))) { - strlcpy(name, wm_adsp_dev_list[i].device_name, - strlen(wm_adsp_dev_list[i].device_name)+1); - return; - } - } - strlcpy(name, dev_num, strlen(dev_num)+1); -} - -static int wm_adsp_load(struct wm_adsp *dsp) -{ - LIST_HEAD(buf_list); - const struct firmware *firmware; - struct regmap *regmap = dsp->regmap; - unsigned int pos = 0; - const struct wmfw_header *header; - const struct wmfw_adsp1_sizes *adsp1_sizes; - const struct wmfw_adsp2_sizes *adsp2_sizes; - const struct wmfw_footer *footer; - const struct wmfw_region *region; - const struct wm_adsp_region *mem; - const char *region_name; - char *file, *text = NULL; - char part_name[32]; - unsigned int reg; - int regions = 0; - int ret, offset, type, sizes; - unsigned int burst_multiple; - - file = kzalloc(PAGE_SIZE, GFP_KERNEL); - if (file == NULL) - return -ENOMEM; - - if (dsp->firmwares[dsp->fw].fullname) - snprintf(file, PAGE_SIZE, "%s", dsp->firmwares[dsp->fw].file); - else { - memset(part_name, 0, sizeof(part_name)); - wm_adsp_change_device_name(dsp->part, part_name); - snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", part_name, - dsp->num, dsp->firmwares[dsp->fw].file); - } - - file[PAGE_SIZE - 1] = '\0'; - - ret = request_firmware(&firmware, file, dsp->dev); - if (ret != 0) { - adsp_err(dsp, "Failed to request '%s'\n", file); - goto out; - } - ret = -EINVAL; - - pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer); - if (pos >= firmware->size) { - adsp_err(dsp, "%s: file too short, %zu bytes\n", - file, firmware->size); - goto out_fw; - } - - header = (void *)&firmware->data[0]; - - if (memcmp(&header->magic[0], "WMFW", 4) != 0) { - adsp_err(dsp, "%s: invalid magic\n", file); - goto out_fw; - } - - switch (dsp->type) { - case WMFW_ADSP1: - case WMFW_ADSP2: - switch (header->ver) { - case 0: - adsp_warn(dsp, "%s: Deprecated file format %d\n", - file, header->ver); - break; - case 1: - case 2: - break; - default: - adsp_err(dsp, "%s: unknown file format %d\n", - file, header->ver); - goto out_fw; - } - break; - case WMFW_HALO: - switch (header->ver) { - case 1: - case 2: - /* - * we are required to load these for testing purposes - * but this format is not allowed for production fw - */ - adsp_warn(dsp, - "%s: Not a production firmware (deprecated file format %d)\n", - file, header->ver); - break; - case 3: - break; - default: - adsp_err(dsp, "%s: unknown file format %d\n", - file, header->ver); - goto out_fw; - } - } - - adsp_info(dsp, "Firmware version: %d\n", header->ver); - dsp->fw_ver = header->ver; - - if (header->core != dsp->type) { - adsp_err(dsp, "%s: invalid core %d != %d\n", - file, header->core, dsp->type); - goto out_fw; - } - - switch (dsp->type) { - case WMFW_ADSP1: - pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer); - adsp1_sizes = (void *)&(header[1]); - footer = (void *)&(adsp1_sizes[1]); - sizes = sizeof(*adsp1_sizes); - - adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n", - file, le32_to_cpu(adsp1_sizes->dm), - le32_to_cpu(adsp1_sizes->pm), - le32_to_cpu(adsp1_sizes->zm)); - break; - - case WMFW_HALO: - case WMFW_ADSP2: - pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer); - adsp2_sizes = (void *)&(header[1]); - footer = (void *)&(adsp2_sizes[1]); - sizes = sizeof(*adsp2_sizes); - - adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n", - file, le32_to_cpu(adsp2_sizes->xm), - le32_to_cpu(adsp2_sizes->ym), - le32_to_cpu(adsp2_sizes->pm), - le32_to_cpu(adsp2_sizes->zm)); - break; - - default: - WARN(1, "Unknown DSP type"); - goto out_fw; - } - - if (le32_to_cpu(header->len) != sizeof(*header) + - sizes + sizeof(*footer)) { - adsp_err(dsp, "%s: unexpected header length %d\n", - file, le32_to_cpu(header->len)); - goto out_fw; - } - - adsp_dbg(dsp, "%s: timestamp %llu\n", file, - le64_to_cpu(footer->timestamp)); - - while (pos < firmware->size && - sizeof(*region) < firmware->size - pos) { - region = (void *)&(firmware->data[pos]); - region_name = "Unknown"; - reg = 0; - burst_multiple = 4; - text = NULL; - offset = le32_to_cpu(region->offset) & 0xffffff; - type = be32_to_cpu(region->type) & 0xff; - mem = wm_adsp_find_region(dsp, type); - - switch (type) { - case WMFW_NAME_TEXT: - region_name = "Firmware name"; - text = kzalloc(le32_to_cpu(region->len) + 1, - GFP_KERNEL); - break; - case WMFW_ALGORITHM_DATA: - region_name = "Algorithm"; - ret = wm_adsp_parse_coeff(dsp, region); - if (ret != 0) - goto out_fw; - break; - case WMFW_INFO_TEXT: - region_name = "Information"; - text = kzalloc(le32_to_cpu(region->len) + 1, - GFP_KERNEL); - break; - case WMFW_ABSOLUTE: - region_name = "Absolute"; - reg = offset; - break; - case WMFW_ADSP1_PM: - case WMFW_ADSP1_DM: - case WMFW_ADSP2_XM: - case WMFW_ADSP2_YM: - case WMFW_ADSP1_ZM: - case WMFW_HALO_PM_PACKED: - case WMFW_HALO_XM_PACKED: - case WMFW_HALO_YM_PACKED: - region_name = wm_adsp_mem_region_name(type); - reg = wm_adsp_region_to_reg(dsp, mem, offset); - break; - default: - adsp_warn(dsp, - "%s.%d: Unknown region type %x at %d(%x)\n", - file, regions, type, pos, pos); - break; - } - - adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file, - regions, le32_to_cpu(region->len), offset, - region_name); - - if (le32_to_cpu(region->len) > - firmware->size - pos - sizeof(*region)) { - adsp_err(dsp, - "%s.%d: %s region len %d bytes exceeds file length %zu\n", - file, regions, region_name, - le32_to_cpu(region->len), firmware->size); - ret = -EINVAL; - goto out_fw; - } - - if (text) { - memcpy(text, region->data, le32_to_cpu(region->len)); - adsp_info(dsp, "%s: %s\n", file, text); - kfree(text); - text = NULL; - } - - if (reg) { - ret = wm_adsp_write_blocks(dsp, region->data, - le32_to_cpu(region->len), - reg, &buf_list, - burst_multiple); - - if (ret != 0) { - adsp_err(dsp, - "%s.%d: Failed writing data at %d in %s: %d\n", - file, regions, - offset, region_name, ret); - goto out_fw; - } - } - - pos += le32_to_cpu(region->len) + sizeof(*region); - regions++; - } - - ret = regmap_async_complete(regmap); - if (ret != 0) { - adsp_err(dsp, "Failed to complete async write: %d\n", ret); - goto out_fw; - } - - if (pos > firmware->size) - adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", - file, regions, pos - firmware->size); - - wm_adsp_debugfs_save_wmfwname(dsp, file); - -out_fw: - regmap_async_complete(regmap); - wm_adsp_buf_free(&buf_list); - release_firmware(firmware); - kfree(text); -out: - kfree(file); - - return ret; -} - -static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp, - const struct wm_adsp_alg_region *alg_region) -{ - struct wm_coeff_ctl *ctl; - - list_for_each_entry(ctl, &dsp->ctl_list, list) { - const char *fw_name; - - fw_name = dsp->fw_enum.texts[dsp->fw]; - - if (ctl->fw_name == fw_name && - alg_region->alg == ctl->alg_region.alg && - alg_region->type == ctl->alg_region.type) { - ctl->alg_region.base = alg_region->base; - } - } -} - -static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs, - unsigned int pos, unsigned int len) -{ - void *alg; - int ret; - __be32 val; - - if (n_algs == 0) { - adsp_err(dsp, "No algorithms\n"); - return ERR_PTR(-EINVAL); - } - - if (n_algs > 1024) { - adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs); - return ERR_PTR(-EINVAL); - } - - /* Read the terminator first to validate the length */ - ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val)); - if (ret != 0) { - adsp_err(dsp, "Failed to read algorithm list end: %d\n", - ret); - return ERR_PTR(ret); - } - - if (be32_to_cpu(val) != 0xbedead) - adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbedead\n", - pos + len, be32_to_cpu(val)); - - alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA); - if (!alg) - return ERR_PTR(-ENOMEM); - - ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2); - if (ret != 0) { - adsp_err(dsp, "Failed to read algorithm list: %d\n", ret); - kfree(alg); - return ERR_PTR(ret); - } - - return alg; -} - -static struct wm_adsp_alg_region * - wm_adsp_find_alg_region(struct wm_adsp *dsp, int type, unsigned int id) -{ - struct wm_adsp_alg_region *alg_region; - - list_for_each_entry(alg_region, &dsp->alg_regions, list) { - if (id == alg_region->alg && type == alg_region->type) - return alg_region; - } - - return NULL; -} - -static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp, - int type, __be32 id, - __be32 base) -{ - struct wm_adsp_alg_region *alg_region; - - alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL); - if (!alg_region) - return ERR_PTR(-ENOMEM); - - alg_region->type = type; - alg_region->alg = be32_to_cpu(id); - alg_region->base = be32_to_cpu(base); - - list_add_tail(&alg_region->list, &dsp->alg_regions); - - if (dsp->fw_ver > 0) - wm_adsp_ctl_fixup_base(dsp, alg_region); - - return alg_region; -} - -static void wm_adsp_free_alg_regions(struct wm_adsp *dsp) -{ - struct wm_adsp_alg_region *alg_region; - - while (!list_empty(&dsp->alg_regions)) { - alg_region = list_first_entry(&dsp->alg_regions, - struct wm_adsp_alg_region, - list); - list_del(&alg_region->list); - kfree(alg_region); - } -} - -static int wm_adsp1_setup_algs(struct wm_adsp *dsp) -{ - struct wmfw_adsp1_id_hdr adsp1_id; - struct wmfw_adsp1_alg_hdr *adsp1_alg; - struct wm_adsp_alg_region *alg_region; - const struct wm_adsp_region *mem; - unsigned int pos, len; - size_t n_algs; - int i, ret; - - mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM); - if (WARN_ON(!mem)) - return -EINVAL; - - ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id, - sizeof(adsp1_id)); - if (ret != 0) { - adsp_err(dsp, "Failed to read algorithm info: %d\n", - ret); - return ret; - } - - n_algs = be32_to_cpu(adsp1_id.n_algs); - dsp->fw_id = be32_to_cpu(adsp1_id.fw.id); - adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", - dsp->fw_id, - (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16, - (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8, - be32_to_cpu(adsp1_id.fw.ver) & 0xff, - n_algs); - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM, - adsp1_id.fw.id, adsp1_id.zm); - if (IS_ERR(alg_region)) - return PTR_ERR(alg_region); - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM, - adsp1_id.fw.id, adsp1_id.dm); - if (IS_ERR(alg_region)) - return PTR_ERR(alg_region); - - pos = sizeof(adsp1_id) / 2; - len = (sizeof(*adsp1_alg) * n_algs) / 2; - - adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len); - if (IS_ERR(adsp1_alg)) - return PTR_ERR(adsp1_alg); - - for (i = 0; i < n_algs; i++) { - adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n", - i, be32_to_cpu(adsp1_alg[i].alg.id), - (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16, - (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8, - be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff, - be32_to_cpu(adsp1_alg[i].dm), - be32_to_cpu(adsp1_alg[i].zm)); - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM, - adsp1_alg[i].alg.id, - adsp1_alg[i].dm); - if (IS_ERR(alg_region)) { - ret = PTR_ERR(alg_region); - goto out; - } - if (dsp->fw_ver == 0) { - if (i + 1 < n_algs) { - len = be32_to_cpu(adsp1_alg[i + 1].dm); - len -= be32_to_cpu(adsp1_alg[i].dm); - len *= 4; - wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0, 0, - SNDRV_CTL_ELEM_TYPE_BYTES); - } else { - adsp_warn(dsp, "Missing length info for region DM with ID %x\n", - be32_to_cpu(adsp1_alg[i].alg.id)); - } - } - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM, - adsp1_alg[i].alg.id, - adsp1_alg[i].zm); - if (IS_ERR(alg_region)) { - ret = PTR_ERR(alg_region); - goto out; - } - if (dsp->fw_ver == 0) { - if (i + 1 < n_algs) { - len = be32_to_cpu(adsp1_alg[i + 1].zm); - len -= be32_to_cpu(adsp1_alg[i].zm); - len *= 4; - wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0, 0, - SNDRV_CTL_ELEM_TYPE_BYTES); - } else { - adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", - be32_to_cpu(adsp1_alg[i].alg.id)); - } - } - } - -out: - kfree(adsp1_alg); - return ret; -} - -static int wm_adsp2_setup_algs(struct wm_adsp *dsp) -{ - struct wmfw_adsp2_id_hdr adsp2_id; - struct wmfw_adsp2_alg_hdr *adsp2_alg; - struct wm_adsp_alg_region *alg_region; - const struct wm_adsp_region *mem; - unsigned int pos, len; - size_t n_algs; - int i, ret; - - mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM); - if (WARN_ON(!mem)) - return -EINVAL; - - ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id, - sizeof(adsp2_id)); - if (ret != 0) { - adsp_err(dsp, "Failed to read algorithm info: %d\n", - ret); - return ret; - } - - n_algs = be32_to_cpu(adsp2_id.n_algs); - dsp->fw_id = be32_to_cpu(adsp2_id.fw.id); - dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver); - dsp->fw_vendor_id = 0; - adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", - dsp->fw_id, - (dsp->fw_id_version & 0xff0000) >> 16, - (dsp->fw_id_version & 0xff00) >> 8, - dsp->fw_id_version & 0xff, - n_algs); - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, - adsp2_id.fw.id, adsp2_id.xm); - if (IS_ERR(alg_region)) - return PTR_ERR(alg_region); - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM, - adsp2_id.fw.id, adsp2_id.ym); - if (IS_ERR(alg_region)) - return PTR_ERR(alg_region); - - switch (dsp->type) { - case WMFW_HALO: - pos = sizeof(adsp2_id); - len = sizeof(*adsp2_alg) * n_algs; - break; - default: - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM, - adsp2_id.fw.id, adsp2_id.zm); - if (IS_ERR(alg_region)) - return PTR_ERR(alg_region); - - pos = sizeof(adsp2_id) / 2; - len = (sizeof(*adsp2_alg) * n_algs) / 2; - break; - } - - adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len); - if (IS_ERR(adsp2_alg)) - return PTR_ERR(adsp2_alg); - - for (i = 0; i < n_algs; i++) { - adsp_info(dsp, - "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n", - i, be32_to_cpu(adsp2_alg[i].alg.id), - (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16, - (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8, - be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff, - be32_to_cpu(adsp2_alg[i].xm), - be32_to_cpu(adsp2_alg[i].ym), - be32_to_cpu(adsp2_alg[i].zm)); - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, - adsp2_alg[i].alg.id, - adsp2_alg[i].xm); - if (IS_ERR(alg_region)) { - ret = PTR_ERR(alg_region); - goto out; - } - if (dsp->fw_ver == 0) { - if (i + 1 < n_algs) { - len = be32_to_cpu(adsp2_alg[i + 1].xm); - len -= be32_to_cpu(adsp2_alg[i].xm); - len *= 4; - wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0, 0, - SNDRV_CTL_ELEM_TYPE_BYTES); - } else { - adsp_warn(dsp, "Missing length info for region XM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } - } - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM, - adsp2_alg[i].alg.id, - adsp2_alg[i].ym); - if (IS_ERR(alg_region)) { - ret = PTR_ERR(alg_region); - goto out; - } - if (dsp->fw_ver == 0) { - if (i + 1 < n_algs) { - len = be32_to_cpu(adsp2_alg[i + 1].ym); - len -= be32_to_cpu(adsp2_alg[i].ym); - len *= 4; - wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0, 0, - SNDRV_CTL_ELEM_TYPE_BYTES); - } else { - adsp_warn(dsp, "Missing length info for region YM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } - } - - /* no ZM on HALO */ - if (dsp->type == WMFW_HALO) - continue; - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM, - adsp2_alg[i].alg.id, - adsp2_alg[i].zm); - if (IS_ERR(alg_region)) { - ret = PTR_ERR(alg_region); - goto out; - } - if (dsp->fw_ver == 0) { - if (i + 1 < n_algs) { - len = be32_to_cpu(adsp2_alg[i + 1].zm); - len -= be32_to_cpu(adsp2_alg[i].zm); - len *= 4; - wm_adsp_create_control(dsp, alg_region, 0, - len, NULL, 0, 0, - SNDRV_CTL_ELEM_TYPE_BYTES); - } else { - adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", - be32_to_cpu(adsp2_alg[i].alg.id)); - } - } - } - -out: - kfree(adsp2_alg); - return ret; -} - -static int wm_halo_setup_algs(struct wm_adsp *dsp) -{ - struct wmfw_halo_id_hdr halo_id; - struct wmfw_halo_alg_hdr *halo_alg; - struct wm_adsp_alg_region *alg_region; - const struct wm_adsp_region *mem; - unsigned int pos, len, block_rev; - size_t n_algs; - int i, ret; - - mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM); - if (WARN_ON(!mem)) - return -EINVAL; - - ret = regmap_raw_read(dsp->regmap, mem->base, &halo_id, - sizeof(halo_id)); - if (ret != 0) { - adsp_err(dsp, "Failed to read algorithm info: %d\n", - ret); - return ret; - } - - block_rev = be32_to_cpu(halo_id.fw.block_rev) >> 16; - switch (block_rev) { - case 3: - break; - default: - adsp_err(dsp, "Unknown firmware ID block version 0x%x\n", - block_rev); - return -EINVAL; - } - - n_algs = be32_to_cpu(halo_id.n_algs); - dsp->fw_id = be32_to_cpu(halo_id.fw.id); - dsp->fw_id_version = be32_to_cpu(halo_id.fw.ver); - dsp->fw_vendor_id = be32_to_cpu(halo_id.fw.vendor_id); - adsp_info(dsp, "Firmware: %x vendor: 0x%x v%d.%d.%d, %zu algorithms\n", - dsp->fw_id, - dsp->fw_vendor_id, - (dsp->fw_id_version & 0xff0000) >> 16, - (dsp->fw_id_version & 0xff00) >> 8, - dsp->fw_id_version & 0xff, - n_algs); - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, - halo_id.fw.id, halo_id.xm_base); - if (IS_ERR(alg_region)) - return PTR_ERR(alg_region); - - alg_region = wm_adsp_create_region(dsp, WMFW_HALO_XM_PACKED, - halo_id.fw.id, halo_id.xm_base); - if (IS_ERR(alg_region)) - return PTR_ERR(alg_region); - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM, - halo_id.fw.id, halo_id.ym_base); - if (IS_ERR(alg_region)) - return PTR_ERR(alg_region); - - alg_region = wm_adsp_create_region(dsp, WMFW_HALO_YM_PACKED, - halo_id.fw.id, halo_id.ym_base); - if (IS_ERR(alg_region)) - return PTR_ERR(alg_region); - - pos = sizeof(halo_id); - len = (sizeof(*halo_alg) * n_algs); - - halo_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len); - if (IS_ERR(halo_alg)) - return PTR_ERR(halo_alg); - - for (i = 0; i < n_algs; i++) { - adsp_info(dsp, - "%d: ID %x v%d.%d.%d XM@%x YM@%x\n", - i, be32_to_cpu(halo_alg[i].alg.id), - (be32_to_cpu(halo_alg[i].alg.ver) & 0xff0000) >> 16, - (be32_to_cpu(halo_alg[i].alg.ver) & 0xff00) >> 8, - be32_to_cpu(halo_alg[i].alg.ver) & 0xff, - be32_to_cpu(halo_alg[i].xm_base), - be32_to_cpu(halo_alg[i].ym_base)); - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM, - halo_alg[i].alg.id, - halo_alg[i].xm_base); - if (IS_ERR(alg_region)) { - ret = PTR_ERR(alg_region); - goto out; - } - - alg_region = wm_adsp_create_region(dsp, WMFW_HALO_XM_PACKED, - halo_alg[i].alg.id, - halo_alg[i].xm_base); - if (IS_ERR(alg_region)) { - ret = PTR_ERR(alg_region); - goto out; - } - - alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM, - halo_alg[i].alg.id, - halo_alg[i].ym_base); - if (IS_ERR(alg_region)) { - ret = PTR_ERR(alg_region); - goto out; - } - - alg_region = wm_adsp_create_region(dsp, WMFW_HALO_YM_PACKED, - halo_alg[i].alg.id, - halo_alg[i].ym_base); - if (IS_ERR(alg_region)) { - ret = PTR_ERR(alg_region); - goto out; - } - } - -out: - kfree(halo_alg); - return ret; -} - -static int wm_adsp_load_coeff(struct wm_adsp *dsp) -{ - LIST_HEAD(buf_list); - struct regmap *regmap = dsp->regmap; - struct wmfw_coeff_hdr *hdr; - struct wmfw_coeff_item *blk; - const struct firmware *firmware; - const struct wm_adsp_region *mem; - struct wm_adsp_alg_region *alg_region; - const char *region_name; - int ret, pos, blocks, type, offset, reg; - char *file; - char part_name[32]; - unsigned int burst_multiple; - - if (dsp->firmwares[dsp->fw].binfile && - !(strcmp(dsp->firmwares[dsp->fw].binfile, "None"))) - return 0; - - file = kzalloc(PAGE_SIZE, GFP_KERNEL); - if (file == NULL) - return -ENOMEM; - - if (dsp->firmwares[dsp->fw].fullname && - dsp->firmwares[dsp->fw].binfile) { - snprintf(file, PAGE_SIZE, "%s", - dsp->firmwares[dsp->fw].binfile); - } else if (dsp->firmwares[dsp->fw].binfile) { - snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, - dsp->num, dsp->firmwares[dsp->fw].binfile); - } else { - memset(part_name, 0, sizeof(part_name)); - wm_adsp_change_device_name(dsp->part, part_name); - snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", part_name, - dsp->num, dsp->firmwares[dsp->fw].file); - } - file[PAGE_SIZE - 1] = '\0'; - - ret = request_firmware(&firmware, file, dsp->dev); - if (ret != 0) { - adsp_warn(dsp, "Failed to request '%s'\n", file); - ret = 0; - goto out; - } - ret = -EINVAL; - - if (sizeof(*hdr) >= firmware->size) { - adsp_err(dsp, "%s: file too short, %zu bytes\n", - file, firmware->size); - goto out_fw; - } - - hdr = (void *)&firmware->data[0]; - if (memcmp(hdr->magic, "WMDR", 4) != 0) { - adsp_err(dsp, "%s: invalid magic\n", file); - goto out_fw; - } - - switch (be32_to_cpu(hdr->rev) & 0xff) { - case 1: - break; - default: - adsp_err(dsp, "%s: Unsupported coefficient file format %d\n", - file, be32_to_cpu(hdr->rev) & 0xff); - ret = -EINVAL; - goto out_fw; - } - - adsp_dbg(dsp, "%s: v%d.%d.%d\n", file, - (le32_to_cpu(hdr->ver) >> 16) & 0xff, - (le32_to_cpu(hdr->ver) >> 8) & 0xff, - le32_to_cpu(hdr->ver) & 0xff); - - pos = le32_to_cpu(hdr->len); - - blocks = 0; - while (pos < firmware->size && - sizeof(*blk) < firmware->size - pos) { - blk = (void *)(&firmware->data[pos]); - - type = le16_to_cpu(blk->type); - offset = le16_to_cpu(blk->offset); - - adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n", - file, blocks, le32_to_cpu(blk->id), - (le32_to_cpu(blk->ver) >> 16) & 0xff, - (le32_to_cpu(blk->ver) >> 8) & 0xff, - le32_to_cpu(blk->ver) & 0xff); - adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n", - file, blocks, le32_to_cpu(blk->len), offset, type); - - reg = 0; - burst_multiple = 4; - region_name = "Unknown"; - switch (type) { - case (WMFW_NAME_TEXT << 8): - case (WMFW_INFO_TEXT << 8): - break; - case (WMFW_ABSOLUTE << 8): - /* - * Old files may use this for global - * coefficients. - */ - if (le32_to_cpu(blk->id) == dsp->fw_id && - offset == 0) { - region_name = "global coefficients"; - mem = wm_adsp_find_region(dsp, type); - if (!mem) { - adsp_err(dsp, "No ZM\n"); - break; - } - reg = wm_adsp_region_to_reg(dsp, mem, 0); - - } else { - region_name = "register"; - reg = offset; - } - break; - - case WMFW_ADSP1_DM: - case WMFW_ADSP1_ZM: - case WMFW_ADSP2_XM: - case WMFW_ADSP2_YM: - case WMFW_HALO_XM_PACKED: - case WMFW_HALO_YM_PACKED: - case WMFW_HALO_PM_PACKED: - adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n", - file, blocks, le32_to_cpu(blk->len), - type, le32_to_cpu(blk->id)); - - mem = wm_adsp_find_region(dsp, type); - if (!mem) { - adsp_err(dsp, "No base for region %x\n", type); - break; - } - - alg_region = wm_adsp_find_alg_region(dsp, type, - le32_to_cpu(blk->id)); - if (alg_region) { - reg = alg_region->base; - reg = wm_adsp_region_to_reg(dsp, mem, reg); - reg += offset; - } else { - adsp_err(dsp, "No %x for algorithm %x\n", - type, le32_to_cpu(blk->id)); - } - break; - - default: - adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n", - file, blocks, type, pos); - break; - } - - if (reg) { - if (le32_to_cpu(blk->len) > - firmware->size - pos - sizeof(*blk)) { - adsp_err(dsp, - "%s.%d: %s region len %d bytes exceeds file length %zu\n", - file, blocks, region_name, - le32_to_cpu(blk->len), - firmware->size); - ret = -EINVAL; - goto out_fw; - } - - adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n", - file, blocks, le32_to_cpu(blk->len), - reg); - - ret = wm_adsp_write_blocks(dsp, blk->data, - le32_to_cpu(blk->len), - reg, &buf_list, - burst_multiple); - if (ret != 0) { - adsp_err(dsp, - "%s.%d: Failed to write to %x in %s: %d\n", - file, blocks, reg, region_name, ret); - } - } - - pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03; - blocks++; - } - - ret = regmap_async_complete(regmap); - if (ret != 0) - adsp_err(dsp, "Failed to complete async write: %d\n", ret); - - if (pos > firmware->size) - adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", - file, blocks, pos - firmware->size); - - wm_adsp_debugfs_save_binname(dsp, file); - -out_fw: - regmap_async_complete(regmap); - release_firmware(firmware); - wm_adsp_buf_free(&buf_list); -out: - kfree(file); - return ret; -} - -int wm_adsp1_init(struct wm_adsp *dsp) -{ - INIT_LIST_HEAD(&dsp->alg_regions); - - mutex_init(&dsp->pwr_lock); - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp1_init); - -int wm_adsp1_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, - int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); - struct wm_adsp *dsp = &dsps[w->shift]; - struct wm_coeff_ctl *ctl; - int ret; - unsigned int val; - - dsp->codec = codec; - - mutex_lock(&dsp->pwr_lock); - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, - ADSP1_SYS_ENA, ADSP1_SYS_ENA); - - /* - * For simplicity set the DSP clock rate to be the - * SYSCLK rate rather than making it configurable. - */ - if (dsp->sysclk_reg) { - ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val); - if (ret != 0) { - adsp_err(dsp, "Failed to read SYSCLK state: %d\n", - ret); - goto err_mutex; - } - - val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift; - - ret = regmap_update_bits(dsp->regmap, - dsp->base + ADSP1_CONTROL_31, - ADSP1_CLK_SEL_MASK, val); - if (ret != 0) { - adsp_err(dsp, "Failed to set clock rate: %d\n", - ret); - goto err_mutex; - } - } - - ret = wm_adsp_load(dsp); - if (ret != 0) - goto err_ena; - - ret = wm_adsp1_setup_algs(dsp); - if (ret != 0) - goto err_ena; - - ret = wm_adsp_load_coeff(dsp); - if (ret != 0) - goto err_ena; - - /* Initialize caches for enabled and unset controls */ - ret = wm_coeff_init_control_caches(dsp); - if (ret != 0) - goto err_ena; - - /* Sync set controls */ - ret = wm_coeff_sync_controls(dsp); - if (ret != 0) - goto err_ena; - - dsp->booted = true; - - /* Start the core running */ - regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, - ADSP1_CORE_ENA | ADSP1_START, - ADSP1_CORE_ENA | ADSP1_START); - - dsp->running = true; - break; - - case SND_SOC_DAPM_PRE_PMD: - dsp->running = false; - dsp->booted = false; - - /* Halt the core */ - regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, - ADSP1_CORE_ENA | ADSP1_START, 0); - - regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19, - ADSP1_WDMA_BUFFER_LENGTH_MASK, 0); - - regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, - ADSP1_SYS_ENA, 0); - - list_for_each_entry(ctl, &dsp->ctl_list, list) - ctl->enabled = 0; - - - wm_adsp_free_alg_regions(dsp); - break; - - default: - break; - } - - mutex_unlock(&dsp->pwr_lock); - - return 0; - -err_ena: - regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, - ADSP1_SYS_ENA, 0); -err_mutex: - mutex_unlock(&dsp->pwr_lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp1_event); - -int wm_adsp_compr_channel(struct wm_adsp_compr *compr) -{ - int i; - struct wm_adsp *dsp = compr->dsp; - - for (i = 0; i < WM_ADSP_MAX_CHANNEL_PER_DSP; i++) - if (dsp->compr[i] == compr) - return i; - return 0; -} - -static int wm_adsp2_ena(struct wm_adsp *dsp) -{ - unsigned int val; - int ret, count; - - switch (dsp->rev) { - case 0: - ret = regmap_update_bits_async(dsp->regmap, - dsp->base + ADSP2_CONTROL, - ADSP2_SYS_ENA, ADSP2_SYS_ENA); - if (ret != 0) - return ret; - break; - default: - break; - } - - /* Wait for the RAM to start, should be near instantaneous */ - for (count = 0; count < 10; ++count) { - ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val); - if (ret != 0) - return ret; - - if (val & ADSP2_RAM_RDY) - break; - - usleep_range(250, 500); - } - - if (!(val & ADSP2_RAM_RDY)) { - adsp_err(dsp, "Failed to start DSP RAM\n"); - return -EBUSY; - } - - adsp_dbg(dsp, "RAM ready after %d polls\n", count); - - return 0; -} - -static void wm_adsp2_boot_work(struct work_struct *work) -{ - struct wm_adsp *dsp = container_of(work, - struct wm_adsp, - boot_work); - int ret; - - mutex_lock(&dsp->pwr_lock); - - ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_MEM_ENA, ADSP2_MEM_ENA); - if (ret != 0) - goto err_mutex; - - ret = wm_adsp2_ena(dsp); - if (ret != 0) - goto err_mem; - - ret = wm_adsp_load(dsp); - if (ret != 0) - goto err_ena; - - ret = wm_adsp2_setup_algs(dsp); - if (ret != 0) - goto err_ena; - - ret = wm_adsp_load_coeff(dsp); - if (ret != 0) - goto err_ena; - - /* Initialize caches for enabled and unset controls */ - ret = wm_coeff_init_control_caches(dsp); - if (ret != 0) - goto err_ena; - - switch (dsp->rev) { - case 0: - /* Turn DSP back off until we are ready to run */ - ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_SYS_ENA, 0); - if (ret != 0) - goto err_ena; - break; - default: - break; - } - - dsp->booted = true; - - mutex_unlock(&dsp->pwr_lock); - - return; - -err_ena: - regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); -err_mem: - regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_MEM_ENA, 0); -err_mutex: - mutex_unlock(&dsp->pwr_lock); -} - -#ifndef REMOVE_SYNC_SET_RATE -static int wm_halo_set_rate_block(struct wm_adsp *dsp, - unsigned int rate_base, - unsigned int n_rates, - const u8 *rate_cache) -{ - unsigned int addr = dsp->base + rate_base, val; - int ret, i; - - mutex_lock(dsp->rate_lock); - - for (i = 0; i < n_rates; ++i) { - val = rate_cache[i] << HALO_DSP_RATE_SHIFT; - - ret = regmap_update_bits(dsp->regmap, - addr + (i * 8), - HALO_DSP_RATE_MASK, - val); - if (ret) { - adsp_err(dsp, "Failed to set rate: %d\n", ret); - mutex_unlock(dsp->rate_lock); - return ret; - } - - adsp_dbg(dsp, "Set rate %d to 0x%x\n", i, val); - } - - udelay(300); - - mutex_unlock(dsp->rate_lock); - - return 0; -} -#endif - -static int wm_halo_clear_stream_arb(struct wm_adsp *dsp) -{ - struct regmap *regmap = dsp->regmap; - unsigned int dspbase = dsp->base, reg, begin, end; - u32 values[3] = {0, 0, 0}; - int ret; - - /* disable stream arbiter masters */ - for (reg = dspbase + HALO_STREAM_ARB_MSTR0_CONFIG_0; - reg <= dspbase + HALO_STREAM_ARB_MSTR5_CONFIG_0; - reg += 0x10) { - ret = regmap_update_bits(regmap, reg, - HALO_STREAM_ARB_MSTR_EN_MASK, 0); - if (ret) - goto error; - } - - /* clear stream arbiter masters */ - for (reg = dspbase + HALO_STREAM_ARB_MSTR0_CONFIG_0; - reg <= dspbase + HALO_STREAM_ARB_MSTR5_CONFIG_0; - reg += 0x10) { - ret = regmap_bulk_write(regmap, reg, values, 3); - if (ret) - goto error; - } - - /* clear stream arbiter channel configs */ - begin = dspbase + HALO_STREAM_ARB_TX1_CONFIG_0; - end = begin + dsp->n_tx_channels * 0x8; - for (reg = begin; reg < end; reg += 0x8) { - ret = regmap_write(regmap, reg, - HALO_STREAM_ARB_MSTR_SEL_DEFAULT); - if (ret) - goto error; - } - begin = dspbase + HALO_STREAM_ARB_RX1_CONFIG_0; - end = begin + dsp->n_rx_channels * 0x8; - for (reg = begin; reg < end; reg += 0x8) { - ret = regmap_write(regmap, reg, - HALO_STREAM_ARB_MSTR_SEL_DEFAULT); - if (ret) - goto error; - } - - /* clear stream arbiter interrupt registers */ - values[0] = HALO_STREAM_ARB_MSTR_SEL_DEFAULT; - for (reg = dspbase + HALO_STREAM_ARB_IRQ0_CONFIG_0; - reg <= dspbase + HALO_STREAM_ARB_IRQ7_CONFIG_1; - reg += 0x10) { - ret = regmap_bulk_write(regmap, reg, values, 2); - if (ret) - goto error; - } - return 0; - -error: - adsp_err(dsp, - "Error while clearing stream arbiter config (reg 0x%x): %d\n", - reg, ret); - return ret; -} - -static int wm_halo_configure_mpu(struct wm_adsp *dsp) -{ - struct regmap *regmap = dsp->regmap; - int i = 0, len = 0, ret; - unsigned int sysinfo_base = dsp->base_sysinfo, dsp_base = dsp->base; - unsigned int xm_sz, xm_bank_sz, ym_sz, ym_bank_sz; - unsigned int xm_acc_cfg, ym_acc_cfg; - unsigned int lock_cfg; - - ret = regmap_read(regmap, sysinfo_base + HALO_SYS_INFO_XM_BANK_SIZE, - &xm_bank_sz); - if (ret) { - adsp_err(dsp, "Failed to read XM bank size.\n"); - goto err; - } - - if (!xm_bank_sz) { - adsp_err(dsp, "Failed to configure MPU (XM_BANK_SIZE = 0)\n"); - goto err; - } - - ret = regmap_read(regmap, sysinfo_base + HALO_SYS_INFO_YM_BANK_SIZE, - &ym_bank_sz); - if (ret) { - adsp_err(dsp, "Failed to read YM bank size.\n"); - goto err; - } - - if (!ym_bank_sz) { - adsp_err(dsp, "Failed to configure MPU (YM_BANK_SIZE = 0)\n"); - goto err; - } - - ret = regmap_read(regmap, sysinfo_base + HALO_SYS_INFO_XM_SRAM_SIZE, - &xm_sz); - if (ret) { - adsp_err(dsp, "Failed to read XM size.\n"); - goto err; - } - - ret = regmap_read(regmap, sysinfo_base + HALO_SYS_INFO_YM_SRAM_SIZE, - &ym_sz); - if (ret) { - adsp_err(dsp, "Failed to read YM size.\n"); - goto err; - } - - adsp_dbg(dsp, - "XM size 0x%x XM bank size 0x%x YM size 0x%x YM bank size 0x%x\n", - xm_sz, xm_bank_sz, ym_sz, ym_bank_sz); - - /* calculate amount of banks to unlock */ - xm_acc_cfg = (1 << (xm_sz / xm_bank_sz)) - 1; - ym_acc_cfg = (1 << (ym_sz / ym_bank_sz)) - 1; - - /* unlock MPU */ - ret = regmap_write(regmap, dsp_base + HALO_MPU_LOCK_CONFIG, - HALO_MPU_UNLOCK_CODE_0); - if (ret) { - adsp_err(dsp, "Error while unlocking MPU: %d\n", ret); - goto err; - } - - ret = regmap_write(regmap, dsp_base + HALO_MPU_LOCK_CONFIG, - HALO_MPU_UNLOCK_CODE_1); - if (ret) { - adsp_err(dsp, "Error while unlocking MPU: %d\n", ret); - goto err; - } - - adsp_dbg(dsp, "Unlocking XM (cfg: %x) and YM (cfg: %x)", - xm_acc_cfg, ym_acc_cfg); - - /* unlock XMEM and YMEM */ - ret = regmap_write(regmap, dsp_base + HALO_MPU_XMEM_ACCESS_0, - xm_acc_cfg); - if (ret) - goto err; - - ret = regmap_write(regmap, dsp_base + HALO_MPU_YMEM_ACCESS_0, - ym_acc_cfg); - if (ret) - goto err; - - len = sizeof(halo_mpu_access) / sizeof(halo_mpu_access[0]); - /* configure all other banks */ - lock_cfg = (dsp->unlock_all) ? 0xFFFFFFFF : 0; - for (i = 0; i < len; i++) { /* TODO: think if can be done without LUT */ - ret = regmap_write(regmap, dsp_base + halo_mpu_access[i], - lock_cfg); - if (ret) - goto err; - } - - /* lock MPU */ - ret = regmap_write(regmap, dsp_base + HALO_MPU_LOCK_CONFIG, 0); - if (ret) - adsp_err(dsp, "Error while locking MPU: %d\n", ret); - -err: - return ret; -} - -static void wm_halo_boot_work(struct work_struct *work) -{ - struct wm_adsp *dsp = container_of(work, - struct wm_adsp, - boot_work); - int ret; - - mutex_lock(&dsp->pwr_lock); - - ret = wm_adsp_load(dsp); - if (ret != 0) - goto err; - - switch (dsp->fw_ver) { - case 1: - case 2: - ret = wm_adsp2_setup_algs(dsp); - if (ret != 0) - goto err; - break; - default: - ret = wm_halo_setup_algs(dsp); - if (ret != 0) - goto err; - break; - } - - ret = wm_adsp_load_coeff(dsp); - if (ret != 0) - goto err; - - /* Initialize caches for enabled and unset controls */ - ret = wm_coeff_init_control_caches(dsp); - if (ret != 0) - goto err; - - dsp->booted = true; - -err: - mutex_unlock(&dsp->pwr_lock); -} - -static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq) -{ - int ret; - - switch (dsp->rev) { - case 0: - ret = regmap_update_bits_async(dsp->regmap, - dsp->base + ADSP2_CLOCKING, - ADSP2_CLK_SEL_MASK, - freq << ADSP2_CLK_SEL_SHIFT); - if (ret) { - adsp_err(dsp, "Failed to set clock rate: %d\n", ret); - return; - } - break; - default: - /* clock is handled by parent codec driver */ - break; - } -} - -int wm_adsp2_preloader_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec); - - ucontrol->value.integer.value[0] = dsp->preloaded; - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp2_preloader_get); - -int wm_adsp2_preloader_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); - struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec); - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - struct soc_mixer_control *mc = - (struct soc_mixer_control *)kcontrol->private_value; - char preload[32]; - - if (!dsp->suffix) - dsp->suffix = ""; - if (codec->component.name_prefix) - snprintf(preload, ARRAY_SIZE(preload), "%s DSP%u%s Preload", - codec->component.name_prefix, mc->shift, dsp->suffix); - else - snprintf(preload, ARRAY_SIZE(preload), "DSP%u%s Preload", - mc->shift, dsp->suffix); - - dsp->preloaded = ucontrol->value.integer.value[0]; - - if (ucontrol->value.integer.value[0]) - snd_soc_dapm_force_enable_pin(dapm, preload); - else - snd_soc_dapm_disable_pin(dapm, preload); - - snd_soc_dapm_sync(dapm); - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp2_preloader_put); - -static void wm_adsp_stop_watchdog(struct wm_adsp *dsp) -{ - switch (dsp->rev) { - case 0: - case 1: - return; - default: - regmap_update_bits(dsp->regmap, dsp->base + ADSP2_WATCHDOG, - ADSP2_WDT_ENA_MASK, 0); - } -} - -int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event, - unsigned int freq) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); - struct wm_adsp *dsp = &dsps[w->shift]; - struct wm_coeff_ctl *ctl; - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - wm_adsp2_set_dspclk(dsp, freq); - queue_work(system_unbound_wq, &dsp->boot_work); - break; - case SND_SOC_DAPM_PRE_PMD: - mutex_lock(&dsp->pwr_lock); - - wm_adsp_debugfs_clear(dsp); - - dsp->fw_id = 0; - dsp->fw_id_version = 0; - - dsp->booted = false; - - regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_MEM_ENA, 0); - - list_for_each_entry(ctl, &dsp->ctl_list, list) - ctl->enabled = 0; - - wm_adsp_free_alg_regions(dsp); - - mutex_unlock(&dsp->pwr_lock); - - adsp_dbg(dsp, "Shutdown complete\n"); - break; - default: - break; - } - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp2_early_event); - -int wm_halo_early_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); - struct wm_adsp *dsp = &dsps[w->shift]; - struct wm_coeff_ctl *ctl; - - switch (event) { - case SND_SOC_DAPM_PRE_PMU: - queue_work(system_unbound_wq, &dsp->boot_work); - break; - case SND_SOC_DAPM_PRE_PMD: - mutex_lock(&dsp->pwr_lock); - - wm_adsp_debugfs_clear(dsp); - - dsp->fw_id = 0; - dsp->fw_id_version = 0; - - dsp->booted = false; - - list_for_each_entry(ctl, &dsp->ctl_list, list) - ctl->enabled = 0; - - wm_adsp_free_alg_regions(dsp); - - mutex_unlock(&dsp->pwr_lock); - - adsp_dbg(dsp, "Shutdown complete\n"); - break; - default: - break; - } - - return 0; -} -EXPORT_SYMBOL_GPL(wm_halo_early_event); - -int wm_adsp2_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); - struct wm_adsp *dsp = &dsps[w->shift]; - int ret; - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - flush_work(&dsp->boot_work); - - mutex_lock(&dsp->pwr_lock); - - if (!dsp->booted) { - ret = -EIO; - goto err; - } - - ret = wm_adsp2_ena(dsp); - if (ret != 0) - goto err; - - /* Sync set controls */ - ret = wm_coeff_sync_controls(dsp); - if (ret != 0) - goto err; - - wm_adsp2_lock(dsp, dsp->lock_regions); - - ret = regmap_update_bits(dsp->regmap, - dsp->base + ADSP2_CONTROL, - ADSP2_CORE_ENA | ADSP2_START, - ADSP2_CORE_ENA | ADSP2_START); - if (ret != 0) - goto err; - - if (dsp->firmwares[dsp->fw].num_caps != 0) { - ret = wm_adsp_buffer_init(dsp); - if (ret < 0) - goto err; - } - - dsp->running = true; - - mutex_unlock(&dsp->pwr_lock); - - break; - - case SND_SOC_DAPM_PRE_PMD: - /* Tell the firmware to cleanup */ - wm_adsp_signal_event_controls(dsp, WM_ADSP_FW_EVENT_SHUTDOWN); - - wm_adsp_stop_watchdog(dsp); - - /* Log firmware state, it can be useful for analysis */ - switch (dsp->rev) { - case 0: - wm_adsp2_show_fw_status(dsp); - break; - default: - wm_adsp2v2_show_fw_status(dsp); - break; - } - - mutex_lock(&dsp->pwr_lock); - - dsp->running = false; - - regmap_update_bits(dsp->regmap, - dsp->base + ADSP2_CONTROL, - ADSP2_CORE_ENA | ADSP2_START, 0); - - /* Make sure DMAs are quiesced */ - switch (dsp->rev) { - case 0: - regmap_write(dsp->regmap, - dsp->base + ADSP2_RDMA_CONFIG_1, 0); - regmap_write(dsp->regmap, - dsp->base + ADSP2_WDMA_CONFIG_1, 0); - regmap_write(dsp->regmap, - dsp->base + ADSP2_WDMA_CONFIG_2, 0); - - regmap_update_bits(dsp->regmap, - dsp->base + ADSP2_CONTROL, - ADSP2_SYS_ENA, 0); - break; - default: - regmap_write(dsp->regmap, - dsp->base + ADSP2_RDMA_CONFIG_1, 0); - regmap_write(dsp->regmap, - dsp->base + ADSP2_WDMA_CONFIG_1, 0); - regmap_write(dsp->regmap, - dsp->base + ADSP2V2_WDMA_CONFIG_2, 0); - break; - } - - if (dsp->firmwares[dsp->fw].num_caps != 0) - wm_adsp_buffer_free(dsp); - - mutex_unlock(&dsp->pwr_lock); - - adsp_dbg(dsp, "Execution stopped\n"); - break; - - default: - break; - } - - return 0; -err: - regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); - mutex_unlock(&dsp->pwr_lock); - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp2_event); - -int wm_halo_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, - int event) -{ - struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); - struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); - struct wm_adsp *dsp = &dsps[w->shift]; - int ret; - - switch (event) { - case SND_SOC_DAPM_POST_PMU: - flush_work(&dsp->boot_work); - - mutex_lock(&dsp->pwr_lock); - - if (!dsp->booted) { - ret = -EIO; - goto err; - } - - ret = regmap_update_bits(dsp->regmap, - dsp->base + HALO_CCM_CORE_CONTROL, - HALO_CORE_RESET, HALO_CORE_RESET); - if (ret != 0) { - adsp_err(dsp, "Error while resetting core: %d\n", ret); - return ret; - } - - /* Sync set controls */ - ret = wm_coeff_sync_controls(dsp); - if (ret != 0) - goto err; - -#ifdef REMOVE_SYNC_SET_RATE - adsp_dbg(dsp, "Setting RX and TX rates DISABLED.\n"); -#else - adsp_dbg(dsp, "Setting RX rates.\n"); - ret = wm_halo_set_rate_block(dsp, HALO_SAMPLE_RATE_RX1, - dsp->n_rx_channels, - dsp->rx_rate_cache); - if (ret) { - adsp_err(dsp, "Failed to set RX rates.\n"); - goto err; - } - - adsp_dbg(dsp, "Setting TX rates.\n"); - ret = wm_halo_set_rate_block(dsp, HALO_SAMPLE_RATE_TX1, - dsp->n_tx_channels, - dsp->tx_rate_cache); - if (ret) { - adsp_err(dsp, "Failed to set TX rates.\n"); - goto err; - } -#endif - - ret = wm_halo_clear_stream_arb(dsp); - if (ret != 0) - goto err; - - /* disable NMI */ - ret = regmap_write(dsp->regmap, - dsp->base + HALO_INTP_CTL_NMI_CONTROL, - 0); - if (ret != 0) { - adsp_err(dsp, "Error while disabling NMI: %d\n", ret); - goto err; - } - - ret = wm_halo_configure_mpu(dsp); - if (ret != 0) - goto err; - - ret = regmap_update_bits(dsp->regmap, - dsp->base + HALO_CCM_CORE_CONTROL, - HALO_CORE_EN, HALO_CORE_EN); - if (ret != 0) - goto err; - - if (dsp->firmwares[dsp->fw].num_caps != 0) { - ret = wm_adsp_buffer_init(dsp); - if (ret < 0) - goto err; - } - - dsp->running = true; - - mutex_unlock(&dsp->pwr_lock); - break; - case SND_SOC_DAPM_PRE_PMD: - /* Tell the firmware to cleanup */ - wm_adsp_signal_event_controls(dsp, WM_ADSP_FW_EVENT_SHUTDOWN); - - /* Log firmware state, it can be useful for analysis */ - wm_halo_show_fw_status(dsp); - - mutex_lock(&dsp->pwr_lock); - - dsp->running = false; - - regmap_update_bits(dsp->regmap, - dsp->base + HALO_CCM_CORE_CONTROL, - HALO_CORE_EN, 0); - - wm_halo_clear_stream_arb(dsp); - - if (dsp->firmwares[dsp->fw].num_caps != 0) - wm_adsp_buffer_free(dsp); - - mutex_unlock(&dsp->pwr_lock); - - adsp_info(dsp, "Execution stopped\n"); - break; - default: - break; - } - - return 0; -err: - mutex_unlock(&dsp->pwr_lock); - regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL, - HALO_CORE_EN, 0); - return ret; -} -EXPORT_SYMBOL_GPL(wm_halo_event); - -int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec) -{ - struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); - char preload[32]; - int ret; - - if (codec->component.name_prefix) - snprintf(preload, ARRAY_SIZE(preload), "%s DSP%d%s Preload", - codec->component.name_prefix, dsp->num, dsp->suffix); - else - snprintf(preload, ARRAY_SIZE(preload), "DSP%d%s Preload", - dsp->num, dsp->suffix); - - snd_soc_dapm_disable_pin(dapm, preload); - - wm_adsp2_init_debugfs(dsp, codec); - - dsp->codec = codec; - - if (dsp->ao_dsp) - ret = snd_soc_add_codec_controls(codec, - &wm_adsp_ao_fw_controls[dsp->num - 1], - 1); - else - ret = snd_soc_add_codec_controls(codec, &dsp->fw_ctrl, 1); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe); - -int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec) -{ - wm_adsp2_cleanup_debugfs(dsp); - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove); - -#ifdef CONFIG_OF -static int wm_adsp_of_parse_caps(struct wm_adsp *dsp, - struct device_node *np, - struct wm_adsp_fw_defs *fw) -{ - const char *prop = "cirrus,compr-caps"; - int i; - int len_prop; - u32 of_cap; - - if (!of_get_property(np, prop, &len_prop)) - return -EINVAL; - - len_prop /= sizeof(u32); - - if (len_prop < 5 || len_prop > 4 + MAX_NUM_SAMPLE_RATES) - return -EOVERFLOW; - - fw->num_caps = 1; - fw->caps = devm_kzalloc(dsp->dev, - sizeof(struct wm_adsp_fw_caps), - GFP_KERNEL); - if (!fw->caps) - return -ENOMEM; - - fw->caps->num_regions = ARRAY_SIZE(default_regions); - fw->caps->region_defs = devm_kzalloc(dsp->dev, - sizeof(default_regions), - GFP_KERNEL); - if (!fw->caps->region_defs) - return -ENOMEM; - - memcpy(fw->caps->region_defs, default_regions, sizeof(default_regions)); - - of_property_read_u32_index(np, prop, 0, &of_cap); - fw->caps->id = of_cap; - of_property_read_u32_index(np, prop, 1, &of_cap); - fw->caps->desc.max_ch = of_cap; - of_property_read_u32_index(np, prop, 2, &of_cap); - fw->caps->desc.formats = of_cap; - of_property_read_u32_index(np, prop, 3, &of_cap); - fw->compr_direction = of_cap; - - for (i = 4; i < len_prop; ++i) { - of_property_read_u32_index(np, prop, i, &of_cap); - fw->caps->desc.sample_rates[i - 4] = of_cap; - } - fw->caps->desc.num_sample_rates = i - 4; - - return 0; -} - -static int wm_adsp_of_parse_firmware(struct wm_adsp *dsp, - struct device_node *np) -{ - struct device_node *fws = of_get_child_by_name(np, "firmware"); - struct device_node *fw = NULL; - const char **ctl_names; - int ret; - int i; - - if (!fws) - return 0; - - i = 0; - while ((fw = of_get_next_child(fws, fw)) != NULL) - i++; - - if (i == 0) - return 0; - - dsp->num_firmwares = i; - - dsp->firmwares = devm_kzalloc(dsp->dev, - i * sizeof(struct wm_adsp_fw_defs), - GFP_KERNEL); - if (!dsp->firmwares) - return -ENOMEM; - - ctl_names = devm_kzalloc(dsp->dev, - i * sizeof(const char *), - GFP_KERNEL); - if (!ctl_names) - return -ENOMEM; - - i = 0; - while ((fw = of_get_next_child(fws, fw)) != NULL) { - ctl_names[i] = fw->name; - - ret = of_property_read_string(fw, "cirrus,wmfw-file", - &dsp->firmwares[i].file); - if (ret < 0) { - dev_err(dsp->dev, - "Firmware filename missing/malformed: %d\n", - ret); - return ret; - } - - ret = of_property_read_string(fw, "cirrus,bin-file", - &dsp->firmwares[i].binfile); - if (ret < 0) - dsp->firmwares[i].binfile = NULL; - - dsp->firmwares[i].fullname = - of_property_read_bool(fw, "cirrus,full-name"); - - wm_adsp_of_parse_caps(dsp, fw, &dsp->firmwares[i]); - - i++; - } - - dsp->fw_enum.items = dsp->num_firmwares; - dsp->fw_enum.texts = ctl_names; - - dsp->fw_ctrl = wm_adsp_fw_controls[dsp->num - 1]; - dsp->fw_ctrl.private_value = (unsigned long)(&dsp->fw_enum); - - return dsp->num_firmwares; -} - -static int wm_adsp_of_parse_adsp(struct wm_adsp *dsp) -{ - struct device_node *np = of_get_child_by_name(dsp->dev->of_node, - "adsps"); - struct device_node *core = NULL; - unsigned int addr; - int ret; - - if (!np) - return 0; - - while ((core = of_get_next_child(np, core)) != NULL) { - ret = of_property_read_u32(core, "reg", &addr); - if (ret < 0) { - dev_err(dsp->dev, - "Failed to get ADSP base address: %d\n", - ret); - return ret; - } - - if (addr == dsp->base) - break; - } - - if (!core) - return 0; - - return wm_adsp_of_parse_firmware(dsp, core); -} -#else -static inline int wm_adsp_of_parse_adsp(struct wm_adsp *dsp) -{ - return 0; -} -#endif - -int wm_adsp2_init(struct wm_adsp *dsp) -{ - int ret; - - switch (dsp->rev) { - case 0: - /* - * Disable the DSP memory by default when in reset for a small - * power saving. - */ - ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, - ADSP2_MEM_ENA, 0); - if (ret) { - adsp_err(dsp, - "Failed to clear memory retention: %d\n", ret); - return ret; - } - break; - default: - break; - } - - INIT_LIST_HEAD(&dsp->alg_regions); - INIT_LIST_HEAD(&dsp->ctl_list); - INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work); - - mutex_init(&dsp->pwr_lock); - - if (!dsp->dev->of_node || wm_adsp_of_parse_adsp(dsp) <= 0) { - dsp->fw_enum = wm_adsp_fw_enum[dsp->num - 1]; - dsp->fw_ctrl = wm_adsp_fw_controls[dsp->num - 1]; - dsp->num_firmwares = ARRAY_SIZE(wm_adsp_fw); - dsp->firmwares = wm_adsp_fw; - } - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp2_init); - -int wm_halo_init(struct wm_adsp *dsp, struct mutex *rate_lock) -{ - INIT_LIST_HEAD(&dsp->alg_regions); - INIT_LIST_HEAD(&dsp->ctl_list); - INIT_WORK(&dsp->boot_work, wm_halo_boot_work); - - mutex_init(&dsp->pwr_lock); - - dsp->rate_lock = rate_lock; - dsp->rx_rate_cache = kcalloc(dsp->n_rx_channels, sizeof(u8), - GFP_KERNEL); - dsp->tx_rate_cache = kcalloc(dsp->n_tx_channels, sizeof(u8), - GFP_KERNEL); - - if (!dsp->dev->of_node || wm_adsp_of_parse_adsp(dsp) <= 0) { - dsp->fw_enum = wm_adsp_fw_enum[dsp->num - 1]; - dsp->fw_ctrl = wm_adsp_fw_controls[dsp->num - 1]; - dsp->num_firmwares = ARRAY_SIZE(wm_adsp_fw); - dsp->firmwares = wm_adsp_fw; - } - - return 0; -} -EXPORT_SYMBOL_GPL(wm_halo_init); - -void wm_adsp2_remove(struct wm_adsp *dsp) -{ - struct wm_coeff_ctl *ctl; - - while (!list_empty(&dsp->ctl_list)) { - ctl = list_first_entry(&dsp->ctl_list, struct wm_coeff_ctl, - list); - list_del(&ctl->list); - wm_adsp_free_ctl_blk(ctl); - } - - kfree(dsp->rx_rate_cache); - kfree(dsp->tx_rate_cache); -} -EXPORT_SYMBOL_GPL(wm_adsp2_remove); - -static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr) -{ - return compr->buf != NULL; -} - -static int wm_adsp_compr_attach(struct wm_adsp_compr *compr) -{ - int channel = wm_adsp_compr_channel(compr); - /* - * Note this will be more complex once each DSP can support multiple - * streams - */ - if (!compr->dsp->buffer[channel]) - return -EINVAL; - - compr->buf = compr->dsp->buffer[channel]; - compr->buf->compr = compr; - - return 0; -} - -static void wm_adsp_compr_detach(struct wm_adsp_compr *compr) -{ - if (!compr) - return; - - /* Wake the poll so it can see buffer is no longer attached */ - if (compr->stream) - snd_compr_fragment_elapsed(compr->stream); - - if (wm_adsp_compr_attached(compr)) { - compr->buf->compr = NULL; - compr->buf = NULL; - } -} - -int wm_adsp_compr_open(struct wm_adsp *dsp, - struct snd_compr_stream *stream, - int channel) -{ - struct wm_adsp_compr *compr; - int ret = 0; - - mutex_lock(&dsp->pwr_lock); - - if (dsp->firmwares[dsp->fw].num_caps == 0) { - adsp_err(dsp, "Firmware does not support compressed API\n"); - ret = -ENXIO; - goto out; - } - - if (dsp->firmwares[dsp->fw].compr_direction != stream->direction) { - adsp_err(dsp, "Firmware does not support stream direction\n"); - ret = -EINVAL; - goto out; - } - - if (dsp->compr[channel]) { - /* It is expect this limitation will be removed in future */ - adsp_err(dsp, "Only a single stream supported per DSP\n"); - ret = -EBUSY; - goto out; - } - - compr = kzalloc(sizeof(*compr), GFP_KERNEL); - if (!compr) { - ret = -ENOMEM; - goto out; - } - - compr->dsp = dsp; - compr->stream = stream; - - dsp->compr[channel] = compr; - - stream->runtime->private_data = compr; - -out: - mutex_unlock(&dsp->pwr_lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_open); - -int wm_adsp_compr_free(struct snd_compr_stream *stream) -{ - struct wm_adsp_compr *compr = stream->runtime->private_data; - struct wm_adsp *dsp = compr->dsp; - int channel; - - mutex_lock(&dsp->pwr_lock); - - wm_adsp_compr_detach(compr); - channel = wm_adsp_compr_channel(compr); - dsp->compr[channel] = NULL; - - kfree(compr->raw_buf); - kfree(compr); - - mutex_unlock(&dsp->pwr_lock); - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_free); - -static int wm_adsp_compr_check_params(struct snd_compr_stream *stream, - struct snd_compr_params *params) -{ - struct wm_adsp_compr *compr = stream->runtime->private_data; - struct wm_adsp *dsp = compr->dsp; - const struct wm_adsp_fw_caps *caps; - const struct snd_codec_desc *desc; - int i, j; - - if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE || - params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE || - params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS || - params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS || - params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) { - adsp_err(dsp, "Invalid buffer fragsize=%d fragments=%d\n", - params->buffer.fragment_size, - params->buffer.fragments); - - return -EINVAL; - } - - for (i = 0; i < dsp->firmwares[dsp->fw].num_caps; i++) { - caps = &dsp->firmwares[dsp->fw].caps[i]; - desc = &caps->desc; - - if (caps->id != params->codec.id) - continue; - - if (stream->direction == SND_COMPRESS_PLAYBACK) { - if (desc->max_ch < params->codec.ch_out) - continue; - } else { - if (desc->max_ch < params->codec.ch_in) - continue; - } - - if (!(desc->formats & (1 << params->codec.format))) - continue; - - for (j = 0; j < desc->num_sample_rates; ++j) - if (desc->sample_rates[j] == params->codec.sample_rate) - return 0; - } - - adsp_err(dsp, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n", - params->codec.id, params->codec.ch_in, params->codec.ch_out, - params->codec.sample_rate, params->codec.format); - return -EINVAL; -} - -static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr) -{ - return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE; -} - -int wm_adsp_compr_set_params(struct snd_compr_stream *stream, - struct snd_compr_params *params) -{ - struct wm_adsp_compr *compr = stream->runtime->private_data; - unsigned int size; - int ret; - - ret = wm_adsp_compr_check_params(stream, params); - if (ret) - return ret; - - compr->size = params->buffer; - - adsp_dbg(compr->dsp, "fragment_size=%d fragments=%d\n", - compr->size.fragment_size, compr->size.fragments); - - size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf); - compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL); - if (!compr->raw_buf) - return -ENOMEM; - - compr->sample_rate = params->codec.sample_rate; - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); - -int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, - struct snd_compr_caps *caps) -{ - struct wm_adsp_compr *compr = stream->runtime->private_data; - struct wm_adsp *dsp = compr->dsp; - int fw = compr->dsp->fw; - int i; - - if (dsp->firmwares[fw].caps) { - for (i = 0; i < dsp->firmwares[fw].num_caps; i++) - caps->codecs[i] = dsp->firmwares[fw].caps[i].id; - - caps->num_codecs = i; - caps->direction = dsp->firmwares[fw].compr_direction; - - caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE; - caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE; - caps->min_fragments = WM_ADSP_MIN_FRAGMENTS; - caps->max_fragments = WM_ADSP_MAX_FRAGMENTS; - } - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps); - -static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type, - unsigned int mem_addr, - unsigned int num_words, u32 *data) -{ - struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type); - unsigned int i, reg; - int ret; - - if (!mem) - return -EINVAL; - - reg = wm_adsp_region_to_reg(dsp, mem, mem_addr); - - ret = regmap_raw_read(dsp->regmap, reg, data, - sizeof(*data) * num_words); - if (ret < 0) - return ret; - - for (i = 0; i < num_words; ++i) - data[i] = be32_to_cpu(data[i]) & 0x00ffffffu; - - return 0; -} - -static inline int wm_adsp_read_data_word(struct wm_adsp *dsp, int mem_type, - unsigned int mem_addr, u32 *data) -{ - return wm_adsp_read_data_block(dsp, mem_type, mem_addr, 1, data); -} - -static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type, - unsigned int mem_addr, u32 data) -{ - struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type); - unsigned int reg; - - if (!mem) - return -EINVAL; - - reg = wm_adsp_region_to_reg(dsp, mem, mem_addr); - - data = cpu_to_be32(data & 0x00ffffffu); - - return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data)); -} - -static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf, - unsigned int field_offset, u32 *data) -{ - return wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM, - buf->host_buf_ptr + field_offset, data); -} - -static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf, - unsigned int field_offset, u32 data) -{ - return wm_adsp_write_data_word(buf->dsp, WMFW_ADSP2_XM, - buf->host_buf_ptr + field_offset, data); -} - -static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf *buf) -{ - struct wm_adsp_alg_region *alg_region; - struct wm_adsp *dsp = buf->dsp; - u32 xmalg, addr, magic; - int i, ret, two_bufs = 0; - - alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id); - switch (dsp->type) { - case WMFW_ADSP2: - xmalg = sizeof(struct wm_adsp_system_config_xm_hdr); - xmalg /= sizeof(__be32); - break; - case WMFW_HALO: - xmalg = sizeof(struct wm_halo_system_config_xm_hdr); - xmalg /= sizeof(__be32); - break; - default: - WARN(1, "Unknown DSP type"); - return -ENODEV; - } - - addr = alg_region->base + xmalg + ALG_XM_FIELD(magic); - ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic); - if (ret < 0) - return ret; - - /* Hack for Moto FW to support 2 buffers */ - if (magic == WM_ADSP_ALG_XM2_STRUCT_MAGIC) { - xmalg++; - addr = alg_region->base + xmalg + ALG_XM_FIELD(magic); - ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic); - if (ret < 0) - return ret; - two_bufs = 1; - } - - if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC) - return -EINVAL; - - addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr); - /* move for 7 words for second buffer */ - if (buf->num) - addr += 7; - for (i = 0; i < 5; ++i) { - ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, - &buf->host_buf_ptr); - if (ret < 0) - return ret; - - if (buf->host_buf_ptr) - break; - - usleep_range(1000, 2000); - } - - if (!buf->host_buf_ptr) - return -EIO; - - adsp_dbg(dsp, "buffer #%d host_buf_ptr=%x\n", - buf->num, buf->host_buf_ptr); - - return two_bufs; -} - -static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf) -{ - struct wm_adsp *dsp = buf->dsp; - const struct wm_adsp_fw_caps *caps = dsp->firmwares[dsp->fw].caps; - struct wm_adsp_buffer_region *region; - u32 offset = 0; - int i, ret; - - for (i = 0; i < caps->num_regions; ++i) { - region = &buf->regions[i]; - - region->offset = offset; - region->mem_type = caps->region_defs[i].mem_type; - - ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset, - ®ion->base_addr); - if (ret < 0) - return ret; - - ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset, - &offset); - if (ret < 0) - return ret; - - region->cumulative_size = offset; - - adsp_dbg(buf->dsp, - "buffer #%d region=%d type=%d base=%04x off=%04x size=%04x\n", - buf->num, i, region->mem_type, region->base_addr, - region->offset, region->cumulative_size); - } - - return 0; -} - -static int wm_adsp_buffer_init(struct wm_adsp *dsp) -{ - struct wm_adsp_compr_buf *buf; - int ret; - int two_bufs = 0; - - buf = kzalloc(sizeof(*buf), GFP_KERNEL); - if (!buf) - return -ENOMEM; - - buf->dsp = dsp; - buf->read_index = -1; - buf->irq_count = 0xFFFFFFFF; - buf->num = 0; - - ret = wm_adsp_buffer_locate(buf); - if (ret < 0) { - adsp_err(dsp, "Failed to acquire host buffer: %d\n", ret); - goto err_buffer; - } - - if (ret == 1) - two_bufs = 1; - - buf->regions = kcalloc(dsp->firmwares[dsp->fw].caps->num_regions, - sizeof(*buf->regions), GFP_KERNEL); - if (!buf->regions) { - ret = -ENOMEM; - goto err_buffer; - } - - ret = wm_adsp_buffer_populate(buf); - if (ret < 0) { - adsp_err(dsp, "Failed to populate host buffer: %d\n", ret); - goto err_regions; - } - - dsp->buffer[0] = buf; - dsp->buf_num++; - - if (!two_bufs) - return 0; - - buf = kzalloc(sizeof(*buf), GFP_KERNEL); - if (!buf) { - ret = -ENOMEM; - goto err_clean1; - } - - buf->dsp = dsp; - buf->read_index = -1; - buf->irq_count = 0xFFFFFFFF; - buf->num = 1; - - ret = wm_adsp_buffer_locate(buf); - if (ret < 0) { - adsp_err(dsp, "Failed to acquire host buffer: %d\n", ret); - goto err_buffer2; - } - - buf->regions = kcalloc(dsp->firmwares[dsp->fw].caps->num_regions, - sizeof(*buf->regions), GFP_KERNEL); - if (!buf->regions) { - ret = -ENOMEM; - goto err_buffer2; - } - - ret = wm_adsp_buffer_populate(buf); - if (ret < 0) { - adsp_err(dsp, "Failed to populate host buffer: %d\n", ret); - goto err_regions2; - } - dsp->buffer[1] = buf; - dsp->buf_num++; - return 0; -err_regions2: - kfree(buf->regions); -err_buffer2: - kfree(buf); -err_clean1: - kfree(dsp->buffer[0]->regions); - kfree(dsp->buffer[0]); - dsp->buffer[0] = NULL; - return ret; -err_regions: - kfree(buf->regions); -err_buffer: - kfree(buf); - return ret; -} - -static int wm_adsp_buffer_free(struct wm_adsp *dsp) -{ - int i; - - for (i = 0; i < dsp->buf_num; i++) { - if (dsp->buffer[i]) { - wm_adsp_compr_detach(dsp->buffer[i]->compr); - - kfree(dsp->buffer[i]->regions); - kfree(dsp->buffer[i]); - - dsp->buffer[i] = NULL; - } - } - dsp->buf_num = 0; - return 0; -} - -int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd) -{ - struct wm_adsp_compr *compr = stream->runtime->private_data; - struct wm_adsp *dsp = compr->dsp; - int ret = 0; - - adsp_dbg(dsp, "Trigger: %d\n", cmd); - - mutex_lock(&dsp->pwr_lock); - - switch (cmd) { - case SNDRV_PCM_TRIGGER_START: - if (wm_adsp_compr_attached(compr)) - break; - - ret = wm_adsp_compr_attach(compr); - if (ret < 0) { - adsp_err(dsp, "Failed to link buffer and stream: %d\n", - ret); - break; - } - - compr->buf->avail = 0; - - /* Trigger the IRQ at one fragment of data */ - ret = wm_adsp_buffer_write(compr->buf, - HOST_BUFFER_FIELD(high_water_mark), - wm_adsp_compr_frag_words(compr)); - if (ret < 0) { - adsp_err(dsp, "Failed to set high water mark: %d\n", - ret); - break; - } - break; - case SNDRV_PCM_TRIGGER_STOP: - break; - default: - ret = -EINVAL; - break; - } - - mutex_unlock(&dsp->pwr_lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger); - -static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf) -{ - struct wm_adsp *dsp = buf->dsp; - int last_region = dsp->firmwares[dsp->fw].caps->num_regions - 1; - - return buf->regions[last_region].cumulative_size; -} - -static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf) -{ - u32 next_read_index, next_write_index; - int write_index, read_index, avail; - int ret; - -#if IS_ENABLED(CONFIG_SND_SOC_AOV_TRIGGER) - /* Always read read_index in Moto AOV solution */ - buf->read_index = -1; -#endif - - /* Only sync read index if we haven't already read a valid index */ - if (buf->read_index < 0) { - ret = wm_adsp_buffer_read(buf, - HOST_BUFFER_FIELD(next_read_index), - &next_read_index); - if (ret < 0) - return ret; - - read_index = sign_extend32(next_read_index, 23); - - if (read_index < 0) { - adsp_dbg(buf->dsp, "Avail check on unstarted stream\n"); - return 0; - } - - buf->read_index = read_index; - } - - ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index), - &next_write_index); - if (ret < 0) - return ret; - - write_index = sign_extend32(next_write_index, 23); - - /* Don't empty the buffer as it kills the firmware */ - write_index--; - - avail = write_index - buf->read_index; - if (avail < 0) - avail += wm_adsp_buffer_size(buf); - - adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n", - buf->read_index, write_index, avail * WM_ADSP_DATA_WORD_SIZE); - - buf->avail = avail; - - return 0; -} - -static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf *buf) -{ - int ret; - - ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error); - if (ret < 0) { - adsp_err(buf->dsp, "Failed to check buffer error: %d\n", ret); - return ret; - } - if (buf->error != 0) { - adsp_err(buf->dsp, "Buffer error occurred: %d\n", buf->error); - return -EIO; - } - - return 0; -} - -int wm_adsp_compr_handle_irq(struct wm_adsp *dsp, int channel) -{ - struct wm_adsp_compr_buf *buf; - struct wm_adsp_compr *compr; - int ret = 0; - - mutex_lock(&dsp->pwr_lock); - - buf = dsp->buffer[channel]; - compr = dsp->compr[channel]; - - if (!buf) { - ret = -ENODEV; - goto out; - } - - adsp_dbg(dsp, "Handling buffer IRQ\n"); - - ret = wm_adsp_buffer_get_error(buf); - if (ret < 0) - goto out_notify; /* Wake poll to report error */ - - ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count), - &buf->irq_count); - if (ret < 0) { - adsp_err(dsp, "Failed to get irq_count: %d\n", ret); - goto out; - } - - ret = wm_adsp_buffer_update_avail(buf); - if (ret < 0) { - adsp_err(dsp, "Error reading avail: %d\n", ret); - goto out; - } - - if (dsp->firmwares[dsp->fw].voice_trigger && buf->irq_count == 2) - ret = WM_ADSP_COMPR_VOICE_TRIGGER; - -out_notify: - if (compr && compr->stream) - snd_compr_fragment_elapsed(compr->stream); - -out: - mutex_unlock(&dsp->pwr_lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq); - -static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf) -{ - if (buf->irq_count & 0x01) - return 0; - - adsp_dbg(buf->dsp, "Enable IRQ(0x%x) for next fragment\n", - buf->irq_count); - - buf->irq_count |= 0x01; - - return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack), - buf->irq_count); -} - -int wm_adsp_compr_pointer(struct snd_compr_stream *stream, - struct snd_compr_tstamp *tstamp) -{ - struct wm_adsp_compr *compr = stream->runtime->private_data; - struct wm_adsp *dsp = compr->dsp; - struct wm_adsp_compr_buf *buf; - int ret = 0; - - adsp_dbg(dsp, "Pointer request\n"); - - mutex_lock(&dsp->pwr_lock); - - buf = compr->buf; - - if (!compr->buf || compr->buf->error) { - snd_compr_stop_error(stream, SNDRV_PCM_STATE_XRUN); - ret = -EIO; - goto out; - } - - if (buf->avail < wm_adsp_compr_frag_words(compr)) { - ret = wm_adsp_buffer_update_avail(buf); - if (ret < 0) { - adsp_err(dsp, "Error reading avail: %d\n", ret); - goto out; - } - - /* - * If we really have less than 1 fragment available tell the - * DSP to inform us once a whole fragment is available. - */ - if (buf->avail < wm_adsp_compr_frag_words(compr)) { - ret = wm_adsp_buffer_get_error(buf); - if (ret < 0) { - if (compr->buf->error) - snd_compr_stop_error(stream, - SNDRV_PCM_STATE_XRUN); - goto out; - } - - ret = wm_adsp_buffer_reenable_irq(buf); - if (ret < 0) { - adsp_err(dsp, - "Failed to re-enable buffer IRQ: %d\n", - ret); - goto out; - } - } - } - - tstamp->copied_total = compr->copied_total; - tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE; - tstamp->sampling_rate = compr->sample_rate; - -out: - mutex_unlock(&dsp->pwr_lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer); - -static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target) -{ - struct wm_adsp_compr_buf *buf = compr->buf; - struct wm_adsp *dsp = buf->dsp; - u8 *pack_in = (u8 *)compr->raw_buf; - u8 *pack_out = (u8 *)compr->raw_buf; - unsigned int adsp_addr; - int mem_type, nwords, max_read; - int i, j, ret; - - /* Calculate read parameters */ - for (i = 0; i < dsp->firmwares[dsp->fw].caps->num_regions; ++i) - if (buf->read_index < buf->regions[i].cumulative_size) - break; - - if (i == dsp->firmwares[dsp->fw].caps->num_regions) - return -EINVAL; - - mem_type = buf->regions[i].mem_type; - adsp_addr = buf->regions[i].base_addr + - (buf->read_index - buf->regions[i].offset); - - max_read = wm_adsp_compr_frag_words(compr); - nwords = buf->regions[i].cumulative_size - buf->read_index; - - if (nwords > target) - nwords = target; - if (nwords > buf->avail) - nwords = buf->avail; - if (nwords > max_read) - nwords = max_read; - if (!nwords) - return 0; - - /* Read data from DSP */ - ret = wm_adsp_read_data_block(buf->dsp, mem_type, adsp_addr, - nwords, compr->raw_buf); - if (ret < 0) - return ret; - - /* Remove the padding bytes from the data read from the DSP */ - for (i = 0; i < nwords; i++) { - for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++) - *pack_out++ = *pack_in++; - - pack_in += sizeof(*(compr->raw_buf)) - WM_ADSP_DATA_WORD_SIZE; - } - - /* update read index to account for words read */ - buf->read_index += nwords; - if (buf->read_index == wm_adsp_buffer_size(buf)) - buf->read_index = 0; - - ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index), - buf->read_index); - if (ret < 0) - return ret; - - /* update avail to account for words read */ - buf->avail -= nwords; - - return nwords; -} - -static int wm_adsp_compr_read(struct wm_adsp_compr *compr, - char __user *buf, size_t count) -{ - struct wm_adsp *dsp = compr->dsp; - int ntotal = 0; - int nwords, nbytes; - - adsp_dbg(dsp, "Requested read of %zu bytes\n", count); - - if (!compr->buf || compr->buf->error) { - snd_compr_stop_error(compr->stream, SNDRV_PCM_STATE_XRUN); - return -EIO; - } - - count /= WM_ADSP_DATA_WORD_SIZE; - - do { - nwords = wm_adsp_buffer_capture_block(compr, count); - if (nwords < 0) { - adsp_err(dsp, "Failed to capture block: %d\n", nwords); - return nwords; - } - - nbytes = nwords * WM_ADSP_DATA_WORD_SIZE; - - adsp_dbg(dsp, "Read %d bytes\n", nbytes); - - if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) { - adsp_err(dsp, "Failed to copy data to user: %d, %d\n", - ntotal, nbytes); - return -EFAULT; - } - - count -= nwords; - ntotal += nbytes; - } while (nwords > 0 && count > 0); - - compr->copied_total += ntotal; - - return ntotal; -} - -int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf, - size_t count) -{ - struct wm_adsp_compr *compr = stream->runtime->private_data; - struct wm_adsp *dsp = compr->dsp; - int ret; - - mutex_lock(&dsp->pwr_lock); - - if (stream->direction == SND_COMPRESS_CAPTURE) - ret = wm_adsp_compr_read(compr, buf, count); - else - ret = -ENOTSUPP; - - mutex_unlock(&dsp->pwr_lock); - - return ret; -} -EXPORT_SYMBOL_GPL(wm_adsp_compr_copy); - -int wm_adsp2_lock(struct wm_adsp *dsp, unsigned int lock_regions) -{ - struct regmap *regmap = dsp->regmap; - unsigned int code0, code1, lock_reg; - - if (!(lock_regions & WM_ADSP2_REGION_ALL)) - return 0; - - lock_regions &= WM_ADSP2_REGION_ALL; - lock_reg = dsp->base + ADSP2_LOCK_REGION_1_LOCK_REGION_0; - - while (lock_regions) { - code0 = code1 = 0; - if (lock_regions & BIT(0)) { - code0 = ADSP2_LOCK_CODE_0; - code1 = ADSP2_LOCK_CODE_1; - } - if (lock_regions & BIT(1)) { - code0 |= ADSP2_LOCK_CODE_0 << ADSP2_LOCK_REGION_SHIFT; - code1 |= ADSP2_LOCK_CODE_1 << ADSP2_LOCK_REGION_SHIFT; - } - regmap_write(regmap, lock_reg, code0); - regmap_write(regmap, lock_reg, code1); - lock_regions >>= 2; - lock_reg += 2; - } - - return 0; -} -EXPORT_SYMBOL_GPL(wm_adsp2_lock); - -irqreturn_t wm_adsp2_bus_error(struct wm_adsp *dsp) -{ - unsigned int val; - struct regmap *regmap = dsp->regmap; - int ret = 0; - - ret = regmap_read(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, &val); - if (ret) { - adsp_err(dsp, - "Failed to read Region Lock Ctrl register: %d\n", ret); - return IRQ_HANDLED; - } - - if (val & ADSP2_WDT_TIMEOUT_STS_MASK) { - adsp_err(dsp, "watchdog timeout error\n"); - wm_adsp_stop_watchdog(dsp); - } - - if (val & (ADSP2_SLAVE_ERR_MASK | ADSP2_REGION_LOCK_ERR_MASK)) { - if (val & ADSP2_SLAVE_ERR_MASK) - adsp_err(dsp, "bus error: slave error\n"); - else - adsp_err(dsp, "bus error: region lock error\n"); - - ret = regmap_read(regmap, dsp->base + ADSP2_BUS_ERR_ADDR, &val); - if (ret) { - adsp_err(dsp, - "Failed to read Bus Err Addr register: %d\n", - ret); - return IRQ_HANDLED; - } - - adsp_err(dsp, "bus error address = 0x%x\n", - val & ADSP2_BUS_ERR_ADDR_MASK); - - ret = regmap_read(regmap, - dsp->base + ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR, - &val); - if (ret) { - adsp_err(dsp, - "Failed to read Pmem Xmem Err Addr register: %d\n", - ret); - return IRQ_HANDLED; - } - - adsp_err(dsp, "xmem error address = 0x%x\n", - val & ADSP2_XMEM_ERR_ADDR_MASK); - adsp_err(dsp, "pmem error address = 0x%x\n", - (val & ADSP2_PMEM_ERR_ADDR_MASK) >> - ADSP2_PMEM_ERR_ADDR_SHIFT); - } - - regmap_update_bits(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, - ADSP2_CTRL_ERR_EINT, ADSP2_CTRL_ERR_EINT); - - return IRQ_HANDLED; -} -EXPORT_SYMBOL_GPL(wm_adsp2_bus_error); - -static void wm_halo_dump_fault_info(struct wm_adsp *dsp, const char *region, - unsigned int addr, unsigned int status) -{ - unsigned int write = status & HALO_MPU_VIO_ERR_WR_MASK; - unsigned int type = (status & HALO_MPU_VIO_STS_MASK) >> - HALO_MPU_VIO_STS_SHIFT; - unsigned int src = (status & HALO_MPU_VIO_ERR_SRC_MASK) >> - HALO_MPU_VIO_ERR_SRC_SHIFT; - - adsp_warn(dsp, "%s: FAULT_ADDR:0x%x FAULT_STATUS:0x%x %s\n", - region, addr, status, - write ? "write" : "read"); - - switch (src) { - case 0: - adsp_warn(dsp, "%s: SRC=HALO\n", region); - break; - default: - adsp_warn(dsp, "%s: SRC=Requestor%u\n", region, src); - break; - } - - adsp_warn(dsp, "%s: %s %s %s %s %s %s\n", - region, - (type & HALO_MPU_VIO_SRAM) ? "SRAM" : "", - (type & HALO_MPU_VIO_REG) ? "REG" : "", - (type & HALO_MPU_VIO_AHB) ? "AHB" : "", - (type & HALO_MPU_VIO_EREG) ? "EREG" : "", - (type & HALO_MPU_VIO_EXTERNAL_MEM) ? "ExtMem" : "", - (type & HALO_MPU_VIO_NON_EXIST) ? "NotExist" : ""); -} - -irqreturn_t wm_halo_bus_error(struct wm_adsp *dsp) -{ - struct regmap *regmap = dsp->regmap; - unsigned int fault[6], ahb_sts, reg; - int ret; - - mutex_lock(&dsp->pwr_lock); - - /* Ensure we log the fault even if we fail to read the fault info */ - adsp_warn(dsp, "MPU FAULT\n"); - - ret = regmap_read(regmap, dsp->base_sysinfo + HALO_AHBM_WINDOW_DEBUG_1, - &ahb_sts); - if (ret) { - adsp_warn(dsp, "Failed to read AHB DEBUG_1 (%d)\n", ret); - goto exit_unlock; - } - - adsp_warn(dsp, "AHB WINDOW: ADDR: 0x%x STATUS: 0x%x\n", - (ahb_sts & HALO_AHBM_CORE_ERR_ADDR_MASK) >> - HALO_AHBM_CORE_ERR_ADDR_SHIFT, - ahb_sts); - adsp_warn(dsp, "AHB WINDOW: %s %s %s %s\n", - (ahb_sts & HALO_AHBM_ADDR_ERR_MASK) ? "ADDR" : "", - (ahb_sts & HALO_AHBM_LOCKED_ERR_MASK) ? "LOCKED" : "", - (ahb_sts & HALO_AHBM_SIZE_ERR_MASK) ? "SIZE" : "", - (ahb_sts & HALO_AHBM_MODE_ERR_MASK) ? "MODE" : ""); - - ret = regmap_read(regmap, dsp->base_sysinfo + HALO_AHBM_WINDOW_DEBUG_0, - &ahb_sts); - if (ret) { - adsp_warn(dsp, "Failed to read AHB DEBUG_0 (%d)\n", ret); - goto exit_unlock; - } - - adsp_warn(dsp, "AHB SYS_ADDR: 0x%x\n", ahb_sts); - - ret = regmap_bulk_read(regmap, dsp->base + HALO_MPU_XM_VIO_ADDR, - fault, ARRAY_SIZE(fault)); - if (ret) { - adsp_warn(dsp, "Failed to read MPU fault info (%d)\n", ret); - goto exit_unlock; - } - - wm_halo_dump_fault_info(dsp, "XM", fault[0], fault[1]); - wm_halo_dump_fault_info(dsp, "YM", fault[2], fault[3]); - wm_halo_dump_fault_info(dsp, "PM", fault[4], fault[5]); - - /* Clear fault status */ - for (reg = HALO_MPU_XM_VIO_STATUS; reg <= HALO_MPU_PM_VIO_STATUS; - reg += 8) { - ret = regmap_write(regmap, dsp->base + reg, 0); - if (ret) - adsp_warn(dsp, "Failed to clear MPU status @0x%x (%d)\n", - reg, ret); - } - -exit_unlock: - mutex_unlock(&dsp->pwr_lock); - - return IRQ_HANDLED; -} -EXPORT_SYMBOL_GPL(wm_halo_bus_error); - -MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h deleted file mode 100644 index a23fe12f4b0e..000000000000 --- a/sound/soc/codecs/wm_adsp.h +++ /dev/null @@ -1,240 +0,0 @@ -/* - * wm_adsp.h -- Wolfson ADSP support - * - * Copyright 2012 Wolfson Microelectronics plc - * - * Author: Mark Brown - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __WM_ADSP_H -#define __WM_ADSP_H - -#include -#include -#include - -#include "wmfw.h" - -/* Return values for wm_adsp_compr_handle_irq */ -#define WM_ADSP_COMPR_OK 0 -#define WM_ADSP_COMPR_VOICE_TRIGGER 1 -#define WM_ADSP_MAX_CHANNEL_PER_DSP 2 - -#define WM_ADSP2_REGION_0 BIT(0) -#define WM_ADSP2_REGION_1 BIT(1) -#define WM_ADSP2_REGION_2 BIT(2) -#define WM_ADSP2_REGION_3 BIT(3) -#define WM_ADSP2_REGION_4 BIT(4) -#define WM_ADSP2_REGION_5 BIT(5) -#define WM_ADSP2_REGION_6 BIT(6) -#define WM_ADSP2_REGION_7 BIT(7) -#define WM_ADSP2_REGION_8 BIT(8) -#define WM_ADSP2_REGION_9 BIT(9) -#define WM_ADSP2_REGION_1_9 (WM_ADSP2_REGION_1 | \ - WM_ADSP2_REGION_2 | WM_ADSP2_REGION_3 | \ - WM_ADSP2_REGION_4 | WM_ADSP2_REGION_5 | \ - WM_ADSP2_REGION_6 | WM_ADSP2_REGION_7 | \ - WM_ADSP2_REGION_8 | WM_ADSP2_REGION_9) -#define WM_ADSP2_REGION_ALL (WM_ADSP2_REGION_0 | WM_ADSP2_REGION_1_9) - -struct wm_adsp_region { - int type; - unsigned int base; -}; - -struct wm_adsp_alg_region { - struct list_head list; - unsigned int alg; - int type; - unsigned int base; -}; - -struct wm_adsp_compr; -struct wm_adsp_compr_buf; - -struct wm_adsp_buffer_region_def { - unsigned int mem_type; - unsigned int base_offset; - unsigned int size_offset; -}; - -struct wm_adsp_fw_caps { - u32 id; - struct snd_codec_desc desc; - int num_regions; - struct wm_adsp_buffer_region_def *region_defs; -}; - -struct wm_adsp_fw_defs { - const char *file; - const char *binfile; - bool fullname; - int compr_direction; - int num_caps; - struct wm_adsp_fw_caps *caps; - bool voice_trigger; -}; - -struct wm_adsp { - const char *part; - int rev; - int num; - int type; - bool ao_dsp; - const char *suffix; - struct device *dev; - struct regmap *regmap; - struct snd_soc_codec *codec; - - int base; - int base_sysinfo; - int sysclk_reg; - int sysclk_mask; - int sysclk_shift; - - struct list_head alg_regions; - - unsigned int fw_id; - unsigned int fw_id_version; - unsigned int fw_vendor_id; - - const struct wm_adsp_region *mem; - int num_mems; - - int fw; - int fw_ver; - - bool preloaded; - bool booted; - bool running; - - int num_firmwares; - struct wm_adsp_fw_defs *firmwares; - struct snd_kcontrol_new fw_ctrl; - struct soc_enum fw_enum; - - struct list_head ctl_list; - - struct work_struct boot_work; - - int buf_num; - struct wm_adsp_compr *compr[WM_ADSP_MAX_CHANNEL_PER_DSP]; - struct wm_adsp_compr_buf *buffer[WM_ADSP_MAX_CHANNEL_PER_DSP]; - - struct mutex pwr_lock; - - unsigned int lock_regions; - bool unlock_all; - - unsigned int n_rx_channels; - unsigned int n_tx_channels; - - struct mutex *rate_lock; - u8 *rx_rate_cache; - u8 *tx_rate_cache; - -#ifdef CONFIG_DEBUG_FS - struct dentry *debugfs_root; - char *wmfw_file_name; - char *bin_file_name; -#endif - - void (*fwevent_cb)(struct wm_adsp *dsp, int eventid); -}; - -struct wm_adsp_compr { - struct wm_adsp *dsp; - struct wm_adsp_compr_buf *buf; - - struct snd_compr_stream *stream; - struct snd_compressed_buffer size; - - u32 *raw_buf; - unsigned int copied_total; - - unsigned int sample_rate; - bool freed; -}; - -#define WM_ADSP1(wname, num) \ - SND_SOC_DAPM_PGA_E(wname, SND_SOC_NOPM, num, 0, NULL, 0, \ - wm_adsp1_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD) - -#define WM_ADSP2_PRELOAD_SWITCH(wname, num) \ - SOC_SINGLE_EXT(wname " Preload Switch", SND_SOC_NOPM, num, 1, 0, \ - wm_adsp2_preloader_get, wm_adsp2_preloader_put) - -#define WM_ADSP2(wname, num, event_fn) \ - SND_SOC_DAPM_SPK(wname " Preload", NULL), \ -{ .id = snd_soc_dapm_supply, .name = wname " Preloader", \ - .reg = SND_SOC_NOPM, .shift = num, .event = event_fn, \ - .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD, \ - .subseq = 100, /* Ensure we run after SYSCLK supply widget */ }, \ -{ .id = snd_soc_dapm_out_drv, .name = wname, \ - .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp2_event, \ - .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } - -#define WM_HALO(wname, num, event_fn) \ - SND_SOC_DAPM_SPK(wname " Preload", NULL), \ -{ .id = snd_soc_dapm_supply, .name = wname " Preloader", \ - .reg = SND_SOC_NOPM, .shift = num, .event = event_fn, \ - .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD, \ - .subseq = 100, /* Ensure we run after SYSCLK supply widget */ }, \ -{ .id = snd_soc_dapm_out_drv, .name = wname, \ - .reg = SND_SOC_NOPM, .shift = num, .event = wm_halo_event, \ - .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } - -extern const struct snd_kcontrol_new wm_adsp_fw_controls[]; - -int wm_adsp1_init(struct wm_adsp *dsp); -int wm_adsp2_init(struct wm_adsp *dsp); -void wm_adsp2_remove(struct wm_adsp *dsp); -int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec); -int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec); -int wm_halo_init(struct wm_adsp *dsp, struct mutex *rate_lock); -int wm_adsp1_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event); - -int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event, - unsigned int freq); - -int wm_adsp2_lock(struct wm_adsp *adsp, unsigned int regions); -irqreturn_t wm_adsp2_bus_error(struct wm_adsp *adsp); -irqreturn_t wm_halo_bus_error(struct wm_adsp *dsp); - -int wm_adsp2_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event); - -int wm_halo_early_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event); -int wm_halo_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event); - -int wm_adsp2_preloader_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); -int wm_adsp2_preloader_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); - -int wm_adsp_compr_open(struct wm_adsp *dsp, - struct snd_compr_stream *stream, - int channel); -int wm_adsp_compr_free(struct snd_compr_stream *stream); -int wm_adsp_compr_set_params(struct snd_compr_stream *stream, - struct snd_compr_params *params); -int wm_adsp_compr_get_caps(struct snd_compr_stream *stream, - struct snd_compr_caps *caps); -int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd); -int wm_adsp_compr_handle_irq(struct wm_adsp *dsp, int channel); -int wm_adsp_compr_pointer(struct snd_compr_stream *stream, - struct snd_compr_tstamp *tstamp); -int wm_adsp_compr_copy(struct snd_compr_stream *stream, - char __user *buf, size_t count); - -extern int wm_adsp_handle_fw_event(struct wm_adsp *dsp); - -#endif diff --git a/sound/soc/codecs/wmfw.h b/sound/soc/codecs/wmfw.h deleted file mode 100644 index c25dc878d012..000000000000 --- a/sound/soc/codecs/wmfw.h +++ /dev/null @@ -1,202 +0,0 @@ -/* - * wmfw.h - Wolfson firmware format information - * - * Copyright 2012 Wolfson Microelectronics plc - * - * Author: Mark Brown - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __WMFW_H -#define __WMFW_H - -#include - -#define WMFW_MAX_ALG_NAME 256 -#define WMFW_MAX_ALG_DESCR_NAME 256 - -#define WMFW_MAX_COEFF_NAME 256 -#define WMFW_MAX_COEFF_DESCR_NAME 256 - -#define WMFW_CTL_FLAG_SYS 0x8000 -#define WMFW_CTL_FLAG_VOLATILE 0x0004 -#define WMFW_CTL_FLAG_WRITEABLE 0x0002 -#define WMFW_CTL_FLAG_READABLE 0x0001 - -/* Non-ALSA coefficient types start at 0x1000 */ -#define WMFW_CTL_TYPE_ACKED 0x1000 /* acked control */ -#define WMFW_CTL_TYPE_HOSTEVENT 0x1001 /* event control */ -#define WMFW_CTL_TYPE_FWEVENT 0x1004 /* firmware event control */ - -struct wmfw_header { - char magic[4]; - __le32 len; - __le16 rev; - u8 core; - u8 ver; -} __packed; - -struct wmfw_footer { - __le64 timestamp; - __le32 checksum; -} __packed; - -struct wmfw_adsp1_sizes { - __le32 dm; - __le32 pm; - __le32 zm; -} __packed; - -struct wmfw_adsp2_sizes { - __le32 xm; - __le32 ym; - __le32 pm; - __le32 zm; -} __packed; - -struct wmfw_region { - union { - __be32 type; - __le32 offset; - }; - __le32 len; - u8 data[]; -} __packed; - -struct wmfw_id_hdr { - __be32 core_id; - __be32 core_rev; - __be32 id; - __be32 ver; -} __packed; - -struct wmfw_adsp1_id_hdr { - struct wmfw_id_hdr fw; - __be32 zm; - __be32 dm; - __be32 n_algs; -} __packed; - -struct wmfw_adsp2_id_hdr { - struct wmfw_id_hdr fw; - __be32 zm; - __be32 xm; - __be32 ym; - __be32 n_algs; -} __packed; - -struct wmfw_halo_fwid_hdr { - __be32 core_id; - __be32 block_rev; - __be32 vendor_id; - __be32 id; - __be32 ver; -} __packed; - -struct wmfw_halo_id_hdr { - struct wmfw_halo_fwid_hdr fw; - __be32 xm_base; - __be32 xm_size; - __be32 ym_base; - __be32 ym_size; - __be32 n_algs; -} __packed; - -struct wmfw_alg_hdr { - __be32 id; - __be32 ver; -} __packed; - -struct wmfw_adsp1_alg_hdr { - struct wmfw_alg_hdr alg; - __be32 zm; - __be32 dm; -} __packed; - -struct wmfw_adsp2_alg_hdr { - struct wmfw_alg_hdr alg; - __be32 zm; - __be32 xm; - __be32 ym; -} __packed; - -struct wmfw_halo_alg_hdr { - struct wmfw_alg_hdr alg; - __be32 xm_base; - __be32 xm_size; - __be32 ym_base; - __be32 ym_size; -} __packed; - -struct wmfw_adsp_alg_data { - __le32 id; - u8 name[WMFW_MAX_ALG_NAME]; - u8 descr[WMFW_MAX_ALG_DESCR_NAME]; - __le32 ncoeff; - u8 data[]; -} __packed; - -struct wmfw_adsp_coeff_data { - struct { - __le16 offset; - __le16 type; - __le32 size; - } hdr; - u8 name[WMFW_MAX_COEFF_NAME]; - u8 descr[WMFW_MAX_COEFF_DESCR_NAME]; - __le16 ctl_type; - __le16 flags; - __le32 len; - u8 data[]; -} __packed; - -struct wmfw_coeff_hdr { - u8 magic[4]; - __le32 len; - union { - __be32 rev; - __le32 ver; - }; - union { - __be32 core; - __le32 core_ver; - }; - u8 data[]; -} __packed; - -struct wmfw_coeff_item { - __le16 offset; - __le16 type; - __le32 id; - __le32 ver; - __le32 sr; - __le32 len; - u8 data[]; -} __packed; - -#define WMFW_ADSP1 1 -#define WMFW_ADSP2 2 -#define WMFW_HALO 4 - -#define WMFW_ABSOLUTE 0xf0 -#define WMFW_ALGORITHM_DATA 0xf2 -#define WMFW_NAME_TEXT 0xfe -#define WMFW_INFO_TEXT 0xff - -#define WMFW_ADSP1_PM 2 -#define WMFW_ADSP1_DM 3 -#define WMFW_ADSP1_ZM 4 - -#define WMFW_ADSP2_PM 2 -#define WMFW_ADSP2_ZM 4 -#define WMFW_ADSP2_XM 5 -#define WMFW_ADSP2_YM 6 - -#define WMFW_HALO_PM_PACKED 0x10 -#define WMFW_HALO_XM_PACKED 0x11 -#define WMFW_HALO_YM_PACKED 0x12 - -#endif