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staging: comedi: amplc_dio200_common: introduce DIO200_CLK_SEL() macro

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Replace the DIO200_[XYZ]CLK_SEL defines with a macro that returns the
correct register offset.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2015-02-23 14:57:54 -07:00 • committed by Greg Kroah-Hartman
commit 1ec7271dbc
1 changed files with 2 additions and 4 deletions
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6
drivers/staging/comedi/drivers/amplc_dio200_common.c
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@ -32,9 +32,7 @@
/* 200 series registers */
#define DIO200_IO_SIZE 0x20
#define DIO200_PCIE_IO_SIZE 0x4000
#define DIO200_XCLK_SCE 0x18 /* Group X clock selection register */
#define DIO200_YCLK_SCE 0x19 /* Group Y clock selection register */
#define DIO200_ZCLK_SCE 0x1a /* Group Z clock selection register */
#define DIO200_CLK_SCE(x) (0x18 + (x)) /* Group X/Y/Z clock sel reg */
#define DIO200_XGAT_SCE 0x1b /* Group X gate selection register */
#define DIO200_YGAT_SCE 0x1c /* Group Y gate selection register */
#define DIO200_ZGAT_SCE 0x1d /* Group Z gate selection register */
@ -733,7 +731,7 @@ static int dio200_subdev_8254_init(struct comedi_device *dev,
if (board->has_clk_gat_sce) {
/* Derive CLK_SCE and GAT_SCE register offsets from
* 8254 offset. */
subpriv->clk_sce_ofs = DIO200_XCLK_SCE + (offset >> 3);
subpriv->clk_sce_ofs = DIO200_CLK_SCE(offset >> 3);
subpriv->gat_sce_ofs = DIO200_XGAT_SCE + (offset >> 3);
subpriv->which = (offset >> 2) & 1;
}