From e3688042c0435ea89fab616b89b44d1f0c248295 Mon Sep 17 00:00:00 2001 From: Rajkumar Subbiah Date: Fri, 14 Jul 2017 16:53:28 -0400 Subject: [PATCH 1/2] clk: qcom: Add support for divider flags and table The clk-divider module in the clock framework provides support for different kinds of dividers such as power-of-two and discrete table based dividers. clk-regmap-divider module which adds regmap support to the clk-divider doesn't handle the flags and table parameters in the clk-divider that enables these divider types. This change adds those two parameters to the clk-regmap-divider struct and passes them to the clk-divider appropriately. Change-Id: I0f9a923a62786b19264c45bbcf2400292ed7e61f Signed-off-by: Rajkumar Subbiah --- drivers/clk/qcom/clk-regmap-divider.c | 18 +++++++++++------- drivers/clk/qcom/clk-regmap-divider.h | 12 +++++++----- 2 files changed, 18 insertions(+), 12 deletions(-) diff --git a/drivers/clk/qcom/clk-regmap-divider.c b/drivers/clk/qcom/clk-regmap-divider.c index 63c9fca0d65d..650f8e186ec6 100644 --- a/drivers/clk/qcom/clk-regmap-divider.c +++ b/drivers/clk/qcom/clk-regmap-divider.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2014, The Linux Foundation. All rights reserved. + * Copyright (c) 2014, 2016-2019, The Linux Foundation. All rights reserved. */ #include @@ -35,8 +35,10 @@ static long div_round_rate(struct clk_hw *hw, unsigned long rate, { struct clk_regmap_div *divider = to_clk_regmap_div(hw); - return divider_round_rate(hw, rate, prate, NULL, divider->width, - CLK_DIVIDER_ROUND_CLOSEST); + return divider_round_rate(hw, rate, prate, divider->table, + divider->width, + CLK_DIVIDER_ROUND_CLOSEST | + divider->flags); } static int div_set_rate(struct clk_hw *hw, unsigned long rate, @@ -46,8 +48,9 @@ static int div_set_rate(struct clk_hw *hw, unsigned long rate, struct clk_regmap *clkr = ÷r->clkr; u32 div; - div = divider_get_val(rate, parent_rate, NULL, divider->width, - CLK_DIVIDER_ROUND_CLOSEST); + div = divider_get_val(rate, parent_rate, divider->table, + divider->width, CLK_DIVIDER_ROUND_CLOSEST | + divider->flags); return regmap_update_bits(clkr->regmap, divider->reg, (BIT(divider->width) - 1) << divider->shift, @@ -65,8 +68,9 @@ static unsigned long div_recalc_rate(struct clk_hw *hw, div >>= divider->shift; div &= BIT(divider->width) - 1; - return divider_recalc_rate(hw, parent_rate, div, NULL, - CLK_DIVIDER_ROUND_CLOSEST, divider->width); + return divider_recalc_rate(hw, parent_rate, div, divider->table, + CLK_DIVIDER_ROUND_CLOSEST | divider->flags, + divider->width); } const struct clk_ops clk_regmap_div_ops = { diff --git a/drivers/clk/qcom/clk-regmap-divider.h b/drivers/clk/qcom/clk-regmap-divider.h index e75a65c3839c..fed1de2fded4 100644 --- a/drivers/clk/qcom/clk-regmap-divider.h +++ b/drivers/clk/qcom/clk-regmap-divider.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2014, The Linux Foundation. All rights reserved. + * Copyright (c) 2014, 2016-2019, The Linux Foundation. All rights reserved. */ #ifndef __QCOM_CLK_REGMAP_DIVIDER_H__ @@ -10,10 +10,12 @@ #include "clk-regmap.h" struct clk_regmap_div { - u32 reg; - u32 shift; - u32 width; - struct clk_regmap clkr; + u32 reg; + u32 shift; + u32 width; + u32 flags; + const struct clk_div_table *table; + struct clk_regmap clkr; }; extern const struct clk_ops clk_regmap_div_ops; From 4f67668b53fe365793385ea02d5d28efca2fdf05 Mon Sep 17 00:00:00 2001 From: David Collins Date: Fri, 19 Jul 2019 17:07:32 -0700 Subject: [PATCH 2/2] clk: qcom: define vdd_levels enum and vdd_corner[] map Define a vdd_levels enum and vdd_corner[] mapping table which can be used by clock controller drivers to configure the vdd_class associated with their clocks. Change-Id: Ia0c2ed35f7c87cc3dc9947844625a463745e2ac5 Signed-off-by: David Collins --- drivers/clk/qcom/vdd-level.h | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 drivers/clk/qcom/vdd-level.h diff --git a/drivers/clk/qcom/vdd-level.h b/drivers/clk/qcom/vdd-level.h new file mode 100644 index 000000000000..aa74ae57d530 --- /dev/null +++ b/drivers/clk/qcom/vdd-level.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (c) 2019, The Linux Foundation. All rights reserved. */ + +#ifndef __DRIVERS_CLK_QCOM_VDD_LEVEL_H +#define __DRIVERS_CLK_QCOM_VDD_LEVEL_H + +#include +#include + +enum vdd_levels { + VDD_NONE, + VDD_MIN, /* MIN_SVS */ + VDD_LOWER, /* LOW_SVS / SVS2 */ + VDD_LOW, /* SVS */ + VDD_LOW_L1, /* SVS_L1 */ + VDD_NOMINAL, /* NOM */ + VDD_HIGH, /* TURBO */ + VDD_NUM, +}; + +static int vdd_corner[] = { + [VDD_NONE] = 0, + [VDD_MIN] = RPMH_REGULATOR_LEVEL_MIN_SVS, + [VDD_LOWER] = RPMH_REGULATOR_LEVEL_LOW_SVS, + [VDD_LOW] = RPMH_REGULATOR_LEVEL_SVS, + [VDD_LOW_L1] = RPMH_REGULATOR_LEVEL_SVS_L1, + [VDD_NOMINAL] = RPMH_REGULATOR_LEVEL_NOM, + [VDD_HIGH] = RPMH_REGULATOR_LEVEL_TURBO, +}; + +#endif