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Merge branch '2_6_32_for_next' of git://git.pwsan.com/linux-2.6 into for-next

Browse source
This commit is contained in:
Tony Lindgren 2009-09-03 10:17:39 -07:00
commit 1f685b36db
36 changed files with 4333 additions and 135 deletions
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7
arch/arm/mach-omap2/Makefile
View file

@ -5,7 +5,7 @@
# Common support
obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
omap-2-3-common = irq.o sdrc.o
omap-2-3-common = irq.o sdrc.o omap_hwmod.o
prcm-common = prcm.o powerdomain.o
clock-common = clock.o clockdomain.o
@ -35,6 +35,11 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
endif
# PRCM
obj-$(CONFIG_ARCH_OMAP2) += cm.o
obj-$(CONFIG_ARCH_OMAP3) += cm.o
obj-$(CONFIG_ARCH_OMAP4) += cm4xxx.o
# Clock framework
obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o
obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o

17
arch/arm/mach-omap2/board-2430sdp.c
View file

@ -139,17 +139,18 @@ static inline void board_smc91x_init(void)
#endif
static void __init omap_2430sdp_init_irq(void)
{
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
}
static struct omap_board_config_kernel sdp2430_config[] = {
{OMAP_TAG_LCD, &sdp2430_lcd_config},
};
static void __init omap_2430sdp_init_irq(void)
{
omap_board_config = sdp2430_config;
omap_board_config_size = ARRAY_SIZE(sdp2430_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
}
static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
@ -200,8 +201,6 @@ static void __init omap_2430sdp_init(void)
omap2430_i2c_init();
platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
omap_board_config = sdp2430_config;
omap_board_config_size = ARRAY_SIZE(sdp2430_config);
omap_serial_init();
twl4030_mmc_init(mmc);
usb_musb_init();

18
arch/arm/mach-omap2/board-3430sdp.c
View file

@ -167,13 +167,6 @@ static struct platform_device *sdp3430_devices[] __initdata = {
&sdp3430_lcd_device,
};
static void __init omap_3430sdp_init_irq(void)
{
omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
omap_init_irq();
omap_gpio_init();
}
static struct omap_lcd_config sdp3430_lcd_config __initdata = {
.ctrl_name = "internal",
};
@ -182,6 +175,15 @@ static struct omap_board_config_kernel sdp3430_config[] __initdata = {
{ OMAP_TAG_LCD, &sdp3430_lcd_config },
};
static void __init omap_3430sdp_init_irq(void)
{
omap_board_config = sdp3430_config;
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
omap_init_irq();
omap_gpio_init();
}
static int sdp3430_batt_table[] = {
/* 0 C*/
30800, 29500, 28300, 27100,
@ -482,8 +484,6 @@ static void __init omap_3430sdp_init(void)
{
omap3430_i2c_init();
platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
omap_board_config = sdp3430_config;
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
if (omap_rev() > OMAP3430_REV_ES1_0)
ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
else

20
arch/arm/mach-omap2/board-apollon.c
View file

@ -248,14 +248,6 @@ out:
clk_put(gpmc_fck);
}
static void __init omap_apollon_init_irq(void)
{
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
apollon_init_smc91x();
}
static struct omap_usb_config apollon_usb_config __initdata = {
.register_dev = 1,
.hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */
@ -271,6 +263,16 @@ static struct omap_board_config_kernel apollon_config[] = {
{ OMAP_TAG_LCD, &apollon_lcd_config },
};
static void __init omap_apollon_init_irq(void)
{
omap_board_config = apollon_config;
omap_board_config_size = ARRAY_SIZE(apollon_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
apollon_init_smc91x();
}
static void __init apollon_led_init(void)
{
/* LED0 - AA10 */
@ -319,8 +321,6 @@ static void __init omap_apollon_init(void)
* if not needed.
*/
platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices));
omap_board_config = apollon_config;
omap_board_config_size = ARRAY_SIZE(apollon_config);
omap_serial_init();
}

10
arch/arm/mach-omap2/board-generic.c
View file

@ -31,19 +31,19 @@
#include <mach/board.h>
#include <mach/common.h>
static struct omap_board_config_kernel generic_config[] = {
};
static void __init omap_generic_init_irq(void)
{
omap_board_config = generic_config;
omap_board_config_size = ARRAY_SIZE(generic_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
}
static struct omap_board_config_kernel generic_config[] = {
};
static void __init omap_generic_init(void)
{
omap_board_config = generic_config;
omap_board_config_size = ARRAY_SIZE(generic_config);
omap_serial_init();
}

20
arch/arm/mach-omap2/board-h4.c
View file

@ -268,14 +268,6 @@ static void __init h4_init_flash(void)
h4_flash_resource.end = base + SZ_64M - 1;
}
static void __init omap_h4_init_irq(void)
{
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
h4_init_flash();
}
static struct omap_lcd_config h4_lcd_config __initdata = {
.ctrl_name = "internal",
};
@ -317,6 +309,16 @@ static struct omap_board_config_kernel h4_config[] = {
{ OMAP_TAG_LCD, &h4_lcd_config },
};
static void __init omap_h4_init_irq(void)
{
omap_board_config = h4_config;
omap_board_config_size = ARRAY_SIZE(h4_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
h4_init_flash();
}
static struct at24_platform_data m24c01 = {
.byte_len = SZ_1K / 8,
.page_size = 16,
@ -361,8 +363,6 @@ static void __init omap_h4_init(void)
ARRAY_SIZE(h4_i2c_board_info));
platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
omap_board_config = h4_config;
omap_board_config_size = ARRAY_SIZE(h4_config);
omap_usb_init(&h4_usb_config);
omap_serial_init();
}

20
arch/arm/mach-omap2/board-ldp.c
View file

@ -268,14 +268,6 @@ static inline void __init ldp_init_smsc911x(void)
gpio_direction_input(eth_gpio);
}
static void __init omap_ldp_init_irq(void)
{
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
ldp_init_smsc911x();
}
static struct platform_device ldp_lcd_device = {
.name = "ldp_lcd",
.id = -1,
@ -289,6 +281,16 @@ static struct omap_board_config_kernel ldp_config[] __initdata = {
{ OMAP_TAG_LCD, &ldp_lcd_config },
};
static void __init omap_ldp_init_irq(void)
{
omap_board_config = ldp_config;
omap_board_config_size = ARRAY_SIZE(ldp_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
ldp_init_smsc911x();
}
static struct twl4030_usb_data ldp_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
@ -372,8 +374,6 @@ static void __init omap_ldp_init(void)
{
omap_i2c_init();
platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices));
omap_board_config = ldp_config;
omap_board_config_size = ARRAY_SIZE(ldp_config);
ts_gpio = 54;
ldp_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
spi_register_board_info(ldp_spi_board_info,

26
arch/arm/mach-omap2/board-omap3beagle.c
View file

@ -281,17 +281,6 @@ static int __init omap3_beagle_i2c_init(void)
return 0;
}
static void __init omap3_beagle_init_irq(void)
{
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
omap_gpio_init();
}
static struct gpio_led gpio_leds[] = {
{
.name = "beagleboard::usr0",
@ -349,6 +338,19 @@ static struct omap_board_config_kernel omap3_beagle_config[] __initdata = {
{ OMAP_TAG_LCD, &omap3_beagle_lcd_config },
};
static void __init omap3_beagle_init_irq(void)
{
omap_board_config = omap3_beagle_config;
omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
#ifdef CONFIG_OMAP_32K_TIMER
omap2_gp_clockevent_set_gptimer(12);
#endif
omap_gpio_init();
}
static struct platform_device *omap3_beagle_devices[] __initdata = {
&omap3_beagle_lcd_device,
&leds_gpio,
@ -398,8 +400,6 @@ static void __init omap3_beagle_init(void)
omap3_beagle_i2c_init();
platform_add_devices(omap3_beagle_devices,
ARRAY_SIZE(omap3_beagle_devices));
omap_board_config = omap3_beagle_config;
omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
omap_serial_init();
omap_cfg_reg(J25_34XX_GPIO170);

12
arch/arm/mach-omap2/board-omap3evm.c
View file

@ -274,18 +274,20 @@ struct spi_board_info omap3evm_spi_board_info[] = {
},
};
static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
{ OMAP_TAG_LCD, &omap3_evm_lcd_config },
};
static void __init omap3_evm_init_irq(void)
{
omap_board_config = omap3_evm_config;
omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL);
omap_init_irq();
omap_gpio_init();
omap3evm_init_smc911x();
}
static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
{ OMAP_TAG_LCD, &omap3_evm_lcd_config },
};
static struct platform_device *omap3_evm_devices[] __initdata = {
&omap3_evm_lcd_device,
&omap3evm_smc911x_device,
@ -296,8 +298,6 @@ static void __init omap3_evm_init(void)
omap3_evm_i2c_init();
platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices));
omap_board_config = omap3_evm_config;
omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
spi_register_board_info(omap3evm_spi_board_info,
ARRAY_SIZE(omap3evm_spi_board_info));

20
arch/arm/mach-omap2/board-omap3pandora.c
View file

@ -305,14 +305,6 @@ static int __init omap3pandora_i2c_init(void)
return 0;
}
static void __init omap3pandora_init_irq(void)
{
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
omap_gpio_init();
}
static void __init omap3pandora_ads7846_init(void)
{
int gpio = OMAP3_PANDORA_TS_GPIO;
@ -375,6 +367,16 @@ static struct omap_board_config_kernel omap3pandora_config[] __initdata = {
{ OMAP_TAG_LCD, &omap3pandora_lcd_config },
};
static void __init omap3pandora_init_irq(void)
{
omap_board_config = omap3pandora_config;
omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
omap_gpio_init();
}
static struct platform_device *omap3pandora_devices[] __initdata = {
&omap3pandora_lcd_device,
&pandora_leds_gpio,
@ -386,8 +388,6 @@ static void __init omap3pandora_init(void)
omap3pandora_i2c_init();
platform_add_devices(omap3pandora_devices,
ARRAY_SIZE(omap3pandora_devices));
omap_board_config = omap3pandora_config;
omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
omap_serial_init();
spi_register_board_info(omap3pandora_spi_board_info,
ARRAY_SIZE(omap3pandora_spi_board_info));

20
arch/arm/mach-omap2/board-overo.c
View file

@ -357,14 +357,6 @@ static int __init overo_i2c_init(void)
return 0;
}
static void __init overo_init_irq(void)
{
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
omap_gpio_init();
}
static struct platform_device overo_lcd_device = {
.name = "overo_lcd",
.id = -1,
@ -378,6 +370,16 @@ static struct omap_board_config_kernel overo_config[] __initdata = {
{ OMAP_TAG_LCD, &overo_lcd_config },
};
static void __init overo_init_irq(void)
{
omap_board_config = overo_config;
omap_board_config_size = ARRAY_SIZE(overo_config);
omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
omap_init_irq();
omap_gpio_init();
}
static struct platform_device *overo_devices[] __initdata = {
&overo_lcd_device,
};
@ -386,8 +388,6 @@ static void __init overo_init(void)
{
overo_i2c_init();
platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices));
omap_board_config = overo_config;
omap_board_config_size = ARRAY_SIZE(overo_config);
omap_serial_init();
overo_flash_init();
usb_musb_init();

4
arch/arm/mach-omap2/board-rx51.c
View file

@ -56,6 +56,8 @@ static struct omap_board_config_kernel rx51_config[] = {
static void __init rx51_init_irq(void)
{
omap_board_config = rx51_config;
omap_board_config_size = ARRAY_SIZE(rx51_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
@ -65,8 +67,6 @@ extern void __init rx51_peripherals_init(void);
static void __init rx51_init(void)
{
omap_board_config = rx51_config;
omap_board_config_size = ARRAY_SIZE(rx51_config);
omap_serial_init();
usb_musb_init();
rx51_peripherals_init();

18
arch/arm/mach-omap2/board-zoom2.c
View file

@ -90,13 +90,6 @@ static struct twl4030_keypad_data zoom2_kp_twl4030_data = {
.rep = 1,
};
static void __init omap_zoom2_init_irq(void)
{
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
}
static struct omap_board_config_kernel zoom2_config[] __initdata = {
};
@ -212,6 +205,15 @@ static struct twl4030_usb_data zoom2_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static void __init omap_zoom2_init_irq(void)
{
omap_board_config = zoom2_config;
omap_board_config_size = ARRAY_SIZE(zoom2_config);
omap2_init_common_hw(NULL, NULL);
omap_init_irq();
omap_gpio_init();
}
static struct twl4030_gpio_platform_data zoom2_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
@ -262,8 +264,6 @@ extern int __init omap_zoom2_debugboard_init(void);
static void __init omap_zoom2_init(void)
{
omap_i2c_init();
omap_board_config = zoom2_config;
omap_board_config_size = ARRAY_SIZE(zoom2_config);
omap_serial_init();
omap_zoom2_debugboard_init();
usb_musb_init();

17
arch/arm/mach-omap2/clock34xx.c
View file

@ -27,6 +27,7 @@
#include <linux/limits.h>
#include <linux/bitops.h>
#include <mach/cpu.h>
#include <mach/clock.h>
#include <mach/sram.h>
#include <asm/div64.h>
@ -1067,17 +1068,17 @@ static int __init omap2_clk_arch_init(void)
return -EINVAL;
/* REVISIT: not yet ready for 343x */
#if 0
if (clk_set_rate(&virt_prcm_set, mpurate))
printk(KERN_ERR "Could not find matching MPU rate\n");
#endif
if (clk_set_rate(&dpll1_ck, mpurate))
printk(KERN_ERR "*** Unable to set MPU rate\n");
recalculate_root_clocks();
printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): "
printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
"%ld.%01ld/%ld/%ld MHz\n",
(osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
(core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
(osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10),
(core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ;
calibrate_delay();
return 0;
}
@ -1136,7 +1137,7 @@ int __init omap2_clk_init(void)
recalculate_root_clocks();
printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): "
"%ld.%01ld/%ld/%ld MHz\n",
(osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
(core_ck.rate / 1000000), (arm_fck.rate / 1000000));

21
arch/arm/mach-omap2/clock34xx.h
View file

@ -1020,6 +1020,7 @@ static struct clk arm_fck = {
.clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
.clksel_mask = OMAP3430_ST_MPU_CLK_MASK,
.clksel = arm_fck_clksel,
.clkdm_name = "mpu_clkdm",
.recalc = &omap2_clksel_recalc,
};
@ -1155,7 +1156,6 @@ static struct clk gfx_cg1_ck = {
.name = "gfx_cg1_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &gfx_l3_fck, /* REVISIT: correct? */
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
.enable_bit = OMAP3430ES1_EN_2D_SHIFT,
.clkdm_name = "gfx_3430es1_clkdm",
@ -1166,7 +1166,6 @@ static struct clk gfx_cg2_ck = {
.name = "gfx_cg2_ck",
.ops = &clkops_omap2_dflt_wait,
.parent = &gfx_l3_fck, /* REVISIT: correct? */
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
.enable_bit = OMAP3430ES1_EN_3D_SHIFT,
.clkdm_name = "gfx_3430es1_clkdm",
@ -1210,7 +1209,6 @@ static struct clk sgx_ick = {
.name = "sgx_ick",
.ops = &clkops_omap2_dflt_wait,
.parent = &l3_ick,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN),
.enable_bit = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT,
.clkdm_name = "sgx_clkdm",
@ -1223,7 +1221,6 @@ static struct clk d2d_26m_fck = {
.name = "d2d_26m_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &sys_ck,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430ES1_EN_D2D_SHIFT,
.clkdm_name = "d2d_clkdm",
@ -1234,7 +1231,6 @@ static struct clk modem_fck = {
.name = "modem_fck",
.ops = &clkops_omap2_dflt_wait,
.parent = &sys_ck,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_MODEM_SHIFT,
.clkdm_name = "d2d_clkdm",
@ -1622,7 +1618,6 @@ static struct clk core_l3_ick = {
.name = "core_l3_ick",
.ops = &clkops_null,
.parent = &l3_ick,
.init = &omap2_init_clk_clkdm,
.clkdm_name = "core_l3_clkdm",
.recalc = &followparent_recalc,
};
@ -1691,7 +1686,6 @@ static struct clk core_l4_ick = {
.name = "core_l4_ick",
.ops = &clkops_null,
.parent = &l4_ick,
.init = &omap2_init_clk_clkdm,
.clkdm_name = "core_l4_clkdm",
.recalc = &followparent_recalc,
};
@ -2089,7 +2083,6 @@ static struct clk dss_tv_fck = {
.name = "dss_tv_fck",
.ops = &clkops_omap2_dflt,
.parent = &omap_54m_fck,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_TV_SHIFT,
.clkdm_name = "dss_clkdm",
@ -2100,7 +2093,6 @@ static struct clk dss_96m_fck = {
.name = "dss_96m_fck",
.ops = &clkops_omap2_dflt,
.parent = &omap_96m_fck,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_TV_SHIFT,
.clkdm_name = "dss_clkdm",
@ -2111,7 +2103,6 @@ static struct clk dss2_alwon_fck = {
.name = "dss2_alwon_fck",
.ops = &clkops_omap2_dflt,
.parent = &sys_ck,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_DSS2_SHIFT,
.clkdm_name = "dss_clkdm",
@ -2123,7 +2114,6 @@ static struct clk dss_ick_3430es1 = {
.name = "dss_ick",
.ops = &clkops_omap2_dflt,
.parent = &l4_ick,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
.enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
.clkdm_name = "dss_clkdm",
@ -2135,7 +2125,6 @@ static struct clk dss_ick_3430es2 = {
.name = "dss_ick",
.ops = &clkops_omap3430es2_dss_usbhost_wait,
.parent = &l4_ick,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
.enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
.clkdm_name = "dss_clkdm",
@ -2159,7 +2148,6 @@ static struct clk cam_ick = {
.name = "cam_ick",
.ops = &clkops_omap2_dflt,
.parent = &l4_ick,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
.enable_bit = OMAP3430_EN_CAM_SHIFT,
.clkdm_name = "cam_clkdm",
@ -2170,7 +2158,6 @@ static struct clk csi2_96m_fck = {
.name = "csi2_96m_fck",
.ops = &clkops_omap2_dflt,
.parent = &core_96m_fck,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_CSI2_SHIFT,
.clkdm_name = "cam_clkdm",
@ -2183,7 +2170,6 @@ static struct clk usbhost_120m_fck = {
.name = "usbhost_120m_fck",
.ops = &clkops_omap2_dflt,
.parent = &dpll5_m2_ck,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
.enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT,
.clkdm_name = "usbhost_clkdm",
@ -2194,7 +2180,6 @@ static struct clk usbhost_48m_fck = {
.name = "usbhost_48m_fck",
.ops = &clkops_omap3430es2_dss_usbhost_wait,
.parent = &omap_48m_fck,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
.enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT,
.clkdm_name = "usbhost_clkdm",
@ -2206,7 +2191,6 @@ static struct clk usbhost_ick = {
.name = "usbhost_ick",
.ops = &clkops_omap3430es2_dss_usbhost_wait,
.parent = &l4_ick,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN),
.enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT,
.clkdm_name = "usbhost_clkdm",
@ -2268,7 +2252,6 @@ static struct clk gpt1_fck = {
static struct clk wkup_32k_fck = {
.name = "wkup_32k_fck",
.ops = &clkops_null,
.init = &omap2_init_clk_clkdm,
.parent = &omap_32k_fck,
.clkdm_name = "wkup_clkdm",
.recalc = &followparent_recalc,
@ -2383,7 +2366,6 @@ static struct clk per_96m_fck = {
.name = "per_96m_fck",
.ops = &clkops_null,
.parent = &omap_96m_alwon_fck,
.init = &omap2_init_clk_clkdm,
.clkdm_name = "per_clkdm",
.recalc = &followparent_recalc,
};
@ -2392,7 +2374,6 @@ static struct clk per_48m_fck = {
.name = "per_48m_fck",
.ops = &clkops_null,
.parent = &omap_48m_fck,
.init = &omap2_init_clk_clkdm,
.clkdm_name = "per_clkdm",
.recalc = &followparent_recalc,
};

70
arch/arm/mach-omap2/cm.c Normal file
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@ -0,0 +1,70 @@
/*
* OMAP2/3 CM module functions
*
* Copyright (C) 2009 Nokia Corporation
* Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/io.h>
#include <asm/atomic.h>
#include "cm.h"
#include "cm-regbits-24xx.h"
#include "cm-regbits-34xx.h"
/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */
#define MAX_MODULE_READY_TIME 20000
static const u8 cm_idlest_offs[] = {
CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
};
/**
* omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby
* @prcm_mod: PRCM module offset
* @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
*
* XXX document
*/
int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
{
int ena = 0, i = 0;
u8 cm_idlest_reg;
u32 mask;
if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs)))
return -EINVAL;
cm_idlest_reg = cm_idlest_offs[idlest_id - 1];
if (cpu_is_omap24xx())
ena = idlest_shift;
else if (cpu_is_omap34xx())
ena = 0;
else
BUG();
mask = 1 << idlest_shift;
/* XXX should be OMAP2 CM */
while (((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) != ena) &&
(i++ < MAX_MODULE_READY_TIME))
udelay(1);
return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
}

4
arch/arm/mach-omap2/cm.h
View file

@ -98,6 +98,10 @@ extern u32 cm_read_mod_reg(s16 module, u16 idx);
extern void cm_write_mod_reg(u32 val, s16 module, u16 idx);
extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
u8 idlest_shift);
extern int omap4_cm_wait_module_ready(u32 prcm_mod, u8 prcm_dev_offs);
static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
{
return cm_rmw_mod_reg_bits(bits, bits, module, idx);

68
arch/arm/mach-omap2/cm4xxx.c Normal file
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@ -0,0 +1,68 @@
/*
* OMAP4 CM module functions
*
* Copyright (C) 2009 Nokia Corporation
* Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/io.h>
#include <asm/atomic.h>
#include "cm.h"
#include "cm-regbits-4xxx.h"
/* XXX move this to cm.h */
/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */
#define MAX_MODULE_READY_TIME 20000
/*
* OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK: isolates the IDLEST field in the
* CM_CLKCTRL register.
*/
#define OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK (0x2 << 16)
/*
* OMAP4 prcm_mod u32 fields contain packed data: the CM ID in bit 16 and
* the PRCM module offset address (from the CM module base) in bits 15-0.
*/
#define OMAP4_PRCM_MOD_CM_ID_SHIFT 16
#define OMAP4_PRCM_MOD_OFFS_MASK 0xffff
/**
* omap4_cm_wait_idlest_ready - wait for a module to leave idle or standby
* @prcm_mod: PRCM module offset (XXX example)
* @prcm_dev_offs: PRCM device offset (e.g. MCASP XXX example)
*
* XXX document
*/
int omap4_cm_wait_idlest_ready(u32 prcm_mod, u8 prcm_dev_offs)
{
int i = 0;
u8 cm_id;
u16 prcm_mod_offs;
u32 mask = OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK;
cm_id = prcm_mod >> OMAP4_PRCM_MOD_CM_ID_SHIFT;
prcm_mod_offs = prcm_mod & OMAP4_PRCM_MOD_OFFS_MASK;
while (((omap4_cm_read_mod_reg(cm_id, prcm_mod_offs, prcm_dev_offs,
OMAP4_CM_CLKCTRL_DREG) & mask) != 0) &&
(i++ < MAX_MODULE_READY_TIME))
udelay(1);
return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
}

23
arch/arm/mach-omap2/io.c
View file

@ -32,17 +32,23 @@
#include <mach/sram.h>
#include <mach/sdrc.h>
#include <mach/gpmc.h>
#include <mach/serial.h>
#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */
#include "clock.h"
#include <mach/omap-pm.h>
#include <mach/powerdomain.h>
#include "powerdomains.h"
#include <mach/clockdomain.h>
#include "clockdomains.h"
#endif
#include <mach/omap_hwmod.h>
#include "omap_hwmod_2420.h"
#include "omap_hwmod_2430.h"
#include "omap_hwmod_34xx.h"
/*
* The machine specific code may provide the extra mapping besides the
* default mapping provided here.
@ -279,11 +285,26 @@ static int __init _omap2_init_reprogram_sdrc(void)
void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
struct omap_sdrc_params *sdrc_cs1)
{
struct omap_hwmod **hwmods = NULL;
if (cpu_is_omap2420())
hwmods = omap2420_hwmods;
else if (cpu_is_omap2430())
hwmods = omap2430_hwmods;
else if (cpu_is_omap34xx())
hwmods = omap34xx_hwmods;
omap_hwmod_init(hwmods);
omap2_mux_init();
#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
/* The OPP tables have to be registered before a clk init */
omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
pwrdm_init(powerdomains_omap);
clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
omap2_clk_init();
omap_serial_early_init();
omap_hwmod_late_init();
omap_pm_if_init();
omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
_omap2_init_reprogram_sdrc();
#endif

1554
arch/arm/mach-omap2/omap_hwmod.c Normal file
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File diff suppressed because it is too large Load diff

141
arch/arm/mach-omap2/omap_hwmod_2420.h Normal file
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@ -0,0 +1,141 @@
/*
* omap_hwmod_2420.h - hardware modules present on the OMAP2420 chips
*
* Copyright (C) 2009 Nokia Corporation
* Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* XXX handle crossbar/shared link difference for L3?
*
*/
#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H
#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H
#ifdef CONFIG_ARCH_OMAP2420
#include <mach/omap_hwmod.h>
#include <mach/irqs.h>
#include <mach/cpu.h>
#include <mach/dma.h>
#include "prm-regbits-24xx.h"
static struct omap_hwmod omap2420_mpu_hwmod;
static struct omap_hwmod omap2420_l3_hwmod;
static struct omap_hwmod omap2420_l4_core_hwmod;
/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap2420_l3__l4_core = {
.master = &omap2420_l3_hwmod,
.slave = &omap2420_l4_core_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* MPU -> L3 interface */
static struct omap_hwmod_ocp_if omap2420_mpu__l3 = {
.master = &omap2420_mpu_hwmod,
.slave = &omap2420_l3_hwmod,
.user = OCP_USER_MPU,
};
/* Slave interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap2420_l3_slaves[] = {
&omap2420_mpu__l3,
};
/* Master interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap2420_l3_masters[] = {
&omap2420_l3__l4_core,
};
/* L3 */
static struct omap_hwmod omap2420_l3_hwmod = {
.name = "l3_hwmod",
.masters = omap2420_l3_masters,
.masters_cnt = ARRAY_SIZE(omap2420_l3_masters),
.slaves = omap2420_l3_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_l3_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
};
static struct omap_hwmod omap2420_l4_wkup_hwmod;
/* L4_CORE -> L4_WKUP interface */
static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
.master = &omap2420_l4_core_hwmod,
.slave = &omap2420_l4_wkup_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
&omap2420_l3__l4_core,
};
/* Master interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
&omap2420_l4_core__l4_wkup,
};
/* L4 CORE */
static struct omap_hwmod omap2420_l4_core_hwmod = {
.name = "l4_core_hwmod",
.masters = omap2420_l4_core_masters,
.masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters),
.slaves = omap2420_l4_core_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
};
/* Slave interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = {
&omap2420_l4_core__l4_wkup,
};
/* Master interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = {
};
/* L4 WKUP */
static struct omap_hwmod omap2420_l4_wkup_hwmod = {
.name = "l4_wkup_hwmod",
.masters = omap2420_l4_wkup_masters,
.masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters),
.slaves = omap2420_l4_wkup_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
};
/* Master interfaces on the MPU device */
static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = {
&omap2420_mpu__l3,
};
/* MPU */
static struct omap_hwmod omap2420_mpu_hwmod = {
.name = "mpu_hwmod",
.clkdev_dev_id = NULL,
.clkdev_con_id = "mpu_ck",
.masters = omap2420_mpu_masters,
.masters_cnt = ARRAY_SIZE(omap2420_mpu_masters),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
};
static __initdata struct omap_hwmod *omap2420_hwmods[] = {
&omap2420_l3_hwmod,
&omap2420_l4_core_hwmod,
&omap2420_l4_wkup_hwmod,
&omap2420_mpu_hwmod,
NULL,
};
#else
# define omap2420_hwmods 0
#endif
#endif

143
arch/arm/mach-omap2/omap_hwmod_2430.h Normal file
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@ -0,0 +1,143 @@
/*
* omap_hwmod_2430.h - hardware modules present on the OMAP2430 chips
*
* Copyright (C) 2009 Nokia Corporation
* Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* XXX handle crossbar/shared link difference for L3?
*
*/
#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H
#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H
#ifdef CONFIG_ARCH_OMAP2430
#include <mach/omap_hwmod.h>
#include <mach/irqs.h>
#include <mach/cpu.h>
#include <mach/dma.h>
#include "prm-regbits-24xx.h"
static struct omap_hwmod omap2430_mpu_hwmod;
static struct omap_hwmod omap2430_l3_hwmod;
static struct omap_hwmod omap2430_l4_core_hwmod;
/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap2430_l3__l4_core = {
.master = &omap2430_l3_hwmod,
.slave = &omap2430_l4_core_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* MPU -> L3 interface */
static struct omap_hwmod_ocp_if omap2430_mpu__l3 = {
.master = &omap2430_mpu_hwmod,
.slave = &omap2430_l3_hwmod,
.user = OCP_USER_MPU,
};
/* Slave interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap2430_l3_slaves[] = {
&omap2430_mpu__l3,
};
/* Master interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap2430_l3_masters[] = {
&omap2430_l3__l4_core,
};
/* L3 */
static struct omap_hwmod omap2430_l3_hwmod = {
.name = "l3_hwmod",
.masters = omap2430_l3_masters,
.masters_cnt = ARRAY_SIZE(omap2430_l3_masters),
.slaves = omap2430_l3_slaves,
.slaves_cnt = ARRAY_SIZE(omap2430_l3_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
};
static struct omap_hwmod omap2430_l4_wkup_hwmod;
static struct omap_hwmod omap2430_mmc1_hwmod;
static struct omap_hwmod omap2430_mmc2_hwmod;
/* L4_CORE -> L4_WKUP interface */
static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
.master = &omap2430_l4_core_hwmod,
.slave = &omap2430_l4_wkup_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
&omap2430_l3__l4_core,
};
/* Master interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
&omap2430_l4_core__l4_wkup,
};
/* L4 CORE */
static struct omap_hwmod omap2430_l4_core_hwmod = {
.name = "l4_core_hwmod",
.masters = omap2430_l4_core_masters,
.masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters),
.slaves = omap2430_l4_core_slaves,
.slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
};
/* Slave interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
&omap2430_l4_core__l4_wkup,
};
/* Master interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
};
/* L4 WKUP */
static struct omap_hwmod omap2430_l4_wkup_hwmod = {
.name = "l4_wkup_hwmod",
.masters = omap2430_l4_wkup_masters,
.masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters),
.slaves = omap2430_l4_wkup_slaves,
.slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
};
/* Master interfaces on the MPU device */
static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
&omap2430_mpu__l3,
};
/* MPU */
static struct omap_hwmod omap2430_mpu_hwmod = {
.name = "mpu_hwmod",
.clkdev_dev_id = NULL,
.clkdev_con_id = "mpu_ck",
.masters = omap2430_mpu_masters,
.masters_cnt = ARRAY_SIZE(omap2430_mpu_masters),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
};
static __initdata struct omap_hwmod *omap2430_hwmods[] = {
&omap2430_l3_hwmod,
&omap2430_l4_core_hwmod,
&omap2430_l4_wkup_hwmod,
&omap2430_mpu_hwmod,
NULL,
};
#else
# define omap2430_hwmods 0
#endif
#endif

168
arch/arm/mach-omap2/omap_hwmod_34xx.h Normal file
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@ -0,0 +1,168 @@
/*
* omap_hwmod_34xx.h - hardware modules present on the OMAP34xx chips
*
* Copyright (C) 2009 Nokia Corporation
* Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
#ifdef CONFIG_ARCH_OMAP34XX
#include <mach/omap_hwmod.h>
#include <mach/irqs.h>
#include <mach/cpu.h>
#include <mach/dma.h>
#include "prm-regbits-34xx.h"
static struct omap_hwmod omap34xx_mpu_hwmod;
static struct omap_hwmod omap34xx_l3_hwmod;
static struct omap_hwmod omap34xx_l4_core_hwmod;
static struct omap_hwmod omap34xx_l4_per_hwmod;
/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap34xx_l3__l4_core = {
.master = &omap34xx_l3_hwmod,
.slave = &omap34xx_l4_core_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L3 -> L4_PER interface */
static struct omap_hwmod_ocp_if omap34xx_l3__l4_per = {
.master = &omap34xx_l3_hwmod,
.slave = &omap34xx_l4_per_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* MPU -> L3 interface */
static struct omap_hwmod_ocp_if omap34xx_mpu__l3 = {
.master = &omap34xx_mpu_hwmod,
.slave = &omap34xx_l3_hwmod,
.user = OCP_USER_MPU,
};
/* Slave interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l3_slaves[] = {
&omap34xx_mpu__l3,
};
/* Master interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l3_masters[] = {
&omap34xx_l3__l4_core,
&omap34xx_l3__l4_per,
};
/* L3 */
static struct omap_hwmod omap34xx_l3_hwmod = {
.name = "l3_hwmod",
.masters = omap34xx_l3_masters,
.masters_cnt = ARRAY_SIZE(omap34xx_l3_masters),
.slaves = omap34xx_l3_slaves,
.slaves_cnt = ARRAY_SIZE(omap34xx_l3_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};
static struct omap_hwmod omap34xx_l4_wkup_hwmod;
/* L4_CORE -> L4_WKUP interface */
static struct omap_hwmod_ocp_if omap34xx_l4_core__l4_wkup = {
.master = &omap34xx_l4_core_hwmod,
.slave = &omap34xx_l4_wkup_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_core_slaves[] = {
&omap34xx_l3__l4_core,
};
/* Master interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_core_masters[] = {
&omap34xx_l4_core__l4_wkup,
};
/* L4 CORE */
static struct omap_hwmod omap34xx_l4_core_hwmod = {
.name = "l4_core_hwmod",
.masters = omap34xx_l4_core_masters,
.masters_cnt = ARRAY_SIZE(omap34xx_l4_core_masters),
.slaves = omap34xx_l4_core_slaves,
.slaves_cnt = ARRAY_SIZE(omap34xx_l4_core_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};
/* Slave interfaces on the L4_PER interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_per_slaves[] = {
&omap34xx_l3__l4_per,
};
/* Master interfaces on the L4_PER interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_per_masters[] = {
};
/* L4 PER */
static struct omap_hwmod omap34xx_l4_per_hwmod = {
.name = "l4_per_hwmod",
.masters = omap34xx_l4_per_masters,
.masters_cnt = ARRAY_SIZE(omap34xx_l4_per_masters),
.slaves = omap34xx_l4_per_slaves,
.slaves_cnt = ARRAY_SIZE(omap34xx_l4_per_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};
/* Slave interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_slaves[] = {
&omap34xx_l4_core__l4_wkup,
};
/* Master interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_masters[] = {
};
/* L4 WKUP */
static struct omap_hwmod omap34xx_l4_wkup_hwmod = {
.name = "l4_wkup_hwmod",
.masters = omap34xx_l4_wkup_masters,
.masters_cnt = ARRAY_SIZE(omap34xx_l4_wkup_masters),
.slaves = omap34xx_l4_wkup_slaves,
.slaves_cnt = ARRAY_SIZE(omap34xx_l4_wkup_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};
/* Master interfaces on the MPU device */
static struct omap_hwmod_ocp_if *omap34xx_mpu_masters[] = {
&omap34xx_mpu__l3,
};
/* MPU */
static struct omap_hwmod omap34xx_mpu_hwmod = {
.name = "mpu_hwmod",
.clkdev_dev_id = NULL,
.clkdev_con_id = "arm_fck",
.masters = omap34xx_mpu_masters,
.masters_cnt = ARRAY_SIZE(omap34xx_mpu_masters),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};
static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
&omap34xx_l3_hwmod,
&omap34xx_l4_core_hwmod,
&omap34xx_l4_per_hwmod,
&omap34xx_l4_wkup_hwmod,
&omap34xx_mpu_hwmod,
NULL,
};
#else
# define omap34xx_hwmods 0
#endif
#endif

4
arch/arm/mach-omap2/powerdomain.c
View file

@ -90,7 +90,7 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip))
return ERR_PTR(-EINVAL);
for (pd = deps; pd; pd++) {
for (pd = deps; pd->pwrdm_name; pd++) {
if (!omap_chip_is(pd->omap_chip))
continue;
@ -103,7 +103,7 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
}
if (!pd)
if (!pd->pwrdm_name)
return ERR_PTR(-ENOENT);
return pd->pwrdm;

14
arch/arm/mach-omap2/serial.c
View file

@ -578,7 +578,7 @@ static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = {
#endif
};
void __init omap_serial_init(void)
void __init omap_serial_early_init(void)
{
int i;
char name[16];
@ -624,6 +624,18 @@ void __init omap_serial_init(void)
p->irq += 32;
omap_uart_enable_clocks(uart);
}
}
void __init omap_serial_init(void)
{
int i;
for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
struct omap_uart_state *uart = &omap_uart[i];
struct platform_device *pdev = &uart->pdev;
struct device *dev = &pdev->dev;
omap_uart_reset(uart);
omap_uart_idle_init(uart);

13
arch/arm/plat-omap/Kconfig
View file

@ -187,6 +187,19 @@ config OMAP_SERIAL_WAKE
to data on the serial RX line. This allows you to wake the
system from serial console.
choice
prompt "OMAP PM layer selection"
depends on ARCH_OMAP
default OMAP_PM_NOOP
config OMAP_PM_NONE
bool "No PM layer"
config OMAP_PM_NOOP
bool "No-op/debug PM layer"
endchoice
endmenu
endif

5
arch/arm/plat-omap/Makefile
View file

@ -12,6 +12,10 @@ obj- :=
# OCPI interconnect support for 1710, 1610 and 5912
obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
# omap_device support (OMAP2+ only at the moment)
obj-$(CONFIG_ARCH_OMAP2) += omap_device.o
obj-$(CONFIG_ARCH_OMAP3) += omap_device.o
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o
obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o
@ -26,3 +30,4 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y)
# OMAP mailbox framework
obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o

2
arch/arm/plat-omap/clock.c
View file

@ -488,7 +488,7 @@ static int __init clk_debugfs_init(void)
}
return 0;
err_out:
debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */
debugfs_remove_recursive(clk_debugfs_root);
return err;
}
late_initcall(clk_debugfs_init);

301
arch/arm/plat-omap/include/mach/omap-pm.h Normal file
View file

@ -0,0 +1,301 @@
/*
* omap-pm.h - OMAP power management interface
*
* Copyright (C) 2008-2009 Texas Instruments, Inc.
* Copyright (C) 2008-2009 Nokia Corporation
* Paul Walmsley
*
* Interface developed by (in alphabetical order): Karthik Dasu, Jouni
* Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa,
* Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley,
* Richard Woodruff
*/
#ifndef ASM_ARM_ARCH_OMAP_OMAP_PM_H
#define ASM_ARM_ARCH_OMAP_OMAP_PM_H
#include <linux/device.h>
#include <linux/cpufreq.h>
#include "powerdomain.h"
/**
* struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
* @rate: target clock rate
* @opp_id: OPP ID
* @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP
*
* Operating performance point data. Can vary by OMAP chip and board.
*/
struct omap_opp {
unsigned long rate;
u8 opp_id;
u16 min_vdd;
};
extern struct omap_opp *mpu_opps;
extern struct omap_opp *dsp_opps;
extern struct omap_opp *l3_opps;
/*
* agent_id values for use with omap_pm_set_min_bus_tput():
*
* OCP_INITIATOR_AGENT is only valid for devices that can act as
* initiators -- it represents the device's L3 interconnect
* connection. OCP_TARGET_AGENT represents the device's L4
* interconnect connection.
*/
#define OCP_TARGET_AGENT 1
#define OCP_INITIATOR_AGENT 2
/**
* omap_pm_if_early_init - OMAP PM init code called before clock fw init
* @mpu_opp_table: array ptr to struct omap_opp for MPU
* @dsp_opp_table: array ptr to struct omap_opp for DSP
* @l3_opp_table : array ptr to struct omap_opp for CORE
*
* Initialize anything that must be configured before the clock
* framework starts. The "_if_" is to avoid name collisions with the
* PM idle-loop code.
*/
int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
struct omap_opp *dsp_opp_table,
struct omap_opp *l3_opp_table);
/**
* omap_pm_if_init - OMAP PM init code called after clock fw init
*
* The main initialization code. OPP tables are passed in here. The
* "_if_" is to avoid name collisions with the PM idle-loop code.
*/
int __init omap_pm_if_init(void);
/**
* omap_pm_if_exit - OMAP PM exit code
*
* Exit code; currently unused. The "_if_" is to avoid name
* collisions with the PM idle-loop code.
*/
void omap_pm_if_exit(void);
/*
* Device-driver-originated constraints (via board-*.c files, platform_data)
*/
/**
* omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency
* @dev: struct device * requesting the constraint
* @t: maximum MPU wakeup latency in microseconds
*
* Request that the maximum interrupt latency for the MPU to be no
* greater than 't' microseconds. "Interrupt latency" in this case is
* defined as the elapsed time from the occurrence of a hardware or
* timer interrupt to the time when the device driver's interrupt
* service routine has been entered by the MPU.
*
* It is intended that underlying PM code will use this information to
* determine what power state to put the MPU powerdomain into, and
* possibly the CORE powerdomain as well, since interrupt handling
* code currently runs from SDRAM. Advanced PM or board*.c code may
* also configure interrupt controller priorities, OCP bus priorities,
* CPU speed(s), etc.
*
* This function will not affect device wakeup latency, e.g., time
* elapsed from when a device driver enables a hardware device with
* clk_enable(), to when the device is ready for register access or
* other use. To control this device wakeup latency, use
* set_max_dev_wakeup_lat()
*
* Multiple calls to set_max_mpu_wakeup_lat() will replace the
* previous t value. To remove the latency target for the MPU, call
* with t = -1.
*
* No return value.
*/
void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t);
/**
* omap_pm_set_min_bus_tput - set minimum bus throughput needed by device
* @dev: struct device * requesting the constraint
* @tbus_id: interconnect to operate on (OCP_{INITIATOR,TARGET}_AGENT)
* @r: minimum throughput (in KiB/s)
*
* Request that the minimum data throughput on the OCP interconnect
* attached to device 'dev' interconnect agent 'tbus_id' be no less
* than 'r' KiB/s.
*
* It is expected that the OMAP PM or bus code will use this
* information to set the interconnect clock to run at the lowest
* possible speed that satisfies all current system users. The PM or
* bus code will adjust the estimate based on its model of the bus, so
* device driver authors should attempt to specify an accurate
* quantity for their device use case, and let the PM or bus code
* overestimate the numbers as necessary to handle request/response
* latency, other competing users on the system, etc. On OMAP2/3, if
* a driver requests a minimum L4 interconnect speed constraint, the
* code will also need to add an minimum L3 interconnect speed
* constraint,
*
* Multiple calls to set_min_bus_tput() will replace the previous rate
* value for this device. To remove the interconnect throughput
* restriction for this device, call with r = 0.
*
* No return value.
*/
void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r);
/**
* omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency
* @dev: struct device *
* @t: maximum device wakeup latency in microseconds
*
* Request that the maximum amount of time necessary for a device to
* become accessible after its clocks are enabled should be no greater
* than 't' microseconds. Specifically, this represents the time from
* when a device driver enables device clocks with clk_enable(), to
* when the register reads and writes on the device will succeed.
* This function should be called before clk_disable() is called,
* since the power state transition decision may be made during
* clk_disable().
*
* It is intended that underlying PM code will use this information to
* determine what power state to put the powerdomain enclosing this
* device into.
*
* Multiple calls to set_max_dev_wakeup_lat() will replace the
* previous wakeup latency values for this device. To remove the wakeup
* latency restriction for this device, call with t = -1.
*
* No return value.
*/
void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t);
/**
* omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency
* @dev: struct device *
* @t: maximum DMA transfer start latency in microseconds
*
* Request that the maximum system DMA transfer start latency for this
* device 'dev' should be no greater than 't' microseconds. "DMA
* transfer start latency" here is defined as the elapsed time from
* when a device (e.g., McBSP) requests that a system DMA transfer
* start or continue, to the time at which data starts to flow into
* that device from the system DMA controller.
*
* It is intended that underlying PM code will use this information to
* determine what power state to put the CORE powerdomain into.
*
* Since system DMA transfers may not involve the MPU, this function
* will not affect MPU wakeup latency. Use set_max_cpu_lat() to do
* so. Similarly, this function will not affect device wakeup latency
* -- use set_max_dev_wakeup_lat() to affect that.
*
* Multiple calls to set_max_sdma_lat() will replace the previous t
* value for this device. To remove the maximum DMA latency for this
* device, call with t = -1.
*
* No return value.
*/
void omap_pm_set_max_sdma_lat(struct device *dev, long t);
/*
* DSP Bridge-specific constraints
*/
/**
* omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table
*
* Intended for use by DSPBridge. Returns an array of OPP->DSP clock
* frequency entries. The final item in the array should have .rate =
* .opp_id = 0.
*/
const struct omap_opp *omap_pm_dsp_get_opp_table(void);
/**
* omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge
* @opp_id: target DSP OPP ID
*
* Set a minimum OPP ID for the DSP. This is intended to be called
* only from the DSP Bridge MPU-side driver. Unfortunately, the only
* information that code receives from the DSP/BIOS load estimator is the
* target OPP ID; hence, this interface. No return value.
*/
void omap_pm_dsp_set_min_opp(u8 opp_id);
/**
* omap_pm_dsp_get_opp - report the current DSP OPP ID
*
* Report the current OPP for the DSP. Since on OMAP3, the DSP and
* MPU share a single voltage domain, the OPP ID returned back may
* represent a higher DSP speed than the OPP requested via
* omap_pm_dsp_set_min_opp().
*
* Returns the current VDD1 OPP ID, or 0 upon error.
*/
u8 omap_pm_dsp_get_opp(void);
/*
* CPUFreq-originated constraint
*
* In the future, this should be handled by custom OPP clocktype
* functions.
*/
/**
* omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr
*
* Provide a frequency table usable by CPUFreq for the current chip/board.
* Returns a pointer to a struct cpufreq_frequency_table array or NULL
* upon error.
*/
struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void);
/**
* omap_pm_cpu_set_freq - set the current minimum MPU frequency
* @f: MPU frequency in Hz
*
* Set the current minimum CPU frequency. The actual CPU frequency
* used could end up higher if the DSP requested a higher OPP.
* Intended to be called by plat-omap/cpu_omap.c:omap_target(). No
* return value.
*/
void omap_pm_cpu_set_freq(unsigned long f);
/**
* omap_pm_cpu_get_freq - report the current CPU frequency
*
* Returns the current MPU frequency, or 0 upon error.
*/
unsigned long omap_pm_cpu_get_freq(void);
/*
* Device context loss tracking
*/
/**
* omap_pm_get_dev_context_loss_count - return count of times dev has lost ctx
* @dev: struct device *
*
* This function returns the number of times that the device @dev has
* lost its internal context. This generally occurs on a powerdomain
* transition to OFF. Drivers use this as an optimization to avoid restoring
* context if the device hasn't lost it. To use, drivers should initially
* call this in their context save functions and store the result. Early in
* the driver's context restore function, the driver should call this function
* again, and compare the result to the stored counter. If they differ, the
* driver must restore device context. If the number of context losses
* exceeds the maximum positive integer, the function will wrap to 0 and
* continue counting. Returns the number of context losses for this device,
* or -EINVAL upon error.
*/
int omap_pm_get_dev_context_loss_count(struct device *dev);
#endif

141
arch/arm/plat-omap/include/mach/omap_device.h Normal file
View file

@ -0,0 +1,141 @@
/*
* omap_device headers
*
* Copyright (C) 2009 Nokia Corporation
* Paul Walmsley
*
* Developed in collaboration with (alphabetical order): Benoit
* Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram
* Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard
* Woodruff
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Eventually this type of functionality should either be
* a) implemented via arch-specific pointers in platform_device
* or
* b) implemented as a proper omap_bus/omap_device in Linux, no more
* platform_device
*
* omap_device differs from omap_hwmod in that it includes external
* (e.g., board- and system-level) integration details. omap_hwmod
* stores hardware data that is invariant for a given OMAP chip.
*
* To do:
* - GPIO integration
* - regulator integration
*
*/
#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H
#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <mach/omap_hwmod.h>
/* omap_device._state values */
#define OMAP_DEVICE_STATE_UNKNOWN 0
#define OMAP_DEVICE_STATE_ENABLED 1
#define OMAP_DEVICE_STATE_IDLE 2
#define OMAP_DEVICE_STATE_SHUTDOWN 3
/**
* struct omap_device - omap_device wrapper for platform_devices
* @pdev: platform_device
* @hwmods: (one .. many per omap_device)
* @hwmods_cnt: ARRAY_SIZE() of @hwmods
* @pm_lats: ptr to an omap_device_pm_latency table
* @pm_lats_cnt: ARRAY_SIZE() of what is passed to @pm_lats
* @pm_lat_level: array index of the last odpl entry executed - -1 if never
* @dev_wakeup_lat: dev wakeup latency in microseconds
* @_dev_wakeup_lat_limit: dev wakeup latency limit in usec - set by OMAP PM
* @_state: one of OMAP_DEVICE_STATE_* (see above)
* @flags: device flags
*
* Integrates omap_hwmod data into Linux platform_device.
*
* Field names beginning with underscores are for the internal use of
* the omap_device code.
*
*/
struct omap_device {
struct platform_device pdev;
struct omap_hwmod **hwmods;
struct omap_device_pm_latency *pm_lats;
u32 dev_wakeup_lat;
u32 _dev_wakeup_lat_limit;
u8 pm_lats_cnt;
s8 pm_lat_level;
u8 hwmods_cnt;
u8 _state;
};
/* Device driver interface (call via platform_data fn ptrs) */
int omap_device_enable(struct platform_device *pdev);
int omap_device_idle(struct platform_device *pdev);
int omap_device_shutdown(struct platform_device *pdev);
/* Core code interface */
int omap_device_count_resources(struct omap_device *od);
int omap_device_fill_resources(struct omap_device *od, struct resource *res);
struct omap_device *omap_device_build(const char *pdev_name, int pdev_id,
struct omap_hwmod *oh, void *pdata,
int pdata_len,
struct omap_device_pm_latency *pm_lats,
int pm_lats_cnt);
struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
struct omap_hwmod **oh, int oh_cnt,
void *pdata, int pdata_len,
struct omap_device_pm_latency *pm_lats,
int pm_lats_cnt);
int omap_device_register(struct omap_device *od);
/* OMAP PM interface */
int omap_device_align_pm_lat(struct platform_device *pdev,
u32 new_wakeup_lat_limit);
struct powerdomain *omap_device_get_pwrdm(struct omap_device *od);
/* Other */
int omap_device_idle_hwmods(struct omap_device *od);
int omap_device_enable_hwmods(struct omap_device *od);
int omap_device_disable_clocks(struct omap_device *od);
int omap_device_enable_clocks(struct omap_device *od);
/*
* Entries should be kept in latency order ascending
*
* deact_lat is the maximum number of microseconds required to complete
* deactivate_func() at the device's slowest OPP.
*
* act_lat is the maximum number of microseconds required to complete
* activate_func() at the device's slowest OPP.
*
* This will result in some suboptimal power management decisions at fast
* OPPs, but avoids having to recompute all device power management decisions
* if the system shifts from a fast OPP to a slow OPP (in order to meet
* latency requirements).
*
* XXX should deactivate_func/activate_func() take platform_device pointers
* rather than omap_device pointers?
*/
struct omap_device_pm_latency {
u32 deactivate_lat;
int (*deactivate_func)(struct omap_device *od);
u32 activate_lat;
int (*activate_func)(struct omap_device *od);
};
#endif

447
arch/arm/plat-omap/include/mach/omap_hwmod.h Normal file
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@ -0,0 +1,447 @@
/*
* omap_hwmod macros, structures
*
* Copyright (C) 2009 Nokia Corporation
* Paul Walmsley
*
* Created in collaboration with (alphabetical order): Benoit Cousson,
* Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
* Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* These headers and macros are used to define OMAP on-chip module
* data and their integration with other OMAP modules and Linux.
*
* References:
* - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
* - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
* - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
* - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
* - Open Core Protocol Specification 2.2
*
* To do:
* - add interconnect error log structures
* - add pinmuxing
* - init_conn_id_bit (CONNID_BIT_VECTOR)
* - implement default hwmod SMS/SDRC flags?
*
*/
#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <mach/cpu.h>
struct omap_device;
/* OCP SYSCONFIG bit shifts/masks */
#define SYSC_MIDLEMODE_SHIFT 12
#define SYSC_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
#define SYSC_CLOCKACTIVITY_SHIFT 8
#define SYSC_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
#define SYSC_SIDLEMODE_SHIFT 3
#define SYSC_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
#define SYSC_ENAWAKEUP_SHIFT 2
#define SYSC_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
#define SYSC_SOFTRESET_SHIFT 1
#define SYSC_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
/* OCP SYSSTATUS bit shifts/masks */
#define SYSS_RESETDONE_SHIFT 0
#define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT)
/* Master standby/slave idle mode flags */
#define HWMOD_IDLEMODE_FORCE (1 << 0)
#define HWMOD_IDLEMODE_NO (1 << 1)
#define HWMOD_IDLEMODE_SMART (1 << 2)
/**
* struct omap_hwmod_dma_info - MPU address space handled by the hwmod
* @name: name of the DMA channel (module local name)
* @dma_ch: DMA channel ID
*
* @name should be something short, e.g., "tx" or "rx". It is for use
* by platform_get_resource_byname(). It is defined locally to the
* hwmod.
*/
struct omap_hwmod_dma_info {
const char *name;
u16 dma_ch;
};
/**
* struct omap_hwmod_opt_clk - optional clocks used by this hwmod
* @role: "sys", "32k", "tv", etc -- for use in clk_get()
* @clkdev_dev_id: opt clock: clkdev dev_id string
* @clkdev_con_id: opt clock: clkdev con_id string
* @_clk: pointer to the struct clk (filled in at runtime)
*
* The module's interface clock and main functional clock should not
* be added as optional clocks.
*/
struct omap_hwmod_opt_clk {
const char *role;
const char *clkdev_dev_id;
const char *clkdev_con_id;
struct clk *_clk;
};
/* omap_hwmod_omap2_firewall.flags bits */
#define OMAP_FIREWALL_L3 (1 << 0)
#define OMAP_FIREWALL_L4 (1 << 1)
/**
* struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
* @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
* @l4_fw_region: L4 firewall region ID
* @l4_prot_group: L4 protection group ID
* @flags: (see omap_hwmod_omap2_firewall.flags macros above)
*/
struct omap_hwmod_omap2_firewall {
u8 l3_perm_bit;
u8 l4_fw_region;
u8 l4_prot_group;
u8 flags;
};
/*
* omap_hwmod_addr_space.flags bits
*
* ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
* ADDR_TYPE_RT: Address space contains module register target data.
*/
#define ADDR_MAP_ON_INIT (1 << 0)
#define ADDR_TYPE_RT (1 << 1)
/**
* struct omap_hwmod_addr_space - MPU address space handled by the hwmod
* @pa_start: starting physical address
* @pa_end: ending physical address
* @flags: (see omap_hwmod_addr_space.flags macros above)
*
* Address space doesn't necessarily follow physical interconnect
* structure. GPMC is one example.
*/
struct omap_hwmod_addr_space {
u32 pa_start;
u32 pa_end;
u8 flags;
};
/*
* omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
* interface to interact with the hwmod. Used to add sleep dependencies
* when the module is enabled or disabled.
*/
#define OCP_USER_MPU (1 << 0)
#define OCP_USER_SDMA (1 << 1)
/* omap_hwmod_ocp_if.flags bits */
#define OCPIF_HAS_IDLEST (1 << 0)
#define OCPIF_SWSUP_IDLE (1 << 1)
#define OCPIF_CAN_BURST (1 << 2)
/**
* struct omap_hwmod_ocp_if - OCP interface data
* @master: struct omap_hwmod that initiates OCP transactions on this link
* @slave: struct omap_hwmod that responds to OCP transactions on this link
* @addr: address space associated with this link
* @clkdev_dev_id: interface clock: clkdev dev_id string
* @clkdev_con_id: interface clock: clkdev con_id string
* @_clk: pointer to the interface struct clk (filled in at runtime)
* @fw: interface firewall data
* @addr_cnt: ARRAY_SIZE(@addr)
* @width: OCP data width
* @thread_cnt: number of threads
* @max_burst_len: maximum burst length in @width sized words (0 if unlimited)
* @user: initiators using this interface (see OCP_USER_* macros above)
* @flags: OCP interface flags (see OCPIF_* macros above)
*
* It may also be useful to add a tag_cnt field for OCP2.x devices.
*
* Parameter names beginning with an underscore are managed internally by
* the omap_hwmod code and should not be set during initialization.
*/
struct omap_hwmod_ocp_if {
struct omap_hwmod *master;
struct omap_hwmod *slave;
struct omap_hwmod_addr_space *addr;
const char *clkdev_dev_id;
const char *clkdev_con_id;
struct clk *_clk;
union {
struct omap_hwmod_omap2_firewall omap2;
} fw;
u8 addr_cnt;
u8 width;
u8 thread_cnt;
u8 max_burst_len;
u8 user;
u8 flags;
};
/* Macros for use in struct omap_hwmod_sysconfig */
/* Flags for use in omap_hwmod_sysconfig.idlemodes */
#define MASTER_STANDBY_SHIFT 2
#define SLAVE_IDLE_SHIFT 0
#define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
#define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
#define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
#define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
#define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
#define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
/* omap_hwmod_sysconfig.sysc_flags capability flags */
#define SYSC_HAS_AUTOIDLE (1 << 0)
#define SYSC_HAS_SOFTRESET (1 << 1)
#define SYSC_HAS_ENAWAKEUP (1 << 2)
#define SYSC_HAS_EMUFREE (1 << 3)
#define SYSC_HAS_CLOCKACTIVITY (1 << 4)
#define SYSC_HAS_SIDLEMODE (1 << 5)
#define SYSC_HAS_MIDLEMODE (1 << 6)
#define SYSS_MISSING (1 << 7)
/* omap_hwmod_sysconfig.clockact flags */
#define CLOCKACT_TEST_BOTH 0x0
#define CLOCKACT_TEST_MAIN 0x1
#define CLOCKACT_TEST_ICLK 0x2
#define CLOCKACT_TEST_NONE 0x3
/**
* struct omap_hwmod_sysconfig - hwmod OCP_SYSCONFIG/OCP_SYSSTATUS data
* @rev_offs: IP block revision register offset (from module base addr)
* @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
* @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
* @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
* @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
* @clockact: the default value of the module CLOCKACTIVITY bits
*
* @clockact describes to the module which clocks are likely to be
* disabled when the PRCM issues its idle request to the module. Some
* modules have separate clockdomains for the interface clock and main
* functional clock, and can check whether they should acknowledge the
* idle request based on the internal module functionality that has
* been associated with the clocks marked in @clockact. This field is
* only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
*
*/
struct omap_hwmod_sysconfig {
u16 rev_offs;
u16 sysc_offs;
u16 syss_offs;
u8 idlemodes;
u8 sysc_flags;
u8 clockact;
};
/**
* struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
* @module_offs: PRCM submodule offset from the start of the PRM/CM
* @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
* @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
* @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
* @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
* @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
*
* @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
* WKEN, GRPSEL registers. In an ideal world, no extra information
* would be needed for IDLEST information, but alas, there are some
* exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
* are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
*/
struct omap_hwmod_omap2_prcm {
s16 module_offs;
u8 prcm_reg_id;
u8 module_bit;
u8 idlest_reg_id;
u8 idlest_idle_bit;
u8 idlest_stdby_bit;
};
/**
* struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
* @module_offs: PRCM submodule offset from the start of the PRM/CM1/CM2
* @device_offs: device register offset from @module_offs
* @submodule_wkdep_bit: bit shift of the WKDEP range
*/
struct omap_hwmod_omap4_prcm {
u32 module_offs;
u16 device_offs;
u8 submodule_wkdep_bit;
};
/*
* omap_hwmod.flags definitions
*
* HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
* of idle, rather than relying on module smart-idle
* HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
* of standby, rather than relying on module smart-standby
* HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
* SDRAM controller, etc.
* HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
* controller, etc.
* HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
*/
#define HWMOD_SWSUP_SIDLE (1 << 0)
#define HWMOD_SWSUP_MSTANDBY (1 << 1)
#define HWMOD_INIT_NO_RESET (1 << 2)
#define HWMOD_INIT_NO_IDLE (1 << 3)
#define HWMOD_SET_DEFAULT_CLOCKACT (1 << 4)
/*
* omap_hwmod._int_flags definitions
* These are for internal use only and are managed by the omap_hwmod code.
*
* _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
* _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
* _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
*/
#define _HWMOD_NO_MPU_PORT (1 << 0)
#define _HWMOD_WAKEUP_ENABLED (1 << 1)
#define _HWMOD_SYSCONFIG_LOADED (1 << 2)
/*
* omap_hwmod._state definitions
*
* INITIALIZED: reset (optionally), initialized, enabled, disabled
* (optionally)
*
*
*/
#define _HWMOD_STATE_UNKNOWN 0
#define _HWMOD_STATE_REGISTERED 1
#define _HWMOD_STATE_CLKS_INITED 2
#define _HWMOD_STATE_INITIALIZED 3
#define _HWMOD_STATE_ENABLED 4
#define _HWMOD_STATE_IDLE 5
#define _HWMOD_STATE_DISABLED 6
/**
* struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
* @name: name of the hwmod
* @od: struct omap_device currently associated with this hwmod (internal use)
* @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
* @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt)
* @prcm: PRCM data pertaining to this hwmod
* @clkdev_dev_id: main clock: clkdev dev_id string
* @clkdev_con_id: main clock: clkdev con_id string
* @_clk: pointer to the main struct clk (filled in at runtime)
* @opt_clks: other device clocks that drivers can request (0..*)
* @masters: ptr to array of OCP ifs that this hwmod can initiate on
* @slaves: ptr to array of OCP ifs that this hwmod can respond on
* @sysconfig: device SYSCONFIG/SYSSTATUS register data
* @dev_attr: arbitrary device attributes that can be passed to the driver
* @_sysc_cache: internal-use hwmod flags
* @_rt_va: cached register target start address (internal use)
* @_mpu_port_index: cached MPU register target slave ID (internal use)
* @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6)
* @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift
* @mpu_irqs_cnt: number of @mpu_irqs
* @sdma_chs_cnt: number of @sdma_chs
* @opt_clks_cnt: number of @opt_clks
* @master_cnt: number of @master entries
* @slaves_cnt: number of @slave entries
* @response_lat: device OCP response latency (in interface clock cycles)
* @_int_flags: internal-use hwmod flags
* @_state: internal-use hwmod state
* @flags: hwmod flags (documented below)
* @omap_chip: OMAP chips this hwmod is present on
* @node: list node for hwmod list (internal use)
*
* @clkdev_dev_id, @clkdev_con_id, and @clk all refer to this module's "main
* clock," which for our purposes is defined as "the functional clock needed
* for register accesses to complete." Modules may not have a main clock if
* the interface clock also serves as a main clock.
*
* Parameter names beginning with an underscore are managed internally by
* the omap_hwmod code and should not be set during initialization.
*/
struct omap_hwmod {
const char *name;
struct omap_device *od;
u8 *mpu_irqs;
struct omap_hwmod_dma_info *sdma_chs;
union {
struct omap_hwmod_omap2_prcm omap2;
struct omap_hwmod_omap4_prcm omap4;
} prcm;
const char *clkdev_dev_id;
const char *clkdev_con_id;
struct clk *_clk;
struct omap_hwmod_opt_clk *opt_clks;
struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
struct omap_hwmod_sysconfig *sysconfig;
void *dev_attr;
u32 _sysc_cache;
void __iomem *_rt_va;
struct list_head node;
u16 flags;
u8 _mpu_port_index;
u8 msuspendmux_reg_id;
u8 msuspendmux_shift;
u8 response_lat;
u8 mpu_irqs_cnt;
u8 sdma_chs_cnt;
u8 opt_clks_cnt;
u8 masters_cnt;
u8 slaves_cnt;
u8 hwmods_cnt;
u8 _int_flags;
u8 _state;
const struct omap_chip_id omap_chip;
};
int omap_hwmod_init(struct omap_hwmod **ohs);
int omap_hwmod_register(struct omap_hwmod *oh);
int omap_hwmod_unregister(struct omap_hwmod *oh);
struct omap_hwmod *omap_hwmod_lookup(const char *name);
int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh));
int omap_hwmod_late_init(void);
int omap_hwmod_enable(struct omap_hwmod *oh);
int omap_hwmod_idle(struct omap_hwmod *oh);
int omap_hwmod_shutdown(struct omap_hwmod *oh);
int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
int omap_hwmod_reset(struct omap_hwmod *oh);
void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs);
u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs);
int omap_hwmod_count_resources(struct omap_hwmod *oh);
int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
struct omap_hwmod *init_oh);
int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
struct omap_hwmod *init_oh);
int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
#endif

9
arch/arm/plat-omap/include/mach/sdrc.h
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@ -21,19 +21,28 @@
/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
#define SDRC_SYSCONFIG 0x010
#define SDRC_CS_CFG 0x040
#define SDRC_SHARING 0x044
#define SDRC_ERR_TYPE 0x04C
#define SDRC_DLLA_CTRL 0x060
#define SDRC_DLLA_STATUS 0x064
#define SDRC_DLLB_CTRL 0x068
#define SDRC_DLLB_STATUS 0x06C
#define SDRC_POWER 0x070
#define SDRC_MCFG_0 0x080
#define SDRC_MR_0 0x084
#define SDRC_EMR2_0 0x08c
#define SDRC_ACTIM_CTRL_A_0 0x09c
#define SDRC_ACTIM_CTRL_B_0 0x0a0
#define SDRC_RFR_CTRL_0 0x0a4
#define SDRC_MANUAL_0 0x0a8
#define SDRC_MCFG_1 0x0B0
#define SDRC_MR_1 0x0B4
#define SDRC_EMR2_1 0x0BC
#define SDRC_ACTIM_CTRL_A_1 0x0C4
#define SDRC_ACTIM_CTRL_B_1 0x0C8
#define SDRC_RFR_CTRL_1 0x0D4
#define SDRC_MANUAL_1 0x0D8
/*
* These values represent the number of memory clock cycles between

3
arch/arm/plat-omap/include/mach/serial.h
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@ -13,6 +13,8 @@
#ifndef __ASM_ARCH_SERIAL_H
#define __ASM_ARCH_SERIAL_H
#include <linux/init.h>
#if defined(CONFIG_ARCH_OMAP1)
/* OMAP1 serial ports */
#define OMAP_UART1_BASE 0xfffb0000
@ -53,6 +55,7 @@
})
#ifndef __ASSEMBLER__
extern void __init omap_serial_early_init(void);
extern void omap_serial_init(void);
extern int omap_uart_can_sleep(void);
extern void omap_uart_check_wakeup(void);

296
arch/arm/plat-omap/omap-pm-noop.c Normal file
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/*
* omap-pm-noop.c - OMAP power management interface - dummy version
*
* This code implements the OMAP power management interface to
* drivers, CPUIdle, CPUFreq, and DSP Bridge. It is strictly for
* debug/demonstration use, as it does nothing but printk() whenever a
* function is called (when DEBUG is defined, below)
*
* Copyright (C) 2008-2009 Texas Instruments, Inc.
* Copyright (C) 2008-2009 Nokia Corporation
* Paul Walmsley
*
* Interface developed by (in alphabetical order):
* Karthik Dasu, Tony Lindgren, Rajendra Nayak, Sakari Poussa, Veeramanikandan
* Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, Richard Woodruff
*/
#undef DEBUG
#include <linux/init.h>
#include <linux/cpufreq.h>
#include <linux/device.h>
/* Interface documentation is in mach/omap-pm.h */
#include <mach/omap-pm.h>
#include <mach/powerdomain.h>
struct omap_opp *dsp_opps;
struct omap_opp *mpu_opps;
struct omap_opp *l3_opps;
/*
* Device-driver-originated constraints (via board-*.c files)
*/
void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t)
{
if (!dev || t < -1) {
WARN_ON(1);
return;
};
if (t == -1)
pr_debug("OMAP PM: remove max MPU wakeup latency constraint: "
"dev %s\n", dev_name(dev));
else
pr_debug("OMAP PM: add max MPU wakeup latency constraint: "
"dev %s, t = %ld usec\n", dev_name(dev), t);
/*
* For current Linux, this needs to map the MPU to a
* powerdomain, then go through the list of current max lat
* constraints on the MPU and find the smallest. If
* the latency constraint has changed, the code should
* recompute the state to enter for the next powerdomain
* state.
*
* TI CDP code can call constraint_set here.
*/
}
void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r)
{
if (!dev || (agent_id != OCP_INITIATOR_AGENT &&
agent_id != OCP_TARGET_AGENT)) {
WARN_ON(1);
return;
};
if (r == 0)
pr_debug("OMAP PM: remove min bus tput constraint: "
"dev %s for agent_id %d\n", dev_name(dev), agent_id);
else
pr_debug("OMAP PM: add min bus tput constraint: "
"dev %s for agent_id %d: rate %ld KiB\n",
dev_name(dev), agent_id, r);
/*
* This code should model the interconnect and compute the
* required clock frequency, convert that to a VDD2 OPP ID, then
* set the VDD2 OPP appropriately.
*
* TI CDP code can call constraint_set here on the VDD2 OPP.
*/
}
void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t)
{
if (!dev || t < -1) {
WARN_ON(1);
return;
};
if (t == -1)
pr_debug("OMAP PM: remove max device latency constraint: "
"dev %s\n", dev_name(dev));
else
pr_debug("OMAP PM: add max device latency constraint: "
"dev %s, t = %ld usec\n", dev_name(dev), t);
/*
* For current Linux, this needs to map the device to a
* powerdomain, then go through the list of current max lat
* constraints on that powerdomain and find the smallest. If
* the latency constraint has changed, the code should
* recompute the state to enter for the next powerdomain
* state. Conceivably, this code should also determine
* whether to actually disable the device clocks or not,
* depending on how long it takes to re-enable the clocks.
*
* TI CDP code can call constraint_set here.
*/
}
void omap_pm_set_max_sdma_lat(struct device *dev, long t)
{
if (!dev || t < -1) {
WARN_ON(1);
return;
};
if (t == -1)
pr_debug("OMAP PM: remove max DMA latency constraint: "
"dev %s\n", dev_name(dev));
else
pr_debug("OMAP PM: add max DMA latency constraint: "
"dev %s, t = %ld usec\n", dev_name(dev), t);
/*
* For current Linux PM QOS params, this code should scan the
* list of maximum CPU and DMA latencies and select the
* smallest, then set cpu_dma_latency pm_qos_param
* accordingly.
*
* For future Linux PM QOS params, with separate CPU and DMA
* latency params, this code should just set the dma_latency param.
*
* TI CDP code can call constraint_set here.
*/
}
/*
* DSP Bridge-specific constraints
*/
const struct omap_opp *omap_pm_dsp_get_opp_table(void)
{
pr_debug("OMAP PM: DSP request for OPP table\n");
/*
* Return DSP frequency table here: The final item in the
* array should have .rate = .opp_id = 0.
*/
return NULL;
}
void omap_pm_dsp_set_min_opp(u8 opp_id)
{
if (opp_id == 0) {
WARN_ON(1);
return;
}
pr_debug("OMAP PM: DSP requests minimum VDD1 OPP to be %d\n", opp_id);
/*
*
* For l-o dev tree, our VDD1 clk is keyed on OPP ID, so we
* can just test to see which is higher, the CPU's desired OPP
* ID or the DSP's desired OPP ID, and use whichever is
* highest.
*
* In CDP12.14+, the VDD1 OPP custom clock that controls the DSP
* rate is keyed on MPU speed, not the OPP ID. So we need to
* map the OPP ID to the MPU speed for use with clk_set_rate()
* if it is higher than the current OPP clock rate.
*
*/
}
u8 omap_pm_dsp_get_opp(void)
{
pr_debug("OMAP PM: DSP requests current DSP OPP ID\n");
/*
* For l-o dev tree, call clk_get_rate() on VDD1 OPP clock
*
* CDP12.14+:
* Call clk_get_rate() on the OPP custom clock, map that to an
* OPP ID using the tables defined in board-*.c/chip-*.c files.
*/
return 0;
}
/*
* CPUFreq-originated constraint
*
* In the future, this should be handled by custom OPP clocktype
* functions.
*/
struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void)
{
pr_debug("OMAP PM: CPUFreq request for frequency table\n");
/*
* Return CPUFreq frequency table here: loop over
* all VDD1 clkrates, pull out the mpu_ck frequencies, build
* table
*/
return NULL;
}
void omap_pm_cpu_set_freq(unsigned long f)
{
if (f == 0) {
WARN_ON(1);
return;
}
pr_debug("OMAP PM: CPUFreq requests CPU frequency to be set to %lu\n",
f);
/*
* For l-o dev tree, determine whether MPU freq or DSP OPP id
* freq is higher. Find the OPP ID corresponding to the
* higher frequency. Call clk_round_rate() and clk_set_rate()
* on the OPP custom clock.
*
* CDP should just be able to set the VDD1 OPP clock rate here.
*/
}
unsigned long omap_pm_cpu_get_freq(void)
{
pr_debug("OMAP PM: CPUFreq requests current CPU frequency\n");
/*
* Call clk_get_rate() on the mpu_ck.
*/
return 0;
}
/*
* Device context loss tracking
*/
int omap_pm_get_dev_context_loss_count(struct device *dev)
{
if (!dev) {
WARN_ON(1);
return -EINVAL;
};
pr_debug("OMAP PM: returning context loss count for dev %s\n",
dev_name(dev));
/*
* Map the device to the powerdomain. Return the powerdomain
* off counter.
*/
return 0;
}
/* Should be called before clk framework init */
int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
struct omap_opp *dsp_opp_table,
struct omap_opp *l3_opp_table)
{
mpu_opps = mpu_opp_table;
dsp_opps = dsp_opp_table;
l3_opps = l3_opp_table;
return 0;
}
/* Must be called after clock framework is initialized */
int __init omap_pm_if_init(void)
{
return 0;
}
void omap_pm_if_exit(void)
{
/* Deallocate CPUFreq frequency table here */
}

687
arch/arm/plat-omap/omap_device.c Normal file
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@ -0,0 +1,687 @@
/*
* omap_device implementation
*
* Copyright (C) 2009 Nokia Corporation
* Paul Walmsley
*
* Developed in collaboration with (alphabetical order): Benoit
* Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram
* Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard
* Woodruff
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This code provides a consistent interface for OMAP device drivers
* to control power management and interconnect properties of their
* devices.
*
* In the medium- to long-term, this code should either be
* a) implemented via arch-specific pointers in platform_data
* or
* b) implemented as a proper omap_bus/omap_device in Linux, no more
* platform_data func pointers
*
*
* Guidelines for usage by driver authors:
*
* 1. These functions are intended to be used by device drivers via
* function pointers in struct platform_data. As an example,
* omap_device_enable() should be passed to the driver as
*
* struct foo_driver_platform_data {
* ...
* int (*device_enable)(struct platform_device *pdev);
* ...
* }
*
* Note that the generic "device_enable" name is used, rather than
* "omap_device_enable". This is so other architectures can pass in their
* own enable/disable functions here.
*
* This should be populated during device setup:
*
* ...
* pdata->device_enable = omap_device_enable;
* ...
*
* 2. Drivers should first check to ensure the function pointer is not null
* before calling it, as in:
*
* if (pdata->device_enable)
* pdata->device_enable(pdev);
*
* This allows other architectures that don't use similar device_enable()/
* device_shutdown() functions to execute normally.
*
* ...
*
* Suggested usage by device drivers:
*
* During device initialization:
* device_enable()
*
* During device idle:
* (save remaining device context if necessary)
* device_idle();
*
* During device resume:
* device_enable();
* (restore context if necessary)
*
* During device shutdown:
* device_shutdown()
* (device must be reinitialized at this point to use it again)
*
*/
#undef DEBUG
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/io.h>
#include <mach/omap_device.h>
#include <mach/omap_hwmod.h>
/* These parameters are passed to _omap_device_{de,}activate() */
#define USE_WAKEUP_LAT 0
#define IGNORE_WAKEUP_LAT 1
/* XXX this should be moved into a separate file */
#if defined(CONFIG_ARCH_OMAP2420)
# define OMAP_32KSYNCT_BASE 0x48004000
#elif defined(CONFIG_ARCH_OMAP2430)
# define OMAP_32KSYNCT_BASE 0x49020000
#elif defined(CONFIG_ARCH_OMAP3430)
# define OMAP_32KSYNCT_BASE 0x48320000
#else
# error Unknown OMAP device
#endif
/* Private functions */
/**
* _read_32ksynct - read the OMAP 32K sync timer
*
* Returns the current value of the 32KiHz synchronization counter.
* XXX this should be generalized to simply read the system clocksource.
* XXX this should be moved to a separate synctimer32k.c file
*/
static u32 _read_32ksynct(void)
{
if (!cpu_class_is_omap2())
BUG();
return __raw_readl(OMAP2_IO_ADDRESS(OMAP_32KSYNCT_BASE + 0x010));
}
/**
* _omap_device_activate - increase device readiness
* @od: struct omap_device *
* @ignore_lat: increase to latency target (0) or full readiness (1)?
*
* Increase readiness of omap_device @od (thus decreasing device
* wakeup latency, but consuming more power). If @ignore_lat is
* IGNORE_WAKEUP_LAT, make the omap_device fully active. Otherwise,
* if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup
* latency is greater than the requested maximum wakeup latency, step
* backwards in the omap_device_pm_latency table to ensure the
* device's maximum wakeup latency is less than or equal to the
* requested maximum wakeup latency. Returns 0.
*/
static int _omap_device_activate(struct omap_device *od, u8 ignore_lat)
{
u32 a, b;
pr_debug("omap_device: %s: activating\n", od->pdev.name);
while (od->pm_lat_level > 0) {
struct omap_device_pm_latency *odpl;
int act_lat = 0;
od->pm_lat_level--;
odpl = od->pm_lats + od->pm_lat_level;
if (!ignore_lat &&
(od->dev_wakeup_lat <= od->_dev_wakeup_lat_limit))
break;
a = _read_32ksynct();
/* XXX check return code */
odpl->activate_func(od);
b = _read_32ksynct();
act_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */
pr_debug("omap_device: %s: pm_lat %d: activate: elapsed time "
"%d usec\n", od->pdev.name, od->pm_lat_level, act_lat);
WARN(act_lat > odpl->activate_lat, "omap_device: %s.%d: "
"activate step %d took longer than expected (%d > %d)\n",
od->pdev.name, od->pdev.id, od->pm_lat_level,
act_lat, odpl->activate_lat);
od->dev_wakeup_lat -= odpl->activate_lat;
}
return 0;
}
/**
* _omap_device_deactivate - decrease device readiness
* @od: struct omap_device *
* @ignore_lat: decrease to latency target (0) or full inactivity (1)?
*
* Decrease readiness of omap_device @od (thus increasing device
* wakeup latency, but conserving power). If @ignore_lat is
* IGNORE_WAKEUP_LAT, make the omap_device fully inactive. Otherwise,
* if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup
* latency is less than the requested maximum wakeup latency, step
* forwards in the omap_device_pm_latency table to ensure the device's
* maximum wakeup latency is less than or equal to the requested
* maximum wakeup latency. Returns 0.
*/
static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat)
{
u32 a, b;
pr_debug("omap_device: %s: deactivating\n", od->pdev.name);
while (od->pm_lat_level < od->pm_lats_cnt) {
struct omap_device_pm_latency *odpl;
int deact_lat = 0;
odpl = od->pm_lats + od->pm_lat_level;
if (!ignore_lat &&
((od->dev_wakeup_lat + odpl->activate_lat) >
od->_dev_wakeup_lat_limit))
break;
a = _read_32ksynct();
/* XXX check return code */
odpl->deactivate_func(od);
b = _read_32ksynct();
deact_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */
pr_debug("omap_device: %s: pm_lat %d: deactivate: elapsed time "
"%d usec\n", od->pdev.name, od->pm_lat_level,
deact_lat);
WARN(deact_lat > odpl->deactivate_lat, "omap_device: %s.%d: "
"deactivate step %d took longer than expected (%d > %d)\n",
od->pdev.name, od->pdev.id, od->pm_lat_level,
deact_lat, odpl->deactivate_lat);
od->dev_wakeup_lat += odpl->activate_lat;
od->pm_lat_level++;
}
return 0;
}
static inline struct omap_device *_find_by_pdev(struct platform_device *pdev)
{
return container_of(pdev, struct omap_device, pdev);
}
/* Public functions for use by core code */
/**
* omap_device_count_resources - count number of struct resource entries needed
* @od: struct omap_device *
*
* Count the number of struct resource entries needed for this
* omap_device @od. Used by omap_device_build_ss() to determine how
* much memory to allocate before calling
* omap_device_fill_resources(). Returns the count.
*/
int omap_device_count_resources(struct omap_device *od)
{
struct omap_hwmod *oh;
int c = 0;
int i;
for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
c += omap_hwmod_count_resources(oh);
pr_debug("omap_device: %s: counted %d total resources across %d "
"hwmods\n", od->pdev.name, c, od->hwmods_cnt);
return c;
}
/**
* omap_device_fill_resources - fill in array of struct resource
* @od: struct omap_device *
* @res: pointer to an array of struct resource to be filled in
*
* Populate one or more empty struct resource pointed to by @res with
* the resource data for this omap_device @od. Used by
* omap_device_build_ss() after calling omap_device_count_resources().
* Ideally this function would not be needed at all. If omap_device
* replaces platform_device, then we can specify our own
* get_resource()/ get_irq()/etc functions that use the underlying
* omap_hwmod information. Or if platform_device is extended to use
* subarchitecture-specific function pointers, the various
* platform_device functions can simply call omap_device internal
* functions to get device resources. Hacking around the existing
* platform_device code wastes memory. Returns 0.
*/
int omap_device_fill_resources(struct omap_device *od, struct resource *res)
{
struct omap_hwmod *oh;
int c = 0;
int i, r;
for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) {
r = omap_hwmod_fill_resources(oh, res);
res += r;
c += r;
}
return 0;
}
/**
* omap_device_build - build and register an omap_device with one omap_hwmod
* @pdev_name: name of the platform_device driver to use
* @pdev_id: this platform_device's connection ID
* @oh: ptr to the single omap_hwmod that backs this omap_device
* @pdata: platform_data ptr to associate with the platform_device
* @pdata_len: amount of memory pointed to by @pdata
* @pm_lats: pointer to a omap_device_pm_latency array for this device
* @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
*
* Convenience function for building and registering a single
* omap_device record, which in turn builds and registers a
* platform_device record. See omap_device_build_ss() for more
* information. Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise,
* passes along the return value of omap_device_build_ss().
*/
struct omap_device *omap_device_build(const char *pdev_name, int pdev_id,
struct omap_hwmod *oh, void *pdata,
int pdata_len,
struct omap_device_pm_latency *pm_lats,
int pm_lats_cnt)
{
struct omap_hwmod *ohs[] = { oh };
if (!oh)
return ERR_PTR(-EINVAL);
return omap_device_build_ss(pdev_name, pdev_id, ohs, 1, pdata,
pdata_len, pm_lats, pm_lats_cnt);
}
/**
* omap_device_build_ss - build and register an omap_device with multiple hwmods
* @pdev_name: name of the platform_device driver to use
* @pdev_id: this platform_device's connection ID
* @oh: ptr to the single omap_hwmod that backs this omap_device
* @pdata: platform_data ptr to associate with the platform_device
* @pdata_len: amount of memory pointed to by @pdata
* @pm_lats: pointer to a omap_device_pm_latency array for this device
* @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
*
* Convenience function for building and registering an omap_device
* subsystem record. Subsystem records consist of multiple
* omap_hwmods. This function in turn builds and registers a
* platform_device record. Returns an ERR_PTR() on error, or passes
* along the return value of omap_device_register().
*/
struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
struct omap_hwmod **ohs, int oh_cnt,
void *pdata, int pdata_len,
struct omap_device_pm_latency *pm_lats,
int pm_lats_cnt)
{
int ret = -ENOMEM;
struct omap_device *od;
char *pdev_name2;
struct resource *res = NULL;
int res_count;
struct omap_hwmod **hwmods;
if (!ohs || oh_cnt == 0 || !pdev_name)
return ERR_PTR(-EINVAL);
if (!pdata && pdata_len > 0)
return ERR_PTR(-EINVAL);
pr_debug("omap_device: %s: building with %d hwmods\n", pdev_name,
oh_cnt);
od = kzalloc(sizeof(struct omap_device), GFP_KERNEL);
if (!od)
return ERR_PTR(-ENOMEM);
od->hwmods_cnt = oh_cnt;
hwmods = kzalloc(sizeof(struct omap_hwmod *) * oh_cnt,
GFP_KERNEL);
if (!hwmods)
goto odbs_exit1;
memcpy(hwmods, ohs, sizeof(struct omap_hwmod *) * oh_cnt);
od->hwmods = hwmods;
pdev_name2 = kzalloc(strlen(pdev_name) + 1, GFP_KERNEL);
if (!pdev_name2)
goto odbs_exit2;
strcpy(pdev_name2, pdev_name);
od->pdev.name = pdev_name2;
od->pdev.id = pdev_id;
res_count = omap_device_count_resources(od);
if (res_count > 0) {
res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL);
if (!res)
goto odbs_exit3;
}
omap_device_fill_resources(od, res);
od->pdev.num_resources = res_count;
od->pdev.resource = res;
platform_device_add_data(&od->pdev, pdata, pdata_len);
od->pm_lats = pm_lats;
od->pm_lats_cnt = pm_lats_cnt;
ret = omap_device_register(od);
if (ret)
goto odbs_exit4;
return od;
odbs_exit4:
kfree(res);
odbs_exit3:
kfree(pdev_name2);
odbs_exit2:
kfree(hwmods);
odbs_exit1:
kfree(od);
pr_err("omap_device: %s: build failed (%d)\n", pdev_name, ret);
return ERR_PTR(ret);
}
/**
* omap_device_register - register an omap_device with one omap_hwmod
* @od: struct omap_device * to register
*
* Register the omap_device structure. This currently just calls
* platform_device_register() on the underlying platform_device.
* Returns the return value of platform_device_register().
*/
int omap_device_register(struct omap_device *od)
{
pr_debug("omap_device: %s: registering\n", od->pdev.name);
return platform_device_register(&od->pdev);
}
/* Public functions for use by device drivers through struct platform_data */
/**
* omap_device_enable - fully activate an omap_device
* @od: struct omap_device * to activate
*
* Do whatever is necessary for the hwmods underlying omap_device @od
* to be accessible and ready to operate. This generally involves
* enabling clocks, setting SYSCONFIG registers; and in the future may
* involve remuxing pins. Device drivers should call this function
* (through platform_data function pointers) where they would normally
* enable clocks, etc. Returns -EINVAL if called when the omap_device
* is already enabled, or passes along the return value of
* _omap_device_activate().
*/
int omap_device_enable(struct platform_device *pdev)
{
int ret;
struct omap_device *od;
od = _find_by_pdev(pdev);
if (od->_state == OMAP_DEVICE_STATE_ENABLED) {
WARN(1, "omap_device: %s.%d: omap_device_enable() called from "
"invalid state\n", od->pdev.name, od->pdev.id);
return -EINVAL;
}
/* Enable everything if we're enabling this device from scratch */
if (od->_state == OMAP_DEVICE_STATE_UNKNOWN)
od->pm_lat_level = od->pm_lats_cnt;
ret = _omap_device_activate(od, IGNORE_WAKEUP_LAT);
od->dev_wakeup_lat = 0;
od->_dev_wakeup_lat_limit = INT_MAX;
od->_state = OMAP_DEVICE_STATE_ENABLED;
return ret;
}
/**
* omap_device_idle - idle an omap_device
* @od: struct omap_device * to idle
*
* Idle omap_device @od by calling as many .deactivate_func() entries
* in the omap_device's pm_lats table as is possible without exceeding
* the device's maximum wakeup latency limit, pm_lat_limit. Device
* drivers should call this function (through platform_data function
* pointers) where they would normally disable clocks after operations
* complete, etc.. Returns -EINVAL if the omap_device is not
* currently enabled, or passes along the return value of
* _omap_device_deactivate().
*/
int omap_device_idle(struct platform_device *pdev)
{
int ret;
struct omap_device *od;
od = _find_by_pdev(pdev);
if (od->_state != OMAP_DEVICE_STATE_ENABLED) {
WARN(1, "omap_device: %s.%d: omap_device_idle() called from "
"invalid state\n", od->pdev.name, od->pdev.id);
return -EINVAL;
}
ret = _omap_device_deactivate(od, USE_WAKEUP_LAT);
od->_state = OMAP_DEVICE_STATE_IDLE;
return ret;
}
/**
* omap_device_shutdown - shut down an omap_device
* @od: struct omap_device * to shut down
*
* Shut down omap_device @od by calling all .deactivate_func() entries
* in the omap_device's pm_lats table and then shutting down all of
* the underlying omap_hwmods. Used when a device is being "removed"
* or a device driver is being unloaded. Returns -EINVAL if the
* omap_device is not currently enabled or idle, or passes along the
* return value of _omap_device_deactivate().
*/
int omap_device_shutdown(struct platform_device *pdev)
{
int ret, i;
struct omap_device *od;
struct omap_hwmod *oh;
od = _find_by_pdev(pdev);
if (od->_state != OMAP_DEVICE_STATE_ENABLED &&
od->_state != OMAP_DEVICE_STATE_IDLE) {
WARN(1, "omap_device: %s.%d: omap_device_shutdown() called "
"from invalid state\n", od->pdev.name, od->pdev.id);
return -EINVAL;
}
ret = _omap_device_deactivate(od, IGNORE_WAKEUP_LAT);
for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
omap_hwmod_shutdown(oh);
od->_state = OMAP_DEVICE_STATE_SHUTDOWN;
return ret;
}
/**
* omap_device_align_pm_lat - activate/deactivate device to match wakeup lat lim
* @od: struct omap_device *
*
* When a device's maximum wakeup latency limit changes, call some of
* the .activate_func or .deactivate_func function pointers in the
* omap_device's pm_lats array to ensure that the device's maximum
* wakeup latency is less than or equal to the new latency limit.
* Intended to be called by OMAP PM code whenever a device's maximum
* wakeup latency limit changes (e.g., via
* omap_pm_set_dev_wakeup_lat()). Returns 0 if nothing needs to be
* done (e.g., if the omap_device is not currently idle, or if the
* wakeup latency is already current with the new limit) or passes
* along the return value of _omap_device_deactivate() or
* _omap_device_activate().
*/
int omap_device_align_pm_lat(struct platform_device *pdev,
u32 new_wakeup_lat_limit)
{
int ret = -EINVAL;
struct omap_device *od;
od = _find_by_pdev(pdev);
if (new_wakeup_lat_limit == od->dev_wakeup_lat)
return 0;
od->_dev_wakeup_lat_limit = new_wakeup_lat_limit;
if (od->_state != OMAP_DEVICE_STATE_IDLE)
return 0;
else if (new_wakeup_lat_limit > od->dev_wakeup_lat)
ret = _omap_device_deactivate(od, USE_WAKEUP_LAT);
else if (new_wakeup_lat_limit < od->dev_wakeup_lat)
ret = _omap_device_activate(od, USE_WAKEUP_LAT);
return ret;
}
/**
* omap_device_get_pwrdm - return the powerdomain * associated with @od
* @od: struct omap_device *
*
* Return the powerdomain associated with the first underlying
* omap_hwmod for this omap_device. Intended for use by core OMAP PM
* code. Returns NULL on error or a struct powerdomain * upon
* success.
*/
struct powerdomain *omap_device_get_pwrdm(struct omap_device *od)
{
/*
* XXX Assumes that all omap_hwmod powerdomains are identical.
* This may not necessarily be true. There should be a sanity
* check in here to WARN() if any difference appears.
*/
if (!od->hwmods_cnt)
return NULL;
return omap_hwmod_get_pwrdm(od->hwmods[0]);
}
/*
* Public functions intended for use in omap_device_pm_latency
* .activate_func and .deactivate_func function pointers
*/
/**
* omap_device_enable_hwmods - call omap_hwmod_enable() on all hwmods
* @od: struct omap_device *od
*
* Enable all underlying hwmods. Returns 0.
*/
int omap_device_enable_hwmods(struct omap_device *od)
{
struct omap_hwmod *oh;
int i;
for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
omap_hwmod_enable(oh);
/* XXX pass along return value here? */
return 0;
}
/**
* omap_device_idle_hwmods - call omap_hwmod_idle() on all hwmods
* @od: struct omap_device *od
*
* Idle all underlying hwmods. Returns 0.
*/
int omap_device_idle_hwmods(struct omap_device *od)
{
struct omap_hwmod *oh;
int i;
for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
omap_hwmod_idle(oh);
/* XXX pass along return value here? */
return 0;
}
/**
* omap_device_disable_clocks - disable all main and interface clocks
* @od: struct omap_device *od
*
* Disable the main functional clock and interface clock for all of the
* omap_hwmods associated with the omap_device. Returns 0.
*/
int omap_device_disable_clocks(struct omap_device *od)
{
struct omap_hwmod *oh;
int i;
for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
omap_hwmod_disable_clocks(oh);
/* XXX pass along return value here? */
return 0;
}
/**
* omap_device_enable_clocks - enable all main and interface clocks
* @od: struct omap_device *od
*
* Enable the main functional clock and interface clock for all of the
* omap_hwmods associated with the omap_device. Returns 0.
*/
int omap_device_enable_clocks(struct omap_device *od)
{
struct omap_hwmod *oh;
int i;
for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
omap_hwmod_enable_clocks(oh);
/* XXX pass along return value here? */
return 0;
}