From 1b046bf67327c44b108fe79866b56448133a391e Mon Sep 17 00:00:00 2001
From: Santosh Mardi <gsantosh@qti.qualcomm.com>
Date: Mon, 23 Nov 2020 21:20:07 +0530
Subject: [PATCH] ARM: dts: msm: update PMU cache and log buffer addresses for
 holi target

Locations of PMU cache and log buffer are changed on RIMPS side.
Update them accordingly for driver.

Change-Id: If396306e148ff670eb10c9849f3f367742d42fe7
---
 qcom/holi.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/qcom/holi.dtsi b/qcom/holi.dtsi
index e6014ee34a26..2b043ec48608 100644
--- a/qcom/holi.dtsi
+++ b/qcom/holi.dtsi
@@ -1444,7 +1444,7 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
-		reg = <0x0fd04980 0x300>;
+		reg = <0xfd04580 0x280>;
 		reg-names = "pmu-base";
 
 		cpu0_rimps_l3_latmon: qcom,cpu0-rimps-l3-latmon {
@@ -1470,7 +1470,7 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
-		reg = <0x0fd04980 0x300>;
+		reg = <0xfd04580 0x280>;
 		reg-names = "pmu-base";
 
 		cpu6_rimps_l3_latmon: qcom,cpu6-rimps-l3-latmon {
@@ -1513,8 +1513,8 @@
 
 	rimps_log: qcom,rimps_log@fd04780 {
 		compatible = "qcom,rimps-log";
-		reg = <0x0fd04580 0x200>,
-				<0x0fd04780 0x200>;
+		reg = <0x0fd04800 0x200>,
+				<0x0fd04A00 0x200>;
 		mboxes = <&rimps 1>;
 	};