diff --git a/arch/arm64/boot/dts/vendor/qcom/blair.dtsi b/arch/arm64/boot/dts/vendor/qcom/blair.dtsi
index 8956d7e3b0b6..56c2de2958f5 100644
--- a/arch/arm64/boot/dts/vendor/qcom/blair.dtsi
+++ b/arch/arm64/boot/dts/vendor/qcom/blair.dtsi
@@ -1288,7 +1288,7 @@
 		clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0>;
 		clock-names = "xo", "alternate";
 		qcom,lut-row-size = <4>;
-		qcom,max-lut-entries = <12>;
+		qcom,lut-max-entries = <12>;
 		qcom,skip-enable-check;
 		interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/vendor/qcom/holi.dtsi b/arch/arm64/boot/dts/vendor/qcom/holi.dtsi
index 880953151a60..9b717d6d1f6c 100644
--- a/arch/arm64/boot/dts/vendor/qcom/holi.dtsi
+++ b/arch/arm64/boot/dts/vendor/qcom/holi.dtsi
@@ -1295,7 +1295,7 @@
 		clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0>;
 		clock-names = "xo", "alternate";
 		qcom,lut-row-size = <4>;
-		qcom,max-lut-entries = <12>;
+		qcom,lut-max-entries = <12>;
 		qcom,skip-enable-check;
 		qcom,perf-lock-support;
 		interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm64/boot/dts/vendor/qcom/monaco.dtsi b/arch/arm64/boot/dts/vendor/qcom/monaco.dtsi
index d42c24142f3e..7d976aa4aab6 100644
--- a/arch/arm64/boot/dts/vendor/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/vendor/qcom/monaco.dtsi
@@ -886,7 +886,7 @@
 		clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0>;
 		clock-names = "xo", "alternate";
 		qcom,no-accumulative-counter;
-		qcom,max-lut-entries = <12>;
+		qcom,lut-max-entries = <12>;
 		#freq-domain-cells = <2>;
 	};
 
diff --git a/arch/arm64/boot/dts/vendor/qcom/qrb2210-rb1.dtsi b/arch/arm64/boot/dts/vendor/qcom/qrb2210-rb1.dtsi
index e7bcfc68dc5e..6e6e4410b3d8 100644
--- a/arch/arm64/boot/dts/vendor/qcom/qrb2210-rb1.dtsi
+++ b/arch/arm64/boot/dts/vendor/qcom/qrb2210-rb1.dtsi
@@ -903,7 +903,7 @@
 		clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0>;
 		clock-names = "xo", "alternate";
 		qcom,no-accumulative-counter;
-		qcom,max-lut-entries = <12>;
+		qcom,lut-max-entries = <12>;
 		#freq-domain-cells = <2>;
 	};