From 6ba578d221fa6021f64c046fd1214a860e6e722d Mon Sep 17 00:00:00 2001
From: Jagadeesh Kona <jkona@codeaurora.org>
Date: Sat, 29 Aug 2020 00:30:40 +0530
Subject: [PATCH] clk: qcom: gcc-shima: Update CPUSS AHB clock frequency to
 19.2MHz

Set CPUSS AHB clock frequency to 19.2MHz.

Change-Id: I9f21883bcffc5ba1363aacdb22db9c1d367e06d2
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
---
 drivers/clk/qcom/gcc-shima.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/clk/qcom/gcc-shima.c b/drivers/clk/qcom/gcc-shima.c
index 56b1f7d276c4..2584e46414df 100644
--- a/drivers/clk/qcom/gcc-shima.c
+++ b/drivers/clk/qcom/gcc-shima.c
@@ -3,6 +3,7 @@
  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  */
 
+#include <linux/clk.h>
 #include <linux/clk-provider.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -3525,6 +3526,8 @@ static int gcc_shima_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	clk_set_rate(gcc_cpuss_ahb_clk.clkr.hw.clk, 19200000);
+
 	dev_info(&pdev->dev, "Registered GCC clocks\n");
 
 	return ret;