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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-14 00:24:41 -04:00
qcacmn: Set default value for REO dest ctrl register
Currently in some case we are receiving non error packets on REO2TCL ring, which is causing issue. Fix is to set DEST_RING_MAPPING_0 to SW1 for REO dest ctrl register, So that non error packets with reo_destination_indication with 0x0 in the reo entrance ring will be routed to SW1 ring. Change-Id: I67f78f35e7dba899943307902d99d0325a60498f CRs-Fixed: 3150186
This commit is contained in:
parent
87b0fe29b4
commit
1fc8c2abd1
15 changed files with 98 additions and 7 deletions
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@ -701,7 +702,7 @@ int dp_ipa_ring_resource_setup(struct dp_soc *soc,
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* Set DEST_RING_MAPPING_4 to SW2 as default value for
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* DESTINATION_RING_CTRL_IX_0.
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*/
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ix0 = HAL_REO_REMAP_IX0(REO_REMAP_TCL, 0) |
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ix0 = HAL_REO_REMAP_IX0(REO_REMAP_SW1, 0) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW1, 1) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW2, 2) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW3, 3) |
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@ -988,7 +989,7 @@ QDF_STATUS dp_ipa_enable_autonomy(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
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return QDF_STATUS_E_AGAIN;
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/* Call HAL API to remap REO rings to REO2IPA ring */
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ix0 = HAL_REO_REMAP_IX0(REO_REMAP_TCL, 0) |
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ix0 = HAL_REO_REMAP_IX0(REO_REMAP_SW1, 0) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW4, 1) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW1, 2) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW4, 3) |
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@ -1025,6 +1026,7 @@ QDF_STATUS dp_ipa_disable_autonomy(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
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struct dp_pdev *pdev =
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dp_get_pdev_from_soc_pdev_id_wifi3(soc, pdev_id);
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uint32_t ix0;
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uint32_t ix1;
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uint32_t ix2;
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uint32_t ix3;
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@ -1040,7 +1042,7 @@ QDF_STATUS dp_ipa_disable_autonomy(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
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return QDF_STATUS_E_AGAIN;
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/* Call HAL API to remap REO rings to REO2IPA ring */
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ix0 = HAL_REO_REMAP_IX0(REO_REMAP_TCL, 0) |
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ix0 = HAL_REO_REMAP_IX0(REO_REMAP_SW1, 0) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW1, 1) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW2, 2) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW3, 3) |
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@ -1050,7 +1052,7 @@ QDF_STATUS dp_ipa_disable_autonomy(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 7);
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if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
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dp_reo_remap_config(soc, &ix2, &ix3);
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dp_reo_remap_config(soc, &ix1, &ix2, &ix3);
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hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
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&ix2, &ix3);
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@ -255,7 +256,7 @@ QDF_STATUS dp_ipa_handle_rx_buf_smmu_mapping(struct dp_soc *soc,
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uint32_t size,
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bool create);
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bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap1,
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bool dp_reo_remap_config(struct dp_soc *soc,uint32_t *remap0, uint32_t *remap1,
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uint32_t *remap2);
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bool dp_ipa_is_mdm_platform(void);
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@ -3398,12 +3399,14 @@ static void dp_soc_reset_intr_mask(struct dp_soc *soc)
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* @remap2: output parameter indicates reo remap 2 register value
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* Return: bool type, true if remap is configured else false.
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*/
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bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap1, uint32_t *remap2)
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bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap0,
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uint32_t *remap1, uint32_t *remap2)
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{
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uint32_t ring[4] = {REO_REMAP_SW1, REO_REMAP_SW2,
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REO_REMAP_SW3};
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hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
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3, remap1, remap2);
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hal_compute_reo_remap_ix0(soc->hal_soc, remap0);
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dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
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return true;
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@ -3529,7 +3532,7 @@ static uint8_t dp_reo_ring_selection(uint32_t value, uint32_t *ring)
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return num;
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}
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static bool dp_reo_remap_config(struct dp_soc *soc,
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static bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap0,
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uint32_t *remap1,
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uint32_t *remap2)
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{
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@ -3547,6 +3550,7 @@ static bool dp_reo_remap_config(struct dp_soc *soc,
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num = dp_reo_ring_selection(value, ring);
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hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
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num, remap1, remap2);
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hal_compute_reo_remap_ix0(soc->hal_soc, remap0);
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break;
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case dp_nss_cfg_first_radio:
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@ -12537,6 +12541,7 @@ void *dp_soc_init(struct dp_soc *soc, HTC_HANDLE htc_handle,
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* are offloaded to NSS
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*/
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if (dp_reo_remap_config(soc,
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&reo_params.remap0,
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&reo_params.remap1,
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&reo_params.remap2))
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reo_params.rx_hash_enabled = true;
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@ -2417,6 +2418,15 @@ void hal_compute_reo_remap_ix2_ix3(hal_soc_handle_t hal_soc_hdl,
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num_rings, remap1, remap2);
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}
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static inline
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void hal_compute_reo_remap_ix0(hal_soc_handle_t hal_soc_hdl, uint32_t *remap0)
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{
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struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
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if (hal_soc->ops->hal_compute_reo_remap_ix0)
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hal_soc->ops->hal_compute_reo_remap_ix0(remap0);
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}
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/**
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* hal_setup_link_idle_list - Setup scattered idle list using the
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* buffer list provided
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@ -1700,6 +1701,17 @@ static void hal_reo_setup_generic(struct hal_soc *soc,
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* 7: NOT_USED.
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*/
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if (reo_params->rx_hash_enabled) {
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if (reo_params->remap0)
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HAL_REG_WRITE(soc,
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HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(
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SEQ_WCSS_UMAC_REO_REG_OFFSET),
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reo_params->remap0);
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hal_debug("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR 0x%x",
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HAL_REG_READ(soc,
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HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(
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SEQ_WCSS_UMAC_REO_REG_OFFSET)));
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HAL_REG_WRITE(soc,
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HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(
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SEQ_WCSS_UMAC_REO_REG_OFFSET),
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@ -508,6 +509,8 @@ struct shadow_reg_config {
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struct hal_reo_params {
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/** rx hash steering enabled or disabled */
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bool rx_hash_enabled;
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/** reo remap 0 register */
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uint32_t remap0;
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/** reo remap 1 register */
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uint32_t remap1;
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/** reo remap 2 register */
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@ -675,6 +678,7 @@ struct hal_hw_txrx_ops {
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uint32_t num_rings,
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uint32_t *remap1,
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uint32_t *remap2);
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void (*hal_compute_reo_remap_ix0)(uint32_t *remap0);
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uint32_t (*hal_rx_flow_setup_cmem_fse)(
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struct hal_soc *soc, uint32_t cmem_ba,
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uint32_t table_offset, uint8_t *rx_flow);
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@ -1771,6 +1772,7 @@ struct hal_hw_txrx_ops qca5018_hal_hw_txrx_ops = {
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NULL,
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NULL,
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NULL,
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NULL,
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NULL
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};
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@ -1152,6 +1153,7 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
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NULL,
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NULL,
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NULL,
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NULL,
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NULL
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};
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@ -1090,6 +1091,19 @@ void hal_compute_reo_remap_ix2_ix3_6390(uint32_t *ring, uint32_t num_rings,
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}
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}
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static
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void hal_compute_reo_remap_ix0_6390(uint32_t *remap0)
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{
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*remap0 = HAL_REO_REMAP_IX0(REO_REMAP_SW1, 0) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW1, 1) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW2, 2) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW3, 3) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW2, 4) |
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HAL_REO_REMAP_IX0(REO_REMAP_RELEASE, 5) |
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 6) |
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 7);
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}
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struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
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/* init and setup */
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hal_srng_dst_hw_init_generic,
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@ -1202,6 +1216,7 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
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hal_rx_mpdu_end_offset_get_generic,
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NULL,
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hal_compute_reo_remap_ix2_ix3_6390,
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hal_compute_reo_remap_ix0_6390,
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NULL,
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NULL,
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NULL,
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@ -1666,6 +1667,19 @@ void hal_compute_reo_remap_ix2_ix3_6490(uint32_t *ring, uint32_t num_rings,
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}
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}
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static
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void hal_compute_reo_remap_ix0_6490(uint32_t *remap0)
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{
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*remap0 = HAL_REO_REMAP_IX0(REO_REMAP_SW1, 0) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW1, 1) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW2, 2) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW3, 3) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW2, 4) |
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HAL_REO_REMAP_IX0(REO_REMAP_RELEASE, 5) |
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 6) |
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 7);
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}
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struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
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/* init and setup */
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hal_srng_dst_hw_init_generic,
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@ -1784,6 +1798,7 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
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hal_rx_mpdu_end_offset_get_generic,
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hal_rx_flow_setup_fse_6490,
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hal_compute_reo_remap_ix2_ix3_6490,
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hal_compute_reo_remap_ix0_6490,
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NULL,
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NULL,
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NULL,
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@ -1824,6 +1825,19 @@ void hal_compute_reo_remap_ix2_ix3_6750(uint32_t *ring, uint32_t num_rings,
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}
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}
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static
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void hal_compute_reo_remap_ix0_6750(uint32_t *remap0)
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{
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*remap0 = HAL_REO_REMAP_IX0(REO_REMAP_SW1, 0) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW1, 1) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW2, 2) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW3, 3) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW2, 4) |
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HAL_REO_REMAP_IX0(REO_REMAP_RELEASE, 5) |
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 6) |
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 7);
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}
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struct hal_hw_txrx_ops qca6750_hal_hw_txrx_ops = {
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/* init and setup */
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hal_srng_dst_hw_init_generic,
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@ -1942,6 +1956,7 @@ struct hal_hw_txrx_ops qca6750_hal_hw_txrx_ops = {
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hal_rx_mpdu_end_offset_get_generic,
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hal_rx_flow_setup_fse_6750,
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hal_compute_reo_remap_ix2_ix3_6750,
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hal_compute_reo_remap_ix0_6750,
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/* CMEM FSE */
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hal_rx_flow_setup_cmem_fse_6750,
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@ -1328,6 +1329,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
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NULL,
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NULL,
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NULL,
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NULL,
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NULL
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};
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
|
||||
|
|
@ -1331,6 +1332,7 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
|
|||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
|
|
@ -1862,6 +1863,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
|
|||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
|
|
@ -1778,6 +1779,7 @@ struct hal_hw_txrx_ops qcn9100_hal_hw_txrx_ops = {
|
|||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue