From 5f94950b3e7a8e4d8180e37e96cd6677503b8888 Mon Sep 17 00:00:00 2001 From: Shreyas K K Date: Sat, 26 Dec 2020 17:34:50 +0530 Subject: [PATCH] ARM: dts: msm: Add clock for SLPI pinctrl for SM8150 Add clock node to SLPI pinctrl driver for SM8150 target. Change-Id: I1cebf2f526e8e8a8815d13c984b5d304f57e250f --- bindings/pinctrl/qcom,slpi-pinctrl.txt | 6 ++++++ qcom/sm8150-slpi-pinctrl.dtsi | 2 ++ 2 files changed, 8 insertions(+) diff --git a/bindings/pinctrl/qcom,slpi-pinctrl.txt b/bindings/pinctrl/qcom,slpi-pinctrl.txt index 632bab8e5ad6..6992a03c8e72 100644 --- a/bindings/pinctrl/qcom,slpi-pinctrl.txt +++ b/bindings/pinctrl/qcom,slpi-pinctrl.txt @@ -20,6 +20,10 @@ Following properties are for SLPI Pin controller device main node. Value type: Definition: Number of PINs supported by the SLPI TLMM. +- clock-names: Should be "ssc-clk" + +- clocks: Handles to clocks specified in "clock-names" property. + Please refer to pinctrl-bindings.txt in this directory for details of the common pinctrl bindings used by client devices, including the meaning of the phrase "pin configuration node". @@ -92,6 +96,8 @@ Example: slpi_tlmm: slpi_pinctrl@02b40000 { compatible = "qcom,slpi-pinctrl"; qcom,num-pins = <14>; + clock-names = "ssc-clk"; + clocks = <&clock_scc SCC_QUPV3_S_HCLK_CLK>; reg = <0x02b40000 0x20000>; slpi_mclk0_active: slpi_mclk0_active { diff --git a/qcom/sm8150-slpi-pinctrl.dtsi b/qcom/sm8150-slpi-pinctrl.dtsi index b31c153a9c41..b393c12ac079 100644 --- a/qcom/sm8150-slpi-pinctrl.dtsi +++ b/qcom/sm8150-slpi-pinctrl.dtsi @@ -2,6 +2,8 @@ slpi_tlmm: slpi_pinctrl@02B40000 { compatible = "qcom,slpi-pinctrl"; reg = <0x2B40000 0x20000>; + clock-names = "ssc-clk"; + clocks = <&scc SCC_QUPV3_S_HCLK_CLK>; qcom,num-pins = <14>; status = "disabled";