diff --git a/qcom/lahaina-cdp.dtsi b/qcom/lahaina-cdp.dtsi
index 39903cb31383..735be4e52a9f 100644
--- a/qcom/lahaina-cdp.dtsi
+++ b/qcom/lahaina-cdp.dtsi
@@ -76,6 +76,26 @@
 	};
 };
 
+&i3c3 {
+	se-clock-frequency = <19200000>;
+	i3c-scl-hz = <3500000>;
+	i2c-scl-hz = <400000>;
+	status = "ok";
+
+	sn@0,23600000000 {
+		compatible = "qcom,sn-nci-i3c";
+		reg = <0x0 0x236 0x00000000>;
+		qcom,sn-ven = <&tlmm 62 0x00>;
+		qcom,sn-firm = <&tlmm 86 0x00>;
+		qcom,sn-clkreq = <&tlmm 63 0x00>;
+		pinctrl-names = "default", "sleep";
+		pinctrl-0 = <&nfc_enable_active &nfc_fwdl_active
+					&nfc_clk_req_active>;
+		pinctrl-1 = <&nfc_enable_suspend &nfc_fwdl_suspend
+					&nfc_clk_req_suspend>;
+	};
+};
+
 &sdhc_2 {
 	vdd-supply = <&pm8350c_l9>;
 	qcom,vdd-voltage-level = <2950000 2960000>;
diff --git a/qcom/lahaina-mtp.dtsi b/qcom/lahaina-mtp.dtsi
index 0bfed5030d89..0755a9157f64 100644
--- a/qcom/lahaina-mtp.dtsi
+++ b/qcom/lahaina-mtp.dtsi
@@ -78,6 +78,26 @@
 	};
 };
 
+&i3c3 {
+	se-clock-frequency = <19200000>;
+	i3c-scl-hz = <3500000>;
+	i2c-scl-hz = <400000>;
+	status = "ok";
+
+	sn@0,23600000000 {
+		compatible = "qcom,sn-nci-i3c";
+		reg = <0x0 0x236 0x00000000>;
+		qcom,sn-ven = <&tlmm 62 0x00>;
+		qcom,sn-firm = <&tlmm 86 0x00>;
+		qcom,sn-clkreq = <&tlmm 63 0x00>;
+		pinctrl-names = "default", "sleep";
+		pinctrl-0 = <&nfc_enable_active &nfc_fwdl_active
+					&nfc_clk_req_active>;
+		pinctrl-1 = <&nfc_enable_suspend &nfc_fwdl_suspend
+					&nfc_clk_req_suspend>;
+	};
+};
+
 &sdhc_2 {
 	vdd-supply = <&pm8350c_l9>;
 	qcom,vdd-voltage-level = <2950000 2960000>;
diff --git a/qcom/lahaina-pinctrl.dtsi b/qcom/lahaina-pinctrl.dtsi
index 1c87d161ae0e..68e461f8d38f 100644
--- a/qcom/lahaina-pinctrl.dtsi
+++ b/qcom/lahaina-pinctrl.dtsi
@@ -380,6 +380,92 @@
 		};
 	};
 
+	nfc {
+			nfc_enable_active: nfc_enable_active {
+				mux {
+					pins = "gpio62";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio62";
+					drive-strength = <2>; /* 2 MA */
+					bias-pull-up;
+				};
+			};
+
+			nfc_enable_suspend: nfc_enable_suspend {
+				mux {
+					pins = "gpio62";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio62";
+					drive-strength = <2>; /* 2 MA */
+					bias-disable;
+				};
+			};
+
+			nfc_fwdl_active: nfc_fwdl_active {
+				mux {
+					/* 86: Firmware */
+					pins = "gpio86";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio86";
+					drive-strength = <2>; /* 2 MA */
+					bias-disable;
+				};
+			};
+
+			nfc_fwdl_suspend: nfc_fwdl_suspend {
+				mux {
+					/*86: Firmware */
+					pins = "gpio86";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio86";
+					drive-strength = <2>; /* 2 MA */
+					bias-disable;
+				};
+			};
+
+			nfc_clk_req_active: nfc_clk_req_active {
+				/* active state */
+				mux {
+					/* GPIO 63: NFC CLOCK REQUEST */
+					pins = "gpio63";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio63";
+					drive-strength = <2>; /* 2 MA */
+					bias-pull-up;
+				};
+			};
+
+			nfc_clk_req_suspend: nfc_clk_req_suspend {
+				/* sleep state */
+				mux {
+					/* GPIO 63: NFC CLOCK REQUEST */
+					pins = "gpio63";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio63";
+					drive-strength = <2>; /* 2 MA */
+					bias-disable;
+				};
+			};
+	};
+
 	/* SPI */
 	qupv3_se0_spi_pins: qupv3_se0_spi_pins {
 		qupv3_se0_spi_active: qupv3_se0_spi_active {
diff --git a/qcom/lahaina-qrd.dtsi b/qcom/lahaina-qrd.dtsi
index 9ace5845158c..28392c7365b8 100644
--- a/qcom/lahaina-qrd.dtsi
+++ b/qcom/lahaina-qrd.dtsi
@@ -175,6 +175,26 @@
 	};
 };
 
+&i3c3 {
+	se-clock-frequency = <19200000>;
+	i3c-scl-hz = <3500000>;
+	i2c-scl-hz = <400000>;
+	status = "ok";
+
+	sn@0,23600000000 {
+		compatible = "qcom,sn-nci-i3c";
+		reg = <0x0 0x236 0x00000000>;
+		qcom,sn-ven = <&tlmm 62 0x00>;
+		qcom,sn-firm = <&tlmm 86 0x00>;
+		qcom,sn-clkreq = <&tlmm 63 0x00>;
+		pinctrl-names = "default", "sleep";
+		pinctrl-0 = <&nfc_enable_active &nfc_fwdl_active
+					&nfc_clk_req_active>;
+		pinctrl-1 = <&nfc_enable_suspend &nfc_fwdl_suspend
+					&nfc_clk_req_suspend>;
+	};
+};
+
 &dai_mi2s2 {
 	qcom,msm-mi2s-tx-lines = <1>;
 	pinctrl-names = "default", "sleep";