ARM: dts: socfpga: enable the data and instruction prefetch for the l2 cache

Just in case the firmware did not enable data and instruction prefetch in
the L2 cache controller, we enable it in the kernel.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This commit is contained in:
Dinh Nguyen 2015-07-16 15:48:50 -05:00
commit 2211a65862

View file

@ -639,6 +639,8 @@
cache-level = <2>;
arm,tag-latency = <1 1 1>;
arm,data-latency = <2 1 1>;
prefetch-data = <1>;
prefetch-instr = <1>;
};
mmc: dwmmc0@ff704000 {