msm: adsprpc: Remove output buffers from cache flush logic

Flush only input buffers during cache maintenance, removing output
buffers from flush logic, helpful when target or buffer is
non-coherent.

Acked-by: Deepika Singh <dsi@qti.qualcomm.com>
Change-Id: If84c5bcc0a136d2943ab96c137d0561b8ef8d47d
Signed-off-by: Tharun Kumar Merugu <mtharu@codeaurora.org>
This commit is contained in:
Tharun Kumar Merugu 2019-12-03 17:03:18 +05:30 • committed by Gerrit - the friendly Code Review server
commit 2296a3a971

View file

@ -1865,6 +1865,8 @@ static int get_args(uint32_t kernel, struct smq_invoke_ctx *ctx)
int i = ctx->overps[oix]->raix;
struct fastrpc_mmap *map = ctx->maps[i];
if (i+1 > inbufs) // Avoiding flush for outbufs
continue;
if (map && map->uncached)
continue;
if (ctx->fl->sctx->smmu.coherent &&