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[PATCH] paravirt: kpte flush

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Create a new PTE function which combines clearing a kernel PTE with the
subsequent flush.  This allows the two to be easily combined into a single
hypercall or paravirt-op.  More subtly, reverse the order of the flush for
kmap_atomic.  Instead of flushing on establishing a mapping, flush on clearing
a mapping.  This eliminates the possibility of leaving stale kmap entries
which may still have valid TLB mappings.  This is required for direct mode
hypervisors, which need to reprotect all mappings of a given page when
changing the page type from a normal page to a protected page (such as a page
table or descriptor table page).  But it also provides some nicer semantics
for real hardware, by providing extra debug-proofing against using stale
mappings, as well as ensuring that no stale mappings exist when changing the
cacheability attributes of a page, which could lead to cache conflicts when
two different types of mappings exist for the same page.

Signed-off-by: Zachary Amsden <[email protected]>
Cc: Rusty Russell <[email protected]>
Cc: Jeremy Fitzhardinge <[email protected]>
Cc: Andi Kleen <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
This commit is contained in:
Zachary Amsden 2006-09-30 23:29:35 -07:00 • committed by Linus Torvalds
commit 23002d88be
2 changed files with 14 additions and 11 deletions
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7
include/asm-i386/pgtable.h
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@ -441,6 +441,13 @@ extern pte_t *lookup_address(unsigned long address);
#define pte_unmap_nested(pte) do { } while (0)
#endif
/* Clear a kernel PTE and flush it from the TLB */
#define kpte_clear_flush(ptep, vaddr) \
do { \
pte_clear(&init_mm, vaddr, ptep); \
__flush_tlb_one(vaddr); \
} while (0)
/*
* The i386 doesn't have any external MMU info: the kernel page
* tables contain all the necessary information.