From 1a4dd6d9ac9632ab58de57d0b02ff34c74871b5b Mon Sep 17 00:00:00 2001 From: Laxminath Kasam Date: Tue, 2 Apr 2019 15:21:54 +0530 Subject: [PATCH] asoc: Fix aux path noise issue Observing noise on aux path playback. Update sequences on digital side and swr port params as per latest HW sequence recommendation. Change-Id: Ic07ec35b091985ef0146957ceca830bd1162e7ec Signed-off-by: Laxminath Kasam --- asoc/codecs/bolero/rx-macro.c | 9 +++++++-- asoc/sm8250-port-config.h | 2 +- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/asoc/codecs/bolero/rx-macro.c b/asoc/codecs/bolero/rx-macro.c index 0fc13eec41bf..290d9e07eee6 100644 --- a/asoc/codecs/bolero/rx-macro.c +++ b/asoc/codecs/bolero/rx-macro.c @@ -1621,6 +1621,9 @@ static int rx_macro_config_classh(struct snd_soc_component *component, 0x40, 0x40); break; case INTERP_AUX: + snd_soc_component_update_bits(component, + BOLERO_CDC_RX_RX2_RX_PATH_CFG0, + 0x08, 0x08); snd_soc_component_update_bits(component, BOLERO_CDC_RX_RX2_RX_PATH_CFG0, 0x10, 0x10); @@ -2195,16 +2198,18 @@ static int rx_macro_enable_interp_clk(struct snd_soc_component *component, (interp_idx * RX_MACRO_RX_PATH_OFFSET); dsm_reg = BOLERO_CDC_RX_RX0_RX_PATH_DSM_CTL + (interp_idx * RX_MACRO_RX_PATH_OFFSET); + if (interp_idx == INTERP_AUX) + dsm_reg = BOLERO_CDC_RX_RX2_RX_PATH_DSM_CTL; rx_cfg2_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG2 + (interp_idx * RX_MACRO_RX_PATH_OFFSET); if (SND_SOC_DAPM_EVENT_ON(event)) { if (rx_priv->main_clk_users[interp_idx] == 0) { - snd_soc_component_update_bits(component, dsm_reg, - 0x01, 0x01); /* Main path PGA mute enable */ snd_soc_component_update_bits(component, main_reg, 0x10, 0x10); + snd_soc_component_update_bits(component, dsm_reg, + 0x01, 0x01); /* Clk enable */ snd_soc_component_update_bits(component, main_reg, 0x20, 0x20); diff --git a/asoc/sm8250-port-config.h b/asoc/sm8250-port-config.h index 0a33c5fb6f58..503d514ba6fa 100644 --- a/asoc/sm8250-port-config.h +++ b/asoc/sm8250-port-config.h @@ -29,7 +29,7 @@ static struct port_params rx_frame_params_default[SWR_MSTR_PORT_LEN] = { {3, 0, 0, 0xFF, 0xFF, 1, 0xFF, 0xFF, 1}, {31, 0, 0, 3, 6, 7, 0, 0xFF, 0}, {31, 11, 11, 0xFF, 0xFF, 4, 1, 0xFF, 0}, - {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0}, + {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0}, {0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0}, };