qcacld-3.0: enable bus statistics for 3rd party

enable feature WLAN_FEATURE_DP_BUS_BANDWIDTH non MSM
platform.

Change-Id: I968a73e669ff3e6536ee76fa8229dc0a7d9ced2d
CRs-Fixed: 2729947
This commit is contained in:
Yu Tian 2020-07-12 17:16:41 +08:00 • committed by snandini
commit 23d1479dd4
2 changed files with 14 additions and 7 deletions

View file

@ -1089,9 +1089,8 @@ ifeq ($(CONFIG_WLAN_FW_OFFLOAD), y)
CONFIG_WLAN_FEATURE_ELNA := y
endif
ifeq (y,$(findstring y,$(CONFIG_ARCH_MSM) $(CONFIG_ARCH_QCOM)))
#Enable DP Bus Vote
CONFIG_WLAN_FEATURE_DP_BUS_BANDWIDTH := y
endif
ifeq ($(CONFIG_CNSS_QCA6750), y)
#Enable 6 GHz Band

View file

@ -9004,6 +9004,15 @@ static inline void hdd_pm_qos_update_cpu_mask(cpumask_t *mask,
}
}
#ifdef MSM_PLATFORM
#define COPY_CPU_MASK(a, b) cpumask_copy(a, b)
#define DUMP_CPU_AFFINE() hdd_info("Set cpu_mask %*pb for affine_cores", \
cpumask_pr_args(&hdd_ctx->pm_qos_req.cpus_affine))
#else
#define COPY_CPU_MASK(a, b) /* no-op*/
#define DUMP_CPU_AFFINE() /* no-op*/
#endif
/**
* hdd_pm_qos_update_request() - API to request for pm_qos
* @hdd_ctx: handle to hdd context
@ -9015,7 +9024,7 @@ static inline void hdd_pm_qos_update_cpu_mask(cpumask_t *mask,
static inline void hdd_pm_qos_update_request(struct hdd_context *hdd_ctx,
cpumask_t *pm_qos_cpu_mask)
{
cpumask_copy(&hdd_ctx->pm_qos_req.cpus_affine, pm_qos_cpu_mask);
COPY_CPU_MASK(&hdd_ctx->pm_qos_req.cpus_affine, pm_qos_cpu_mask);
/* Latency value to be read from INI */
if (cpumask_empty(pm_qos_cpu_mask) &&
@ -9029,7 +9038,7 @@ static inline void hdd_pm_qos_update_request(struct hdd_context *hdd_ctx,
static inline void hdd_pm_qos_update_request(struct hdd_context *hdd_ctx,
cpumask_t *pm_qos_cpu_mask)
{
cpumask_copy(&hdd_ctx->pm_qos_req.cpus_affine, pm_qos_cpu_mask);
COPY_CPU_MASK(&hdd_ctx->pm_qos_req.cpus_affine, pm_qos_cpu_mask);
/* Latency value to be read from INI */
if (cpumask_empty(pm_qos_cpu_mask))
@ -9040,7 +9049,7 @@ static inline void hdd_pm_qos_update_request(struct hdd_context *hdd_ctx,
}
#endif
#ifdef CONFIG_SMP
#if defined(CONFIG_SMP) && defined(MSM_PLATFORM)
/**
* hdd_update_pm_qos_affine_cores() - Update PM_qos request for AFFINE_CORES
* @hdd_ctx: handle to hdd context
@ -9063,8 +9072,7 @@ static inline void hdd_pm_qos_add_request(struct hdd_context *hdd_ctx)
hdd_update_pm_qos_affine_cores(hdd_ctx);
pm_qos_add_request(&hdd_ctx->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
PM_QOS_DEFAULT_VALUE);
hdd_info("Set cpu_mask %*pb for affine_cores",
cpumask_pr_args(&hdd_ctx->pm_qos_req.cpus_affine));
DUMP_CPU_AFFINE();
}
static inline void hdd_pm_qos_remove_request(struct hdd_context *hdd_ctx)