From 4f125084c0ed17f86c895abe021b0952bcfa1b04 Mon Sep 17 00:00:00 2001 From: Deepak Kumar Date: Sat, 29 Aug 2020 00:46:40 +0530 Subject: [PATCH] msm: kgsl: Drive FAL QACTIVE signal high before GMU boot Drive FAL QACTIVE signal high before GMU boot to make sure path to DDR accepts transactions from GMU/GPU and comes out of low power state if it was in a low power state. Change-Id: I238a39c5b9dbd10a8c9b2c6437aaf48df410802f Signed-off-by: Deepak Kumar --- drivers/gpu/msm/a6xx_reg.h | 1 + drivers/gpu/msm/adreno_a6xx_gmu.c | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/msm/a6xx_reg.h b/drivers/gpu/msm/a6xx_reg.h index 2ef9d93d3ea6..bb6bbcc1c861 100644 --- a/drivers/gpu/msm/a6xx_reg.h +++ b/drivers/gpu/msm/a6xx_reg.h @@ -1039,6 +1039,7 @@ /* FAL10 veto register */ #define A6XX_GPU_GMU_CX_GMU_CX_FAL_INTF 0x1F8F0 +#define A6XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF 0x1F8F1 #define A6XX_GMU_AO_INTERRUPT_EN 0x23B03 #define A6XX_GMU_AO_HOST_INTERRUPT_CLR 0x23B04 diff --git a/drivers/gpu/msm/adreno_a6xx_gmu.c b/drivers/gpu/msm/adreno_a6xx_gmu.c index c38263dd804f..a88859f54c2f 100644 --- a/drivers/gpu/msm/adreno_a6xx_gmu.c +++ b/drivers/gpu/msm/adreno_a6xx_gmu.c @@ -1300,8 +1300,11 @@ static void a6xx_gmu_register_config(struct adreno_device *adreno_dev) u32 gmu_log_info, chipid = 0; /* Vote veto for FAL10 feature if supported*/ - if (a6xx_core->veto_fal10) + if (a6xx_core->veto_fal10) { gmu_core_regwrite(device, A6XX_GPU_GMU_CX_GMU_CX_FAL_INTF, 0x1); + gmu_core_regwrite(device, + A6XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, 0x1); + } /* Turn on TCM retention */ gmu_core_regwrite(device, A6XX_GMU_GENERAL_7, 1);