mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 11:41:38 -04:00
Merge branch 'exynos/pwm-clocksource' into late/multiplatform
This series from Tomasz Figa restores support for the pwm clocksource in Exynos, which was broken during the conversion of the platform to the common clk framework. The clocksource is only used in one board in the mainline kernel (universal_c210), and this makes it work for DT based probing as well as restoring the non-DT based case. * exynos/pwm-clocksource: ARM: dts: exynops4210: really add universal_c210 dts ARM: dts: exynos4210: Add basic dts file for universal_c210 board ARM: dts: exynos4: Add node for PWM device ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos clocksource: samsung_pwm_timer: Work around rounding errors in clockevents core clocksource: samsung_pwm_timer: Correct programming of clock events clocksource: samsung_pwm_timer: Use proper clockevents max_delta clocksource: samsung_pwm_timer: Add support for non-DT platforms clocksource: samsung_pwm_timer: Drop unused samsung_pwm struct clocksource: samsung_pwm_timer: Keep all driver data in a structure clocksource: samsung_pwm_timer: Make PWM spinlock global clocksource: samsung_pwm_timer: Let platforms select the driver Documentation: Add device tree bindings for Samsung PWM timers clocksource: add samsung pwm timer driver Conflicts: arch/arm/boot/dts/Makefile arch/arm/mach-exynos/common.c drivers/clocksource/Kconfig drivers/clocksource/Makefile Signed-off-by: Arnd Bergmann <[email protected]>
This commit is contained in:
Arnd Bergmann
commit
241a987126
10 changed files with 946 additions and 17 deletions
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@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
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dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
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exynos4210-smdkv310.dtb \
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exynos4210-trats.dtb \
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exynos4210-universal_c210.dtb \
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exynos4412-odroidx.dtb \
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exynos4412-smdk4412.dtb \
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exynos4412-origen.dtb \
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@ -316,6 +316,14 @@
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status = "disabled";
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};
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pwm@139D0000 {
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compatible = "samsung,exynos4210-pwm";
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reg = <0x139D0000 0x1000>;
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interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
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#pwm-cells = <2>;
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status = "disabled";
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};
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amba {
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#address-cells = <1>;
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#size-cells = <1>;
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352
arch/arm/boot/dts/exynos4210-universal_c210.dts
Normal file
352
arch/arm/boot/dts/exynos4210-universal_c210.dts
Normal file
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@ -0,0 +1,352 @@
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/*
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* Samsung's Exynos4210 based Universal C210 board device tree source
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*
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* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Device tree source file for Samsung's Universal C210 board which is based on
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* Samsung's Exynos4210 rev0 SoC.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "exynos4210.dtsi"
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/ {
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model = "Samsung Universal C210 based on Exynos4210 rev0";
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compatible = "samsung,universal_c210", "samsung,exynos4210";
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memory {
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reg = <0x40000000 0x10000000
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0x50000000 0x10000000>;
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};
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chosen {
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bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
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};
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mct@10050000 {
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compatible = "none";
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};
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fixed-rate-clocks {
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xxti {
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compatible = "samsung,clock-xxti";
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clock-frequency = <0>;
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};
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xusbxti {
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compatible = "samsung,clock-xusbxti";
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clock-frequency = <24000000>;
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};
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};
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vemmc_reg: voltage-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VMEM_VDD_2_8V";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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gpio = <&gpe1 3 0>;
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enable-active-high;
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};
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sdhci_emmc: sdhci@12510000 {
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bus-width = <8>;
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non-removable;
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pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
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pinctrl-names = "default";
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vmmc-supply = <&vemmc_reg>;
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status = "okay";
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};
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serial@13800000 {
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status = "okay";
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};
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serial@13810000 {
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status = "okay";
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};
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serial@13820000 {
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status = "okay";
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};
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serial@13830000 {
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status = "okay";
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};
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gpio-keys {
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compatible = "gpio-keys";
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vol-up-key {
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gpios = <&gpx2 0 1>;
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linux,code = <115>;
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label = "volume up";
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debounce-interval = <1>;
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};
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vol-down-key {
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gpios = <&gpx2 1 1>;
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linux,code = <114>;
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label = "volume down";
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debounce-interval = <1>;
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};
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config-key {
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gpios = <&gpx2 2 1>;
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linux,code = <171>;
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label = "config";
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debounce-interval = <1>;
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gpio-key,wakeup;
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};
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camera-key {
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gpios = <&gpx2 3 1>;
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linux,code = <212>;
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label = "camera";
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debounce-interval = <1>;
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};
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power-key {
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gpios = <&gpx2 7 1>;
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linux,code = <116>;
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label = "power";
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debounce-interval = <1>;
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gpio-key,wakeup;
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};
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ok-key {
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gpios = <&gpx3 5 1>;
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linux,code = <352>;
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label = "ok";
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debounce-interval = <1>;
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};
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};
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tsp_reg: voltage-regulator {
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compatible = "regulator-fixed";
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regulator-name = "TSP_2_8V";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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gpio = <&gpe2 3 0>;
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enable-active-high;
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};
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i2c@13890000 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-slave-addr = <0x10>;
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samsung,i2c-max-bus-freq = <100000>;
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pinctrl-0 = <&i2c3_bus>;
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pinctrl-names = "default";
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status = "okay";
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tsp@4a {
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/* TBD: Atmel maXtouch touchscreen */
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reg = <0x4a>;
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};
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};
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i2c@138B0000 {
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samsung,i2c-sda-delay = <100>;
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samsung,i2c-slave-addr = <0x10>;
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samsung,i2c-max-bus-freq = <100000>;
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pinctrl-0 = <&i2c5_bus>;
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pinctrl-names = "default";
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status = "okay";
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vdd_arm_reg: pmic@60 {
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compatible = "maxim,max8952";
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reg = <0x60>;
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max8952,vid-gpios = <&gpx0 3 0>, <&gpx0 4 0>;
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max8952,default-mode = <0>;
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max8952,dvs-mode-microvolt = <1250000>, <1200000>,
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<1050000>, <950000>;
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max8952,sync-freq = <0>;
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max8952,ramp-speed = <0>;
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <770000>;
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regulator-max-microvolt = <1400000>;
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regulator-always-on;
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regulator-boot-on;
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};
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pmic@66 {
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compatible = "national,lp3974";
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reg = <0x66>;
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max8998,pmic-buck1-default-dvs-idx = <0>;
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max8998,pmic-buck1-dvs-gpios = <&gpx0 5 0>,
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<&gpx0 6 0>;
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max8998,pmic-buck1-dvs-voltage = <1100000>, <1000000>,
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<1100000>, <1000000>;
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max8998,pmic-buck2-default-dvs-idx = <0>;
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max8998,pmic-buck2-dvs-gpio = <&gpe2 0 0>;
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max8998,pmic-buck2-dvs-voltage = <1200000>, <1100000>;
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regulators {
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ldo2_reg: LDO2 {
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regulator-name = "VALIVE_1.2V";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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ldo3_reg: LDO3 {
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regulator-name = "VUSB+MIPI_1.1V";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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};
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ldo4_reg: LDO4 {
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regulator-name = "VADC_3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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ldo5_reg: LDO5 {
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regulator-name = "VTF_2.8V";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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ldo6_reg: LDO6 {
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regulator-name = "LDO6";
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regulator-min-microvolt = <2000000>;
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regulator-max-microvolt = <2000000>;
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};
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ldo7_reg: LDO7 {
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regulator-name = "VLCD+VMIPI_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo8_reg: LDO8 {
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regulator-name = "VUSB+VDAC_3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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ldo9_reg: LDO9 {
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regulator-name = "VCC_2.8V";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-always-on;
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};
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ldo10_reg: LDO10 {
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regulator-name = "VPLL_1.1V";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo11_reg: LDO11 {
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regulator-name = "CAM_AF_3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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ldo12_reg: LDO12 {
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regulator-name = "PS_2.8V";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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ldo13_reg: LDO13 {
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regulator-name = "VHIC_1.2V";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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ldo14_reg: LDO14 {
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regulator-name = "CAM_I_HOST_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo15_reg: LDO15 {
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regulator-name = "CAM_S_DIG+FM33_CORE_1.2V";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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ldo16_reg: LDO16 {
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regulator-name = "CAM_S_ANA_2.8V";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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ldo17_reg: LDO17 {
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regulator-name = "VCC_3.0V_LCD";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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};
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buck1_reg: BUCK1 {
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regulator-name = "VINT_1.1V";
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck2_reg: BUCK2 {
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regulator-name = "VG3D_1.1V";
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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};
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buck3_reg: BUCK3 {
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regulator-name = "VCC_1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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buck4_reg: BUCK4 {
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regulator-name = "VMEM_1.2V";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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ap32khz_reg: EN32KHz-AP {
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regulator-name = "32KHz AP";
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regulator-always-on;
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};
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cp32khz_reg: EN32KHz-CP {
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regulator-name = "32KHz CP";
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};
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vichg_reg: ENVICHG {
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regulator-name = "VICHG";
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};
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safeout1_reg: ESAFEOUT1 {
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regulator-name = "SAFEOUT1";
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regulator-always-on;
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};
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safeout2_reg: ESAFEOUT2 {
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regulator-name = "SAFEOUT2";
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regulator-boot-on;
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};
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};
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};
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};
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pwm@139D0000 {
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compatible = "samsung,s5p6440-pwm";
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status = "okay";
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};
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};
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@ -449,13 +449,6 @@ void __init exynos4_init_irq(void)
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if (!of_have_populated_dt())
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combiner_init(S5P_VA_COMBINER_BASE, NULL,
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max_combiner_nr(), COMBINER_IRQ(0, 0));
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/*
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* The parameters of s5p_init_irq() are for VIC init.
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* Theses parameters should be NULL and 0 because EXYNOS4
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* uses GIC instead of VIC.
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*/
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s5p_init_irq(NULL, 0);
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}
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void __init exynos5_init_irq(void)
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@ -463,14 +456,6 @@ void __init exynos5_init_irq(void)
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#ifdef CONFIG_OF
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irqchip_init();
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#endif
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/*
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* The parameters of s5p_init_irq() are for VIC init.
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* Theses parameters should be NULL and 0 because EXYNOS4
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* uses GIC instead of VIC.
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*/
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if (!of_machine_is_compatible("samsung,exynos5440"))
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s5p_init_irq(NULL, 0);
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gic_arch_extn.irq_set_wake = s3c_irq_wake;
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}
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|
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@ -105,9 +105,9 @@ config SAMSUNG_IRQ_VIC_TIMER
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Internal configuration to build the VIC timer interrupt code.
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config S5P_IRQ
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def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
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def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
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help
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Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs
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Support common interrupt part for ARCH_S5P SoCs
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config S5P_EXT_INT
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bool
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|
|
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