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Merge "cnss2: Add debug dump for Wlan FW PBL and SBL for HST"

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qctecmdr 2020-10-20 09:24:13 -07:00 • committed by Gerrit - the friendly Code Review server
commit 248ae1ef4f
2 changed files with 83 additions and 1 deletions
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73
drivers/net/wireless/cnss2/pci.c
View file

@ -1039,6 +1039,73 @@ void cnss_pci_unlock_reg_window(struct device *dev, unsigned long *flags)
}
EXPORT_SYMBOL(cnss_pci_unlock_reg_window);
/**
* cnss_pci_dump_qca6390_sram_mem - Dump WLAN FW bootloader debug log
* @pci_priv: PCI device private data structure of cnss platform driver
*
* Dump Primary and secondary bootloader debug log data. For SBL check the
* log struct address and size for validity.
*
* Supported only on QCA6390
*
* Return: None
*/
static void cnss_pci_dump_qca6390_sram_mem(struct cnss_pci_data *pci_priv)
{
int i;
u32 mem_addr, val, pbl_stage, sbl_log_start, sbl_log_size;
u32 pbl_wlan_boot_cfg, pbl_bootstrap_status;
struct cnss_plat_data *plat_priv = pci_priv->plat_priv;
if (plat_priv->device_id != QCA6390_DEVICE_ID)
return;
if (cnss_pci_check_link_status(pci_priv))
return;
cnss_pci_reg_read(pci_priv, QCA6390_TCSR_PBL_LOGGING_REG, &pbl_stage);
cnss_pci_reg_read(pci_priv, QCA6390_PCIE_BHI_ERRDBG2_REG,
&sbl_log_start);
cnss_pci_reg_read(pci_priv, QCA6390_PCIE_BHI_ERRDBG3_REG,
&sbl_log_size);
cnss_pci_reg_read(pci_priv, QCA6390_PBL_WLAN_BOOT_CFG,
&pbl_wlan_boot_cfg);
cnss_pci_reg_read(pci_priv, QCA6390_PBL_BOOTSTRAP_STATUS,
&pbl_bootstrap_status);
cnss_pr_dbg("TCSR_PBL_LOGGING: 0x%08x PCIE_BHI_ERRDBG: Start: 0x%08x Size:0x%08x\n",
pbl_stage, sbl_log_start, sbl_log_size);
cnss_pr_dbg("PBL_WLAN_BOOT_CFG: 0x%08x PBL_BOOTSTRAP_STATUS: 0x%08x\n",
pbl_wlan_boot_cfg, pbl_bootstrap_status);
cnss_pr_dbg("Dumping PBL log data\n");
/* cnss_pci_reg_read provides 32bit register values */
for (i = 0; i < QCA6390_DEBUG_PBL_LOG_SRAM_MAX_SIZE; i += sizeof(val)) {
mem_addr = QCA6390_DEBUG_PBL_LOG_SRAM_START + i;
if (cnss_pci_reg_read(pci_priv, mem_addr, &val))
break;
cnss_pr_dbg("SRAM[0x%x] = 0x%x\n", mem_addr, val);
}
sbl_log_size = (sbl_log_size > QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE ?
QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE : sbl_log_size);
if (sbl_log_start < QCA6390_V2_SBL_DATA_START ||
sbl_log_start > QCA6390_V2_SBL_DATA_END ||
(sbl_log_start + sbl_log_size) > QCA6390_V2_SBL_DATA_END)
goto out;
cnss_pr_dbg("Dumping SBL log data\n");
for (i = 0; i < sbl_log_size; i += sizeof(val)) {
mem_addr = sbl_log_start + i;
if (cnss_pci_reg_read(pci_priv, mem_addr, &val))
break;
cnss_pr_dbg("SRAM[0x%x] = 0x%x\n", mem_addr, val);
}
return;
out:
cnss_pr_err("Invalid SBL log data\n");
}
/**
* cnss_pci_dump_bl_sram_mem - Dump WLAN FW bootloader debug log
* @pci_priv: PCI device private data structure of cnss platform driver
@ -1057,8 +1124,12 @@ static void cnss_pci_dump_bl_sram_mem(struct cnss_pci_data *pci_priv)
u32 pbl_wlan_boot_cfg, pbl_bootstrap_status;
struct cnss_plat_data *plat_priv = pci_priv->plat_priv;
if (plat_priv->device_id != QCA6490_DEVICE_ID)
if (plat_priv->device_id == QCA6390_DEVICE_ID) {
cnss_pci_dump_qca6390_sram_mem(pci_priv);
return;
} else if (plat_priv->device_id != QCA6490_DEVICE_ID) {
return;
}
if (cnss_pci_check_link_status(pci_priv))
return;

11
drivers/net/wireless/cnss2/reg.h
View file

@ -279,4 +279,15 @@
#define QCA6490_PCIE_BHI_ERRDBG3_REG 0x01E0E23C
#define QCA6490_PBL_WLAN_BOOT_CFG 0x01E22B34
#define QCA6490_PBL_BOOTSTRAP_STATUS 0x01910008
#define QCA6390_DEBUG_PBL_LOG_SRAM_START 0x01403D58
#define QCA6390_DEBUG_PBL_LOG_SRAM_MAX_SIZE 80
#define QCA6390_V2_SBL_DATA_START 0x016c8580
#define QCA6390_V2_SBL_DATA_END (0x016c8580 + 0x00011000)
#define QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE 44
#define QCA6390_TCSR_PBL_LOGGING_REG 0x01B000F8
#define QCA6390_PCIE_BHI_ERRDBG2_REG 0x01E0E238
#define QCA6390_PCIE_BHI_ERRDBG3_REG 0x01E0E23C
#define QCA6390_PBL_WLAN_BOOT_CFG 0x01E22B34
#define QCA6390_PBL_BOOTSTRAP_STATUS 0x01910008
#endif