A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-29 03:01:39 -04:00
Code Issues Projects Releases Packages Wiki Activity

Fix common misspellings

Browse source 
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi <[email protected]>
This commit is contained in:
Lucas De Marchi 2011-03-30 22:57:33 -03:00
commit 25985edced
2463 changed files with 4252 additions and 4252 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/parisc/include/asm/eisa_eeprom.h
View file

@ -27,7 +27,7 @@ struct eeprom_header
u_int8_t ver_maj;
u_int8_t ver_min;
u_int8_t num_slots; /* number of EISA slots in system */
u_int16_t csum; /* checksum, I don't know how to calulate this */
u_int16_t csum; /* checksum, I don't know how to calculate this */
u_int8_t pad[10];
} __attribute__ ((packed));

10
arch/parisc/kernel/entry.S
View file

@ -187,8 +187,8 @@
/* Register definitions for tlb miss handler macros */
va = r8 /* virtual address for which the trap occured */
spc = r24 /* space for which the trap occured */
va = r8 /* virtual address for which the trap occurred */
spc = r24 /* space for which the trap occurred */
#ifndef CONFIG_64BIT
@ -882,7 +882,7 @@ ENTRY(syscall_exit_rfi)
* (we don't store them in the sigcontext), so set them
* to "proper" values now (otherwise we'll wind up restoring
* whatever was last stored in the task structure, which might
* be inconsistent if an interrupt occured while on the gateway
* be inconsistent if an interrupt occurred while on the gateway
* page). Note that we may be "trashing" values the user put in
* them, but we don't support the user changing them.
*/
@ -1156,11 +1156,11 @@ ENDPROC(intr_save)
*/
t0 = r1 /* temporary register 0 */
va = r8 /* virtual address for which the trap occured */
va = r8 /* virtual address for which the trap occurred */
t1 = r9 /* temporary register 1 */
pte = r16 /* pte/phys page # */
prot = r17 /* prot bits */
spc = r24 /* space for which the trap occured */
spc = r24 /* space for which the trap occurred */
ptp = r25 /* page directory/page table pointer */
#ifdef CONFIG_64BIT

2
arch/parisc/kernel/head.S
View file

@ -131,7 +131,7 @@ $pgt_fill_loop:
ldo THREAD_SZ_ALGN(%r6),%sp
#ifdef CONFIG_SMP
/* Set the smp rendevous address into page zero.
/* Set the smp rendezvous address into page zero.
** It would be safer to do this in init_smp_config() but
** it's just way easier to deal with here because
** of 64-bit function ptrs and the address is local to this file.

2
arch/parisc/kernel/inventory.c
View file

@ -93,7 +93,7 @@ void __init setup_pdc(void)
case 0x6: /* 705, 710 */
case 0x7: /* 715, 725 */
case 0x8: /* 745, 747, 742 */
case 0xA: /* 712 and similiar */
case 0xA: /* 712 and similar */
case 0xC: /* 715/64, at least */
pdc_type = PDC_TYPE_SNAKE;

2
arch/parisc/kernel/signal.c
View file

@ -291,7 +291,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
DBG(1,"setup_rt_frame: frame->uc = 0x%p\n", &frame->uc);
DBG(1,"setup_rt_frame: frame->uc.uc_mcontext = 0x%p\n", &frame->uc.uc_mcontext);
err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, in_syscall);
/* FIXME: Should probably be converted aswell for the compat case */
/* FIXME: Should probably be converted as well for the compat case */
err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
}

2
arch/parisc/kernel/syscall.S
View file

@ -605,7 +605,7 @@ cas_action:
copy %r0, %r21
3:
/* Error occured on load or store */
/* Error occurred on load or store */
/* Free lock */
stw %r20, 0(%sr2,%r20)
#if ENABLE_LWS_DEBUG

2
arch/parisc/kernel/syscall_table.S
View file

@ -34,7 +34,7 @@
/* Use ENTRY_SAME for 32-bit syscalls which are the same on wide and
* narrow palinux. Use ENTRY_DIFF for those where a 32-bit specific
* implementation is required on wide palinux. Use ENTRY_COMP where
* the compatability layer has a useful 32-bit implementation.
* the compatibility layer has a useful 32-bit implementation.
*/
#define ENTRY_SAME(_name_) .dword sys_##_name_
#define ENTRY_DIFF(_name_) .dword sys32_##_name_

2
arch/parisc/math-emu/dfadd.c
View file

@ -303,7 +303,7 @@ dbl_fadd(
if(Dbl_iszero_hidden(resultp1))
{
/* Handle normalization */
/* A straight foward algorithm would now shift the result
/* A straight forward algorithm would now shift the result
* and extension left until the hidden bit becomes one. Not
* all of the extension bits need participate in the shift.
* Only the two most significant bits (round and guard) are

2
arch/parisc/math-emu/dfsub.c
View file

@ -306,7 +306,7 @@ dbl_fsub(
if(Dbl_iszero_hidden(resultp1))
{
/* Handle normalization */
/* A straight foward algorithm would now shift the result
/* A straight forward algorithm would now shift the result
* and extension left until the hidden bit becomes one. Not
* all of the extension bits need participate in the shift.
* Only the two most significant bits (round and guard) are

8
arch/parisc/math-emu/fmpyfadd.c
View file

@ -531,7 +531,7 @@ dbl_fmpyfadd(
sign_save = Dbl_signextendedsign(resultp1);
if (Dbl_iszero_hidden(resultp1)) {
/* Handle normalization */
/* A straight foward algorithm would now shift the
/* A straightforward algorithm would now shift the
* result and extension left until the hidden bit
* becomes one. Not all of the extension bits need
* participate in the shift. Only the two most
@ -1191,7 +1191,7 @@ unsigned int *status;
sign_save = Dbl_signextendedsign(resultp1);
if (Dbl_iszero_hidden(resultp1)) {
/* Handle normalization */
/* A straight foward algorithm would now shift the
/* A straightforward algorithm would now shift the
* result and extension left until the hidden bit
* becomes one. Not all of the extension bits need
* participate in the shift. Only the two most
@ -1841,7 +1841,7 @@ unsigned int *status;
sign_save = Sgl_signextendedsign(resultp1);
if (Sgl_iszero_hidden(resultp1)) {
/* Handle normalization */
/* A straight foward algorithm would now shift the
/* A straightforward algorithm would now shift the
* result and extension left until the hidden bit
* becomes one. Not all of the extension bits need
* participate in the shift. Only the two most
@ -2483,7 +2483,7 @@ unsigned int *status;
sign_save = Sgl_signextendedsign(resultp1);
if (Sgl_iszero_hidden(resultp1)) {
/* Handle normalization */
/* A straight foward algorithm would now shift the
/* A straightforward algorithm would now shift the
* result and extension left until the hidden bit
* becomes one. Not all of the extension bits need
* participate in the shift. Only the two most

2
arch/parisc/math-emu/sfadd.c
View file

@ -298,7 +298,7 @@ sgl_fadd(
if(Sgl_iszero_hidden(result))
{
/* Handle normalization */
/* A straight foward algorithm would now shift the result
/* A straightforward algorithm would now shift the result
* and extension left until the hidden bit becomes one. Not
* all of the extension bits need participate in the shift.
* Only the two most significant bits (round and guard) are

2
arch/parisc/math-emu/sfsub.c
View file

@ -301,7 +301,7 @@ sgl_fsub(
if(Sgl_iszero_hidden(result))
{
/* Handle normalization */
/* A straight foward algorithm would now shift the result
/* A straightforward algorithm would now shift the result
* and extension left until the hidden bit becomes one. Not
* all of the extension bits need participate in the shift.
* Only the two most significant bits (round and guard) are