A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-28 18:51:56 -04:00
Code Issues Projects Releases Packages Wiki Activity

Fix common misspellings

Browse source 
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi <[email protected]>
This commit is contained in:
Lucas De Marchi 2011-03-30 22:57:33 -03:00
commit 25985edced
2463 changed files with 4252 additions and 4252 deletions
Download patch file Download diff file Expand all files Collapse all files

16
drivers/spi/amba-pl022.c
View file

@ -661,7 +661,7 @@ static void readwriter(struct pl022 *pl022)
{
/*
* The FIFO depth is different inbetween primecell variants.
* The FIFO depth is different between primecell variants.
* I believe filling in too much in the FIFO might cause
* errons in 8bit wide transfers on ARM variants (just 8 words
* FIFO, means only 8x8 = 64 bits in FIFO) at least.
@ -722,7 +722,7 @@ static void readwriter(struct pl022 *pl022)
* This inner reader takes care of things appearing in the RX
* FIFO as we're transmitting. This will happen a lot since the
* clock starts running when you put things into the TX FIFO,
* and then things are continously clocked into the RX FIFO.
* and then things are continuously clocked into the RX FIFO.
*/
while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE)
&& (pl022->rx < pl022->rx_end)) {
@ -842,7 +842,7 @@ static void dma_callback(void *data)
unmap_free_dma_scatter(pl022);
/* Update total bytes transfered */
/* Update total bytes transferred */
msg->actual_length += pl022->cur_transfer->len;
if (pl022->cur_transfer->cs_change)
pl022->cur_chip->
@ -1224,7 +1224,7 @@ static irqreturn_t pl022_interrupt_handler(int irq, void *dev_id)
"number of bytes on a 16bit bus?)\n",
(u32) (pl022->rx - pl022->rx_end));
}
/* Update total bytes transfered */
/* Update total bytes transferred */
msg->actual_length += pl022->cur_transfer->len;
if (pl022->cur_transfer->cs_change)
pl022->cur_chip->
@ -1415,11 +1415,11 @@ static void do_polling_transfer(struct pl022 *pl022)
SSP_CR1(pl022->virtbase));
dev_dbg(&pl022->adev->dev, "polling transfer ongoing ...\n");
/* FIXME: insert a timeout so we don't hang here indefinately */
/* FIXME: insert a timeout so we don't hang here indefinitely */
while (pl022->tx < pl022->tx_end || pl022->rx < pl022->rx_end)
readwriter(pl022);
/* Update total byte transfered */
/* Update total byte transferred */
message->actual_length += pl022->cur_transfer->len;
if (pl022->cur_transfer->cs_change)
pl022->cur_chip->cs_control(SSP_CHIP_DESELECT);
@ -2129,7 +2129,7 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id)
"probe - problem registering spi master\n");
goto err_spi_register;
}
dev_dbg(dev, "probe succeded\n");
dev_dbg(dev, "probe succeeded\n");
/*
* Disable the silicon block pclk and any voltage domain and just
* power it up and clock it when it's needed
@ -2184,7 +2184,7 @@ pl022_remove(struct amba_device *adev)
spi_unregister_master(pl022->master);
spi_master_put(pl022->master);
amba_set_drvdata(adev, NULL);
dev_dbg(&adev->dev, "remove succeded\n");
dev_dbg(&adev->dev, "remove succeeded\n");
return 0;
}

2
drivers/spi/au1550_spi.c
View file

@ -480,7 +480,7 @@ static irqreturn_t au1550_spi_dma_irq_callback(struct au1550_spi *hw)
au1xxx_dbdma_stop(hw->dma_rx_ch);
au1xxx_dbdma_stop(hw->dma_tx_ch);
/* get number of transfered bytes */
/* get number of transferred bytes */
hw->rx_count = hw->len - au1xxx_get_dma_residue(hw->dma_rx_ch);
hw->tx_count = hw->len - au1xxx_get_dma_residue(hw->dma_tx_ch);

2
drivers/spi/dw_spi.c
View file

@ -345,7 +345,7 @@ static void int_error_stop(struct dw_spi *dws, const char *msg)
void dw_spi_xfer_done(struct dw_spi *dws)
{
/* Update total byte transfered return count actual bytes read */
/* Update total byte transferred return count actual bytes read */
dws->cur_msg->actual_length += dws->len;
/* Move to next transfer */

2
drivers/spi/dw_spi.h
View file

@ -46,7 +46,7 @@
#define SPI_INT_RXFI (1 << 4)
#define SPI_INT_MSTI (1 << 5)
/* TX RX interrupt level threshhold, max can be 256 */
/* TX RX interrupt level threshold, max can be 256 */
#define SPI_INT_THRESHOLD 32
enum dw_ssi_type {

2
drivers/spi/ep93xx_spi.c
View file

@ -512,7 +512,7 @@ static int ep93xx_spi_read_write(struct ep93xx_spi *espi)
*
* This function processes one SPI transfer given in @t. Function waits until
* transfer is complete (may sleep) and updates @msg->status based on whether
* transfer was succesfully processed or not.
* transfer was successfully processed or not.
*/
static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
struct spi_message *msg,

4
drivers/spi/pxa2xx_spi.c
View file

@ -700,7 +700,7 @@ static void int_transfer_complete(struct driver_data *drv_data)
if (!pxa25x_ssp_comp(drv_data))
write_SSTO(0, reg);
/* Update total byte transfered return count actual bytes read */
/* Update total byte transferred return count actual bytes read */
drv_data->cur_msg->actual_length += drv_data->len -
(drv_data->rx_end - drv_data->rx);
@ -759,7 +759,7 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data)
/*
* PXA25x_SSP has no timeout, set up rx threshould for the
* remaing RX bytes.
* remaining RX bytes.
*/
if (pxa25x_ssp_comp(drv_data)) {

2
drivers/spi/spi.c
View file

@ -957,7 +957,7 @@ EXPORT_SYMBOL_GPL(spi_sync);
* drivers may DMA directly into and out of the message buffers.
*
* This call should be used by drivers that require exclusive access to the
* SPI bus. It has to be preceeded by a spi_bus_lock call. The SPI bus must
* SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
* be released by a spi_bus_unlock call when the exclusive access is over.
*
* It returns zero on success, else a negative error code.

2
drivers/spi/spi_bfin5xx.c
View file

@ -905,7 +905,7 @@ static void bfin_spi_pump_transfers(unsigned long data)
"IO write error!\n");
message->state = ERROR_STATE;
} else {
/* Update total byte transfered */
/* Update total byte transferred */
message->actual_length += drv_data->len_in_bytes;
/* Move to next transfer of this msg */
message->state = bfin_spi_next_transfer(drv_data);

2
drivers/spi/spi_fsl_espi.c
View file

@ -474,7 +474,7 @@ static int fsl_espi_setup(struct spi_device *spi)
mpc8xxx_spi = spi_master_get_devdata(spi->master);
reg_base = mpc8xxx_spi->reg_base;
hw_mode = cs->hw_mode; /* Save orginal settings */
hw_mode = cs->hw_mode; /* Save original settings */
cs->hw_mode = mpc8xxx_spi_read_reg(
&reg_base->csmode[spi->chip_select]);
/* mask out bits we are going to set */