mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 10:41:38 -04:00
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <[email protected]>
This commit is contained in:
Lucas De Marchi
parent
6aba74f279
commit
25985edced
2463 changed files with 4252 additions and 4252 deletions
|
|
@ -637,7 +637,7 @@ static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitf
|
|||
* magnitude which needs to be scaled in this function for the hardware.
|
||||
* Things to take into consideration are how many color registers, if
|
||||
* any, are supported with the current color visual. With truecolor mode
|
||||
* no color palettes are supported. Here a psuedo palette is created
|
||||
* no color palettes are supported. Here a pseudo palette is created
|
||||
* which we store the value in pseudo_palette in struct fb_info. For
|
||||
* pseudocolor mode we have a limited color palette. To deal with this
|
||||
* we can program what color is displayed for a particular pixel value.
|
||||
|
|
|
|||
|
|
@ -3124,12 +3124,12 @@ static int __devinit atyfb_setup_sparc(struct pci_dev *pdev,
|
|||
M = pll_regs[2];
|
||||
|
||||
/*
|
||||
* PLL Feedback Divider N (Dependant on CLOCK_CNTL):
|
||||
* PLL Feedback Divider N (Dependent on CLOCK_CNTL):
|
||||
*/
|
||||
N = pll_regs[7 + (clock_cntl & 3)];
|
||||
|
||||
/*
|
||||
* PLL Post Divider P (Dependant on CLOCK_CNTL):
|
||||
* PLL Post Divider P (Dependent on CLOCK_CNTL):
|
||||
*/
|
||||
P = 1 << (pll_regs[6] >> ((clock_cntl & 3) << 1));
|
||||
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@
|
|||
* to a larger number and saturate CUR_HORZ_POSN to zero.
|
||||
*
|
||||
* if Y becomes negative, CUR_VERT_OFFSET must be adjusted to a larger number,
|
||||
* CUR_OFFSET must be adjusted to a point to the appropraite line in the cursor
|
||||
* CUR_OFFSET must be adjusted to a point to the appropriate line in the cursor
|
||||
* definitation and CUR_VERT_POSN must be saturated to zero.
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -1572,7 +1572,7 @@ static int au1200fb_init_fbinfo(struct au1200fb_device *fbdev)
|
|||
/* Copy monitor specs from panel data */
|
||||
/* fixme: we're setting up LCD controller windows, so these dont give a
|
||||
damn as to what the monitor specs are (the panel itself does, but that
|
||||
isnt done here...so maybe need a generic catchall monitor setting??? */
|
||||
isn't done here...so maybe need a generic catchall monitor setting??? */
|
||||
memcpy(&fbi->monspecs, &panel->monspecs, sizeof(struct fb_monspecs));
|
||||
|
||||
/* We first try the user mode passed in argument. If that failed,
|
||||
|
|
|
|||
|
|
@ -109,7 +109,7 @@ static unsigned long corgibl_flags;
|
|||
#define CORGIBL_BATTLOW 0x02
|
||||
|
||||
/*
|
||||
* This is only a psuedo I2C interface. We can't use the standard kernel
|
||||
* This is only a pseudo I2C interface. We can't use the standard kernel
|
||||
* routines as the interface is write only. We just assume the data is acked...
|
||||
*/
|
||||
static void lcdtg_ssp_i2c_send(struct corgi_lcd *lcd, uint8_t data)
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
* GPL v2
|
||||
*
|
||||
* This driver assumes single CPU. That's okay, because collie is
|
||||
* slightly old hardware, and noone is going to retrofit second CPU to
|
||||
* slightly old hardware, and no one is going to retrofit second CPU to
|
||||
* old PDA.
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -87,12 +87,12 @@ static const u8 init_NTSC_TESTPATTERN[] = {
|
|||
|
||||
static const u8 init_NTSC[] = {
|
||||
0x00, 0x1E, /* Power up all DACs and PLL */
|
||||
0xC3, 0x26, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC5, 0x12, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC2, 0x4A, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC6, 0x5E, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xBD, 0x19, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xBF, 0x42, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC3, 0x26, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0xC5, 0x12, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0xC2, 0x4A, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0xC6, 0x5E, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0xBD, 0x19, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0xBF, 0x42, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0x8C, 0x1F, /* NTSC Subcarrier Frequency */
|
||||
0x8D, 0x7C, /* NTSC Subcarrier Frequency */
|
||||
0x8E, 0xF0, /* NTSC Subcarrier Frequency */
|
||||
|
|
@ -109,12 +109,12 @@ static const u8 init_NTSC[] = {
|
|||
|
||||
static const u8 init_PAL[] = {
|
||||
0x00, 0x1E, /* Power up all DACs and PLL */
|
||||
0xC3, 0x26, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC5, 0x12, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC2, 0x4A, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC6, 0x5E, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xBD, 0x19, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xBF, 0x42, /* Program RGB->YCrCb Color Space convertion matrix */
|
||||
0xC3, 0x26, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0xC5, 0x12, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0xC2, 0x4A, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0xC6, 0x5E, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0xBD, 0x19, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0xBF, 0x42, /* Program RGB->YCrCb Color Space conversion matrix */
|
||||
0x8C, 0xCB, /* PAL Subcarrier Frequency */
|
||||
0x8D, 0x8A, /* PAL Subcarrier Frequency */
|
||||
0x8E, 0x09, /* PAL Subcarrier Frequency */
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
|
||||
/* Hand composed "Miniscule" 4x6 font, with binary data generated using
|
||||
/* Hand composed "Minuscule" 4x6 font, with binary data generated using
|
||||
* Perl stub.
|
||||
*
|
||||
* Use 'perl -x mini_4x6.c < mini_4x6.c > new_version.c' to regenerate
|
||||
|
|
|
|||
|
|
@ -763,7 +763,7 @@ static int fb_wait_for_vsync(struct fb_info *info)
|
|||
|
||||
/*
|
||||
* Set flag to 0 and wait for isr to set to 1. It would seem there is a
|
||||
* race condition here where the ISR could have occured just before or
|
||||
* race condition here where the ISR could have occurred just before or
|
||||
* just after this set. But since we are just coarsely waiting for
|
||||
* a frame to complete then that's OK. i.e. if the frame completed
|
||||
* just before this code executed then we have to wait another full
|
||||
|
|
|
|||
|
|
@ -182,7 +182,7 @@ void display_device_unregister(struct display_device *ddev)
|
|||
mutex_lock(&ddev->lock);
|
||||
device_unregister(ddev->dev);
|
||||
mutex_unlock(&ddev->lock);
|
||||
// Mark device index as avaliable
|
||||
// Mark device index as available
|
||||
mutex_lock(&allocated_dsp_lock);
|
||||
idr_remove(&allocated_dsp, ddev->idx);
|
||||
mutex_unlock(&allocated_dsp_lock);
|
||||
|
|
|
|||
|
|
@ -456,7 +456,7 @@ static int __init ep93xxfb_alloc_videomem(struct fb_info *info)
|
|||
* There is a bug in the ep93xx framebuffer which causes problems
|
||||
* if bit 27 of the physical address is set.
|
||||
* See: http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
|
||||
* There does not seem to be any offical errata for this, but I
|
||||
* There does not seem to be any official errata for this, but I
|
||||
* have confirmed the problem exists on my hardware (ep9315) at
|
||||
* least.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@
|
|||
* for driver private data (info->par). info->par (if any) will be
|
||||
* aligned to sizeof(long).
|
||||
*
|
||||
* Returns the new structure, or NULL if an error occured.
|
||||
* Returns the new structure, or NULL if an error occurred.
|
||||
*
|
||||
*/
|
||||
struct fb_info *framebuffer_alloc(size_t size, struct device *dev)
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@
|
|||
* buffer needs an amount of memory of 1.769.472 bytes which
|
||||
* is near to 2 MByte (the allocated address space of Zorro2).
|
||||
* The memory is channel interleaved. That means every channel
|
||||
* owns four VRAMs. Unfortunatly most FrameMasters II are
|
||||
* owns four VRAMs. Unfortunately most FrameMasters II are
|
||||
* not assembled with memory for the alpha channel. In this
|
||||
* case it could be possible to add the frame buffer into the
|
||||
* normal memory pool.
|
||||
|
|
|
|||
|
|
@ -882,7 +882,7 @@ static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
|
|||
* which needs to be scaled in this function for the hardware. Things to take
|
||||
* into consideration are how many color registers, if any, are supported with
|
||||
* the current color visual. With truecolor mode no color palettes are
|
||||
* supported. Here a psuedo palette is created which we store the value in
|
||||
* supported. Here a pseudo palette is created which we store the value in
|
||||
* pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
|
||||
* color palette.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -721,7 +721,7 @@ static int gbefb_set_par(struct fb_info *info)
|
|||
|
||||
Tiles have the advantage that they can be allocated individually in
|
||||
memory. However, this mapping is not linear at all, which is not
|
||||
really convienient. In order to support linear addressing, the GBE
|
||||
really convenient. In order to support linear addressing, the GBE
|
||||
DMA hardware is fooled into thinking the screen is only one tile
|
||||
large and but has a greater height, so that the DMA transfer covers
|
||||
the same region.
|
||||
|
|
|
|||
|
|
@ -117,7 +117,7 @@ enum gp_registers {
|
|||
};
|
||||
|
||||
#define GP_BLT_STATUS_CE (1 << 4) /* cmd buf empty */
|
||||
#define GP_BLT_STATUS_PB (1 << 0) /* primative busy */
|
||||
#define GP_BLT_STATUS_PB (1 << 0) /* primitive busy */
|
||||
|
||||
|
||||
/* Display Controller registers (table 6-47 from the data book) */
|
||||
|
|
|
|||
|
|
@ -112,7 +112,7 @@ static inline int wait_for_engine_idle(struct fb_info *info)
|
|||
* @par: pointer to i810fb_par structure
|
||||
*
|
||||
* DESCRIPTION:
|
||||
* Checks/waits for sufficent space in ringbuffer of size
|
||||
* Checks/waits for sufficient space in ringbuffer of size
|
||||
* space. Returns the tail of the buffer
|
||||
*/
|
||||
static inline u32 begin_iring(struct fb_info *info, u32 space)
|
||||
|
|
|
|||
|
|
@ -417,7 +417,7 @@ int SetOverlayViewPort(volatile STG4000REG __iomem *pSTGReg,
|
|||
/***************** Horizontal decimation/scaling ***************************/
|
||||
|
||||
/*
|
||||
* Now we handle the horizontal case, this is a simplified verison of
|
||||
* Now we handle the horizontal case, this is a simplified version of
|
||||
* the vertical case in that we decimate by factors of 2. as we are
|
||||
* working in words we should always be able to decimate by these
|
||||
* factors. as we always have to have a buffer which is aligned to a
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
|
||||
/*
|
||||
* Macros that access memory mapped card registers in PCI space
|
||||
* Add an appropraite section for your OS or processor architecture.
|
||||
* Add an appropriate section for your OS or processor architecture.
|
||||
*/
|
||||
#if defined(__KERNEL__)
|
||||
#include <asm/page.h>
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@ void DAC1064_global_restore(struct matrox_fb_info *minfo);
|
|||
#define M1064_XDVICLKCTRL_DVILOOPCTL 0x30
|
||||
/* CRTC2 pixel clock allowed to(0)/blocked from(1) driving CRTC2 */
|
||||
#define M1064_XDVICLKCTRL_C2DVICLKEN 0x40
|
||||
/* P1PLL loop filter bandwith selection */
|
||||
/* P1PLL loop filter bandwidth selection */
|
||||
#define M1064_XDVICLKCTRL_P1LOOPBWDTCTL 0x80
|
||||
#define M1064_XCURCOL0RED 0x08
|
||||
#define M1064_XCURCOL0GREEN 0x09
|
||||
|
|
|
|||
|
|
@ -387,7 +387,7 @@ static int Ti3026_init(struct matrox_fb_info *minfo, struct my_timming *m)
|
|||
hw->DACreg[POS3026_XMISCCTRL] = TVP3026_XMISCCTRL_DAC_PUP | TVP3026_XMISCCTRL_DAC_8BIT | TVP3026_XMISCCTRL_PSEL_DIS | TVP3026_XMISCCTRL_PSEL_LOW;
|
||||
break;
|
||||
case 16:
|
||||
/* XLATCHCTRL should be _4_1 / _2_1... Why is not? (_2_1 is used everytime) */
|
||||
/* XLATCHCTRL should be _4_1 / _2_1... Why is not? (_2_1 is used every time) */
|
||||
hw->DACreg[POS3026_XTRUECOLORCTRL] = (minfo->fbcon.var.green.length == 5) ? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565);
|
||||
hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_16BIT;
|
||||
hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV2;
|
||||
|
|
@ -399,7 +399,7 @@ static int Ti3026_init(struct matrox_fb_info *minfo, struct my_timming *m)
|
|||
hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV4;
|
||||
break;
|
||||
case 32:
|
||||
/* XLATCHCTRL should be _2_1 / _1_1... Why is not? (_2_1 is used everytime) */
|
||||
/* XLATCHCTRL should be _2_1 / _1_1... Why is not? (_2_1 is used every time) */
|
||||
hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_32BIT;
|
||||
break;
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -621,7 +621,7 @@ static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
|
|||
var->yoffset = var->yres_virtual - var->yres;
|
||||
|
||||
if (bpp == 16 && var->green.length == 5) {
|
||||
bpp--; /* an artifical value - 15 */
|
||||
bpp--; /* an artificial value - 15 */
|
||||
}
|
||||
|
||||
for (rgbt = table; rgbt->bpp < bpp; rgbt++);
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
#undef MATROXFB_DEBUG
|
||||
|
||||
/* heavy debugging: */
|
||||
/* -- logs putc[s], so everytime a char is displayed, it's logged */
|
||||
/* -- logs putc[s], so every time a char is displayed, it's logged */
|
||||
#undef MATROXFB_DEBUG_HEAVY
|
||||
|
||||
/* This one _could_ cause infinite loops */
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* Auther:
|
||||
* Author:
|
||||
* Wang Qiang(rurality.linux@gmail.com) 2009/12/16
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ config FB_OMAP_MANUAL_UPDATE
|
|||
depends on FB_OMAP && FB_OMAP_LCDC_EXTERNAL
|
||||
help
|
||||
Say Y here, if your user-space applications are capable of
|
||||
notifying the frame buffer driver when a change has occured in
|
||||
notifying the frame buffer driver when a change has occurred in
|
||||
the frame buffer content and thus a reload of the image data to
|
||||
the external frame buffer is required. If unsure, say N.
|
||||
|
||||
|
|
|
|||
|
|
@ -587,7 +587,7 @@ static void get_edid_timing_data(u8 *edid)
|
|||
struct hdmi_cm cm;
|
||||
struct omap_video_timings edid_timings;
|
||||
|
||||
/* seach block 0, there are 4 DTDs arranged in priority order */
|
||||
/* search block 0, there are 4 DTDs arranged in priority order */
|
||||
for (count = 0; count < EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR; count++) {
|
||||
current_descriptor_addrs =
|
||||
EDID_DESCRIPTOR_BLOCK0_ADDRESS +
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@
|
|||
|
||||
/*
|
||||
* WARNING: This controller is attached to System Bus 2 of the PXA which
|
||||
* needs its arbiter to be enabled explictly (CKENB & 1<<9).
|
||||
* needs its arbiter to be enabled explicitly (CKENB & 1<<9).
|
||||
* There is currently no way to do this from Linux, so you need to teach
|
||||
* your bootloader for now.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -153,7 +153,7 @@ struct savage_reg {
|
|||
unsigned char CRTC[25]; /* Crtc Controller */
|
||||
unsigned char Sequencer[5]; /* Video Sequencer */
|
||||
unsigned char Graphics[9]; /* Video Graphics */
|
||||
unsigned char Attribute[21]; /* Video Atribute */
|
||||
unsigned char Attribute[21]; /* Video Attribute */
|
||||
|
||||
unsigned int mode, refresh;
|
||||
unsigned char SR08, SR0E, SR0F;
|
||||
|
|
|
|||
|
|
@ -385,7 +385,7 @@ SavageSetup2DEngine(struct savagefb_par *par)
|
|||
BCI_SEND(GlobalBitmapDescriptor);
|
||||
|
||||
/*
|
||||
* I don't know why, sending this twice fixes the intial black screen,
|
||||
* I don't know why, sending this twice fixes the initial black screen,
|
||||
* prevents X from crashing at least in Toshiba laptops with SavageIX.
|
||||
* --Tony
|
||||
*/
|
||||
|
|
@ -2211,7 +2211,7 @@ static int __devinit savagefb_probe(struct pci_dev* dev,
|
|||
goto failed_mmio;
|
||||
|
||||
video_len = savage_init_hw(par);
|
||||
/* FIXME: cant be negative */
|
||||
/* FIXME: can't be negative */
|
||||
if (video_len < 0) {
|
||||
err = video_len;
|
||||
goto failed_mmio;
|
||||
|
|
|
|||
|
|
@ -265,7 +265,7 @@ static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
|
|||
return (unsigned long)numerator;
|
||||
}
|
||||
|
||||
/* sm501fb_hz_to_ps is identical to the oposite transform */
|
||||
/* sm501fb_hz_to_ps is identical to the opposite transform */
|
||||
|
||||
#define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
|
||||
|
||||
|
|
@ -1719,7 +1719,7 @@ static int sm501fb_init_fb(struct fb_info *fb,
|
|||
(head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
|
||||
sizeof(struct fb_ops));
|
||||
|
||||
/* update ops dependant on what we've been passed */
|
||||
/* update ops dependent on what we've been passed */
|
||||
|
||||
if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
|
||||
par->ops.fb_cursor = NULL;
|
||||
|
|
|
|||
|
|
@ -221,7 +221,7 @@ static int __sst_wait_idle(u8 __iomem *vbase)
|
|||
while(1) {
|
||||
if (__sst_read(vbase, STATUS) & STATUS_FBI_BUSY) {
|
||||
f_dddprintk("status: busy\n");
|
||||
/* FIXME basicaly, this is a busy wait. maybe not that good. oh well;
|
||||
/* FIXME basically, this is a busy wait. maybe not that good. oh well;
|
||||
* this is a small loop after all.
|
||||
* Or maybe we should use mdelay() or udelay() here instead ? */
|
||||
count = 0;
|
||||
|
|
@ -501,7 +501,7 @@ static int sstfb_set_par(struct fb_info *info)
|
|||
}
|
||||
|
||||
if (IS_VOODOO2(par)) {
|
||||
/* voodoo2 has 32 pixel wide tiles , BUT stange things
|
||||
/* voodoo2 has 32 pixel wide tiles , BUT strange things
|
||||
happen with odd number of tiles */
|
||||
par->tiles_in_X = (info->var.xres + 63 ) / 64 * 2;
|
||||
} else {
|
||||
|
|
@ -920,11 +920,11 @@ static int __devinit sst_detect_ti(struct fb_info *info)
|
|||
* we get the 1st byte (M value) of preset f1,f7 and fB
|
||||
* why those 3 ? mmmh... for now, i'll do it the glide way...
|
||||
* and ask questions later. anyway, it seems that all the freq registers are
|
||||
* realy at their default state (cf specs) so i ask again, why those 3 regs ?
|
||||
* really at their default state (cf specs) so i ask again, why those 3 regs ?
|
||||
* mmmmh.. it seems that's much more ugly than i thought. we use f0 and fA for
|
||||
* pll programming, so in fact, we *hope* that the f1, f7 & fB won't be
|
||||
* touched...
|
||||
* is it realy safe ? how can i reset this ramdac ? geee...
|
||||
* is it really safe ? how can i reset this ramdac ? geee...
|
||||
*/
|
||||
static int __devinit sst_detect_ics(struct fb_info *info)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -79,7 +79,7 @@ struct sti_glob_cfg_ext {
|
|||
u8 curr_mon; /* current monitor configured */
|
||||
u8 friendly_boot; /* in friendly boot mode */
|
||||
s16 power; /* power calculation (in Watts) */
|
||||
s32 freq_ref; /* frequency refrence */
|
||||
s32 freq_ref; /* frequency reference */
|
||||
u32 sti_mem_addr; /* pointer to global sti memory (size=sti_mem_request) */
|
||||
u32 future_ptr; /* pointer to future data */
|
||||
};
|
||||
|
|
|
|||
|
|
@ -877,12 +877,12 @@ static void tdfxfb_fillrect(struct fb_info *info,
|
|||
else
|
||||
tdfx_rop = TDFX_ROP_XOR;
|
||||
|
||||
/* asume always rect->height < 4096 */
|
||||
/* assume always rect->height < 4096 */
|
||||
if (dy + rect->height > 4095) {
|
||||
dstbase = stride * dy;
|
||||
dy = 0;
|
||||
}
|
||||
/* asume always rect->width < 4096 */
|
||||
/* assume always rect->width < 4096 */
|
||||
if (dx + rect->width > 4095) {
|
||||
dstbase += dx * bpp >> 3;
|
||||
dx = 0;
|
||||
|
|
@ -915,22 +915,22 @@ static void tdfxfb_copyarea(struct fb_info *info,
|
|||
u32 dstbase = 0;
|
||||
u32 srcbase = 0;
|
||||
|
||||
/* asume always area->height < 4096 */
|
||||
/* assume always area->height < 4096 */
|
||||
if (sy + area->height > 4095) {
|
||||
srcbase = stride * sy;
|
||||
sy = 0;
|
||||
}
|
||||
/* asume always area->width < 4096 */
|
||||
/* assume always area->width < 4096 */
|
||||
if (sx + area->width > 4095) {
|
||||
srcbase += sx * bpp >> 3;
|
||||
sx = 0;
|
||||
}
|
||||
/* asume always area->height < 4096 */
|
||||
/* assume always area->height < 4096 */
|
||||
if (dy + area->height > 4095) {
|
||||
dstbase = stride * dy;
|
||||
dy = 0;
|
||||
}
|
||||
/* asume always area->width < 4096 */
|
||||
/* assume always area->width < 4096 */
|
||||
if (dx + area->width > 4095) {
|
||||
dstbase += dx * bpp >> 3;
|
||||
dx = 0;
|
||||
|
|
@ -1003,12 +1003,12 @@ static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
|
|||
#else
|
||||
srcfmt = 0x400000;
|
||||
#endif
|
||||
/* asume always image->height < 4096 */
|
||||
/* assume always image->height < 4096 */
|
||||
if (dy + image->height > 4095) {
|
||||
dstbase = stride * dy;
|
||||
dy = 0;
|
||||
}
|
||||
/* asume always image->width < 4096 */
|
||||
/* assume always image->width < 4096 */
|
||||
if (dx + image->width > 4095) {
|
||||
dstbase += dx * bpp >> 3;
|
||||
dx = 0;
|
||||
|
|
@ -1124,7 +1124,7 @@ static int tdfxfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
|
|||
* lower half (least significant 64 bits) of a 128 bit word
|
||||
* and pattern 1 the upper half. If you examine the data of
|
||||
* the cursor image the graphics card uses then from the
|
||||
* begining you see line one of pattern 0, line one of
|
||||
* beginning you see line one of pattern 0, line one of
|
||||
* pattern 1, line two of pattern 0, line two of pattern 1,
|
||||
* etc etc. The linear stride for the cursor is always 16 bytes
|
||||
* (128 bits) which is the maximum cursor width times two for
|
||||
|
|
|
|||
|
|
@ -359,7 +359,7 @@ tmiofb_acc_wait(struct fb_info *info, unsigned int ccs)
|
|||
{
|
||||
struct tmiofb_par *par = info->par;
|
||||
/*
|
||||
* This code can be called whith interrupts disabled.
|
||||
* This code can be called with interrupts disabled.
|
||||
* So instead of relaying on irq to trigger the event,
|
||||
* poll the state till the necessary command is executed.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -769,7 +769,7 @@ static int dlfb_ops_ioctl(struct fb_info *info, unsigned int cmd,
|
|||
|
||||
/*
|
||||
* If we have a damage-aware client, turn fb_defio "off"
|
||||
* To avoid perf imact of unecessary page fault handling.
|
||||
* To avoid perf imact of unnecessary page fault handling.
|
||||
* Done by resetting the delay for this fb_info to a very
|
||||
* long period. Pages will become writable and stay that way.
|
||||
* Reset to normal value when all clients have closed this fb.
|
||||
|
|
|
|||
|
|
@ -152,7 +152,7 @@ static inline int setop(int op)
|
|||
}
|
||||
|
||||
/* Set the Enable Set/Reset Register and return its old value.
|
||||
The code here always uses value 0xf for thsi register. */
|
||||
The code here always uses value 0xf for this register. */
|
||||
static inline int setsr(int sr)
|
||||
{
|
||||
int oldsr;
|
||||
|
|
|
|||
|
|
@ -174,7 +174,7 @@ void viafb_set_gamma_table(int bpp, unsigned int *gamma_table)
|
|||
}
|
||||
|
||||
/* If adjust Gamma value in SAMM, fill IGA1,
|
||||
IGA2 Gamma table simultanous. */
|
||||
IGA2 Gamma table simultaneous. */
|
||||
/* Switch to IGA2 Gamma Table */
|
||||
if ((active_device_amount > 1) &&
|
||||
!((viaparinfo->chip_info->gfx_chip_name ==
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@
|
|||
#ifndef __VIAUTILITY_H__
|
||||
#define __VIAUTILITY_H__
|
||||
|
||||
/* These functions are used to get infomation about device's state */
|
||||
/* These functions are used to get information about device's state */
|
||||
void viafb_get_device_support_state(u32 *support_state);
|
||||
void viafb_get_device_connect_state(u32 *connect_state);
|
||||
bool viafb_lcd_get_support_expand_state(u32 xres, u32 yres);
|
||||
|
|
|
|||
|
|
@ -2019,7 +2019,7 @@ int __init viafb_init(void)
|
|||
return -EINVAL;
|
||||
|
||||
printk(KERN_INFO
|
||||
"VIA Graphics Intergration Chipset framebuffer %d.%d initializing\n",
|
||||
"VIA Graphics Integration Chipset framebuffer %d.%d initializing\n",
|
||||
VERSION_MAJOR, VERSION_MINOR);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1306,7 +1306,7 @@ static void w100_init_lcd(struct w100fb_par *par)
|
|||
union graphic_v_disp_u graphic_v_disp;
|
||||
union crtc_total_u crtc_total;
|
||||
|
||||
/* w3200 doesnt like undefined bits being set so zero register values first */
|
||||
/* w3200 doesn't like undefined bits being set so zero register values first */
|
||||
|
||||
active_h_disp.val = 0;
|
||||
active_h_disp.f.active_h_start=mode->left_margin;
|
||||
|
|
|
|||
Loading…
Reference in a new issue