From 25feee4daa705a2c9f2cf55f518f8ad570354c3c Mon Sep 17 00:00:00 2001 From: Pankaj Gupta Date: Fri, 21 Aug 2020 17:47:05 +0530 Subject: [PATCH] ARM: dts: msm: Add gpu speed bin property for holi Add gpu_speed_bin property in qfprom device node for holi. Change-Id: Ia7e2ba73ebcd1b5a17da786f5394769e6e907833 --- qcom/holi-gpu.dtsi | 4 ++-- qcom/holi.dtsi | 5 +++++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/qcom/holi-gpu.dtsi b/qcom/holi-gpu.dtsi index 61f8273c784c..969737edfde3 100644 --- a/qcom/holi-gpu.dtsi +++ b/qcom/holi-gpu.dtsi @@ -32,8 +32,8 @@ msm_gpu: qcom,kgsl-3d0@5900000 { vdd-supply = <&gpu_gx_gdsc>; qcom,chipid = <0x06010900>; - nvmem-cells = <&gpu_gaming_bin>; - nvmem-cell-names = "gaming_bin"; + nvmem-cells = <&gpu_speed_bin>, <&gpu_gaming_bin>; + nvmem-cell-names = "speed_bin", "gaming_bin"; qcom,initial-pwrlevel = <4>; qcom,gpu-quirk-secvid-set-once; diff --git a/qcom/holi.dtsi b/qcom/holi.dtsi index 8c0be0a615be..02bbe6f9916f 100644 --- a/qcom/holi.dtsi +++ b/qcom/holi.dtsi @@ -2563,6 +2563,11 @@ read-only; ranges; + gpu_speed_bin: gpu_speed_bin@6015 { + reg = <0x6015 0x1>; + bits = <0 8>; + }; + adsp_variant: adsp_variant@1E6 { reg = <0x1E6 0x2>; bits = <6 9>;