From 262c9020bf4222f0f6dbbbbbcbeb2c352afaff50 Mon Sep 17 00:00:00 2001
From: Aniket Randive <arandive@qti.qualcomm.com>
Date: Tue, 6 Apr 2021 10:24:29 +0530
Subject: [PATCH] ARM: dts: msm: Add support for QUPv3 dtsi

Here er are adding the main dtsi file and enabling the
UART node.

Change-Id: I22a7c92785b1fb14eefe1cc84155b454c1ff874a
---
 qcom/direwolf.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/qcom/direwolf.dtsi b/qcom/direwolf.dtsi
index 98ff935a1075..3d065368f299 100644
--- a/qcom/direwolf.dtsi
+++ b/qcom/direwolf.dtsi
@@ -30,6 +30,8 @@
 
 	aliases {
 		ufshc1 = &ufshc_mem; /* Embedded UFS slot */
+		serial0 = &qupv3_se17_2uart;
+		hsuart0 = &qupv3_se2_4uart;
 	};
 
 	cpus {
@@ -1629,6 +1631,7 @@
 #include "direwolf-gdsc.dtsi"
 #include "direwolf-ion.dtsi"
 #include "msm-arm-smmu-direwolf.dtsi"
+#include "direwolf-qupv3.dtsi"
 
 &gcc_emac0_gdsc {
 	status = "ok";
@@ -1725,3 +1728,7 @@
 &hlos1_vote_turing_mmu_tbu3_gdsc {
 	status = "ok";
 };
+
+&qupv3_se17_2uart {
+	status = "ok";
+};