mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-11 23:24:22 -04:00
qcacld-3.0: Add ini to control chain mask for 2G and 5G
Add ini parameters to control chain mask in 2G and 5G band. Change-Id: I336c4598164c55d923f20b748fb189654b713102 CRs-Fixed: 2155583
This commit is contained in:
parent
0a448122a4
commit
269b4ed0a7
4 changed files with 262 additions and 21 deletions
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@ -5311,7 +5311,7 @@ enum hdd_link_speed_rpt_type {
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*/
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#define CFG_VHT_ENABLE_1x1_TX_CHAINMASK "gSetTxChainmask1x1"
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#define CFG_VHT_ENABLE_1x1_TX_CHAINMASK_MIN (1)
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#define CFG_VHT_ENABLE_1x1_TX_CHAINMASK_MIN (0)
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#define CFG_VHT_ENABLE_1x1_TX_CHAINMASK_MAX (2)
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#define CFG_VHT_ENABLE_1x1_TX_CHAINMASK_DEFAULT (1)
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@ -5339,7 +5339,7 @@ enum hdd_link_speed_rpt_type {
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*/
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#define CFG_VHT_ENABLE_1x1_RX_CHAINMASK "gSetRxChainmask1x1"
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#define CFG_VHT_ENABLE_1x1_RX_CHAINMASK_MIN (1)
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#define CFG_VHT_ENABLE_1x1_RX_CHAINMASK_MIN (0)
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#define CFG_VHT_ENABLE_1x1_RX_CHAINMASK_MAX (2)
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#define CFG_VHT_ENABLE_1x1_RX_CHAINMASK_DEFAULT (1)
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@ -13781,6 +13781,129 @@ enum hdd_external_acs_freq_band {
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#define CFG_ENABLE_ESP_FEATURE_MAX (1)
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#define CFG_ENABLE_ESP_FEATURE_DEFAULT (0)
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/*
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* <ini>
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* tx_chain_mask_2g - tx chain mask for 2g
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* @Min: 0
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* @Max: 3
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* @Default: 0
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*
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* This ini will set tx chain mask for 2g. To use the ini, make sure:
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* gSetTxChainmask1x1/gSetRxChainmask1x1 = 0,
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* gDualMacFeatureDisable = 1
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* gEnable2x2 = 0
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*
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* tx_chain_mask_2g=0 : don't care
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* tx_chain_mask_2g=1 : for 2g tx use chain 0
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* tx_chain_mask_2g=2 : for 2g tx use chain 1
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* tx_chain_mask_2g=3 : for 2g tx can use either chain
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*
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* Related: None
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*
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* Supported Feature: All profiles
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*
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* Usage: External
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*
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* </ini>
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*/
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#define CFG_TX_CHAIN_MASK_2G_NAME "tx_chain_mask_2g"
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#define CFG_TX_CHAIN_MASK_2G_MIN (0)
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#define CFG_TX_CHAIN_MASK_2G_MAX (3)
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#define CFG_TX_CHAIN_MASK_2G_DEFAULT (0)
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/*
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* <ini>
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* tx_chain_mask_5g - tx chain mask for 5g
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* @Min: 0
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* @Max: 3
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* @Default: 0
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*
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* This ini will set tx chain mask for 5g. To use the ini, make sure:
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* gSetTxChainmask1x1/gSetRxChainmask1x1 = 0,
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* gDualMacFeatureDisable = 1
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* gEnable2x2 = 0
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*
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* tx_chain_mask_5g=0 : don't care
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* tx_chain_mask_5g=1 : for 5g tx use chain 0
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* tx_chain_mask_5g=2 : for 5g tx use chain 1
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* tx_chain_mask_5g=3 : for 5g tx can use either chain
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*
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* Related: None
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*
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* Supported Feature: All profiles
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*
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* Usage: External
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*
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* </ini>
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*/
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#define CFG_TX_CHAIN_MASK_5G_NAME "tx_chain_mask_5g"
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#define CFG_TX_CHAIN_MASK_5G_MIN (0)
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#define CFG_TX_CHAIN_MASK_5G_MAX (3)
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#define CFG_TX_CHAIN_MASK_5G_DEFAULT (0)
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/*
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* <ini>
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* rx_chain_mask_2g - rx chain mask for 2g
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* @Min: 0
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* @Max: 3
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* @Default: 0
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*
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* This ini will set rx chain mask for 2g. To use the ini, make sure:
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* gSetTxChainmask1x1/gSetRxChainmask1x1 = 0,
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* gDualMacFeatureDisable = 1
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* gEnable2x2 = 0
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*
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* rx_chain_mask_2g=0 : don't care
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* rx_chain_mask_2g=1 : for 2g rx use chain 0
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* rx_chain_mask_2g=2 : for 2g rx use chain 1
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* rx_chain_mask_2g=3 : for 2g rx can use either chain
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*
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* Related: None
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*
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* Supported Feature: All profiles
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*
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* Usage: External
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*
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* </ini>
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*/
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#define CFG_RX_CHAIN_MASK_2G_NAME "rx_chain_mask_2g"
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#define CFG_RX_CHAIN_MASK_2G_MIN (0)
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#define CFG_RX_CHAIN_MASK_2G_MAX (3)
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#define CFG_RX_CHAIN_MASK_2G_DEFAULT (0)
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/*
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* <ini>
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* rx_chain_mask_5g - rx chain mask for 5g
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* @Min: 0
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* @Max: 3
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* @Default: 0
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*
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* This ini will set rx chain mask for 5g. To use the ini, make sure:
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* gSetTxChainmask1x1/gSetRxChainmask1x1 = 0,
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* gDualMacFeatureDisable = 1
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* gEnable2x2 = 0
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*
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* rx_chain_mask_5g=0 : don't care
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* rx_chain_mask_5g=1 : for 5g rx use chain 0
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* rx_chain_mask_5g=2 : for 5g rx use chain 1
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* rx_chain_mask_5g=3 : for 5g rx can use either chain
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*
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* Related: None
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*
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* Supported Feature: All profiles
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*
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* Usage: External
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*
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* </ini>
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*/
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#define CFG_RX_CHAIN_MASK_5G_NAME "rx_chain_mask_5g"
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#define CFG_RX_CHAIN_MASK_5G_MIN (0)
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#define CFG_RX_CHAIN_MASK_5G_MAX (3)
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#define CFG_RX_CHAIN_MASK_5G_DEFAULT (0)
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/*
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* Type declarations
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*/
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@ -14667,6 +14790,10 @@ struct hdd_config {
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bool probe_req_deferral_enabled;
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bool fils_discovery_sap_enabled;
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bool esp_for_roam_enabled;
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uint8_t tx_chain_mask_2g;
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uint8_t rx_chain_mask_2g;
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uint8_t tx_chain_mask_5g;
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uint8_t rx_chain_mask_5g;
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};
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#define VAR_OFFSET(_Struct, _Var) (offsetof(_Struct, _Var))
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@ -1707,6 +1707,7 @@ struct hdd_context {
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qdf_atomic_t disable_lro_in_low_tput;
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bool en_tcp_delack_no_lro;
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qdf_wake_lock_t monitor_mode_wakelock;
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bool lte_coex_ant_share;
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};
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/**
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@ -5361,6 +5361,33 @@ struct reg_table_entry g_registry_table[] = {
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CFG_ENABLE_ESP_FEATURE_MIN,
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CFG_ENABLE_ESP_FEATURE_MAX),
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REG_VARIABLE(CFG_TX_CHAIN_MASK_2G_NAME, WLAN_PARAM_Integer,
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struct hdd_config, tx_chain_mask_2g,
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VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
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CFG_TX_CHAIN_MASK_2G_DEFAULT,
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CFG_TX_CHAIN_MASK_2G_MIN,
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CFG_TX_CHAIN_MASK_2G_MAX),
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REG_VARIABLE(CFG_RX_CHAIN_MASK_2G_NAME, WLAN_PARAM_Integer,
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struct hdd_config, rx_chain_mask_2g,
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VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
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CFG_RX_CHAIN_MASK_2G_DEFAULT,
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CFG_RX_CHAIN_MASK_2G_MIN,
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CFG_RX_CHAIN_MASK_2G_MAX),
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REG_VARIABLE(CFG_TX_CHAIN_MASK_5G_NAME, WLAN_PARAM_Integer,
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struct hdd_config, tx_chain_mask_5g,
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VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
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CFG_TX_CHAIN_MASK_5G_DEFAULT,
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CFG_TX_CHAIN_MASK_5G_MIN,
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CFG_TX_CHAIN_MASK_5G_MAX),
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REG_VARIABLE(CFG_RX_CHAIN_MASK_5G_NAME, WLAN_PARAM_Integer,
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struct hdd_config, rx_chain_mask_5g,
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VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
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CFG_RX_CHAIN_MASK_5G_DEFAULT,
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CFG_RX_CHAIN_MASK_5G_MIN,
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CFG_RX_CHAIN_MASK_5G_MAX),
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};
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@ -1831,6 +1831,7 @@ void hdd_update_tgt_cfg(void *context, void *param)
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/* Configure NAN datapath features */
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hdd_nan_datapath_target_config(hdd_ctx, cfg);
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hdd_ctx->dfs_cac_offload = cfg->dfs_cac_offload;
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hdd_ctx->lte_coex_ant_share = cfg->services.lte_coex_ant_share;
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}
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bool hdd_dfs_indicate_radar(struct hdd_context *hdd_ctx)
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@ -3881,6 +3882,107 @@ static void hdd_set_fw_log_params(struct hdd_context *hdd_ctx,
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#endif
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/**
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* hdd_configure_chain_mask() - programs chain mask to firmware
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* @adapter: HDD adapter
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*
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* Return: 0 on success or errno on failure
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*/
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static int hdd_configure_chain_mask(struct hdd_adapter *adapter)
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{
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int ret_val;
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struct hdd_context *hdd_ctx = WLAN_HDD_GET_CTX(adapter);
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hdd_debug("enable2x2: %d, lte_coex: %d, ChainMask1x1: tx: %d rx: %d",
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hdd_ctx->config->enable2x2, hdd_ctx->lte_coex_ant_share,
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hdd_ctx->config->txchainmask1x1,
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hdd_ctx->config->rxchainmask1x1);
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hdd_debug("disable_DBS: %d, tx_chain_mask_2g: %d, rx_chain_mask_2g: %d",
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hdd_ctx->config->dual_mac_feature_disable,
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hdd_ctx->config->tx_chain_mask_2g,
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hdd_ctx->config->rx_chain_mask_2g);
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hdd_debug("tx_chain_mask_5g: %d, rx_chain_mask_5g: %d",
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hdd_ctx->config->tx_chain_mask_5g,
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hdd_ctx->config->rx_chain_mask_5g);
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if (hdd_ctx->config->enable2x2) {
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hdd_info("2x2 enabled. skip chain mask programming");
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return 0;
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}
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if (hdd_ctx->config->txchainmask1x1) {
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ret_val = sme_cli_set_command(adapter->session_id,
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WMI_PDEV_PARAM_TX_CHAIN_MASK,
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hdd_ctx->config->txchainmask1x1,
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PDEV_CMD);
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if (ret_val)
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goto error;
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}
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if (hdd_ctx->config->rxchainmask1x1) {
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ret_val = sme_cli_set_command(adapter->session_id,
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WMI_PDEV_PARAM_RX_CHAIN_MASK,
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hdd_ctx->config->rxchainmask1x1,
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PDEV_CMD);
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if (ret_val)
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goto error;
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}
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if (hdd_ctx->lte_coex_ant_share) {
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hdd_info("lte ant sharing enabled. skip per band chain mask");
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return 0;
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}
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if (hdd_ctx->config->txchainmask1x1 ||
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hdd_ctx->config->rxchainmask1x1) {
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hdd_info("band agnostic tx/rx chain mask set. skip per band chain mask");
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return 0;
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}
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if (!hdd_ctx->config->dual_mac_feature_disable) {
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hdd_info("DBS enabled. skip per band chain mask");
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return 0;
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}
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if (hdd_ctx->config->tx_chain_mask_2g) {
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ret_val = sme_cli_set_command(adapter->session_id,
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WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
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hdd_ctx->config->tx_chain_mask_2g, PDEV_CMD);
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if (0 != ret_val)
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goto error;
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}
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if (hdd_ctx->config->rx_chain_mask_2g) {
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ret_val = sme_cli_set_command(adapter->session_id,
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WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
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hdd_ctx->config->rx_chain_mask_2g, PDEV_CMD);
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if (0 != ret_val)
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goto error;
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}
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if (hdd_ctx->config->tx_chain_mask_5g) {
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ret_val = sme_cli_set_command(adapter->session_id,
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WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
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hdd_ctx->config->tx_chain_mask_5g, PDEV_CMD);
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if (0 != ret_val)
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goto error;
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}
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if (hdd_ctx->config->rx_chain_mask_5g) {
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ret_val = sme_cli_set_command(adapter->session_id,
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WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
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hdd_ctx->config->rx_chain_mask_5g, PDEV_CMD);
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if (0 != ret_val)
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goto error;
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}
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return 0;
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error:
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hdd_err("WMI PDEV set param failed %d", ret_val);
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return -EINVAL;
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}
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/**
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* hdd_set_fw_params() - Set parameters to firmware
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* @adapter: HDD adapter
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@ -3961,27 +4063,11 @@ int hdd_set_fw_params(struct hdd_adapter *adapter)
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goto error;
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}
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ret = sme_cli_set_command(adapter->session_id,
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WMI_PDEV_PARAM_TX_CHAIN_MASK,
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hdd_ctx->config->txchainmask1x1,
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PDEV_CMD);
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if (ret) {
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hdd_err("WMI_PDEV_PARAM_TX_CHAIN_MASK set failed %d",
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ret);
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goto error;
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}
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ret = sme_cli_set_command(adapter->session_id,
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WMI_PDEV_PARAM_RX_CHAIN_MASK,
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hdd_ctx->config->rxchainmask1x1,
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PDEV_CMD);
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if (ret) {
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hdd_err("WMI_PDEV_PARAM_RX_CHAIN_MASK set failed %d",
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ret);
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goto error;
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}
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#undef HDD_DTIM_1CHAIN_RX_ID
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#undef HDD_SMPS_PARAM_VALUE_S
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if (hdd_configure_chain_mask(adapter))
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goto error;
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}
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ret = sme_cli_set_command(adapter->session_id,
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