mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-07 04:12:04 -04:00
Merge "Merge android11-5.4.191+ (375c2e2) into msm-5.4"
This commit is contained in:
qctecmdr
Gerrit - the friendly Code Review server
commit
2908e85ff7
886 changed files with 7425 additions and 4053 deletions
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@ -156,3 +156,13 @@ accesses to DMA buffers in both privileged "supervisor" and unprivileged
|
|||
subsystem that the buffer is fully accessible at the elevated privilege
|
||||
level (and ideally inaccessible or at least read-only at the
|
||||
lesser-privileged levels).
|
||||
|
||||
DMA_ATTR_PRIVILEGED
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||||
-------------------
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||||
|
||||
Some advanced peripherals such as remote processors and GPUs perform
|
||||
accesses to DMA buffers in both privileged "supervisor" and unprivileged
|
||||
"user" modes. This attribute is used to indicate to the DMA-mapping
|
||||
subsystem that the buffer is fully accessible at the elevated privilege
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||||
level (and ideally inaccessible or at least read-only at the
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||||
lesser-privileged levels).
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||||
|
|
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|||
|
|
@ -76,7 +76,7 @@ The beginning of an extended attribute block is in
|
|||
- Checksum of the extended attribute block.
|
||||
* - 0x14
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||||
- \_\_u32
|
||||
- h\_reserved[2]
|
||||
- h\_reserved[3]
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||||
- Zero.
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||||
|
||||
The checksum is calculated against the FS UUID, the 64-bit block number
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||||
|
|
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|||
|
|
@ -174,7 +174,16 @@ Trees
|
|||
- The finalized and tagged releases of all stable kernels can be found
|
||||
in separate branches per version at:
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||||
|
||||
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
|
||||
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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||||
|
||||
- The release candidate of all stable kernel versions can be found at:
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||||
|
||||
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git/
|
||||
|
||||
.. warning::
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||||
The -stable-rc tree is a snapshot in time of the stable-queue tree and
|
||||
will change frequently, hence will be rebased often. It should only be
|
||||
used for testing purposes (e.g. to be consumed by CI systems).
|
||||
|
||||
|
||||
Review committee
|
||||
|
|
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|||
|
|
@ -261,6 +261,10 @@ alc-sense-combo
|
|||
huawei-mbx-stereo
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||||
Enable initialization verbs for Huawei MBX stereo speakers;
|
||||
might be risky, try this at your own risk
|
||||
alc298-samsung-headphone
|
||||
Samsung laptops with ALC298
|
||||
alc256-samsung-headphone
|
||||
Samsung laptops with ALC256
|
||||
|
||||
ALC66x/67x/892
|
||||
==============
|
||||
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|
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|||
2
Makefile
2
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
VERSION = 5
|
||||
PATCHLEVEL = 4
|
||||
SUBLEVEL = 180
|
||||
SUBLEVEL = 191
|
||||
EXTRAVERSION =
|
||||
NAME = Kleptomaniac Octopus
|
||||
|
||||
|
|
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|||
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@ -1 +1 @@
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|||
LTS_5.4.180_e7792e2790f3
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||||
LTS_5.4.191_375c2e2cdbdb
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||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
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|
@ -199,6 +199,7 @@ tracesys_exit:
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|||
st r0, [sp, PT_r0] ; sys call return value in pt_regs
|
||||
|
||||
;POST Sys Call Ptrace Hook
|
||||
mov r0, sp ; pt_regs needed
|
||||
bl @syscall_trace_exit
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||||
b ret_from_exception ; NOT ret_from_system_call at is saves r0 which
|
||||
; we'd done before calling post hook above
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||||
|
|
|
|||
|
|
@ -118,7 +118,7 @@
|
|||
};
|
||||
|
||||
pinctrl_fwqspid_default: fwqspid_default {
|
||||
function = "FWQSPID";
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||||
function = "FWSPID";
|
||||
groups = "FWQSPID";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -38,12 +38,26 @@
|
|||
#size-cells = <0>;
|
||||
enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
|
||||
|
||||
/* Source for d/i-cache-line-size and d/i-cache-sets
|
||||
* https://developer.arm.com/documentation/ddi0500/e/level-1-memory-system
|
||||
* /about-the-l1-memory-system?lang=en
|
||||
*
|
||||
* Source for d/i-cache-size
|
||||
* https://magpi.raspberrypi.com/articles/raspberry-pi-3-specs-benchmarks
|
||||
*/
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0x0 0x000000d8>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
|
||||
next-level-cache = <&l2>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
|
|
@ -52,6 +66,13 @@
|
|||
reg = <1>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0x0 0x000000e0>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
|
||||
next-level-cache = <&l2>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
|
|
@ -60,6 +81,13 @@
|
|||
reg = <2>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0x0 0x000000e8>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
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||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
|
||||
next-level-cache = <&l2>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
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|
@ -68,6 +96,27 @@
|
|||
reg = <3>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0x0 0x000000f0>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
|
||||
next-level-cache = <&l2>;
|
||||
};
|
||||
|
||||
/* Source for cache-line-size + cache-sets
|
||||
* https://developer.arm.com/documentation/ddi0500
|
||||
* /e/level-2-memory-system/about-the-l2-memory-system?lang=en
|
||||
* Source for cache-size
|
||||
* https://datasheets.raspberrypi.com/cm/cm1-and-cm3-datasheet.pdf
|
||||
*/
|
||||
l2: l2-cache0 {
|
||||
compatible = "cache";
|
||||
cache-size = <0x80000>;
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set
|
||||
cache-level = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -260,7 +260,7 @@
|
|||
};
|
||||
|
||||
uart3_data: uart3-data {
|
||||
samsung,pins = "gpa1-4", "gpa1-4";
|
||||
samsung,pins = "gpa1-4", "gpa1-5";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||
|
|
|
|||
|
|
@ -117,6 +117,9 @@
|
|||
status = "okay";
|
||||
ddc = <&i2c_2>;
|
||||
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
|
||||
vdd-supply = <&ldo8_reg>;
|
||||
vdd_osc-supply = <&ldo10_reg>;
|
||||
vdd_pll-supply = <&ldo8_reg>;
|
||||
};
|
||||
|
||||
&i2c_0 {
|
||||
|
|
|
|||
|
|
@ -132,6 +132,9 @@
|
|||
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_hpd_irq>;
|
||||
vdd-supply = <&ldo6_reg>;
|
||||
vdd_osc-supply = <&ldo7_reg>;
|
||||
vdd_pll-supply = <&ldo6_reg>;
|
||||
};
|
||||
|
||||
&hsi2c_4 {
|
||||
|
|
|
|||
|
|
@ -53,6 +53,31 @@
|
|||
};
|
||||
};
|
||||
|
||||
lvds-decoder {
|
||||
compatible = "ti,ds90cf364a", "lvds-decoder";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
lvds_decoder_in: endpoint {
|
||||
remote-endpoint = <&lvds0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
lvds_decoder_out: endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
panel {
|
||||
compatible = "edt,etm0700g0dh6";
|
||||
pinctrl-0 = <&pinctrl_display_gpio>;
|
||||
|
|
@ -61,7 +86,7 @@
|
|||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&lvds0_out>;
|
||||
remote-endpoint = <&lvds_decoder_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -450,7 +475,7 @@
|
|||
reg = <2>;
|
||||
|
||||
lvds0_out: endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
remote-endpoint = <&lvds_decoder_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -141,7 +141,8 @@
|
|||
clocks {
|
||||
sleep_clk: sleep_clk {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
clock-frequency = <32000>;
|
||||
clock-output-names = "gcc_sleep_clk_src";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -145,7 +145,9 @@
|
|||
reg = <0x108000 0x1000>;
|
||||
qcom,ipc = <&l2cc 0x8 2>;
|
||||
|
||||
interrupts = <0 19 0>, <0 21 0>, <0 22 0>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "ack", "err", "wakeup";
|
||||
|
||||
regulators {
|
||||
|
|
@ -191,7 +193,7 @@
|
|||
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
|
||||
reg = <0x16440000 0x1000>,
|
||||
<0x16400000 0x1000>;
|
||||
interrupts = <0 154 0x0>;
|
||||
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
status = "disabled";
|
||||
|
|
@ -317,7 +319,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x16080000 0x1000>;
|
||||
interrupts = <0 147 0>;
|
||||
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
|
||||
spi-max-frequency = <24000000>;
|
||||
cs-gpios = <&msmgpio 8 0>;
|
||||
|
||||
|
|
|
|||
|
|
@ -635,8 +635,8 @@
|
|||
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
assigned-clocks = <&cru SCLK_HDMI_PHY>;
|
||||
assigned-clock-parents = <&hdmi_phy>;
|
||||
clocks = <&cru SCLK_HDMI_HDCP>, <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_CEC>;
|
||||
clock-names = "isfr", "iahb", "cec";
|
||||
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>;
|
||||
clock-names = "iahb", "isfr", "cec";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>;
|
||||
resets = <&cru SRST_HDMI_P>;
|
||||
|
|
|
|||
|
|
@ -975,7 +975,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
crypto: cypto-controller@ff8a0000 {
|
||||
crypto: crypto@ff8a0000 {
|
||||
compatible = "rockchip,rk3288-crypto";
|
||||
reg = <0x0 0xff8a0000 0x0 0x4000>;
|
||||
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
|
|
@ -526,7 +526,7 @@
|
|||
pmecc: ecc-engine@f8014070 {
|
||||
compatible = "atmel,sama5d2-pmecc";
|
||||
reg = <0xf8014070 0x490>,
|
||||
<0xf8014500 0x100>;
|
||||
<0xf8014500 0x200>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -136,9 +136,9 @@
|
|||
reg = <0xb4100000 0x1000>;
|
||||
interrupts = <0 105 0x4>;
|
||||
status = "disabled";
|
||||
dmas = <&dwdma0 12 0 1>,
|
||||
<&dwdma0 13 1 0>;
|
||||
dma-names = "tx", "rx";
|
||||
dmas = <&dwdma0 13 0 1>,
|
||||
<&dwdma0 12 1 0>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
|
||||
thermal@e07008c4 {
|
||||
|
|
|
|||
|
|
@ -284,9 +284,9 @@
|
|||
#size-cells = <0>;
|
||||
interrupts = <0 31 0x4>;
|
||||
status = "disabled";
|
||||
dmas = <&dwdma0 4 0 0>,
|
||||
<&dwdma0 5 0 0>;
|
||||
dma-names = "tx", "rx";
|
||||
dmas = <&dwdma0 5 0 0>,
|
||||
<&dwdma0 4 0 0>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
|
||||
rtc@e0580000 {
|
||||
|
|
|
|||
|
|
@ -183,8 +183,8 @@
|
|||
};
|
||||
conf_ata {
|
||||
nvidia,pins = "ata", "atb", "atc", "atd", "ate",
|
||||
"cdev1", "cdev2", "dap1", "dtb", "gma",
|
||||
"gmb", "gmc", "gmd", "gme", "gpu7",
|
||||
"cdev1", "cdev2", "dap1", "dtb", "dtf",
|
||||
"gma", "gmb", "gmc", "gmd", "gme", "gpu7",
|
||||
"gpv", "i2cp", "irrx", "irtx", "pta",
|
||||
"rm", "slxa", "slxk", "spia", "spib",
|
||||
"uac";
|
||||
|
|
@ -203,7 +203,7 @@
|
|||
};
|
||||
conf_crtp {
|
||||
nvidia,pins = "crtp", "dap2", "dap3", "dap4",
|
||||
"dtc", "dte", "dtf", "gpu", "sdio1",
|
||||
"dtc", "dte", "gpu", "sdio1",
|
||||
"slxc", "slxd", "spdi", "spdo", "spig",
|
||||
"uda";
|
||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||
|
|
|
|||
|
|
@ -154,22 +154,38 @@ static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned int instr)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct undef_hook kgdb_brkpt_hook = {
|
||||
static struct undef_hook kgdb_brkpt_arm_hook = {
|
||||
.instr_mask = 0xffffffff,
|
||||
.instr_val = KGDB_BREAKINST,
|
||||
.cpsr_mask = MODE_MASK,
|
||||
.cpsr_mask = PSR_T_BIT | MODE_MASK,
|
||||
.cpsr_val = SVC_MODE,
|
||||
.fn = kgdb_brk_fn
|
||||
};
|
||||
|
||||
static struct undef_hook kgdb_compiled_brkpt_hook = {
|
||||
static struct undef_hook kgdb_brkpt_thumb_hook = {
|
||||
.instr_mask = 0xffff,
|
||||
.instr_val = KGDB_BREAKINST & 0xffff,
|
||||
.cpsr_mask = PSR_T_BIT | MODE_MASK,
|
||||
.cpsr_val = PSR_T_BIT | SVC_MODE,
|
||||
.fn = kgdb_brk_fn
|
||||
};
|
||||
|
||||
static struct undef_hook kgdb_compiled_brkpt_arm_hook = {
|
||||
.instr_mask = 0xffffffff,
|
||||
.instr_val = KGDB_COMPILED_BREAK,
|
||||
.cpsr_mask = MODE_MASK,
|
||||
.cpsr_mask = PSR_T_BIT | MODE_MASK,
|
||||
.cpsr_val = SVC_MODE,
|
||||
.fn = kgdb_compiled_brk_fn
|
||||
};
|
||||
|
||||
static struct undef_hook kgdb_compiled_brkpt_thumb_hook = {
|
||||
.instr_mask = 0xffff,
|
||||
.instr_val = KGDB_COMPILED_BREAK & 0xffff,
|
||||
.cpsr_mask = PSR_T_BIT | MODE_MASK,
|
||||
.cpsr_val = PSR_T_BIT | SVC_MODE,
|
||||
.fn = kgdb_compiled_brk_fn
|
||||
};
|
||||
|
||||
static int __kgdb_notify(struct die_args *args, unsigned long cmd)
|
||||
{
|
||||
struct pt_regs *regs = args->regs;
|
||||
|
|
@ -210,8 +226,10 @@ int kgdb_arch_init(void)
|
|||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
register_undef_hook(&kgdb_brkpt_hook);
|
||||
register_undef_hook(&kgdb_compiled_brkpt_hook);
|
||||
register_undef_hook(&kgdb_brkpt_arm_hook);
|
||||
register_undef_hook(&kgdb_brkpt_thumb_hook);
|
||||
register_undef_hook(&kgdb_compiled_brkpt_arm_hook);
|
||||
register_undef_hook(&kgdb_compiled_brkpt_thumb_hook);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -224,8 +242,10 @@ int kgdb_arch_init(void)
|
|||
*/
|
||||
void kgdb_arch_exit(void)
|
||||
{
|
||||
unregister_undef_hook(&kgdb_brkpt_hook);
|
||||
unregister_undef_hook(&kgdb_compiled_brkpt_hook);
|
||||
unregister_undef_hook(&kgdb_brkpt_arm_hook);
|
||||
unregister_undef_hook(&kgdb_brkpt_thumb_hook);
|
||||
unregister_undef_hook(&kgdb_compiled_brkpt_arm_hook);
|
||||
unregister_undef_hook(&kgdb_compiled_brkpt_thumb_hook);
|
||||
unregister_die_notifier(&kgdb_notifier);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1101,11 +1101,13 @@ static int __init da850_evm_config_emac(void)
|
|||
int ret;
|
||||
u32 val;
|
||||
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
||||
u8 rmii_en = soc_info->emac_pdata->rmii_en;
|
||||
u8 rmii_en;
|
||||
|
||||
if (!machine_is_davinci_da850_evm())
|
||||
return 0;
|
||||
|
||||
rmii_en = soc_info->emac_pdata->rmii_en;
|
||||
|
||||
cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
|
||||
|
||||
val = __raw_readl(cfg_chip3_base);
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC
|
||||
cmp \irqstat, #0
|
||||
clzne \irqnr, \irqstat
|
||||
rsbne \irqnr, \irqnr, #31
|
||||
rsbne \irqnr, \irqnr, #32
|
||||
.endm
|
||||
|
||||
.macro arch_ret_to_user, tmp1, tmp2
|
||||
|
|
|
|||
|
|
@ -9,6 +9,6 @@
|
|||
#ifndef __IRQS_H
|
||||
#define __IRQS_H
|
||||
|
||||
#define NR_IRQS 32
|
||||
#define NR_IRQS 33
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -32,14 +32,14 @@ static void intstr_write(u32 val)
|
|||
static void
|
||||
iop32x_irq_mask(struct irq_data *d)
|
||||
{
|
||||
iop32x_mask &= ~(1 << d->irq);
|
||||
iop32x_mask &= ~(1 << (d->irq - 1));
|
||||
intctl_write(iop32x_mask);
|
||||
}
|
||||
|
||||
static void
|
||||
iop32x_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
iop32x_mask |= 1 << d->irq;
|
||||
iop32x_mask |= 1 << (d->irq - 1);
|
||||
intctl_write(iop32x_mask);
|
||||
}
|
||||
|
||||
|
|
@ -65,7 +65,7 @@ void __init iop32x_init_irq(void)
|
|||
machine_is_em7210())
|
||||
*IOP3XX_PCIIRSR = 0x0f;
|
||||
|
||||
for (i = 0; i < NR_IRQS; i++) {
|
||||
for (i = 1; i < NR_IRQS; i++) {
|
||||
irq_set_chip_and_handler(i, &ext_chip, handle_level_irq);
|
||||
irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -7,36 +7,40 @@
|
|||
#ifndef __IOP32X_IRQS_H
|
||||
#define __IOP32X_IRQS_H
|
||||
|
||||
/* Interrupts in Linux start at 1, hardware starts at 0 */
|
||||
|
||||
#define IOP_IRQ(x) ((x) + 1)
|
||||
|
||||
/*
|
||||
* IOP80321 chipset interrupts
|
||||
*/
|
||||
#define IRQ_IOP32X_DMA0_EOT 0
|
||||
#define IRQ_IOP32X_DMA0_EOC 1
|
||||
#define IRQ_IOP32X_DMA1_EOT 2
|
||||
#define IRQ_IOP32X_DMA1_EOC 3
|
||||
#define IRQ_IOP32X_AA_EOT 6
|
||||
#define IRQ_IOP32X_AA_EOC 7
|
||||
#define IRQ_IOP32X_CORE_PMON 8
|
||||
#define IRQ_IOP32X_TIMER0 9
|
||||
#define IRQ_IOP32X_TIMER1 10
|
||||
#define IRQ_IOP32X_I2C_0 11
|
||||
#define IRQ_IOP32X_I2C_1 12
|
||||
#define IRQ_IOP32X_MESSAGING 13
|
||||
#define IRQ_IOP32X_ATU_BIST 14
|
||||
#define IRQ_IOP32X_PERFMON 15
|
||||
#define IRQ_IOP32X_CORE_PMU 16
|
||||
#define IRQ_IOP32X_BIU_ERR 17
|
||||
#define IRQ_IOP32X_ATU_ERR 18
|
||||
#define IRQ_IOP32X_MCU_ERR 19
|
||||
#define IRQ_IOP32X_DMA0_ERR 20
|
||||
#define IRQ_IOP32X_DMA1_ERR 21
|
||||
#define IRQ_IOP32X_AA_ERR 23
|
||||
#define IRQ_IOP32X_MSG_ERR 24
|
||||
#define IRQ_IOP32X_SSP 25
|
||||
#define IRQ_IOP32X_XINT0 27
|
||||
#define IRQ_IOP32X_XINT1 28
|
||||
#define IRQ_IOP32X_XINT2 29
|
||||
#define IRQ_IOP32X_XINT3 30
|
||||
#define IRQ_IOP32X_HPI 31
|
||||
#define IRQ_IOP32X_DMA0_EOT IOP_IRQ(0)
|
||||
#define IRQ_IOP32X_DMA0_EOC IOP_IRQ(1)
|
||||
#define IRQ_IOP32X_DMA1_EOT IOP_IRQ(2)
|
||||
#define IRQ_IOP32X_DMA1_EOC IOP_IRQ(3)
|
||||
#define IRQ_IOP32X_AA_EOT IOP_IRQ(6)
|
||||
#define IRQ_IOP32X_AA_EOC IOP_IRQ(7)
|
||||
#define IRQ_IOP32X_CORE_PMON IOP_IRQ(8)
|
||||
#define IRQ_IOP32X_TIMER0 IOP_IRQ(9)
|
||||
#define IRQ_IOP32X_TIMER1 IOP_IRQ(10)
|
||||
#define IRQ_IOP32X_I2C_0 IOP_IRQ(11)
|
||||
#define IRQ_IOP32X_I2C_1 IOP_IRQ(12)
|
||||
#define IRQ_IOP32X_MESSAGING IOP_IRQ(13)
|
||||
#define IRQ_IOP32X_ATU_BIST IOP_IRQ(14)
|
||||
#define IRQ_IOP32X_PERFMON IOP_IRQ(15)
|
||||
#define IRQ_IOP32X_CORE_PMU IOP_IRQ(16)
|
||||
#define IRQ_IOP32X_BIU_ERR IOP_IRQ(17)
|
||||
#define IRQ_IOP32X_ATU_ERR IOP_IRQ(18)
|
||||
#define IRQ_IOP32X_MCU_ERR IOP_IRQ(19)
|
||||
#define IRQ_IOP32X_DMA0_ERR IOP_IRQ(20)
|
||||
#define IRQ_IOP32X_DMA1_ERR IOP_IRQ(21)
|
||||
#define IRQ_IOP32X_AA_ERR IOP_IRQ(23)
|
||||
#define IRQ_IOP32X_MSG_ERR IOP_IRQ(24)
|
||||
#define IRQ_IOP32X_SSP IOP_IRQ(25)
|
||||
#define IRQ_IOP32X_XINT0 IOP_IRQ(27)
|
||||
#define IRQ_IOP32X_XINT1 IOP_IRQ(28)
|
||||
#define IRQ_IOP32X_XINT2 IOP_IRQ(29)
|
||||
#define IRQ_IOP32X_XINT3 IOP_IRQ(30)
|
||||
#define IRQ_IOP32X_HPI IOP_IRQ(31)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -72,6 +72,8 @@ static int sram_probe(struct platform_device *pdev)
|
|||
if (!info)
|
||||
return -ENOMEM;
|
||||
|
||||
platform_set_drvdata(pdev, info);
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (res == NULL) {
|
||||
dev_err(&pdev->dev, "no memory resource defined\n");
|
||||
|
|
@ -107,8 +109,6 @@ static int sram_probe(struct platform_device *pdev)
|
|||
list_add(&info->node, &sram_bank_list);
|
||||
mutex_unlock(&sram_lock);
|
||||
|
||||
platform_set_drvdata(pdev, info);
|
||||
|
||||
dev_info(&pdev->dev, "initialized\n");
|
||||
return 0;
|
||||
|
||||
|
|
@ -127,17 +127,19 @@ static int sram_remove(struct platform_device *pdev)
|
|||
struct sram_bank_info *info;
|
||||
|
||||
info = platform_get_drvdata(pdev);
|
||||
if (info == NULL)
|
||||
return -ENODEV;
|
||||
|
||||
mutex_lock(&sram_lock);
|
||||
list_del(&info->node);
|
||||
mutex_unlock(&sram_lock);
|
||||
if (info->sram_size) {
|
||||
mutex_lock(&sram_lock);
|
||||
list_del(&info->node);
|
||||
mutex_unlock(&sram_lock);
|
||||
|
||||
gen_pool_destroy(info->gpool);
|
||||
iounmap(info->sram_virt);
|
||||
kfree(info->pool_name);
|
||||
}
|
||||
|
||||
gen_pool_destroy(info->gpool);
|
||||
iounmap(info->sram_virt);
|
||||
kfree(info->pool_name);
|
||||
kfree(info);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -263,9 +263,9 @@ static int __init omapdss_init_of(void)
|
|||
}
|
||||
|
||||
r = of_platform_populate(node, NULL, NULL, &pdev->dev);
|
||||
put_device(&pdev->dev);
|
||||
if (r) {
|
||||
pr_err("Unable to populate DSS submodule devices\n");
|
||||
put_device(&pdev->dev);
|
||||
return r;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -782,8 +782,10 @@ static int __init _init_clkctrl_providers(void)
|
|||
|
||||
for_each_matching_node(np, ti_clkctrl_match_table) {
|
||||
ret = _setup_clkctrl_provider(np);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
of_node_put(np);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -237,11 +237,11 @@ static int __init jive_mtdset(char *options)
|
|||
unsigned long set;
|
||||
|
||||
if (options == NULL || options[0] == '\0')
|
||||
return 0;
|
||||
return 1;
|
||||
|
||||
if (kstrtoul(options, 10, &set)) {
|
||||
printk(KERN_ERR "failed to parse mtdset=%s\n", options);
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
switch (set) {
|
||||
|
|
@ -256,7 +256,7 @@ static int __init jive_mtdset(char *options)
|
|||
"using default.", set);
|
||||
}
|
||||
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* parse the mtdset= option given to the kernel command line */
|
||||
|
|
|
|||
|
|
@ -580,7 +580,7 @@ static int __init ve_spc_clk_init(void)
|
|||
}
|
||||
|
||||
cluster = topology_physical_package_id(cpu_dev->id);
|
||||
if (init_opp_table[cluster])
|
||||
if (cluster < 0 || init_opp_table[cluster])
|
||||
continue;
|
||||
|
||||
if (ve_init_opp_table(cpu_dev))
|
||||
|
|
|
|||
|
|
@ -229,12 +229,14 @@ early_param("ecc", early_ecc);
|
|||
static int __init early_cachepolicy(char *p)
|
||||
{
|
||||
pr_warn("cachepolicy kernel parameter not supported without cp15\n");
|
||||
return 0;
|
||||
}
|
||||
early_param("cachepolicy", early_cachepolicy);
|
||||
|
||||
static int __init noalign_setup(char *__unused)
|
||||
{
|
||||
pr_warn("noalign kernel parameter not supported without cp15\n");
|
||||
return 1;
|
||||
}
|
||||
__setup("noalign", noalign_setup);
|
||||
|
||||
|
|
|
|||
|
|
@ -76,6 +76,12 @@
|
|||
no-map;
|
||||
};
|
||||
|
||||
/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
|
||||
secmon_reserved_bl32: secmon@5300000 {
|
||||
reg = <0x0 0x05300000 0x0 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
|
|
|
|||
|
|
@ -157,14 +157,6 @@
|
|||
regulator-always-on;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
/* TEE Reserved Memory */
|
||||
bl32_reserved: bl32@5000000 {
|
||||
reg = <0x0 0x05300000 0x0 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
|
||||
|
|
|
|||
|
|
@ -41,6 +41,12 @@
|
|||
no-map;
|
||||
};
|
||||
|
||||
/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
|
||||
secmon_reserved_bl32: secmon@5300000 {
|
||||
reg = <0x0 0x05300000 0x0 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
|
|
|
|||
|
|
@ -164,14 +164,6 @@
|
|||
regulator-always-on;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
/* TEE Reserved Memory */
|
||||
bl32_reserved: bl32@5000000 {
|
||||
reg = <0x0 0x05300000 0x0 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
|
||||
|
|
|
|||
|
|
@ -111,8 +111,8 @@
|
|||
compatible = "silabs,si3226x";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <5000000>;
|
||||
spi-cpha = <1>;
|
||||
spi-cpol = <1>;
|
||||
spi-cpha;
|
||||
spi-cpol;
|
||||
pl022,hierarchy = <0>;
|
||||
pl022,interface = <0>;
|
||||
pl022,slave-tx-disable = <0>;
|
||||
|
|
@ -135,8 +135,8 @@
|
|||
at25,byte-len = <0x8000>;
|
||||
at25,addr-mode = <2>;
|
||||
at25,page-size = <64>;
|
||||
spi-cpha = <1>;
|
||||
spi-cpol = <1>;
|
||||
spi-cpha;
|
||||
spi-cpol;
|
||||
pl022,hierarchy = <0>;
|
||||
pl022,interface = <0>;
|
||||
pl022,slave-tx-disable = <0>;
|
||||
|
|
|
|||
|
|
@ -687,7 +687,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
sata: ahci@663f2000 {
|
||||
sata: sata@663f2000 {
|
||||
compatible = "brcm,iproc-ahci", "generic-ahci";
|
||||
reg = <0x663f2000 0x1000>;
|
||||
dma-coherent;
|
||||
|
|
|
|||
|
|
@ -369,7 +369,7 @@
|
|||
};
|
||||
|
||||
usb0: usb@ffb00000 {
|
||||
compatible = "snps,dwc2";
|
||||
compatible = "intel,socfpga-agilex-hsotg", "snps,dwc2";
|
||||
reg = <0xffb00000 0x40000>;
|
||||
interrupts = <0 93 4>;
|
||||
phys = <&usbphy0>;
|
||||
|
|
@ -381,7 +381,7 @@
|
|||
};
|
||||
|
||||
usb1: usb@ffb40000 {
|
||||
compatible = "snps,dwc2";
|
||||
compatible = "intel,socfpga-agilex-hsotg", "snps,dwc2";
|
||||
reg = <0xffb40000 0x40000>;
|
||||
interrupts = <0 94 4>;
|
||||
phys = <&usbphy0>;
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
|
||||
aliases {
|
||||
spi0 = &spi0;
|
||||
ethernet0 = ð0;
|
||||
ethernet1 = ð1;
|
||||
};
|
||||
|
||||
|
|
@ -137,7 +138,9 @@
|
|||
/*
|
||||
* U-Boot port for Turris Mox has a bug which always expects that "ranges" DT property
|
||||
* contains exactly 2 ranges with 3 (child) address cells, 2 (parent) address cells and
|
||||
* 2 size cells and also expects that the second range starts at 16 MB offset. If these
|
||||
* 2 size cells and also expects that the second range starts at 16 MB offset. Also it
|
||||
* expects that first range uses same address for PCI (child) and CPU (parent) cells (so
|
||||
* no remapping) and that this address is the lowest from all specified ranges. If these
|
||||
* conditions are not met then U-Boot crashes during loading kernel DTB file. PCIe address
|
||||
* space is 128 MB long, so the best split between MEM and IO is to use fixed 16 MB window
|
||||
* for IO and the rest 112 MB (64+32+16) for MEM, despite that maximal IO size is just 64 kB.
|
||||
|
|
@ -146,6 +149,9 @@
|
|||
* https://source.denx.de/u-boot/u-boot/-/commit/cb2ddb291ee6fcbddd6d8f4ff49089dfe580f5d7
|
||||
* https://source.denx.de/u-boot/u-boot/-/commit/c64ac3b3185aeb3846297ad7391fc6df8ecd73bf
|
||||
* https://source.denx.de/u-boot/u-boot/-/commit/4a82fca8e330157081fc132a591ebd99ba02ee33
|
||||
* Bug related to requirement of same child and parent addresses for first range is fixed
|
||||
* in U-Boot version 2022.04 by following commit:
|
||||
* https://source.denx.de/u-boot/u-boot/-/commit/1fd54253bca7d43d046bba4853fe5fafd034bc17
|
||||
*/
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
|
|
|||
|
|
@ -495,7 +495,7 @@
|
|||
* (totaling 127 MiB) for MEM.
|
||||
*/
|
||||
ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x07f00000 /* Port 0 MEM */
|
||||
0x81000000 0 0xefff0000 0 0xefff0000 0 0x00010000>; /* Port 0 IO */
|
||||
0x81000000 0 0x00000000 0 0xefff0000 0 0x00010000>; /* Port 0 IO */
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc 0>,
|
||||
<0 0 0 2 &pcie_intc 1>,
|
||||
|
|
|
|||
|
|
@ -459,9 +459,9 @@
|
|||
qcom,tcs-offset = <0xd00>;
|
||||
qcom,drv-id = <2>;
|
||||
qcom,tcs-config = <ACTIVE_TCS 2>,
|
||||
<SLEEP_TCS 1>,
|
||||
<WAKE_TCS 1>,
|
||||
<CONTROL_TCS 0>;
|
||||
<SLEEP_TCS 3>,
|
||||
<WAKE_TCS 3>,
|
||||
<CONTROL_TCS 1>;
|
||||
|
||||
rpmhcc: clock-controller {
|
||||
compatible = "qcom,sm8150-rpmh-clk";
|
||||
|
|
|
|||
|
|
@ -666,8 +666,8 @@
|
|||
sd-uhs-sdr104;
|
||||
|
||||
/* Power supply */
|
||||
vqmmc-supply = &vcc1v8_s3; /* IO line */
|
||||
vmmc-supply = &vcc_sdio; /* card's power */
|
||||
vqmmc-supply = <&vcc1v8_s3>; /* IO line */
|
||||
vmmc-supply = <&vcc_sdio>; /* card's power */
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -281,7 +281,7 @@
|
|||
|
||||
sound: sound {
|
||||
compatible = "rockchip,rk3399-gru-sound";
|
||||
rockchip,cpu = <&i2s0 &i2s2>;
|
||||
rockchip,cpu = <&i2s0 &spdif>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -432,10 +432,6 @@ ap_i2c_audio: &i2c8 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&io_domains {
|
||||
status = "okay";
|
||||
|
||||
|
|
@ -532,6 +528,17 @@ ap_i2c_audio: &i2c8 {
|
|||
vqmmc-supply = <&ppvar_sd_card_io>;
|
||||
};
|
||||
|
||||
&spdif {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* SPDIF is routed internally to DP; we either don't use these pins, or
|
||||
* mux them to something else.
|
||||
*/
|
||||
/delete-property/ pinctrl-0;
|
||||
/delete-property/ pinctrl-names;
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
|
||||
|
|
|
|||
|
|
@ -467,6 +467,12 @@
|
|||
};
|
||||
|
||||
&sdhci {
|
||||
/*
|
||||
* Signal integrity isn't great at 200MHz but 100MHz has proven stable
|
||||
* enough.
|
||||
*/
|
||||
max-frequency = <100000000>;
|
||||
|
||||
bus-width = <8>;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
|
|
|
|||
|
|
@ -1746,10 +1746,10 @@
|
|||
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&cru PCLK_HDMI_CTRL>,
|
||||
<&cru SCLK_HDMI_SFR>,
|
||||
<&cru PLL_VPLL>,
|
||||
<&cru SCLK_HDMI_CEC>,
|
||||
<&cru PCLK_VIO_GRF>,
|
||||
<&cru SCLK_HDMI_CEC>;
|
||||
clock-names = "iahb", "isfr", "vpll", "grf", "cec";
|
||||
<&cru PLL_VPLL>;
|
||||
clock-names = "iahb", "isfr", "cec", "grf", "vpll";
|
||||
power-domains = <&power RK3399_PD_HDCP>;
|
||||
reg-io-width = <4>;
|
||||
rockchip,grf = <&grf>;
|
||||
|
|
|
|||
|
|
@ -58,7 +58,7 @@
|
|||
#define ARM64_HAS_AMU_EXTN 48
|
||||
#define ARM64_SPECTRE_BHB 49
|
||||
|
||||
/* kabi: reserve 48 - 62 for future cpu capabilities */
|
||||
/* kabi: reserve 50 - 62 for future cpu capabilities */
|
||||
#define ARM64_NCAPS 62
|
||||
|
||||
#endif /* __ASM_CPUCAPS_H */
|
||||
|
|
|
|||
|
|
@ -479,7 +479,8 @@ static inline void *kvm_get_hyp_vector(void)
|
|||
int slot = -1;
|
||||
|
||||
if ((cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR) ||
|
||||
cpus_have_const_cap(ARM64_SPECTRE_BHB)) && data->template_start) {
|
||||
cpus_have_const_cap(ARM64_SPECTRE_BHB)) &&
|
||||
data && data->template_start) {
|
||||
vect = kern_hyp_va(kvm_ksym_ref(__bp_harden_hyp_vecs_start));
|
||||
slot = data->hyp_vectors_slot;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,14 +56,14 @@ enum arm64_bp_harden_el1_vectors {
|
|||
DECLARE_PER_CPU_READ_MOSTLY(const char *, this_cpu_vector);
|
||||
|
||||
#ifndef CONFIG_UNMAP_KERNEL_AT_EL0
|
||||
#define TRAMP_VALIAS 0
|
||||
#define TRAMP_VALIAS 0ul
|
||||
#endif
|
||||
|
||||
static inline const char *
|
||||
arm64_get_bp_hardening_vector(enum arm64_bp_harden_el1_vectors slot)
|
||||
{
|
||||
if (arm64_kernel_unmapped_at_el0())
|
||||
return (char *)TRAMP_VALIAS + SZ_2K * slot;
|
||||
return (char *)(TRAMP_VALIAS + SZ_2K * slot);
|
||||
|
||||
WARN_ON_ONCE(slot == EL1_VECTOR_KPTI);
|
||||
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ bool alternative_is_applied(u16 cpufeature)
|
|||
/*
|
||||
* Check if the target PC is within an alternative block.
|
||||
*/
|
||||
static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc)
|
||||
static __always_inline bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc)
|
||||
{
|
||||
unsigned long replptr = (unsigned long)ALT_REPL_PTR(alt);
|
||||
return !(pc >= replptr && pc <= (replptr + alt->alt_len));
|
||||
|
|
@ -49,7 +49,7 @@ static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc)
|
|||
|
||||
#define align_down(x, a) ((unsigned long)(x) & ~(((unsigned long)(a)) - 1))
|
||||
|
||||
static u32 get_alt_insn(struct alt_instr *alt, __le32 *insnptr, __le32 *altinsnptr)
|
||||
static __always_inline u32 get_alt_insn(struct alt_instr *alt, __le32 *insnptr, __le32 *altinsnptr)
|
||||
{
|
||||
u32 insn;
|
||||
|
||||
|
|
@ -94,7 +94,7 @@ static u32 get_alt_insn(struct alt_instr *alt, __le32 *insnptr, __le32 *altinsnp
|
|||
return insn;
|
||||
}
|
||||
|
||||
static void patch_alternative(struct alt_instr *alt,
|
||||
static noinstr void patch_alternative(struct alt_instr *alt,
|
||||
__le32 *origptr, __le32 *updptr, int nr_inst)
|
||||
{
|
||||
__le32 *replptr;
|
||||
|
|
|
|||
|
|
@ -53,6 +53,9 @@ static int psci_acpi_cpu_init_idle(unsigned int cpu)
|
|||
struct acpi_lpi_state *lpi;
|
||||
struct acpi_processor *pr = per_cpu(processors, cpu);
|
||||
|
||||
if (unlikely(!pr || !pr->flags.has_lpi))
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* If the PSCI cpu_suspend function hook has not been initialized
|
||||
* idle states must not be enabled, so bail out
|
||||
|
|
@ -60,9 +63,6 @@ static int psci_acpi_cpu_init_idle(unsigned int cpu)
|
|||
if (!psci_ops.cpu_suspend)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (unlikely(!pr || !pr->flags.has_lpi))
|
||||
return -EINVAL;
|
||||
|
||||
count = pr->power.count - 1;
|
||||
if (count <= 0)
|
||||
return -ENODEV;
|
||||
|
|
|
|||
|
|
@ -73,9 +73,21 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
|
|||
|
||||
if (offset < -SZ_128M || offset >= SZ_128M) {
|
||||
#ifdef CONFIG_ARM64_MODULE_PLTS
|
||||
struct plt_entry trampoline, *dst;
|
||||
struct module *mod;
|
||||
|
||||
/*
|
||||
* There is only one ftrace trampoline per module. For now,
|
||||
* this is not a problem since on arm64, all dynamic ftrace
|
||||
* invocations are routed via ftrace_caller(). This will need
|
||||
* to be revisited if support for multiple ftrace entry points
|
||||
* is added in the future, but for now, the pr_err() below
|
||||
* deals with a theoretical issue only.
|
||||
*/
|
||||
if (addr != FTRACE_ADDR) {
|
||||
pr_err("ftrace: far branches to multiple entry points unsupported inside a single module\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* On kernels that support module PLTs, the offset between the
|
||||
* branch instruction and its target may legally exceed the
|
||||
|
|
@ -93,46 +105,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
|
|||
if (WARN_ON(!mod))
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* There is only one ftrace trampoline per module. For now,
|
||||
* this is not a problem since on arm64, all dynamic ftrace
|
||||
* invocations are routed via ftrace_caller(). This will need
|
||||
* to be revisited if support for multiple ftrace entry points
|
||||
* is added in the future, but for now, the pr_err() below
|
||||
* deals with a theoretical issue only.
|
||||
*
|
||||
* Note that PLTs are place relative, and plt_entries_equal()
|
||||
* checks whether they point to the same target. Here, we need
|
||||
* to check if the actual opcodes are in fact identical,
|
||||
* regardless of the offset in memory so use memcmp() instead.
|
||||
*/
|
||||
dst = mod->arch.ftrace_trampoline;
|
||||
trampoline = get_plt_entry(addr, dst);
|
||||
if (memcmp(dst, &trampoline, sizeof(trampoline))) {
|
||||
if (plt_entry_is_initialized(dst)) {
|
||||
pr_err("ftrace: far branches to multiple entry points unsupported inside a single module\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* point the trampoline to our ftrace entry point */
|
||||
module_disable_ro(mod);
|
||||
*dst = trampoline;
|
||||
module_enable_ro(mod, true);
|
||||
|
||||
/*
|
||||
* Ensure updated trampoline is visible to instruction
|
||||
* fetch before we patch in the branch. Although the
|
||||
* architecture doesn't require an IPI in this case,
|
||||
* Neoverse-N1 erratum #1542419 does require one
|
||||
* if the TLB maintenance in module_enable_ro() is
|
||||
* skipped due to rodata_enabled. It doesn't seem worth
|
||||
* it to make it conditional given that this is
|
||||
* certainly not a fast-path.
|
||||
*/
|
||||
flush_icache_range((unsigned long)&dst[0],
|
||||
(unsigned long)&dst[1]);
|
||||
}
|
||||
addr = (unsigned long)dst;
|
||||
addr = (unsigned long)mod->arch.ftrace_trampoline;
|
||||
#else /* CONFIG_ARM64_MODULE_PLTS */
|
||||
return -EINVAL;
|
||||
#endif /* CONFIG_ARM64_MODULE_PLTS */
|
||||
|
|
|
|||
|
|
@ -207,8 +207,8 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
|
|||
int i, ret = 0;
|
||||
struct aarch64_insn_patch *pp = arg;
|
||||
|
||||
/* The first CPU becomes master */
|
||||
if (atomic_inc_return(&pp->cpu_count) == 1) {
|
||||
/* The last CPU becomes master */
|
||||
if (atomic_inc_return(&pp->cpu_count) == num_online_cpus()) {
|
||||
for (i = 0; ret == 0 && i < pp->insn_cnt; i++)
|
||||
ret = aarch64_insn_patch_text_nosync(pp->text_addrs[i],
|
||||
pp->new_insns[i]);
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@
|
|||
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/elf.h>
|
||||
#include <linux/ftrace.h>
|
||||
#include <linux/gfp.h>
|
||||
#include <linux/kasan.h>
|
||||
#include <linux/kernel.h>
|
||||
|
|
@ -470,22 +471,48 @@ overflow:
|
|||
return -ENOEXEC;
|
||||
}
|
||||
|
||||
int module_finalize(const Elf_Ehdr *hdr,
|
||||
const Elf_Shdr *sechdrs,
|
||||
struct module *me)
|
||||
static const Elf_Shdr *find_section(const Elf_Ehdr *hdr,
|
||||
const Elf_Shdr *sechdrs,
|
||||
const char *name)
|
||||
{
|
||||
const Elf_Shdr *s, *se;
|
||||
const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
|
||||
|
||||
for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++) {
|
||||
if (strcmp(".altinstructions", secstrs + s->sh_name) == 0)
|
||||
apply_alternatives_module((void *)s->sh_addr, s->sh_size);
|
||||
#ifdef CONFIG_ARM64_MODULE_PLTS
|
||||
if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE) &&
|
||||
!strcmp(".text.ftrace_trampoline", secstrs + s->sh_name))
|
||||
me->arch.ftrace_trampoline = (void *)s->sh_addr;
|
||||
#endif
|
||||
if (strcmp(name, secstrs + s->sh_name) == 0)
|
||||
return s;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int module_init_ftrace_plt(const Elf_Ehdr *hdr,
|
||||
const Elf_Shdr *sechdrs,
|
||||
struct module *mod)
|
||||
{
|
||||
#if defined(CONFIG_ARM64_MODULE_PLTS) && defined(CONFIG_DYNAMIC_FTRACE)
|
||||
const Elf_Shdr *s;
|
||||
struct plt_entry *plt;
|
||||
|
||||
s = find_section(hdr, sechdrs, ".text.ftrace_trampoline");
|
||||
if (!s)
|
||||
return -ENOEXEC;
|
||||
|
||||
plt = (void *)s->sh_addr;
|
||||
*plt = get_plt_entry(FTRACE_ADDR, plt);
|
||||
mod->arch.ftrace_trampoline = plt;
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
int module_finalize(const Elf_Ehdr *hdr,
|
||||
const Elf_Shdr *sechdrs,
|
||||
struct module *me)
|
||||
{
|
||||
const Elf_Shdr *s;
|
||||
s = find_section(hdr, sechdrs, ".altinstructions");
|
||||
if (s)
|
||||
apply_alternatives_module((void *)s->sh_addr, s->sh_size);
|
||||
|
||||
return module_init_ftrace_plt(hdr, sechdrs, me);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
SECTIONS {
|
||||
.plt 0 (NOLOAD) : { BYTE(0) }
|
||||
.init.plt 0 (NOLOAD) : { BYTE(0) }
|
||||
.text.ftrace_trampoline 0 (NOLOAD) : { BYTE(0) }
|
||||
.plt 0 : { BYTE(0) }
|
||||
.init.plt 0 : { BYTE(0) }
|
||||
.text.ftrace_trampoline 0 : { BYTE(0) }
|
||||
}
|
||||
|
|
|
|||
|
|
@ -909,15 +909,18 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
|||
goto out_off;
|
||||
}
|
||||
|
||||
/* 1. Initial fake pass to compute ctx->idx. */
|
||||
|
||||
/* Fake pass to fill in ctx->offset. */
|
||||
if (build_body(&ctx, extra_pass)) {
|
||||
/*
|
||||
* 1. Initial fake pass to compute ctx->idx and ctx->offset.
|
||||
*
|
||||
* BPF line info needs ctx->offset[i] to be the offset of
|
||||
* instruction[i] in jited image, so build prologue first.
|
||||
*/
|
||||
if (build_prologue(&ctx, was_classic)) {
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
}
|
||||
|
||||
if (build_prologue(&ctx, was_classic)) {
|
||||
if (build_body(&ctx, extra_pass)) {
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
}
|
||||
|
|
@ -983,6 +986,11 @@ skip_init_ctx:
|
|||
prog->jited_len = image_size;
|
||||
|
||||
if (!prog->is_func || extra_pass) {
|
||||
int i;
|
||||
|
||||
/* offset[prog->len] is the size of program */
|
||||
for (i = 0; i <= prog->len; i++)
|
||||
ctx.offset[i] *= AARCH64_INSN_SIZE;
|
||||
bpf_prog_fill_jited_linfo(prog, ctx.offset + 1);
|
||||
out_off:
|
||||
kfree(ctx.offset);
|
||||
|
|
|
|||
|
|
@ -448,7 +448,8 @@ void __init acpi_numa_fixup(void)
|
|||
if (srat_num_cpus == 0) {
|
||||
node_set_online(0);
|
||||
node_cpuid[0].phys_id = hard_smp_processor_id();
|
||||
return;
|
||||
slit_distance(0, 0) = LOCAL_DISTANCE;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -491,7 +492,7 @@ void __init acpi_numa_fixup(void)
|
|||
for (j = 0; j < MAX_NUMNODES; j++)
|
||||
slit_distance(i, j) = i == j ?
|
||||
LOCAL_DISTANCE : REMOTE_DISTANCE;
|
||||
return;
|
||||
goto out;
|
||||
}
|
||||
|
||||
memset(numa_slit, -1, sizeof(numa_slit));
|
||||
|
|
@ -516,6 +517,8 @@ void __init acpi_numa_fixup(void)
|
|||
printk("\n");
|
||||
}
|
||||
#endif
|
||||
out:
|
||||
node_possible_map = node_online_map;
|
||||
}
|
||||
#endif /* CONFIG_ACPI_NUMA */
|
||||
|
||||
|
|
|
|||
|
|
@ -171,27 +171,27 @@ extern long __user_bad(void);
|
|||
|
||||
#define __get_user(x, ptr) \
|
||||
({ \
|
||||
unsigned long __gu_val = 0; \
|
||||
long __gu_err; \
|
||||
switch (sizeof(*(ptr))) { \
|
||||
case 1: \
|
||||
__get_user_asm("lbu", (ptr), __gu_val, __gu_err); \
|
||||
__get_user_asm("lbu", (ptr), x, __gu_err); \
|
||||
break; \
|
||||
case 2: \
|
||||
__get_user_asm("lhu", (ptr), __gu_val, __gu_err); \
|
||||
__get_user_asm("lhu", (ptr), x, __gu_err); \
|
||||
break; \
|
||||
case 4: \
|
||||
__get_user_asm("lw", (ptr), __gu_val, __gu_err); \
|
||||
__get_user_asm("lw", (ptr), x, __gu_err); \
|
||||
break; \
|
||||
case 8: \
|
||||
__gu_err = __copy_from_user(&__gu_val, ptr, 8); \
|
||||
if (__gu_err) \
|
||||
__gu_err = -EFAULT; \
|
||||
case 8: { \
|
||||
__u64 __x = 0; \
|
||||
__gu_err = raw_copy_from_user(&__x, ptr, 8) ? \
|
||||
-EFAULT : 0; \
|
||||
(x) = (typeof(x))(typeof((x) - (x)))__x; \
|
||||
break; \
|
||||
} \
|
||||
default: \
|
||||
/* __gu_val = 0; __gu_err = -EINVAL;*/ __gu_err = __user_bad();\
|
||||
} \
|
||||
x = (__force __typeof__(*(ptr))) __gu_val; \
|
||||
__gu_err; \
|
||||
})
|
||||
|
||||
|
|
|
|||
|
|
@ -131,7 +131,7 @@
|
|||
*/
|
||||
mfc0 t0,CP0_CAUSE # get pending interrupts
|
||||
mfc0 t1,CP0_STATUS
|
||||
#ifdef CONFIG_32BIT
|
||||
#if defined(CONFIG_32BIT) && defined(CONFIG_MIPS_FP_SUPPORT)
|
||||
lw t2,cpu_fpu_mask
|
||||
#endif
|
||||
andi t0,ST0_IM # CAUSE.CE may be non-zero!
|
||||
|
|
@ -139,7 +139,7 @@
|
|||
|
||||
beqz t0,spurious
|
||||
|
||||
#ifdef CONFIG_32BIT
|
||||
#if defined(CONFIG_32BIT) && defined(CONFIG_MIPS_FP_SUPPORT)
|
||||
and t2,t0
|
||||
bnez t2,fpu # handle FPU immediately
|
||||
#endif
|
||||
|
|
@ -280,7 +280,7 @@ handle_it:
|
|||
j dec_irq_dispatch
|
||||
nop
|
||||
|
||||
#ifdef CONFIG_32BIT
|
||||
#if defined(CONFIG_32BIT) && defined(CONFIG_MIPS_FP_SUPPORT)
|
||||
fpu:
|
||||
lw t0,fpu_kstat_irq
|
||||
nop
|
||||
|
|
|
|||
|
|
@ -6,4 +6,4 @@
|
|||
|
||||
lib-y += init.o memory.o cmdline.o identify.o console.o
|
||||
|
||||
lib-$(CONFIG_32BIT) += locore.o
|
||||
lib-$(CONFIG_CPU_R3000) += locore.o
|
||||
|
|
|
|||
|
|
@ -766,7 +766,8 @@ void __init arch_init_irq(void)
|
|||
dec_interrupt[DEC_IRQ_HALT] = -1;
|
||||
|
||||
/* Register board interrupts: FPU and cascade. */
|
||||
if (dec_interrupt[DEC_IRQ_FPU] >= 0 && cpu_has_fpu) {
|
||||
if (IS_ENABLED(CONFIG_MIPS_FP_SUPPORT) &&
|
||||
dec_interrupt[DEC_IRQ_FPU] >= 0 && cpu_has_fpu) {
|
||||
struct irq_desc *desc_fpu;
|
||||
int irq_fpu;
|
||||
|
||||
|
|
|
|||
|
|
@ -43,16 +43,11 @@
|
|||
*/
|
||||
#define REX_PROM_MAGIC 0x30464354
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
|
||||
#define prom_is_rex(magic) 1 /* KN04 and KN05 are REX PROMs. */
|
||||
|
||||
#else /* !CONFIG_64BIT */
|
||||
|
||||
#define prom_is_rex(magic) ((magic) == REX_PROM_MAGIC)
|
||||
|
||||
#endif /* !CONFIG_64BIT */
|
||||
|
||||
/* KN04 and KN05 are REX PROMs, so only do the check for R3k systems. */
|
||||
static inline bool prom_is_rex(u32 magic)
|
||||
{
|
||||
return !IS_ENABLED(CONFIG_CPU_R3000) || magic == REX_PROM_MAGIC;
|
||||
}
|
||||
|
||||
/*
|
||||
* 3MIN/MAXINE PROM entry points for DS5000/1xx's, DS5000/xx's and
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@ static inline void setup_8250_early_printk_port(unsigned long base,
|
|||
unsigned int reg_shift, unsigned int timeout) {}
|
||||
#endif
|
||||
|
||||
extern void set_handler(unsigned long offset, void *addr, unsigned long len);
|
||||
void set_handler(unsigned long offset, const void *addr, unsigned long len);
|
||||
extern void set_uncached_handler(unsigned long offset, void *addr, unsigned long len);
|
||||
|
||||
typedef void (*vi_handler_t)(void);
|
||||
|
|
|
|||
|
|
@ -361,6 +361,9 @@ asmlinkage void start_secondary(void)
|
|||
cpu = smp_processor_id();
|
||||
cpu_data[cpu].udelay_val = loops_per_jiffy;
|
||||
|
||||
set_cpu_sibling_map(cpu);
|
||||
set_cpu_core_map(cpu);
|
||||
|
||||
cpumask_set_cpu(cpu, &cpu_coherent_mask);
|
||||
notify_cpu_starting(cpu);
|
||||
|
||||
|
|
@ -372,9 +375,6 @@ asmlinkage void start_secondary(void)
|
|||
/* The CPU is running and counters synchronised, now mark it online */
|
||||
set_cpu_online(cpu, true);
|
||||
|
||||
set_cpu_sibling_map(cpu);
|
||||
set_cpu_core_map(cpu);
|
||||
|
||||
calculate_cpu_foreign_map();
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -2020,19 +2020,19 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
|
|||
* If no shadow set is selected then use the default handler
|
||||
* that does normal register saving and standard interrupt exit
|
||||
*/
|
||||
extern char except_vec_vi, except_vec_vi_lui;
|
||||
extern char except_vec_vi_ori, except_vec_vi_end;
|
||||
extern char rollback_except_vec_vi;
|
||||
char *vec_start = using_rollback_handler() ?
|
||||
&rollback_except_vec_vi : &except_vec_vi;
|
||||
extern const u8 except_vec_vi[], except_vec_vi_lui[];
|
||||
extern const u8 except_vec_vi_ori[], except_vec_vi_end[];
|
||||
extern const u8 rollback_except_vec_vi[];
|
||||
const u8 *vec_start = using_rollback_handler() ?
|
||||
rollback_except_vec_vi : except_vec_vi;
|
||||
#if defined(CONFIG_CPU_MICROMIPS) || defined(CONFIG_CPU_BIG_ENDIAN)
|
||||
const int lui_offset = &except_vec_vi_lui - vec_start + 2;
|
||||
const int ori_offset = &except_vec_vi_ori - vec_start + 2;
|
||||
const int lui_offset = except_vec_vi_lui - vec_start + 2;
|
||||
const int ori_offset = except_vec_vi_ori - vec_start + 2;
|
||||
#else
|
||||
const int lui_offset = &except_vec_vi_lui - vec_start;
|
||||
const int ori_offset = &except_vec_vi_ori - vec_start;
|
||||
const int lui_offset = except_vec_vi_lui - vec_start;
|
||||
const int ori_offset = except_vec_vi_ori - vec_start;
|
||||
#endif
|
||||
const int handler_len = &except_vec_vi_end - vec_start;
|
||||
const int handler_len = except_vec_vi_end - vec_start;
|
||||
|
||||
if (handler_len > VECTORSPACING) {
|
||||
/*
|
||||
|
|
@ -2240,7 +2240,7 @@ void per_cpu_trap_init(bool is_boot_cpu)
|
|||
}
|
||||
|
||||
/* Install CPU exception handler */
|
||||
void set_handler(unsigned long offset, void *addr, unsigned long size)
|
||||
void set_handler(unsigned long offset, const void *addr, unsigned long size)
|
||||
{
|
||||
#ifdef CONFIG_CPU_MICROMIPS
|
||||
memcpy((void *)(ebase + offset), ((unsigned char *)addr - 1), size);
|
||||
|
|
|
|||
|
|
@ -61,6 +61,7 @@ static int __init ill_acc_of_setup(void)
|
|||
pdev = of_find_device_by_node(np);
|
||||
if (!pdev) {
|
||||
pr_err("%pOFn: failed to lookup pdev\n", np);
|
||||
of_node_put(np);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -310,11 +310,9 @@ static int __init plat_setup_devices(void)
|
|||
static int __init setup_kmac(char *s)
|
||||
{
|
||||
printk(KERN_INFO "korina mac = %s\n", s);
|
||||
if (!mac_pton(s, korina_dev0_data.mac)) {
|
||||
if (!mac_pton(s, korina_dev0_data.mac))
|
||||
printk(KERN_ERR "Invalid mac\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
__setup("kmac=", setup_kmac);
|
||||
|
|
|
|||
|
|
@ -71,9 +71,7 @@ static inline void set_fs(mm_segment_t fs)
|
|||
* versions are void (ie, don't return a value as such).
|
||||
*/
|
||||
|
||||
#define get_user __get_user \
|
||||
|
||||
#define __get_user(x, ptr) \
|
||||
#define get_user(x, ptr) \
|
||||
({ \
|
||||
long __gu_err = 0; \
|
||||
__get_user_check((x), (ptr), __gu_err); \
|
||||
|
|
@ -86,6 +84,14 @@ static inline void set_fs(mm_segment_t fs)
|
|||
(void)0; \
|
||||
})
|
||||
|
||||
#define __get_user(x, ptr) \
|
||||
({ \
|
||||
long __gu_err = 0; \
|
||||
const __typeof__(*(ptr)) __user *__p = (ptr); \
|
||||
__get_user_err((x), __p, (__gu_err)); \
|
||||
__gu_err; \
|
||||
})
|
||||
|
||||
#define __get_user_check(x, ptr, err) \
|
||||
({ \
|
||||
const __typeof__(*(ptr)) __user *__p = (ptr); \
|
||||
|
|
@ -166,12 +172,18 @@ do { \
|
|||
: "r"(addr), "i"(-EFAULT) \
|
||||
: "cc")
|
||||
|
||||
#define put_user __put_user \
|
||||
#define put_user(x, ptr) \
|
||||
({ \
|
||||
long __pu_err = 0; \
|
||||
__put_user_check((x), (ptr), __pu_err); \
|
||||
__pu_err; \
|
||||
})
|
||||
|
||||
#define __put_user(x, ptr) \
|
||||
({ \
|
||||
long __pu_err = 0; \
|
||||
__put_user_err((x), (ptr), __pu_err); \
|
||||
__typeof__(*(ptr)) __user *__p = (ptr); \
|
||||
__put_user_err((x), __p, __pu_err); \
|
||||
__pu_err; \
|
||||
})
|
||||
|
||||
|
|
|
|||
|
|
@ -89,6 +89,7 @@ extern __must_check long strnlen_user(const char __user *s, long n);
|
|||
/* Optimized macros */
|
||||
#define __get_user_asm(val, insn, addr, err) \
|
||||
{ \
|
||||
unsigned long __gu_val; \
|
||||
__asm__ __volatile__( \
|
||||
" movi %0, %3\n" \
|
||||
"1: " insn " %1, 0(%2)\n" \
|
||||
|
|
@ -97,14 +98,20 @@ extern __must_check long strnlen_user(const char __user *s, long n);
|
|||
" .section __ex_table,\"a\"\n" \
|
||||
" .word 1b, 2b\n" \
|
||||
" .previous" \
|
||||
: "=&r" (err), "=r" (val) \
|
||||
: "=&r" (err), "=r" (__gu_val) \
|
||||
: "r" (addr), "i" (-EFAULT)); \
|
||||
val = (__force __typeof__(*(addr)))__gu_val; \
|
||||
}
|
||||
|
||||
#define __get_user_unknown(val, size, ptr, err) do { \
|
||||
extern void __get_user_unknown(void);
|
||||
|
||||
#define __get_user_8(val, ptr, err) do { \
|
||||
u64 __val = 0; \
|
||||
err = 0; \
|
||||
if (__copy_from_user(&(val), ptr, size)) { \
|
||||
if (raw_copy_from_user(&(__val), ptr, sizeof(val))) { \
|
||||
err = -EFAULT; \
|
||||
} else { \
|
||||
val = (typeof(val))(typeof((val) - (val)))__val; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
|
|
@ -120,8 +127,11 @@ do { \
|
|||
case 4: \
|
||||
__get_user_asm(val, "ldw", ptr, err); \
|
||||
break; \
|
||||
case 8: \
|
||||
__get_user_8(val, ptr, err); \
|
||||
break; \
|
||||
default: \
|
||||
__get_user_unknown(val, size, ptr, err); \
|
||||
__get_user_unknown(); \
|
||||
break; \
|
||||
} \
|
||||
} while (0)
|
||||
|
|
@ -130,9 +140,7 @@ do { \
|
|||
({ \
|
||||
long __gu_err = -EFAULT; \
|
||||
const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \
|
||||
unsigned long __gu_val = 0; \
|
||||
__get_user_common(__gu_val, sizeof(*(ptr)), __gu_ptr, __gu_err);\
|
||||
(x) = (__force __typeof__(x))__gu_val; \
|
||||
__get_user_common(x, sizeof(*(ptr)), __gu_ptr, __gu_err); \
|
||||
__gu_err; \
|
||||
})
|
||||
|
||||
|
|
@ -140,11 +148,9 @@ do { \
|
|||
({ \
|
||||
long __gu_err = -EFAULT; \
|
||||
const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \
|
||||
unsigned long __gu_val = 0; \
|
||||
if (access_ok( __gu_ptr, sizeof(*__gu_ptr))) \
|
||||
__get_user_common(__gu_val, sizeof(*__gu_ptr), \
|
||||
__get_user_common(x, sizeof(*__gu_ptr), \
|
||||
__gu_ptr, __gu_err); \
|
||||
(x) = (__force __typeof__(x))__gu_val; \
|
||||
__gu_err; \
|
||||
})
|
||||
|
||||
|
|
|
|||
|
|
@ -65,7 +65,6 @@ KBUILD_CFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY=1 \
|
|||
-DFTRACE_PATCHABLE_FUNCTION_SIZE=$(NOP_COUNT)
|
||||
|
||||
CC_FLAGS_FTRACE := -fpatchable-function-entry=$(NOP_COUNT),$(shell echo $$(($(NOP_COUNT)-1)))
|
||||
KBUILD_LDS_MODULE += $(srctree)/arch/parisc/kernel/module.lds
|
||||
endif
|
||||
|
||||
OBJCOPY_FLAGS =-O binary -R .note -R .comment -S
|
||||
|
|
|
|||
|
|
@ -43,6 +43,7 @@
|
|||
#include <linux/elf.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/ftrace.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/bug.h>
|
||||
|
|
@ -862,7 +863,7 @@ int module_finalize(const Elf_Ehdr *hdr,
|
|||
const char *strtab = NULL;
|
||||
const Elf_Shdr *s;
|
||||
char *secstrings;
|
||||
int err, symindex = -1;
|
||||
int symindex = -1;
|
||||
Elf_Sym *newptr, *oldptr;
|
||||
Elf_Shdr *symhdr = NULL;
|
||||
#ifdef DEBUG
|
||||
|
|
@ -946,11 +947,13 @@ int module_finalize(const Elf_Ehdr *hdr,
|
|||
/* patch .altinstructions */
|
||||
apply_alternatives(aseg, aseg + s->sh_size, me->name);
|
||||
|
||||
#ifdef CONFIG_DYNAMIC_FTRACE
|
||||
/* For 32 bit kernels we're compiling modules with
|
||||
* -ffunction-sections so we must relocate the addresses in the
|
||||
*__mcount_loc section.
|
||||
* ftrace callsite section.
|
||||
*/
|
||||
if (symindex != -1 && !strcmp(secname, "__mcount_loc")) {
|
||||
if (symindex != -1 && !strcmp(secname, FTRACE_CALLSITE_SECTION)) {
|
||||
int err;
|
||||
if (s->sh_type == SHT_REL)
|
||||
err = apply_relocate((Elf_Shdr *)sechdrs,
|
||||
strtab, symindex,
|
||||
|
|
@ -962,6 +965,7 @@ int module_finalize(const Elf_Ehdr *hdr,
|
|||
if (err)
|
||||
return err;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,7 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
|
||||
SECTIONS {
|
||||
__mcount_loc : {
|
||||
*(__patchable_function_entries)
|
||||
}
|
||||
}
|
||||
|
|
@ -40,10 +40,7 @@ static void __kprobes *patch_map(void *addr, int fixmap, unsigned long *flags,
|
|||
|
||||
*need_unmap = 1;
|
||||
set_fixmap(fixmap, page_to_phys(page));
|
||||
if (flags)
|
||||
raw_spin_lock_irqsave(&patch_lock, *flags);
|
||||
else
|
||||
__acquire(&patch_lock);
|
||||
raw_spin_lock_irqsave(&patch_lock, *flags);
|
||||
|
||||
return (void *) (__fix_to_virt(fixmap) + (uintaddr & ~PAGE_MASK));
|
||||
}
|
||||
|
|
@ -52,10 +49,7 @@ static void __kprobes patch_unmap(int fixmap, unsigned long *flags)
|
|||
{
|
||||
clear_fixmap(fixmap);
|
||||
|
||||
if (flags)
|
||||
raw_spin_unlock_irqrestore(&patch_lock, *flags);
|
||||
else
|
||||
__release(&patch_lock);
|
||||
raw_spin_unlock_irqrestore(&patch_lock, *flags);
|
||||
}
|
||||
|
||||
void __kprobes __patch_text_multiple(void *addr, u32 *insn, unsigned int len)
|
||||
|
|
@ -67,8 +61,9 @@ void __kprobes __patch_text_multiple(void *addr, u32 *insn, unsigned int len)
|
|||
int mapped;
|
||||
|
||||
/* Make sure we don't have any aliases in cache */
|
||||
flush_kernel_vmap_range(addr, len);
|
||||
flush_icache_range(start, end);
|
||||
flush_kernel_dcache_range_asm(start, end);
|
||||
flush_kernel_icache_range_asm(start, end);
|
||||
flush_tlb_kernel_range(start, end);
|
||||
|
||||
p = fixmap = patch_map(addr, FIX_TEXT_POKE0, &flags, &mapped);
|
||||
|
||||
|
|
@ -81,8 +76,10 @@ void __kprobes __patch_text_multiple(void *addr, u32 *insn, unsigned int len)
|
|||
* We're crossing a page boundary, so
|
||||
* need to remap
|
||||
*/
|
||||
flush_kernel_vmap_range((void *)fixmap,
|
||||
(p-fixmap) * sizeof(*p));
|
||||
flush_kernel_dcache_range_asm((unsigned long)fixmap,
|
||||
(unsigned long)p);
|
||||
flush_tlb_kernel_range((unsigned long)fixmap,
|
||||
(unsigned long)p);
|
||||
if (mapped)
|
||||
patch_unmap(FIX_TEXT_POKE0, &flags);
|
||||
p = fixmap = patch_map(addr, FIX_TEXT_POKE0, &flags,
|
||||
|
|
@ -90,10 +87,10 @@ void __kprobes __patch_text_multiple(void *addr, u32 *insn, unsigned int len)
|
|||
}
|
||||
}
|
||||
|
||||
flush_kernel_vmap_range((void *)fixmap, (p-fixmap) * sizeof(*p));
|
||||
flush_kernel_dcache_range_asm((unsigned long)fixmap, (unsigned long)p);
|
||||
flush_tlb_kernel_range((unsigned long)fixmap, (unsigned long)p);
|
||||
if (mapped)
|
||||
patch_unmap(FIX_TEXT_POKE0, &flags);
|
||||
flush_icache_range(start, end);
|
||||
}
|
||||
|
||||
void __kprobes __patch_text(void *addr, u32 insn)
|
||||
|
|
|
|||
|
|
@ -340,7 +340,7 @@ static int emulate_stw(struct pt_regs *regs, int frreg, int flop)
|
|||
: "r" (val), "r" (regs->ior), "r" (regs->isr)
|
||||
: "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER );
|
||||
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
static int emulate_std(struct pt_regs *regs, int frreg, int flop)
|
||||
{
|
||||
|
|
@ -397,7 +397,7 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop)
|
|||
__asm__ __volatile__ (
|
||||
" mtsp %4, %%sr1\n"
|
||||
" zdep %2, 29, 2, %%r19\n"
|
||||
" dep %%r0, 31, 2, %2\n"
|
||||
" dep %%r0, 31, 2, %3\n"
|
||||
" mtsar %%r19\n"
|
||||
" zvdepi -2, 32, %%r19\n"
|
||||
"1: ldw 0(%%sr1,%3),%%r20\n"
|
||||
|
|
@ -409,7 +409,7 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop)
|
|||
" andcm %%r21, %%r19, %%r21\n"
|
||||
" or %1, %%r20, %1\n"
|
||||
" or %2, %%r21, %2\n"
|
||||
"3: stw %1,0(%%sr1,%1)\n"
|
||||
"3: stw %1,0(%%sr1,%3)\n"
|
||||
"4: stw %%r1,4(%%sr1,%3)\n"
|
||||
"5: stw %2,8(%%sr1,%3)\n"
|
||||
" copy %%r0, %0\n"
|
||||
|
|
@ -596,7 +596,6 @@ void handle_unaligned(struct pt_regs *regs)
|
|||
ret = ERR_NOTHANDLED; /* "undefined", but lets kill them. */
|
||||
break;
|
||||
}
|
||||
#ifdef CONFIG_PA20
|
||||
switch (regs->iir & OPCODE2_MASK)
|
||||
{
|
||||
case OPCODE_FLDD_L:
|
||||
|
|
@ -607,22 +606,23 @@ void handle_unaligned(struct pt_regs *regs)
|
|||
flop=1;
|
||||
ret = emulate_std(regs, R2(regs->iir),1);
|
||||
break;
|
||||
#ifdef CONFIG_PA20
|
||||
case OPCODE_LDD_L:
|
||||
ret = emulate_ldd(regs, R2(regs->iir),0);
|
||||
break;
|
||||
case OPCODE_STD_L:
|
||||
ret = emulate_std(regs, R2(regs->iir),0);
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
switch (regs->iir & OPCODE3_MASK)
|
||||
{
|
||||
case OPCODE_FLDW_L:
|
||||
flop=1;
|
||||
ret = emulate_ldw(regs, R2(regs->iir),0);
|
||||
ret = emulate_ldw(regs, R2(regs->iir), 1);
|
||||
break;
|
||||
case OPCODE_LDW_M:
|
||||
ret = emulate_ldw(regs, R2(regs->iir),1);
|
||||
ret = emulate_ldw(regs, R2(regs->iir), 0);
|
||||
break;
|
||||
|
||||
case OPCODE_FSTW_L:
|
||||
|
|
|
|||
|
|
@ -347,9 +347,9 @@ static void __init setup_bootmem(void)
|
|||
|
||||
static bool kernel_set_to_readonly;
|
||||
|
||||
static void __init map_pages(unsigned long start_vaddr,
|
||||
unsigned long start_paddr, unsigned long size,
|
||||
pgprot_t pgprot, int force)
|
||||
static void __ref map_pages(unsigned long start_vaddr,
|
||||
unsigned long start_paddr, unsigned long size,
|
||||
pgprot_t pgprot, int force)
|
||||
{
|
||||
pgd_t *pg_dir;
|
||||
pmd_t *pmd;
|
||||
|
|
@ -485,7 +485,7 @@ void __init set_kernel_text_rw(int enable_read_write)
|
|||
flush_tlb_all();
|
||||
}
|
||||
|
||||
void __ref free_initmem(void)
|
||||
void free_initmem(void)
|
||||
{
|
||||
unsigned long init_begin = (unsigned long)__init_begin;
|
||||
unsigned long init_end = (unsigned long)__init_end;
|
||||
|
|
@ -499,7 +499,6 @@ void __ref free_initmem(void)
|
|||
/* The init text pages are marked R-X. We have to
|
||||
* flush the icache and mark them RW-
|
||||
*
|
||||
* This is tricky, because map_pages is in the init section.
|
||||
* Do a dummy remap of the data section first (the data
|
||||
* section is already PAGE_KERNEL) to pull in the TLB entries
|
||||
* for map_kernel */
|
||||
|
|
|
|||
|
|
@ -174,7 +174,7 @@ else
|
|||
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,$(call cc-option,-mtune=power5))
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mcpu=power5,-mcpu=power4)
|
||||
endif
|
||||
else
|
||||
else ifdef CONFIG_PPC_BOOK3E_64
|
||||
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
|
||||
endif
|
||||
|
||||
|
|
|
|||
|
|
@ -139,12 +139,12 @@
|
|||
fman@400000 {
|
||||
ethernet@e6000 {
|
||||
phy-handle = <&phy_rgmii_0>;
|
||||
phy-connection-type = "rgmii";
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
ethernet@e8000 {
|
||||
phy-handle = <&phy_rgmii_1>;
|
||||
phy-connection-type = "rgmii";
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio0: mdio@fc000 {
|
||||
|
|
|
|||
|
|
@ -345,25 +345,37 @@ static inline void __raw_writeq_be(unsigned long v, volatile void __iomem *addr)
|
|||
*/
|
||||
static inline void __raw_rm_writeb(u8 val, volatile void __iomem *paddr)
|
||||
{
|
||||
__asm__ __volatile__("stbcix %0,0,%1"
|
||||
__asm__ __volatile__(".machine push; \
|
||||
.machine power6; \
|
||||
stbcix %0,0,%1; \
|
||||
.machine pop;"
|
||||
: : "r" (val), "r" (paddr) : "memory");
|
||||
}
|
||||
|
||||
static inline void __raw_rm_writew(u16 val, volatile void __iomem *paddr)
|
||||
{
|
||||
__asm__ __volatile__("sthcix %0,0,%1"
|
||||
__asm__ __volatile__(".machine push; \
|
||||
.machine power6; \
|
||||
sthcix %0,0,%1; \
|
||||
.machine pop;"
|
||||
: : "r" (val), "r" (paddr) : "memory");
|
||||
}
|
||||
|
||||
static inline void __raw_rm_writel(u32 val, volatile void __iomem *paddr)
|
||||
{
|
||||
__asm__ __volatile__("stwcix %0,0,%1"
|
||||
__asm__ __volatile__(".machine push; \
|
||||
.machine power6; \
|
||||
stwcix %0,0,%1; \
|
||||
.machine pop;"
|
||||
: : "r" (val), "r" (paddr) : "memory");
|
||||
}
|
||||
|
||||
static inline void __raw_rm_writeq(u64 val, volatile void __iomem *paddr)
|
||||
{
|
||||
__asm__ __volatile__("stdcix %0,0,%1"
|
||||
__asm__ __volatile__(".machine push; \
|
||||
.machine power6; \
|
||||
stdcix %0,0,%1; \
|
||||
.machine pop;"
|
||||
: : "r" (val), "r" (paddr) : "memory");
|
||||
}
|
||||
|
||||
|
|
@ -375,7 +387,10 @@ static inline void __raw_rm_writeq_be(u64 val, volatile void __iomem *paddr)
|
|||
static inline u8 __raw_rm_readb(volatile void __iomem *paddr)
|
||||
{
|
||||
u8 ret;
|
||||
__asm__ __volatile__("lbzcix %0,0, %1"
|
||||
__asm__ __volatile__(".machine push; \
|
||||
.machine power6; \
|
||||
lbzcix %0,0, %1; \
|
||||
.machine pop;"
|
||||
: "=r" (ret) : "r" (paddr) : "memory");
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -383,7 +398,10 @@ static inline u8 __raw_rm_readb(volatile void __iomem *paddr)
|
|||
static inline u16 __raw_rm_readw(volatile void __iomem *paddr)
|
||||
{
|
||||
u16 ret;
|
||||
__asm__ __volatile__("lhzcix %0,0, %1"
|
||||
__asm__ __volatile__(".machine push; \
|
||||
.machine power6; \
|
||||
lhzcix %0,0, %1; \
|
||||
.machine pop;"
|
||||
: "=r" (ret) : "r" (paddr) : "memory");
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -391,7 +409,10 @@ static inline u16 __raw_rm_readw(volatile void __iomem *paddr)
|
|||
static inline u32 __raw_rm_readl(volatile void __iomem *paddr)
|
||||
{
|
||||
u32 ret;
|
||||
__asm__ __volatile__("lwzcix %0,0, %1"
|
||||
__asm__ __volatile__(".machine push; \
|
||||
.machine power6; \
|
||||
lwzcix %0,0, %1; \
|
||||
.machine pop;"
|
||||
: "=r" (ret) : "r" (paddr) : "memory");
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -399,7 +420,10 @@ static inline u32 __raw_rm_readl(volatile void __iomem *paddr)
|
|||
static inline u64 __raw_rm_readq(volatile void __iomem *paddr)
|
||||
{
|
||||
u64 ret;
|
||||
__asm__ __volatile__("ldcix %0,0, %1"
|
||||
__asm__ __volatile__(".machine push; \
|
||||
.machine power6; \
|
||||
ldcix %0,0, %1; \
|
||||
.machine pop;"
|
||||
: "=r" (ret) : "r" (paddr) : "memory");
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -132,7 +132,11 @@ static inline bool pfn_valid(unsigned long pfn)
|
|||
#define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr))
|
||||
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
|
||||
|
||||
#define virt_addr_valid(kaddr) pfn_valid(virt_to_pfn(kaddr))
|
||||
#define virt_addr_valid(vaddr) ({ \
|
||||
unsigned long _addr = (unsigned long)vaddr; \
|
||||
_addr >= PAGE_OFFSET && _addr < (unsigned long)high_memory && \
|
||||
pfn_valid(virt_to_pfn(_addr)); \
|
||||
})
|
||||
|
||||
/*
|
||||
* On Book-E parts we need __va to parse the device tree and we can't
|
||||
|
|
|
|||
|
|
@ -191,8 +191,11 @@ extern long __get_user_bad(void);
|
|||
*/
|
||||
#define __get_user_atomic_128_aligned(kaddr, uaddr, err) \
|
||||
__asm__ __volatile__( \
|
||||
".machine push\n" \
|
||||
".machine altivec\n" \
|
||||
"1: lvx 0,0,%1 # get user\n" \
|
||||
" stvx 0,0,%2 # put kernel\n" \
|
||||
".machine pop\n" \
|
||||
"2:\n" \
|
||||
".section .fixup,\"ax\"\n" \
|
||||
"3: li %0,%3\n" \
|
||||
|
|
|
|||
|
|
@ -669,7 +669,7 @@ static void __init kvm_use_magic_page(void)
|
|||
on_each_cpu(kvm_map_magic_page, &features, 1);
|
||||
|
||||
/* Quick self-test to see if the mapping works */
|
||||
if (!fault_in_pages_readable((const char *)KVM_MAGIC_PAGE, sizeof(u32))) {
|
||||
if (fault_in_pages_readable((const char *)KVM_MAGIC_PAGE, sizeof(u32))) {
|
||||
kvm_patching_worked = false;
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -146,11 +146,18 @@ void __init reserve_crashkernel(void)
|
|||
if (!crashk_res.start) {
|
||||
#ifdef CONFIG_PPC64
|
||||
/*
|
||||
* On 64bit we split the RMO in half but cap it at half of
|
||||
* a small SLB (128MB) since the crash kernel needs to place
|
||||
* itself and some stacks to be in the first segment.
|
||||
* On the LPAR platform place the crash kernel to mid of
|
||||
* RMA size (512MB or more) to ensure the crash kernel
|
||||
* gets enough space to place itself and some stack to be
|
||||
* in the first segment. At the same time normal kernel
|
||||
* also get enough space to allocate memory for essential
|
||||
* system resource in the first segment. Keep the crash
|
||||
* kernel starts at 128MB offset on other platforms.
|
||||
*/
|
||||
crashk_res.start = min(0x8000000ULL, (ppc64_rma_size / 2));
|
||||
if (firmware_has_feature(FW_FEATURE_LPAR))
|
||||
crashk_res.start = ppc64_rma_size / 2;
|
||||
else
|
||||
crashk_res.start = min(0x8000000ULL, (ppc64_rma_size / 2));
|
||||
#else
|
||||
crashk_res.start = KDUMP_KERNELBASE;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1244,6 +1244,12 @@ int __init early_init_dt_scan_rtas(unsigned long node,
|
|||
entryp = of_get_flat_dt_prop(node, "linux,rtas-entry", NULL);
|
||||
sizep = of_get_flat_dt_prop(node, "rtas-size", NULL);
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
/* need this feature to decide the crashkernel offset */
|
||||
if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL))
|
||||
powerpc_firmware_features |= FW_FEATURE_LPAR;
|
||||
#endif
|
||||
|
||||
if (basep && entryp && sizep) {
|
||||
rtas.base = *basep;
|
||||
rtas.entry = *entryp;
|
||||
|
|
|
|||
|
|
@ -420,13 +420,19 @@ static void kvmppc_tce_put(struct kvmppc_spapr_tce_table *stt,
|
|||
tbl[idx % TCES_PER_PAGE] = tce;
|
||||
}
|
||||
|
||||
static void kvmppc_clear_tce(struct mm_struct *mm, struct iommu_table *tbl,
|
||||
unsigned long entry)
|
||||
static void kvmppc_clear_tce(struct mm_struct *mm, struct kvmppc_spapr_tce_table *stt,
|
||||
struct iommu_table *tbl, unsigned long entry)
|
||||
{
|
||||
unsigned long hpa = 0;
|
||||
enum dma_data_direction dir = DMA_NONE;
|
||||
unsigned long i;
|
||||
unsigned long subpages = 1ULL << (stt->page_shift - tbl->it_page_shift);
|
||||
unsigned long io_entry = entry << (stt->page_shift - tbl->it_page_shift);
|
||||
|
||||
iommu_tce_xchg_no_kill(mm, tbl, entry, &hpa, &dir);
|
||||
for (i = 0; i < subpages; ++i) {
|
||||
unsigned long hpa = 0;
|
||||
enum dma_data_direction dir = DMA_NONE;
|
||||
|
||||
iommu_tce_xchg_no_kill(mm, tbl, io_entry + i, &hpa, &dir);
|
||||
}
|
||||
}
|
||||
|
||||
static long kvmppc_tce_iommu_mapped_dec(struct kvm *kvm,
|
||||
|
|
@ -485,6 +491,8 @@ static long kvmppc_tce_iommu_unmap(struct kvm *kvm,
|
|||
break;
|
||||
}
|
||||
|
||||
iommu_tce_kill(tbl, io_entry, subpages);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -544,6 +552,8 @@ static long kvmppc_tce_iommu_map(struct kvm *kvm,
|
|||
break;
|
||||
}
|
||||
|
||||
iommu_tce_kill(tbl, io_entry, subpages);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -590,10 +600,9 @@ long kvmppc_h_put_tce(struct kvm_vcpu *vcpu, unsigned long liobn,
|
|||
ret = kvmppc_tce_iommu_map(vcpu->kvm, stt, stit->tbl,
|
||||
entry, ua, dir);
|
||||
|
||||
iommu_tce_kill(stit->tbl, entry, 1);
|
||||
|
||||
if (ret != H_SUCCESS) {
|
||||
kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl, entry);
|
||||
kvmppc_clear_tce(vcpu->kvm->mm, stt, stit->tbl, entry);
|
||||
goto unlock_exit;
|
||||
}
|
||||
}
|
||||
|
|
@ -669,13 +678,13 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu,
|
|||
*/
|
||||
if (get_user(tce, tces + i)) {
|
||||
ret = H_TOO_HARD;
|
||||
goto invalidate_exit;
|
||||
goto unlock_exit;
|
||||
}
|
||||
tce = be64_to_cpu(tce);
|
||||
|
||||
if (kvmppc_tce_to_ua(vcpu->kvm, tce, &ua)) {
|
||||
ret = H_PARAMETER;
|
||||
goto invalidate_exit;
|
||||
goto unlock_exit;
|
||||
}
|
||||
|
||||
list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {
|
||||
|
|
@ -684,19 +693,15 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu,
|
|||
iommu_tce_direction(tce));
|
||||
|
||||
if (ret != H_SUCCESS) {
|
||||
kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl,
|
||||
entry);
|
||||
goto invalidate_exit;
|
||||
kvmppc_clear_tce(vcpu->kvm->mm, stt, stit->tbl,
|
||||
entry + i);
|
||||
goto unlock_exit;
|
||||
}
|
||||
}
|
||||
|
||||
kvmppc_tce_put(stt, entry + i, tce);
|
||||
}
|
||||
|
||||
invalidate_exit:
|
||||
list_for_each_entry_lockless(stit, &stt->iommu_tables, next)
|
||||
iommu_tce_kill(stit->tbl, entry, npages);
|
||||
|
||||
unlock_exit:
|
||||
srcu_read_unlock(&vcpu->kvm->srcu, idx);
|
||||
|
||||
|
|
@ -735,20 +740,16 @@ long kvmppc_h_stuff_tce(struct kvm_vcpu *vcpu,
|
|||
continue;
|
||||
|
||||
if (ret == H_TOO_HARD)
|
||||
goto invalidate_exit;
|
||||
return ret;
|
||||
|
||||
WARN_ON_ONCE(1);
|
||||
kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl, entry);
|
||||
kvmppc_clear_tce(vcpu->kvm->mm, stt, stit->tbl, entry + i);
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < npages; ++i, ioba += (1ULL << stt->page_shift))
|
||||
kvmppc_tce_put(stt, ioba >> stt->page_shift, tce_value);
|
||||
|
||||
invalidate_exit:
|
||||
list_for_each_entry_lockless(stit, &stt->iommu_tables, next)
|
||||
iommu_tce_kill(stit->tbl, ioba >> stt->page_shift, npages);
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(kvmppc_h_stuff_tce);
|
||||
|
|
|
|||
|
|
@ -251,13 +251,19 @@ extern void iommu_tce_kill_rm(struct iommu_table *tbl,
|
|||
tbl->it_ops->tce_kill(tbl, entry, pages, true);
|
||||
}
|
||||
|
||||
static void kvmppc_rm_clear_tce(struct kvm *kvm, struct iommu_table *tbl,
|
||||
unsigned long entry)
|
||||
static void kvmppc_rm_clear_tce(struct kvm *kvm, struct kvmppc_spapr_tce_table *stt,
|
||||
struct iommu_table *tbl, unsigned long entry)
|
||||
{
|
||||
unsigned long hpa = 0;
|
||||
enum dma_data_direction dir = DMA_NONE;
|
||||
unsigned long i;
|
||||
unsigned long subpages = 1ULL << (stt->page_shift - tbl->it_page_shift);
|
||||
unsigned long io_entry = entry << (stt->page_shift - tbl->it_page_shift);
|
||||
|
||||
iommu_tce_xchg_no_kill_rm(kvm->mm, tbl, entry, &hpa, &dir);
|
||||
for (i = 0; i < subpages; ++i) {
|
||||
unsigned long hpa = 0;
|
||||
enum dma_data_direction dir = DMA_NONE;
|
||||
|
||||
iommu_tce_xchg_no_kill_rm(kvm->mm, tbl, io_entry + i, &hpa, &dir);
|
||||
}
|
||||
}
|
||||
|
||||
static long kvmppc_rm_tce_iommu_mapped_dec(struct kvm *kvm,
|
||||
|
|
@ -320,6 +326,8 @@ static long kvmppc_rm_tce_iommu_unmap(struct kvm *kvm,
|
|||
break;
|
||||
}
|
||||
|
||||
iommu_tce_kill_rm(tbl, io_entry, subpages);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -383,6 +391,8 @@ static long kvmppc_rm_tce_iommu_map(struct kvm *kvm,
|
|||
break;
|
||||
}
|
||||
|
||||
iommu_tce_kill_rm(tbl, io_entry, subpages);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
@ -428,10 +438,8 @@ long kvmppc_rm_h_put_tce(struct kvm_vcpu *vcpu, unsigned long liobn,
|
|||
ret = kvmppc_rm_tce_iommu_map(vcpu->kvm, stt,
|
||||
stit->tbl, entry, ua, dir);
|
||||
|
||||
iommu_tce_kill_rm(stit->tbl, entry, 1);
|
||||
|
||||
if (ret != H_SUCCESS) {
|
||||
kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl, entry);
|
||||
kvmppc_rm_clear_tce(vcpu->kvm, stt, stit->tbl, entry);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
|
@ -571,7 +579,7 @@ long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu,
|
|||
ua = 0;
|
||||
if (kvmppc_rm_tce_to_ua(vcpu->kvm, tce, &ua, NULL)) {
|
||||
ret = H_PARAMETER;
|
||||
goto invalidate_exit;
|
||||
goto unlock_exit;
|
||||
}
|
||||
|
||||
list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {
|
||||
|
|
@ -580,19 +588,15 @@ long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu,
|
|||
iommu_tce_direction(tce));
|
||||
|
||||
if (ret != H_SUCCESS) {
|
||||
kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl,
|
||||
entry);
|
||||
goto invalidate_exit;
|
||||
kvmppc_rm_clear_tce(vcpu->kvm, stt, stit->tbl,
|
||||
entry + i);
|
||||
goto unlock_exit;
|
||||
}
|
||||
}
|
||||
|
||||
kvmppc_rm_tce_put(stt, entry + i, tce);
|
||||
}
|
||||
|
||||
invalidate_exit:
|
||||
list_for_each_entry_lockless(stit, &stt->iommu_tables, next)
|
||||
iommu_tce_kill_rm(stit->tbl, entry, npages);
|
||||
|
||||
unlock_exit:
|
||||
if (rmap)
|
||||
unlock_rmap(rmap);
|
||||
|
|
@ -635,20 +639,16 @@ long kvmppc_rm_h_stuff_tce(struct kvm_vcpu *vcpu,
|
|||
continue;
|
||||
|
||||
if (ret == H_TOO_HARD)
|
||||
goto invalidate_exit;
|
||||
return ret;
|
||||
|
||||
WARN_ON_ONCE_RM(1);
|
||||
kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl, entry);
|
||||
kvmppc_rm_clear_tce(vcpu->kvm, stt, stit->tbl, entry + i);
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < npages; ++i, ioba += (1ULL << stt->page_shift))
|
||||
kvmppc_rm_tce_put(stt, ioba >> stt->page_shift, tce_value);
|
||||
|
||||
invalidate_exit:
|
||||
list_for_each_entry_lockless(stit, &stt->iommu_tables, next)
|
||||
iommu_tce_kill_rm(stit->tbl, ioba >> stt->page_shift, npages);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1495,7 +1495,7 @@ int kvmppc_handle_vmx_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
|||
{
|
||||
enum emulation_result emulated = EMULATE_DONE;
|
||||
|
||||
if (vcpu->arch.mmio_vsx_copy_nums > 2)
|
||||
if (vcpu->arch.mmio_vmx_copy_nums > 2)
|
||||
return EMULATE_FAIL;
|
||||
|
||||
while (vcpu->arch.mmio_vmx_copy_nums) {
|
||||
|
|
@ -1592,7 +1592,7 @@ int kvmppc_handle_vmx_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
|||
unsigned int index = rs & KVM_MMIO_REG_MASK;
|
||||
enum emulation_result emulated = EMULATE_DONE;
|
||||
|
||||
if (vcpu->arch.mmio_vsx_copy_nums > 2)
|
||||
if (vcpu->arch.mmio_vmx_copy_nums > 2)
|
||||
return EMULATE_FAIL;
|
||||
|
||||
vcpu->arch.io_gpr = rs;
|
||||
|
|
|
|||
|
|
@ -906,7 +906,10 @@ NOKPROBE_SYMBOL(emulate_dcbz);
|
|||
|
||||
#define __put_user_asmx(x, addr, err, op, cr) \
|
||||
__asm__ __volatile__( \
|
||||
".machine push\n" \
|
||||
".machine power8\n" \
|
||||
"1: " op " %2,0,%3\n" \
|
||||
".machine pop\n" \
|
||||
" mfcr %1\n" \
|
||||
"2:\n" \
|
||||
".section .fixup,\"ax\"\n" \
|
||||
|
|
@ -919,7 +922,10 @@ NOKPROBE_SYMBOL(emulate_dcbz);
|
|||
|
||||
#define __get_user_asmx(x, addr, err, op) \
|
||||
__asm__ __volatile__( \
|
||||
".machine push\n" \
|
||||
".machine power8\n" \
|
||||
"1: "op" %1,0,%2\n" \
|
||||
".machine pop\n" \
|
||||
"2:\n" \
|
||||
".section .fixup,\"ax\"\n" \
|
||||
"3: li %0,%3\n" \
|
||||
|
|
@ -2787,12 +2793,14 @@ void emulate_update_regs(struct pt_regs *regs, struct instruction_op *op)
|
|||
case BARRIER_EIEIO:
|
||||
eieio();
|
||||
break;
|
||||
#ifdef CONFIG_PPC64
|
||||
case BARRIER_LWSYNC:
|
||||
asm volatile("lwsync" : : : "memory");
|
||||
break;
|
||||
case BARRIER_PTESYNC:
|
||||
asm volatile("ptesync" : : : "memory");
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
@ -2910,7 +2918,7 @@ int emulate_loadstore(struct pt_regs *regs, struct instruction_op *op)
|
|||
__put_user_asmx(op->val, ea, err, "stbcx.", cr);
|
||||
break;
|
||||
case 2:
|
||||
__put_user_asmx(op->val, ea, err, "stbcx.", cr);
|
||||
__put_user_asmx(op->val, ea, err, "sthcx.", cr);
|
||||
break;
|
||||
#endif
|
||||
case 4:
|
||||
|
|
|
|||
|
|
@ -121,7 +121,7 @@ static void __init kasan_remap_early_shadow_ro(void)
|
|||
pmd_t *pmd = pmd_offset(pud_offset(pgd_offset_k(k_cur), k_cur), k_cur);
|
||||
pte_t *ptep = pte_offset_kernel(pmd, k_cur);
|
||||
|
||||
if ((pte_val(*ptep) & PTE_RPN_MASK) != pa)
|
||||
if (pte_page(*ptep) != virt_to_page(lm_alias(kasan_early_shadow_page)))
|
||||
continue;
|
||||
|
||||
__set_pte_at(&init_mm, k_cur, ptep, pfn_pte(PHYS_PFN(pa), prot), 0);
|
||||
|
|
|
|||
|
|
@ -1441,7 +1441,11 @@ static int trace_imc_event_init(struct perf_event *event)
|
|||
event->hw.idx = -1;
|
||||
target = event->hw.target;
|
||||
|
||||
event->pmu->task_ctx_nr = perf_hw_context;
|
||||
/*
|
||||
* There can only be a single PMU for perf_hw_context events which is assigned to
|
||||
* core PMU. Hence use "perf_sw_context" for trace_imc.
|
||||
*/
|
||||
event->pmu->task_ctx_nr = perf_sw_context;
|
||||
event->destroy = reset_global_refc;
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -131,11 +131,11 @@ int p9_dd22_bl_ev[] = {
|
|||
|
||||
/* Table of alternatives, sorted by column 0 */
|
||||
static const unsigned int power9_event_alternatives[][MAX_ALT] = {
|
||||
{ PM_INST_DISP, PM_INST_DISP_ALT },
|
||||
{ PM_RUN_CYC_ALT, PM_RUN_CYC },
|
||||
{ PM_RUN_INST_CMPL_ALT, PM_RUN_INST_CMPL },
|
||||
{ PM_LD_MISS_L1, PM_LD_MISS_L1_ALT },
|
||||
{ PM_BR_2PATH, PM_BR_2PATH_ALT },
|
||||
{ PM_INST_DISP, PM_INST_DISP_ALT },
|
||||
{ PM_RUN_CYC_ALT, PM_RUN_CYC },
|
||||
{ PM_LD_MISS_L1, PM_LD_MISS_L1_ALT },
|
||||
{ PM_RUN_INST_CMPL_ALT, PM_RUN_INST_CMPL },
|
||||
};
|
||||
|
||||
static int power9_get_alternatives(u64 event, unsigned int flags, u64 alt[])
|
||||
|
|
|
|||
|
|
@ -153,6 +153,7 @@ int mpc8xx_pic_init(void)
|
|||
if (mpc8xx_pic_host == NULL) {
|
||||
printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");
|
||||
ret = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
|
|
|
|||
|
|
@ -43,7 +43,11 @@ static unsigned long rng_whiten(struct powernv_rng *rng, unsigned long val)
|
|||
unsigned long parity;
|
||||
|
||||
/* Calculate the parity of the value */
|
||||
asm ("popcntd %0,%1" : "=r" (parity) : "r" (val));
|
||||
asm (".machine push; \
|
||||
.machine power7; \
|
||||
popcntd %0,%1; \
|
||||
.machine pop;"
|
||||
: "=r" (parity) : "r" (val));
|
||||
|
||||
/* xor our value with the previous mask */
|
||||
val ^= rng->mask;
|
||||
|
|
|
|||
|
|
@ -86,7 +86,7 @@ static LIST_HEAD(gtms);
|
|||
*/
|
||||
struct gtm_timer *gtm_get_timer16(void)
|
||||
{
|
||||
struct gtm *gtm = NULL;
|
||||
struct gtm *gtm;
|
||||
int i;
|
||||
|
||||
list_for_each_entry(gtm, >ms, list_node) {
|
||||
|
|
@ -103,7 +103,7 @@ struct gtm_timer *gtm_get_timer16(void)
|
|||
spin_unlock_irq(>m->lock);
|
||||
}
|
||||
|
||||
if (gtm)
|
||||
if (!list_empty(>ms))
|
||||
return ERR_PTR(-EBUSY);
|
||||
return ERR_PTR(-ENODEV);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,6 +13,19 @@
|
|||
#include <asm/pgtable.h>
|
||||
#include <asm/sections.h>
|
||||
|
||||
/*
|
||||
* The auipc+jalr instruction pair can reach any PC-relative offset
|
||||
* in the range [-2^31 - 2^11, 2^31 - 2^11)
|
||||
*/
|
||||
static bool riscv_insn_valid_32bit_offset(ptrdiff_t val)
|
||||
{
|
||||
#ifdef CONFIG_32BIT
|
||||
return true;
|
||||
#else
|
||||
return (-(1L << 31) - (1L << 11)) <= val && val < ((1L << 31) - (1L << 11));
|
||||
#endif
|
||||
}
|
||||
|
||||
static int apply_r_riscv_32_rela(struct module *me, u32 *location, Elf_Addr v)
|
||||
{
|
||||
if (v != (u32)v) {
|
||||
|
|
@ -95,7 +108,7 @@ static int apply_r_riscv_pcrel_hi20_rela(struct module *me, u32 *location,
|
|||
ptrdiff_t offset = (void *)v - (void *)location;
|
||||
s32 hi20;
|
||||
|
||||
if (offset != (s32)offset) {
|
||||
if (!riscv_insn_valid_32bit_offset(offset)) {
|
||||
pr_err(
|
||||
"%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
|
||||
me->name, (long long)v, location);
|
||||
|
|
@ -197,10 +210,9 @@ static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location,
|
|||
Elf_Addr v)
|
||||
{
|
||||
ptrdiff_t offset = (void *)v - (void *)location;
|
||||
s32 fill_v = offset;
|
||||
u32 hi20, lo12;
|
||||
|
||||
if (offset != fill_v) {
|
||||
if (!riscv_insn_valid_32bit_offset(offset)) {
|
||||
/* Only emit the plt entry if offset over 32-bit range */
|
||||
if (IS_ENABLED(CONFIG_MODULE_SECTIONS)) {
|
||||
offset = module_emit_plt_entry(me, v);
|
||||
|
|
@ -224,10 +236,9 @@ static int apply_r_riscv_call_rela(struct module *me, u32 *location,
|
|||
Elf_Addr v)
|
||||
{
|
||||
ptrdiff_t offset = (void *)v - (void *)location;
|
||||
s32 fill_v = offset;
|
||||
u32 hi20, lo12;
|
||||
|
||||
if (offset != fill_v) {
|
||||
if (!riscv_insn_valid_32bit_offset(offset)) {
|
||||
pr_err(
|
||||
"%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
|
||||
me->name, (long long)v, location);
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
/* Copyright (C) 2017 Andes Technology Corporation */
|
||||
|
||||
SECTIONS {
|
||||
.plt (NOLOAD) : { BYTE(0) }
|
||||
.got (NOLOAD) : { BYTE(0) }
|
||||
.got.plt (NOLOAD) : { BYTE(0) }
|
||||
.plt : { BYTE(0) }
|
||||
.got : { BYTE(0) }
|
||||
.got.plt : { BYTE(0) }
|
||||
}
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ void perf_callchain_user(struct perf_callchain_entry_ctx *entry,
|
|||
|
||||
bool fill_callchain(unsigned long pc, void *entry)
|
||||
{
|
||||
return perf_callchain_store(entry, pc);
|
||||
return perf_callchain_store(entry, pc) == 0;
|
||||
}
|
||||
|
||||
void notrace walk_stackframe(struct task_struct *task,
|
||||
|
|
|
|||
|
|
@ -217,7 +217,7 @@ void mconsole_go(struct mc_request *req)
|
|||
|
||||
void mconsole_stop(struct mc_request *req)
|
||||
{
|
||||
deactivate_fd(req->originating_fd, MCONSOLE_IRQ);
|
||||
block_signals();
|
||||
os_set_fd_block(req->originating_fd, 1);
|
||||
mconsole_reply(req, "stopped", 0, 0);
|
||||
for (;;) {
|
||||
|
|
@ -240,6 +240,7 @@ void mconsole_stop(struct mc_request *req)
|
|||
}
|
||||
os_set_fd_block(req->originating_fd, 0);
|
||||
mconsole_reply(req, "", 0, 0);
|
||||
unblock_signals();
|
||||
}
|
||||
|
||||
static DEFINE_SPINLOCK(mc_devices_lock);
|
||||
|
|
|
|||
|
|
@ -460,7 +460,7 @@ static u64 pt_config_filters(struct perf_event *event)
|
|||
pt->filters.filter[range].msr_b = filter->msr_b;
|
||||
}
|
||||
|
||||
rtit_ctl |= filter->config << pt_address_ranges[range].reg_off;
|
||||
rtit_ctl |= (u64)filter->config << pt_address_ranges[range].reg_off;
|
||||
}
|
||||
|
||||
return rtit_ctl;
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue