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uprobes: Fix uprobes on MIPS, allow for a cache flush after ixol breakpoint creation
Commit:
72e6ae285a ('ARM: 8043/1: uprobes need icache flush after xol write'
... has introduced an arch-specific method to ensure all caches are
flushed appropriately after an instruction is written to an XOL page.
However, when the XOL area is created and the out-of-line breakpoint
instruction is copied, caches are not flushed at all and stale data may
be found in icache.
Replace a simple copy_to_page() with arch_uprobe_copy_ixol() to allow
the arch to ensure all caches are updated accordingly.
This change fixes uprobes on MIPS InterAptiv (tested on Creator Ci40).
Signed-off-by: Marcin Nowakowski <[email protected]>
Cc: Alexander Shishkin <[email protected]>
Cc: Arnaldo Carvalho de Melo <[email protected]>
Cc: Arnaldo Carvalho de Melo <[email protected]>
Cc: Jiri Olsa <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Oleg Nesterov <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Victor Kamensky <[email protected]>
Cc: [email protected]
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>
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1 changed files with 1 additions and 1 deletions
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@ -1194,7 +1194,7 @@ static struct xol_area *__create_xol_area(unsigned long vaddr)
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/* Reserve the 1st slot for get_trampoline_vaddr() */
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set_bit(0, area->bitmap);
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atomic_set(&area->slot_count, 1);
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copy_to_page(area->pages[0], 0, &insn, UPROBE_SWBP_INSN_SIZE);
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arch_uprobe_copy_ixol(area->pages[0], 0, &insn, UPROBE_SWBP_INSN_SIZE);
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if (!xol_add_vma(mm, area))
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return area;
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