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usb: phy: qmp: change orientation to default portselect mode

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if there are two modules control one same pin,
each module will request and release one state,
there is race when one module request state before
another module complete relase it's state.
revert to commit 87aee0bf55 ("usb: phy: qmp: Perform
DP_COM_SW_RESET during portselect") to allow only one module
control one pin.

Change-Id: Ie6df02f018e58be8bf832b5b3921f5430fadbf53
Signed-off-by: Linyu Yuan <linyyuan@codeaurora.org>
This commit is contained in:
Linyu Yuan 2020-11-25 18:23:59 +08:00 • committed by Gerrit - the friendly Code Review server
commit 2a55b618e9
1 changed files with 10 additions and 46 deletions
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56
drivers/usb/phy/phy-msm-ssusb-qmp.c
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@ -370,51 +370,6 @@ static void msm_ssphy_qmp_setmode(struct msm_ssphy_qmp *phy, u32 mode)
readl_relaxed(phy->base + phy->phy_reg[USB3_DP_COM_PHY_MODE_CTRL]);
}
static void usb_qmp_update_hw_portselect(struct msm_ssphy_qmp *phy)
{
struct pinctrl *portselect_pinctrl;
struct pinctrl_state *portselect_state;
u32 status;
if (phy->phy.dev->pins) {
portselect_pinctrl = phy->phy.dev->pins->p;
portselect_state = phy->phy.dev->pins->default_state;
} else {
portselect_pinctrl = pinctrl_get(phy->phy.dev);
if (IS_ERR_OR_NULL(portselect_pinctrl)) {
dev_dbg(phy->phy.dev, "failed to get pinctrl\n");
return;
}
portselect_state =
pinctrl_lookup_state(portselect_pinctrl, "portselect");
if (IS_ERR_OR_NULL(portselect_state)) {
dev_dbg(phy->phy.dev,
"failed to find portselect state\n");
pinctrl_put(portselect_pinctrl);
return;
}
}
writel_relaxed(0x01,
phy->base + phy->phy_reg[USB3_DP_COM_SW_RESET]);
pinctrl_select_state(portselect_pinctrl, portselect_state);
writel_relaxed(0x00,
phy->base + phy->phy_reg[USB3_DP_COM_SW_RESET]);
if (!phy->phy.dev->pins)
pinctrl_put(portselect_pinctrl);
if (phy->phy_reg[USB3_DP_COM_TYPEC_STATUS]) {
status = readl_relaxed(phy->base +
phy->phy_reg[USB3_DP_COM_TYPEC_STATUS]);
dev_dbg(phy->phy.dev, "hw port select %s\n",
status & PORTSELECT_RAW ? "CC2" : "CC1");
}
}
static void usb_qmp_update_portselect_phymode(struct msm_ssphy_qmp *phy)
{
int val;
@ -431,7 +386,16 @@ static void usb_qmp_update_portselect_phymode(struct msm_ssphy_qmp *phy)
switch (phy->phy_type) {
case USB3_AND_DP:
usb_qmp_update_hw_portselect(phy);
if (phy->phy.dev->pins) {
writel_relaxed(0x01,
phy->base + phy->phy_reg[USB3_DP_COM_SW_RESET]);
pinctrl_select_state(phy->phy.dev->pins->p,
phy->phy.dev->pins->default_state);
writel_relaxed(0x00,
phy->base + phy->phy_reg[USB3_DP_COM_SW_RESET]);
}
/* override hardware control for reset of qmp phy */
writel_relaxed(SW_DPPHY_RESET_MUX | SW_DPPHY_RESET |