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ARM: dts: msm: updated monaco qupv3 dtsi
qupv3_se7_spi_b node is duplicated hence it is not required, so removed the node. Change-Id: I7283faf491678ae532c3f8daaf438ed8a035452b
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1 changed files with 0 additions and 24 deletions
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@ -432,30 +432,6 @@
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status = "disabled";
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};
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qupv3_se7_spi_b: spi@4a9c000 {
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compatible = "qcom,spi-geni";
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reg = <0x4a9c000 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg-names = "se_phys";
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interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "se-clk", "m-ahb", "s-ahb";
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clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>,
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<&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
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<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&qupv3_se7_spi_active_L0_b
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&qupv3_se7_spi_active_L1_b &qupv3_se7_spi_active_L2_b
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&qupv3_se7_spi_active_L3_b>;
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pinctrl-1 = <&qupv3_se7_spi_sleep_b>;
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dmas = <&gpi_dma0 0 7 1 64 0>,
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<&gpi_dma0 1 7 1 64 0>;
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dma-names = "tx", "rx";
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spi-max-frequency = <75000000>;
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qcom,wrapper-core = <&qupv3_0>;
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status = "disabled";
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};
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/* HS UART Instance */
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qupv3_se5_4uart: qcom,qup_uart@4a94000 {
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compatible = "qcom,msm-geni-serial-hs";
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